2 * linux/drivers/mmc/host/sdhci.c - Secure Digital Host Controller Interface driver
4 * Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or (at
9 * your option) any later version.
11 * Thanks to the following companies for their support:
13 * - JMicron (hardware and technical support)
16 #include <linux/delay.h>
17 #include <linux/highmem.h>
19 #include <linux/dma-mapping.h>
20 #include <linux/scatterlist.h>
22 #include <linux/leds.h>
24 #include <linux/mmc/host.h>
28 #define DRIVER_NAME "sdhci"
30 #define DBG(f, x...) \
31 pr_debug(DRIVER_NAME " [%s()]: " f, __func__,## x)
33 static unsigned int debug_quirks
= 0;
35 static void sdhci_prepare_data(struct sdhci_host
*, struct mmc_data
*);
36 static void sdhci_finish_data(struct sdhci_host
*);
38 static void sdhci_send_command(struct sdhci_host
*, struct mmc_command
*);
39 static void sdhci_finish_command(struct sdhci_host
*);
41 static void sdhci_dumpregs(struct sdhci_host
*host
)
43 printk(KERN_DEBUG DRIVER_NAME
": ============== REGISTER DUMP ==============\n");
45 printk(KERN_DEBUG DRIVER_NAME
": Sys addr: 0x%08x | Version: 0x%08x\n",
46 readl(host
->ioaddr
+ SDHCI_DMA_ADDRESS
),
47 readw(host
->ioaddr
+ SDHCI_HOST_VERSION
));
48 printk(KERN_DEBUG DRIVER_NAME
": Blk size: 0x%08x | Blk cnt: 0x%08x\n",
49 readw(host
->ioaddr
+ SDHCI_BLOCK_SIZE
),
50 readw(host
->ioaddr
+ SDHCI_BLOCK_COUNT
));
51 printk(KERN_DEBUG DRIVER_NAME
": Argument: 0x%08x | Trn mode: 0x%08x\n",
52 readl(host
->ioaddr
+ SDHCI_ARGUMENT
),
53 readw(host
->ioaddr
+ SDHCI_TRANSFER_MODE
));
54 printk(KERN_DEBUG DRIVER_NAME
": Present: 0x%08x | Host ctl: 0x%08x\n",
55 readl(host
->ioaddr
+ SDHCI_PRESENT_STATE
),
56 readb(host
->ioaddr
+ SDHCI_HOST_CONTROL
));
57 printk(KERN_DEBUG DRIVER_NAME
": Power: 0x%08x | Blk gap: 0x%08x\n",
58 readb(host
->ioaddr
+ SDHCI_POWER_CONTROL
),
59 readb(host
->ioaddr
+ SDHCI_BLOCK_GAP_CONTROL
));
60 printk(KERN_DEBUG DRIVER_NAME
": Wake-up: 0x%08x | Clock: 0x%08x\n",
61 readb(host
->ioaddr
+ SDHCI_WAKE_UP_CONTROL
),
62 readw(host
->ioaddr
+ SDHCI_CLOCK_CONTROL
));
63 printk(KERN_DEBUG DRIVER_NAME
": Timeout: 0x%08x | Int stat: 0x%08x\n",
64 readb(host
->ioaddr
+ SDHCI_TIMEOUT_CONTROL
),
65 readl(host
->ioaddr
+ SDHCI_INT_STATUS
));
66 printk(KERN_DEBUG DRIVER_NAME
": Int enab: 0x%08x | Sig enab: 0x%08x\n",
67 readl(host
->ioaddr
+ SDHCI_INT_ENABLE
),
68 readl(host
->ioaddr
+ SDHCI_SIGNAL_ENABLE
));
69 printk(KERN_DEBUG DRIVER_NAME
": AC12 err: 0x%08x | Slot int: 0x%08x\n",
70 readw(host
->ioaddr
+ SDHCI_ACMD12_ERR
),
71 readw(host
->ioaddr
+ SDHCI_SLOT_INT_STATUS
));
72 printk(KERN_DEBUG DRIVER_NAME
": Caps: 0x%08x | Max curr: 0x%08x\n",
73 readl(host
->ioaddr
+ SDHCI_CAPABILITIES
),
74 readl(host
->ioaddr
+ SDHCI_MAX_CURRENT
));
76 printk(KERN_DEBUG DRIVER_NAME
": ===========================================\n");
79 /*****************************************************************************\
81 * Low level functions *
83 \*****************************************************************************/
85 static void sdhci_reset(struct sdhci_host
*host
, u8 mask
)
87 unsigned long timeout
;
89 if (host
->quirks
& SDHCI_QUIRK_NO_CARD_NO_RESET
) {
90 if (!(readl(host
->ioaddr
+ SDHCI_PRESENT_STATE
) &
95 writeb(mask
, host
->ioaddr
+ SDHCI_SOFTWARE_RESET
);
97 if (mask
& SDHCI_RESET_ALL
)
100 /* Wait max 100 ms */
103 /* hw clears the bit when it's done */
104 while (readb(host
->ioaddr
+ SDHCI_SOFTWARE_RESET
) & mask
) {
106 printk(KERN_ERR
"%s: Reset 0x%x never completed.\n",
107 mmc_hostname(host
->mmc
), (int)mask
);
108 sdhci_dumpregs(host
);
116 static void sdhci_init(struct sdhci_host
*host
)
120 sdhci_reset(host
, SDHCI_RESET_ALL
);
122 intmask
= SDHCI_INT_BUS_POWER
| SDHCI_INT_DATA_END_BIT
|
123 SDHCI_INT_DATA_CRC
| SDHCI_INT_DATA_TIMEOUT
| SDHCI_INT_INDEX
|
124 SDHCI_INT_END_BIT
| SDHCI_INT_CRC
| SDHCI_INT_TIMEOUT
|
125 SDHCI_INT_CARD_REMOVE
| SDHCI_INT_CARD_INSERT
|
126 SDHCI_INT_DATA_AVAIL
| SDHCI_INT_SPACE_AVAIL
|
127 SDHCI_INT_DMA_END
| SDHCI_INT_DATA_END
| SDHCI_INT_RESPONSE
;
129 writel(intmask
, host
->ioaddr
+ SDHCI_INT_ENABLE
);
130 writel(intmask
, host
->ioaddr
+ SDHCI_SIGNAL_ENABLE
);
133 static void sdhci_activate_led(struct sdhci_host
*host
)
137 ctrl
= readb(host
->ioaddr
+ SDHCI_HOST_CONTROL
);
138 ctrl
|= SDHCI_CTRL_LED
;
139 writeb(ctrl
, host
->ioaddr
+ SDHCI_HOST_CONTROL
);
142 static void sdhci_deactivate_led(struct sdhci_host
*host
)
146 ctrl
= readb(host
->ioaddr
+ SDHCI_HOST_CONTROL
);
147 ctrl
&= ~SDHCI_CTRL_LED
;
148 writeb(ctrl
, host
->ioaddr
+ SDHCI_HOST_CONTROL
);
151 #ifdef CONFIG_LEDS_CLASS
152 static void sdhci_led_control(struct led_classdev
*led
,
153 enum led_brightness brightness
)
155 struct sdhci_host
*host
= container_of(led
, struct sdhci_host
, led
);
158 spin_lock_irqsave(&host
->lock
, flags
);
160 if (brightness
== LED_OFF
)
161 sdhci_deactivate_led(host
);
163 sdhci_activate_led(host
);
165 spin_unlock_irqrestore(&host
->lock
, flags
);
169 /*****************************************************************************\
173 \*****************************************************************************/
175 static inline char* sdhci_sg_to_buffer(struct sdhci_host
* host
)
177 return sg_virt(host
->cur_sg
);
180 static inline int sdhci_next_sg(struct sdhci_host
* host
)
183 * Skip to next SG entry.
191 if (host
->num_sg
> 0) {
193 host
->remain
= host
->cur_sg
->length
;
199 static void sdhci_read_block_pio(struct sdhci_host
*host
)
201 int blksize
, chunk_remain
;
206 DBG("PIO reading\n");
208 blksize
= host
->data
->blksz
;
212 buffer
= sdhci_sg_to_buffer(host
) + host
->offset
;
215 if (chunk_remain
== 0) {
216 data
= readl(host
->ioaddr
+ SDHCI_BUFFER
);
217 chunk_remain
= min(blksize
, 4);
220 size
= min(host
->remain
, chunk_remain
);
222 chunk_remain
-= size
;
224 host
->offset
+= size
;
225 host
->remain
-= size
;
228 *buffer
= data
& 0xFF;
234 if (host
->remain
== 0) {
235 if (sdhci_next_sg(host
) == 0) {
236 BUG_ON(blksize
!= 0);
239 buffer
= sdhci_sg_to_buffer(host
);
244 static void sdhci_write_block_pio(struct sdhci_host
*host
)
246 int blksize
, chunk_remain
;
251 DBG("PIO writing\n");
253 blksize
= host
->data
->blksz
;
258 buffer
= sdhci_sg_to_buffer(host
) + host
->offset
;
261 size
= min(host
->remain
, chunk_remain
);
263 chunk_remain
-= size
;
265 host
->offset
+= size
;
266 host
->remain
-= size
;
270 data
|= (u32
)*buffer
<< 24;
275 if (chunk_remain
== 0) {
276 writel(data
, host
->ioaddr
+ SDHCI_BUFFER
);
277 chunk_remain
= min(blksize
, 4);
280 if (host
->remain
== 0) {
281 if (sdhci_next_sg(host
) == 0) {
282 BUG_ON(blksize
!= 0);
285 buffer
= sdhci_sg_to_buffer(host
);
290 static void sdhci_transfer_pio(struct sdhci_host
*host
)
296 if (host
->num_sg
== 0)
299 if (host
->data
->flags
& MMC_DATA_READ
)
300 mask
= SDHCI_DATA_AVAILABLE
;
302 mask
= SDHCI_SPACE_AVAILABLE
;
304 while (readl(host
->ioaddr
+ SDHCI_PRESENT_STATE
) & mask
) {
305 if (host
->data
->flags
& MMC_DATA_READ
)
306 sdhci_read_block_pio(host
);
308 sdhci_write_block_pio(host
);
310 if (host
->num_sg
== 0)
314 DBG("PIO transfer complete.\n");
317 static u8
sdhci_calc_timeout(struct sdhci_host
*host
, struct mmc_data
*data
)
320 unsigned target_timeout
, current_timeout
;
323 * If the host controller provides us with an incorrect timeout
324 * value, just skip the check and use 0xE. The hardware may take
325 * longer to time out, but that's much better than having a too-short
328 if ((host
->quirks
& SDHCI_QUIRK_BROKEN_TIMEOUT_VAL
))
332 target_timeout
= data
->timeout_ns
/ 1000 +
333 data
->timeout_clks
/ host
->clock
;
336 * Figure out needed cycles.
337 * We do this in steps in order to fit inside a 32 bit int.
338 * The first step is the minimum timeout, which will have a
339 * minimum resolution of 6 bits:
340 * (1) 2^13*1000 > 2^22,
341 * (2) host->timeout_clk < 2^16
346 current_timeout
= (1 << 13) * 1000 / host
->timeout_clk
;
347 while (current_timeout
< target_timeout
) {
349 current_timeout
<<= 1;
355 printk(KERN_WARNING
"%s: Too large timeout requested!\n",
356 mmc_hostname(host
->mmc
));
363 static void sdhci_prepare_data(struct sdhci_host
*host
, struct mmc_data
*data
)
373 BUG_ON(data
->blksz
* data
->blocks
> 524288);
374 BUG_ON(data
->blksz
> host
->mmc
->max_blk_size
);
375 BUG_ON(data
->blocks
> 65535);
378 host
->data_early
= 0;
380 count
= sdhci_calc_timeout(host
, data
);
381 writeb(count
, host
->ioaddr
+ SDHCI_TIMEOUT_CONTROL
);
383 if (host
->flags
& SDHCI_USE_DMA
)
384 host
->flags
|= SDHCI_REQ_USE_DMA
;
386 if (unlikely((host
->flags
& SDHCI_REQ_USE_DMA
) &&
387 (host
->quirks
& SDHCI_QUIRK_32BIT_DMA_SIZE
) &&
388 ((data
->blksz
* data
->blocks
) & 0x3))) {
389 DBG("Reverting to PIO because of transfer size (%d)\n",
390 data
->blksz
* data
->blocks
);
391 host
->flags
&= ~SDHCI_REQ_USE_DMA
;
395 * The assumption here being that alignment is the same after
396 * translation to device address space.
398 if (unlikely((host
->flags
& SDHCI_REQ_USE_DMA
) &&
399 (host
->quirks
& SDHCI_QUIRK_32BIT_DMA_ADDR
) &&
400 (data
->sg
->offset
& 0x3))) {
401 DBG("Reverting to PIO because of bad alignment\n");
402 host
->flags
&= ~SDHCI_REQ_USE_DMA
;
405 if (host
->flags
& SDHCI_REQ_USE_DMA
) {
408 count
= dma_map_sg(mmc_dev(host
->mmc
), data
->sg
, data
->sg_len
,
409 (data
->flags
& MMC_DATA_READ
) ?
410 DMA_FROM_DEVICE
: DMA_TO_DEVICE
);
413 writel(sg_dma_address(data
->sg
),
414 host
->ioaddr
+ SDHCI_DMA_ADDRESS
);
416 host
->cur_sg
= data
->sg
;
417 host
->num_sg
= data
->sg_len
;
420 host
->remain
= host
->cur_sg
->length
;
423 /* We do not handle DMA boundaries, so set it to max (512 KiB) */
424 writew(SDHCI_MAKE_BLKSZ(7, data
->blksz
),
425 host
->ioaddr
+ SDHCI_BLOCK_SIZE
);
426 writew(data
->blocks
, host
->ioaddr
+ SDHCI_BLOCK_COUNT
);
429 static void sdhci_set_transfer_mode(struct sdhci_host
*host
,
430 struct mmc_data
*data
)
437 WARN_ON(!host
->data
);
439 mode
= SDHCI_TRNS_BLK_CNT_EN
;
440 if (data
->blocks
> 1)
441 mode
|= SDHCI_TRNS_MULTI
;
442 if (data
->flags
& MMC_DATA_READ
)
443 mode
|= SDHCI_TRNS_READ
;
444 if (host
->flags
& SDHCI_REQ_USE_DMA
)
445 mode
|= SDHCI_TRNS_DMA
;
447 writew(mode
, host
->ioaddr
+ SDHCI_TRANSFER_MODE
);
450 static void sdhci_finish_data(struct sdhci_host
*host
)
452 struct mmc_data
*data
;
459 if (host
->flags
& SDHCI_REQ_USE_DMA
) {
460 dma_unmap_sg(mmc_dev(host
->mmc
), data
->sg
, data
->sg_len
,
461 (data
->flags
& MMC_DATA_READ
) ?
462 DMA_FROM_DEVICE
: DMA_TO_DEVICE
);
466 * The specification states that the block count register must
467 * be updated, but it does not specify at what point in the
468 * data flow. That makes the register entirely useless to read
469 * back so we have to assume that nothing made it to the card
470 * in the event of an error.
473 data
->bytes_xfered
= 0;
475 data
->bytes_xfered
= data
->blksz
* data
->blocks
;
479 * The controller needs a reset of internal state machines
480 * upon error conditions.
483 sdhci_reset(host
, SDHCI_RESET_CMD
);
484 sdhci_reset(host
, SDHCI_RESET_DATA
);
487 sdhci_send_command(host
, data
->stop
);
489 tasklet_schedule(&host
->finish_tasklet
);
492 static void sdhci_send_command(struct sdhci_host
*host
, struct mmc_command
*cmd
)
496 unsigned long timeout
;
503 mask
= SDHCI_CMD_INHIBIT
;
504 if ((cmd
->data
!= NULL
) || (cmd
->flags
& MMC_RSP_BUSY
))
505 mask
|= SDHCI_DATA_INHIBIT
;
507 /* We shouldn't wait for data inihibit for stop commands, even
508 though they might use busy signaling */
509 if (host
->mrq
->data
&& (cmd
== host
->mrq
->data
->stop
))
510 mask
&= ~SDHCI_DATA_INHIBIT
;
512 while (readl(host
->ioaddr
+ SDHCI_PRESENT_STATE
) & mask
) {
514 printk(KERN_ERR
"%s: Controller never released "
515 "inhibit bit(s).\n", mmc_hostname(host
->mmc
));
516 sdhci_dumpregs(host
);
518 tasklet_schedule(&host
->finish_tasklet
);
525 mod_timer(&host
->timer
, jiffies
+ 10 * HZ
);
529 sdhci_prepare_data(host
, cmd
->data
);
531 writel(cmd
->arg
, host
->ioaddr
+ SDHCI_ARGUMENT
);
533 sdhci_set_transfer_mode(host
, cmd
->data
);
535 if ((cmd
->flags
& MMC_RSP_136
) && (cmd
->flags
& MMC_RSP_BUSY
)) {
536 printk(KERN_ERR
"%s: Unsupported response type!\n",
537 mmc_hostname(host
->mmc
));
538 cmd
->error
= -EINVAL
;
539 tasklet_schedule(&host
->finish_tasklet
);
543 if (!(cmd
->flags
& MMC_RSP_PRESENT
))
544 flags
= SDHCI_CMD_RESP_NONE
;
545 else if (cmd
->flags
& MMC_RSP_136
)
546 flags
= SDHCI_CMD_RESP_LONG
;
547 else if (cmd
->flags
& MMC_RSP_BUSY
)
548 flags
= SDHCI_CMD_RESP_SHORT_BUSY
;
550 flags
= SDHCI_CMD_RESP_SHORT
;
552 if (cmd
->flags
& MMC_RSP_CRC
)
553 flags
|= SDHCI_CMD_CRC
;
554 if (cmd
->flags
& MMC_RSP_OPCODE
)
555 flags
|= SDHCI_CMD_INDEX
;
557 flags
|= SDHCI_CMD_DATA
;
559 writew(SDHCI_MAKE_CMD(cmd
->opcode
, flags
),
560 host
->ioaddr
+ SDHCI_COMMAND
);
563 static void sdhci_finish_command(struct sdhci_host
*host
)
567 BUG_ON(host
->cmd
== NULL
);
569 if (host
->cmd
->flags
& MMC_RSP_PRESENT
) {
570 if (host
->cmd
->flags
& MMC_RSP_136
) {
571 /* CRC is stripped so we need to do some shifting. */
572 for (i
= 0;i
< 4;i
++) {
573 host
->cmd
->resp
[i
] = readl(host
->ioaddr
+
574 SDHCI_RESPONSE
+ (3-i
)*4) << 8;
576 host
->cmd
->resp
[i
] |=
578 SDHCI_RESPONSE
+ (3-i
)*4-1);
581 host
->cmd
->resp
[0] = readl(host
->ioaddr
+ SDHCI_RESPONSE
);
585 host
->cmd
->error
= 0;
587 if (host
->data
&& host
->data_early
)
588 sdhci_finish_data(host
);
590 if (!host
->cmd
->data
)
591 tasklet_schedule(&host
->finish_tasklet
);
596 static void sdhci_set_clock(struct sdhci_host
*host
, unsigned int clock
)
600 unsigned long timeout
;
602 if (clock
== host
->clock
)
605 writew(0, host
->ioaddr
+ SDHCI_CLOCK_CONTROL
);
610 for (div
= 1;div
< 256;div
*= 2) {
611 if ((host
->max_clk
/ div
) <= clock
)
616 clk
= div
<< SDHCI_DIVIDER_SHIFT
;
617 clk
|= SDHCI_CLOCK_INT_EN
;
618 writew(clk
, host
->ioaddr
+ SDHCI_CLOCK_CONTROL
);
622 while (!((clk
= readw(host
->ioaddr
+ SDHCI_CLOCK_CONTROL
))
623 & SDHCI_CLOCK_INT_STABLE
)) {
625 printk(KERN_ERR
"%s: Internal clock never "
626 "stabilised.\n", mmc_hostname(host
->mmc
));
627 sdhci_dumpregs(host
);
634 clk
|= SDHCI_CLOCK_CARD_EN
;
635 writew(clk
, host
->ioaddr
+ SDHCI_CLOCK_CONTROL
);
641 static void sdhci_set_power(struct sdhci_host
*host
, unsigned short power
)
645 if (host
->power
== power
)
648 if (power
== (unsigned short)-1) {
649 writeb(0, host
->ioaddr
+ SDHCI_POWER_CONTROL
);
654 * Spec says that we should clear the power reg before setting
655 * a new value. Some controllers don't seem to like this though.
657 if (!(host
->quirks
& SDHCI_QUIRK_SINGLE_POWER_WRITE
))
658 writeb(0, host
->ioaddr
+ SDHCI_POWER_CONTROL
);
660 pwr
= SDHCI_POWER_ON
;
662 switch (1 << power
) {
663 case MMC_VDD_165_195
:
664 pwr
|= SDHCI_POWER_180
;
668 pwr
|= SDHCI_POWER_300
;
672 pwr
|= SDHCI_POWER_330
;
679 * At least the CaFe chip gets confused if we set the voltage
680 * and set turn on power at the same time, so set the voltage first.
682 if ((host
->quirks
& SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER
))
683 writeb(pwr
& ~SDHCI_POWER_ON
,
684 host
->ioaddr
+ SDHCI_POWER_CONTROL
);
686 writeb(pwr
, host
->ioaddr
+ SDHCI_POWER_CONTROL
);
692 /*****************************************************************************\
696 \*****************************************************************************/
698 static void sdhci_request(struct mmc_host
*mmc
, struct mmc_request
*mrq
)
700 struct sdhci_host
*host
;
703 host
= mmc_priv(mmc
);
705 spin_lock_irqsave(&host
->lock
, flags
);
707 WARN_ON(host
->mrq
!= NULL
);
709 #ifndef CONFIG_LEDS_CLASS
710 sdhci_activate_led(host
);
715 if (!(readl(host
->ioaddr
+ SDHCI_PRESENT_STATE
) & SDHCI_CARD_PRESENT
)) {
716 host
->mrq
->cmd
->error
= -ENOMEDIUM
;
717 tasklet_schedule(&host
->finish_tasklet
);
719 sdhci_send_command(host
, mrq
->cmd
);
722 spin_unlock_irqrestore(&host
->lock
, flags
);
725 static void sdhci_set_ios(struct mmc_host
*mmc
, struct mmc_ios
*ios
)
727 struct sdhci_host
*host
;
731 host
= mmc_priv(mmc
);
733 spin_lock_irqsave(&host
->lock
, flags
);
736 * Reset the chip on each power off.
737 * Should clear out any weird states.
739 if (ios
->power_mode
== MMC_POWER_OFF
) {
740 writel(0, host
->ioaddr
+ SDHCI_SIGNAL_ENABLE
);
744 sdhci_set_clock(host
, ios
->clock
);
746 if (ios
->power_mode
== MMC_POWER_OFF
)
747 sdhci_set_power(host
, -1);
749 sdhci_set_power(host
, ios
->vdd
);
751 ctrl
= readb(host
->ioaddr
+ SDHCI_HOST_CONTROL
);
753 if (ios
->bus_width
== MMC_BUS_WIDTH_4
)
754 ctrl
|= SDHCI_CTRL_4BITBUS
;
756 ctrl
&= ~SDHCI_CTRL_4BITBUS
;
758 if (ios
->timing
== MMC_TIMING_SD_HS
)
759 ctrl
|= SDHCI_CTRL_HISPD
;
761 ctrl
&= ~SDHCI_CTRL_HISPD
;
763 writeb(ctrl
, host
->ioaddr
+ SDHCI_HOST_CONTROL
);
766 * Some (ENE) controllers go apeshit on some ios operation,
767 * signalling timeout and CRC errors even on CMD0. Resetting
768 * it on each ios seems to solve the problem.
770 if(host
->quirks
& SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS
)
771 sdhci_reset(host
, SDHCI_RESET_CMD
| SDHCI_RESET_DATA
);
774 spin_unlock_irqrestore(&host
->lock
, flags
);
777 static int sdhci_get_ro(struct mmc_host
*mmc
)
779 struct sdhci_host
*host
;
783 host
= mmc_priv(mmc
);
785 spin_lock_irqsave(&host
->lock
, flags
);
787 present
= readl(host
->ioaddr
+ SDHCI_PRESENT_STATE
);
789 spin_unlock_irqrestore(&host
->lock
, flags
);
791 return !(present
& SDHCI_WRITE_PROTECT
);
794 static void sdhci_enable_sdio_irq(struct mmc_host
*mmc
, int enable
)
796 struct sdhci_host
*host
;
800 host
= mmc_priv(mmc
);
802 spin_lock_irqsave(&host
->lock
, flags
);
804 ier
= readl(host
->ioaddr
+ SDHCI_INT_ENABLE
);
806 ier
&= ~SDHCI_INT_CARD_INT
;
808 ier
|= SDHCI_INT_CARD_INT
;
810 writel(ier
, host
->ioaddr
+ SDHCI_INT_ENABLE
);
811 writel(ier
, host
->ioaddr
+ SDHCI_SIGNAL_ENABLE
);
815 spin_unlock_irqrestore(&host
->lock
, flags
);
818 static const struct mmc_host_ops sdhci_ops
= {
819 .request
= sdhci_request
,
820 .set_ios
= sdhci_set_ios
,
821 .get_ro
= sdhci_get_ro
,
822 .enable_sdio_irq
= sdhci_enable_sdio_irq
,
825 /*****************************************************************************\
829 \*****************************************************************************/
831 static void sdhci_tasklet_card(unsigned long param
)
833 struct sdhci_host
*host
;
836 host
= (struct sdhci_host
*)param
;
838 spin_lock_irqsave(&host
->lock
, flags
);
840 if (!(readl(host
->ioaddr
+ SDHCI_PRESENT_STATE
) & SDHCI_CARD_PRESENT
)) {
842 printk(KERN_ERR
"%s: Card removed during transfer!\n",
843 mmc_hostname(host
->mmc
));
844 printk(KERN_ERR
"%s: Resetting controller.\n",
845 mmc_hostname(host
->mmc
));
847 sdhci_reset(host
, SDHCI_RESET_CMD
);
848 sdhci_reset(host
, SDHCI_RESET_DATA
);
850 host
->mrq
->cmd
->error
= -ENOMEDIUM
;
851 tasklet_schedule(&host
->finish_tasklet
);
855 spin_unlock_irqrestore(&host
->lock
, flags
);
857 mmc_detect_change(host
->mmc
, msecs_to_jiffies(500));
860 static void sdhci_tasklet_finish(unsigned long param
)
862 struct sdhci_host
*host
;
864 struct mmc_request
*mrq
;
866 host
= (struct sdhci_host
*)param
;
868 spin_lock_irqsave(&host
->lock
, flags
);
870 del_timer(&host
->timer
);
875 * The controller needs a reset of internal state machines
876 * upon error conditions.
878 if (mrq
->cmd
->error
||
879 (mrq
->data
&& (mrq
->data
->error
||
880 (mrq
->data
->stop
&& mrq
->data
->stop
->error
))) ||
881 (host
->quirks
& SDHCI_QUIRK_RESET_AFTER_REQUEST
)) {
883 /* Some controllers need this kick or reset won't work here */
884 if (host
->quirks
& SDHCI_QUIRK_CLOCK_BEFORE_RESET
) {
887 /* This is to force an update */
890 sdhci_set_clock(host
, clock
);
893 /* Spec says we should do both at the same time, but Ricoh
894 controllers do not like that. */
895 sdhci_reset(host
, SDHCI_RESET_CMD
);
896 sdhci_reset(host
, SDHCI_RESET_DATA
);
903 #ifndef CONFIG_LEDS_CLASS
904 sdhci_deactivate_led(host
);
908 spin_unlock_irqrestore(&host
->lock
, flags
);
910 mmc_request_done(host
->mmc
, mrq
);
913 static void sdhci_timeout_timer(unsigned long data
)
915 struct sdhci_host
*host
;
918 host
= (struct sdhci_host
*)data
;
920 spin_lock_irqsave(&host
->lock
, flags
);
923 printk(KERN_ERR
"%s: Timeout waiting for hardware "
924 "interrupt.\n", mmc_hostname(host
->mmc
));
925 sdhci_dumpregs(host
);
928 host
->data
->error
= -ETIMEDOUT
;
929 sdhci_finish_data(host
);
932 host
->cmd
->error
= -ETIMEDOUT
;
934 host
->mrq
->cmd
->error
= -ETIMEDOUT
;
936 tasklet_schedule(&host
->finish_tasklet
);
941 spin_unlock_irqrestore(&host
->lock
, flags
);
944 /*****************************************************************************\
946 * Interrupt handling *
948 \*****************************************************************************/
950 static void sdhci_cmd_irq(struct sdhci_host
*host
, u32 intmask
)
952 BUG_ON(intmask
== 0);
955 printk(KERN_ERR
"%s: Got command interrupt 0x%08x even "
956 "though no command operation was in progress.\n",
957 mmc_hostname(host
->mmc
), (unsigned)intmask
);
958 sdhci_dumpregs(host
);
962 if (intmask
& SDHCI_INT_TIMEOUT
)
963 host
->cmd
->error
= -ETIMEDOUT
;
964 else if (intmask
& (SDHCI_INT_CRC
| SDHCI_INT_END_BIT
|
966 host
->cmd
->error
= -EILSEQ
;
968 if (host
->cmd
->error
)
969 tasklet_schedule(&host
->finish_tasklet
);
970 else if (intmask
& SDHCI_INT_RESPONSE
)
971 sdhci_finish_command(host
);
974 static void sdhci_data_irq(struct sdhci_host
*host
, u32 intmask
)
976 BUG_ON(intmask
== 0);
980 * A data end interrupt is sent together with the response
981 * for the stop command.
983 if (intmask
& SDHCI_INT_DATA_END
)
986 printk(KERN_ERR
"%s: Got data interrupt 0x%08x even "
987 "though no data operation was in progress.\n",
988 mmc_hostname(host
->mmc
), (unsigned)intmask
);
989 sdhci_dumpregs(host
);
994 if (intmask
& SDHCI_INT_DATA_TIMEOUT
)
995 host
->data
->error
= -ETIMEDOUT
;
996 else if (intmask
& (SDHCI_INT_DATA_CRC
| SDHCI_INT_DATA_END_BIT
))
997 host
->data
->error
= -EILSEQ
;
999 if (host
->data
->error
)
1000 sdhci_finish_data(host
);
1002 if (intmask
& (SDHCI_INT_DATA_AVAIL
| SDHCI_INT_SPACE_AVAIL
))
1003 sdhci_transfer_pio(host
);
1006 * We currently don't do anything fancy with DMA
1007 * boundaries, but as we can't disable the feature
1008 * we need to at least restart the transfer.
1010 if (intmask
& SDHCI_INT_DMA_END
)
1011 writel(readl(host
->ioaddr
+ SDHCI_DMA_ADDRESS
),
1012 host
->ioaddr
+ SDHCI_DMA_ADDRESS
);
1014 if (intmask
& SDHCI_INT_DATA_END
) {
1017 * Data managed to finish before the
1018 * command completed. Make sure we do
1019 * things in the proper order.
1021 host
->data_early
= 1;
1023 sdhci_finish_data(host
);
1029 static irqreturn_t
sdhci_irq(int irq
, void *dev_id
)
1032 struct sdhci_host
* host
= dev_id
;
1036 spin_lock(&host
->lock
);
1038 intmask
= readl(host
->ioaddr
+ SDHCI_INT_STATUS
);
1040 if (!intmask
|| intmask
== 0xffffffff) {
1045 DBG("*** %s got interrupt: 0x%08x\n",
1046 mmc_hostname(host
->mmc
), intmask
);
1048 if (intmask
& (SDHCI_INT_CARD_INSERT
| SDHCI_INT_CARD_REMOVE
)) {
1049 writel(intmask
& (SDHCI_INT_CARD_INSERT
| SDHCI_INT_CARD_REMOVE
),
1050 host
->ioaddr
+ SDHCI_INT_STATUS
);
1051 tasklet_schedule(&host
->card_tasklet
);
1054 intmask
&= ~(SDHCI_INT_CARD_INSERT
| SDHCI_INT_CARD_REMOVE
);
1056 if (intmask
& SDHCI_INT_CMD_MASK
) {
1057 writel(intmask
& SDHCI_INT_CMD_MASK
,
1058 host
->ioaddr
+ SDHCI_INT_STATUS
);
1059 sdhci_cmd_irq(host
, intmask
& SDHCI_INT_CMD_MASK
);
1062 if (intmask
& SDHCI_INT_DATA_MASK
) {
1063 writel(intmask
& SDHCI_INT_DATA_MASK
,
1064 host
->ioaddr
+ SDHCI_INT_STATUS
);
1065 sdhci_data_irq(host
, intmask
& SDHCI_INT_DATA_MASK
);
1068 intmask
&= ~(SDHCI_INT_CMD_MASK
| SDHCI_INT_DATA_MASK
);
1070 intmask
&= ~SDHCI_INT_ERROR
;
1072 if (intmask
& SDHCI_INT_BUS_POWER
) {
1073 printk(KERN_ERR
"%s: Card is consuming too much power!\n",
1074 mmc_hostname(host
->mmc
));
1075 writel(SDHCI_INT_BUS_POWER
, host
->ioaddr
+ SDHCI_INT_STATUS
);
1078 intmask
&= ~SDHCI_INT_BUS_POWER
;
1080 if (intmask
& SDHCI_INT_CARD_INT
)
1083 intmask
&= ~SDHCI_INT_CARD_INT
;
1086 printk(KERN_ERR
"%s: Unexpected interrupt 0x%08x.\n",
1087 mmc_hostname(host
->mmc
), intmask
);
1088 sdhci_dumpregs(host
);
1090 writel(intmask
, host
->ioaddr
+ SDHCI_INT_STATUS
);
1093 result
= IRQ_HANDLED
;
1097 spin_unlock(&host
->lock
);
1100 * We have to delay this as it calls back into the driver.
1103 mmc_signal_sdio_irq(host
->mmc
);
1108 /*****************************************************************************\
1112 \*****************************************************************************/
1116 int sdhci_suspend_host(struct sdhci_host
*host
, pm_message_t state
)
1120 ret
= mmc_suspend_host(host
->mmc
, state
);
1124 free_irq(host
->irq
, host
);
1129 EXPORT_SYMBOL_GPL(sdhci_suspend_host
);
1131 int sdhci_resume_host(struct sdhci_host
*host
)
1135 if (host
->flags
& SDHCI_USE_DMA
) {
1136 if (host
->ops
->enable_dma
)
1137 host
->ops
->enable_dma(host
);
1140 ret
= request_irq(host
->irq
, sdhci_irq
, IRQF_SHARED
,
1141 mmc_hostname(host
->mmc
), host
);
1148 ret
= mmc_resume_host(host
->mmc
);
1155 EXPORT_SYMBOL_GPL(sdhci_resume_host
);
1157 #endif /* CONFIG_PM */
1159 /*****************************************************************************\
1161 * Device allocation/registration *
1163 \*****************************************************************************/
1165 struct sdhci_host
*sdhci_alloc_host(struct device
*dev
,
1168 struct mmc_host
*mmc
;
1169 struct sdhci_host
*host
;
1171 WARN_ON(dev
== NULL
);
1173 mmc
= mmc_alloc_host(sizeof(struct sdhci_host
) + priv_size
, dev
);
1175 return ERR_PTR(-ENOMEM
);
1177 host
= mmc_priv(mmc
);
1183 EXPORT_SYMBOL_GPL(sdhci_alloc_host
);
1185 int sdhci_add_host(struct sdhci_host
*host
)
1187 struct mmc_host
*mmc
;
1189 unsigned int version
;
1192 WARN_ON(host
== NULL
);
1199 host
->quirks
= debug_quirks
;
1201 sdhci_reset(host
, SDHCI_RESET_ALL
);
1203 version
= readw(host
->ioaddr
+ SDHCI_HOST_VERSION
);
1204 version
= (version
& SDHCI_SPEC_VER_MASK
) >> SDHCI_SPEC_VER_SHIFT
;
1206 printk(KERN_ERR
"%s: Unknown controller version (%d). "
1207 "You may experience problems.\n", mmc_hostname(mmc
),
1211 caps
= readl(host
->ioaddr
+ SDHCI_CAPABILITIES
);
1213 if (host
->quirks
& SDHCI_QUIRK_FORCE_DMA
)
1214 host
->flags
|= SDHCI_USE_DMA
;
1215 else if (!(caps
& SDHCI_CAN_DO_DMA
))
1216 DBG("Controller doesn't have DMA capability\n");
1218 host
->flags
|= SDHCI_USE_DMA
;
1220 if ((host
->quirks
& SDHCI_QUIRK_BROKEN_DMA
) &&
1221 (host
->flags
& SDHCI_USE_DMA
)) {
1222 DBG("Disabling DMA as it is marked broken\n");
1223 host
->flags
&= ~SDHCI_USE_DMA
;
1226 if (host
->flags
& SDHCI_USE_DMA
) {
1227 if (host
->ops
->enable_dma
) {
1228 if (host
->ops
->enable_dma(host
)) {
1229 printk(KERN_WARNING
"%s: No suitable DMA "
1230 "available. Falling back to PIO.\n",
1232 host
->flags
&= ~SDHCI_USE_DMA
;
1237 /* XXX: Hack to get MMC layer to avoid highmem */
1238 if (!(host
->flags
& SDHCI_USE_DMA
))
1239 mmc_dev(host
->mmc
)->dma_mask
= 0;
1242 (caps
& SDHCI_CLOCK_BASE_MASK
) >> SDHCI_CLOCK_BASE_SHIFT
;
1243 if (host
->max_clk
== 0) {
1244 printk(KERN_ERR
"%s: Hardware doesn't specify base clock "
1245 "frequency.\n", mmc_hostname(mmc
));
1248 host
->max_clk
*= 1000000;
1251 (caps
& SDHCI_TIMEOUT_CLK_MASK
) >> SDHCI_TIMEOUT_CLK_SHIFT
;
1252 if (host
->timeout_clk
== 0) {
1253 printk(KERN_ERR
"%s: Hardware doesn't specify timeout clock "
1254 "frequency.\n", mmc_hostname(mmc
));
1257 if (caps
& SDHCI_TIMEOUT_CLK_UNIT
)
1258 host
->timeout_clk
*= 1000;
1261 * Set host parameters.
1263 mmc
->ops
= &sdhci_ops
;
1264 mmc
->f_min
= host
->max_clk
/ 256;
1265 mmc
->f_max
= host
->max_clk
;
1266 mmc
->caps
= MMC_CAP_4_BIT_DATA
| MMC_CAP_SDIO_IRQ
;
1268 if (caps
& SDHCI_CAN_DO_HISPD
)
1269 mmc
->caps
|= MMC_CAP_SD_HIGHSPEED
;
1272 if (caps
& SDHCI_CAN_VDD_330
)
1273 mmc
->ocr_avail
|= MMC_VDD_32_33
|MMC_VDD_33_34
;
1274 if (caps
& SDHCI_CAN_VDD_300
)
1275 mmc
->ocr_avail
|= MMC_VDD_29_30
|MMC_VDD_30_31
;
1276 if (caps
& SDHCI_CAN_VDD_180
)
1277 mmc
->ocr_avail
|= MMC_VDD_165_195
;
1279 if (mmc
->ocr_avail
== 0) {
1280 printk(KERN_ERR
"%s: Hardware doesn't report any "
1281 "support voltages.\n", mmc_hostname(mmc
));
1285 spin_lock_init(&host
->lock
);
1288 * Maximum number of segments. Hardware cannot do scatter lists.
1290 if (host
->flags
& SDHCI_USE_DMA
)
1291 mmc
->max_hw_segs
= 1;
1293 mmc
->max_hw_segs
= 16;
1294 mmc
->max_phys_segs
= 16;
1297 * Maximum number of sectors in one transfer. Limited by DMA boundary
1300 mmc
->max_req_size
= 524288;
1303 * Maximum segment size. Could be one segment with the maximum number
1306 mmc
->max_seg_size
= mmc
->max_req_size
;
1309 * Maximum block size. This varies from controller to controller and
1310 * is specified in the capabilities register.
1312 mmc
->max_blk_size
= (caps
& SDHCI_MAX_BLOCK_MASK
) >> SDHCI_MAX_BLOCK_SHIFT
;
1313 if (mmc
->max_blk_size
>= 3) {
1314 printk(KERN_WARNING
"%s: Invalid maximum block size, "
1315 "assuming 512 bytes\n", mmc_hostname(mmc
));
1316 mmc
->max_blk_size
= 512;
1318 mmc
->max_blk_size
= 512 << mmc
->max_blk_size
;
1321 * Maximum block count.
1323 mmc
->max_blk_count
= 65535;
1328 tasklet_init(&host
->card_tasklet
,
1329 sdhci_tasklet_card
, (unsigned long)host
);
1330 tasklet_init(&host
->finish_tasklet
,
1331 sdhci_tasklet_finish
, (unsigned long)host
);
1333 setup_timer(&host
->timer
, sdhci_timeout_timer
, (unsigned long)host
);
1335 ret
= request_irq(host
->irq
, sdhci_irq
, IRQF_SHARED
,
1336 mmc_hostname(mmc
), host
);
1342 #ifdef CONFIG_MMC_DEBUG
1343 sdhci_dumpregs(host
);
1346 #ifdef CONFIG_LEDS_CLASS
1347 host
->led
.name
= mmc_hostname(mmc
);
1348 host
->led
.brightness
= LED_OFF
;
1349 host
->led
.default_trigger
= mmc_hostname(mmc
);
1350 host
->led
.brightness_set
= sdhci_led_control
;
1352 ret
= led_classdev_register(mmc_dev(mmc
), &host
->led
);
1361 printk(KERN_INFO
"%s: SDHCI controller on %s [%s] using %s\n",
1362 mmc_hostname(mmc
), host
->hw_name
, mmc_dev(mmc
)->bus_id
,
1363 (host
->flags
& SDHCI_USE_DMA
)?"DMA":"PIO");
1367 #ifdef CONFIG_LEDS_CLASS
1369 sdhci_reset(host
, SDHCI_RESET_ALL
);
1370 free_irq(host
->irq
, host
);
1373 tasklet_kill(&host
->card_tasklet
);
1374 tasklet_kill(&host
->finish_tasklet
);
1379 EXPORT_SYMBOL_GPL(sdhci_add_host
);
1381 void sdhci_remove_host(struct sdhci_host
*host
)
1383 mmc_remove_host(host
->mmc
);
1385 #ifdef CONFIG_LEDS_CLASS
1386 led_classdev_unregister(&host
->led
);
1389 sdhci_reset(host
, SDHCI_RESET_ALL
);
1391 free_irq(host
->irq
, host
);
1393 del_timer_sync(&host
->timer
);
1395 tasklet_kill(&host
->card_tasklet
);
1396 tasklet_kill(&host
->finish_tasklet
);
1399 EXPORT_SYMBOL_GPL(sdhci_remove_host
);
1401 void sdhci_free_host(struct sdhci_host
*host
)
1403 mmc_free_host(host
->mmc
);
1406 EXPORT_SYMBOL_GPL(sdhci_free_host
);
1408 /*****************************************************************************\
1410 * Driver init/exit *
1412 \*****************************************************************************/
1414 static int __init
sdhci_drv_init(void)
1416 printk(KERN_INFO DRIVER_NAME
1417 ": Secure Digital Host Controller Interface driver\n");
1418 printk(KERN_INFO DRIVER_NAME
": Copyright(c) Pierre Ossman\n");
1423 static void __exit
sdhci_drv_exit(void)
1427 module_init(sdhci_drv_init
);
1428 module_exit(sdhci_drv_exit
);
1430 module_param(debug_quirks
, uint
, 0444);
1432 MODULE_AUTHOR("Pierre Ossman <drzeus@drzeus.cx>");
1433 MODULE_DESCRIPTION("Secure Digital Host Controller Interface core driver");
1434 MODULE_LICENSE("GPL");
1436 MODULE_PARM_DESC(debug_quirks
, "Force certain quirks.");