]> git.proxmox.com Git - mirror_ubuntu-artful-kernel.git/blob - drivers/mmc/host/tmio_mmc_core.c
scsi: cxgb4i: call neigh_event_send() to update MAC address
[mirror_ubuntu-artful-kernel.git] / drivers / mmc / host / tmio_mmc_core.c
1 /*
2 * Driver for the MMC / SD / SDIO IP found in:
3 *
4 * TC6393XB, TC6391XB, TC6387XB, T7L66XB, ASIC3, SH-Mobile SoCs
5 *
6 * Copyright (C) 2015-17 Renesas Electronics Corporation
7 * Copyright (C) 2016-17 Sang Engineering, Wolfram Sang
8 * Copyright (C) 2017 Horms Solutions, Simon Horman
9 * Copyright (C) 2011 Guennadi Liakhovetski
10 * Copyright (C) 2007 Ian Molton
11 * Copyright (C) 2004 Ian Molton
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
16 *
17 * This driver draws mainly on scattered spec sheets, Reverse engineering
18 * of the toshiba e800 SD driver and some parts of the 2.4 ASIC3 driver (4 bit
19 * support). (Further 4 bit support from a later datasheet).
20 *
21 * TODO:
22 * Investigate using a workqueue for PIO transfers
23 * Eliminate FIXMEs
24 * Better Power management
25 * Handle MMC errors better
26 * double buffer support
27 *
28 */
29
30 #include <linux/delay.h>
31 #include <linux/device.h>
32 #include <linux/highmem.h>
33 #include <linux/interrupt.h>
34 #include <linux/io.h>
35 #include <linux/irq.h>
36 #include <linux/mfd/tmio.h>
37 #include <linux/mmc/card.h>
38 #include <linux/mmc/host.h>
39 #include <linux/mmc/mmc.h>
40 #include <linux/mmc/slot-gpio.h>
41 #include <linux/module.h>
42 #include <linux/pagemap.h>
43 #include <linux/platform_device.h>
44 #include <linux/pm_qos.h>
45 #include <linux/pm_runtime.h>
46 #include <linux/regulator/consumer.h>
47 #include <linux/mmc/sdio.h>
48 #include <linux/scatterlist.h>
49 #include <linux/spinlock.h>
50 #include <linux/workqueue.h>
51
52 #include "tmio_mmc.h"
53
54 static inline void tmio_mmc_start_dma(struct tmio_mmc_host *host,
55 struct mmc_data *data)
56 {
57 if (host->dma_ops)
58 host->dma_ops->start(host, data);
59 }
60
61 static inline void tmio_mmc_enable_dma(struct tmio_mmc_host *host, bool enable)
62 {
63 if (host->dma_ops)
64 host->dma_ops->enable(host, enable);
65 }
66
67 static inline void tmio_mmc_request_dma(struct tmio_mmc_host *host,
68 struct tmio_mmc_data *pdata)
69 {
70 if (host->dma_ops) {
71 host->dma_ops->request(host, pdata);
72 } else {
73 host->chan_tx = NULL;
74 host->chan_rx = NULL;
75 }
76 }
77
78 static inline void tmio_mmc_release_dma(struct tmio_mmc_host *host)
79 {
80 if (host->dma_ops)
81 host->dma_ops->release(host);
82 }
83
84 static inline void tmio_mmc_abort_dma(struct tmio_mmc_host *host)
85 {
86 if (host->dma_ops)
87 host->dma_ops->abort(host);
88 }
89
90 void tmio_mmc_enable_mmc_irqs(struct tmio_mmc_host *host, u32 i)
91 {
92 host->sdcard_irq_mask &= ~(i & TMIO_MASK_IRQ);
93 sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask);
94 }
95 EXPORT_SYMBOL_GPL(tmio_mmc_enable_mmc_irqs);
96
97 void tmio_mmc_disable_mmc_irqs(struct tmio_mmc_host *host, u32 i)
98 {
99 host->sdcard_irq_mask |= (i & TMIO_MASK_IRQ);
100 sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask);
101 }
102 EXPORT_SYMBOL_GPL(tmio_mmc_disable_mmc_irqs);
103
104 static void tmio_mmc_ack_mmc_irqs(struct tmio_mmc_host *host, u32 i)
105 {
106 sd_ctrl_write32_as_16_and_16(host, CTL_STATUS, ~i);
107 }
108
109 static void tmio_mmc_init_sg(struct tmio_mmc_host *host, struct mmc_data *data)
110 {
111 host->sg_len = data->sg_len;
112 host->sg_ptr = data->sg;
113 host->sg_orig = data->sg;
114 host->sg_off = 0;
115 }
116
117 static int tmio_mmc_next_sg(struct tmio_mmc_host *host)
118 {
119 host->sg_ptr = sg_next(host->sg_ptr);
120 host->sg_off = 0;
121 return --host->sg_len;
122 }
123
124 #define CMDREQ_TIMEOUT 5000
125
126 #ifdef CONFIG_MMC_DEBUG
127
128 #define STATUS_TO_TEXT(a, status, i) \
129 do { \
130 if ((status) & TMIO_STAT_##a) { \
131 if ((i)++) \
132 printk(KERN_DEBUG " | "); \
133 printk(KERN_DEBUG #a); \
134 } \
135 } while (0)
136
137 static void pr_debug_status(u32 status)
138 {
139 int i = 0;
140
141 pr_debug("status: %08x = ", status);
142 STATUS_TO_TEXT(CARD_REMOVE, status, i);
143 STATUS_TO_TEXT(CARD_INSERT, status, i);
144 STATUS_TO_TEXT(SIGSTATE, status, i);
145 STATUS_TO_TEXT(WRPROTECT, status, i);
146 STATUS_TO_TEXT(CARD_REMOVE_A, status, i);
147 STATUS_TO_TEXT(CARD_INSERT_A, status, i);
148 STATUS_TO_TEXT(SIGSTATE_A, status, i);
149 STATUS_TO_TEXT(CMD_IDX_ERR, status, i);
150 STATUS_TO_TEXT(STOPBIT_ERR, status, i);
151 STATUS_TO_TEXT(ILL_FUNC, status, i);
152 STATUS_TO_TEXT(CMD_BUSY, status, i);
153 STATUS_TO_TEXT(CMDRESPEND, status, i);
154 STATUS_TO_TEXT(DATAEND, status, i);
155 STATUS_TO_TEXT(CRCFAIL, status, i);
156 STATUS_TO_TEXT(DATATIMEOUT, status, i);
157 STATUS_TO_TEXT(CMDTIMEOUT, status, i);
158 STATUS_TO_TEXT(RXOVERFLOW, status, i);
159 STATUS_TO_TEXT(TXUNDERRUN, status, i);
160 STATUS_TO_TEXT(RXRDY, status, i);
161 STATUS_TO_TEXT(TXRQ, status, i);
162 STATUS_TO_TEXT(ILL_ACCESS, status, i);
163 printk("\n");
164 }
165
166 #else
167 #define pr_debug_status(s) do { } while (0)
168 #endif
169
170 static void tmio_mmc_enable_sdio_irq(struct mmc_host *mmc, int enable)
171 {
172 struct tmio_mmc_host *host = mmc_priv(mmc);
173
174 if (enable && !host->sdio_irq_enabled) {
175 u16 sdio_status;
176
177 /* Keep device active while SDIO irq is enabled */
178 pm_runtime_get_sync(mmc_dev(mmc));
179
180 host->sdio_irq_enabled = true;
181 host->sdio_irq_mask = TMIO_SDIO_MASK_ALL & ~TMIO_SDIO_STAT_IOIRQ;
182
183 /* Clear obsolete interrupts before enabling */
184 sdio_status = sd_ctrl_read16(host, CTL_SDIO_STATUS) & ~TMIO_SDIO_MASK_ALL;
185 if (host->pdata->flags & TMIO_MMC_SDIO_STATUS_SETBITS)
186 sdio_status |= TMIO_SDIO_SETBITS_MASK;
187 sd_ctrl_write16(host, CTL_SDIO_STATUS, sdio_status);
188
189 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
190 } else if (!enable && host->sdio_irq_enabled) {
191 host->sdio_irq_mask = TMIO_SDIO_MASK_ALL;
192 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
193
194 host->sdio_irq_enabled = false;
195 pm_runtime_mark_last_busy(mmc_dev(mmc));
196 pm_runtime_put_autosuspend(mmc_dev(mmc));
197 }
198 }
199
200 static void tmio_mmc_clk_start(struct tmio_mmc_host *host)
201 {
202 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, CLK_CTL_SCLKEN |
203 sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
204 msleep(host->pdata->flags & TMIO_MMC_MIN_RCAR2 ? 1 : 10);
205
206 if (host->pdata->flags & TMIO_MMC_HAVE_HIGH_REG) {
207 sd_ctrl_write16(host, CTL_CLK_AND_WAIT_CTL, 0x0100);
208 msleep(10);
209 }
210 }
211
212 static void tmio_mmc_clk_stop(struct tmio_mmc_host *host)
213 {
214 if (host->pdata->flags & TMIO_MMC_HAVE_HIGH_REG) {
215 sd_ctrl_write16(host, CTL_CLK_AND_WAIT_CTL, 0x0000);
216 msleep(10);
217 }
218
219 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, ~CLK_CTL_SCLKEN &
220 sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
221 msleep(host->pdata->flags & TMIO_MMC_MIN_RCAR2 ? 5 : 10);
222 }
223
224 static void tmio_mmc_set_clock(struct tmio_mmc_host *host,
225 unsigned int new_clock)
226 {
227 u32 clk = 0, clock;
228
229 if (new_clock == 0) {
230 tmio_mmc_clk_stop(host);
231 return;
232 }
233
234 if (host->clk_update)
235 clock = host->clk_update(host, new_clock) / 512;
236 else
237 clock = host->mmc->f_min;
238
239 for (clk = 0x80000080; new_clock >= (clock << 1); clk >>= 1)
240 clock <<= 1;
241
242 /* 1/1 clock is option */
243 if ((host->pdata->flags & TMIO_MMC_CLK_ACTUAL) && ((clk >> 22) & 0x1))
244 clk |= 0xff;
245
246 if (host->set_clk_div)
247 host->set_clk_div(host->pdev, (clk >> 22) & 1);
248
249 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, ~CLK_CTL_SCLKEN &
250 sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
251 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, clk & CLK_CTL_DIV_MASK);
252 if (!(host->pdata->flags & TMIO_MMC_MIN_RCAR2))
253 msleep(10);
254
255 tmio_mmc_clk_start(host);
256 }
257
258 static void tmio_mmc_reset(struct tmio_mmc_host *host)
259 {
260 /* FIXME - should we set stop clock reg here */
261 sd_ctrl_write16(host, CTL_RESET_SD, 0x0000);
262 if (host->pdata->flags & TMIO_MMC_HAVE_HIGH_REG)
263 sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0000);
264 msleep(10);
265 sd_ctrl_write16(host, CTL_RESET_SD, 0x0001);
266 if (host->pdata->flags & TMIO_MMC_HAVE_HIGH_REG)
267 sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0001);
268 msleep(10);
269
270 if (host->pdata->flags & TMIO_MMC_SDIO_IRQ) {
271 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
272 sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0001);
273 }
274
275 }
276
277 static void tmio_mmc_reset_work(struct work_struct *work)
278 {
279 struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host,
280 delayed_reset_work.work);
281 struct mmc_request *mrq;
282 unsigned long flags;
283
284 spin_lock_irqsave(&host->lock, flags);
285 mrq = host->mrq;
286
287 /*
288 * is request already finished? Since we use a non-blocking
289 * cancel_delayed_work(), it can happen, that a .set_ios() call preempts
290 * us, so, have to check for IS_ERR(host->mrq)
291 */
292 if (IS_ERR_OR_NULL(mrq) ||
293 time_is_after_jiffies(host->last_req_ts +
294 msecs_to_jiffies(CMDREQ_TIMEOUT))) {
295 spin_unlock_irqrestore(&host->lock, flags);
296 return;
297 }
298
299 dev_warn(&host->pdev->dev,
300 "timeout waiting for hardware interrupt (CMD%u)\n",
301 mrq->cmd->opcode);
302
303 if (host->data)
304 host->data->error = -ETIMEDOUT;
305 else if (host->cmd)
306 host->cmd->error = -ETIMEDOUT;
307 else
308 mrq->cmd->error = -ETIMEDOUT;
309
310 host->cmd = NULL;
311 host->data = NULL;
312 host->force_pio = false;
313
314 spin_unlock_irqrestore(&host->lock, flags);
315
316 tmio_mmc_reset(host);
317
318 /* Ready for new calls */
319 host->mrq = NULL;
320
321 tmio_mmc_abort_dma(host);
322 mmc_request_done(host->mmc, mrq);
323 }
324
325 /* These are the bitmasks the tmio chip requires to implement the MMC response
326 * types. Note that R1 and R6 are the same in this scheme. */
327 #define APP_CMD 0x0040
328 #define RESP_NONE 0x0300
329 #define RESP_R1 0x0400
330 #define RESP_R1B 0x0500
331 #define RESP_R2 0x0600
332 #define RESP_R3 0x0700
333 #define DATA_PRESENT 0x0800
334 #define TRANSFER_READ 0x1000
335 #define TRANSFER_MULTI 0x2000
336 #define SECURITY_CMD 0x4000
337 #define NO_CMD12_ISSUE 0x4000 /* TMIO_MMC_HAVE_CMD12_CTRL */
338
339 static int tmio_mmc_start_command(struct tmio_mmc_host *host,
340 struct mmc_command *cmd)
341 {
342 struct mmc_data *data = host->data;
343 int c = cmd->opcode;
344 u32 irq_mask = TMIO_MASK_CMD;
345
346 /* CMD12 is handled by hardware */
347 if (cmd->opcode == MMC_STOP_TRANSMISSION && !cmd->arg) {
348 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, TMIO_STOP_STP);
349 return 0;
350 }
351
352 switch (mmc_resp_type(cmd)) {
353 case MMC_RSP_NONE: c |= RESP_NONE; break;
354 case MMC_RSP_R1:
355 case MMC_RSP_R1_NO_CRC:
356 c |= RESP_R1; break;
357 case MMC_RSP_R1B: c |= RESP_R1B; break;
358 case MMC_RSP_R2: c |= RESP_R2; break;
359 case MMC_RSP_R3: c |= RESP_R3; break;
360 default:
361 pr_debug("Unknown response type %d\n", mmc_resp_type(cmd));
362 return -EINVAL;
363 }
364
365 host->cmd = cmd;
366
367 /* FIXME - this seems to be ok commented out but the spec suggest this bit
368 * should be set when issuing app commands.
369 * if(cmd->flags & MMC_FLAG_ACMD)
370 * c |= APP_CMD;
371 */
372 if (data) {
373 c |= DATA_PRESENT;
374 if (data->blocks > 1) {
375 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, TMIO_STOP_SEC);
376 c |= TRANSFER_MULTI;
377
378 /*
379 * Disable auto CMD12 at IO_RW_EXTENDED and
380 * SET_BLOCK_COUNT when doing multiple block transfer
381 */
382 if ((host->pdata->flags & TMIO_MMC_HAVE_CMD12_CTRL) &&
383 (cmd->opcode == SD_IO_RW_EXTENDED || host->mrq->sbc))
384 c |= NO_CMD12_ISSUE;
385 }
386 if (data->flags & MMC_DATA_READ)
387 c |= TRANSFER_READ;
388 }
389
390 if (!host->native_hotplug)
391 irq_mask &= ~(TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT);
392 tmio_mmc_enable_mmc_irqs(host, irq_mask);
393
394 /* Fire off the command */
395 sd_ctrl_write32_as_16_and_16(host, CTL_ARG_REG, cmd->arg);
396 sd_ctrl_write16(host, CTL_SD_CMD, c);
397
398 return 0;
399 }
400
401 static void tmio_mmc_transfer_data(struct tmio_mmc_host *host,
402 unsigned short *buf,
403 unsigned int count)
404 {
405 int is_read = host->data->flags & MMC_DATA_READ;
406 u8 *buf8;
407
408 /*
409 * Transfer the data
410 */
411 if (host->pdata->flags & TMIO_MMC_32BIT_DATA_PORT) {
412 u8 data[4] = { };
413
414 if (is_read)
415 sd_ctrl_read32_rep(host, CTL_SD_DATA_PORT, (u32 *)buf,
416 count >> 2);
417 else
418 sd_ctrl_write32_rep(host, CTL_SD_DATA_PORT, (u32 *)buf,
419 count >> 2);
420
421 /* if count was multiple of 4 */
422 if (!(count & 0x3))
423 return;
424
425 buf8 = (u8 *)(buf + (count >> 2));
426 count %= 4;
427
428 if (is_read) {
429 sd_ctrl_read32_rep(host, CTL_SD_DATA_PORT,
430 (u32 *)data, 1);
431 memcpy(buf8, data, count);
432 } else {
433 memcpy(data, buf8, count);
434 sd_ctrl_write32_rep(host, CTL_SD_DATA_PORT,
435 (u32 *)data, 1);
436 }
437
438 return;
439 }
440
441 if (is_read)
442 sd_ctrl_read16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
443 else
444 sd_ctrl_write16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
445
446 /* if count was even number */
447 if (!(count & 0x1))
448 return;
449
450 /* if count was odd number */
451 buf8 = (u8 *)(buf + (count >> 1));
452
453 /*
454 * FIXME
455 *
456 * driver and this function are assuming that
457 * it is used as little endian
458 */
459 if (is_read)
460 *buf8 = sd_ctrl_read16(host, CTL_SD_DATA_PORT) & 0xff;
461 else
462 sd_ctrl_write16(host, CTL_SD_DATA_PORT, *buf8);
463 }
464
465 /*
466 * This chip always returns (at least?) as much data as you ask for.
467 * I'm unsure what happens if you ask for less than a block. This should be
468 * looked into to ensure that a funny length read doesn't hose the controller.
469 */
470 static void tmio_mmc_pio_irq(struct tmio_mmc_host *host)
471 {
472 struct mmc_data *data = host->data;
473 void *sg_virt;
474 unsigned short *buf;
475 unsigned int count;
476 unsigned long flags;
477
478 if ((host->chan_tx || host->chan_rx) && !host->force_pio) {
479 pr_err("PIO IRQ in DMA mode!\n");
480 return;
481 } else if (!data) {
482 pr_debug("Spurious PIO IRQ\n");
483 return;
484 }
485
486 sg_virt = tmio_mmc_kmap_atomic(host->sg_ptr, &flags);
487 buf = (unsigned short *)(sg_virt + host->sg_off);
488
489 count = host->sg_ptr->length - host->sg_off;
490 if (count > data->blksz)
491 count = data->blksz;
492
493 pr_debug("count: %08x offset: %08x flags %08x\n",
494 count, host->sg_off, data->flags);
495
496 /* Transfer the data */
497 tmio_mmc_transfer_data(host, buf, count);
498
499 host->sg_off += count;
500
501 tmio_mmc_kunmap_atomic(host->sg_ptr, &flags, sg_virt);
502
503 if (host->sg_off == host->sg_ptr->length)
504 tmio_mmc_next_sg(host);
505 }
506
507 static void tmio_mmc_check_bounce_buffer(struct tmio_mmc_host *host)
508 {
509 if (host->sg_ptr == &host->bounce_sg) {
510 unsigned long flags;
511 void *sg_vaddr = tmio_mmc_kmap_atomic(host->sg_orig, &flags);
512
513 memcpy(sg_vaddr, host->bounce_buf, host->bounce_sg.length);
514 tmio_mmc_kunmap_atomic(host->sg_orig, &flags, sg_vaddr);
515 }
516 }
517
518 /* needs to be called with host->lock held */
519 void tmio_mmc_do_data_irq(struct tmio_mmc_host *host)
520 {
521 struct mmc_data *data = host->data;
522 struct mmc_command *stop;
523
524 host->data = NULL;
525
526 if (!data) {
527 dev_warn(&host->pdev->dev, "Spurious data end IRQ\n");
528 return;
529 }
530 stop = data->stop;
531
532 /* FIXME - return correct transfer count on errors */
533 if (!data->error)
534 data->bytes_xfered = data->blocks * data->blksz;
535 else
536 data->bytes_xfered = 0;
537
538 pr_debug("Completed data request\n");
539
540 /*
541 * FIXME: other drivers allow an optional stop command of any given type
542 * which we dont do, as the chip can auto generate them.
543 * Perhaps we can be smarter about when to use auto CMD12 and
544 * only issue the auto request when we know this is the desired
545 * stop command, allowing fallback to the stop command the
546 * upper layers expect. For now, we do what works.
547 */
548
549 if (data->flags & MMC_DATA_READ) {
550 if (host->chan_rx && !host->force_pio)
551 tmio_mmc_check_bounce_buffer(host);
552 dev_dbg(&host->pdev->dev, "Complete Rx request %p\n",
553 host->mrq);
554 } else {
555 dev_dbg(&host->pdev->dev, "Complete Tx request %p\n",
556 host->mrq);
557 }
558
559 if (stop && !host->mrq->sbc) {
560 if (stop->opcode != MMC_STOP_TRANSMISSION || stop->arg)
561 dev_err(&host->pdev->dev, "unsupported stop: CMD%u,0x%x. We did CMD12,0\n",
562 stop->opcode, stop->arg);
563
564 /* fill in response from auto CMD12 */
565 stop->resp[0] = sd_ctrl_read16_and_16_as_32(host, CTL_RESPONSE);
566
567 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0);
568 }
569
570 schedule_work(&host->done);
571 }
572 EXPORT_SYMBOL_GPL(tmio_mmc_do_data_irq);
573
574 static void tmio_mmc_data_irq(struct tmio_mmc_host *host, unsigned int stat)
575 {
576 struct mmc_data *data;
577
578 spin_lock(&host->lock);
579 data = host->data;
580
581 if (!data)
582 goto out;
583
584 if (stat & TMIO_STAT_CRCFAIL || stat & TMIO_STAT_STOPBIT_ERR ||
585 stat & TMIO_STAT_TXUNDERRUN)
586 data->error = -EILSEQ;
587 if (host->chan_tx && (data->flags & MMC_DATA_WRITE) && !host->force_pio) {
588 u32 status = sd_ctrl_read16_and_16_as_32(host, CTL_STATUS);
589 bool done = false;
590
591 /*
592 * Has all data been written out yet? Testing on SuperH showed,
593 * that in most cases the first interrupt comes already with the
594 * BUSY status bit clear, but on some operations, like mount or
595 * in the beginning of a write / sync / umount, there is one
596 * DATAEND interrupt with the BUSY bit set, in this cases
597 * waiting for one more interrupt fixes the problem.
598 */
599 if (host->pdata->flags & TMIO_MMC_HAS_IDLE_WAIT) {
600 if (status & TMIO_STAT_SCLKDIVEN)
601 done = true;
602 } else {
603 if (!(status & TMIO_STAT_CMD_BUSY))
604 done = true;
605 }
606
607 if (done) {
608 tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND);
609 complete(&host->dma_dataend);
610 }
611 } else if (host->chan_rx && (data->flags & MMC_DATA_READ) && !host->force_pio) {
612 tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND);
613 complete(&host->dma_dataend);
614 } else {
615 tmio_mmc_do_data_irq(host);
616 tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_READOP | TMIO_MASK_WRITEOP);
617 }
618 out:
619 spin_unlock(&host->lock);
620 }
621
622 static void tmio_mmc_cmd_irq(struct tmio_mmc_host *host, unsigned int stat)
623 {
624 struct mmc_command *cmd = host->cmd;
625 int i, addr;
626
627 spin_lock(&host->lock);
628
629 if (!host->cmd) {
630 pr_debug("Spurious CMD irq\n");
631 goto out;
632 }
633
634 /* This controller is sicker than the PXA one. Not only do we need to
635 * drop the top 8 bits of the first response word, we also need to
636 * modify the order of the response for short response command types.
637 */
638
639 for (i = 3, addr = CTL_RESPONSE ; i >= 0 ; i--, addr += 4)
640 cmd->resp[i] = sd_ctrl_read16_and_16_as_32(host, addr);
641
642 if (cmd->flags & MMC_RSP_136) {
643 cmd->resp[0] = (cmd->resp[0] << 8) | (cmd->resp[1] >> 24);
644 cmd->resp[1] = (cmd->resp[1] << 8) | (cmd->resp[2] >> 24);
645 cmd->resp[2] = (cmd->resp[2] << 8) | (cmd->resp[3] >> 24);
646 cmd->resp[3] <<= 8;
647 } else if (cmd->flags & MMC_RSP_R3) {
648 cmd->resp[0] = cmd->resp[3];
649 }
650
651 if (stat & TMIO_STAT_CMDTIMEOUT)
652 cmd->error = -ETIMEDOUT;
653 else if ((stat & TMIO_STAT_CRCFAIL && cmd->flags & MMC_RSP_CRC) ||
654 stat & TMIO_STAT_STOPBIT_ERR ||
655 stat & TMIO_STAT_CMD_IDX_ERR)
656 cmd->error = -EILSEQ;
657
658 /* If there is data to handle we enable data IRQs here, and
659 * we will ultimatley finish the request in the data_end handler.
660 * If theres no data or we encountered an error, finish now.
661 */
662 if (host->data && (!cmd->error || cmd->error == -EILSEQ)) {
663 if (host->data->flags & MMC_DATA_READ) {
664 if (host->force_pio || !host->chan_rx)
665 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_READOP);
666 else
667 tasklet_schedule(&host->dma_issue);
668 } else {
669 if (host->force_pio || !host->chan_tx)
670 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_WRITEOP);
671 else
672 tasklet_schedule(&host->dma_issue);
673 }
674 } else {
675 schedule_work(&host->done);
676 }
677
678 out:
679 spin_unlock(&host->lock);
680 }
681
682 static bool __tmio_mmc_card_detect_irq(struct tmio_mmc_host *host,
683 int ireg, int status)
684 {
685 struct mmc_host *mmc = host->mmc;
686
687 /* Card insert / remove attempts */
688 if (ireg & (TMIO_STAT_CARD_INSERT | TMIO_STAT_CARD_REMOVE)) {
689 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_CARD_INSERT |
690 TMIO_STAT_CARD_REMOVE);
691 if ((((ireg & TMIO_STAT_CARD_REMOVE) && mmc->card) ||
692 ((ireg & TMIO_STAT_CARD_INSERT) && !mmc->card)) &&
693 !work_pending(&mmc->detect.work))
694 mmc_detect_change(host->mmc, msecs_to_jiffies(100));
695 return true;
696 }
697
698 return false;
699 }
700
701 static bool __tmio_mmc_sdcard_irq(struct tmio_mmc_host *host, int ireg,
702 int status)
703 {
704 /* Command completion */
705 if (ireg & (TMIO_STAT_CMDRESPEND | TMIO_STAT_CMDTIMEOUT)) {
706 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_CMDRESPEND |
707 TMIO_STAT_CMDTIMEOUT);
708 tmio_mmc_cmd_irq(host, status);
709 return true;
710 }
711
712 /* Data transfer */
713 if (ireg & (TMIO_STAT_RXRDY | TMIO_STAT_TXRQ)) {
714 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_RXRDY | TMIO_STAT_TXRQ);
715 tmio_mmc_pio_irq(host);
716 return true;
717 }
718
719 /* Data transfer completion */
720 if (ireg & TMIO_STAT_DATAEND) {
721 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_DATAEND);
722 tmio_mmc_data_irq(host, status);
723 return true;
724 }
725
726 return false;
727 }
728
729 static void __tmio_mmc_sdio_irq(struct tmio_mmc_host *host)
730 {
731 struct mmc_host *mmc = host->mmc;
732 struct tmio_mmc_data *pdata = host->pdata;
733 unsigned int ireg, status;
734 unsigned int sdio_status;
735
736 if (!(pdata->flags & TMIO_MMC_SDIO_IRQ))
737 return;
738
739 status = sd_ctrl_read16(host, CTL_SDIO_STATUS);
740 ireg = status & TMIO_SDIO_MASK_ALL & ~host->sdio_irq_mask;
741
742 sdio_status = status & ~TMIO_SDIO_MASK_ALL;
743 if (pdata->flags & TMIO_MMC_SDIO_STATUS_SETBITS)
744 sdio_status |= TMIO_SDIO_SETBITS_MASK;
745
746 sd_ctrl_write16(host, CTL_SDIO_STATUS, sdio_status);
747
748 if (mmc->caps & MMC_CAP_SDIO_IRQ && ireg & TMIO_SDIO_STAT_IOIRQ)
749 mmc_signal_sdio_irq(mmc);
750 }
751
752 irqreturn_t tmio_mmc_irq(int irq, void *devid)
753 {
754 struct tmio_mmc_host *host = devid;
755 unsigned int ireg, status;
756
757 status = sd_ctrl_read16_and_16_as_32(host, CTL_STATUS);
758 ireg = status & TMIO_MASK_IRQ & ~host->sdcard_irq_mask;
759
760 pr_debug_status(status);
761 pr_debug_status(ireg);
762
763 /* Clear the status except the interrupt status */
764 sd_ctrl_write32_as_16_and_16(host, CTL_STATUS, TMIO_MASK_IRQ);
765
766 if (__tmio_mmc_card_detect_irq(host, ireg, status))
767 return IRQ_HANDLED;
768 if (__tmio_mmc_sdcard_irq(host, ireg, status))
769 return IRQ_HANDLED;
770
771 __tmio_mmc_sdio_irq(host);
772
773 return IRQ_HANDLED;
774 }
775 EXPORT_SYMBOL_GPL(tmio_mmc_irq);
776
777 static int tmio_mmc_start_data(struct tmio_mmc_host *host,
778 struct mmc_data *data)
779 {
780 struct tmio_mmc_data *pdata = host->pdata;
781
782 pr_debug("setup data transfer: blocksize %08x nr_blocks %d\n",
783 data->blksz, data->blocks);
784
785 /* Some hardware cannot perform 2 byte requests in 4/8 bit mode */
786 if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_4 ||
787 host->mmc->ios.bus_width == MMC_BUS_WIDTH_8) {
788 int blksz_2bytes = pdata->flags & TMIO_MMC_BLKSZ_2BYTES;
789
790 if (data->blksz < 2 || (data->blksz < 4 && !blksz_2bytes)) {
791 pr_err("%s: %d byte block unsupported in 4/8 bit mode\n",
792 mmc_hostname(host->mmc), data->blksz);
793 return -EINVAL;
794 }
795 }
796
797 tmio_mmc_init_sg(host, data);
798 host->data = data;
799
800 /* Set transfer length / blocksize */
801 sd_ctrl_write16(host, CTL_SD_XFER_LEN, data->blksz);
802 sd_ctrl_write16(host, CTL_XFER_BLK_COUNT, data->blocks);
803
804 tmio_mmc_start_dma(host, data);
805
806 return 0;
807 }
808
809 static void tmio_mmc_hw_reset(struct mmc_host *mmc)
810 {
811 struct tmio_mmc_host *host = mmc_priv(mmc);
812
813 if (host->hw_reset)
814 host->hw_reset(host);
815 }
816
817 static int tmio_mmc_execute_tuning(struct mmc_host *mmc, u32 opcode)
818 {
819 struct tmio_mmc_host *host = mmc_priv(mmc);
820 int i, ret = 0;
821
822 if (!host->init_tuning || !host->select_tuning)
823 /* Tuning is not supported */
824 goto out;
825
826 host->tap_num = host->init_tuning(host);
827 if (!host->tap_num)
828 /* Tuning is not supported */
829 goto out;
830
831 if (host->tap_num * 2 >= sizeof(host->taps) * BITS_PER_BYTE) {
832 dev_warn_once(&host->pdev->dev,
833 "Too many taps, skipping tuning. Please consider updating size of taps field of tmio_mmc_host\n");
834 goto out;
835 }
836
837 bitmap_zero(host->taps, host->tap_num * 2);
838
839 /* Issue CMD19 twice for each tap */
840 for (i = 0; i < 2 * host->tap_num; i++) {
841 if (host->prepare_tuning)
842 host->prepare_tuning(host, i % host->tap_num);
843
844 ret = mmc_send_tuning(mmc, opcode, NULL);
845 if (ret && ret != -EILSEQ)
846 goto out;
847 if (ret == 0)
848 set_bit(i, host->taps);
849
850 mdelay(1);
851 }
852
853 ret = host->select_tuning(host);
854
855 out:
856 if (ret < 0) {
857 dev_warn(&host->pdev->dev, "Tuning procedure failed\n");
858 tmio_mmc_hw_reset(mmc);
859 }
860
861 return ret;
862 }
863
864 static void tmio_process_mrq(struct tmio_mmc_host *host,
865 struct mmc_request *mrq)
866 {
867 struct mmc_command *cmd;
868 int ret;
869
870 if (mrq->sbc && host->cmd != mrq->sbc) {
871 cmd = mrq->sbc;
872 } else {
873 cmd = mrq->cmd;
874 if (mrq->data) {
875 ret = tmio_mmc_start_data(host, mrq->data);
876 if (ret)
877 goto fail;
878 }
879 }
880
881 ret = tmio_mmc_start_command(host, cmd);
882 if (ret)
883 goto fail;
884
885 schedule_delayed_work(&host->delayed_reset_work,
886 msecs_to_jiffies(CMDREQ_TIMEOUT));
887 return;
888
889 fail:
890 host->force_pio = false;
891 host->mrq = NULL;
892 mrq->cmd->error = ret;
893 mmc_request_done(host->mmc, mrq);
894 }
895
896 /* Process requests from the MMC layer */
897 static void tmio_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
898 {
899 struct tmio_mmc_host *host = mmc_priv(mmc);
900 unsigned long flags;
901
902 spin_lock_irqsave(&host->lock, flags);
903
904 if (host->mrq) {
905 pr_debug("request not null\n");
906 if (IS_ERR(host->mrq)) {
907 spin_unlock_irqrestore(&host->lock, flags);
908 mrq->cmd->error = -EAGAIN;
909 mmc_request_done(mmc, mrq);
910 return;
911 }
912 }
913
914 host->last_req_ts = jiffies;
915 wmb();
916 host->mrq = mrq;
917
918 spin_unlock_irqrestore(&host->lock, flags);
919
920 tmio_process_mrq(host, mrq);
921 }
922
923 static void tmio_mmc_finish_request(struct tmio_mmc_host *host)
924 {
925 struct mmc_request *mrq;
926 unsigned long flags;
927
928 spin_lock_irqsave(&host->lock, flags);
929
930 mrq = host->mrq;
931 if (IS_ERR_OR_NULL(mrq)) {
932 spin_unlock_irqrestore(&host->lock, flags);
933 return;
934 }
935
936 /* If not SET_BLOCK_COUNT, clear old data */
937 if (host->cmd != mrq->sbc) {
938 host->cmd = NULL;
939 host->data = NULL;
940 host->force_pio = false;
941 host->mrq = NULL;
942 }
943
944 cancel_delayed_work(&host->delayed_reset_work);
945
946 spin_unlock_irqrestore(&host->lock, flags);
947
948 if (mrq->cmd->error || (mrq->data && mrq->data->error))
949 tmio_mmc_abort_dma(host);
950
951 if (host->check_scc_error)
952 host->check_scc_error(host);
953
954 /* If SET_BLOCK_COUNT, continue with main command */
955 if (host->mrq) {
956 tmio_process_mrq(host, mrq);
957 return;
958 }
959
960 mmc_request_done(host->mmc, mrq);
961 }
962
963 static void tmio_mmc_done_work(struct work_struct *work)
964 {
965 struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host,
966 done);
967 tmio_mmc_finish_request(host);
968 }
969
970 static int tmio_mmc_clk_enable(struct tmio_mmc_host *host)
971 {
972 if (!host->clk_enable)
973 return -ENOTSUPP;
974
975 return host->clk_enable(host);
976 }
977
978 static void tmio_mmc_clk_disable(struct tmio_mmc_host *host)
979 {
980 if (host->clk_disable)
981 host->clk_disable(host);
982 }
983
984 static void tmio_mmc_power_on(struct tmio_mmc_host *host, unsigned short vdd)
985 {
986 struct mmc_host *mmc = host->mmc;
987 int ret = 0;
988
989 /* .set_ios() is returning void, so, no chance to report an error */
990
991 if (host->set_pwr)
992 host->set_pwr(host->pdev, 1);
993
994 if (!IS_ERR(mmc->supply.vmmc)) {
995 ret = mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, vdd);
996 /*
997 * Attention: empiric value. With a b43 WiFi SDIO card this
998 * delay proved necessary for reliable card-insertion probing.
999 * 100us were not enough. Is this the same 140us delay, as in
1000 * tmio_mmc_set_ios()?
1001 */
1002 udelay(200);
1003 }
1004 /*
1005 * It seems, VccQ should be switched on after Vcc, this is also what the
1006 * omap_hsmmc.c driver does.
1007 */
1008 if (!IS_ERR(mmc->supply.vqmmc) && !ret) {
1009 ret = regulator_enable(mmc->supply.vqmmc);
1010 udelay(200);
1011 }
1012
1013 if (ret < 0)
1014 dev_dbg(&host->pdev->dev, "Regulators failed to power up: %d\n",
1015 ret);
1016 }
1017
1018 static void tmio_mmc_power_off(struct tmio_mmc_host *host)
1019 {
1020 struct mmc_host *mmc = host->mmc;
1021
1022 if (!IS_ERR(mmc->supply.vqmmc))
1023 regulator_disable(mmc->supply.vqmmc);
1024
1025 if (!IS_ERR(mmc->supply.vmmc))
1026 mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, 0);
1027
1028 if (host->set_pwr)
1029 host->set_pwr(host->pdev, 0);
1030 }
1031
1032 static void tmio_mmc_set_bus_width(struct tmio_mmc_host *host,
1033 unsigned char bus_width)
1034 {
1035 u16 reg = sd_ctrl_read16(host, CTL_SD_MEM_CARD_OPT)
1036 & ~(CARD_OPT_WIDTH | CARD_OPT_WIDTH8);
1037
1038 /* reg now applies to MMC_BUS_WIDTH_4 */
1039 if (bus_width == MMC_BUS_WIDTH_1)
1040 reg |= CARD_OPT_WIDTH;
1041 else if (bus_width == MMC_BUS_WIDTH_8)
1042 reg |= CARD_OPT_WIDTH8;
1043
1044 sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, reg);
1045 }
1046
1047 /* Set MMC clock / power.
1048 * Note: This controller uses a simple divider scheme therefore it cannot
1049 * run a MMC card at full speed (20MHz). The max clock is 24MHz on SD, but as
1050 * MMC wont run that fast, it has to be clocked at 12MHz which is the next
1051 * slowest setting.
1052 */
1053 static void tmio_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
1054 {
1055 struct tmio_mmc_host *host = mmc_priv(mmc);
1056 struct device *dev = &host->pdev->dev;
1057 unsigned long flags;
1058
1059 mutex_lock(&host->ios_lock);
1060
1061 spin_lock_irqsave(&host->lock, flags);
1062 if (host->mrq) {
1063 if (IS_ERR(host->mrq)) {
1064 dev_dbg(dev,
1065 "%s.%d: concurrent .set_ios(), clk %u, mode %u\n",
1066 current->comm, task_pid_nr(current),
1067 ios->clock, ios->power_mode);
1068 host->mrq = ERR_PTR(-EINTR);
1069 } else {
1070 dev_dbg(dev,
1071 "%s.%d: CMD%u active since %lu, now %lu!\n",
1072 current->comm, task_pid_nr(current),
1073 host->mrq->cmd->opcode, host->last_req_ts,
1074 jiffies);
1075 }
1076 spin_unlock_irqrestore(&host->lock, flags);
1077
1078 mutex_unlock(&host->ios_lock);
1079 return;
1080 }
1081
1082 host->mrq = ERR_PTR(-EBUSY);
1083
1084 spin_unlock_irqrestore(&host->lock, flags);
1085
1086 switch (ios->power_mode) {
1087 case MMC_POWER_OFF:
1088 tmio_mmc_power_off(host);
1089 tmio_mmc_clk_stop(host);
1090 break;
1091 case MMC_POWER_UP:
1092 tmio_mmc_power_on(host, ios->vdd);
1093 tmio_mmc_set_clock(host, ios->clock);
1094 tmio_mmc_set_bus_width(host, ios->bus_width);
1095 break;
1096 case MMC_POWER_ON:
1097 tmio_mmc_set_clock(host, ios->clock);
1098 tmio_mmc_set_bus_width(host, ios->bus_width);
1099 break;
1100 }
1101
1102 /* Let things settle. delay taken from winCE driver */
1103 udelay(140);
1104 if (PTR_ERR(host->mrq) == -EINTR)
1105 dev_dbg(&host->pdev->dev,
1106 "%s.%d: IOS interrupted: clk %u, mode %u",
1107 current->comm, task_pid_nr(current),
1108 ios->clock, ios->power_mode);
1109 host->mrq = NULL;
1110
1111 host->clk_cache = ios->clock;
1112
1113 mutex_unlock(&host->ios_lock);
1114 }
1115
1116 static int tmio_mmc_get_ro(struct mmc_host *mmc)
1117 {
1118 struct tmio_mmc_host *host = mmc_priv(mmc);
1119 struct tmio_mmc_data *pdata = host->pdata;
1120 int ret = mmc_gpio_get_ro(mmc);
1121
1122 if (ret >= 0)
1123 return ret;
1124
1125 ret = !((pdata->flags & TMIO_MMC_WRPROTECT_DISABLE) ||
1126 (sd_ctrl_read16_and_16_as_32(host, CTL_STATUS) & TMIO_STAT_WRPROTECT));
1127
1128 return ret;
1129 }
1130
1131 static int tmio_multi_io_quirk(struct mmc_card *card,
1132 unsigned int direction, int blk_size)
1133 {
1134 struct tmio_mmc_host *host = mmc_priv(card->host);
1135
1136 if (host->multi_io_quirk)
1137 return host->multi_io_quirk(card, direction, blk_size);
1138
1139 return blk_size;
1140 }
1141
1142 static struct mmc_host_ops tmio_mmc_ops = {
1143 .request = tmio_mmc_request,
1144 .set_ios = tmio_mmc_set_ios,
1145 .get_ro = tmio_mmc_get_ro,
1146 .get_cd = mmc_gpio_get_cd,
1147 .enable_sdio_irq = tmio_mmc_enable_sdio_irq,
1148 .multi_io_quirk = tmio_multi_io_quirk,
1149 .hw_reset = tmio_mmc_hw_reset,
1150 .execute_tuning = tmio_mmc_execute_tuning,
1151 };
1152
1153 static int tmio_mmc_init_ocr(struct tmio_mmc_host *host)
1154 {
1155 struct tmio_mmc_data *pdata = host->pdata;
1156 struct mmc_host *mmc = host->mmc;
1157
1158 mmc_regulator_get_supply(mmc);
1159
1160 /* use ocr_mask if no regulator */
1161 if (!mmc->ocr_avail)
1162 mmc->ocr_avail = pdata->ocr_mask;
1163
1164 /*
1165 * try again.
1166 * There is possibility that regulator has not been probed
1167 */
1168 if (!mmc->ocr_avail)
1169 return -EPROBE_DEFER;
1170
1171 return 0;
1172 }
1173
1174 static void tmio_mmc_of_parse(struct platform_device *pdev,
1175 struct tmio_mmc_data *pdata)
1176 {
1177 const struct device_node *np = pdev->dev.of_node;
1178
1179 if (!np)
1180 return;
1181
1182 if (of_get_property(np, "toshiba,mmc-wrprotect-disable", NULL))
1183 pdata->flags |= TMIO_MMC_WRPROTECT_DISABLE;
1184 }
1185
1186 struct tmio_mmc_host*
1187 tmio_mmc_host_alloc(struct platform_device *pdev)
1188 {
1189 struct tmio_mmc_host *host;
1190 struct mmc_host *mmc;
1191
1192 mmc = mmc_alloc_host(sizeof(struct tmio_mmc_host), &pdev->dev);
1193 if (!mmc)
1194 return NULL;
1195
1196 host = mmc_priv(mmc);
1197 host->mmc = mmc;
1198 host->pdev = pdev;
1199
1200 return host;
1201 }
1202 EXPORT_SYMBOL_GPL(tmio_mmc_host_alloc);
1203
1204 void tmio_mmc_host_free(struct tmio_mmc_host *host)
1205 {
1206 mmc_free_host(host->mmc);
1207 }
1208 EXPORT_SYMBOL_GPL(tmio_mmc_host_free);
1209
1210 int tmio_mmc_host_probe(struct tmio_mmc_host *_host,
1211 struct tmio_mmc_data *pdata,
1212 const struct tmio_mmc_dma_ops *dma_ops)
1213 {
1214 struct platform_device *pdev = _host->pdev;
1215 struct mmc_host *mmc = _host->mmc;
1216 struct resource *res_ctl;
1217 int ret;
1218 u32 irq_mask = TMIO_MASK_CMD;
1219
1220 tmio_mmc_of_parse(pdev, pdata);
1221
1222 if (!(pdata->flags & TMIO_MMC_HAS_IDLE_WAIT))
1223 _host->write16_hook = NULL;
1224
1225 res_ctl = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1226 if (!res_ctl)
1227 return -EINVAL;
1228
1229 ret = mmc_of_parse(mmc);
1230 if (ret < 0)
1231 return ret;
1232
1233 _host->pdata = pdata;
1234 platform_set_drvdata(pdev, mmc);
1235
1236 _host->set_pwr = pdata->set_pwr;
1237 _host->set_clk_div = pdata->set_clk_div;
1238
1239 ret = tmio_mmc_init_ocr(_host);
1240 if (ret < 0)
1241 return ret;
1242
1243 _host->ctl = devm_ioremap(&pdev->dev,
1244 res_ctl->start, resource_size(res_ctl));
1245 if (!_host->ctl)
1246 return -ENOMEM;
1247
1248 tmio_mmc_ops.card_busy = _host->card_busy;
1249 tmio_mmc_ops.start_signal_voltage_switch =
1250 _host->start_signal_voltage_switch;
1251 mmc->ops = &tmio_mmc_ops;
1252
1253 mmc->caps |= MMC_CAP_4_BIT_DATA | pdata->capabilities;
1254 mmc->caps2 |= pdata->capabilities2;
1255 mmc->max_segs = 32;
1256 mmc->max_blk_size = 512;
1257 mmc->max_blk_count = (PAGE_SIZE / mmc->max_blk_size) *
1258 mmc->max_segs;
1259 mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count;
1260 mmc->max_seg_size = mmc->max_req_size;
1261
1262 _host->native_hotplug = !(pdata->flags & TMIO_MMC_USE_GPIO_CD ||
1263 mmc->caps & MMC_CAP_NEEDS_POLL ||
1264 !mmc_card_is_removable(mmc));
1265
1266 /*
1267 * On Gen2+, eMMC with NONREMOVABLE currently fails because native
1268 * hotplug gets disabled. It seems RuntimePM related yet we need further
1269 * research. Since we are planning a PM overhaul anyway, let's enforce
1270 * for now the device being active by enabling native hotplug always.
1271 */
1272 if (pdata->flags & TMIO_MMC_MIN_RCAR2)
1273 _host->native_hotplug = true;
1274
1275 if (tmio_mmc_clk_enable(_host) < 0) {
1276 mmc->f_max = pdata->hclk;
1277 mmc->f_min = mmc->f_max / 512;
1278 }
1279
1280 /*
1281 * Check the sanity of mmc->f_min to prevent tmio_mmc_set_clock() from
1282 * looping forever...
1283 */
1284 if (mmc->f_min == 0)
1285 return -EINVAL;
1286
1287 /*
1288 * While using internal tmio hardware logic for card detection, we need
1289 * to ensure it stays powered for it to work.
1290 */
1291 if (_host->native_hotplug)
1292 pm_runtime_get_noresume(&pdev->dev);
1293
1294 _host->sdio_irq_enabled = false;
1295 if (pdata->flags & TMIO_MMC_SDIO_IRQ)
1296 _host->sdio_irq_mask = TMIO_SDIO_MASK_ALL;
1297
1298 tmio_mmc_clk_stop(_host);
1299 tmio_mmc_reset(_host);
1300
1301 _host->sdcard_irq_mask = sd_ctrl_read16_and_16_as_32(_host, CTL_IRQ_MASK);
1302 tmio_mmc_disable_mmc_irqs(_host, TMIO_MASK_ALL);
1303
1304 /* Unmask the IRQs we want to know about */
1305 if (!_host->chan_rx)
1306 irq_mask |= TMIO_MASK_READOP;
1307 if (!_host->chan_tx)
1308 irq_mask |= TMIO_MASK_WRITEOP;
1309 if (!_host->native_hotplug)
1310 irq_mask &= ~(TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT);
1311
1312 _host->sdcard_irq_mask &= ~irq_mask;
1313
1314 spin_lock_init(&_host->lock);
1315 mutex_init(&_host->ios_lock);
1316
1317 /* Init delayed work for request timeouts */
1318 INIT_DELAYED_WORK(&_host->delayed_reset_work, tmio_mmc_reset_work);
1319 INIT_WORK(&_host->done, tmio_mmc_done_work);
1320
1321 /* See if we also get DMA */
1322 _host->dma_ops = dma_ops;
1323 tmio_mmc_request_dma(_host, pdata);
1324
1325 pm_runtime_set_active(&pdev->dev);
1326 pm_runtime_set_autosuspend_delay(&pdev->dev, 50);
1327 pm_runtime_use_autosuspend(&pdev->dev);
1328 pm_runtime_enable(&pdev->dev);
1329
1330 ret = mmc_add_host(mmc);
1331 if (ret < 0) {
1332 tmio_mmc_host_remove(_host);
1333 return ret;
1334 }
1335
1336 dev_pm_qos_expose_latency_limit(&pdev->dev, 100);
1337
1338 if (pdata->flags & TMIO_MMC_USE_GPIO_CD) {
1339 ret = mmc_gpio_request_cd(mmc, pdata->cd_gpio, 0);
1340 if (ret < 0) {
1341 tmio_mmc_host_remove(_host);
1342 return ret;
1343 }
1344 mmc_gpiod_request_cd_irq(mmc);
1345 }
1346
1347 return 0;
1348 }
1349 EXPORT_SYMBOL_GPL(tmio_mmc_host_probe);
1350
1351 void tmio_mmc_host_remove(struct tmio_mmc_host *host)
1352 {
1353 struct platform_device *pdev = host->pdev;
1354 struct mmc_host *mmc = host->mmc;
1355
1356 if (host->pdata->flags & TMIO_MMC_SDIO_IRQ)
1357 sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0000);
1358
1359 if (!host->native_hotplug)
1360 pm_runtime_get_sync(&pdev->dev);
1361
1362 dev_pm_qos_hide_latency_limit(&pdev->dev);
1363
1364 mmc_remove_host(mmc);
1365 cancel_work_sync(&host->done);
1366 cancel_delayed_work_sync(&host->delayed_reset_work);
1367 tmio_mmc_release_dma(host);
1368
1369 pm_runtime_put_sync(&pdev->dev);
1370 pm_runtime_disable(&pdev->dev);
1371
1372 tmio_mmc_clk_disable(host);
1373 }
1374 EXPORT_SYMBOL_GPL(tmio_mmc_host_remove);
1375
1376 #ifdef CONFIG_PM
1377 int tmio_mmc_host_runtime_suspend(struct device *dev)
1378 {
1379 struct mmc_host *mmc = dev_get_drvdata(dev);
1380 struct tmio_mmc_host *host = mmc_priv(mmc);
1381
1382 tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_ALL);
1383
1384 if (host->clk_cache)
1385 tmio_mmc_clk_stop(host);
1386
1387 tmio_mmc_clk_disable(host);
1388
1389 return 0;
1390 }
1391 EXPORT_SYMBOL_GPL(tmio_mmc_host_runtime_suspend);
1392
1393 static bool tmio_mmc_can_retune(struct tmio_mmc_host *host)
1394 {
1395 return host->tap_num && mmc_can_retune(host->mmc);
1396 }
1397
1398 int tmio_mmc_host_runtime_resume(struct device *dev)
1399 {
1400 struct mmc_host *mmc = dev_get_drvdata(dev);
1401 struct tmio_mmc_host *host = mmc_priv(mmc);
1402
1403 tmio_mmc_reset(host);
1404 tmio_mmc_clk_enable(host);
1405
1406 if (host->clk_cache)
1407 tmio_mmc_set_clock(host, host->clk_cache);
1408
1409 tmio_mmc_enable_dma(host, true);
1410
1411 if (tmio_mmc_can_retune(host) && host->select_tuning(host))
1412 dev_warn(&host->pdev->dev, "Tuning selection failed\n");
1413
1414 return 0;
1415 }
1416 EXPORT_SYMBOL_GPL(tmio_mmc_host_runtime_resume);
1417 #endif
1418
1419 MODULE_LICENSE("GPL v2");