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1 /*
2 * linux/drivers/mmc/host/tmio_mmc_pio.c
3 *
4 * Copyright (C) 2011 Guennadi Liakhovetski
5 * Copyright (C) 2007 Ian Molton
6 * Copyright (C) 2004 Ian Molton
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 * Driver for the MMC / SD / SDIO IP found in:
13 *
14 * TC6393XB, TC6391XB, TC6387XB, T7L66XB, ASIC3, SH-Mobile SoCs
15 *
16 * This driver draws mainly on scattered spec sheets, Reverse engineering
17 * of the toshiba e800 SD driver and some parts of the 2.4 ASIC3 driver (4 bit
18 * support). (Further 4 bit support from a later datasheet).
19 *
20 * TODO:
21 * Investigate using a workqueue for PIO transfers
22 * Eliminate FIXMEs
23 * SDIO support
24 * Better Power management
25 * Handle MMC errors better
26 * double buffer support
27 *
28 */
29
30 #include <linux/delay.h>
31 #include <linux/device.h>
32 #include <linux/highmem.h>
33 #include <linux/interrupt.h>
34 #include <linux/io.h>
35 #include <linux/irq.h>
36 #include <linux/mfd/tmio.h>
37 #include <linux/mmc/host.h>
38 #include <linux/mmc/tmio.h>
39 #include <linux/module.h>
40 #include <linux/pagemap.h>
41 #include <linux/platform_device.h>
42 #include <linux/pm_qos.h>
43 #include <linux/pm_runtime.h>
44 #include <linux/scatterlist.h>
45 #include <linux/spinlock.h>
46 #include <linux/workqueue.h>
47
48 #include "tmio_mmc.h"
49
50 void tmio_mmc_enable_mmc_irqs(struct tmio_mmc_host *host, u32 i)
51 {
52 host->sdcard_irq_mask &= ~(i & TMIO_MASK_IRQ);
53 sd_ctrl_write32(host, CTL_IRQ_MASK, host->sdcard_irq_mask);
54 }
55
56 void tmio_mmc_disable_mmc_irqs(struct tmio_mmc_host *host, u32 i)
57 {
58 host->sdcard_irq_mask |= (i & TMIO_MASK_IRQ);
59 sd_ctrl_write32(host, CTL_IRQ_MASK, host->sdcard_irq_mask);
60 }
61
62 static void tmio_mmc_ack_mmc_irqs(struct tmio_mmc_host *host, u32 i)
63 {
64 sd_ctrl_write32(host, CTL_STATUS, ~i);
65 }
66
67 static void tmio_mmc_init_sg(struct tmio_mmc_host *host, struct mmc_data *data)
68 {
69 host->sg_len = data->sg_len;
70 host->sg_ptr = data->sg;
71 host->sg_orig = data->sg;
72 host->sg_off = 0;
73 }
74
75 static int tmio_mmc_next_sg(struct tmio_mmc_host *host)
76 {
77 host->sg_ptr = sg_next(host->sg_ptr);
78 host->sg_off = 0;
79 return --host->sg_len;
80 }
81
82 #ifdef CONFIG_MMC_DEBUG
83
84 #define STATUS_TO_TEXT(a, status, i) \
85 do { \
86 if (status & TMIO_STAT_##a) { \
87 if (i++) \
88 printk(" | "); \
89 printk(#a); \
90 } \
91 } while (0)
92
93 static void pr_debug_status(u32 status)
94 {
95 int i = 0;
96 pr_debug("status: %08x = ", status);
97 STATUS_TO_TEXT(CARD_REMOVE, status, i);
98 STATUS_TO_TEXT(CARD_INSERT, status, i);
99 STATUS_TO_TEXT(SIGSTATE, status, i);
100 STATUS_TO_TEXT(WRPROTECT, status, i);
101 STATUS_TO_TEXT(CARD_REMOVE_A, status, i);
102 STATUS_TO_TEXT(CARD_INSERT_A, status, i);
103 STATUS_TO_TEXT(SIGSTATE_A, status, i);
104 STATUS_TO_TEXT(CMD_IDX_ERR, status, i);
105 STATUS_TO_TEXT(STOPBIT_ERR, status, i);
106 STATUS_TO_TEXT(ILL_FUNC, status, i);
107 STATUS_TO_TEXT(CMD_BUSY, status, i);
108 STATUS_TO_TEXT(CMDRESPEND, status, i);
109 STATUS_TO_TEXT(DATAEND, status, i);
110 STATUS_TO_TEXT(CRCFAIL, status, i);
111 STATUS_TO_TEXT(DATATIMEOUT, status, i);
112 STATUS_TO_TEXT(CMDTIMEOUT, status, i);
113 STATUS_TO_TEXT(RXOVERFLOW, status, i);
114 STATUS_TO_TEXT(TXUNDERRUN, status, i);
115 STATUS_TO_TEXT(RXRDY, status, i);
116 STATUS_TO_TEXT(TXRQ, status, i);
117 STATUS_TO_TEXT(ILL_ACCESS, status, i);
118 printk("\n");
119 }
120
121 #else
122 #define pr_debug_status(s) do { } while (0)
123 #endif
124
125 static void tmio_mmc_enable_sdio_irq(struct mmc_host *mmc, int enable)
126 {
127 struct tmio_mmc_host *host = mmc_priv(mmc);
128
129 if (enable) {
130 host->sdio_irq_enabled = 1;
131 host->sdio_irq_mask = TMIO_SDIO_MASK_ALL &
132 ~TMIO_SDIO_STAT_IOIRQ;
133 sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0001);
134 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
135 } else {
136 host->sdio_irq_mask = TMIO_SDIO_MASK_ALL;
137 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
138 sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0000);
139 host->sdio_irq_enabled = 0;
140 }
141 }
142
143 static void tmio_mmc_set_clock(struct tmio_mmc_host *host, int new_clock)
144 {
145 u32 clk = 0, clock;
146
147 if (new_clock) {
148 for (clock = host->mmc->f_min, clk = 0x80000080;
149 new_clock >= (clock<<1); clk >>= 1)
150 clock <<= 1;
151 clk |= 0x100;
152 }
153
154 if (host->set_clk_div)
155 host->set_clk_div(host->pdev, (clk>>22) & 1);
156
157 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, clk & 0x1ff);
158 }
159
160 static void tmio_mmc_clk_stop(struct tmio_mmc_host *host)
161 {
162 struct resource *res = platform_get_resource(host->pdev, IORESOURCE_MEM, 0);
163
164 /* implicit BUG_ON(!res) */
165 if (resource_size(res) > 0x100) {
166 sd_ctrl_write16(host, CTL_CLK_AND_WAIT_CTL, 0x0000);
167 msleep(10);
168 }
169
170 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, ~0x0100 &
171 sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
172 msleep(10);
173 }
174
175 static void tmio_mmc_clk_start(struct tmio_mmc_host *host)
176 {
177 struct resource *res = platform_get_resource(host->pdev, IORESOURCE_MEM, 0);
178
179 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, 0x0100 |
180 sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
181 msleep(10);
182
183 /* implicit BUG_ON(!res) */
184 if (resource_size(res) > 0x100) {
185 sd_ctrl_write16(host, CTL_CLK_AND_WAIT_CTL, 0x0100);
186 msleep(10);
187 }
188 }
189
190 static void tmio_mmc_reset(struct tmio_mmc_host *host)
191 {
192 struct resource *res = platform_get_resource(host->pdev, IORESOURCE_MEM, 0);
193
194 /* FIXME - should we set stop clock reg here */
195 sd_ctrl_write16(host, CTL_RESET_SD, 0x0000);
196 /* implicit BUG_ON(!res) */
197 if (resource_size(res) > 0x100)
198 sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0000);
199 msleep(10);
200 sd_ctrl_write16(host, CTL_RESET_SD, 0x0001);
201 if (resource_size(res) > 0x100)
202 sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0001);
203 msleep(10);
204 }
205
206 static void tmio_mmc_reset_work(struct work_struct *work)
207 {
208 struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host,
209 delayed_reset_work.work);
210 struct mmc_request *mrq;
211 unsigned long flags;
212
213 spin_lock_irqsave(&host->lock, flags);
214 mrq = host->mrq;
215
216 /*
217 * is request already finished? Since we use a non-blocking
218 * cancel_delayed_work(), it can happen, that a .set_ios() call preempts
219 * us, so, have to check for IS_ERR(host->mrq)
220 */
221 if (IS_ERR_OR_NULL(mrq)
222 || time_is_after_jiffies(host->last_req_ts +
223 msecs_to_jiffies(2000))) {
224 spin_unlock_irqrestore(&host->lock, flags);
225 return;
226 }
227
228 dev_warn(&host->pdev->dev,
229 "timeout waiting for hardware interrupt (CMD%u)\n",
230 mrq->cmd->opcode);
231
232 if (host->data)
233 host->data->error = -ETIMEDOUT;
234 else if (host->cmd)
235 host->cmd->error = -ETIMEDOUT;
236 else
237 mrq->cmd->error = -ETIMEDOUT;
238
239 host->cmd = NULL;
240 host->data = NULL;
241 host->force_pio = false;
242
243 spin_unlock_irqrestore(&host->lock, flags);
244
245 tmio_mmc_reset(host);
246
247 /* Ready for new calls */
248 host->mrq = NULL;
249
250 tmio_mmc_abort_dma(host);
251 mmc_request_done(host->mmc, mrq);
252 }
253
254 /* called with host->lock held, interrupts disabled */
255 static void tmio_mmc_finish_request(struct tmio_mmc_host *host)
256 {
257 struct mmc_request *mrq;
258 unsigned long flags;
259
260 spin_lock_irqsave(&host->lock, flags);
261
262 mrq = host->mrq;
263 if (IS_ERR_OR_NULL(mrq)) {
264 spin_unlock_irqrestore(&host->lock, flags);
265 return;
266 }
267
268 host->cmd = NULL;
269 host->data = NULL;
270 host->force_pio = false;
271
272 cancel_delayed_work(&host->delayed_reset_work);
273
274 host->mrq = NULL;
275 spin_unlock_irqrestore(&host->lock, flags);
276
277 if (mrq->cmd->error || (mrq->data && mrq->data->error))
278 tmio_mmc_abort_dma(host);
279
280 mmc_request_done(host->mmc, mrq);
281 }
282
283 static void tmio_mmc_done_work(struct work_struct *work)
284 {
285 struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host,
286 done);
287 tmio_mmc_finish_request(host);
288 }
289
290 /* These are the bitmasks the tmio chip requires to implement the MMC response
291 * types. Note that R1 and R6 are the same in this scheme. */
292 #define APP_CMD 0x0040
293 #define RESP_NONE 0x0300
294 #define RESP_R1 0x0400
295 #define RESP_R1B 0x0500
296 #define RESP_R2 0x0600
297 #define RESP_R3 0x0700
298 #define DATA_PRESENT 0x0800
299 #define TRANSFER_READ 0x1000
300 #define TRANSFER_MULTI 0x2000
301 #define SECURITY_CMD 0x4000
302
303 static int tmio_mmc_start_command(struct tmio_mmc_host *host, struct mmc_command *cmd)
304 {
305 struct mmc_data *data = host->data;
306 int c = cmd->opcode;
307
308 /* Command 12 is handled by hardware */
309 if (cmd->opcode == 12 && !cmd->arg) {
310 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x001);
311 return 0;
312 }
313
314 switch (mmc_resp_type(cmd)) {
315 case MMC_RSP_NONE: c |= RESP_NONE; break;
316 case MMC_RSP_R1: c |= RESP_R1; break;
317 case MMC_RSP_R1B: c |= RESP_R1B; break;
318 case MMC_RSP_R2: c |= RESP_R2; break;
319 case MMC_RSP_R3: c |= RESP_R3; break;
320 default:
321 pr_debug("Unknown response type %d\n", mmc_resp_type(cmd));
322 return -EINVAL;
323 }
324
325 host->cmd = cmd;
326
327 /* FIXME - this seems to be ok commented out but the spec suggest this bit
328 * should be set when issuing app commands.
329 * if(cmd->flags & MMC_FLAG_ACMD)
330 * c |= APP_CMD;
331 */
332 if (data) {
333 c |= DATA_PRESENT;
334 if (data->blocks > 1) {
335 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x100);
336 c |= TRANSFER_MULTI;
337 }
338 if (data->flags & MMC_DATA_READ)
339 c |= TRANSFER_READ;
340 }
341
342 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_CMD);
343
344 /* Fire off the command */
345 sd_ctrl_write32(host, CTL_ARG_REG, cmd->arg);
346 sd_ctrl_write16(host, CTL_SD_CMD, c);
347
348 return 0;
349 }
350
351 /*
352 * This chip always returns (at least?) as much data as you ask for.
353 * I'm unsure what happens if you ask for less than a block. This should be
354 * looked into to ensure that a funny length read doesn't hose the controller.
355 */
356 static void tmio_mmc_pio_irq(struct tmio_mmc_host *host)
357 {
358 struct mmc_data *data = host->data;
359 void *sg_virt;
360 unsigned short *buf;
361 unsigned int count;
362 unsigned long flags;
363
364 if ((host->chan_tx || host->chan_rx) && !host->force_pio) {
365 pr_err("PIO IRQ in DMA mode!\n");
366 return;
367 } else if (!data) {
368 pr_debug("Spurious PIO IRQ\n");
369 return;
370 }
371
372 sg_virt = tmio_mmc_kmap_atomic(host->sg_ptr, &flags);
373 buf = (unsigned short *)(sg_virt + host->sg_off);
374
375 count = host->sg_ptr->length - host->sg_off;
376 if (count > data->blksz)
377 count = data->blksz;
378
379 pr_debug("count: %08x offset: %08x flags %08x\n",
380 count, host->sg_off, data->flags);
381
382 /* Transfer the data */
383 if (data->flags & MMC_DATA_READ)
384 sd_ctrl_read16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
385 else
386 sd_ctrl_write16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
387
388 host->sg_off += count;
389
390 tmio_mmc_kunmap_atomic(host->sg_ptr, &flags, sg_virt);
391
392 if (host->sg_off == host->sg_ptr->length)
393 tmio_mmc_next_sg(host);
394
395 return;
396 }
397
398 static void tmio_mmc_check_bounce_buffer(struct tmio_mmc_host *host)
399 {
400 if (host->sg_ptr == &host->bounce_sg) {
401 unsigned long flags;
402 void *sg_vaddr = tmio_mmc_kmap_atomic(host->sg_orig, &flags);
403 memcpy(sg_vaddr, host->bounce_buf, host->bounce_sg.length);
404 tmio_mmc_kunmap_atomic(host->sg_orig, &flags, sg_vaddr);
405 }
406 }
407
408 /* needs to be called with host->lock held */
409 void tmio_mmc_do_data_irq(struct tmio_mmc_host *host)
410 {
411 struct mmc_data *data = host->data;
412 struct mmc_command *stop;
413
414 host->data = NULL;
415
416 if (!data) {
417 dev_warn(&host->pdev->dev, "Spurious data end IRQ\n");
418 return;
419 }
420 stop = data->stop;
421
422 /* FIXME - return correct transfer count on errors */
423 if (!data->error)
424 data->bytes_xfered = data->blocks * data->blksz;
425 else
426 data->bytes_xfered = 0;
427
428 pr_debug("Completed data request\n");
429
430 /*
431 * FIXME: other drivers allow an optional stop command of any given type
432 * which we dont do, as the chip can auto generate them.
433 * Perhaps we can be smarter about when to use auto CMD12 and
434 * only issue the auto request when we know this is the desired
435 * stop command, allowing fallback to the stop command the
436 * upper layers expect. For now, we do what works.
437 */
438
439 if (data->flags & MMC_DATA_READ) {
440 if (host->chan_rx && !host->force_pio)
441 tmio_mmc_check_bounce_buffer(host);
442 dev_dbg(&host->pdev->dev, "Complete Rx request %p\n",
443 host->mrq);
444 } else {
445 dev_dbg(&host->pdev->dev, "Complete Tx request %p\n",
446 host->mrq);
447 }
448
449 if (stop) {
450 if (stop->opcode == 12 && !stop->arg)
451 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x000);
452 else
453 BUG();
454 }
455
456 schedule_work(&host->done);
457 }
458
459 static void tmio_mmc_data_irq(struct tmio_mmc_host *host)
460 {
461 struct mmc_data *data;
462 spin_lock(&host->lock);
463 data = host->data;
464
465 if (!data)
466 goto out;
467
468 if (host->chan_tx && (data->flags & MMC_DATA_WRITE) && !host->force_pio) {
469 /*
470 * Has all data been written out yet? Testing on SuperH showed,
471 * that in most cases the first interrupt comes already with the
472 * BUSY status bit clear, but on some operations, like mount or
473 * in the beginning of a write / sync / umount, there is one
474 * DATAEND interrupt with the BUSY bit set, in this cases
475 * waiting for one more interrupt fixes the problem.
476 */
477 if (!(sd_ctrl_read32(host, CTL_STATUS) & TMIO_STAT_CMD_BUSY)) {
478 tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND);
479 tasklet_schedule(&host->dma_complete);
480 }
481 } else if (host->chan_rx && (data->flags & MMC_DATA_READ) && !host->force_pio) {
482 tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND);
483 tasklet_schedule(&host->dma_complete);
484 } else {
485 tmio_mmc_do_data_irq(host);
486 tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_READOP | TMIO_MASK_WRITEOP);
487 }
488 out:
489 spin_unlock(&host->lock);
490 }
491
492 static void tmio_mmc_cmd_irq(struct tmio_mmc_host *host,
493 unsigned int stat)
494 {
495 struct mmc_command *cmd = host->cmd;
496 int i, addr;
497
498 spin_lock(&host->lock);
499
500 if (!host->cmd) {
501 pr_debug("Spurious CMD irq\n");
502 goto out;
503 }
504
505 host->cmd = NULL;
506
507 /* This controller is sicker than the PXA one. Not only do we need to
508 * drop the top 8 bits of the first response word, we also need to
509 * modify the order of the response for short response command types.
510 */
511
512 for (i = 3, addr = CTL_RESPONSE ; i >= 0 ; i--, addr += 4)
513 cmd->resp[i] = sd_ctrl_read32(host, addr);
514
515 if (cmd->flags & MMC_RSP_136) {
516 cmd->resp[0] = (cmd->resp[0] << 8) | (cmd->resp[1] >> 24);
517 cmd->resp[1] = (cmd->resp[1] << 8) | (cmd->resp[2] >> 24);
518 cmd->resp[2] = (cmd->resp[2] << 8) | (cmd->resp[3] >> 24);
519 cmd->resp[3] <<= 8;
520 } else if (cmd->flags & MMC_RSP_R3) {
521 cmd->resp[0] = cmd->resp[3];
522 }
523
524 if (stat & TMIO_STAT_CMDTIMEOUT)
525 cmd->error = -ETIMEDOUT;
526 else if (stat & TMIO_STAT_CRCFAIL && cmd->flags & MMC_RSP_CRC)
527 cmd->error = -EILSEQ;
528
529 /* If there is data to handle we enable data IRQs here, and
530 * we will ultimatley finish the request in the data_end handler.
531 * If theres no data or we encountered an error, finish now.
532 */
533 if (host->data && !cmd->error) {
534 if (host->data->flags & MMC_DATA_READ) {
535 if (host->force_pio || !host->chan_rx)
536 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_READOP);
537 else
538 tasklet_schedule(&host->dma_issue);
539 } else {
540 if (host->force_pio || !host->chan_tx)
541 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_WRITEOP);
542 else
543 tasklet_schedule(&host->dma_issue);
544 }
545 } else {
546 schedule_work(&host->done);
547 }
548
549 out:
550 spin_unlock(&host->lock);
551 }
552
553 static void tmio_mmc_card_irq_status(struct tmio_mmc_host *host,
554 int *ireg, int *status)
555 {
556 *status = sd_ctrl_read32(host, CTL_STATUS);
557 *ireg = *status & TMIO_MASK_IRQ & ~host->sdcard_irq_mask;
558
559 pr_debug_status(*status);
560 pr_debug_status(*ireg);
561 }
562
563 static bool __tmio_mmc_card_detect_irq(struct tmio_mmc_host *host,
564 int ireg, int status)
565 {
566 struct mmc_host *mmc = host->mmc;
567
568 /* Card insert / remove attempts */
569 if (ireg & (TMIO_STAT_CARD_INSERT | TMIO_STAT_CARD_REMOVE)) {
570 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_CARD_INSERT |
571 TMIO_STAT_CARD_REMOVE);
572 if ((((ireg & TMIO_STAT_CARD_REMOVE) && mmc->card) ||
573 ((ireg & TMIO_STAT_CARD_INSERT) && !mmc->card)) &&
574 !work_pending(&mmc->detect.work))
575 mmc_detect_change(host->mmc, msecs_to_jiffies(100));
576 return true;
577 }
578
579 return false;
580 }
581
582 irqreturn_t tmio_mmc_card_detect_irq(int irq, void *devid)
583 {
584 unsigned int ireg, status;
585 struct tmio_mmc_host *host = devid;
586
587 tmio_mmc_card_irq_status(host, &ireg, &status);
588 __tmio_mmc_card_detect_irq(host, ireg, status);
589
590 return IRQ_HANDLED;
591 }
592 EXPORT_SYMBOL(tmio_mmc_card_detect_irq);
593
594 static bool __tmio_mmc_sdcard_irq(struct tmio_mmc_host *host,
595 int ireg, int status)
596 {
597 /* Command completion */
598 if (ireg & (TMIO_STAT_CMDRESPEND | TMIO_STAT_CMDTIMEOUT)) {
599 tmio_mmc_ack_mmc_irqs(host,
600 TMIO_STAT_CMDRESPEND |
601 TMIO_STAT_CMDTIMEOUT);
602 tmio_mmc_cmd_irq(host, status);
603 return true;
604 }
605
606 /* Data transfer */
607 if (ireg & (TMIO_STAT_RXRDY | TMIO_STAT_TXRQ)) {
608 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_RXRDY | TMIO_STAT_TXRQ);
609 tmio_mmc_pio_irq(host);
610 return true;
611 }
612
613 /* Data transfer completion */
614 if (ireg & TMIO_STAT_DATAEND) {
615 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_DATAEND);
616 tmio_mmc_data_irq(host);
617 return true;
618 }
619
620 return false;
621 }
622
623 irqreturn_t tmio_mmc_sdcard_irq(int irq, void *devid)
624 {
625 unsigned int ireg, status;
626 struct tmio_mmc_host *host = devid;
627
628 tmio_mmc_card_irq_status(host, &ireg, &status);
629 __tmio_mmc_sdcard_irq(host, ireg, status);
630
631 return IRQ_HANDLED;
632 }
633 EXPORT_SYMBOL(tmio_mmc_sdcard_irq);
634
635 irqreturn_t tmio_mmc_sdio_irq(int irq, void *devid)
636 {
637 struct tmio_mmc_host *host = devid;
638 struct mmc_host *mmc = host->mmc;
639 struct tmio_mmc_data *pdata = host->pdata;
640 unsigned int ireg, status;
641
642 if (!(pdata->flags & TMIO_MMC_SDIO_IRQ))
643 return IRQ_HANDLED;
644
645 status = sd_ctrl_read16(host, CTL_SDIO_STATUS);
646 ireg = status & TMIO_SDIO_MASK_ALL & ~host->sdcard_irq_mask;
647
648 sd_ctrl_write16(host, CTL_SDIO_STATUS, status & ~TMIO_SDIO_MASK_ALL);
649
650 if (mmc->caps & MMC_CAP_SDIO_IRQ && ireg & TMIO_SDIO_STAT_IOIRQ)
651 mmc_signal_sdio_irq(mmc);
652
653 return IRQ_HANDLED;
654 }
655 EXPORT_SYMBOL(tmio_mmc_sdio_irq);
656
657 irqreturn_t tmio_mmc_irq(int irq, void *devid)
658 {
659 struct tmio_mmc_host *host = devid;
660 unsigned int ireg, status;
661
662 pr_debug("MMC IRQ begin\n");
663
664 tmio_mmc_card_irq_status(host, &ireg, &status);
665 if (__tmio_mmc_card_detect_irq(host, ireg, status))
666 return IRQ_HANDLED;
667 if (__tmio_mmc_sdcard_irq(host, ireg, status))
668 return IRQ_HANDLED;
669
670 tmio_mmc_sdio_irq(irq, devid);
671
672 return IRQ_HANDLED;
673 }
674 EXPORT_SYMBOL(tmio_mmc_irq);
675
676 static int tmio_mmc_start_data(struct tmio_mmc_host *host,
677 struct mmc_data *data)
678 {
679 struct tmio_mmc_data *pdata = host->pdata;
680
681 pr_debug("setup data transfer: blocksize %08x nr_blocks %d\n",
682 data->blksz, data->blocks);
683
684 /* Some hardware cannot perform 2 byte requests in 4 bit mode */
685 if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_4) {
686 int blksz_2bytes = pdata->flags & TMIO_MMC_BLKSZ_2BYTES;
687
688 if (data->blksz < 2 || (data->blksz < 4 && !blksz_2bytes)) {
689 pr_err("%s: %d byte block unsupported in 4 bit mode\n",
690 mmc_hostname(host->mmc), data->blksz);
691 return -EINVAL;
692 }
693 }
694
695 tmio_mmc_init_sg(host, data);
696 host->data = data;
697
698 /* Set transfer length / blocksize */
699 sd_ctrl_write16(host, CTL_SD_XFER_LEN, data->blksz);
700 sd_ctrl_write16(host, CTL_XFER_BLK_COUNT, data->blocks);
701
702 tmio_mmc_start_dma(host, data);
703
704 return 0;
705 }
706
707 /* Process requests from the MMC layer */
708 static void tmio_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
709 {
710 struct tmio_mmc_host *host = mmc_priv(mmc);
711 unsigned long flags;
712 int ret;
713
714 spin_lock_irqsave(&host->lock, flags);
715
716 if (host->mrq) {
717 pr_debug("request not null\n");
718 if (IS_ERR(host->mrq)) {
719 spin_unlock_irqrestore(&host->lock, flags);
720 mrq->cmd->error = -EAGAIN;
721 mmc_request_done(mmc, mrq);
722 return;
723 }
724 }
725
726 host->last_req_ts = jiffies;
727 wmb();
728 host->mrq = mrq;
729
730 spin_unlock_irqrestore(&host->lock, flags);
731
732 if (mrq->data) {
733 ret = tmio_mmc_start_data(host, mrq->data);
734 if (ret)
735 goto fail;
736 }
737
738 ret = tmio_mmc_start_command(host, mrq->cmd);
739 if (!ret) {
740 schedule_delayed_work(&host->delayed_reset_work,
741 msecs_to_jiffies(2000));
742 return;
743 }
744
745 fail:
746 host->force_pio = false;
747 host->mrq = NULL;
748 mrq->cmd->error = ret;
749 mmc_request_done(mmc, mrq);
750 }
751
752 /* Set MMC clock / power.
753 * Note: This controller uses a simple divider scheme therefore it cannot
754 * run a MMC card at full speed (20MHz). The max clock is 24MHz on SD, but as
755 * MMC wont run that fast, it has to be clocked at 12MHz which is the next
756 * slowest setting.
757 */
758 static void tmio_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
759 {
760 struct tmio_mmc_host *host = mmc_priv(mmc);
761 struct tmio_mmc_data *pdata = host->pdata;
762 unsigned long flags;
763
764 mutex_lock(&host->ios_lock);
765
766 spin_lock_irqsave(&host->lock, flags);
767 if (host->mrq) {
768 if (IS_ERR(host->mrq)) {
769 dev_dbg(&host->pdev->dev,
770 "%s.%d: concurrent .set_ios(), clk %u, mode %u\n",
771 current->comm, task_pid_nr(current),
772 ios->clock, ios->power_mode);
773 host->mrq = ERR_PTR(-EINTR);
774 } else {
775 dev_dbg(&host->pdev->dev,
776 "%s.%d: CMD%u active since %lu, now %lu!\n",
777 current->comm, task_pid_nr(current),
778 host->mrq->cmd->opcode, host->last_req_ts, jiffies);
779 }
780 spin_unlock_irqrestore(&host->lock, flags);
781
782 mutex_unlock(&host->ios_lock);
783 return;
784 }
785
786 host->mrq = ERR_PTR(-EBUSY);
787
788 spin_unlock_irqrestore(&host->lock, flags);
789
790 /*
791 * pdata->power == false only if COLD_CD is available, otherwise only
792 * in short time intervals during probing or resuming
793 */
794 if (ios->power_mode == MMC_POWER_ON && ios->clock) {
795 if (!pdata->power) {
796 pm_runtime_get_sync(&host->pdev->dev);
797 pdata->power = true;
798 }
799 tmio_mmc_set_clock(host, ios->clock);
800 /* power up SD bus */
801 if (host->set_pwr)
802 host->set_pwr(host->pdev, 1);
803 /* start bus clock */
804 tmio_mmc_clk_start(host);
805 } else if (ios->power_mode != MMC_POWER_UP) {
806 if (host->set_pwr && ios->power_mode == MMC_POWER_OFF)
807 host->set_pwr(host->pdev, 0);
808 if (pdata->power) {
809 pdata->power = false;
810 pm_runtime_put(&host->pdev->dev);
811 }
812 tmio_mmc_clk_stop(host);
813 }
814
815 switch (ios->bus_width) {
816 case MMC_BUS_WIDTH_1:
817 sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, 0x80e0);
818 break;
819 case MMC_BUS_WIDTH_4:
820 sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, 0x00e0);
821 break;
822 }
823
824 /* Let things settle. delay taken from winCE driver */
825 udelay(140);
826 if (PTR_ERR(host->mrq) == -EINTR)
827 dev_dbg(&host->pdev->dev,
828 "%s.%d: IOS interrupted: clk %u, mode %u",
829 current->comm, task_pid_nr(current),
830 ios->clock, ios->power_mode);
831 host->mrq = NULL;
832
833 mutex_unlock(&host->ios_lock);
834 }
835
836 static int tmio_mmc_get_ro(struct mmc_host *mmc)
837 {
838 struct tmio_mmc_host *host = mmc_priv(mmc);
839 struct tmio_mmc_data *pdata = host->pdata;
840
841 return !((pdata->flags & TMIO_MMC_WRPROTECT_DISABLE) ||
842 (sd_ctrl_read32(host, CTL_STATUS) & TMIO_STAT_WRPROTECT));
843 }
844
845 static int tmio_mmc_get_cd(struct mmc_host *mmc)
846 {
847 struct tmio_mmc_host *host = mmc_priv(mmc);
848 struct tmio_mmc_data *pdata = host->pdata;
849
850 if (!pdata->get_cd)
851 return -ENOSYS;
852 else
853 return pdata->get_cd(host->pdev);
854 }
855
856 static const struct mmc_host_ops tmio_mmc_ops = {
857 .request = tmio_mmc_request,
858 .set_ios = tmio_mmc_set_ios,
859 .get_ro = tmio_mmc_get_ro,
860 .get_cd = tmio_mmc_get_cd,
861 .enable_sdio_irq = tmio_mmc_enable_sdio_irq,
862 };
863
864 int __devinit tmio_mmc_host_probe(struct tmio_mmc_host **host,
865 struct platform_device *pdev,
866 struct tmio_mmc_data *pdata)
867 {
868 struct tmio_mmc_host *_host;
869 struct mmc_host *mmc;
870 struct resource *res_ctl;
871 int ret;
872 u32 irq_mask = TMIO_MASK_CMD;
873
874 res_ctl = platform_get_resource(pdev, IORESOURCE_MEM, 0);
875 if (!res_ctl)
876 return -EINVAL;
877
878 mmc = mmc_alloc_host(sizeof(struct tmio_mmc_host), &pdev->dev);
879 if (!mmc)
880 return -ENOMEM;
881
882 pdata->dev = &pdev->dev;
883 _host = mmc_priv(mmc);
884 _host->pdata = pdata;
885 _host->mmc = mmc;
886 _host->pdev = pdev;
887 platform_set_drvdata(pdev, mmc);
888
889 _host->set_pwr = pdata->set_pwr;
890 _host->set_clk_div = pdata->set_clk_div;
891
892 /* SD control register space size is 0x200, 0x400 for bus_shift=1 */
893 _host->bus_shift = resource_size(res_ctl) >> 10;
894
895 _host->ctl = ioremap(res_ctl->start, resource_size(res_ctl));
896 if (!_host->ctl) {
897 ret = -ENOMEM;
898 goto host_free;
899 }
900
901 mmc->ops = &tmio_mmc_ops;
902 mmc->caps = MMC_CAP_4_BIT_DATA | pdata->capabilities;
903 mmc->f_max = pdata->hclk;
904 mmc->f_min = mmc->f_max / 512;
905 mmc->max_segs = 32;
906 mmc->max_blk_size = 512;
907 mmc->max_blk_count = (PAGE_CACHE_SIZE / mmc->max_blk_size) *
908 mmc->max_segs;
909 mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count;
910 mmc->max_seg_size = mmc->max_req_size;
911 if (pdata->ocr_mask)
912 mmc->ocr_avail = pdata->ocr_mask;
913 else
914 mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
915
916 pdata->power = false;
917 pm_runtime_enable(&pdev->dev);
918 ret = pm_runtime_resume(&pdev->dev);
919 if (ret < 0)
920 goto pm_disable;
921
922 /*
923 * There are 4 different scenarios for the card detection:
924 * 1) an external gpio irq handles the cd (best for power savings)
925 * 2) internal sdhi irq handles the cd
926 * 3) a worker thread polls the sdhi - indicated by MMC_CAP_NEEDS_POLL
927 * 4) the medium is non-removable - indicated by MMC_CAP_NONREMOVABLE
928 *
929 * While we increment the rtpm counter for all scenarios when the mmc
930 * core activates us by calling an appropriate set_ios(), we must
931 * additionally ensure that in case 2) the tmio mmc hardware stays
932 * powered on during runtime for the card detection to work.
933 */
934 if (!(pdata->flags & TMIO_MMC_HAS_COLD_CD
935 || mmc->caps & MMC_CAP_NEEDS_POLL
936 || mmc->caps & MMC_CAP_NONREMOVABLE))
937 pm_runtime_get_noresume(&pdev->dev);
938
939 tmio_mmc_clk_stop(_host);
940 tmio_mmc_reset(_host);
941
942 _host->sdcard_irq_mask = sd_ctrl_read32(_host, CTL_IRQ_MASK);
943 tmio_mmc_disable_mmc_irqs(_host, TMIO_MASK_ALL);
944 if (pdata->flags & TMIO_MMC_SDIO_IRQ)
945 tmio_mmc_enable_sdio_irq(mmc, 0);
946
947 spin_lock_init(&_host->lock);
948 mutex_init(&_host->ios_lock);
949
950 /* Init delayed work for request timeouts */
951 INIT_DELAYED_WORK(&_host->delayed_reset_work, tmio_mmc_reset_work);
952 INIT_WORK(&_host->done, tmio_mmc_done_work);
953
954 /* See if we also get DMA */
955 tmio_mmc_request_dma(_host, pdata);
956
957 mmc_add_host(mmc);
958
959 dev_pm_qos_expose_latency_limit(&pdev->dev, 100);
960
961 /* Unmask the IRQs we want to know about */
962 if (!_host->chan_rx)
963 irq_mask |= TMIO_MASK_READOP;
964 if (!_host->chan_tx)
965 irq_mask |= TMIO_MASK_WRITEOP;
966
967 tmio_mmc_enable_mmc_irqs(_host, irq_mask);
968
969 *host = _host;
970
971 return 0;
972
973 pm_disable:
974 pm_runtime_disable(&pdev->dev);
975 iounmap(_host->ctl);
976 host_free:
977 mmc_free_host(mmc);
978
979 return ret;
980 }
981 EXPORT_SYMBOL(tmio_mmc_host_probe);
982
983 void tmio_mmc_host_remove(struct tmio_mmc_host *host)
984 {
985 struct platform_device *pdev = host->pdev;
986
987 /*
988 * We don't have to manipulate pdata->power here: if there is a card in
989 * the slot, the runtime PM is active and our .runtime_resume() will not
990 * be run. If there is no card in the slot and the platform can suspend
991 * the controller, the runtime PM is suspended and pdata->power == false,
992 * so, our .runtime_resume() will not try to detect a card in the slot.
993 */
994 if (host->pdata->flags & TMIO_MMC_HAS_COLD_CD
995 || host->mmc->caps & MMC_CAP_NEEDS_POLL
996 || host->mmc->caps & MMC_CAP_NONREMOVABLE)
997 pm_runtime_get_sync(&pdev->dev);
998
999 dev_pm_qos_hide_latency_limit(&pdev->dev);
1000
1001 mmc_remove_host(host->mmc);
1002 cancel_work_sync(&host->done);
1003 cancel_delayed_work_sync(&host->delayed_reset_work);
1004 tmio_mmc_release_dma(host);
1005
1006 pm_runtime_put_sync(&pdev->dev);
1007 pm_runtime_disable(&pdev->dev);
1008
1009 iounmap(host->ctl);
1010 mmc_free_host(host->mmc);
1011 }
1012 EXPORT_SYMBOL(tmio_mmc_host_remove);
1013
1014 #ifdef CONFIG_PM
1015 int tmio_mmc_host_suspend(struct device *dev)
1016 {
1017 struct mmc_host *mmc = dev_get_drvdata(dev);
1018 struct tmio_mmc_host *host = mmc_priv(mmc);
1019 int ret = mmc_suspend_host(mmc);
1020
1021 if (!ret)
1022 tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_ALL);
1023
1024 host->pm_error = pm_runtime_put_sync(dev);
1025
1026 return ret;
1027 }
1028 EXPORT_SYMBOL(tmio_mmc_host_suspend);
1029
1030 int tmio_mmc_host_resume(struct device *dev)
1031 {
1032 struct mmc_host *mmc = dev_get_drvdata(dev);
1033 struct tmio_mmc_host *host = mmc_priv(mmc);
1034
1035 /* The MMC core will perform the complete set up */
1036 host->pdata->power = false;
1037
1038 host->pm_global = true;
1039 if (!host->pm_error)
1040 pm_runtime_get_sync(dev);
1041
1042 if (host->pm_global) {
1043 /* Runtime PM resume callback didn't run */
1044 tmio_mmc_reset(host);
1045 tmio_mmc_enable_dma(host, true);
1046 host->pm_global = false;
1047 }
1048
1049 return mmc_resume_host(mmc);
1050 }
1051 EXPORT_SYMBOL(tmio_mmc_host_resume);
1052
1053 #endif /* CONFIG_PM */
1054
1055 int tmio_mmc_host_runtime_suspend(struct device *dev)
1056 {
1057 return 0;
1058 }
1059 EXPORT_SYMBOL(tmio_mmc_host_runtime_suspend);
1060
1061 int tmio_mmc_host_runtime_resume(struct device *dev)
1062 {
1063 struct mmc_host *mmc = dev_get_drvdata(dev);
1064 struct tmio_mmc_host *host = mmc_priv(mmc);
1065 struct tmio_mmc_data *pdata = host->pdata;
1066
1067 tmio_mmc_reset(host);
1068 tmio_mmc_enable_dma(host, true);
1069
1070 if (pdata->power) {
1071 /* Only entered after a card-insert interrupt */
1072 if (!mmc->card)
1073 tmio_mmc_set_ios(mmc, &mmc->ios);
1074 mmc_detect_change(mmc, msecs_to_jiffies(100));
1075 }
1076 host->pm_global = false;
1077
1078 return 0;
1079 }
1080 EXPORT_SYMBOL(tmio_mmc_host_runtime_resume);
1081
1082 MODULE_LICENSE("GPL v2");