2 * linux/drivers/mmc/host/tmio_mmc_pio.c
4 * Copyright (C) 2016 Sang Engineering, Wolfram Sang
5 * Copyright (C) 2015-16 Renesas Electronics Corporation
6 * Copyright (C) 2011 Guennadi Liakhovetski
7 * Copyright (C) 2007 Ian Molton
8 * Copyright (C) 2004 Ian Molton
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
14 * Driver for the MMC / SD / SDIO IP found in:
16 * TC6393XB, TC6391XB, TC6387XB, T7L66XB, ASIC3, SH-Mobile SoCs
18 * This driver draws mainly on scattered spec sheets, Reverse engineering
19 * of the toshiba e800 SD driver and some parts of the 2.4 ASIC3 driver (4 bit
20 * support). (Further 4 bit support from a later datasheet).
23 * Investigate using a workqueue for PIO transfers
25 * Better Power management
26 * Handle MMC errors better
27 * double buffer support
31 #include <linux/delay.h>
32 #include <linux/device.h>
33 #include <linux/highmem.h>
34 #include <linux/interrupt.h>
36 #include <linux/irq.h>
37 #include <linux/mfd/tmio.h>
38 #include <linux/mmc/card.h>
39 #include <linux/mmc/host.h>
40 #include <linux/mmc/mmc.h>
41 #include <linux/mmc/slot-gpio.h>
42 #include <linux/module.h>
43 #include <linux/pagemap.h>
44 #include <linux/platform_device.h>
45 #include <linux/pm_qos.h>
46 #include <linux/pm_runtime.h>
47 #include <linux/regulator/consumer.h>
48 #include <linux/mmc/sdio.h>
49 #include <linux/scatterlist.h>
50 #include <linux/spinlock.h>
51 #include <linux/workqueue.h>
55 void tmio_mmc_enable_mmc_irqs(struct tmio_mmc_host
*host
, u32 i
)
57 host
->sdcard_irq_mask
&= ~(i
& TMIO_MASK_IRQ
);
58 sd_ctrl_write32_as_16_and_16(host
, CTL_IRQ_MASK
, host
->sdcard_irq_mask
);
61 void tmio_mmc_disable_mmc_irqs(struct tmio_mmc_host
*host
, u32 i
)
63 host
->sdcard_irq_mask
|= (i
& TMIO_MASK_IRQ
);
64 sd_ctrl_write32_as_16_and_16(host
, CTL_IRQ_MASK
, host
->sdcard_irq_mask
);
67 static void tmio_mmc_ack_mmc_irqs(struct tmio_mmc_host
*host
, u32 i
)
69 sd_ctrl_write32_as_16_and_16(host
, CTL_STATUS
, ~i
);
72 static void tmio_mmc_init_sg(struct tmio_mmc_host
*host
, struct mmc_data
*data
)
74 host
->sg_len
= data
->sg_len
;
75 host
->sg_ptr
= data
->sg
;
76 host
->sg_orig
= data
->sg
;
80 static int tmio_mmc_next_sg(struct tmio_mmc_host
*host
)
82 host
->sg_ptr
= sg_next(host
->sg_ptr
);
84 return --host
->sg_len
;
87 #define CMDREQ_TIMEOUT 5000
89 #ifdef CONFIG_MMC_DEBUG
91 #define STATUS_TO_TEXT(a, status, i) \
93 if (status & TMIO_STAT_##a) { \
100 static void pr_debug_status(u32 status
)
103 pr_debug("status: %08x = ", status
);
104 STATUS_TO_TEXT(CARD_REMOVE
, status
, i
);
105 STATUS_TO_TEXT(CARD_INSERT
, status
, i
);
106 STATUS_TO_TEXT(SIGSTATE
, status
, i
);
107 STATUS_TO_TEXT(WRPROTECT
, status
, i
);
108 STATUS_TO_TEXT(CARD_REMOVE_A
, status
, i
);
109 STATUS_TO_TEXT(CARD_INSERT_A
, status
, i
);
110 STATUS_TO_TEXT(SIGSTATE_A
, status
, i
);
111 STATUS_TO_TEXT(CMD_IDX_ERR
, status
, i
);
112 STATUS_TO_TEXT(STOPBIT_ERR
, status
, i
);
113 STATUS_TO_TEXT(ILL_FUNC
, status
, i
);
114 STATUS_TO_TEXT(CMD_BUSY
, status
, i
);
115 STATUS_TO_TEXT(CMDRESPEND
, status
, i
);
116 STATUS_TO_TEXT(DATAEND
, status
, i
);
117 STATUS_TO_TEXT(CRCFAIL
, status
, i
);
118 STATUS_TO_TEXT(DATATIMEOUT
, status
, i
);
119 STATUS_TO_TEXT(CMDTIMEOUT
, status
, i
);
120 STATUS_TO_TEXT(RXOVERFLOW
, status
, i
);
121 STATUS_TO_TEXT(TXUNDERRUN
, status
, i
);
122 STATUS_TO_TEXT(RXRDY
, status
, i
);
123 STATUS_TO_TEXT(TXRQ
, status
, i
);
124 STATUS_TO_TEXT(ILL_ACCESS
, status
, i
);
129 #define pr_debug_status(s) do { } while (0)
132 static void tmio_mmc_enable_sdio_irq(struct mmc_host
*mmc
, int enable
)
134 struct tmio_mmc_host
*host
= mmc_priv(mmc
);
136 if (enable
&& !host
->sdio_irq_enabled
) {
139 /* Keep device active while SDIO irq is enabled */
140 pm_runtime_get_sync(mmc_dev(mmc
));
142 host
->sdio_irq_enabled
= true;
143 host
->sdio_irq_mask
= TMIO_SDIO_MASK_ALL
&
144 ~TMIO_SDIO_STAT_IOIRQ
;
146 /* Clear obsolete interrupts before enabling */
147 sdio_status
= sd_ctrl_read16(host
, CTL_SDIO_STATUS
) & ~TMIO_SDIO_MASK_ALL
;
148 if (host
->pdata
->flags
& TMIO_MMC_SDIO_STATUS_SETBITS
)
149 sdio_status
|= TMIO_SDIO_SETBITS_MASK
;
150 sd_ctrl_write16(host
, CTL_SDIO_STATUS
, sdio_status
);
152 sd_ctrl_write16(host
, CTL_SDIO_IRQ_MASK
, host
->sdio_irq_mask
);
153 } else if (!enable
&& host
->sdio_irq_enabled
) {
154 host
->sdio_irq_mask
= TMIO_SDIO_MASK_ALL
;
155 sd_ctrl_write16(host
, CTL_SDIO_IRQ_MASK
, host
->sdio_irq_mask
);
157 host
->sdio_irq_enabled
= false;
158 pm_runtime_mark_last_busy(mmc_dev(mmc
));
159 pm_runtime_put_autosuspend(mmc_dev(mmc
));
163 static void tmio_mmc_clk_start(struct tmio_mmc_host
*host
)
165 sd_ctrl_write16(host
, CTL_SD_CARD_CLK_CTL
, CLK_CTL_SCLKEN
|
166 sd_ctrl_read16(host
, CTL_SD_CARD_CLK_CTL
));
167 msleep(host
->pdata
->flags
& TMIO_MMC_MIN_RCAR2
? 1 : 10);
169 if (host
->pdata
->flags
& TMIO_MMC_HAVE_HIGH_REG
) {
170 sd_ctrl_write16(host
, CTL_CLK_AND_WAIT_CTL
, 0x0100);
175 static void tmio_mmc_clk_stop(struct tmio_mmc_host
*host
)
177 if (host
->pdata
->flags
& TMIO_MMC_HAVE_HIGH_REG
) {
178 sd_ctrl_write16(host
, CTL_CLK_AND_WAIT_CTL
, 0x0000);
182 sd_ctrl_write16(host
, CTL_SD_CARD_CLK_CTL
, ~CLK_CTL_SCLKEN
&
183 sd_ctrl_read16(host
, CTL_SD_CARD_CLK_CTL
));
184 msleep(host
->pdata
->flags
& TMIO_MMC_MIN_RCAR2
? 5 : 10);
187 static void tmio_mmc_set_clock(struct tmio_mmc_host
*host
,
188 unsigned int new_clock
)
192 if (new_clock
== 0) {
193 tmio_mmc_clk_stop(host
);
197 if (host
->clk_update
)
198 clock
= host
->clk_update(host
, new_clock
) / 512;
200 clock
= host
->mmc
->f_min
;
202 for (clk
= 0x80000080; new_clock
>= (clock
<< 1); clk
>>= 1)
205 /* 1/1 clock is option */
206 if ((host
->pdata
->flags
& TMIO_MMC_CLK_ACTUAL
) && ((clk
>> 22) & 0x1))
209 if (host
->set_clk_div
)
210 host
->set_clk_div(host
->pdev
, (clk
>> 22) & 1);
212 sd_ctrl_write16(host
, CTL_SD_CARD_CLK_CTL
, ~CLK_CTL_SCLKEN
&
213 sd_ctrl_read16(host
, CTL_SD_CARD_CLK_CTL
));
214 sd_ctrl_write16(host
, CTL_SD_CARD_CLK_CTL
, clk
& CLK_CTL_DIV_MASK
);
215 if (!(host
->pdata
->flags
& TMIO_MMC_MIN_RCAR2
))
218 tmio_mmc_clk_start(host
);
221 static void tmio_mmc_reset(struct tmio_mmc_host
*host
)
223 /* FIXME - should we set stop clock reg here */
224 sd_ctrl_write16(host
, CTL_RESET_SD
, 0x0000);
225 if (host
->pdata
->flags
& TMIO_MMC_HAVE_HIGH_REG
)
226 sd_ctrl_write16(host
, CTL_RESET_SDIO
, 0x0000);
228 sd_ctrl_write16(host
, CTL_RESET_SD
, 0x0001);
229 if (host
->pdata
->flags
& TMIO_MMC_HAVE_HIGH_REG
)
230 sd_ctrl_write16(host
, CTL_RESET_SDIO
, 0x0001);
234 static void tmio_mmc_reset_work(struct work_struct
*work
)
236 struct tmio_mmc_host
*host
= container_of(work
, struct tmio_mmc_host
,
237 delayed_reset_work
.work
);
238 struct mmc_request
*mrq
;
241 spin_lock_irqsave(&host
->lock
, flags
);
245 * is request already finished? Since we use a non-blocking
246 * cancel_delayed_work(), it can happen, that a .set_ios() call preempts
247 * us, so, have to check for IS_ERR(host->mrq)
249 if (IS_ERR_OR_NULL(mrq
)
250 || time_is_after_jiffies(host
->last_req_ts
+
251 msecs_to_jiffies(CMDREQ_TIMEOUT
))) {
252 spin_unlock_irqrestore(&host
->lock
, flags
);
256 dev_warn(&host
->pdev
->dev
,
257 "timeout waiting for hardware interrupt (CMD%u)\n",
261 host
->data
->error
= -ETIMEDOUT
;
263 host
->cmd
->error
= -ETIMEDOUT
;
265 mrq
->cmd
->error
= -ETIMEDOUT
;
269 host
->force_pio
= false;
271 spin_unlock_irqrestore(&host
->lock
, flags
);
273 tmio_mmc_reset(host
);
275 /* Ready for new calls */
278 tmio_mmc_abort_dma(host
);
279 mmc_request_done(host
->mmc
, mrq
);
282 /* called with host->lock held, interrupts disabled */
283 static void tmio_mmc_finish_request(struct tmio_mmc_host
*host
)
285 struct mmc_request
*mrq
;
288 spin_lock_irqsave(&host
->lock
, flags
);
291 if (IS_ERR_OR_NULL(mrq
)) {
292 spin_unlock_irqrestore(&host
->lock
, flags
);
298 host
->force_pio
= false;
300 cancel_delayed_work(&host
->delayed_reset_work
);
303 spin_unlock_irqrestore(&host
->lock
, flags
);
305 if (mrq
->cmd
->error
|| (mrq
->data
&& mrq
->data
->error
))
306 tmio_mmc_abort_dma(host
);
308 if (host
->check_scc_error
)
309 host
->check_scc_error(host
);
311 mmc_request_done(host
->mmc
, mrq
);
314 static void tmio_mmc_done_work(struct work_struct
*work
)
316 struct tmio_mmc_host
*host
= container_of(work
, struct tmio_mmc_host
,
318 tmio_mmc_finish_request(host
);
321 /* These are the bitmasks the tmio chip requires to implement the MMC response
322 * types. Note that R1 and R6 are the same in this scheme. */
323 #define APP_CMD 0x0040
324 #define RESP_NONE 0x0300
325 #define RESP_R1 0x0400
326 #define RESP_R1B 0x0500
327 #define RESP_R2 0x0600
328 #define RESP_R3 0x0700
329 #define DATA_PRESENT 0x0800
330 #define TRANSFER_READ 0x1000
331 #define TRANSFER_MULTI 0x2000
332 #define SECURITY_CMD 0x4000
333 #define NO_CMD12_ISSUE 0x4000 /* TMIO_MMC_HAVE_CMD12_CTRL */
335 static int tmio_mmc_start_command(struct tmio_mmc_host
*host
, struct mmc_command
*cmd
)
337 struct mmc_data
*data
= host
->data
;
339 u32 irq_mask
= TMIO_MASK_CMD
;
341 /* CMD12 is handled by hardware */
342 if (cmd
->opcode
== MMC_STOP_TRANSMISSION
&& !cmd
->arg
) {
343 sd_ctrl_write16(host
, CTL_STOP_INTERNAL_ACTION
, 0x001);
347 switch (mmc_resp_type(cmd
)) {
348 case MMC_RSP_NONE
: c
|= RESP_NONE
; break;
350 case MMC_RSP_R1_NO_CRC
:
352 case MMC_RSP_R1B
: c
|= RESP_R1B
; break;
353 case MMC_RSP_R2
: c
|= RESP_R2
; break;
354 case MMC_RSP_R3
: c
|= RESP_R3
; break;
356 pr_debug("Unknown response type %d\n", mmc_resp_type(cmd
));
362 /* FIXME - this seems to be ok commented out but the spec suggest this bit
363 * should be set when issuing app commands.
364 * if(cmd->flags & MMC_FLAG_ACMD)
369 if (data
->blocks
> 1) {
370 sd_ctrl_write16(host
, CTL_STOP_INTERNAL_ACTION
, 0x100);
374 * Disable auto CMD12 at IO_RW_EXTENDED when
375 * multiple block transfer
377 if ((host
->pdata
->flags
& TMIO_MMC_HAVE_CMD12_CTRL
) &&
378 (cmd
->opcode
== SD_IO_RW_EXTENDED
))
381 if (data
->flags
& MMC_DATA_READ
)
385 if (!host
->native_hotplug
)
386 irq_mask
&= ~(TMIO_STAT_CARD_REMOVE
| TMIO_STAT_CARD_INSERT
);
387 tmio_mmc_enable_mmc_irqs(host
, irq_mask
);
389 /* Fire off the command */
390 sd_ctrl_write32_as_16_and_16(host
, CTL_ARG_REG
, cmd
->arg
);
391 sd_ctrl_write16(host
, CTL_SD_CMD
, c
);
396 static void tmio_mmc_transfer_data(struct tmio_mmc_host
*host
,
400 int is_read
= host
->data
->flags
& MMC_DATA_READ
;
406 if (host
->pdata
->flags
& TMIO_MMC_32BIT_DATA_PORT
) {
410 sd_ctrl_read32_rep(host
, CTL_SD_DATA_PORT
, (u32
*)buf
,
413 sd_ctrl_write32_rep(host
, CTL_SD_DATA_PORT
, (u32
*)buf
,
416 /* if count was multiple of 4 */
420 buf8
= (u8
*)(buf
+ (count
>> 2));
424 sd_ctrl_read32_rep(host
, CTL_SD_DATA_PORT
,
426 memcpy(buf8
, data
, count
);
428 memcpy(data
, buf8
, count
);
429 sd_ctrl_write32_rep(host
, CTL_SD_DATA_PORT
,
437 sd_ctrl_read16_rep(host
, CTL_SD_DATA_PORT
, buf
, count
>> 1);
439 sd_ctrl_write16_rep(host
, CTL_SD_DATA_PORT
, buf
, count
>> 1);
441 /* if count was even number */
445 /* if count was odd number */
446 buf8
= (u8
*)(buf
+ (count
>> 1));
451 * driver and this function are assuming that
452 * it is used as little endian
455 *buf8
= sd_ctrl_read16(host
, CTL_SD_DATA_PORT
) & 0xff;
457 sd_ctrl_write16(host
, CTL_SD_DATA_PORT
, *buf8
);
461 * This chip always returns (at least?) as much data as you ask for.
462 * I'm unsure what happens if you ask for less than a block. This should be
463 * looked into to ensure that a funny length read doesn't hose the controller.
465 static void tmio_mmc_pio_irq(struct tmio_mmc_host
*host
)
467 struct mmc_data
*data
= host
->data
;
473 if ((host
->chan_tx
|| host
->chan_rx
) && !host
->force_pio
) {
474 pr_err("PIO IRQ in DMA mode!\n");
477 pr_debug("Spurious PIO IRQ\n");
481 sg_virt
= tmio_mmc_kmap_atomic(host
->sg_ptr
, &flags
);
482 buf
= (unsigned short *)(sg_virt
+ host
->sg_off
);
484 count
= host
->sg_ptr
->length
- host
->sg_off
;
485 if (count
> data
->blksz
)
488 pr_debug("count: %08x offset: %08x flags %08x\n",
489 count
, host
->sg_off
, data
->flags
);
491 /* Transfer the data */
492 tmio_mmc_transfer_data(host
, buf
, count
);
494 host
->sg_off
+= count
;
496 tmio_mmc_kunmap_atomic(host
->sg_ptr
, &flags
, sg_virt
);
498 if (host
->sg_off
== host
->sg_ptr
->length
)
499 tmio_mmc_next_sg(host
);
504 static void tmio_mmc_check_bounce_buffer(struct tmio_mmc_host
*host
)
506 if (host
->sg_ptr
== &host
->bounce_sg
) {
508 void *sg_vaddr
= tmio_mmc_kmap_atomic(host
->sg_orig
, &flags
);
509 memcpy(sg_vaddr
, host
->bounce_buf
, host
->bounce_sg
.length
);
510 tmio_mmc_kunmap_atomic(host
->sg_orig
, &flags
, sg_vaddr
);
514 /* needs to be called with host->lock held */
515 void tmio_mmc_do_data_irq(struct tmio_mmc_host
*host
)
517 struct mmc_data
*data
= host
->data
;
518 struct mmc_command
*stop
;
523 dev_warn(&host
->pdev
->dev
, "Spurious data end IRQ\n");
528 /* FIXME - return correct transfer count on errors */
530 data
->bytes_xfered
= data
->blocks
* data
->blksz
;
532 data
->bytes_xfered
= 0;
534 pr_debug("Completed data request\n");
537 * FIXME: other drivers allow an optional stop command of any given type
538 * which we dont do, as the chip can auto generate them.
539 * Perhaps we can be smarter about when to use auto CMD12 and
540 * only issue the auto request when we know this is the desired
541 * stop command, allowing fallback to the stop command the
542 * upper layers expect. For now, we do what works.
545 if (data
->flags
& MMC_DATA_READ
) {
546 if (host
->chan_rx
&& !host
->force_pio
)
547 tmio_mmc_check_bounce_buffer(host
);
548 dev_dbg(&host
->pdev
->dev
, "Complete Rx request %p\n",
551 dev_dbg(&host
->pdev
->dev
, "Complete Tx request %p\n",
556 if (stop
->opcode
== MMC_STOP_TRANSMISSION
&& !stop
->arg
)
557 sd_ctrl_write16(host
, CTL_STOP_INTERNAL_ACTION
, 0x000);
562 schedule_work(&host
->done
);
565 static void tmio_mmc_data_irq(struct tmio_mmc_host
*host
, unsigned int stat
)
567 struct mmc_data
*data
;
568 spin_lock(&host
->lock
);
574 if (stat
& TMIO_STAT_CRCFAIL
|| stat
& TMIO_STAT_STOPBIT_ERR
||
575 stat
& TMIO_STAT_TXUNDERRUN
)
576 data
->error
= -EILSEQ
;
577 if (host
->chan_tx
&& (data
->flags
& MMC_DATA_WRITE
) && !host
->force_pio
) {
578 u32 status
= sd_ctrl_read16_and_16_as_32(host
, CTL_STATUS
);
582 * Has all data been written out yet? Testing on SuperH showed,
583 * that in most cases the first interrupt comes already with the
584 * BUSY status bit clear, but on some operations, like mount or
585 * in the beginning of a write / sync / umount, there is one
586 * DATAEND interrupt with the BUSY bit set, in this cases
587 * waiting for one more interrupt fixes the problem.
589 if (host
->pdata
->flags
& TMIO_MMC_HAS_IDLE_WAIT
) {
590 if (status
& TMIO_STAT_SCLKDIVEN
)
593 if (!(status
& TMIO_STAT_CMD_BUSY
))
598 tmio_mmc_disable_mmc_irqs(host
, TMIO_STAT_DATAEND
);
599 tasklet_schedule(&host
->dma_complete
);
601 } else if (host
->chan_rx
&& (data
->flags
& MMC_DATA_READ
) && !host
->force_pio
) {
602 tmio_mmc_disable_mmc_irqs(host
, TMIO_STAT_DATAEND
);
603 tasklet_schedule(&host
->dma_complete
);
605 tmio_mmc_do_data_irq(host
);
606 tmio_mmc_disable_mmc_irqs(host
, TMIO_MASK_READOP
| TMIO_MASK_WRITEOP
);
609 spin_unlock(&host
->lock
);
612 static void tmio_mmc_cmd_irq(struct tmio_mmc_host
*host
,
615 struct mmc_command
*cmd
= host
->cmd
;
618 spin_lock(&host
->lock
);
621 pr_debug("Spurious CMD irq\n");
625 /* This controller is sicker than the PXA one. Not only do we need to
626 * drop the top 8 bits of the first response word, we also need to
627 * modify the order of the response for short response command types.
630 for (i
= 3, addr
= CTL_RESPONSE
; i
>= 0 ; i
--, addr
+= 4)
631 cmd
->resp
[i
] = sd_ctrl_read16_and_16_as_32(host
, addr
);
633 if (cmd
->flags
& MMC_RSP_136
) {
634 cmd
->resp
[0] = (cmd
->resp
[0] << 8) | (cmd
->resp
[1] >> 24);
635 cmd
->resp
[1] = (cmd
->resp
[1] << 8) | (cmd
->resp
[2] >> 24);
636 cmd
->resp
[2] = (cmd
->resp
[2] << 8) | (cmd
->resp
[3] >> 24);
638 } else if (cmd
->flags
& MMC_RSP_R3
) {
639 cmd
->resp
[0] = cmd
->resp
[3];
642 if (stat
& TMIO_STAT_CMDTIMEOUT
)
643 cmd
->error
= -ETIMEDOUT
;
644 else if ((stat
& TMIO_STAT_CRCFAIL
&& cmd
->flags
& MMC_RSP_CRC
) ||
645 stat
& TMIO_STAT_STOPBIT_ERR
||
646 stat
& TMIO_STAT_CMD_IDX_ERR
)
647 cmd
->error
= -EILSEQ
;
649 /* If there is data to handle we enable data IRQs here, and
650 * we will ultimatley finish the request in the data_end handler.
651 * If theres no data or we encountered an error, finish now.
653 if (host
->data
&& (!cmd
->error
|| cmd
->error
== -EILSEQ
)) {
654 if (host
->data
->flags
& MMC_DATA_READ
) {
655 if (host
->force_pio
|| !host
->chan_rx
)
656 tmio_mmc_enable_mmc_irqs(host
, TMIO_MASK_READOP
);
658 tasklet_schedule(&host
->dma_issue
);
660 if (host
->force_pio
|| !host
->chan_tx
)
661 tmio_mmc_enable_mmc_irqs(host
, TMIO_MASK_WRITEOP
);
663 tasklet_schedule(&host
->dma_issue
);
666 schedule_work(&host
->done
);
670 spin_unlock(&host
->lock
);
673 static bool __tmio_mmc_card_detect_irq(struct tmio_mmc_host
*host
,
674 int ireg
, int status
)
676 struct mmc_host
*mmc
= host
->mmc
;
678 /* Card insert / remove attempts */
679 if (ireg
& (TMIO_STAT_CARD_INSERT
| TMIO_STAT_CARD_REMOVE
)) {
680 tmio_mmc_ack_mmc_irqs(host
, TMIO_STAT_CARD_INSERT
|
681 TMIO_STAT_CARD_REMOVE
);
682 if ((((ireg
& TMIO_STAT_CARD_REMOVE
) && mmc
->card
) ||
683 ((ireg
& TMIO_STAT_CARD_INSERT
) && !mmc
->card
)) &&
684 !work_pending(&mmc
->detect
.work
))
685 mmc_detect_change(host
->mmc
, msecs_to_jiffies(100));
692 static bool __tmio_mmc_sdcard_irq(struct tmio_mmc_host
*host
,
693 int ireg
, int status
)
695 /* Command completion */
696 if (ireg
& (TMIO_STAT_CMDRESPEND
| TMIO_STAT_CMDTIMEOUT
)) {
697 tmio_mmc_ack_mmc_irqs(host
,
698 TMIO_STAT_CMDRESPEND
|
699 TMIO_STAT_CMDTIMEOUT
);
700 tmio_mmc_cmd_irq(host
, status
);
705 if (ireg
& (TMIO_STAT_RXRDY
| TMIO_STAT_TXRQ
)) {
706 tmio_mmc_ack_mmc_irqs(host
, TMIO_STAT_RXRDY
| TMIO_STAT_TXRQ
);
707 tmio_mmc_pio_irq(host
);
711 /* Data transfer completion */
712 if (ireg
& TMIO_STAT_DATAEND
) {
713 tmio_mmc_ack_mmc_irqs(host
, TMIO_STAT_DATAEND
);
714 tmio_mmc_data_irq(host
, status
);
721 static void __tmio_mmc_sdio_irq(struct tmio_mmc_host
*host
)
723 struct mmc_host
*mmc
= host
->mmc
;
724 struct tmio_mmc_data
*pdata
= host
->pdata
;
725 unsigned int ireg
, status
;
726 unsigned int sdio_status
;
728 if (!(pdata
->flags
& TMIO_MMC_SDIO_IRQ
))
731 status
= sd_ctrl_read16(host
, CTL_SDIO_STATUS
);
732 ireg
= status
& TMIO_SDIO_MASK_ALL
& ~host
->sdio_irq_mask
;
734 sdio_status
= status
& ~TMIO_SDIO_MASK_ALL
;
735 if (pdata
->flags
& TMIO_MMC_SDIO_STATUS_SETBITS
)
736 sdio_status
|= TMIO_SDIO_SETBITS_MASK
;
738 sd_ctrl_write16(host
, CTL_SDIO_STATUS
, sdio_status
);
740 if (mmc
->caps
& MMC_CAP_SDIO_IRQ
&& ireg
& TMIO_SDIO_STAT_IOIRQ
)
741 mmc_signal_sdio_irq(mmc
);
744 irqreturn_t
tmio_mmc_irq(int irq
, void *devid
)
746 struct tmio_mmc_host
*host
= devid
;
747 unsigned int ireg
, status
;
749 status
= sd_ctrl_read16_and_16_as_32(host
, CTL_STATUS
);
750 ireg
= status
& TMIO_MASK_IRQ
& ~host
->sdcard_irq_mask
;
752 pr_debug_status(status
);
753 pr_debug_status(ireg
);
755 /* Clear the status except the interrupt status */
756 sd_ctrl_write32_as_16_and_16(host
, CTL_STATUS
, TMIO_MASK_IRQ
);
758 if (__tmio_mmc_card_detect_irq(host
, ireg
, status
))
760 if (__tmio_mmc_sdcard_irq(host
, ireg
, status
))
763 __tmio_mmc_sdio_irq(host
);
767 EXPORT_SYMBOL(tmio_mmc_irq
);
769 static int tmio_mmc_start_data(struct tmio_mmc_host
*host
,
770 struct mmc_data
*data
)
772 struct tmio_mmc_data
*pdata
= host
->pdata
;
774 pr_debug("setup data transfer: blocksize %08x nr_blocks %d\n",
775 data
->blksz
, data
->blocks
);
777 /* Some hardware cannot perform 2 byte requests in 4/8 bit mode */
778 if (host
->mmc
->ios
.bus_width
== MMC_BUS_WIDTH_4
||
779 host
->mmc
->ios
.bus_width
== MMC_BUS_WIDTH_8
) {
780 int blksz_2bytes
= pdata
->flags
& TMIO_MMC_BLKSZ_2BYTES
;
782 if (data
->blksz
< 2 || (data
->blksz
< 4 && !blksz_2bytes
)) {
783 pr_err("%s: %d byte block unsupported in 4/8 bit mode\n",
784 mmc_hostname(host
->mmc
), data
->blksz
);
789 tmio_mmc_init_sg(host
, data
);
792 /* Set transfer length / blocksize */
793 sd_ctrl_write16(host
, CTL_SD_XFER_LEN
, data
->blksz
);
794 sd_ctrl_write16(host
, CTL_XFER_BLK_COUNT
, data
->blocks
);
796 tmio_mmc_start_dma(host
, data
);
801 static void tmio_mmc_hw_reset(struct mmc_host
*mmc
)
803 struct tmio_mmc_host
*host
= mmc_priv(mmc
);
806 host
->hw_reset(host
);
809 static int tmio_mmc_execute_tuning(struct mmc_host
*mmc
, u32 opcode
)
811 struct tmio_mmc_host
*host
= mmc_priv(mmc
);
814 if (!host
->tap_num
) {
815 if (!host
->init_tuning
|| !host
->select_tuning
)
816 /* Tuning is not supported */
819 host
->tap_num
= host
->init_tuning(host
);
821 /* Tuning is not supported */
825 if (host
->tap_num
* 2 >= sizeof(host
->taps
) * BITS_PER_BYTE
) {
826 dev_warn_once(&host
->pdev
->dev
,
827 "Too many taps, skipping tuning. Please consider updating size of taps field of tmio_mmc_host\n");
831 bitmap_zero(host
->taps
, host
->tap_num
* 2);
833 /* Issue CMD19 twice for each tap */
834 for (i
= 0; i
< 2 * host
->tap_num
; i
++) {
835 if (host
->prepare_tuning
)
836 host
->prepare_tuning(host
, i
% host
->tap_num
);
838 ret
= mmc_send_tuning(mmc
, opcode
, NULL
);
839 if (ret
&& ret
!= -EILSEQ
)
842 set_bit(i
, host
->taps
);
847 ret
= host
->select_tuning(host
);
851 dev_warn(&host
->pdev
->dev
, "Tuning procedure failed\n");
852 tmio_mmc_hw_reset(mmc
);
858 /* Process requests from the MMC layer */
859 static void tmio_mmc_request(struct mmc_host
*mmc
, struct mmc_request
*mrq
)
861 struct tmio_mmc_host
*host
= mmc_priv(mmc
);
865 spin_lock_irqsave(&host
->lock
, flags
);
868 pr_debug("request not null\n");
869 if (IS_ERR(host
->mrq
)) {
870 spin_unlock_irqrestore(&host
->lock
, flags
);
871 mrq
->cmd
->error
= -EAGAIN
;
872 mmc_request_done(mmc
, mrq
);
877 host
->last_req_ts
= jiffies
;
881 spin_unlock_irqrestore(&host
->lock
, flags
);
884 ret
= tmio_mmc_start_data(host
, mrq
->data
);
889 ret
= tmio_mmc_start_command(host
, mrq
->cmd
);
891 schedule_delayed_work(&host
->delayed_reset_work
,
892 msecs_to_jiffies(CMDREQ_TIMEOUT
));
897 host
->force_pio
= false;
899 mrq
->cmd
->error
= ret
;
900 mmc_request_done(mmc
, mrq
);
903 static int tmio_mmc_clk_enable(struct tmio_mmc_host
*host
)
905 if (!host
->clk_enable
)
908 return host
->clk_enable(host
);
911 static void tmio_mmc_clk_disable(struct tmio_mmc_host
*host
)
913 if (host
->clk_disable
)
914 host
->clk_disable(host
);
917 static void tmio_mmc_power_on(struct tmio_mmc_host
*host
, unsigned short vdd
)
919 struct mmc_host
*mmc
= host
->mmc
;
922 /* .set_ios() is returning void, so, no chance to report an error */
925 host
->set_pwr(host
->pdev
, 1);
927 if (!IS_ERR(mmc
->supply
.vmmc
)) {
928 ret
= mmc_regulator_set_ocr(mmc
, mmc
->supply
.vmmc
, vdd
);
930 * Attention: empiric value. With a b43 WiFi SDIO card this
931 * delay proved necessary for reliable card-insertion probing.
932 * 100us were not enough. Is this the same 140us delay, as in
933 * tmio_mmc_set_ios()?
938 * It seems, VccQ should be switched on after Vcc, this is also what the
939 * omap_hsmmc.c driver does.
941 if (!IS_ERR(mmc
->supply
.vqmmc
) && !ret
) {
942 ret
= regulator_enable(mmc
->supply
.vqmmc
);
947 dev_dbg(&host
->pdev
->dev
, "Regulators failed to power up: %d\n",
951 static void tmio_mmc_power_off(struct tmio_mmc_host
*host
)
953 struct mmc_host
*mmc
= host
->mmc
;
955 if (!IS_ERR(mmc
->supply
.vqmmc
))
956 regulator_disable(mmc
->supply
.vqmmc
);
958 if (!IS_ERR(mmc
->supply
.vmmc
))
959 mmc_regulator_set_ocr(mmc
, mmc
->supply
.vmmc
, 0);
962 host
->set_pwr(host
->pdev
, 0);
965 static void tmio_mmc_set_bus_width(struct tmio_mmc_host
*host
,
966 unsigned char bus_width
)
968 u16 reg
= sd_ctrl_read16(host
, CTL_SD_MEM_CARD_OPT
)
969 & ~(CARD_OPT_WIDTH
| CARD_OPT_WIDTH8
);
971 /* reg now applies to MMC_BUS_WIDTH_4 */
972 if (bus_width
== MMC_BUS_WIDTH_1
)
973 reg
|= CARD_OPT_WIDTH
;
974 else if (bus_width
== MMC_BUS_WIDTH_8
)
975 reg
|= CARD_OPT_WIDTH8
;
977 sd_ctrl_write16(host
, CTL_SD_MEM_CARD_OPT
, reg
);
980 /* Set MMC clock / power.
981 * Note: This controller uses a simple divider scheme therefore it cannot
982 * run a MMC card at full speed (20MHz). The max clock is 24MHz on SD, but as
983 * MMC wont run that fast, it has to be clocked at 12MHz which is the next
986 static void tmio_mmc_set_ios(struct mmc_host
*mmc
, struct mmc_ios
*ios
)
988 struct tmio_mmc_host
*host
= mmc_priv(mmc
);
989 struct device
*dev
= &host
->pdev
->dev
;
992 mutex_lock(&host
->ios_lock
);
994 spin_lock_irqsave(&host
->lock
, flags
);
996 if (IS_ERR(host
->mrq
)) {
998 "%s.%d: concurrent .set_ios(), clk %u, mode %u\n",
999 current
->comm
, task_pid_nr(current
),
1000 ios
->clock
, ios
->power_mode
);
1001 host
->mrq
= ERR_PTR(-EINTR
);
1004 "%s.%d: CMD%u active since %lu, now %lu!\n",
1005 current
->comm
, task_pid_nr(current
),
1006 host
->mrq
->cmd
->opcode
, host
->last_req_ts
, jiffies
);
1008 spin_unlock_irqrestore(&host
->lock
, flags
);
1010 mutex_unlock(&host
->ios_lock
);
1014 host
->mrq
= ERR_PTR(-EBUSY
);
1016 spin_unlock_irqrestore(&host
->lock
, flags
);
1018 switch (ios
->power_mode
) {
1020 tmio_mmc_power_off(host
);
1021 tmio_mmc_clk_stop(host
);
1024 tmio_mmc_power_on(host
, ios
->vdd
);
1025 tmio_mmc_set_clock(host
, ios
->clock
);
1026 tmio_mmc_set_bus_width(host
, ios
->bus_width
);
1029 tmio_mmc_set_clock(host
, ios
->clock
);
1030 tmio_mmc_set_bus_width(host
, ios
->bus_width
);
1034 /* Let things settle. delay taken from winCE driver */
1036 if (PTR_ERR(host
->mrq
) == -EINTR
)
1037 dev_dbg(&host
->pdev
->dev
,
1038 "%s.%d: IOS interrupted: clk %u, mode %u",
1039 current
->comm
, task_pid_nr(current
),
1040 ios
->clock
, ios
->power_mode
);
1043 host
->clk_cache
= ios
->clock
;
1045 mutex_unlock(&host
->ios_lock
);
1048 static int tmio_mmc_get_ro(struct mmc_host
*mmc
)
1050 struct tmio_mmc_host
*host
= mmc_priv(mmc
);
1051 struct tmio_mmc_data
*pdata
= host
->pdata
;
1052 int ret
= mmc_gpio_get_ro(mmc
);
1056 ret
= !((pdata
->flags
& TMIO_MMC_WRPROTECT_DISABLE
) ||
1057 (sd_ctrl_read16_and_16_as_32(host
, CTL_STATUS
) & TMIO_STAT_WRPROTECT
));
1062 static int tmio_multi_io_quirk(struct mmc_card
*card
,
1063 unsigned int direction
, int blk_size
)
1065 struct tmio_mmc_host
*host
= mmc_priv(card
->host
);
1067 if (host
->multi_io_quirk
)
1068 return host
->multi_io_quirk(card
, direction
, blk_size
);
1073 static struct mmc_host_ops tmio_mmc_ops
= {
1074 .request
= tmio_mmc_request
,
1075 .set_ios
= tmio_mmc_set_ios
,
1076 .get_ro
= tmio_mmc_get_ro
,
1077 .get_cd
= mmc_gpio_get_cd
,
1078 .enable_sdio_irq
= tmio_mmc_enable_sdio_irq
,
1079 .multi_io_quirk
= tmio_multi_io_quirk
,
1080 .hw_reset
= tmio_mmc_hw_reset
,
1081 .execute_tuning
= tmio_mmc_execute_tuning
,
1084 static int tmio_mmc_init_ocr(struct tmio_mmc_host
*host
)
1086 struct tmio_mmc_data
*pdata
= host
->pdata
;
1087 struct mmc_host
*mmc
= host
->mmc
;
1089 mmc_regulator_get_supply(mmc
);
1091 /* use ocr_mask if no regulator */
1092 if (!mmc
->ocr_avail
)
1093 mmc
->ocr_avail
= pdata
->ocr_mask
;
1097 * There is possibility that regulator has not been probed
1099 if (!mmc
->ocr_avail
)
1100 return -EPROBE_DEFER
;
1105 static void tmio_mmc_of_parse(struct platform_device
*pdev
,
1106 struct tmio_mmc_data
*pdata
)
1108 const struct device_node
*np
= pdev
->dev
.of_node
;
1112 if (of_get_property(np
, "toshiba,mmc-wrprotect-disable", NULL
))
1113 pdata
->flags
|= TMIO_MMC_WRPROTECT_DISABLE
;
1116 struct tmio_mmc_host
*
1117 tmio_mmc_host_alloc(struct platform_device
*pdev
)
1119 struct tmio_mmc_host
*host
;
1120 struct mmc_host
*mmc
;
1122 mmc
= mmc_alloc_host(sizeof(struct tmio_mmc_host
), &pdev
->dev
);
1126 host
= mmc_priv(mmc
);
1132 EXPORT_SYMBOL(tmio_mmc_host_alloc
);
1134 void tmio_mmc_host_free(struct tmio_mmc_host
*host
)
1136 mmc_free_host(host
->mmc
);
1138 EXPORT_SYMBOL(tmio_mmc_host_free
);
1140 int tmio_mmc_host_probe(struct tmio_mmc_host
*_host
,
1141 struct tmio_mmc_data
*pdata
)
1143 struct platform_device
*pdev
= _host
->pdev
;
1144 struct mmc_host
*mmc
= _host
->mmc
;
1145 struct resource
*res_ctl
;
1147 u32 irq_mask
= TMIO_MASK_CMD
;
1149 tmio_mmc_of_parse(pdev
, pdata
);
1151 if (!(pdata
->flags
& TMIO_MMC_HAS_IDLE_WAIT
))
1152 _host
->write16_hook
= NULL
;
1154 res_ctl
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
1158 ret
= mmc_of_parse(mmc
);
1162 _host
->pdata
= pdata
;
1163 platform_set_drvdata(pdev
, mmc
);
1165 _host
->set_pwr
= pdata
->set_pwr
;
1166 _host
->set_clk_div
= pdata
->set_clk_div
;
1168 ret
= tmio_mmc_init_ocr(_host
);
1172 _host
->ctl
= devm_ioremap(&pdev
->dev
,
1173 res_ctl
->start
, resource_size(res_ctl
));
1177 tmio_mmc_ops
.card_busy
= _host
->card_busy
;
1178 tmio_mmc_ops
.start_signal_voltage_switch
= _host
->start_signal_voltage_switch
;
1179 mmc
->ops
= &tmio_mmc_ops
;
1181 mmc
->caps
|= MMC_CAP_4_BIT_DATA
| pdata
->capabilities
;
1182 mmc
->caps2
|= pdata
->capabilities2
;
1184 mmc
->max_blk_size
= 512;
1185 mmc
->max_blk_count
= (PAGE_SIZE
/ mmc
->max_blk_size
) *
1187 mmc
->max_req_size
= mmc
->max_blk_size
* mmc
->max_blk_count
;
1188 mmc
->max_seg_size
= mmc
->max_req_size
;
1190 _host
->native_hotplug
= !(pdata
->flags
& TMIO_MMC_USE_GPIO_CD
||
1191 mmc
->caps
& MMC_CAP_NEEDS_POLL
||
1192 !mmc_card_is_removable(mmc
));
1195 * On Gen2+, eMMC with NONREMOVABLE currently fails because native
1196 * hotplug gets disabled. It seems RuntimePM related yet we need further
1197 * research. Since we are planning a PM overhaul anyway, let's enforce
1198 * for now the device being active by enabling native hotplug always.
1200 if (pdata
->flags
& TMIO_MMC_MIN_RCAR2
)
1201 _host
->native_hotplug
= true;
1203 if (tmio_mmc_clk_enable(_host
) < 0) {
1204 mmc
->f_max
= pdata
->hclk
;
1205 mmc
->f_min
= mmc
->f_max
/ 512;
1209 * Check the sanity of mmc->f_min to prevent tmio_mmc_set_clock() from
1210 * looping forever...
1212 if (mmc
->f_min
== 0)
1216 * While using internal tmio hardware logic for card detection, we need
1217 * to ensure it stays powered for it to work.
1219 if (_host
->native_hotplug
)
1220 pm_runtime_get_noresume(&pdev
->dev
);
1222 tmio_mmc_clk_stop(_host
);
1223 tmio_mmc_reset(_host
);
1225 _host
->sdcard_irq_mask
= sd_ctrl_read16_and_16_as_32(_host
, CTL_IRQ_MASK
);
1226 tmio_mmc_disable_mmc_irqs(_host
, TMIO_MASK_ALL
);
1228 /* Unmask the IRQs we want to know about */
1229 if (!_host
->chan_rx
)
1230 irq_mask
|= TMIO_MASK_READOP
;
1231 if (!_host
->chan_tx
)
1232 irq_mask
|= TMIO_MASK_WRITEOP
;
1233 if (!_host
->native_hotplug
)
1234 irq_mask
&= ~(TMIO_STAT_CARD_REMOVE
| TMIO_STAT_CARD_INSERT
);
1236 _host
->sdcard_irq_mask
&= ~irq_mask
;
1238 _host
->sdio_irq_enabled
= false;
1239 if (pdata
->flags
& TMIO_MMC_SDIO_IRQ
) {
1240 _host
->sdio_irq_mask
= TMIO_SDIO_MASK_ALL
;
1241 sd_ctrl_write16(_host
, CTL_SDIO_IRQ_MASK
, _host
->sdio_irq_mask
);
1242 sd_ctrl_write16(_host
, CTL_TRANSACTION_CTL
, 0x0001);
1245 spin_lock_init(&_host
->lock
);
1246 mutex_init(&_host
->ios_lock
);
1248 /* Init delayed work for request timeouts */
1249 INIT_DELAYED_WORK(&_host
->delayed_reset_work
, tmio_mmc_reset_work
);
1250 INIT_WORK(&_host
->done
, tmio_mmc_done_work
);
1252 /* See if we also get DMA */
1253 tmio_mmc_request_dma(_host
, pdata
);
1255 pm_runtime_set_active(&pdev
->dev
);
1256 pm_runtime_set_autosuspend_delay(&pdev
->dev
, 50);
1257 pm_runtime_use_autosuspend(&pdev
->dev
);
1258 pm_runtime_enable(&pdev
->dev
);
1260 ret
= mmc_add_host(mmc
);
1262 tmio_mmc_host_remove(_host
);
1266 dev_pm_qos_expose_latency_limit(&pdev
->dev
, 100);
1268 if (pdata
->flags
& TMIO_MMC_USE_GPIO_CD
) {
1269 ret
= mmc_gpio_request_cd(mmc
, pdata
->cd_gpio
, 0);
1271 tmio_mmc_host_remove(_host
);
1274 mmc_gpiod_request_cd_irq(mmc
);
1279 EXPORT_SYMBOL(tmio_mmc_host_probe
);
1281 void tmio_mmc_host_remove(struct tmio_mmc_host
*host
)
1283 struct platform_device
*pdev
= host
->pdev
;
1284 struct mmc_host
*mmc
= host
->mmc
;
1286 if (host
->pdata
->flags
& TMIO_MMC_SDIO_IRQ
)
1287 sd_ctrl_write16(host
, CTL_TRANSACTION_CTL
, 0x0000);
1289 if (!host
->native_hotplug
)
1290 pm_runtime_get_sync(&pdev
->dev
);
1292 dev_pm_qos_hide_latency_limit(&pdev
->dev
);
1294 mmc_remove_host(mmc
);
1295 cancel_work_sync(&host
->done
);
1296 cancel_delayed_work_sync(&host
->delayed_reset_work
);
1297 tmio_mmc_release_dma(host
);
1299 pm_runtime_put_sync(&pdev
->dev
);
1300 pm_runtime_disable(&pdev
->dev
);
1302 tmio_mmc_clk_disable(host
);
1304 EXPORT_SYMBOL(tmio_mmc_host_remove
);
1307 int tmio_mmc_host_runtime_suspend(struct device
*dev
)
1309 struct mmc_host
*mmc
= dev_get_drvdata(dev
);
1310 struct tmio_mmc_host
*host
= mmc_priv(mmc
);
1312 tmio_mmc_disable_mmc_irqs(host
, TMIO_MASK_ALL
);
1314 if (host
->clk_cache
)
1315 tmio_mmc_clk_stop(host
);
1317 tmio_mmc_clk_disable(host
);
1321 EXPORT_SYMBOL(tmio_mmc_host_runtime_suspend
);
1323 static bool tmio_mmc_can_retune(struct tmio_mmc_host
*host
)
1325 return host
->tap_num
&& mmc_can_retune(host
->mmc
);
1328 int tmio_mmc_host_runtime_resume(struct device
*dev
)
1330 struct mmc_host
*mmc
= dev_get_drvdata(dev
);
1331 struct tmio_mmc_host
*host
= mmc_priv(mmc
);
1333 tmio_mmc_reset(host
);
1334 tmio_mmc_clk_enable(host
);
1336 if (host
->clk_cache
)
1337 tmio_mmc_set_clock(host
, host
->clk_cache
);
1339 tmio_mmc_enable_dma(host
, true);
1341 if (tmio_mmc_can_retune(host
) && host
->select_tuning(host
))
1342 dev_warn(&host
->pdev
->dev
, "Tuning selection failed\n");
1346 EXPORT_SYMBOL(tmio_mmc_host_runtime_resume
);
1349 MODULE_LICENSE("GPL v2");