2 * linux/drivers/media/mmc/omap.c
4 * Copyright (C) 2004 Nokia Corporation
5 * Written by Tuukka Tikkanen and Juha Yrjölä<juha.yrjola@nokia.com>
6 * Misc hacks here and there by Tony Lindgren <tony@atomide.com>
7 * Other hacks (DMA, SD, etc) by David Brownell
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
14 #include <linux/module.h>
15 #include <linux/moduleparam.h>
16 #include <linux/init.h>
17 #include <linux/ioport.h>
18 #include <linux/platform_device.h>
19 #include <linux/interrupt.h>
20 #include <linux/dma-mapping.h>
21 #include <linux/delay.h>
22 #include <linux/spinlock.h>
23 #include <linux/timer.h>
24 #include <linux/mmc/host.h>
25 #include <linux/mmc/protocol.h>
26 #include <linux/mmc/card.h>
27 #include <linux/clk.h>
31 #include <asm/scatterlist.h>
32 #include <asm/mach-types.h>
34 #include <asm/arch/board.h>
35 #include <asm/arch/gpio.h>
36 #include <asm/arch/dma.h>
37 #include <asm/arch/mux.h>
38 #include <asm/arch/fpga.h>
39 #include <asm/arch/tps65010.h>
43 #define DRIVER_NAME "mmci-omap"
44 #define RSP_TYPE(x) ((x) & ~(MMC_RSP_BUSY|MMC_RSP_OPCODE))
46 /* Specifies how often in millisecs to poll for card status changes
47 * when the cover switch is open */
48 #define OMAP_MMC_SWITCH_POLL_DELAY 500
50 static int mmc_omap_enable_poll
= 1;
52 struct mmc_omap_host
{
55 struct mmc_request
* mrq
;
56 struct mmc_command
* cmd
;
57 struct mmc_data
* data
;
58 struct mmc_host
* mmc
;
60 unsigned char id
; /* 16xx chips have 2 MMC blocks */
65 unsigned char bus_mode
;
66 unsigned char hw_bus_mode
;
71 u32 buffer_bytes_left
;
75 unsigned brs_received
:1, dma_done
:1;
76 unsigned dma_is_read
:1;
77 unsigned dma_in_use
:1;
80 struct timer_list dma_timer
;
87 struct work_struct switch_work
;
88 struct timer_list switch_timer
;
89 int switch_last_state
;
93 mmc_omap_cover_is_open(struct mmc_omap_host
*host
)
95 if (host
->switch_pin
< 0)
97 return omap_get_gpio_datain(host
->switch_pin
);
101 mmc_omap_show_cover_switch(struct device
*dev
,
102 struct device_attribute
*attr
, char *buf
)
104 struct mmc_omap_host
*host
= dev_get_drvdata(dev
);
106 return sprintf(buf
, "%s\n", mmc_omap_cover_is_open(host
) ? "open" :
110 static DEVICE_ATTR(cover_switch
, S_IRUGO
, mmc_omap_show_cover_switch
, NULL
);
113 mmc_omap_show_enable_poll(struct device
*dev
,
114 struct device_attribute
*attr
, char *buf
)
116 return snprintf(buf
, PAGE_SIZE
, "%d\n", mmc_omap_enable_poll
);
120 mmc_omap_store_enable_poll(struct device
*dev
,
121 struct device_attribute
*attr
, const char *buf
,
126 if (sscanf(buf
, "%10d", &enable_poll
) != 1)
129 if (enable_poll
!= mmc_omap_enable_poll
) {
130 struct mmc_omap_host
*host
= dev_get_drvdata(dev
);
132 mmc_omap_enable_poll
= enable_poll
;
133 if (enable_poll
&& host
->switch_pin
>= 0)
134 schedule_work(&host
->switch_work
);
139 static DEVICE_ATTR(enable_poll
, 0664,
140 mmc_omap_show_enable_poll
, mmc_omap_store_enable_poll
);
143 mmc_omap_start_command(struct mmc_omap_host
*host
, struct mmc_command
*cmd
)
154 /* Our hardware needs to know exact type */
155 switch (RSP_TYPE(mmc_resp_type(cmd
))) {
156 case RSP_TYPE(MMC_RSP_R1
):
157 /* resp 1, resp 1b */
160 case RSP_TYPE(MMC_RSP_R2
):
163 case RSP_TYPE(MMC_RSP_R3
):
170 if (mmc_cmd_type(cmd
) == MMC_CMD_ADTC
) {
171 cmdtype
= OMAP_MMC_CMDTYPE_ADTC
;
172 } else if (mmc_cmd_type(cmd
) == MMC_CMD_BC
) {
173 cmdtype
= OMAP_MMC_CMDTYPE_BC
;
174 } else if (mmc_cmd_type(cmd
) == MMC_CMD_BCR
) {
175 cmdtype
= OMAP_MMC_CMDTYPE_BCR
;
177 cmdtype
= OMAP_MMC_CMDTYPE_AC
;
180 cmdreg
= cmd
->opcode
| (resptype
<< 8) | (cmdtype
<< 12);
182 if (host
->bus_mode
== MMC_BUSMODE_OPENDRAIN
)
185 if (cmd
->flags
& MMC_RSP_BUSY
)
188 if (host
->data
&& !(host
->data
->flags
& MMC_DATA_WRITE
))
191 clk_enable(host
->fclk
);
193 OMAP_MMC_WRITE(host
->base
, CTO
, 200);
194 OMAP_MMC_WRITE(host
->base
, ARGL
, cmd
->arg
& 0xffff);
195 OMAP_MMC_WRITE(host
->base
, ARGH
, cmd
->arg
>> 16);
196 OMAP_MMC_WRITE(host
->base
, IE
,
197 OMAP_MMC_STAT_A_EMPTY
| OMAP_MMC_STAT_A_FULL
|
198 OMAP_MMC_STAT_CMD_CRC
| OMAP_MMC_STAT_CMD_TOUT
|
199 OMAP_MMC_STAT_DATA_CRC
| OMAP_MMC_STAT_DATA_TOUT
|
200 OMAP_MMC_STAT_END_OF_CMD
| OMAP_MMC_STAT_CARD_ERR
|
201 OMAP_MMC_STAT_END_OF_DATA
);
202 OMAP_MMC_WRITE(host
->base
, CMD
, cmdreg
);
206 mmc_omap_xfer_done(struct mmc_omap_host
*host
, struct mmc_data
*data
)
208 if (host
->dma_in_use
) {
209 enum dma_data_direction dma_data_dir
;
211 BUG_ON(host
->dma_ch
< 0);
212 if (data
->error
!= MMC_ERR_NONE
)
213 omap_stop_dma(host
->dma_ch
);
214 /* Release DMA channel lazily */
215 mod_timer(&host
->dma_timer
, jiffies
+ HZ
);
216 if (data
->flags
& MMC_DATA_WRITE
)
217 dma_data_dir
= DMA_TO_DEVICE
;
219 dma_data_dir
= DMA_FROM_DEVICE
;
220 dma_unmap_sg(mmc_dev(host
->mmc
), data
->sg
, host
->sg_len
,
225 clk_disable(host
->fclk
);
227 /* NOTE: MMC layer will sometimes poll-wait CMD13 next, issuing
228 * dozens of requests until the card finishes writing data.
229 * It'd be cheaper to just wait till an EOFB interrupt arrives...
234 mmc_request_done(host
->mmc
, data
->mrq
);
238 mmc_omap_start_command(host
, data
->stop
);
242 mmc_omap_end_of_data(struct mmc_omap_host
*host
, struct mmc_data
*data
)
247 if (!host
->dma_in_use
) {
248 mmc_omap_xfer_done(host
, data
);
252 spin_lock_irqsave(&host
->dma_lock
, flags
);
256 host
->brs_received
= 1;
257 spin_unlock_irqrestore(&host
->dma_lock
, flags
);
259 mmc_omap_xfer_done(host
, data
);
263 mmc_omap_dma_timer(unsigned long data
)
265 struct mmc_omap_host
*host
= (struct mmc_omap_host
*) data
;
267 BUG_ON(host
->dma_ch
< 0);
268 omap_free_dma(host
->dma_ch
);
273 mmc_omap_dma_done(struct mmc_omap_host
*host
, struct mmc_data
*data
)
279 spin_lock_irqsave(&host
->dma_lock
, flags
);
280 if (host
->brs_received
)
284 spin_unlock_irqrestore(&host
->dma_lock
, flags
);
286 mmc_omap_xfer_done(host
, data
);
290 mmc_omap_cmd_done(struct mmc_omap_host
*host
, struct mmc_command
*cmd
)
294 if (cmd
->flags
& MMC_RSP_PRESENT
) {
295 if (cmd
->flags
& MMC_RSP_136
) {
296 /* response type 2 */
298 OMAP_MMC_READ(host
->base
, RSP0
) |
299 (OMAP_MMC_READ(host
->base
, RSP1
) << 16);
301 OMAP_MMC_READ(host
->base
, RSP2
) |
302 (OMAP_MMC_READ(host
->base
, RSP3
) << 16);
304 OMAP_MMC_READ(host
->base
, RSP4
) |
305 (OMAP_MMC_READ(host
->base
, RSP5
) << 16);
307 OMAP_MMC_READ(host
->base
, RSP6
) |
308 (OMAP_MMC_READ(host
->base
, RSP7
) << 16);
310 /* response types 1, 1b, 3, 4, 5, 6 */
312 OMAP_MMC_READ(host
->base
, RSP6
) |
313 (OMAP_MMC_READ(host
->base
, RSP7
) << 16);
317 if (host
->data
== NULL
|| cmd
->error
!= MMC_ERR_NONE
) {
319 clk_disable(host
->fclk
);
320 mmc_request_done(host
->mmc
, cmd
->mrq
);
326 mmc_omap_sg_to_buf(struct mmc_omap_host
*host
)
328 struct scatterlist
*sg
;
330 sg
= host
->data
->sg
+ host
->sg_idx
;
331 host
->buffer_bytes_left
= sg
->length
;
332 host
->buffer
= page_address(sg
->page
) + sg
->offset
;
333 if (host
->buffer_bytes_left
> host
->total_bytes_left
)
334 host
->buffer_bytes_left
= host
->total_bytes_left
;
339 mmc_omap_xfer_data(struct mmc_omap_host
*host
, int write
)
345 if (host
->buffer_bytes_left
== 0) {
347 BUG_ON(host
->sg_idx
== host
->sg_len
);
348 mmc_omap_sg_to_buf(host
);
351 if (n
> host
->buffer_bytes_left
)
352 n
= host
->buffer_bytes_left
;
353 host
->buffer_bytes_left
-= n
;
354 host
->total_bytes_left
-= n
;
355 host
->data
->bytes_xfered
+= n
;
358 __raw_writesw(host
->base
+ OMAP_MMC_REG_DATA
, host
->buffer
, n
);
360 __raw_readsw(host
->base
+ OMAP_MMC_REG_DATA
, host
->buffer
, n
);
364 static inline void mmc_omap_report_irq(u16 status
)
366 static const char *mmc_omap_status_bits
[] = {
367 "EOC", "CD", "CB", "BRS", "EOFB", "DTO", "DCRC", "CTO",
368 "CCRC", "CRW", "AF", "AE", "OCRB", "CIRQ", "CERR"
372 for (i
= 0; i
< ARRAY_SIZE(mmc_omap_status_bits
); i
++)
373 if (status
& (1 << i
)) {
376 printk("%s", mmc_omap_status_bits
[i
]);
381 static irqreturn_t
mmc_omap_irq(int irq
, void *dev_id
, struct pt_regs
*regs
)
383 struct mmc_omap_host
* host
= (struct mmc_omap_host
*)dev_id
;
389 if (host
->cmd
== NULL
&& host
->data
== NULL
) {
390 status
= OMAP_MMC_READ(host
->base
, STAT
);
391 dev_info(mmc_dev(host
->mmc
),"spurious irq 0x%04x\n", status
);
393 OMAP_MMC_WRITE(host
->base
, STAT
, status
);
394 OMAP_MMC_WRITE(host
->base
, IE
, 0);
403 while ((status
= OMAP_MMC_READ(host
->base
, STAT
)) != 0) {
404 OMAP_MMC_WRITE(host
->base
, STAT
, status
);
405 #ifdef CONFIG_MMC_DEBUG
406 dev_dbg(mmc_dev(host
->mmc
), "MMC IRQ %04x (CMD %d): ",
407 status
, host
->cmd
!= NULL
? host
->cmd
->opcode
: -1);
408 mmc_omap_report_irq(status
);
411 if (host
->total_bytes_left
) {
412 if ((status
& OMAP_MMC_STAT_A_FULL
) ||
413 (status
& OMAP_MMC_STAT_END_OF_DATA
))
414 mmc_omap_xfer_data(host
, 0);
415 if (status
& OMAP_MMC_STAT_A_EMPTY
)
416 mmc_omap_xfer_data(host
, 1);
419 if (status
& OMAP_MMC_STAT_END_OF_DATA
) {
423 if (status
& OMAP_MMC_STAT_DATA_TOUT
) {
424 dev_dbg(mmc_dev(host
->mmc
), "data timeout\n");
426 host
->data
->error
|= MMC_ERR_TIMEOUT
;
431 if (status
& OMAP_MMC_STAT_DATA_CRC
) {
433 host
->data
->error
|= MMC_ERR_BADCRC
;
434 dev_dbg(mmc_dev(host
->mmc
),
435 "data CRC error, bytes left %d\n",
436 host
->total_bytes_left
);
439 dev_dbg(mmc_dev(host
->mmc
), "data CRC error\n");
443 if (status
& OMAP_MMC_STAT_CMD_TOUT
) {
444 /* Timeouts are routine with some commands */
446 if (host
->cmd
->opcode
!= MMC_ALL_SEND_CID
&&
451 !mmc_omap_cover_is_open(host
))
452 dev_err(mmc_dev(host
->mmc
),
453 "command timeout, CMD %d\n",
455 host
->cmd
->error
= MMC_ERR_TIMEOUT
;
460 if (status
& OMAP_MMC_STAT_CMD_CRC
) {
462 dev_err(mmc_dev(host
->mmc
),
463 "command CRC error (CMD%d, arg 0x%08x)\n",
464 host
->cmd
->opcode
, host
->cmd
->arg
);
465 host
->cmd
->error
= MMC_ERR_BADCRC
;
468 dev_err(mmc_dev(host
->mmc
),
469 "command CRC error without cmd?\n");
472 if (status
& OMAP_MMC_STAT_CARD_ERR
) {
473 if (host
->cmd
&& host
->cmd
->opcode
== MMC_STOP_TRANSMISSION
) {
474 u32 response
= OMAP_MMC_READ(host
->base
, RSP6
)
475 | (OMAP_MMC_READ(host
->base
, RSP7
) << 16);
476 /* STOP sometimes sets must-ignore bits */
477 if (!(response
& (R1_CC_ERROR
479 | R1_COM_CRC_ERROR
))) {
485 dev_dbg(mmc_dev(host
->mmc
), "card status error (CMD%d)\n",
488 host
->cmd
->error
= MMC_ERR_FAILED
;
492 host
->data
->error
= MMC_ERR_FAILED
;
498 * NOTE: On 1610 the END_OF_CMD may come too early when
501 if ((status
& OMAP_MMC_STAT_END_OF_CMD
) &&
502 (!(status
& OMAP_MMC_STAT_A_EMPTY
))) {
508 mmc_omap_cmd_done(host
, host
->cmd
);
511 mmc_omap_xfer_done(host
, host
->data
);
512 else if (end_transfer
)
513 mmc_omap_end_of_data(host
, host
->data
);
518 static irqreturn_t
mmc_omap_switch_irq(int irq
, void *dev_id
, struct pt_regs
*regs
)
520 struct mmc_omap_host
*host
= (struct mmc_omap_host
*) dev_id
;
522 schedule_work(&host
->switch_work
);
527 static void mmc_omap_switch_timer(unsigned long arg
)
529 struct mmc_omap_host
*host
= (struct mmc_omap_host
*) arg
;
531 schedule_work(&host
->switch_work
);
534 /* FIXME: Handle card insertion and removal properly. Maybe use a mask
536 static void mmc_omap_switch_callback(unsigned long data
, u8 mmc_mask
)
540 static void mmc_omap_switch_handler(void *data
)
542 struct mmc_omap_host
*host
= (struct mmc_omap_host
*) data
;
543 struct mmc_card
*card
;
544 static int complained
= 0;
545 int cards
= 0, cover_open
;
547 if (host
->switch_pin
== -1)
549 cover_open
= mmc_omap_cover_is_open(host
);
550 if (cover_open
!= host
->switch_last_state
) {
551 kobject_uevent(&host
->dev
->kobj
, KOBJ_CHANGE
);
552 host
->switch_last_state
= cover_open
;
554 mmc_detect_change(host
->mmc
, 0);
555 list_for_each_entry(card
, &host
->mmc
->cards
, node
) {
556 if (mmc_card_present(card
))
559 if (mmc_omap_cover_is_open(host
)) {
561 dev_info(mmc_dev(host
->mmc
), "cover is open");
564 if (mmc_omap_enable_poll
)
565 mod_timer(&host
->switch_timer
, jiffies
+
566 msecs_to_jiffies(OMAP_MMC_SWITCH_POLL_DELAY
));
572 /* Prepare to transfer the next segment of a scatterlist */
574 mmc_omap_prepare_dma(struct mmc_omap_host
*host
, struct mmc_data
*data
)
576 int dma_ch
= host
->dma_ch
;
577 unsigned long data_addr
;
580 struct scatterlist
*sg
= &data
->sg
[host
->sg_idx
];
585 data_addr
= io_v2p((u32
) host
->base
) + OMAP_MMC_REG_DATA
;
587 count
= sg_dma_len(sg
);
589 if ((data
->blocks
== 1) && (count
> data
->blksz
))
592 host
->dma_len
= count
;
594 /* FIFO is 16x2 bytes on 15xx, and 32x2 bytes on 16xx and 24xx.
595 * Use 16 or 32 word frames when the blocksize is at least that large.
596 * Blocksize is usually 512 bytes; but not for some SD reads.
598 if (cpu_is_omap15xx() && frame
> 32)
605 if (!(data
->flags
& MMC_DATA_WRITE
)) {
606 buf
= 0x800f | ((frame
- 1) << 8);
608 if (cpu_class_is_omap1()) {
609 src_port
= OMAP_DMA_PORT_TIPB
;
610 dst_port
= OMAP_DMA_PORT_EMIFF
;
612 if (cpu_is_omap24xx())
613 sync_dev
= OMAP24XX_DMA_MMC1_RX
;
615 omap_set_dma_src_params(dma_ch
, src_port
,
616 OMAP_DMA_AMODE_CONSTANT
,
618 omap_set_dma_dest_params(dma_ch
, dst_port
,
619 OMAP_DMA_AMODE_POST_INC
,
620 sg_dma_address(sg
), 0, 0);
621 omap_set_dma_dest_data_pack(dma_ch
, 1);
622 omap_set_dma_dest_burst_mode(dma_ch
, OMAP_DMA_DATA_BURST_4
);
624 buf
= 0x0f80 | ((frame
- 1) << 0);
626 if (cpu_class_is_omap1()) {
627 src_port
= OMAP_DMA_PORT_EMIFF
;
628 dst_port
= OMAP_DMA_PORT_TIPB
;
630 if (cpu_is_omap24xx())
631 sync_dev
= OMAP24XX_DMA_MMC1_TX
;
633 omap_set_dma_dest_params(dma_ch
, dst_port
,
634 OMAP_DMA_AMODE_CONSTANT
,
636 omap_set_dma_src_params(dma_ch
, src_port
,
637 OMAP_DMA_AMODE_POST_INC
,
638 sg_dma_address(sg
), 0, 0);
639 omap_set_dma_src_data_pack(dma_ch
, 1);
640 omap_set_dma_src_burst_mode(dma_ch
, OMAP_DMA_DATA_BURST_4
);
643 /* Max limit for DMA frame count is 0xffff */
644 if (unlikely(count
> 0xffff))
647 OMAP_MMC_WRITE(host
->base
, BUF
, buf
);
648 omap_set_dma_transfer_params(dma_ch
, OMAP_DMA_DATA_TYPE_S16
,
649 frame
, count
, OMAP_DMA_SYNC_FRAME
,
653 /* A scatterlist segment completed */
654 static void mmc_omap_dma_cb(int lch
, u16 ch_status
, void *data
)
656 struct mmc_omap_host
*host
= (struct mmc_omap_host
*) data
;
657 struct mmc_data
*mmcdat
= host
->data
;
659 if (unlikely(host
->dma_ch
< 0)) {
660 dev_err(mmc_dev(host
->mmc
), "DMA callback while DMA not
664 /* FIXME: We really should do something to _handle_ the errors */
665 if (ch_status
& OMAP_DMA_TOUT_IRQ
) {
666 dev_err(mmc_dev(host
->mmc
),"DMA timeout\n");
669 if (ch_status
& OMAP_DMA_DROP_IRQ
) {
670 dev_err(mmc_dev(host
->mmc
), "DMA sync error\n");
673 if (!(ch_status
& OMAP_DMA_BLOCK_IRQ
)) {
676 mmcdat
->bytes_xfered
+= host
->dma_len
;
678 if (host
->sg_idx
< host
->sg_len
) {
679 mmc_omap_prepare_dma(host
, host
->data
);
680 omap_start_dma(host
->dma_ch
);
682 mmc_omap_dma_done(host
, host
->data
);
685 static int mmc_omap_get_dma_channel(struct mmc_omap_host
*host
, struct mmc_data
*data
)
687 const char *dev_name
;
688 int sync_dev
, dma_ch
, is_read
, r
;
690 is_read
= !(data
->flags
& MMC_DATA_WRITE
);
691 del_timer_sync(&host
->dma_timer
);
692 if (host
->dma_ch
>= 0) {
693 if (is_read
== host
->dma_is_read
)
695 omap_free_dma(host
->dma_ch
);
701 sync_dev
= OMAP_DMA_MMC_RX
;
702 dev_name
= "MMC1 read";
704 sync_dev
= OMAP_DMA_MMC2_RX
;
705 dev_name
= "MMC2 read";
709 sync_dev
= OMAP_DMA_MMC_TX
;
710 dev_name
= "MMC1 write";
712 sync_dev
= OMAP_DMA_MMC2_TX
;
713 dev_name
= "MMC2 write";
716 r
= omap_request_dma(sync_dev
, dev_name
, mmc_omap_dma_cb
,
719 dev_dbg(mmc_dev(host
->mmc
), "omap_request_dma() failed with %d\n", r
);
722 host
->dma_ch
= dma_ch
;
723 host
->dma_is_read
= is_read
;
728 static inline void set_cmd_timeout(struct mmc_omap_host
*host
, struct mmc_request
*req
)
732 reg
= OMAP_MMC_READ(host
->base
, SDIO
);
734 OMAP_MMC_WRITE(host
->base
, SDIO
, reg
);
735 /* Set maximum timeout */
736 OMAP_MMC_WRITE(host
->base
, CTO
, 0xff);
739 static inline void set_data_timeout(struct mmc_omap_host
*host
, struct mmc_request
*req
)
744 /* Convert ns to clock cycles by assuming 20MHz frequency
745 * 1 cycle at 20MHz = 500 ns
747 timeout
= req
->data
->timeout_clks
+ req
->data
->timeout_ns
/ 500;
749 /* Check if we need to use timeout multiplier register */
750 reg
= OMAP_MMC_READ(host
->base
, SDIO
);
751 if (timeout
> 0xffff) {
756 OMAP_MMC_WRITE(host
->base
, SDIO
, reg
);
757 OMAP_MMC_WRITE(host
->base
, DTO
, timeout
);
761 mmc_omap_prepare_data(struct mmc_omap_host
*host
, struct mmc_request
*req
)
763 struct mmc_data
*data
= req
->data
;
764 int i
, use_dma
, block_size
;
769 OMAP_MMC_WRITE(host
->base
, BLEN
, 0);
770 OMAP_MMC_WRITE(host
->base
, NBLK
, 0);
771 OMAP_MMC_WRITE(host
->base
, BUF
, 0);
772 host
->dma_in_use
= 0;
773 set_cmd_timeout(host
, req
);
778 block_size
= data
->blksz
;
780 OMAP_MMC_WRITE(host
->base
, NBLK
, data
->blocks
- 1);
781 OMAP_MMC_WRITE(host
->base
, BLEN
, block_size
- 1);
782 set_data_timeout(host
, req
);
784 /* cope with calling layer confusion; it issues "single
785 * block" writes using multi-block scatterlists.
787 sg_len
= (data
->blocks
== 1) ? 1 : data
->sg_len
;
789 /* Only do DMA for entire blocks */
790 use_dma
= host
->use_dma
;
792 for (i
= 0; i
< sg_len
; i
++) {
793 if ((data
->sg
[i
].length
% block_size
) != 0) {
802 if (mmc_omap_get_dma_channel(host
, data
) == 0) {
803 enum dma_data_direction dma_data_dir
;
805 if (data
->flags
& MMC_DATA_WRITE
)
806 dma_data_dir
= DMA_TO_DEVICE
;
808 dma_data_dir
= DMA_FROM_DEVICE
;
810 host
->sg_len
= dma_map_sg(mmc_dev(host
->mmc
), data
->sg
,
811 sg_len
, dma_data_dir
);
812 host
->total_bytes_left
= 0;
813 mmc_omap_prepare_dma(host
, req
->data
);
814 host
->brs_received
= 0;
816 host
->dma_in_use
= 1;
823 OMAP_MMC_WRITE(host
->base
, BUF
, 0x1f1f);
824 host
->total_bytes_left
= data
->blocks
* block_size
;
825 host
->sg_len
= sg_len
;
826 mmc_omap_sg_to_buf(host
);
827 host
->dma_in_use
= 0;
831 static void mmc_omap_request(struct mmc_host
*mmc
, struct mmc_request
*req
)
833 struct mmc_omap_host
*host
= mmc_priv(mmc
);
835 WARN_ON(host
->mrq
!= NULL
);
839 /* only touch fifo AFTER the controller readies it */
840 mmc_omap_prepare_data(host
, req
);
841 mmc_omap_start_command(host
, req
->cmd
);
842 if (host
->dma_in_use
)
843 omap_start_dma(host
->dma_ch
);
846 static void innovator_fpga_socket_power(int on
)
848 #if defined(CONFIG_MACH_OMAP_INNOVATOR) && defined(CONFIG_ARCH_OMAP15XX)
851 fpga_write(fpga_read(OMAP1510_FPGA_POWER
) | (1 << 3),
852 OMAP1510_FPGA_POWER
);
854 fpga_write(fpga_read(OMAP1510_FPGA_POWER
) & ~(1 << 3),
855 OMAP1510_FPGA_POWER
);
861 * Turn the socket power on/off. Innovator uses FPGA, most boards
864 static void mmc_omap_power(struct mmc_omap_host
*host
, int on
)
867 if (machine_is_omap_innovator())
868 innovator_fpga_socket_power(1);
869 else if (machine_is_omap_h2())
870 tps65010_set_gpio_out_value(GPIO3
, HIGH
);
871 else if (machine_is_omap_h3())
872 /* GPIO 4 of TPS65010 sends SD_EN signal */
873 tps65010_set_gpio_out_value(GPIO4
, HIGH
);
874 else if (cpu_is_omap24xx()) {
875 u16 reg
= OMAP_MMC_READ(host
->base
, CON
);
876 OMAP_MMC_WRITE(host
->base
, CON
, reg
| (1 << 11));
878 if (host
->power_pin
>= 0)
879 omap_set_gpio_dataout(host
->power_pin
, 1);
881 if (machine_is_omap_innovator())
882 innovator_fpga_socket_power(0);
883 else if (machine_is_omap_h2())
884 tps65010_set_gpio_out_value(GPIO3
, LOW
);
885 else if (machine_is_omap_h3())
886 tps65010_set_gpio_out_value(GPIO4
, LOW
);
887 else if (cpu_is_omap24xx()) {
888 u16 reg
= OMAP_MMC_READ(host
->base
, CON
);
889 OMAP_MMC_WRITE(host
->base
, CON
, reg
& ~(1 << 11));
891 if (host
->power_pin
>= 0)
892 omap_set_gpio_dataout(host
->power_pin
, 0);
896 static void mmc_omap_set_ios(struct mmc_host
*mmc
, struct mmc_ios
*ios
)
898 struct mmc_omap_host
*host
= mmc_priv(mmc
);
902 realclock
= ios
->clock
;
907 int func_clk_rate
= clk_get_rate(host
->fclk
);
909 dsor
= func_clk_rate
/ realclock
;
913 if (func_clk_rate
/ dsor
> realclock
)
920 if (ios
->bus_width
== MMC_BUS_WIDTH_4
)
924 switch (ios
->power_mode
) {
926 mmc_omap_power(host
, 0);
930 mmc_omap_power(host
, 1);
935 host
->bus_mode
= ios
->bus_mode
;
936 host
->hw_bus_mode
= host
->bus_mode
;
938 clk_enable(host
->fclk
);
940 /* On insanely high arm_per frequencies something sometimes
941 * goes somehow out of sync, and the POW bit is not being set,
942 * which results in the while loop below getting stuck.
943 * Writing to the CON register twice seems to do the trick. */
944 for (i
= 0; i
< 2; i
++)
945 OMAP_MMC_WRITE(host
->base
, CON
, dsor
);
946 if (ios
->power_mode
== MMC_POWER_UP
) {
947 /* Send clock cycles, poll completion */
948 OMAP_MMC_WRITE(host
->base
, IE
, 0);
949 OMAP_MMC_WRITE(host
->base
, STAT
, 0xffff);
950 OMAP_MMC_WRITE(host
->base
, CMD
, 1<<7);
951 while (0 == (OMAP_MMC_READ(host
->base
, STAT
) & 1));
952 OMAP_MMC_WRITE(host
->base
, STAT
, 1);
954 clk_disable(host
->fclk
);
957 static int mmc_omap_get_ro(struct mmc_host
*mmc
)
959 struct mmc_omap_host
*host
= mmc_priv(mmc
);
961 return host
->wp_pin
&& omap_get_gpio_datain(host
->wp_pin
);
964 static struct mmc_host_ops mmc_omap_ops
= {
965 .request
= mmc_omap_request
,
966 .set_ios
= mmc_omap_set_ios
,
967 .get_ro
= mmc_omap_get_ro
,
970 static int __init
mmc_omap_probe(struct platform_device
*pdev
)
972 struct omap_mmc_conf
*minfo
= pdev
->dev
.platform_data
;
973 struct mmc_host
*mmc
;
974 struct mmc_omap_host
*host
= NULL
;
977 if (platform_get_resource(pdev
, IORESOURCE_MEM
, 0) ||
978 platform_get_irq(pdev
, IORESOURCE_IRQ
, 0)) {
979 dev_err(&pdev
->dev
, "mmc_omap_probe: invalid resource type\n");
983 if (!request_mem_region(pdev
->resource
[0].start
,
984 pdev
->resource
[0].end
- pdev
->resource
[0].start
+ 1,
986 dev_dbg(&pdev
->dev
, "request_mem_region failed\n");
990 mmc
= mmc_alloc_host(sizeof(struct mmc_omap_host
), &pdev
->dev
);
996 host
= mmc_priv(mmc
);
999 spin_lock_init(&host
->dma_lock
);
1000 init_timer(&host
->dma_timer
);
1001 host
->dma_timer
.function
= mmc_omap_dma_timer
;
1002 host
->dma_timer
.data
= (unsigned long) host
;
1004 host
->id
= pdev
->id
;
1006 if (cpu_is_omap24xx()) {
1007 host
->iclk
= clk_get(&pdev
->dev
, "mmc_ick");
1008 if (IS_ERR(host
->iclk
))
1010 clk_enable(host
->iclk
);
1013 if (!cpu_is_omap24xx())
1014 host
->fclk
= clk_get(&pdev
->dev
, "mmc_ck");
1016 host
->fclk
= clk_get(&pdev
->dev
, "mmc_fck");
1018 if (IS_ERR(host
->fclk
)) {
1019 ret
= PTR_ERR(host
->fclk
);
1024 * Also, use minfo->cover to decide how to manage
1025 * the card detect sensing.
1027 host
->power_pin
= minfo
->power_pin
;
1028 host
->switch_pin
= minfo
->switch_pin
;
1029 host
->wp_pin
= minfo
->wp_pin
;
1033 host
->irq
= pdev
->resource
[1].start
;
1034 host
->base
= ioremap(pdev
->res
.start
, SZ_4K
);
1041 mmc
->caps
|= MMC_CAP_4_BIT_DATA
;
1043 mmc
->ops
= &mmc_omap_ops
;
1044 mmc
->f_min
= 400000;
1045 mmc
->f_max
= 24000000;
1046 mmc
->ocr_avail
= MMC_VDD_32_33
|MMC_VDD_33_34
;
1048 /* Use scatterlist DMA to reduce per-transfer costs.
1049 * NOTE max_seg_size assumption that small blocks aren't
1050 * normally used (except e.g. for reading SD registers).
1052 mmc
->max_phys_segs
= 32;
1053 mmc
->max_hw_segs
= 32;
1054 mmc
->max_sectors
= 256; /* NBLK max 11-bits, OMAP also limited by DMA */
1055 mmc
->max_seg_size
= mmc
->max_sectors
* 512;
1057 if (host
->power_pin
>= 0) {
1058 if ((ret
= omap_request_gpio(host
->power_pin
)) != 0) {
1059 dev_err(mmc_dev(host
->mmc
), "Unable to get GPIO
1060 pin for MMC power\n");
1063 omap_set_gpio_direction(host
->power_pin
, 0);
1066 ret
= request_irq(host
->irq
, mmc_omap_irq
, 0, DRIVER_NAME
, host
);
1070 host
->dev
= &pdev
->dev
;
1071 platform_set_drvdata(pdev
, host
);
1075 if (host
->switch_pin
>= 0) {
1076 INIT_WORK(&host
->switch_work
, mmc_omap_switch_handler
, host
);
1077 init_timer(&host
->switch_timer
);
1078 host
->switch_timer
.function
= mmc_omap_switch_timer
;
1079 host
->switch_timer
.data
= (unsigned long) host
;
1080 if (omap_request_gpio(host
->switch_pin
) != 0) {
1081 dev_warn(mmc_dev(host
->mmc
), "Unable to get GPIO pin for MMC cover switch\n");
1082 host
->switch_pin
= -1;
1086 omap_set_gpio_direction(host
->switch_pin
, 1);
1087 ret
= request_irq(OMAP_GPIO_IRQ(host
->switch_pin
),
1088 mmc_omap_switch_irq
, SA_TRIGGER_RISING
, DRIVER_NAME
, host
);
1090 dev_warn(mmc_dev(host
->mmc
), "Unable to get IRQ for MMC cover switch\n");
1091 omap_free_gpio(host
->switch_pin
);
1092 host
->switch_pin
= -1;
1095 ret
= device_create_file(&pdev
->dev
, &dev_attr_cover_switch
);
1097 ret
= device_create_file(&pdev
->dev
, &dev_attr_enable_poll
);
1099 device_remove_file(&pdev
->dev
, &dev_attr_cover_switch
);
1102 dev_wan(mmc_dev(host
->mmc
), "Unable to create sysfs attributes\n");
1103 free_irq(OMAP_GPIO_IRQ(host
->switch_pin
), host
);
1104 omap_free_gpio(host
->switch_pin
);
1105 host
->switch_pin
= -1;
1108 if (mmc_omap_enable_poll
&& mmc_omap_cover_is_open(host
))
1109 schedule_work(&host
->switch_work
);
1116 /* FIXME: Free other resources too. */
1118 if (host
->iclk
&& !IS_ERR(host
->iclk
))
1119 clk_put(host
->iclk
);
1120 if (host
->fclk
&& !IS_ERR(host
->fclk
))
1121 clk_put(host
->fclk
);
1122 mmc_free_host(host
->mmc
);
1127 static int mmc_omap_remove(struct platform_device
*pdev
)
1129 struct mmc_omap_host
*host
= platform_get_drvdata(pdev
);
1131 platform_set_drvdata(pdev
, NULL
);
1134 mmc_remove_host(host
->mmc
);
1135 free_irq(host
->irq
, host
);
1137 if (host
->power_pin
>= 0)
1138 omap_free_gpio(host
->power_pin
);
1139 if (host
->switch_pin
>= 0) {
1140 device_remove_file(&pdev
->dev
, &dev_attr_enable_poll
);
1141 device_remove_file(&pdev
->dev
, &dev_attr_cover_switch
);
1142 free_irq(OMAP_GPIO_IRQ(host
->switch_pin
), host
);
1143 omap_free_gpio(host
->switch_pin
);
1144 host
->switch_pin
= -1;
1145 del_timer_sync(&host
->switch_timer
);
1146 flush_scheduled_work();
1148 if (host
->iclk
&& !IS_ERR(host
->iclk
))
1149 clk_put(host
->iclk
);
1150 if (host
->fclk
&& !IS_ERR(host
->fclk
))
1151 clk_put(host
->fclk
);
1152 mmc_free_host(host
->mmc
);
1155 release_mem_region(pdev
->resource
[0].start
,
1156 pdev
->resource
[0].end
- pdev
->resource
[0].start
+ 1);
1162 static int mmc_omap_suspend(struct platform_device
*pdev
, pm_message_t mesg
)
1165 struct mmc_omap_host
*host
= platform_get_drvdata(pdev
);
1167 if (host
&& host
->suspended
)
1171 ret
= mmc_suspend_host(host
->mmc
, mesg
);
1173 host
->suspended
= 1;
1178 static int mmc_omap_resume(struct platform_device
*pdev
)
1181 struct mmc_omap_host
*host
= platform_get_drvdata(pdev
);
1183 if (host
&& !host
->suspended
)
1187 ret
= mmc_resume_host(host
->mmc
);
1189 host
->suspended
= 0;
1195 #define mmc_omap_suspend NULL
1196 #define mmc_omap_resume NULL
1199 static struct platform_driver mmc_omap_driver
= {
1200 .probe
= mmc_omap_probe
,
1201 .remove
= mmc_omap_remove
,
1202 .suspend
= mmc_omap_suspend
,
1203 .resume
= mmc_omap_resume
,
1205 .name
= DRIVER_NAME
,
1209 static int __init
mmc_omap_init(void)
1211 return platform_driver_register(&mmc_omap_driver
);
1214 static void __exit
mmc_omap_exit(void)
1216 platform_driver_unregister(&mmc_omap_driver
);
1219 module_init(mmc_omap_init
);
1220 module_exit(mmc_omap_exit
);
1222 MODULE_DESCRIPTION("OMAP Multimedia Card driver");
1223 MODULE_LICENSE("GPL");
1224 MODULE_ALIAS(DRIVER_NAME
);
1225 MODULE_AUTHOR("Juha Yrjölä");