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1 /*
2 * Freescale GPMI NAND Flash Driver
3 *
4 * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
5 * Copyright (C) 2008 Embedded Alley Solutions, Inc.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License along
18 * with this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
20 */
21 #include <linux/clk.h>
22 #include <linux/slab.h>
23 #include <linux/interrupt.h>
24 #include <linux/mtd/gpmi-nand.h>
25 #include <linux/mtd/partitions.h>
26
27 #include "gpmi-nand.h"
28
29 /* add our owner bbt descriptor */
30 static uint8_t scan_ff_pattern[] = { 0xff };
31 static struct nand_bbt_descr gpmi_bbt_descr = {
32 .options = 0,
33 .offs = 0,
34 .len = 1,
35 .pattern = scan_ff_pattern
36 };
37
38 /* We will use all the (page + OOB). */
39 static struct nand_ecclayout gpmi_hw_ecclayout = {
40 .eccbytes = 0,
41 .eccpos = { 0, },
42 .oobfree = { {.offset = 0, .length = 0} }
43 };
44
45 static irqreturn_t bch_irq(int irq, void *cookie)
46 {
47 struct gpmi_nand_data *this = cookie;
48
49 gpmi_clear_bch(this);
50 complete(&this->bch_done);
51 return IRQ_HANDLED;
52 }
53
54 /*
55 * Calculate the ECC strength by hand:
56 * E : The ECC strength.
57 * G : the length of Galois Field.
58 * N : The chunk count of per page.
59 * O : the oobsize of the NAND chip.
60 * M : the metasize of per page.
61 *
62 * The formula is :
63 * E * G * N
64 * ------------ <= (O - M)
65 * 8
66 *
67 * So, we get E by:
68 * (O - M) * 8
69 * E <= -------------
70 * G * N
71 */
72 static inline int get_ecc_strength(struct gpmi_nand_data *this)
73 {
74 struct bch_geometry *geo = &this->bch_geometry;
75 struct mtd_info *mtd = &this->mtd;
76 int ecc_strength;
77
78 ecc_strength = ((mtd->oobsize - geo->metadata_size) * 8)
79 / (geo->gf_len * geo->ecc_chunk_count);
80
81 /* We need the minor even number. */
82 return round_down(ecc_strength, 2);
83 }
84
85 int common_nfc_set_geometry(struct gpmi_nand_data *this)
86 {
87 struct bch_geometry *geo = &this->bch_geometry;
88 struct mtd_info *mtd = &this->mtd;
89 unsigned int metadata_size;
90 unsigned int status_size;
91 unsigned int block_mark_bit_offset;
92
93 /*
94 * The size of the metadata can be changed, though we set it to 10
95 * bytes now. But it can't be too large, because we have to save
96 * enough space for BCH.
97 */
98 geo->metadata_size = 10;
99
100 /* The default for the length of Galois Field. */
101 geo->gf_len = 13;
102
103 /* The default for chunk size. There is no oobsize greater then 512. */
104 geo->ecc_chunk_size = 512;
105 while (geo->ecc_chunk_size < mtd->oobsize)
106 geo->ecc_chunk_size *= 2; /* keep C >= O */
107
108 geo->ecc_chunk_count = mtd->writesize / geo->ecc_chunk_size;
109
110 /* We use the same ECC strength for all chunks. */
111 geo->ecc_strength = get_ecc_strength(this);
112 if (!geo->ecc_strength) {
113 pr_err("We get a wrong ECC strength.\n");
114 return -EINVAL;
115 }
116
117 geo->page_size = mtd->writesize + mtd->oobsize;
118 geo->payload_size = mtd->writesize;
119
120 /*
121 * The auxiliary buffer contains the metadata and the ECC status. The
122 * metadata is padded to the nearest 32-bit boundary. The ECC status
123 * contains one byte for every ECC chunk, and is also padded to the
124 * nearest 32-bit boundary.
125 */
126 metadata_size = ALIGN(geo->metadata_size, 4);
127 status_size = ALIGN(geo->ecc_chunk_count, 4);
128
129 geo->auxiliary_size = metadata_size + status_size;
130 geo->auxiliary_status_offset = metadata_size;
131
132 if (!this->swap_block_mark)
133 return 0;
134
135 /*
136 * We need to compute the byte and bit offsets of
137 * the physical block mark within the ECC-based view of the page.
138 *
139 * NAND chip with 2K page shows below:
140 * (Block Mark)
141 * | |
142 * | D |
143 * |<---->|
144 * V V
145 * +---+----------+-+----------+-+----------+-+----------+-+
146 * | M | data |E| data |E| data |E| data |E|
147 * +---+----------+-+----------+-+----------+-+----------+-+
148 *
149 * The position of block mark moves forward in the ECC-based view
150 * of page, and the delta is:
151 *
152 * E * G * (N - 1)
153 * D = (---------------- + M)
154 * 8
155 *
156 * With the formula to compute the ECC strength, and the condition
157 * : C >= O (C is the ecc chunk size)
158 *
159 * It's easy to deduce to the following result:
160 *
161 * E * G (O - M) C - M C - M
162 * ----------- <= ------- <= -------- < ---------
163 * 8 N N (N - 1)
164 *
165 * So, we get:
166 *
167 * E * G * (N - 1)
168 * D = (---------------- + M) < C
169 * 8
170 *
171 * The above inequality means the position of block mark
172 * within the ECC-based view of the page is still in the data chunk,
173 * and it's NOT in the ECC bits of the chunk.
174 *
175 * Use the following to compute the bit position of the
176 * physical block mark within the ECC-based view of the page:
177 * (page_size - D) * 8
178 *
179 * --Huang Shijie
180 */
181 block_mark_bit_offset = mtd->writesize * 8 -
182 (geo->ecc_strength * geo->gf_len * (geo->ecc_chunk_count - 1)
183 + geo->metadata_size * 8);
184
185 geo->block_mark_byte_offset = block_mark_bit_offset / 8;
186 geo->block_mark_bit_offset = block_mark_bit_offset % 8;
187 return 0;
188 }
189
190 struct dma_chan *get_dma_chan(struct gpmi_nand_data *this)
191 {
192 int chipnr = this->current_chip;
193
194 return this->dma_chans[chipnr];
195 }
196
197 /* Can we use the upper's buffer directly for DMA? */
198 void prepare_data_dma(struct gpmi_nand_data *this, enum dma_data_direction dr)
199 {
200 struct scatterlist *sgl = &this->data_sgl;
201 int ret;
202
203 this->direct_dma_map_ok = true;
204
205 /* first try to map the upper buffer directly */
206 sg_init_one(sgl, this->upper_buf, this->upper_len);
207 ret = dma_map_sg(this->dev, sgl, 1, dr);
208 if (ret == 0) {
209 /* We have to use our own DMA buffer. */
210 sg_init_one(sgl, this->data_buffer_dma, PAGE_SIZE);
211
212 if (dr == DMA_TO_DEVICE)
213 memcpy(this->data_buffer_dma, this->upper_buf,
214 this->upper_len);
215
216 ret = dma_map_sg(this->dev, sgl, 1, dr);
217 if (ret == 0)
218 pr_err("map failed.\n");
219
220 this->direct_dma_map_ok = false;
221 }
222 }
223
224 /* This will be called after the DMA operation is finished. */
225 static void dma_irq_callback(void *param)
226 {
227 struct gpmi_nand_data *this = param;
228 struct completion *dma_c = &this->dma_done;
229
230 complete(dma_c);
231
232 switch (this->dma_type) {
233 case DMA_FOR_COMMAND:
234 dma_unmap_sg(this->dev, &this->cmd_sgl, 1, DMA_TO_DEVICE);
235 break;
236
237 case DMA_FOR_READ_DATA:
238 dma_unmap_sg(this->dev, &this->data_sgl, 1, DMA_FROM_DEVICE);
239 if (this->direct_dma_map_ok == false)
240 memcpy(this->upper_buf, this->data_buffer_dma,
241 this->upper_len);
242 break;
243
244 case DMA_FOR_WRITE_DATA:
245 dma_unmap_sg(this->dev, &this->data_sgl, 1, DMA_TO_DEVICE);
246 break;
247
248 case DMA_FOR_READ_ECC_PAGE:
249 case DMA_FOR_WRITE_ECC_PAGE:
250 /* We have to wait the BCH interrupt to finish. */
251 break;
252
253 default:
254 pr_err("in wrong DMA operation.\n");
255 }
256 }
257
258 int start_dma_without_bch_irq(struct gpmi_nand_data *this,
259 struct dma_async_tx_descriptor *desc)
260 {
261 struct completion *dma_c = &this->dma_done;
262 int err;
263
264 init_completion(dma_c);
265
266 desc->callback = dma_irq_callback;
267 desc->callback_param = this;
268 dmaengine_submit(desc);
269
270 /* Wait for the interrupt from the DMA block. */
271 err = wait_for_completion_timeout(dma_c, msecs_to_jiffies(1000));
272 if (!err) {
273 pr_err("DMA timeout, last DMA :%d\n", this->last_dma_type);
274 gpmi_dump_info(this);
275 return -ETIMEDOUT;
276 }
277 return 0;
278 }
279
280 /*
281 * This function is used in BCH reading or BCH writing pages.
282 * It will wait for the BCH interrupt as long as ONE second.
283 * Actually, we must wait for two interrupts :
284 * [1] firstly the DMA interrupt and
285 * [2] secondly the BCH interrupt.
286 */
287 int start_dma_with_bch_irq(struct gpmi_nand_data *this,
288 struct dma_async_tx_descriptor *desc)
289 {
290 struct completion *bch_c = &this->bch_done;
291 int err;
292
293 /* Prepare to receive an interrupt from the BCH block. */
294 init_completion(bch_c);
295
296 /* start the DMA */
297 start_dma_without_bch_irq(this, desc);
298
299 /* Wait for the interrupt from the BCH block. */
300 err = wait_for_completion_timeout(bch_c, msecs_to_jiffies(1000));
301 if (!err) {
302 pr_err("BCH timeout, last DMA :%d\n", this->last_dma_type);
303 gpmi_dump_info(this);
304 return -ETIMEDOUT;
305 }
306 return 0;
307 }
308
309 static int __devinit
310 acquire_register_block(struct gpmi_nand_data *this, const char *res_name)
311 {
312 struct platform_device *pdev = this->pdev;
313 struct resources *res = &this->resources;
314 struct resource *r;
315 void *p;
316
317 r = platform_get_resource_byname(pdev, IORESOURCE_MEM, res_name);
318 if (!r) {
319 pr_err("Can't get resource for %s\n", res_name);
320 return -ENXIO;
321 }
322
323 p = ioremap(r->start, resource_size(r));
324 if (!p) {
325 pr_err("Can't remap %s\n", res_name);
326 return -ENOMEM;
327 }
328
329 if (!strcmp(res_name, GPMI_NAND_GPMI_REGS_ADDR_RES_NAME))
330 res->gpmi_regs = p;
331 else if (!strcmp(res_name, GPMI_NAND_BCH_REGS_ADDR_RES_NAME))
332 res->bch_regs = p;
333 else
334 pr_err("unknown resource name : %s\n", res_name);
335
336 return 0;
337 }
338
339 static void release_register_block(struct gpmi_nand_data *this)
340 {
341 struct resources *res = &this->resources;
342 if (res->gpmi_regs)
343 iounmap(res->gpmi_regs);
344 if (res->bch_regs)
345 iounmap(res->bch_regs);
346 res->gpmi_regs = NULL;
347 res->bch_regs = NULL;
348 }
349
350 static int __devinit
351 acquire_bch_irq(struct gpmi_nand_data *this, irq_handler_t irq_h)
352 {
353 struct platform_device *pdev = this->pdev;
354 struct resources *res = &this->resources;
355 const char *res_name = GPMI_NAND_BCH_INTERRUPT_RES_NAME;
356 struct resource *r;
357 int err;
358
359 r = platform_get_resource_byname(pdev, IORESOURCE_IRQ, res_name);
360 if (!r) {
361 pr_err("Can't get resource for %s\n", res_name);
362 return -ENXIO;
363 }
364
365 err = request_irq(r->start, irq_h, 0, res_name, this);
366 if (err) {
367 pr_err("Can't own %s\n", res_name);
368 return err;
369 }
370
371 res->bch_low_interrupt = r->start;
372 res->bch_high_interrupt = r->end;
373 return 0;
374 }
375
376 static void release_bch_irq(struct gpmi_nand_data *this)
377 {
378 struct resources *res = &this->resources;
379 int i = res->bch_low_interrupt;
380
381 for (; i <= res->bch_high_interrupt; i++)
382 free_irq(i, this);
383 }
384
385 static bool gpmi_dma_filter(struct dma_chan *chan, void *param)
386 {
387 struct gpmi_nand_data *this = param;
388 struct resource *r = this->private;
389
390 if (!mxs_dma_is_apbh(chan))
391 return false;
392 /*
393 * only catch the GPMI dma channels :
394 * for mx23 : MX23_DMA_GPMI0 ~ MX23_DMA_GPMI3
395 * (These four channels share the same IRQ!)
396 *
397 * for mx28 : MX28_DMA_GPMI0 ~ MX28_DMA_GPMI7
398 * (These eight channels share the same IRQ!)
399 */
400 if (r->start <= chan->chan_id && chan->chan_id <= r->end) {
401 chan->private = &this->dma_data;
402 return true;
403 }
404 return false;
405 }
406
407 static void release_dma_channels(struct gpmi_nand_data *this)
408 {
409 unsigned int i;
410 for (i = 0; i < DMA_CHANS; i++)
411 if (this->dma_chans[i]) {
412 dma_release_channel(this->dma_chans[i]);
413 this->dma_chans[i] = NULL;
414 }
415 }
416
417 static int __devinit acquire_dma_channels(struct gpmi_nand_data *this)
418 {
419 struct platform_device *pdev = this->pdev;
420 struct gpmi_nand_platform_data *pdata = this->pdata;
421 struct resources *res = &this->resources;
422 struct resource *r, *r_dma;
423 unsigned int i;
424
425 r = platform_get_resource_byname(pdev, IORESOURCE_DMA,
426 GPMI_NAND_DMA_CHANNELS_RES_NAME);
427 r_dma = platform_get_resource_byname(pdev, IORESOURCE_IRQ,
428 GPMI_NAND_DMA_INTERRUPT_RES_NAME);
429 if (!r || !r_dma) {
430 pr_err("Can't get resource for DMA\n");
431 return -ENXIO;
432 }
433
434 /* used in gpmi_dma_filter() */
435 this->private = r;
436
437 for (i = r->start; i <= r->end; i++) {
438 struct dma_chan *dma_chan;
439 dma_cap_mask_t mask;
440
441 if (i - r->start >= pdata->max_chip_count)
442 break;
443
444 dma_cap_zero(mask);
445 dma_cap_set(DMA_SLAVE, mask);
446
447 /* get the DMA interrupt */
448 if (r_dma->start == r_dma->end) {
449 /* only register the first. */
450 if (i == r->start)
451 this->dma_data.chan_irq = r_dma->start;
452 else
453 this->dma_data.chan_irq = NO_IRQ;
454 } else
455 this->dma_data.chan_irq = r_dma->start + (i - r->start);
456
457 dma_chan = dma_request_channel(mask, gpmi_dma_filter, this);
458 if (!dma_chan)
459 goto acquire_err;
460
461 /* fill the first empty item */
462 this->dma_chans[i - r->start] = dma_chan;
463 }
464
465 res->dma_low_channel = r->start;
466 res->dma_high_channel = i;
467 return 0;
468
469 acquire_err:
470 pr_err("Can't acquire DMA channel %u\n", i);
471 release_dma_channels(this);
472 return -EINVAL;
473 }
474
475 static int __devinit acquire_resources(struct gpmi_nand_data *this)
476 {
477 struct resources *res = &this->resources;
478 int ret;
479
480 ret = acquire_register_block(this, GPMI_NAND_GPMI_REGS_ADDR_RES_NAME);
481 if (ret)
482 goto exit_regs;
483
484 ret = acquire_register_block(this, GPMI_NAND_BCH_REGS_ADDR_RES_NAME);
485 if (ret)
486 goto exit_regs;
487
488 ret = acquire_bch_irq(this, bch_irq);
489 if (ret)
490 goto exit_regs;
491
492 ret = acquire_dma_channels(this);
493 if (ret)
494 goto exit_dma_channels;
495
496 res->clock = clk_get(&this->pdev->dev, NULL);
497 if (IS_ERR(res->clock)) {
498 pr_err("can not get the clock\n");
499 ret = -ENOENT;
500 goto exit_clock;
501 }
502 return 0;
503
504 exit_clock:
505 release_dma_channels(this);
506 exit_dma_channels:
507 release_bch_irq(this);
508 exit_regs:
509 release_register_block(this);
510 return ret;
511 }
512
513 static void release_resources(struct gpmi_nand_data *this)
514 {
515 struct resources *r = &this->resources;
516
517 clk_put(r->clock);
518 release_register_block(this);
519 release_bch_irq(this);
520 release_dma_channels(this);
521 }
522
523 static int __devinit init_hardware(struct gpmi_nand_data *this)
524 {
525 int ret;
526
527 /*
528 * This structure contains the "safe" GPMI timing that should succeed
529 * with any NAND Flash device
530 * (although, with less-than-optimal performance).
531 */
532 struct nand_timing safe_timing = {
533 .data_setup_in_ns = 80,
534 .data_hold_in_ns = 60,
535 .address_setup_in_ns = 25,
536 .gpmi_sample_delay_in_ns = 6,
537 .tREA_in_ns = -1,
538 .tRLOH_in_ns = -1,
539 .tRHOH_in_ns = -1,
540 };
541
542 /* Initialize the hardwares. */
543 ret = gpmi_init(this);
544 if (ret)
545 return ret;
546
547 this->timing = safe_timing;
548 return 0;
549 }
550
551 static int read_page_prepare(struct gpmi_nand_data *this,
552 void *destination, unsigned length,
553 void *alt_virt, dma_addr_t alt_phys, unsigned alt_size,
554 void **use_virt, dma_addr_t *use_phys)
555 {
556 struct device *dev = this->dev;
557
558 if (virt_addr_valid(destination)) {
559 dma_addr_t dest_phys;
560
561 dest_phys = dma_map_single(dev, destination,
562 length, DMA_FROM_DEVICE);
563 if (dma_mapping_error(dev, dest_phys)) {
564 if (alt_size < length) {
565 pr_err("Alternate buffer is too small\n");
566 return -ENOMEM;
567 }
568 goto map_failed;
569 }
570 *use_virt = destination;
571 *use_phys = dest_phys;
572 this->direct_dma_map_ok = true;
573 return 0;
574 }
575
576 map_failed:
577 *use_virt = alt_virt;
578 *use_phys = alt_phys;
579 this->direct_dma_map_ok = false;
580 return 0;
581 }
582
583 static inline void read_page_end(struct gpmi_nand_data *this,
584 void *destination, unsigned length,
585 void *alt_virt, dma_addr_t alt_phys, unsigned alt_size,
586 void *used_virt, dma_addr_t used_phys)
587 {
588 if (this->direct_dma_map_ok)
589 dma_unmap_single(this->dev, used_phys, length, DMA_FROM_DEVICE);
590 }
591
592 static inline void read_page_swap_end(struct gpmi_nand_data *this,
593 void *destination, unsigned length,
594 void *alt_virt, dma_addr_t alt_phys, unsigned alt_size,
595 void *used_virt, dma_addr_t used_phys)
596 {
597 if (!this->direct_dma_map_ok)
598 memcpy(destination, alt_virt, length);
599 }
600
601 static int send_page_prepare(struct gpmi_nand_data *this,
602 const void *source, unsigned length,
603 void *alt_virt, dma_addr_t alt_phys, unsigned alt_size,
604 const void **use_virt, dma_addr_t *use_phys)
605 {
606 struct device *dev = this->dev;
607
608 if (virt_addr_valid(source)) {
609 dma_addr_t source_phys;
610
611 source_phys = dma_map_single(dev, (void *)source, length,
612 DMA_TO_DEVICE);
613 if (dma_mapping_error(dev, source_phys)) {
614 if (alt_size < length) {
615 pr_err("Alternate buffer is too small\n");
616 return -ENOMEM;
617 }
618 goto map_failed;
619 }
620 *use_virt = source;
621 *use_phys = source_phys;
622 return 0;
623 }
624 map_failed:
625 /*
626 * Copy the content of the source buffer into the alternate
627 * buffer and set up the return values accordingly.
628 */
629 memcpy(alt_virt, source, length);
630
631 *use_virt = alt_virt;
632 *use_phys = alt_phys;
633 return 0;
634 }
635
636 static void send_page_end(struct gpmi_nand_data *this,
637 const void *source, unsigned length,
638 void *alt_virt, dma_addr_t alt_phys, unsigned alt_size,
639 const void *used_virt, dma_addr_t used_phys)
640 {
641 struct device *dev = this->dev;
642 if (used_virt == source)
643 dma_unmap_single(dev, used_phys, length, DMA_TO_DEVICE);
644 }
645
646 static void gpmi_free_dma_buffer(struct gpmi_nand_data *this)
647 {
648 struct device *dev = this->dev;
649
650 if (this->page_buffer_virt && virt_addr_valid(this->page_buffer_virt))
651 dma_free_coherent(dev, this->page_buffer_size,
652 this->page_buffer_virt,
653 this->page_buffer_phys);
654 kfree(this->cmd_buffer);
655 kfree(this->data_buffer_dma);
656
657 this->cmd_buffer = NULL;
658 this->data_buffer_dma = NULL;
659 this->page_buffer_virt = NULL;
660 this->page_buffer_size = 0;
661 }
662
663 /* Allocate the DMA buffers */
664 static int gpmi_alloc_dma_buffer(struct gpmi_nand_data *this)
665 {
666 struct bch_geometry *geo = &this->bch_geometry;
667 struct device *dev = this->dev;
668
669 /* [1] Allocate a command buffer. PAGE_SIZE is enough. */
670 this->cmd_buffer = kzalloc(PAGE_SIZE, GFP_DMA);
671 if (this->cmd_buffer == NULL)
672 goto error_alloc;
673
674 /* [2] Allocate a read/write data buffer. PAGE_SIZE is enough. */
675 this->data_buffer_dma = kzalloc(PAGE_SIZE, GFP_DMA);
676 if (this->data_buffer_dma == NULL)
677 goto error_alloc;
678
679 /*
680 * [3] Allocate the page buffer.
681 *
682 * Both the payload buffer and the auxiliary buffer must appear on
683 * 32-bit boundaries. We presume the size of the payload buffer is a
684 * power of two and is much larger than four, which guarantees the
685 * auxiliary buffer will appear on a 32-bit boundary.
686 */
687 this->page_buffer_size = geo->payload_size + geo->auxiliary_size;
688 this->page_buffer_virt = dma_alloc_coherent(dev, this->page_buffer_size,
689 &this->page_buffer_phys, GFP_DMA);
690 if (!this->page_buffer_virt)
691 goto error_alloc;
692
693
694 /* Slice up the page buffer. */
695 this->payload_virt = this->page_buffer_virt;
696 this->payload_phys = this->page_buffer_phys;
697 this->auxiliary_virt = this->payload_virt + geo->payload_size;
698 this->auxiliary_phys = this->payload_phys + geo->payload_size;
699 return 0;
700
701 error_alloc:
702 gpmi_free_dma_buffer(this);
703 pr_err("allocate DMA buffer ret!!\n");
704 return -ENOMEM;
705 }
706
707 static void gpmi_cmd_ctrl(struct mtd_info *mtd, int data, unsigned int ctrl)
708 {
709 struct nand_chip *chip = mtd->priv;
710 struct gpmi_nand_data *this = chip->priv;
711 int ret;
712
713 /*
714 * Every operation begins with a command byte and a series of zero or
715 * more address bytes. These are distinguished by either the Address
716 * Latch Enable (ALE) or Command Latch Enable (CLE) signals being
717 * asserted. When MTD is ready to execute the command, it will deassert
718 * both latch enables.
719 *
720 * Rather than run a separate DMA operation for every single byte, we
721 * queue them up and run a single DMA operation for the entire series
722 * of command and data bytes. NAND_CMD_NONE means the END of the queue.
723 */
724 if ((ctrl & (NAND_ALE | NAND_CLE))) {
725 if (data != NAND_CMD_NONE)
726 this->cmd_buffer[this->command_length++] = data;
727 return;
728 }
729
730 if (!this->command_length)
731 return;
732
733 ret = gpmi_send_command(this);
734 if (ret)
735 pr_err("Chip: %u, Error %d\n", this->current_chip, ret);
736
737 this->command_length = 0;
738 }
739
740 static int gpmi_dev_ready(struct mtd_info *mtd)
741 {
742 struct nand_chip *chip = mtd->priv;
743 struct gpmi_nand_data *this = chip->priv;
744
745 return gpmi_is_ready(this, this->current_chip);
746 }
747
748 static void gpmi_select_chip(struct mtd_info *mtd, int chipnr)
749 {
750 struct nand_chip *chip = mtd->priv;
751 struct gpmi_nand_data *this = chip->priv;
752
753 if ((this->current_chip < 0) && (chipnr >= 0))
754 gpmi_begin(this);
755 else if ((this->current_chip >= 0) && (chipnr < 0))
756 gpmi_end(this);
757
758 this->current_chip = chipnr;
759 }
760
761 static void gpmi_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
762 {
763 struct nand_chip *chip = mtd->priv;
764 struct gpmi_nand_data *this = chip->priv;
765
766 pr_debug("len is %d\n", len);
767 this->upper_buf = buf;
768 this->upper_len = len;
769
770 gpmi_read_data(this);
771 }
772
773 static void gpmi_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
774 {
775 struct nand_chip *chip = mtd->priv;
776 struct gpmi_nand_data *this = chip->priv;
777
778 pr_debug("len is %d\n", len);
779 this->upper_buf = (uint8_t *)buf;
780 this->upper_len = len;
781
782 gpmi_send_data(this);
783 }
784
785 static uint8_t gpmi_read_byte(struct mtd_info *mtd)
786 {
787 struct nand_chip *chip = mtd->priv;
788 struct gpmi_nand_data *this = chip->priv;
789 uint8_t *buf = this->data_buffer_dma;
790
791 gpmi_read_buf(mtd, buf, 1);
792 return buf[0];
793 }
794
795 /*
796 * Handles block mark swapping.
797 * It can be called in swapping the block mark, or swapping it back,
798 * because the the operations are the same.
799 */
800 static void block_mark_swapping(struct gpmi_nand_data *this,
801 void *payload, void *auxiliary)
802 {
803 struct bch_geometry *nfc_geo = &this->bch_geometry;
804 unsigned char *p;
805 unsigned char *a;
806 unsigned int bit;
807 unsigned char mask;
808 unsigned char from_data;
809 unsigned char from_oob;
810
811 if (!this->swap_block_mark)
812 return;
813
814 /*
815 * If control arrives here, we're swapping. Make some convenience
816 * variables.
817 */
818 bit = nfc_geo->block_mark_bit_offset;
819 p = payload + nfc_geo->block_mark_byte_offset;
820 a = auxiliary;
821
822 /*
823 * Get the byte from the data area that overlays the block mark. Since
824 * the ECC engine applies its own view to the bits in the page, the
825 * physical block mark won't (in general) appear on a byte boundary in
826 * the data.
827 */
828 from_data = (p[0] >> bit) | (p[1] << (8 - bit));
829
830 /* Get the byte from the OOB. */
831 from_oob = a[0];
832
833 /* Swap them. */
834 a[0] = from_data;
835
836 mask = (0x1 << bit) - 1;
837 p[0] = (p[0] & mask) | (from_oob << bit);
838
839 mask = ~0 << bit;
840 p[1] = (p[1] & mask) | (from_oob >> (8 - bit));
841 }
842
843 static int gpmi_ecc_read_page(struct mtd_info *mtd, struct nand_chip *chip,
844 uint8_t *buf, int page)
845 {
846 struct gpmi_nand_data *this = chip->priv;
847 struct bch_geometry *nfc_geo = &this->bch_geometry;
848 void *payload_virt;
849 dma_addr_t payload_phys;
850 void *auxiliary_virt;
851 dma_addr_t auxiliary_phys;
852 unsigned int i;
853 unsigned char *status;
854 unsigned int failed;
855 unsigned int corrected;
856 int ret;
857
858 pr_debug("page number is : %d\n", page);
859 ret = read_page_prepare(this, buf, mtd->writesize,
860 this->payload_virt, this->payload_phys,
861 nfc_geo->payload_size,
862 &payload_virt, &payload_phys);
863 if (ret) {
864 pr_err("Inadequate DMA buffer\n");
865 ret = -ENOMEM;
866 return ret;
867 }
868 auxiliary_virt = this->auxiliary_virt;
869 auxiliary_phys = this->auxiliary_phys;
870
871 /* go! */
872 ret = gpmi_read_page(this, payload_phys, auxiliary_phys);
873 read_page_end(this, buf, mtd->writesize,
874 this->payload_virt, this->payload_phys,
875 nfc_geo->payload_size,
876 payload_virt, payload_phys);
877 if (ret) {
878 pr_err("Error in ECC-based read: %d\n", ret);
879 goto exit_nfc;
880 }
881
882 /* handle the block mark swapping */
883 block_mark_swapping(this, payload_virt, auxiliary_virt);
884
885 /* Loop over status bytes, accumulating ECC status. */
886 failed = 0;
887 corrected = 0;
888 status = auxiliary_virt + nfc_geo->auxiliary_status_offset;
889
890 for (i = 0; i < nfc_geo->ecc_chunk_count; i++, status++) {
891 if ((*status == STATUS_GOOD) || (*status == STATUS_ERASED))
892 continue;
893
894 if (*status == STATUS_UNCORRECTABLE) {
895 failed++;
896 continue;
897 }
898 corrected += *status;
899 }
900
901 /*
902 * Propagate ECC status to the owning MTD only when failed or
903 * corrected times nearly reaches our ECC correction threshold.
904 */
905 if (failed || corrected >= (nfc_geo->ecc_strength - 1)) {
906 mtd->ecc_stats.failed += failed;
907 mtd->ecc_stats.corrected += corrected;
908 }
909
910 /*
911 * It's time to deliver the OOB bytes. See gpmi_ecc_read_oob() for
912 * details about our policy for delivering the OOB.
913 *
914 * We fill the caller's buffer with set bits, and then copy the block
915 * mark to th caller's buffer. Note that, if block mark swapping was
916 * necessary, it has already been done, so we can rely on the first
917 * byte of the auxiliary buffer to contain the block mark.
918 */
919 memset(chip->oob_poi, ~0, mtd->oobsize);
920 chip->oob_poi[0] = ((uint8_t *) auxiliary_virt)[0];
921
922 read_page_swap_end(this, buf, mtd->writesize,
923 this->payload_virt, this->payload_phys,
924 nfc_geo->payload_size,
925 payload_virt, payload_phys);
926 exit_nfc:
927 return ret;
928 }
929
930 static void gpmi_ecc_write_page(struct mtd_info *mtd,
931 struct nand_chip *chip, const uint8_t *buf)
932 {
933 struct gpmi_nand_data *this = chip->priv;
934 struct bch_geometry *nfc_geo = &this->bch_geometry;
935 const void *payload_virt;
936 dma_addr_t payload_phys;
937 const void *auxiliary_virt;
938 dma_addr_t auxiliary_phys;
939 int ret;
940
941 pr_debug("ecc write page.\n");
942 if (this->swap_block_mark) {
943 /*
944 * If control arrives here, we're doing block mark swapping.
945 * Since we can't modify the caller's buffers, we must copy them
946 * into our own.
947 */
948 memcpy(this->payload_virt, buf, mtd->writesize);
949 payload_virt = this->payload_virt;
950 payload_phys = this->payload_phys;
951
952 memcpy(this->auxiliary_virt, chip->oob_poi,
953 nfc_geo->auxiliary_size);
954 auxiliary_virt = this->auxiliary_virt;
955 auxiliary_phys = this->auxiliary_phys;
956
957 /* Handle block mark swapping. */
958 block_mark_swapping(this,
959 (void *) payload_virt, (void *) auxiliary_virt);
960 } else {
961 /*
962 * If control arrives here, we're not doing block mark swapping,
963 * so we can to try and use the caller's buffers.
964 */
965 ret = send_page_prepare(this,
966 buf, mtd->writesize,
967 this->payload_virt, this->payload_phys,
968 nfc_geo->payload_size,
969 &payload_virt, &payload_phys);
970 if (ret) {
971 pr_err("Inadequate payload DMA buffer\n");
972 return;
973 }
974
975 ret = send_page_prepare(this,
976 chip->oob_poi, mtd->oobsize,
977 this->auxiliary_virt, this->auxiliary_phys,
978 nfc_geo->auxiliary_size,
979 &auxiliary_virt, &auxiliary_phys);
980 if (ret) {
981 pr_err("Inadequate auxiliary DMA buffer\n");
982 goto exit_auxiliary;
983 }
984 }
985
986 /* Ask the NFC. */
987 ret = gpmi_send_page(this, payload_phys, auxiliary_phys);
988 if (ret)
989 pr_err("Error in ECC-based write: %d\n", ret);
990
991 if (!this->swap_block_mark) {
992 send_page_end(this, chip->oob_poi, mtd->oobsize,
993 this->auxiliary_virt, this->auxiliary_phys,
994 nfc_geo->auxiliary_size,
995 auxiliary_virt, auxiliary_phys);
996 exit_auxiliary:
997 send_page_end(this, buf, mtd->writesize,
998 this->payload_virt, this->payload_phys,
999 nfc_geo->payload_size,
1000 payload_virt, payload_phys);
1001 }
1002 }
1003
1004 /*
1005 * There are several places in this driver where we have to handle the OOB and
1006 * block marks. This is the function where things are the most complicated, so
1007 * this is where we try to explain it all. All the other places refer back to
1008 * here.
1009 *
1010 * These are the rules, in order of decreasing importance:
1011 *
1012 * 1) Nothing the caller does can be allowed to imperil the block mark.
1013 *
1014 * 2) In read operations, the first byte of the OOB we return must reflect the
1015 * true state of the block mark, no matter where that block mark appears in
1016 * the physical page.
1017 *
1018 * 3) ECC-based read operations return an OOB full of set bits (since we never
1019 * allow ECC-based writes to the OOB, it doesn't matter what ECC-based reads
1020 * return).
1021 *
1022 * 4) "Raw" read operations return a direct view of the physical bytes in the
1023 * page, using the conventional definition of which bytes are data and which
1024 * are OOB. This gives the caller a way to see the actual, physical bytes
1025 * in the page, without the distortions applied by our ECC engine.
1026 *
1027 *
1028 * What we do for this specific read operation depends on two questions:
1029 *
1030 * 1) Are we doing a "raw" read, or an ECC-based read?
1031 *
1032 * 2) Are we using block mark swapping or transcription?
1033 *
1034 * There are four cases, illustrated by the following Karnaugh map:
1035 *
1036 * | Raw | ECC-based |
1037 * -------------+-------------------------+-------------------------+
1038 * | Read the conventional | |
1039 * | OOB at the end of the | |
1040 * Swapping | page and return it. It | |
1041 * | contains exactly what | |
1042 * | we want. | Read the block mark and |
1043 * -------------+-------------------------+ return it in a buffer |
1044 * | Read the conventional | full of set bits. |
1045 * | OOB at the end of the | |
1046 * | page and also the block | |
1047 * Transcribing | mark in the metadata. | |
1048 * | Copy the block mark | |
1049 * | into the first byte of | |
1050 * | the OOB. | |
1051 * -------------+-------------------------+-------------------------+
1052 *
1053 * Note that we break rule #4 in the Transcribing/Raw case because we're not
1054 * giving an accurate view of the actual, physical bytes in the page (we're
1055 * overwriting the block mark). That's OK because it's more important to follow
1056 * rule #2.
1057 *
1058 * It turns out that knowing whether we want an "ECC-based" or "raw" read is not
1059 * easy. When reading a page, for example, the NAND Flash MTD code calls our
1060 * ecc.read_page or ecc.read_page_raw function. Thus, the fact that MTD wants an
1061 * ECC-based or raw view of the page is implicit in which function it calls
1062 * (there is a similar pair of ECC-based/raw functions for writing).
1063 *
1064 * Since MTD assumes the OOB is not covered by ECC, there is no pair of
1065 * ECC-based/raw functions for reading or or writing the OOB. The fact that the
1066 * caller wants an ECC-based or raw view of the page is not propagated down to
1067 * this driver.
1068 */
1069 static int gpmi_ecc_read_oob(struct mtd_info *mtd, struct nand_chip *chip,
1070 int page, int sndcmd)
1071 {
1072 struct gpmi_nand_data *this = chip->priv;
1073
1074 pr_debug("page number is %d\n", page);
1075 /* clear the OOB buffer */
1076 memset(chip->oob_poi, ~0, mtd->oobsize);
1077
1078 /* Read out the conventional OOB. */
1079 chip->cmdfunc(mtd, NAND_CMD_READ0, mtd->writesize, page);
1080 chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
1081
1082 /*
1083 * Now, we want to make sure the block mark is correct. In the
1084 * Swapping/Raw case, we already have it. Otherwise, we need to
1085 * explicitly read it.
1086 */
1087 if (!this->swap_block_mark) {
1088 /* Read the block mark into the first byte of the OOB buffer. */
1089 chip->cmdfunc(mtd, NAND_CMD_READ0, 0, page);
1090 chip->oob_poi[0] = chip->read_byte(mtd);
1091 }
1092
1093 /*
1094 * Return true, indicating that the next call to this function must send
1095 * a command.
1096 */
1097 return true;
1098 }
1099
1100 static int
1101 gpmi_ecc_write_oob(struct mtd_info *mtd, struct nand_chip *chip, int page)
1102 {
1103 /*
1104 * The BCH will use all the (page + oob).
1105 * Our gpmi_hw_ecclayout can only prohibit the JFFS2 to write the oob.
1106 * But it can not stop some ioctls such MEMWRITEOOB which uses
1107 * MTD_OOB_PLACE. So We have to implement this function to prohibit
1108 * these ioctls too.
1109 */
1110 return -EPERM;
1111 }
1112
1113 static int gpmi_block_markbad(struct mtd_info *mtd, loff_t ofs)
1114 {
1115 struct nand_chip *chip = mtd->priv;
1116 struct gpmi_nand_data *this = chip->priv;
1117 int block, ret = 0;
1118 uint8_t *block_mark;
1119 int column, page, status, chipnr;
1120
1121 /* Get block number */
1122 block = (int)(ofs >> chip->bbt_erase_shift);
1123 if (chip->bbt)
1124 chip->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1);
1125
1126 /* Do we have a flash based bad block table ? */
1127 if (chip->options & NAND_BBT_USE_FLASH)
1128 ret = nand_update_bbt(mtd, ofs);
1129 else {
1130 chipnr = (int)(ofs >> chip->chip_shift);
1131 chip->select_chip(mtd, chipnr);
1132
1133 column = this->swap_block_mark ? mtd->writesize : 0;
1134
1135 /* Write the block mark. */
1136 block_mark = this->data_buffer_dma;
1137 block_mark[0] = 0; /* bad block marker */
1138
1139 /* Shift to get page */
1140 page = (int)(ofs >> chip->page_shift);
1141
1142 chip->cmdfunc(mtd, NAND_CMD_SEQIN, column, page);
1143 chip->write_buf(mtd, block_mark, 1);
1144 chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
1145
1146 status = chip->waitfunc(mtd, chip);
1147 if (status & NAND_STATUS_FAIL)
1148 ret = -EIO;
1149
1150 chip->select_chip(mtd, -1);
1151 }
1152 if (!ret)
1153 mtd->ecc_stats.badblocks++;
1154
1155 return ret;
1156 }
1157
1158 static int __devinit nand_boot_set_geometry(struct gpmi_nand_data *this)
1159 {
1160 struct boot_rom_geometry *geometry = &this->rom_geometry;
1161
1162 /*
1163 * Set the boot block stride size.
1164 *
1165 * In principle, we should be reading this from the OTP bits, since
1166 * that's where the ROM is going to get it. In fact, we don't have any
1167 * way to read the OTP bits, so we go with the default and hope for the
1168 * best.
1169 */
1170 geometry->stride_size_in_pages = 64;
1171
1172 /*
1173 * Set the search area stride exponent.
1174 *
1175 * In principle, we should be reading this from the OTP bits, since
1176 * that's where the ROM is going to get it. In fact, we don't have any
1177 * way to read the OTP bits, so we go with the default and hope for the
1178 * best.
1179 */
1180 geometry->search_area_stride_exponent = 2;
1181 return 0;
1182 }
1183
1184 static const char *fingerprint = "STMP";
1185 static int __devinit mx23_check_transcription_stamp(struct gpmi_nand_data *this)
1186 {
1187 struct boot_rom_geometry *rom_geo = &this->rom_geometry;
1188 struct device *dev = this->dev;
1189 struct mtd_info *mtd = &this->mtd;
1190 struct nand_chip *chip = &this->nand;
1191 unsigned int search_area_size_in_strides;
1192 unsigned int stride;
1193 unsigned int page;
1194 loff_t byte;
1195 uint8_t *buffer = chip->buffers->databuf;
1196 int saved_chip_number;
1197 int found_an_ncb_fingerprint = false;
1198
1199 /* Compute the number of strides in a search area. */
1200 search_area_size_in_strides = 1 << rom_geo->search_area_stride_exponent;
1201
1202 saved_chip_number = this->current_chip;
1203 chip->select_chip(mtd, 0);
1204
1205 /*
1206 * Loop through the first search area, looking for the NCB fingerprint.
1207 */
1208 dev_dbg(dev, "Scanning for an NCB fingerprint...\n");
1209
1210 for (stride = 0; stride < search_area_size_in_strides; stride++) {
1211 /* Compute the page and byte addresses. */
1212 page = stride * rom_geo->stride_size_in_pages;
1213 byte = page * mtd->writesize;
1214
1215 dev_dbg(dev, "Looking for a fingerprint in page 0x%x\n", page);
1216
1217 /*
1218 * Read the NCB fingerprint. The fingerprint is four bytes long
1219 * and starts in the 12th byte of the page.
1220 */
1221 chip->cmdfunc(mtd, NAND_CMD_READ0, 12, page);
1222 chip->read_buf(mtd, buffer, strlen(fingerprint));
1223
1224 /* Look for the fingerprint. */
1225 if (!memcmp(buffer, fingerprint, strlen(fingerprint))) {
1226 found_an_ncb_fingerprint = true;
1227 break;
1228 }
1229
1230 }
1231
1232 chip->select_chip(mtd, saved_chip_number);
1233
1234 if (found_an_ncb_fingerprint)
1235 dev_dbg(dev, "\tFound a fingerprint\n");
1236 else
1237 dev_dbg(dev, "\tNo fingerprint found\n");
1238 return found_an_ncb_fingerprint;
1239 }
1240
1241 /* Writes a transcription stamp. */
1242 static int __devinit mx23_write_transcription_stamp(struct gpmi_nand_data *this)
1243 {
1244 struct device *dev = this->dev;
1245 struct boot_rom_geometry *rom_geo = &this->rom_geometry;
1246 struct mtd_info *mtd = &this->mtd;
1247 struct nand_chip *chip = &this->nand;
1248 unsigned int block_size_in_pages;
1249 unsigned int search_area_size_in_strides;
1250 unsigned int search_area_size_in_pages;
1251 unsigned int search_area_size_in_blocks;
1252 unsigned int block;
1253 unsigned int stride;
1254 unsigned int page;
1255 loff_t byte;
1256 uint8_t *buffer = chip->buffers->databuf;
1257 int saved_chip_number;
1258 int status;
1259
1260 /* Compute the search area geometry. */
1261 block_size_in_pages = mtd->erasesize / mtd->writesize;
1262 search_area_size_in_strides = 1 << rom_geo->search_area_stride_exponent;
1263 search_area_size_in_pages = search_area_size_in_strides *
1264 rom_geo->stride_size_in_pages;
1265 search_area_size_in_blocks =
1266 (search_area_size_in_pages + (block_size_in_pages - 1)) /
1267 block_size_in_pages;
1268
1269 dev_dbg(dev, "Search Area Geometry :\n");
1270 dev_dbg(dev, "\tin Blocks : %u\n", search_area_size_in_blocks);
1271 dev_dbg(dev, "\tin Strides: %u\n", search_area_size_in_strides);
1272 dev_dbg(dev, "\tin Pages : %u\n", search_area_size_in_pages);
1273
1274 /* Select chip 0. */
1275 saved_chip_number = this->current_chip;
1276 chip->select_chip(mtd, 0);
1277
1278 /* Loop over blocks in the first search area, erasing them. */
1279 dev_dbg(dev, "Erasing the search area...\n");
1280
1281 for (block = 0; block < search_area_size_in_blocks; block++) {
1282 /* Compute the page address. */
1283 page = block * block_size_in_pages;
1284
1285 /* Erase this block. */
1286 dev_dbg(dev, "\tErasing block 0x%x\n", block);
1287 chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page);
1288 chip->cmdfunc(mtd, NAND_CMD_ERASE2, -1, -1);
1289
1290 /* Wait for the erase to finish. */
1291 status = chip->waitfunc(mtd, chip);
1292 if (status & NAND_STATUS_FAIL)
1293 dev_err(dev, "[%s] Erase failed.\n", __func__);
1294 }
1295
1296 /* Write the NCB fingerprint into the page buffer. */
1297 memset(buffer, ~0, mtd->writesize);
1298 memset(chip->oob_poi, ~0, mtd->oobsize);
1299 memcpy(buffer + 12, fingerprint, strlen(fingerprint));
1300
1301 /* Loop through the first search area, writing NCB fingerprints. */
1302 dev_dbg(dev, "Writing NCB fingerprints...\n");
1303 for (stride = 0; stride < search_area_size_in_strides; stride++) {
1304 /* Compute the page and byte addresses. */
1305 page = stride * rom_geo->stride_size_in_pages;
1306 byte = page * mtd->writesize;
1307
1308 /* Write the first page of the current stride. */
1309 dev_dbg(dev, "Writing an NCB fingerprint in page 0x%x\n", page);
1310 chip->cmdfunc(mtd, NAND_CMD_SEQIN, 0x00, page);
1311 chip->ecc.write_page_raw(mtd, chip, buffer);
1312 chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
1313
1314 /* Wait for the write to finish. */
1315 status = chip->waitfunc(mtd, chip);
1316 if (status & NAND_STATUS_FAIL)
1317 dev_err(dev, "[%s] Write failed.\n", __func__);
1318 }
1319
1320 /* Deselect chip 0. */
1321 chip->select_chip(mtd, saved_chip_number);
1322 return 0;
1323 }
1324
1325 static int __devinit mx23_boot_init(struct gpmi_nand_data *this)
1326 {
1327 struct device *dev = this->dev;
1328 struct nand_chip *chip = &this->nand;
1329 struct mtd_info *mtd = &this->mtd;
1330 unsigned int block_count;
1331 unsigned int block;
1332 int chipnr;
1333 int page;
1334 loff_t byte;
1335 uint8_t block_mark;
1336 int ret = 0;
1337
1338 /*
1339 * If control arrives here, we can't use block mark swapping, which
1340 * means we're forced to use transcription. First, scan for the
1341 * transcription stamp. If we find it, then we don't have to do
1342 * anything -- the block marks are already transcribed.
1343 */
1344 if (mx23_check_transcription_stamp(this))
1345 return 0;
1346
1347 /*
1348 * If control arrives here, we couldn't find a transcription stamp, so
1349 * so we presume the block marks are in the conventional location.
1350 */
1351 dev_dbg(dev, "Transcribing bad block marks...\n");
1352
1353 /* Compute the number of blocks in the entire medium. */
1354 block_count = chip->chipsize >> chip->phys_erase_shift;
1355
1356 /*
1357 * Loop over all the blocks in the medium, transcribing block marks as
1358 * we go.
1359 */
1360 for (block = 0; block < block_count; block++) {
1361 /*
1362 * Compute the chip, page and byte addresses for this block's
1363 * conventional mark.
1364 */
1365 chipnr = block >> (chip->chip_shift - chip->phys_erase_shift);
1366 page = block << (chip->phys_erase_shift - chip->page_shift);
1367 byte = block << chip->phys_erase_shift;
1368
1369 /* Send the command to read the conventional block mark. */
1370 chip->select_chip(mtd, chipnr);
1371 chip->cmdfunc(mtd, NAND_CMD_READ0, mtd->writesize, page);
1372 block_mark = chip->read_byte(mtd);
1373 chip->select_chip(mtd, -1);
1374
1375 /*
1376 * Check if the block is marked bad. If so, we need to mark it
1377 * again, but this time the result will be a mark in the
1378 * location where we transcribe block marks.
1379 */
1380 if (block_mark != 0xff) {
1381 dev_dbg(dev, "Transcribing mark in block %u\n", block);
1382 ret = chip->block_markbad(mtd, byte);
1383 if (ret)
1384 dev_err(dev, "Failed to mark block bad with "
1385 "ret %d\n", ret);
1386 }
1387 }
1388
1389 /* Write the stamp that indicates we've transcribed the block marks. */
1390 mx23_write_transcription_stamp(this);
1391 return 0;
1392 }
1393
1394 static int __devinit nand_boot_init(struct gpmi_nand_data *this)
1395 {
1396 nand_boot_set_geometry(this);
1397
1398 /* This is ROM arch-specific initilization before the BBT scanning. */
1399 if (GPMI_IS_MX23(this))
1400 return mx23_boot_init(this);
1401 return 0;
1402 }
1403
1404 static int __devinit gpmi_set_geometry(struct gpmi_nand_data *this)
1405 {
1406 int ret;
1407
1408 /* Free the temporary DMA memory for reading ID. */
1409 gpmi_free_dma_buffer(this);
1410
1411 /* Set up the NFC geometry which is used by BCH. */
1412 ret = bch_set_geometry(this);
1413 if (ret) {
1414 pr_err("set geometry ret : %d\n", ret);
1415 return ret;
1416 }
1417
1418 /* Alloc the new DMA buffers according to the pagesize and oobsize */
1419 return gpmi_alloc_dma_buffer(this);
1420 }
1421
1422 static int gpmi_pre_bbt_scan(struct gpmi_nand_data *this)
1423 {
1424 int ret;
1425
1426 /* Set up swap_block_mark, must be set before the gpmi_set_geometry() */
1427 if (GPMI_IS_MX23(this))
1428 this->swap_block_mark = false;
1429 else
1430 this->swap_block_mark = true;
1431
1432 /* Set up the medium geometry */
1433 ret = gpmi_set_geometry(this);
1434 if (ret)
1435 return ret;
1436
1437 /* NAND boot init, depends on the gpmi_set_geometry(). */
1438 return nand_boot_init(this);
1439 }
1440
1441 static int gpmi_scan_bbt(struct mtd_info *mtd)
1442 {
1443 struct nand_chip *chip = mtd->priv;
1444 struct gpmi_nand_data *this = chip->priv;
1445 int ret;
1446
1447 /* Prepare for the BBT scan. */
1448 ret = gpmi_pre_bbt_scan(this);
1449 if (ret)
1450 return ret;
1451
1452 /* use the default BBT implementation */
1453 return nand_default_bbt(mtd);
1454 }
1455
1456 void gpmi_nfc_exit(struct gpmi_nand_data *this)
1457 {
1458 nand_release(&this->mtd);
1459 gpmi_free_dma_buffer(this);
1460 }
1461
1462 static int __devinit gpmi_nfc_init(struct gpmi_nand_data *this)
1463 {
1464 struct gpmi_nand_platform_data *pdata = this->pdata;
1465 struct mtd_info *mtd = &this->mtd;
1466 struct nand_chip *chip = &this->nand;
1467 int ret;
1468
1469 /* init current chip */
1470 this->current_chip = -1;
1471
1472 /* init the MTD data structures */
1473 mtd->priv = chip;
1474 mtd->name = "gpmi-nand";
1475 mtd->owner = THIS_MODULE;
1476
1477 /* init the nand_chip{}, we don't support a 16-bit NAND Flash bus. */
1478 chip->priv = this;
1479 chip->select_chip = gpmi_select_chip;
1480 chip->cmd_ctrl = gpmi_cmd_ctrl;
1481 chip->dev_ready = gpmi_dev_ready;
1482 chip->read_byte = gpmi_read_byte;
1483 chip->read_buf = gpmi_read_buf;
1484 chip->write_buf = gpmi_write_buf;
1485 chip->ecc.read_page = gpmi_ecc_read_page;
1486 chip->ecc.write_page = gpmi_ecc_write_page;
1487 chip->ecc.read_oob = gpmi_ecc_read_oob;
1488 chip->ecc.write_oob = gpmi_ecc_write_oob;
1489 chip->scan_bbt = gpmi_scan_bbt;
1490 chip->badblock_pattern = &gpmi_bbt_descr;
1491 chip->block_markbad = gpmi_block_markbad;
1492 chip->options |= NAND_NO_SUBPAGE_WRITE;
1493 chip->ecc.mode = NAND_ECC_HW;
1494 chip->ecc.size = 1;
1495 chip->ecc.layout = &gpmi_hw_ecclayout;
1496
1497 /* Allocate a temporary DMA buffer for reading ID in the nand_scan() */
1498 this->bch_geometry.payload_size = 1024;
1499 this->bch_geometry.auxiliary_size = 128;
1500 ret = gpmi_alloc_dma_buffer(this);
1501 if (ret)
1502 goto err_out;
1503
1504 ret = nand_scan(mtd, pdata->max_chip_count);
1505 if (ret) {
1506 pr_err("Chip scan failed\n");
1507 goto err_out;
1508 }
1509
1510 ret = mtd_device_parse_register(mtd, NULL, NULL,
1511 pdata->partitions, pdata->partition_count);
1512 if (ret)
1513 goto err_out;
1514 return 0;
1515
1516 err_out:
1517 gpmi_nfc_exit(this);
1518 return ret;
1519 }
1520
1521 static int __devinit gpmi_nand_probe(struct platform_device *pdev)
1522 {
1523 struct gpmi_nand_platform_data *pdata = pdev->dev.platform_data;
1524 struct gpmi_nand_data *this;
1525 int ret;
1526
1527 this = kzalloc(sizeof(*this), GFP_KERNEL);
1528 if (!this) {
1529 pr_err("Failed to allocate per-device memory\n");
1530 return -ENOMEM;
1531 }
1532
1533 platform_set_drvdata(pdev, this);
1534 this->pdev = pdev;
1535 this->dev = &pdev->dev;
1536 this->pdata = pdata;
1537
1538 if (pdata->platform_init) {
1539 ret = pdata->platform_init();
1540 if (ret)
1541 goto platform_init_error;
1542 }
1543
1544 ret = acquire_resources(this);
1545 if (ret)
1546 goto exit_acquire_resources;
1547
1548 ret = init_hardware(this);
1549 if (ret)
1550 goto exit_nfc_init;
1551
1552 ret = gpmi_nfc_init(this);
1553 if (ret)
1554 goto exit_nfc_init;
1555
1556 return 0;
1557
1558 exit_nfc_init:
1559 release_resources(this);
1560 platform_init_error:
1561 exit_acquire_resources:
1562 platform_set_drvdata(pdev, NULL);
1563 kfree(this);
1564 return ret;
1565 }
1566
1567 static int __exit gpmi_nand_remove(struct platform_device *pdev)
1568 {
1569 struct gpmi_nand_data *this = platform_get_drvdata(pdev);
1570
1571 gpmi_nfc_exit(this);
1572 release_resources(this);
1573 platform_set_drvdata(pdev, NULL);
1574 kfree(this);
1575 return 0;
1576 }
1577
1578 static const struct platform_device_id gpmi_ids[] = {
1579 {
1580 .name = "imx23-gpmi-nand",
1581 .driver_data = IS_MX23,
1582 }, {
1583 .name = "imx28-gpmi-nand",
1584 .driver_data = IS_MX28,
1585 }, {},
1586 };
1587
1588 static struct platform_driver gpmi_nand_driver = {
1589 .driver = {
1590 .name = "gpmi-nand",
1591 },
1592 .probe = gpmi_nand_probe,
1593 .remove = __exit_p(gpmi_nand_remove),
1594 .id_table = gpmi_ids,
1595 };
1596
1597 static int __init gpmi_nand_init(void)
1598 {
1599 int err;
1600
1601 err = platform_driver_register(&gpmi_nand_driver);
1602 if (err == 0)
1603 printk(KERN_INFO "GPMI NAND driver registered. (IMX)\n");
1604 else
1605 pr_err("i.MX GPMI NAND driver registration failed\n");
1606 return err;
1607 }
1608
1609 static void __exit gpmi_nand_exit(void)
1610 {
1611 platform_driver_unregister(&gpmi_nand_driver);
1612 }
1613
1614 module_init(gpmi_nand_init);
1615 module_exit(gpmi_nand_exit);
1616
1617 MODULE_AUTHOR("Freescale Semiconductor, Inc.");
1618 MODULE_DESCRIPTION("i.MX GPMI NAND Flash Controller Driver");
1619 MODULE_LICENSE("GPL");