5 * This is the generic MTD driver for NAND flash devices. It should be
6 * capable of working with almost all NAND chips currently available.
7 * Basic support for AG-AND chips is provided.
9 * Additional technical information is available on
10 * http://www.linux-mtd.infradead.org/doc/nand.html
12 * Copyright (C) 2000 Steven J. Hill (sjhill@realitydiluted.com)
13 * 2002-2006 Thomas Gleixner (tglx@linutronix.de)
16 * David Woodhouse for adding multichip support
18 * Aleph One Ltd. and Toby Churchill Ltd. for supporting the
19 * rework for 2K page size chips
22 * Enable cached programming for 2k page size chips
23 * Check, if mtd->ecctype should be set to MTD_ECC_HW
24 * if we have HW ecc support.
25 * The AG-AND chips have nice features for speed improvement,
26 * which are not supported yet. Read / program 4 pages in one go.
27 * BBT table is not serialized, has to be fixed
29 * This program is free software; you can redistribute it and/or modify
30 * it under the terms of the GNU General Public License version 2 as
31 * published by the Free Software Foundation.
35 #include <linux/module.h>
36 #include <linux/delay.h>
37 #include <linux/errno.h>
38 #include <linux/err.h>
39 #include <linux/sched.h>
40 #include <linux/slab.h>
41 #include <linux/types.h>
42 #include <linux/mtd/mtd.h>
43 #include <linux/mtd/nand.h>
44 #include <linux/mtd/nand_ecc.h>
45 #include <linux/mtd/compatmac.h>
46 #include <linux/interrupt.h>
47 #include <linux/bitops.h>
48 #include <linux/leds.h>
51 #ifdef CONFIG_MTD_PARTITIONS
52 #include <linux/mtd/partitions.h>
55 /* Define default oob placement schemes for large and small page devices */
56 static struct nand_ecclayout nand_oob_8
= {
66 static struct nand_ecclayout nand_oob_16
= {
68 .eccpos
= {0, 1, 2, 3, 6, 7},
74 static struct nand_ecclayout nand_oob_64
= {
77 40, 41, 42, 43, 44, 45, 46, 47,
78 48, 49, 50, 51, 52, 53, 54, 55,
79 56, 57, 58, 59, 60, 61, 62, 63},
85 static struct nand_ecclayout nand_oob_128
= {
88 80, 81, 82, 83, 84, 85, 86, 87,
89 88, 89, 90, 91, 92, 93, 94, 95,
90 96, 97, 98, 99, 100, 101, 102, 103,
91 104, 105, 106, 107, 108, 109, 110, 111,
92 112, 113, 114, 115, 116, 117, 118, 119,
93 120, 121, 122, 123, 124, 125, 126, 127},
99 static int nand_get_device(struct nand_chip
*chip
, struct mtd_info
*mtd
,
102 static int nand_do_write_oob(struct mtd_info
*mtd
, loff_t to
,
103 struct mtd_oob_ops
*ops
);
106 * For devices which display every fart in the system on a separate LED. Is
107 * compiled away when LED support is disabled.
109 DEFINE_LED_TRIGGER(nand_led_trigger
);
111 static int check_offs_len(struct mtd_info
*mtd
,
112 loff_t ofs
, uint64_t len
)
114 struct nand_chip
*chip
= mtd
->priv
;
117 /* Start address must align on block boundary */
118 if (ofs
& ((1 << chip
->phys_erase_shift
) - 1)) {
119 DEBUG(MTD_DEBUG_LEVEL0
, "%s: Unaligned address\n", __func__
);
123 /* Length must align on block boundary */
124 if (len
& ((1 << chip
->phys_erase_shift
) - 1)) {
125 DEBUG(MTD_DEBUG_LEVEL0
, "%s: Length not block aligned\n",
130 /* Do not allow past end of device */
131 if (ofs
+ len
> mtd
->size
) {
132 DEBUG(MTD_DEBUG_LEVEL0
, "%s: Past end of device\n",
141 * nand_release_device - [GENERIC] release chip
142 * @mtd: MTD device structure
144 * Deselect, release chip lock and wake up anyone waiting on the device
146 static void nand_release_device(struct mtd_info
*mtd
)
148 struct nand_chip
*chip
= mtd
->priv
;
150 /* De-select the NAND device */
151 chip
->select_chip(mtd
, -1);
153 /* Release the controller and the chip */
154 spin_lock(&chip
->controller
->lock
);
155 chip
->controller
->active
= NULL
;
156 chip
->state
= FL_READY
;
157 wake_up(&chip
->controller
->wq
);
158 spin_unlock(&chip
->controller
->lock
);
162 * nand_read_byte - [DEFAULT] read one byte from the chip
163 * @mtd: MTD device structure
165 * Default read function for 8bit buswith
167 static uint8_t nand_read_byte(struct mtd_info
*mtd
)
169 struct nand_chip
*chip
= mtd
->priv
;
170 return readb(chip
->IO_ADDR_R
);
174 * nand_read_byte16 - [DEFAULT] read one byte endianess aware from the chip
175 * @mtd: MTD device structure
177 * Default read function for 16bit buswith with
178 * endianess conversion
180 static uint8_t nand_read_byte16(struct mtd_info
*mtd
)
182 struct nand_chip
*chip
= mtd
->priv
;
183 return (uint8_t) cpu_to_le16(readw(chip
->IO_ADDR_R
));
187 * nand_read_word - [DEFAULT] read one word from the chip
188 * @mtd: MTD device structure
190 * Default read function for 16bit buswith without
191 * endianess conversion
193 static u16
nand_read_word(struct mtd_info
*mtd
)
195 struct nand_chip
*chip
= mtd
->priv
;
196 return readw(chip
->IO_ADDR_R
);
200 * nand_select_chip - [DEFAULT] control CE line
201 * @mtd: MTD device structure
202 * @chipnr: chipnumber to select, -1 for deselect
204 * Default select function for 1 chip devices.
206 static void nand_select_chip(struct mtd_info
*mtd
, int chipnr
)
208 struct nand_chip
*chip
= mtd
->priv
;
212 chip
->cmd_ctrl(mtd
, NAND_CMD_NONE
, 0 | NAND_CTRL_CHANGE
);
223 * nand_write_buf - [DEFAULT] write buffer to chip
224 * @mtd: MTD device structure
226 * @len: number of bytes to write
228 * Default write function for 8bit buswith
230 static void nand_write_buf(struct mtd_info
*mtd
, const uint8_t *buf
, int len
)
233 struct nand_chip
*chip
= mtd
->priv
;
235 for (i
= 0; i
< len
; i
++)
236 writeb(buf
[i
], chip
->IO_ADDR_W
);
240 * nand_read_buf - [DEFAULT] read chip data into buffer
241 * @mtd: MTD device structure
242 * @buf: buffer to store date
243 * @len: number of bytes to read
245 * Default read function for 8bit buswith
247 static void nand_read_buf(struct mtd_info
*mtd
, uint8_t *buf
, int len
)
250 struct nand_chip
*chip
= mtd
->priv
;
252 for (i
= 0; i
< len
; i
++)
253 buf
[i
] = readb(chip
->IO_ADDR_R
);
257 * nand_verify_buf - [DEFAULT] Verify chip data against buffer
258 * @mtd: MTD device structure
259 * @buf: buffer containing the data to compare
260 * @len: number of bytes to compare
262 * Default verify function for 8bit buswith
264 static int nand_verify_buf(struct mtd_info
*mtd
, const uint8_t *buf
, int len
)
267 struct nand_chip
*chip
= mtd
->priv
;
269 for (i
= 0; i
< len
; i
++)
270 if (buf
[i
] != readb(chip
->IO_ADDR_R
))
276 * nand_write_buf16 - [DEFAULT] write buffer to chip
277 * @mtd: MTD device structure
279 * @len: number of bytes to write
281 * Default write function for 16bit buswith
283 static void nand_write_buf16(struct mtd_info
*mtd
, const uint8_t *buf
, int len
)
286 struct nand_chip
*chip
= mtd
->priv
;
287 u16
*p
= (u16
*) buf
;
290 for (i
= 0; i
< len
; i
++)
291 writew(p
[i
], chip
->IO_ADDR_W
);
296 * nand_read_buf16 - [DEFAULT] read chip data into buffer
297 * @mtd: MTD device structure
298 * @buf: buffer to store date
299 * @len: number of bytes to read
301 * Default read function for 16bit buswith
303 static void nand_read_buf16(struct mtd_info
*mtd
, uint8_t *buf
, int len
)
306 struct nand_chip
*chip
= mtd
->priv
;
307 u16
*p
= (u16
*) buf
;
310 for (i
= 0; i
< len
; i
++)
311 p
[i
] = readw(chip
->IO_ADDR_R
);
315 * nand_verify_buf16 - [DEFAULT] Verify chip data against buffer
316 * @mtd: MTD device structure
317 * @buf: buffer containing the data to compare
318 * @len: number of bytes to compare
320 * Default verify function for 16bit buswith
322 static int nand_verify_buf16(struct mtd_info
*mtd
, const uint8_t *buf
, int len
)
325 struct nand_chip
*chip
= mtd
->priv
;
326 u16
*p
= (u16
*) buf
;
329 for (i
= 0; i
< len
; i
++)
330 if (p
[i
] != readw(chip
->IO_ADDR_R
))
337 * nand_block_bad - [DEFAULT] Read bad block marker from the chip
338 * @mtd: MTD device structure
339 * @ofs: offset from device start
340 * @getchip: 0, if the chip is already selected
342 * Check, if the block is bad.
344 static int nand_block_bad(struct mtd_info
*mtd
, loff_t ofs
, int getchip
)
346 int page
, chipnr
, res
= 0;
347 struct nand_chip
*chip
= mtd
->priv
;
350 page
= (int)(ofs
>> chip
->page_shift
) & chip
->pagemask
;
353 chipnr
= (int)(ofs
>> chip
->chip_shift
);
355 nand_get_device(chip
, mtd
, FL_READING
);
357 /* Select the NAND device */
358 chip
->select_chip(mtd
, chipnr
);
361 if (chip
->options
& NAND_BUSWIDTH_16
) {
362 chip
->cmdfunc(mtd
, NAND_CMD_READOOB
, chip
->badblockpos
& 0xFE,
364 bad
= cpu_to_le16(chip
->read_word(mtd
));
365 if (chip
->badblockpos
& 0x1)
370 chip
->cmdfunc(mtd
, NAND_CMD_READOOB
, chip
->badblockpos
, page
);
371 bad
= chip
->read_byte(mtd
);
374 if (likely(chip
->badblockbits
== 8))
377 res
= hweight8(bad
) < chip
->badblockbits
;
380 nand_release_device(mtd
);
386 * nand_default_block_markbad - [DEFAULT] mark a block bad
387 * @mtd: MTD device structure
388 * @ofs: offset from device start
390 * This is the default implementation, which can be overridden by
391 * a hardware specific driver.
393 static int nand_default_block_markbad(struct mtd_info
*mtd
, loff_t ofs
)
395 struct nand_chip
*chip
= mtd
->priv
;
396 uint8_t buf
[2] = { 0, 0 };
399 /* Get block number */
400 block
= (int)(ofs
>> chip
->bbt_erase_shift
);
402 chip
->bbt
[block
>> 2] |= 0x01 << ((block
& 0x03) << 1);
404 /* Do we have a flash based bad block table ? */
405 if (chip
->options
& NAND_USE_FLASH_BBT
)
406 ret
= nand_update_bbt(mtd
, ofs
);
408 /* We write two bytes, so we dont have to mess with 16 bit
411 nand_get_device(chip
, mtd
, FL_WRITING
);
413 chip
->ops
.len
= chip
->ops
.ooblen
= 2;
414 chip
->ops
.datbuf
= NULL
;
415 chip
->ops
.oobbuf
= buf
;
416 chip
->ops
.ooboffs
= chip
->badblockpos
& ~0x01;
418 ret
= nand_do_write_oob(mtd
, ofs
, &chip
->ops
);
419 nand_release_device(mtd
);
422 mtd
->ecc_stats
.badblocks
++;
428 * nand_check_wp - [GENERIC] check if the chip is write protected
429 * @mtd: MTD device structure
430 * Check, if the device is write protected
432 * The function expects, that the device is already selected
434 static int nand_check_wp(struct mtd_info
*mtd
)
436 struct nand_chip
*chip
= mtd
->priv
;
438 /* broken xD cards report WP despite being writable */
439 if (chip
->options
& NAND_BROKEN_XD
)
442 /* Check the WP bit */
443 chip
->cmdfunc(mtd
, NAND_CMD_STATUS
, -1, -1);
444 return (chip
->read_byte(mtd
) & NAND_STATUS_WP
) ? 0 : 1;
448 * nand_block_checkbad - [GENERIC] Check if a block is marked bad
449 * @mtd: MTD device structure
450 * @ofs: offset from device start
451 * @getchip: 0, if the chip is already selected
452 * @allowbbt: 1, if its allowed to access the bbt area
454 * Check, if the block is bad. Either by reading the bad block table or
455 * calling of the scan function.
457 static int nand_block_checkbad(struct mtd_info
*mtd
, loff_t ofs
, int getchip
,
460 struct nand_chip
*chip
= mtd
->priv
;
463 return chip
->block_bad(mtd
, ofs
, getchip
);
465 /* Return info from the table */
466 return nand_isbad_bbt(mtd
, ofs
, allowbbt
);
470 * panic_nand_wait_ready - [GENERIC] Wait for the ready pin after commands.
471 * @mtd: MTD device structure
474 * Helper function for nand_wait_ready used when needing to wait in interrupt
477 static void panic_nand_wait_ready(struct mtd_info
*mtd
, unsigned long timeo
)
479 struct nand_chip
*chip
= mtd
->priv
;
482 /* Wait for the device to get ready */
483 for (i
= 0; i
< timeo
; i
++) {
484 if (chip
->dev_ready(mtd
))
486 touch_softlockup_watchdog();
492 * Wait for the ready pin, after a command
493 * The timeout is catched later.
495 void nand_wait_ready(struct mtd_info
*mtd
)
497 struct nand_chip
*chip
= mtd
->priv
;
498 unsigned long timeo
= jiffies
+ 2;
501 if (in_interrupt() || oops_in_progress
)
502 return panic_nand_wait_ready(mtd
, 400);
504 led_trigger_event(nand_led_trigger
, LED_FULL
);
505 /* wait until command is processed or timeout occures */
507 if (chip
->dev_ready(mtd
))
509 touch_softlockup_watchdog();
510 } while (time_before(jiffies
, timeo
));
511 led_trigger_event(nand_led_trigger
, LED_OFF
);
513 EXPORT_SYMBOL_GPL(nand_wait_ready
);
516 * nand_command - [DEFAULT] Send command to NAND device
517 * @mtd: MTD device structure
518 * @command: the command to be sent
519 * @column: the column address for this command, -1 if none
520 * @page_addr: the page address for this command, -1 if none
522 * Send command to NAND device. This function is used for small page
523 * devices (256/512 Bytes per page)
525 static void nand_command(struct mtd_info
*mtd
, unsigned int command
,
526 int column
, int page_addr
)
528 register struct nand_chip
*chip
= mtd
->priv
;
529 int ctrl
= NAND_CTRL_CLE
| NAND_CTRL_CHANGE
;
532 * Write out the command to the device.
534 if (command
== NAND_CMD_SEQIN
) {
537 if (column
>= mtd
->writesize
) {
539 column
-= mtd
->writesize
;
540 readcmd
= NAND_CMD_READOOB
;
541 } else if (column
< 256) {
542 /* First 256 bytes --> READ0 */
543 readcmd
= NAND_CMD_READ0
;
546 readcmd
= NAND_CMD_READ1
;
548 chip
->cmd_ctrl(mtd
, readcmd
, ctrl
);
549 ctrl
&= ~NAND_CTRL_CHANGE
;
551 chip
->cmd_ctrl(mtd
, command
, ctrl
);
554 * Address cycle, when necessary
556 ctrl
= NAND_CTRL_ALE
| NAND_CTRL_CHANGE
;
557 /* Serially input address */
559 /* Adjust columns for 16 bit buswidth */
560 if (chip
->options
& NAND_BUSWIDTH_16
)
562 chip
->cmd_ctrl(mtd
, column
, ctrl
);
563 ctrl
&= ~NAND_CTRL_CHANGE
;
565 if (page_addr
!= -1) {
566 chip
->cmd_ctrl(mtd
, page_addr
, ctrl
);
567 ctrl
&= ~NAND_CTRL_CHANGE
;
568 chip
->cmd_ctrl(mtd
, page_addr
>> 8, ctrl
);
569 /* One more address cycle for devices > 32MiB */
570 if (chip
->chipsize
> (32 << 20))
571 chip
->cmd_ctrl(mtd
, page_addr
>> 16, ctrl
);
573 chip
->cmd_ctrl(mtd
, NAND_CMD_NONE
, NAND_NCE
| NAND_CTRL_CHANGE
);
576 * program and erase have their own busy handlers
577 * status and sequential in needs no delay
581 case NAND_CMD_PAGEPROG
:
582 case NAND_CMD_ERASE1
:
583 case NAND_CMD_ERASE2
:
585 case NAND_CMD_STATUS
:
591 udelay(chip
->chip_delay
);
592 chip
->cmd_ctrl(mtd
, NAND_CMD_STATUS
,
593 NAND_CTRL_CLE
| NAND_CTRL_CHANGE
);
595 NAND_CMD_NONE
, NAND_NCE
| NAND_CTRL_CHANGE
);
596 while (!(chip
->read_byte(mtd
) & NAND_STATUS_READY
)) ;
599 /* This applies to read commands */
602 * If we don't have access to the busy pin, we apply the given
605 if (!chip
->dev_ready
) {
606 udelay(chip
->chip_delay
);
610 /* Apply this short delay always to ensure that we do wait tWB in
611 * any case on any machine. */
614 nand_wait_ready(mtd
);
618 * nand_command_lp - [DEFAULT] Send command to NAND large page device
619 * @mtd: MTD device structure
620 * @command: the command to be sent
621 * @column: the column address for this command, -1 if none
622 * @page_addr: the page address for this command, -1 if none
624 * Send command to NAND device. This is the version for the new large page
625 * devices We dont have the separate regions as we have in the small page
626 * devices. We must emulate NAND_CMD_READOOB to keep the code compatible.
628 static void nand_command_lp(struct mtd_info
*mtd
, unsigned int command
,
629 int column
, int page_addr
)
631 register struct nand_chip
*chip
= mtd
->priv
;
633 /* Emulate NAND_CMD_READOOB */
634 if (command
== NAND_CMD_READOOB
) {
635 column
+= mtd
->writesize
;
636 command
= NAND_CMD_READ0
;
639 /* Command latch cycle */
640 chip
->cmd_ctrl(mtd
, command
& 0xff,
641 NAND_NCE
| NAND_CLE
| NAND_CTRL_CHANGE
);
643 if (column
!= -1 || page_addr
!= -1) {
644 int ctrl
= NAND_CTRL_CHANGE
| NAND_NCE
| NAND_ALE
;
646 /* Serially input address */
648 /* Adjust columns for 16 bit buswidth */
649 if (chip
->options
& NAND_BUSWIDTH_16
)
651 chip
->cmd_ctrl(mtd
, column
, ctrl
);
652 ctrl
&= ~NAND_CTRL_CHANGE
;
653 chip
->cmd_ctrl(mtd
, column
>> 8, ctrl
);
655 if (page_addr
!= -1) {
656 chip
->cmd_ctrl(mtd
, page_addr
, ctrl
);
657 chip
->cmd_ctrl(mtd
, page_addr
>> 8,
658 NAND_NCE
| NAND_ALE
);
659 /* One more address cycle for devices > 128MiB */
660 if (chip
->chipsize
> (128 << 20))
661 chip
->cmd_ctrl(mtd
, page_addr
>> 16,
662 NAND_NCE
| NAND_ALE
);
665 chip
->cmd_ctrl(mtd
, NAND_CMD_NONE
, NAND_NCE
| NAND_CTRL_CHANGE
);
668 * program and erase have their own busy handlers
669 * status, sequential in, and deplete1 need no delay
673 case NAND_CMD_CACHEDPROG
:
674 case NAND_CMD_PAGEPROG
:
675 case NAND_CMD_ERASE1
:
676 case NAND_CMD_ERASE2
:
679 case NAND_CMD_STATUS
:
680 case NAND_CMD_DEPLETE1
:
684 * read error status commands require only a short delay
686 case NAND_CMD_STATUS_ERROR
:
687 case NAND_CMD_STATUS_ERROR0
:
688 case NAND_CMD_STATUS_ERROR1
:
689 case NAND_CMD_STATUS_ERROR2
:
690 case NAND_CMD_STATUS_ERROR3
:
691 udelay(chip
->chip_delay
);
697 udelay(chip
->chip_delay
);
698 chip
->cmd_ctrl(mtd
, NAND_CMD_STATUS
,
699 NAND_NCE
| NAND_CLE
| NAND_CTRL_CHANGE
);
700 chip
->cmd_ctrl(mtd
, NAND_CMD_NONE
,
701 NAND_NCE
| NAND_CTRL_CHANGE
);
702 while (!(chip
->read_byte(mtd
) & NAND_STATUS_READY
)) ;
705 case NAND_CMD_RNDOUT
:
706 /* No ready / busy check necessary */
707 chip
->cmd_ctrl(mtd
, NAND_CMD_RNDOUTSTART
,
708 NAND_NCE
| NAND_CLE
| NAND_CTRL_CHANGE
);
709 chip
->cmd_ctrl(mtd
, NAND_CMD_NONE
,
710 NAND_NCE
| NAND_CTRL_CHANGE
);
714 chip
->cmd_ctrl(mtd
, NAND_CMD_READSTART
,
715 NAND_NCE
| NAND_CLE
| NAND_CTRL_CHANGE
);
716 chip
->cmd_ctrl(mtd
, NAND_CMD_NONE
,
717 NAND_NCE
| NAND_CTRL_CHANGE
);
719 /* This applies to read commands */
722 * If we don't have access to the busy pin, we apply the given
725 if (!chip
->dev_ready
) {
726 udelay(chip
->chip_delay
);
731 /* Apply this short delay always to ensure that we do wait tWB in
732 * any case on any machine. */
735 nand_wait_ready(mtd
);
739 * panic_nand_get_device - [GENERIC] Get chip for selected access
740 * @chip: the nand chip descriptor
741 * @mtd: MTD device structure
742 * @new_state: the state which is requested
744 * Used when in panic, no locks are taken.
746 static void panic_nand_get_device(struct nand_chip
*chip
,
747 struct mtd_info
*mtd
, int new_state
)
749 /* Hardware controller shared among independend devices */
750 chip
->controller
->active
= chip
;
751 chip
->state
= new_state
;
755 * nand_get_device - [GENERIC] Get chip for selected access
756 * @chip: the nand chip descriptor
757 * @mtd: MTD device structure
758 * @new_state: the state which is requested
760 * Get the device and lock it for exclusive access
763 nand_get_device(struct nand_chip
*chip
, struct mtd_info
*mtd
, int new_state
)
765 spinlock_t
*lock
= &chip
->controller
->lock
;
766 wait_queue_head_t
*wq
= &chip
->controller
->wq
;
767 DECLARE_WAITQUEUE(wait
, current
);
771 /* Hardware controller shared among independent devices */
772 if (!chip
->controller
->active
)
773 chip
->controller
->active
= chip
;
775 if (chip
->controller
->active
== chip
&& chip
->state
== FL_READY
) {
776 chip
->state
= new_state
;
780 if (new_state
== FL_PM_SUSPENDED
) {
781 if (chip
->controller
->active
->state
== FL_PM_SUSPENDED
) {
782 chip
->state
= FL_PM_SUSPENDED
;
787 set_current_state(TASK_UNINTERRUPTIBLE
);
788 add_wait_queue(wq
, &wait
);
791 remove_wait_queue(wq
, &wait
);
796 * panic_nand_wait - [GENERIC] wait until the command is done
797 * @mtd: MTD device structure
798 * @chip: NAND chip structure
801 * Wait for command done. This is a helper function for nand_wait used when
802 * we are in interrupt context. May happen when in panic and trying to write
803 * an oops trough mtdoops.
805 static void panic_nand_wait(struct mtd_info
*mtd
, struct nand_chip
*chip
,
809 for (i
= 0; i
< timeo
; i
++) {
810 if (chip
->dev_ready
) {
811 if (chip
->dev_ready(mtd
))
814 if (chip
->read_byte(mtd
) & NAND_STATUS_READY
)
822 * nand_wait - [DEFAULT] wait until the command is done
823 * @mtd: MTD device structure
824 * @chip: NAND chip structure
826 * Wait for command done. This applies to erase and program only
827 * Erase can take up to 400ms and program up to 20ms according to
828 * general NAND and SmartMedia specs
830 static int nand_wait(struct mtd_info
*mtd
, struct nand_chip
*chip
)
833 unsigned long timeo
= jiffies
;
834 int status
, state
= chip
->state
;
836 if (state
== FL_ERASING
)
837 timeo
+= (HZ
* 400) / 1000;
839 timeo
+= (HZ
* 20) / 1000;
841 led_trigger_event(nand_led_trigger
, LED_FULL
);
843 /* Apply this short delay always to ensure that we do wait tWB in
844 * any case on any machine. */
847 if ((state
== FL_ERASING
) && (chip
->options
& NAND_IS_AND
))
848 chip
->cmdfunc(mtd
, NAND_CMD_STATUS_MULTI
, -1, -1);
850 chip
->cmdfunc(mtd
, NAND_CMD_STATUS
, -1, -1);
852 if (in_interrupt() || oops_in_progress
)
853 panic_nand_wait(mtd
, chip
, timeo
);
855 while (time_before(jiffies
, timeo
)) {
856 if (chip
->dev_ready
) {
857 if (chip
->dev_ready(mtd
))
860 if (chip
->read_byte(mtd
) & NAND_STATUS_READY
)
866 led_trigger_event(nand_led_trigger
, LED_OFF
);
868 status
= (int)chip
->read_byte(mtd
);
873 * __nand_unlock - [REPLACABLE] unlocks specified locked blockes
875 * @param mtd - mtd info
876 * @param ofs - offset to start unlock from
877 * @param len - length to unlock
878 * @invert - when = 0, unlock the range of blocks within the lower and
879 * upper boundary address
880 * whne = 1, unlock the range of blocks outside the boundaries
881 * of the lower and upper boundary address
883 * @return - unlock status
885 static int __nand_unlock(struct mtd_info
*mtd
, loff_t ofs
,
886 uint64_t len
, int invert
)
890 struct nand_chip
*chip
= mtd
->priv
;
892 /* Submit address of first page to unlock */
893 page
= ofs
>> chip
->page_shift
;
894 chip
->cmdfunc(mtd
, NAND_CMD_UNLOCK1
, -1, page
& chip
->pagemask
);
896 /* Submit address of last page to unlock */
897 page
= (ofs
+ len
) >> chip
->page_shift
;
898 chip
->cmdfunc(mtd
, NAND_CMD_UNLOCK2
, -1,
899 (page
| invert
) & chip
->pagemask
);
901 /* Call wait ready function */
902 status
= chip
->waitfunc(mtd
, chip
);
904 /* See if device thinks it succeeded */
906 DEBUG(MTD_DEBUG_LEVEL0
, "%s: Error status = 0x%08x\n",
915 * nand_unlock - [REPLACABLE] unlocks specified locked blockes
917 * @param mtd - mtd info
918 * @param ofs - offset to start unlock from
919 * @param len - length to unlock
921 * @return - unlock status
923 int nand_unlock(struct mtd_info
*mtd
, loff_t ofs
, uint64_t len
)
927 struct nand_chip
*chip
= mtd
->priv
;
929 DEBUG(MTD_DEBUG_LEVEL3
, "%s: start = 0x%012llx, len = %llu\n",
930 __func__
, (unsigned long long)ofs
, len
);
932 if (check_offs_len(mtd
, ofs
, len
))
935 /* Align to last block address if size addresses end of the device */
936 if (ofs
+ len
== mtd
->size
)
937 len
-= mtd
->erasesize
;
939 nand_get_device(chip
, mtd
, FL_UNLOCKING
);
941 /* Shift to get chip number */
942 chipnr
= ofs
>> chip
->chip_shift
;
944 chip
->select_chip(mtd
, chipnr
);
946 /* Check, if it is write protected */
947 if (nand_check_wp(mtd
)) {
948 DEBUG(MTD_DEBUG_LEVEL0
, "%s: Device is write protected!!!\n",
954 ret
= __nand_unlock(mtd
, ofs
, len
, 0);
957 /* de-select the NAND device */
958 chip
->select_chip(mtd
, -1);
960 nand_release_device(mtd
);
966 * nand_lock - [REPLACABLE] locks all blockes present in the device
968 * @param mtd - mtd info
969 * @param ofs - offset to start unlock from
970 * @param len - length to unlock
972 * @return - lock status
974 * This feature is not support in many NAND parts. 'Micron' NAND parts
975 * do have this feature, but it allows only to lock all blocks not for
976 * specified range for block.
978 * Implementing 'lock' feature by making use of 'unlock', for now.
980 int nand_lock(struct mtd_info
*mtd
, loff_t ofs
, uint64_t len
)
983 int chipnr
, status
, page
;
984 struct nand_chip
*chip
= mtd
->priv
;
986 DEBUG(MTD_DEBUG_LEVEL3
, "%s: start = 0x%012llx, len = %llu\n",
987 __func__
, (unsigned long long)ofs
, len
);
989 if (check_offs_len(mtd
, ofs
, len
))
992 nand_get_device(chip
, mtd
, FL_LOCKING
);
994 /* Shift to get chip number */
995 chipnr
= ofs
>> chip
->chip_shift
;
997 chip
->select_chip(mtd
, chipnr
);
999 /* Check, if it is write protected */
1000 if (nand_check_wp(mtd
)) {
1001 DEBUG(MTD_DEBUG_LEVEL0
, "%s: Device is write protected!!!\n",
1003 status
= MTD_ERASE_FAILED
;
1008 /* Submit address of first page to lock */
1009 page
= ofs
>> chip
->page_shift
;
1010 chip
->cmdfunc(mtd
, NAND_CMD_LOCK
, -1, page
& chip
->pagemask
);
1012 /* Call wait ready function */
1013 status
= chip
->waitfunc(mtd
, chip
);
1015 /* See if device thinks it succeeded */
1016 if (status
& 0x01) {
1017 DEBUG(MTD_DEBUG_LEVEL0
, "%s: Error status = 0x%08x\n",
1023 ret
= __nand_unlock(mtd
, ofs
, len
, 0x1);
1026 /* de-select the NAND device */
1027 chip
->select_chip(mtd
, -1);
1029 nand_release_device(mtd
);
1035 * nand_read_page_raw - [Intern] read raw page data without ecc
1036 * @mtd: mtd info structure
1037 * @chip: nand chip info structure
1038 * @buf: buffer to store read data
1039 * @page: page number to read
1041 * Not for syndrome calculating ecc controllers, which use a special oob layout
1043 static int nand_read_page_raw(struct mtd_info
*mtd
, struct nand_chip
*chip
,
1044 uint8_t *buf
, int page
)
1046 chip
->read_buf(mtd
, buf
, mtd
->writesize
);
1047 chip
->read_buf(mtd
, chip
->oob_poi
, mtd
->oobsize
);
1052 * nand_read_page_raw_syndrome - [Intern] read raw page data without ecc
1053 * @mtd: mtd info structure
1054 * @chip: nand chip info structure
1055 * @buf: buffer to store read data
1056 * @page: page number to read
1058 * We need a special oob layout and handling even when OOB isn't used.
1060 static int nand_read_page_raw_syndrome(struct mtd_info
*mtd
, struct nand_chip
*chip
,
1061 uint8_t *buf
, int page
)
1063 int eccsize
= chip
->ecc
.size
;
1064 int eccbytes
= chip
->ecc
.bytes
;
1065 uint8_t *oob
= chip
->oob_poi
;
1068 for (steps
= chip
->ecc
.steps
; steps
> 0; steps
--) {
1069 chip
->read_buf(mtd
, buf
, eccsize
);
1072 if (chip
->ecc
.prepad
) {
1073 chip
->read_buf(mtd
, oob
, chip
->ecc
.prepad
);
1074 oob
+= chip
->ecc
.prepad
;
1077 chip
->read_buf(mtd
, oob
, eccbytes
);
1080 if (chip
->ecc
.postpad
) {
1081 chip
->read_buf(mtd
, oob
, chip
->ecc
.postpad
);
1082 oob
+= chip
->ecc
.postpad
;
1086 size
= mtd
->oobsize
- (oob
- chip
->oob_poi
);
1088 chip
->read_buf(mtd
, oob
, size
);
1094 * nand_read_page_swecc - [REPLACABLE] software ecc based page read function
1095 * @mtd: mtd info structure
1096 * @chip: nand chip info structure
1097 * @buf: buffer to store read data
1098 * @page: page number to read
1100 static int nand_read_page_swecc(struct mtd_info
*mtd
, struct nand_chip
*chip
,
1101 uint8_t *buf
, int page
)
1103 int i
, eccsize
= chip
->ecc
.size
;
1104 int eccbytes
= chip
->ecc
.bytes
;
1105 int eccsteps
= chip
->ecc
.steps
;
1107 uint8_t *ecc_calc
= chip
->buffers
->ecccalc
;
1108 uint8_t *ecc_code
= chip
->buffers
->ecccode
;
1109 uint32_t *eccpos
= chip
->ecc
.layout
->eccpos
;
1111 chip
->ecc
.read_page_raw(mtd
, chip
, buf
, page
);
1113 for (i
= 0; eccsteps
; eccsteps
--, i
+= eccbytes
, p
+= eccsize
)
1114 chip
->ecc
.calculate(mtd
, p
, &ecc_calc
[i
]);
1116 for (i
= 0; i
< chip
->ecc
.total
; i
++)
1117 ecc_code
[i
] = chip
->oob_poi
[eccpos
[i
]];
1119 eccsteps
= chip
->ecc
.steps
;
1122 for (i
= 0 ; eccsteps
; eccsteps
--, i
+= eccbytes
, p
+= eccsize
) {
1125 stat
= chip
->ecc
.correct(mtd
, p
, &ecc_code
[i
], &ecc_calc
[i
]);
1127 mtd
->ecc_stats
.failed
++;
1129 mtd
->ecc_stats
.corrected
+= stat
;
1135 * nand_read_subpage - [REPLACABLE] software ecc based sub-page read function
1136 * @mtd: mtd info structure
1137 * @chip: nand chip info structure
1138 * @data_offs: offset of requested data within the page
1139 * @readlen: data length
1140 * @bufpoi: buffer to store read data
1142 static int nand_read_subpage(struct mtd_info
*mtd
, struct nand_chip
*chip
, uint32_t data_offs
, uint32_t readlen
, uint8_t *bufpoi
)
1144 int start_step
, end_step
, num_steps
;
1145 uint32_t *eccpos
= chip
->ecc
.layout
->eccpos
;
1147 int data_col_addr
, i
, gaps
= 0;
1148 int datafrag_len
, eccfrag_len
, aligned_len
, aligned_pos
;
1149 int busw
= (chip
->options
& NAND_BUSWIDTH_16
) ? 2 : 1;
1151 /* Column address wihin the page aligned to ECC size (256bytes). */
1152 start_step
= data_offs
/ chip
->ecc
.size
;
1153 end_step
= (data_offs
+ readlen
- 1) / chip
->ecc
.size
;
1154 num_steps
= end_step
- start_step
+ 1;
1156 /* Data size aligned to ECC ecc.size*/
1157 datafrag_len
= num_steps
* chip
->ecc
.size
;
1158 eccfrag_len
= num_steps
* chip
->ecc
.bytes
;
1160 data_col_addr
= start_step
* chip
->ecc
.size
;
1161 /* If we read not a page aligned data */
1162 if (data_col_addr
!= 0)
1163 chip
->cmdfunc(mtd
, NAND_CMD_RNDOUT
, data_col_addr
, -1);
1165 p
= bufpoi
+ data_col_addr
;
1166 chip
->read_buf(mtd
, p
, datafrag_len
);
1169 for (i
= 0; i
< eccfrag_len
; i
+= chip
->ecc
.bytes
, p
+= chip
->ecc
.size
)
1170 chip
->ecc
.calculate(mtd
, p
, &chip
->buffers
->ecccalc
[i
]);
1172 /* The performance is faster if to position offsets
1173 according to ecc.pos. Let make sure here that
1174 there are no gaps in ecc positions */
1175 for (i
= 0; i
< eccfrag_len
- 1; i
++) {
1176 if (eccpos
[i
+ start_step
* chip
->ecc
.bytes
] + 1 !=
1177 eccpos
[i
+ start_step
* chip
->ecc
.bytes
+ 1]) {
1183 chip
->cmdfunc(mtd
, NAND_CMD_RNDOUT
, mtd
->writesize
, -1);
1184 chip
->read_buf(mtd
, chip
->oob_poi
, mtd
->oobsize
);
1186 /* send the command to read the particular ecc bytes */
1187 /* take care about buswidth alignment in read_buf */
1188 aligned_pos
= eccpos
[start_step
* chip
->ecc
.bytes
] & ~(busw
- 1);
1189 aligned_len
= eccfrag_len
;
1190 if (eccpos
[start_step
* chip
->ecc
.bytes
] & (busw
- 1))
1192 if (eccpos
[(start_step
+ num_steps
) * chip
->ecc
.bytes
] & (busw
- 1))
1195 chip
->cmdfunc(mtd
, NAND_CMD_RNDOUT
, mtd
->writesize
+ aligned_pos
, -1);
1196 chip
->read_buf(mtd
, &chip
->oob_poi
[aligned_pos
], aligned_len
);
1199 for (i
= 0; i
< eccfrag_len
; i
++)
1200 chip
->buffers
->ecccode
[i
] = chip
->oob_poi
[eccpos
[i
+ start_step
* chip
->ecc
.bytes
]];
1202 p
= bufpoi
+ data_col_addr
;
1203 for (i
= 0; i
< eccfrag_len
; i
+= chip
->ecc
.bytes
, p
+= chip
->ecc
.size
) {
1206 stat
= chip
->ecc
.correct(mtd
, p
, &chip
->buffers
->ecccode
[i
], &chip
->buffers
->ecccalc
[i
]);
1208 mtd
->ecc_stats
.failed
++;
1210 mtd
->ecc_stats
.corrected
+= stat
;
1216 * nand_read_page_hwecc - [REPLACABLE] hardware ecc based page read function
1217 * @mtd: mtd info structure
1218 * @chip: nand chip info structure
1219 * @buf: buffer to store read data
1220 * @page: page number to read
1222 * Not for syndrome calculating ecc controllers which need a special oob layout
1224 static int nand_read_page_hwecc(struct mtd_info
*mtd
, struct nand_chip
*chip
,
1225 uint8_t *buf
, int page
)
1227 int i
, eccsize
= chip
->ecc
.size
;
1228 int eccbytes
= chip
->ecc
.bytes
;
1229 int eccsteps
= chip
->ecc
.steps
;
1231 uint8_t *ecc_calc
= chip
->buffers
->ecccalc
;
1232 uint8_t *ecc_code
= chip
->buffers
->ecccode
;
1233 uint32_t *eccpos
= chip
->ecc
.layout
->eccpos
;
1235 for (i
= 0; eccsteps
; eccsteps
--, i
+= eccbytes
, p
+= eccsize
) {
1236 chip
->ecc
.hwctl(mtd
, NAND_ECC_READ
);
1237 chip
->read_buf(mtd
, p
, eccsize
);
1238 chip
->ecc
.calculate(mtd
, p
, &ecc_calc
[i
]);
1240 chip
->read_buf(mtd
, chip
->oob_poi
, mtd
->oobsize
);
1242 for (i
= 0; i
< chip
->ecc
.total
; i
++)
1243 ecc_code
[i
] = chip
->oob_poi
[eccpos
[i
]];
1245 eccsteps
= chip
->ecc
.steps
;
1248 for (i
= 0 ; eccsteps
; eccsteps
--, i
+= eccbytes
, p
+= eccsize
) {
1251 stat
= chip
->ecc
.correct(mtd
, p
, &ecc_code
[i
], &ecc_calc
[i
]);
1253 mtd
->ecc_stats
.failed
++;
1255 mtd
->ecc_stats
.corrected
+= stat
;
1261 * nand_read_page_hwecc_oob_first - [REPLACABLE] hw ecc, read oob first
1262 * @mtd: mtd info structure
1263 * @chip: nand chip info structure
1264 * @buf: buffer to store read data
1265 * @page: page number to read
1267 * Hardware ECC for large page chips, require OOB to be read first.
1268 * For this ECC mode, the write_page method is re-used from ECC_HW.
1269 * These methods read/write ECC from the OOB area, unlike the
1270 * ECC_HW_SYNDROME support with multiple ECC steps, follows the
1271 * "infix ECC" scheme and reads/writes ECC from the data area, by
1272 * overwriting the NAND manufacturer bad block markings.
1274 static int nand_read_page_hwecc_oob_first(struct mtd_info
*mtd
,
1275 struct nand_chip
*chip
, uint8_t *buf
, int page
)
1277 int i
, eccsize
= chip
->ecc
.size
;
1278 int eccbytes
= chip
->ecc
.bytes
;
1279 int eccsteps
= chip
->ecc
.steps
;
1281 uint8_t *ecc_code
= chip
->buffers
->ecccode
;
1282 uint32_t *eccpos
= chip
->ecc
.layout
->eccpos
;
1283 uint8_t *ecc_calc
= chip
->buffers
->ecccalc
;
1285 /* Read the OOB area first */
1286 chip
->cmdfunc(mtd
, NAND_CMD_READOOB
, 0, page
);
1287 chip
->read_buf(mtd
, chip
->oob_poi
, mtd
->oobsize
);
1288 chip
->cmdfunc(mtd
, NAND_CMD_READ0
, 0, page
);
1290 for (i
= 0; i
< chip
->ecc
.total
; i
++)
1291 ecc_code
[i
] = chip
->oob_poi
[eccpos
[i
]];
1293 for (i
= 0; eccsteps
; eccsteps
--, i
+= eccbytes
, p
+= eccsize
) {
1296 chip
->ecc
.hwctl(mtd
, NAND_ECC_READ
);
1297 chip
->read_buf(mtd
, p
, eccsize
);
1298 chip
->ecc
.calculate(mtd
, p
, &ecc_calc
[i
]);
1300 stat
= chip
->ecc
.correct(mtd
, p
, &ecc_code
[i
], NULL
);
1302 mtd
->ecc_stats
.failed
++;
1304 mtd
->ecc_stats
.corrected
+= stat
;
1310 * nand_read_page_syndrome - [REPLACABLE] hardware ecc syndrom based page read
1311 * @mtd: mtd info structure
1312 * @chip: nand chip info structure
1313 * @buf: buffer to store read data
1314 * @page: page number to read
1316 * The hw generator calculates the error syndrome automatically. Therefor
1317 * we need a special oob layout and handling.
1319 static int nand_read_page_syndrome(struct mtd_info
*mtd
, struct nand_chip
*chip
,
1320 uint8_t *buf
, int page
)
1322 int i
, eccsize
= chip
->ecc
.size
;
1323 int eccbytes
= chip
->ecc
.bytes
;
1324 int eccsteps
= chip
->ecc
.steps
;
1326 uint8_t *oob
= chip
->oob_poi
;
1328 for (i
= 0; eccsteps
; eccsteps
--, i
+= eccbytes
, p
+= eccsize
) {
1331 chip
->ecc
.hwctl(mtd
, NAND_ECC_READ
);
1332 chip
->read_buf(mtd
, p
, eccsize
);
1334 if (chip
->ecc
.prepad
) {
1335 chip
->read_buf(mtd
, oob
, chip
->ecc
.prepad
);
1336 oob
+= chip
->ecc
.prepad
;
1339 chip
->ecc
.hwctl(mtd
, NAND_ECC_READSYN
);
1340 chip
->read_buf(mtd
, oob
, eccbytes
);
1341 stat
= chip
->ecc
.correct(mtd
, p
, oob
, NULL
);
1344 mtd
->ecc_stats
.failed
++;
1346 mtd
->ecc_stats
.corrected
+= stat
;
1350 if (chip
->ecc
.postpad
) {
1351 chip
->read_buf(mtd
, oob
, chip
->ecc
.postpad
);
1352 oob
+= chip
->ecc
.postpad
;
1356 /* Calculate remaining oob bytes */
1357 i
= mtd
->oobsize
- (oob
- chip
->oob_poi
);
1359 chip
->read_buf(mtd
, oob
, i
);
1365 * nand_transfer_oob - [Internal] Transfer oob to client buffer
1366 * @chip: nand chip structure
1367 * @oob: oob destination address
1368 * @ops: oob ops structure
1369 * @len: size of oob to transfer
1371 static uint8_t *nand_transfer_oob(struct nand_chip
*chip
, uint8_t *oob
,
1372 struct mtd_oob_ops
*ops
, size_t len
)
1378 memcpy(oob
, chip
->oob_poi
+ ops
->ooboffs
, len
);
1381 case MTD_OOB_AUTO
: {
1382 struct nand_oobfree
*free
= chip
->ecc
.layout
->oobfree
;
1383 uint32_t boffs
= 0, roffs
= ops
->ooboffs
;
1386 for(; free
->length
&& len
; free
++, len
-= bytes
) {
1387 /* Read request not from offset 0 ? */
1388 if (unlikely(roffs
)) {
1389 if (roffs
>= free
->length
) {
1390 roffs
-= free
->length
;
1393 boffs
= free
->offset
+ roffs
;
1394 bytes
= min_t(size_t, len
,
1395 (free
->length
- roffs
));
1398 bytes
= min_t(size_t, len
, free
->length
);
1399 boffs
= free
->offset
;
1401 memcpy(oob
, chip
->oob_poi
+ boffs
, bytes
);
1413 * nand_do_read_ops - [Internal] Read data with ECC
1415 * @mtd: MTD device structure
1416 * @from: offset to read from
1417 * @ops: oob ops structure
1419 * Internal function. Called with chip held.
1421 static int nand_do_read_ops(struct mtd_info
*mtd
, loff_t from
,
1422 struct mtd_oob_ops
*ops
)
1424 int chipnr
, page
, realpage
, col
, bytes
, aligned
;
1425 struct nand_chip
*chip
= mtd
->priv
;
1426 struct mtd_ecc_stats stats
;
1427 int blkcheck
= (1 << (chip
->phys_erase_shift
- chip
->page_shift
)) - 1;
1430 uint32_t readlen
= ops
->len
;
1431 uint32_t oobreadlen
= ops
->ooblen
;
1432 uint32_t max_oobsize
= ops
->mode
== MTD_OOB_AUTO
?
1433 mtd
->oobavail
: mtd
->oobsize
;
1435 uint8_t *bufpoi
, *oob
, *buf
;
1437 stats
= mtd
->ecc_stats
;
1439 chipnr
= (int)(from
>> chip
->chip_shift
);
1440 chip
->select_chip(mtd
, chipnr
);
1442 realpage
= (int)(from
>> chip
->page_shift
);
1443 page
= realpage
& chip
->pagemask
;
1445 col
= (int)(from
& (mtd
->writesize
- 1));
1451 bytes
= min(mtd
->writesize
- col
, readlen
);
1452 aligned
= (bytes
== mtd
->writesize
);
1454 /* Is the current page in the buffer ? */
1455 if (realpage
!= chip
->pagebuf
|| oob
) {
1456 bufpoi
= aligned
? buf
: chip
->buffers
->databuf
;
1458 if (likely(sndcmd
)) {
1459 chip
->cmdfunc(mtd
, NAND_CMD_READ0
, 0x00, page
);
1463 /* Now read the page into the buffer */
1464 if (unlikely(ops
->mode
== MTD_OOB_RAW
))
1465 ret
= chip
->ecc
.read_page_raw(mtd
, chip
,
1467 else if (!aligned
&& NAND_SUBPAGE_READ(chip
) && !oob
)
1468 ret
= chip
->ecc
.read_subpage(mtd
, chip
, col
, bytes
, bufpoi
);
1470 ret
= chip
->ecc
.read_page(mtd
, chip
, bufpoi
,
1475 /* Transfer not aligned data */
1477 if (!NAND_SUBPAGE_READ(chip
) && !oob
)
1478 chip
->pagebuf
= realpage
;
1479 memcpy(buf
, chip
->buffers
->databuf
+ col
, bytes
);
1484 if (unlikely(oob
)) {
1486 int toread
= min(oobreadlen
, max_oobsize
);
1489 oob
= nand_transfer_oob(chip
,
1491 oobreadlen
-= toread
;
1495 if (!(chip
->options
& NAND_NO_READRDY
)) {
1497 * Apply delay or wait for ready/busy pin. Do
1498 * this before the AUTOINCR check, so no
1499 * problems arise if a chip which does auto
1500 * increment is marked as NOAUTOINCR by the
1503 if (!chip
->dev_ready
)
1504 udelay(chip
->chip_delay
);
1506 nand_wait_ready(mtd
);
1509 memcpy(buf
, chip
->buffers
->databuf
+ col
, bytes
);
1518 /* For subsequent reads align to page boundary. */
1520 /* Increment page address */
1523 page
= realpage
& chip
->pagemask
;
1524 /* Check, if we cross a chip boundary */
1527 chip
->select_chip(mtd
, -1);
1528 chip
->select_chip(mtd
, chipnr
);
1531 /* Check, if the chip supports auto page increment
1532 * or if we have hit a block boundary.
1534 if (!NAND_CANAUTOINCR(chip
) || !(page
& blkcheck
))
1538 ops
->retlen
= ops
->len
- (size_t) readlen
;
1540 ops
->oobretlen
= ops
->ooblen
- oobreadlen
;
1545 if (mtd
->ecc_stats
.failed
- stats
.failed
)
1548 return mtd
->ecc_stats
.corrected
- stats
.corrected
? -EUCLEAN
: 0;
1552 * nand_read - [MTD Interface] MTD compability function for nand_do_read_ecc
1553 * @mtd: MTD device structure
1554 * @from: offset to read from
1555 * @len: number of bytes to read
1556 * @retlen: pointer to variable to store the number of read bytes
1557 * @buf: the databuffer to put data
1559 * Get hold of the chip and call nand_do_read
1561 static int nand_read(struct mtd_info
*mtd
, loff_t from
, size_t len
,
1562 size_t *retlen
, uint8_t *buf
)
1564 struct nand_chip
*chip
= mtd
->priv
;
1567 /* Do not allow reads past end of device */
1568 if ((from
+ len
) > mtd
->size
)
1573 nand_get_device(chip
, mtd
, FL_READING
);
1575 chip
->ops
.len
= len
;
1576 chip
->ops
.datbuf
= buf
;
1577 chip
->ops
.oobbuf
= NULL
;
1579 ret
= nand_do_read_ops(mtd
, from
, &chip
->ops
);
1581 *retlen
= chip
->ops
.retlen
;
1583 nand_release_device(mtd
);
1589 * nand_read_oob_std - [REPLACABLE] the most common OOB data read function
1590 * @mtd: mtd info structure
1591 * @chip: nand chip info structure
1592 * @page: page number to read
1593 * @sndcmd: flag whether to issue read command or not
1595 static int nand_read_oob_std(struct mtd_info
*mtd
, struct nand_chip
*chip
,
1596 int page
, int sndcmd
)
1599 chip
->cmdfunc(mtd
, NAND_CMD_READOOB
, 0, page
);
1602 chip
->read_buf(mtd
, chip
->oob_poi
, mtd
->oobsize
);
1607 * nand_read_oob_syndrome - [REPLACABLE] OOB data read function for HW ECC
1609 * @mtd: mtd info structure
1610 * @chip: nand chip info structure
1611 * @page: page number to read
1612 * @sndcmd: flag whether to issue read command or not
1614 static int nand_read_oob_syndrome(struct mtd_info
*mtd
, struct nand_chip
*chip
,
1615 int page
, int sndcmd
)
1617 uint8_t *buf
= chip
->oob_poi
;
1618 int length
= mtd
->oobsize
;
1619 int chunk
= chip
->ecc
.bytes
+ chip
->ecc
.prepad
+ chip
->ecc
.postpad
;
1620 int eccsize
= chip
->ecc
.size
;
1621 uint8_t *bufpoi
= buf
;
1622 int i
, toread
, sndrnd
= 0, pos
;
1624 chip
->cmdfunc(mtd
, NAND_CMD_READ0
, chip
->ecc
.size
, page
);
1625 for (i
= 0; i
< chip
->ecc
.steps
; i
++) {
1627 pos
= eccsize
+ i
* (eccsize
+ chunk
);
1628 if (mtd
->writesize
> 512)
1629 chip
->cmdfunc(mtd
, NAND_CMD_RNDOUT
, pos
, -1);
1631 chip
->cmdfunc(mtd
, NAND_CMD_READ0
, pos
, page
);
1634 toread
= min_t(int, length
, chunk
);
1635 chip
->read_buf(mtd
, bufpoi
, toread
);
1640 chip
->read_buf(mtd
, bufpoi
, length
);
1646 * nand_write_oob_std - [REPLACABLE] the most common OOB data write function
1647 * @mtd: mtd info structure
1648 * @chip: nand chip info structure
1649 * @page: page number to write
1651 static int nand_write_oob_std(struct mtd_info
*mtd
, struct nand_chip
*chip
,
1655 const uint8_t *buf
= chip
->oob_poi
;
1656 int length
= mtd
->oobsize
;
1658 chip
->cmdfunc(mtd
, NAND_CMD_SEQIN
, mtd
->writesize
, page
);
1659 chip
->write_buf(mtd
, buf
, length
);
1660 /* Send command to program the OOB data */
1661 chip
->cmdfunc(mtd
, NAND_CMD_PAGEPROG
, -1, -1);
1663 status
= chip
->waitfunc(mtd
, chip
);
1665 return status
& NAND_STATUS_FAIL
? -EIO
: 0;
1669 * nand_write_oob_syndrome - [REPLACABLE] OOB data write function for HW ECC
1670 * with syndrome - only for large page flash !
1671 * @mtd: mtd info structure
1672 * @chip: nand chip info structure
1673 * @page: page number to write
1675 static int nand_write_oob_syndrome(struct mtd_info
*mtd
,
1676 struct nand_chip
*chip
, int page
)
1678 int chunk
= chip
->ecc
.bytes
+ chip
->ecc
.prepad
+ chip
->ecc
.postpad
;
1679 int eccsize
= chip
->ecc
.size
, length
= mtd
->oobsize
;
1680 int i
, len
, pos
, status
= 0, sndcmd
= 0, steps
= chip
->ecc
.steps
;
1681 const uint8_t *bufpoi
= chip
->oob_poi
;
1684 * data-ecc-data-ecc ... ecc-oob
1686 * data-pad-ecc-pad-data-pad .... ecc-pad-oob
1688 if (!chip
->ecc
.prepad
&& !chip
->ecc
.postpad
) {
1689 pos
= steps
* (eccsize
+ chunk
);
1694 chip
->cmdfunc(mtd
, NAND_CMD_SEQIN
, pos
, page
);
1695 for (i
= 0; i
< steps
; i
++) {
1697 if (mtd
->writesize
<= 512) {
1698 uint32_t fill
= 0xFFFFFFFF;
1702 int num
= min_t(int, len
, 4);
1703 chip
->write_buf(mtd
, (uint8_t *)&fill
,
1708 pos
= eccsize
+ i
* (eccsize
+ chunk
);
1709 chip
->cmdfunc(mtd
, NAND_CMD_RNDIN
, pos
, -1);
1713 len
= min_t(int, length
, chunk
);
1714 chip
->write_buf(mtd
, bufpoi
, len
);
1719 chip
->write_buf(mtd
, bufpoi
, length
);
1721 chip
->cmdfunc(mtd
, NAND_CMD_PAGEPROG
, -1, -1);
1722 status
= chip
->waitfunc(mtd
, chip
);
1724 return status
& NAND_STATUS_FAIL
? -EIO
: 0;
1728 * nand_do_read_oob - [Intern] NAND read out-of-band
1729 * @mtd: MTD device structure
1730 * @from: offset to read from
1731 * @ops: oob operations description structure
1733 * NAND read out-of-band data from the spare area
1735 static int nand_do_read_oob(struct mtd_info
*mtd
, loff_t from
,
1736 struct mtd_oob_ops
*ops
)
1738 int page
, realpage
, chipnr
, sndcmd
= 1;
1739 struct nand_chip
*chip
= mtd
->priv
;
1740 int blkcheck
= (1 << (chip
->phys_erase_shift
- chip
->page_shift
)) - 1;
1741 int readlen
= ops
->ooblen
;
1743 uint8_t *buf
= ops
->oobbuf
;
1745 DEBUG(MTD_DEBUG_LEVEL3
, "%s: from = 0x%08Lx, len = %i\n",
1746 __func__
, (unsigned long long)from
, readlen
);
1748 if (ops
->mode
== MTD_OOB_AUTO
)
1749 len
= chip
->ecc
.layout
->oobavail
;
1753 if (unlikely(ops
->ooboffs
>= len
)) {
1754 DEBUG(MTD_DEBUG_LEVEL0
, "%s: Attempt to start read "
1755 "outside oob\n", __func__
);
1759 /* Do not allow reads past end of device */
1760 if (unlikely(from
>= mtd
->size
||
1761 ops
->ooboffs
+ readlen
> ((mtd
->size
>> chip
->page_shift
) -
1762 (from
>> chip
->page_shift
)) * len
)) {
1763 DEBUG(MTD_DEBUG_LEVEL0
, "%s: Attempt read beyond end "
1764 "of device\n", __func__
);
1768 chipnr
= (int)(from
>> chip
->chip_shift
);
1769 chip
->select_chip(mtd
, chipnr
);
1771 /* Shift to get page */
1772 realpage
= (int)(from
>> chip
->page_shift
);
1773 page
= realpage
& chip
->pagemask
;
1776 sndcmd
= chip
->ecc
.read_oob(mtd
, chip
, page
, sndcmd
);
1778 len
= min(len
, readlen
);
1779 buf
= nand_transfer_oob(chip
, buf
, ops
, len
);
1781 if (!(chip
->options
& NAND_NO_READRDY
)) {
1783 * Apply delay or wait for ready/busy pin. Do this
1784 * before the AUTOINCR check, so no problems arise if a
1785 * chip which does auto increment is marked as
1786 * NOAUTOINCR by the board driver.
1788 if (!chip
->dev_ready
)
1789 udelay(chip
->chip_delay
);
1791 nand_wait_ready(mtd
);
1798 /* Increment page address */
1801 page
= realpage
& chip
->pagemask
;
1802 /* Check, if we cross a chip boundary */
1805 chip
->select_chip(mtd
, -1);
1806 chip
->select_chip(mtd
, chipnr
);
1809 /* Check, if the chip supports auto page increment
1810 * or if we have hit a block boundary.
1812 if (!NAND_CANAUTOINCR(chip
) || !(page
& blkcheck
))
1816 ops
->oobretlen
= ops
->ooblen
;
1821 * nand_read_oob - [MTD Interface] NAND read data and/or out-of-band
1822 * @mtd: MTD device structure
1823 * @from: offset to read from
1824 * @ops: oob operation description structure
1826 * NAND read data and/or out-of-band data
1828 static int nand_read_oob(struct mtd_info
*mtd
, loff_t from
,
1829 struct mtd_oob_ops
*ops
)
1831 struct nand_chip
*chip
= mtd
->priv
;
1832 int ret
= -ENOTSUPP
;
1836 /* Do not allow reads past end of device */
1837 if (ops
->datbuf
&& (from
+ ops
->len
) > mtd
->size
) {
1838 DEBUG(MTD_DEBUG_LEVEL0
, "%s: Attempt read "
1839 "beyond end of device\n", __func__
);
1843 nand_get_device(chip
, mtd
, FL_READING
);
1856 ret
= nand_do_read_oob(mtd
, from
, ops
);
1858 ret
= nand_do_read_ops(mtd
, from
, ops
);
1861 nand_release_device(mtd
);
1867 * nand_write_page_raw - [Intern] raw page write function
1868 * @mtd: mtd info structure
1869 * @chip: nand chip info structure
1872 * Not for syndrome calculating ecc controllers, which use a special oob layout
1874 static void nand_write_page_raw(struct mtd_info
*mtd
, struct nand_chip
*chip
,
1877 chip
->write_buf(mtd
, buf
, mtd
->writesize
);
1878 chip
->write_buf(mtd
, chip
->oob_poi
, mtd
->oobsize
);
1882 * nand_write_page_raw_syndrome - [Intern] raw page write function
1883 * @mtd: mtd info structure
1884 * @chip: nand chip info structure
1887 * We need a special oob layout and handling even when ECC isn't checked.
1889 static void nand_write_page_raw_syndrome(struct mtd_info
*mtd
, struct nand_chip
*chip
,
1892 int eccsize
= chip
->ecc
.size
;
1893 int eccbytes
= chip
->ecc
.bytes
;
1894 uint8_t *oob
= chip
->oob_poi
;
1897 for (steps
= chip
->ecc
.steps
; steps
> 0; steps
--) {
1898 chip
->write_buf(mtd
, buf
, eccsize
);
1901 if (chip
->ecc
.prepad
) {
1902 chip
->write_buf(mtd
, oob
, chip
->ecc
.prepad
);
1903 oob
+= chip
->ecc
.prepad
;
1906 chip
->read_buf(mtd
, oob
, eccbytes
);
1909 if (chip
->ecc
.postpad
) {
1910 chip
->write_buf(mtd
, oob
, chip
->ecc
.postpad
);
1911 oob
+= chip
->ecc
.postpad
;
1915 size
= mtd
->oobsize
- (oob
- chip
->oob_poi
);
1917 chip
->write_buf(mtd
, oob
, size
);
1920 * nand_write_page_swecc - [REPLACABLE] software ecc based page write function
1921 * @mtd: mtd info structure
1922 * @chip: nand chip info structure
1925 static void nand_write_page_swecc(struct mtd_info
*mtd
, struct nand_chip
*chip
,
1928 int i
, eccsize
= chip
->ecc
.size
;
1929 int eccbytes
= chip
->ecc
.bytes
;
1930 int eccsteps
= chip
->ecc
.steps
;
1931 uint8_t *ecc_calc
= chip
->buffers
->ecccalc
;
1932 const uint8_t *p
= buf
;
1933 uint32_t *eccpos
= chip
->ecc
.layout
->eccpos
;
1935 /* Software ecc calculation */
1936 for (i
= 0; eccsteps
; eccsteps
--, i
+= eccbytes
, p
+= eccsize
)
1937 chip
->ecc
.calculate(mtd
, p
, &ecc_calc
[i
]);
1939 for (i
= 0; i
< chip
->ecc
.total
; i
++)
1940 chip
->oob_poi
[eccpos
[i
]] = ecc_calc
[i
];
1942 chip
->ecc
.write_page_raw(mtd
, chip
, buf
);
1946 * nand_write_page_hwecc - [REPLACABLE] hardware ecc based page write function
1947 * @mtd: mtd info structure
1948 * @chip: nand chip info structure
1951 static void nand_write_page_hwecc(struct mtd_info
*mtd
, struct nand_chip
*chip
,
1954 int i
, eccsize
= chip
->ecc
.size
;
1955 int eccbytes
= chip
->ecc
.bytes
;
1956 int eccsteps
= chip
->ecc
.steps
;
1957 uint8_t *ecc_calc
= chip
->buffers
->ecccalc
;
1958 const uint8_t *p
= buf
;
1959 uint32_t *eccpos
= chip
->ecc
.layout
->eccpos
;
1961 for (i
= 0; eccsteps
; eccsteps
--, i
+= eccbytes
, p
+= eccsize
) {
1962 chip
->ecc
.hwctl(mtd
, NAND_ECC_WRITE
);
1963 chip
->write_buf(mtd
, p
, eccsize
);
1964 chip
->ecc
.calculate(mtd
, p
, &ecc_calc
[i
]);
1967 for (i
= 0; i
< chip
->ecc
.total
; i
++)
1968 chip
->oob_poi
[eccpos
[i
]] = ecc_calc
[i
];
1970 chip
->write_buf(mtd
, chip
->oob_poi
, mtd
->oobsize
);
1974 * nand_write_page_syndrome - [REPLACABLE] hardware ecc syndrom based page write
1975 * @mtd: mtd info structure
1976 * @chip: nand chip info structure
1979 * The hw generator calculates the error syndrome automatically. Therefor
1980 * we need a special oob layout and handling.
1982 static void nand_write_page_syndrome(struct mtd_info
*mtd
,
1983 struct nand_chip
*chip
, const uint8_t *buf
)
1985 int i
, eccsize
= chip
->ecc
.size
;
1986 int eccbytes
= chip
->ecc
.bytes
;
1987 int eccsteps
= chip
->ecc
.steps
;
1988 const uint8_t *p
= buf
;
1989 uint8_t *oob
= chip
->oob_poi
;
1991 for (i
= 0; eccsteps
; eccsteps
--, i
+= eccbytes
, p
+= eccsize
) {
1993 chip
->ecc
.hwctl(mtd
, NAND_ECC_WRITE
);
1994 chip
->write_buf(mtd
, p
, eccsize
);
1996 if (chip
->ecc
.prepad
) {
1997 chip
->write_buf(mtd
, oob
, chip
->ecc
.prepad
);
1998 oob
+= chip
->ecc
.prepad
;
2001 chip
->ecc
.calculate(mtd
, p
, oob
);
2002 chip
->write_buf(mtd
, oob
, eccbytes
);
2005 if (chip
->ecc
.postpad
) {
2006 chip
->write_buf(mtd
, oob
, chip
->ecc
.postpad
);
2007 oob
+= chip
->ecc
.postpad
;
2011 /* Calculate remaining oob bytes */
2012 i
= mtd
->oobsize
- (oob
- chip
->oob_poi
);
2014 chip
->write_buf(mtd
, oob
, i
);
2018 * nand_write_page - [REPLACEABLE] write one page
2019 * @mtd: MTD device structure
2020 * @chip: NAND chip descriptor
2021 * @buf: the data to write
2022 * @page: page number to write
2023 * @cached: cached programming
2024 * @raw: use _raw version of write_page
2026 static int nand_write_page(struct mtd_info
*mtd
, struct nand_chip
*chip
,
2027 const uint8_t *buf
, int page
, int cached
, int raw
)
2031 chip
->cmdfunc(mtd
, NAND_CMD_SEQIN
, 0x00, page
);
2034 chip
->ecc
.write_page_raw(mtd
, chip
, buf
);
2036 chip
->ecc
.write_page(mtd
, chip
, buf
);
2039 * Cached progamming disabled for now, Not sure if its worth the
2040 * trouble. The speed gain is not very impressive. (2.3->2.6Mib/s)
2044 if (!cached
|| !(chip
->options
& NAND_CACHEPRG
)) {
2046 chip
->cmdfunc(mtd
, NAND_CMD_PAGEPROG
, -1, -1);
2047 status
= chip
->waitfunc(mtd
, chip
);
2049 * See if operation failed and additional status checks are
2052 if ((status
& NAND_STATUS_FAIL
) && (chip
->errstat
))
2053 status
= chip
->errstat(mtd
, chip
, FL_WRITING
, status
,
2056 if (status
& NAND_STATUS_FAIL
)
2059 chip
->cmdfunc(mtd
, NAND_CMD_CACHEDPROG
, -1, -1);
2060 status
= chip
->waitfunc(mtd
, chip
);
2063 #ifdef CONFIG_MTD_NAND_VERIFY_WRITE
2064 /* Send command to read back the data */
2065 chip
->cmdfunc(mtd
, NAND_CMD_READ0
, 0, page
);
2067 if (chip
->verify_buf(mtd
, buf
, mtd
->writesize
))
2074 * nand_fill_oob - [Internal] Transfer client buffer to oob
2075 * @chip: nand chip structure
2076 * @oob: oob data buffer
2077 * @ops: oob ops structure
2079 static uint8_t *nand_fill_oob(struct nand_chip
*chip
, uint8_t *oob
, size_t len
,
2080 struct mtd_oob_ops
*ops
)
2086 memcpy(chip
->oob_poi
+ ops
->ooboffs
, oob
, len
);
2089 case MTD_OOB_AUTO
: {
2090 struct nand_oobfree
*free
= chip
->ecc
.layout
->oobfree
;
2091 uint32_t boffs
= 0, woffs
= ops
->ooboffs
;
2094 for(; free
->length
&& len
; free
++, len
-= bytes
) {
2095 /* Write request not from offset 0 ? */
2096 if (unlikely(woffs
)) {
2097 if (woffs
>= free
->length
) {
2098 woffs
-= free
->length
;
2101 boffs
= free
->offset
+ woffs
;
2102 bytes
= min_t(size_t, len
,
2103 (free
->length
- woffs
));
2106 bytes
= min_t(size_t, len
, free
->length
);
2107 boffs
= free
->offset
;
2109 memcpy(chip
->oob_poi
+ boffs
, oob
, bytes
);
2120 #define NOTALIGNED(x) (x & (chip->subpagesize - 1)) != 0
2123 * nand_do_write_ops - [Internal] NAND write with ECC
2124 * @mtd: MTD device structure
2125 * @to: offset to write to
2126 * @ops: oob operations description structure
2128 * NAND write with ECC
2130 static int nand_do_write_ops(struct mtd_info
*mtd
, loff_t to
,
2131 struct mtd_oob_ops
*ops
)
2133 int chipnr
, realpage
, page
, blockmask
, column
;
2134 struct nand_chip
*chip
= mtd
->priv
;
2135 uint32_t writelen
= ops
->len
;
2137 uint32_t oobwritelen
= ops
->ooblen
;
2138 uint32_t oobmaxlen
= ops
->mode
== MTD_OOB_AUTO
?
2139 mtd
->oobavail
: mtd
->oobsize
;
2141 uint8_t *oob
= ops
->oobbuf
;
2142 uint8_t *buf
= ops
->datbuf
;
2149 /* reject writes, which are not page aligned */
2150 if (NOTALIGNED(to
) || NOTALIGNED(ops
->len
)) {
2151 printk(KERN_NOTICE
"%s: Attempt to write not "
2152 "page aligned data\n", __func__
);
2156 column
= to
& (mtd
->writesize
- 1);
2157 subpage
= column
|| (writelen
& (mtd
->writesize
- 1));
2162 chipnr
= (int)(to
>> chip
->chip_shift
);
2163 chip
->select_chip(mtd
, chipnr
);
2165 /* Check, if it is write protected */
2166 if (nand_check_wp(mtd
))
2169 realpage
= (int)(to
>> chip
->page_shift
);
2170 page
= realpage
& chip
->pagemask
;
2171 blockmask
= (1 << (chip
->phys_erase_shift
- chip
->page_shift
)) - 1;
2173 /* Invalidate the page cache, when we write to the cached page */
2174 if (to
<= (chip
->pagebuf
<< chip
->page_shift
) &&
2175 (chip
->pagebuf
<< chip
->page_shift
) < (to
+ ops
->len
))
2178 /* If we're not given explicit OOB data, let it be 0xFF */
2180 memset(chip
->oob_poi
, 0xff, mtd
->oobsize
);
2182 /* Don't allow multipage oob writes with offset */
2183 if (ops
->ooboffs
&& (ops
->ooboffs
+ ops
->ooblen
> oobmaxlen
))
2187 int bytes
= mtd
->writesize
;
2188 int cached
= writelen
> bytes
&& page
!= blockmask
;
2189 uint8_t *wbuf
= buf
;
2191 /* Partial page write ? */
2192 if (unlikely(column
|| writelen
< (mtd
->writesize
- 1))) {
2194 bytes
= min_t(int, bytes
- column
, (int) writelen
);
2196 memset(chip
->buffers
->databuf
, 0xff, mtd
->writesize
);
2197 memcpy(&chip
->buffers
->databuf
[column
], buf
, bytes
);
2198 wbuf
= chip
->buffers
->databuf
;
2201 if (unlikely(oob
)) {
2202 size_t len
= min(oobwritelen
, oobmaxlen
);
2203 oob
= nand_fill_oob(chip
, oob
, len
, ops
);
2207 ret
= chip
->write_page(mtd
, chip
, wbuf
, page
, cached
,
2208 (ops
->mode
== MTD_OOB_RAW
));
2220 page
= realpage
& chip
->pagemask
;
2221 /* Check, if we cross a chip boundary */
2224 chip
->select_chip(mtd
, -1);
2225 chip
->select_chip(mtd
, chipnr
);
2229 ops
->retlen
= ops
->len
- writelen
;
2231 ops
->oobretlen
= ops
->ooblen
;
2236 * panic_nand_write - [MTD Interface] NAND write with ECC
2237 * @mtd: MTD device structure
2238 * @to: offset to write to
2239 * @len: number of bytes to write
2240 * @retlen: pointer to variable to store the number of written bytes
2241 * @buf: the data to write
2243 * NAND write with ECC. Used when performing writes in interrupt context, this
2244 * may for example be called by mtdoops when writing an oops while in panic.
2246 static int panic_nand_write(struct mtd_info
*mtd
, loff_t to
, size_t len
,
2247 size_t *retlen
, const uint8_t *buf
)
2249 struct nand_chip
*chip
= mtd
->priv
;
2252 /* Do not allow reads past end of device */
2253 if ((to
+ len
) > mtd
->size
)
2258 /* Wait for the device to get ready. */
2259 panic_nand_wait(mtd
, chip
, 400);
2261 /* Grab the device. */
2262 panic_nand_get_device(chip
, mtd
, FL_WRITING
);
2264 chip
->ops
.len
= len
;
2265 chip
->ops
.datbuf
= (uint8_t *)buf
;
2266 chip
->ops
.oobbuf
= NULL
;
2268 ret
= nand_do_write_ops(mtd
, to
, &chip
->ops
);
2270 *retlen
= chip
->ops
.retlen
;
2275 * nand_write - [MTD Interface] NAND write with ECC
2276 * @mtd: MTD device structure
2277 * @to: offset to write to
2278 * @len: number of bytes to write
2279 * @retlen: pointer to variable to store the number of written bytes
2280 * @buf: the data to write
2282 * NAND write with ECC
2284 static int nand_write(struct mtd_info
*mtd
, loff_t to
, size_t len
,
2285 size_t *retlen
, const uint8_t *buf
)
2287 struct nand_chip
*chip
= mtd
->priv
;
2290 /* Do not allow reads past end of device */
2291 if ((to
+ len
) > mtd
->size
)
2296 nand_get_device(chip
, mtd
, FL_WRITING
);
2298 chip
->ops
.len
= len
;
2299 chip
->ops
.datbuf
= (uint8_t *)buf
;
2300 chip
->ops
.oobbuf
= NULL
;
2302 ret
= nand_do_write_ops(mtd
, to
, &chip
->ops
);
2304 *retlen
= chip
->ops
.retlen
;
2306 nand_release_device(mtd
);
2312 * nand_do_write_oob - [MTD Interface] NAND write out-of-band
2313 * @mtd: MTD device structure
2314 * @to: offset to write to
2315 * @ops: oob operation description structure
2317 * NAND write out-of-band
2319 static int nand_do_write_oob(struct mtd_info
*mtd
, loff_t to
,
2320 struct mtd_oob_ops
*ops
)
2322 int chipnr
, page
, status
, len
;
2323 struct nand_chip
*chip
= mtd
->priv
;
2325 DEBUG(MTD_DEBUG_LEVEL3
, "%s: to = 0x%08x, len = %i\n",
2326 __func__
, (unsigned int)to
, (int)ops
->ooblen
);
2328 if (ops
->mode
== MTD_OOB_AUTO
)
2329 len
= chip
->ecc
.layout
->oobavail
;
2333 /* Do not allow write past end of page */
2334 if ((ops
->ooboffs
+ ops
->ooblen
) > len
) {
2335 DEBUG(MTD_DEBUG_LEVEL0
, "%s: Attempt to write "
2336 "past end of page\n", __func__
);
2340 if (unlikely(ops
->ooboffs
>= len
)) {
2341 DEBUG(MTD_DEBUG_LEVEL0
, "%s: Attempt to start "
2342 "write outside oob\n", __func__
);
2346 /* Do not allow reads past end of device */
2347 if (unlikely(to
>= mtd
->size
||
2348 ops
->ooboffs
+ ops
->ooblen
>
2349 ((mtd
->size
>> chip
->page_shift
) -
2350 (to
>> chip
->page_shift
)) * len
)) {
2351 DEBUG(MTD_DEBUG_LEVEL0
, "%s: Attempt write beyond "
2352 "end of device\n", __func__
);
2356 chipnr
= (int)(to
>> chip
->chip_shift
);
2357 chip
->select_chip(mtd
, chipnr
);
2359 /* Shift to get page */
2360 page
= (int)(to
>> chip
->page_shift
);
2363 * Reset the chip. Some chips (like the Toshiba TC5832DC found in one
2364 * of my DiskOnChip 2000 test units) will clear the whole data page too
2365 * if we don't do this. I have no clue why, but I seem to have 'fixed'
2366 * it in the doc2000 driver in August 1999. dwmw2.
2368 chip
->cmdfunc(mtd
, NAND_CMD_RESET
, -1, -1);
2370 /* Check, if it is write protected */
2371 if (nand_check_wp(mtd
))
2374 /* Invalidate the page cache, if we write to the cached page */
2375 if (page
== chip
->pagebuf
)
2378 memset(chip
->oob_poi
, 0xff, mtd
->oobsize
);
2379 nand_fill_oob(chip
, ops
->oobbuf
, ops
->ooblen
, ops
);
2380 status
= chip
->ecc
.write_oob(mtd
, chip
, page
& chip
->pagemask
);
2381 memset(chip
->oob_poi
, 0xff, mtd
->oobsize
);
2386 ops
->oobretlen
= ops
->ooblen
;
2392 * nand_write_oob - [MTD Interface] NAND write data and/or out-of-band
2393 * @mtd: MTD device structure
2394 * @to: offset to write to
2395 * @ops: oob operation description structure
2397 static int nand_write_oob(struct mtd_info
*mtd
, loff_t to
,
2398 struct mtd_oob_ops
*ops
)
2400 struct nand_chip
*chip
= mtd
->priv
;
2401 int ret
= -ENOTSUPP
;
2405 /* Do not allow writes past end of device */
2406 if (ops
->datbuf
&& (to
+ ops
->len
) > mtd
->size
) {
2407 DEBUG(MTD_DEBUG_LEVEL0
, "%s: Attempt write beyond "
2408 "end of device\n", __func__
);
2412 nand_get_device(chip
, mtd
, FL_WRITING
);
2425 ret
= nand_do_write_oob(mtd
, to
, ops
);
2427 ret
= nand_do_write_ops(mtd
, to
, ops
);
2430 nand_release_device(mtd
);
2435 * single_erease_cmd - [GENERIC] NAND standard block erase command function
2436 * @mtd: MTD device structure
2437 * @page: the page address of the block which will be erased
2439 * Standard erase command for NAND chips
2441 static void single_erase_cmd(struct mtd_info
*mtd
, int page
)
2443 struct nand_chip
*chip
= mtd
->priv
;
2444 /* Send commands to erase a block */
2445 chip
->cmdfunc(mtd
, NAND_CMD_ERASE1
, -1, page
);
2446 chip
->cmdfunc(mtd
, NAND_CMD_ERASE2
, -1, -1);
2450 * multi_erease_cmd - [GENERIC] AND specific block erase command function
2451 * @mtd: MTD device structure
2452 * @page: the page address of the block which will be erased
2454 * AND multi block erase command function
2455 * Erase 4 consecutive blocks
2457 static void multi_erase_cmd(struct mtd_info
*mtd
, int page
)
2459 struct nand_chip
*chip
= mtd
->priv
;
2460 /* Send commands to erase a block */
2461 chip
->cmdfunc(mtd
, NAND_CMD_ERASE1
, -1, page
++);
2462 chip
->cmdfunc(mtd
, NAND_CMD_ERASE1
, -1, page
++);
2463 chip
->cmdfunc(mtd
, NAND_CMD_ERASE1
, -1, page
++);
2464 chip
->cmdfunc(mtd
, NAND_CMD_ERASE1
, -1, page
);
2465 chip
->cmdfunc(mtd
, NAND_CMD_ERASE2
, -1, -1);
2469 * nand_erase - [MTD Interface] erase block(s)
2470 * @mtd: MTD device structure
2471 * @instr: erase instruction
2473 * Erase one ore more blocks
2475 static int nand_erase(struct mtd_info
*mtd
, struct erase_info
*instr
)
2477 return nand_erase_nand(mtd
, instr
, 0);
2480 #define BBT_PAGE_MASK 0xffffff3f
2482 * nand_erase_nand - [Internal] erase block(s)
2483 * @mtd: MTD device structure
2484 * @instr: erase instruction
2485 * @allowbbt: allow erasing the bbt area
2487 * Erase one ore more blocks
2489 int nand_erase_nand(struct mtd_info
*mtd
, struct erase_info
*instr
,
2492 int page
, status
, pages_per_block
, ret
, chipnr
;
2493 struct nand_chip
*chip
= mtd
->priv
;
2494 loff_t rewrite_bbt
[NAND_MAX_CHIPS
]={0};
2495 unsigned int bbt_masked_page
= 0xffffffff;
2498 DEBUG(MTD_DEBUG_LEVEL3
, "%s: start = 0x%012llx, len = %llu\n",
2499 __func__
, (unsigned long long)instr
->addr
,
2500 (unsigned long long)instr
->len
);
2502 if (check_offs_len(mtd
, instr
->addr
, instr
->len
))
2505 instr
->fail_addr
= MTD_FAIL_ADDR_UNKNOWN
;
2507 /* Grab the lock and see if the device is available */
2508 nand_get_device(chip
, mtd
, FL_ERASING
);
2510 /* Shift to get first page */
2511 page
= (int)(instr
->addr
>> chip
->page_shift
);
2512 chipnr
= (int)(instr
->addr
>> chip
->chip_shift
);
2514 /* Calculate pages in each block */
2515 pages_per_block
= 1 << (chip
->phys_erase_shift
- chip
->page_shift
);
2517 /* Select the NAND device */
2518 chip
->select_chip(mtd
, chipnr
);
2520 /* Check, if it is write protected */
2521 if (nand_check_wp(mtd
)) {
2522 DEBUG(MTD_DEBUG_LEVEL0
, "%s: Device is write protected!!!\n",
2524 instr
->state
= MTD_ERASE_FAILED
;
2529 * If BBT requires refresh, set the BBT page mask to see if the BBT
2530 * should be rewritten. Otherwise the mask is set to 0xffffffff which
2531 * can not be matched. This is also done when the bbt is actually
2532 * erased to avoid recusrsive updates
2534 if (chip
->options
& BBT_AUTO_REFRESH
&& !allowbbt
)
2535 bbt_masked_page
= chip
->bbt_td
->pages
[chipnr
] & BBT_PAGE_MASK
;
2537 /* Loop through the pages */
2540 instr
->state
= MTD_ERASING
;
2544 * heck if we have a bad block, we do not erase bad blocks !
2546 if (nand_block_checkbad(mtd
, ((loff_t
) page
) <<
2547 chip
->page_shift
, 0, allowbbt
)) {
2548 printk(KERN_WARNING
"%s: attempt to erase a bad block "
2549 "at page 0x%08x\n", __func__
, page
);
2550 instr
->state
= MTD_ERASE_FAILED
;
2555 * Invalidate the page cache, if we erase the block which
2556 * contains the current cached page
2558 if (page
<= chip
->pagebuf
&& chip
->pagebuf
<
2559 (page
+ pages_per_block
))
2562 chip
->erase_cmd(mtd
, page
& chip
->pagemask
);
2564 status
= chip
->waitfunc(mtd
, chip
);
2567 * See if operation failed and additional status checks are
2570 if ((status
& NAND_STATUS_FAIL
) && (chip
->errstat
))
2571 status
= chip
->errstat(mtd
, chip
, FL_ERASING
,
2574 /* See if block erase succeeded */
2575 if (status
& NAND_STATUS_FAIL
) {
2576 DEBUG(MTD_DEBUG_LEVEL0
, "%s: Failed erase, "
2577 "page 0x%08x\n", __func__
, page
);
2578 instr
->state
= MTD_ERASE_FAILED
;
2580 ((loff_t
)page
<< chip
->page_shift
);
2585 * If BBT requires refresh, set the BBT rewrite flag to the
2588 if (bbt_masked_page
!= 0xffffffff &&
2589 (page
& BBT_PAGE_MASK
) == bbt_masked_page
)
2590 rewrite_bbt
[chipnr
] =
2591 ((loff_t
)page
<< chip
->page_shift
);
2593 /* Increment page address and decrement length */
2594 len
-= (1 << chip
->phys_erase_shift
);
2595 page
+= pages_per_block
;
2597 /* Check, if we cross a chip boundary */
2598 if (len
&& !(page
& chip
->pagemask
)) {
2600 chip
->select_chip(mtd
, -1);
2601 chip
->select_chip(mtd
, chipnr
);
2604 * If BBT requires refresh and BBT-PERCHIP, set the BBT
2605 * page mask to see if this BBT should be rewritten
2607 if (bbt_masked_page
!= 0xffffffff &&
2608 (chip
->bbt_td
->options
& NAND_BBT_PERCHIP
))
2609 bbt_masked_page
= chip
->bbt_td
->pages
[chipnr
] &
2613 instr
->state
= MTD_ERASE_DONE
;
2617 ret
= instr
->state
== MTD_ERASE_DONE
? 0 : -EIO
;
2619 /* Deselect and wake up anyone waiting on the device */
2620 nand_release_device(mtd
);
2622 /* Do call back function */
2624 mtd_erase_callback(instr
);
2627 * If BBT requires refresh and erase was successful, rewrite any
2628 * selected bad block tables
2630 if (bbt_masked_page
== 0xffffffff || ret
)
2633 for (chipnr
= 0; chipnr
< chip
->numchips
; chipnr
++) {
2634 if (!rewrite_bbt
[chipnr
])
2636 /* update the BBT for chip */
2637 DEBUG(MTD_DEBUG_LEVEL0
, "%s: nand_update_bbt "
2638 "(%d:0x%0llx 0x%0x)\n", __func__
, chipnr
,
2639 rewrite_bbt
[chipnr
], chip
->bbt_td
->pages
[chipnr
]);
2640 nand_update_bbt(mtd
, rewrite_bbt
[chipnr
]);
2643 /* Return more or less happy */
2648 * nand_sync - [MTD Interface] sync
2649 * @mtd: MTD device structure
2651 * Sync is actually a wait for chip ready function
2653 static void nand_sync(struct mtd_info
*mtd
)
2655 struct nand_chip
*chip
= mtd
->priv
;
2657 DEBUG(MTD_DEBUG_LEVEL3
, "%s: called\n", __func__
);
2659 /* Grab the lock and see if the device is available */
2660 nand_get_device(chip
, mtd
, FL_SYNCING
);
2661 /* Release it and go back */
2662 nand_release_device(mtd
);
2666 * nand_block_isbad - [MTD Interface] Check if block at offset is bad
2667 * @mtd: MTD device structure
2668 * @offs: offset relative to mtd start
2670 static int nand_block_isbad(struct mtd_info
*mtd
, loff_t offs
)
2672 /* Check for invalid offset */
2673 if (offs
> mtd
->size
)
2676 return nand_block_checkbad(mtd
, offs
, 1, 0);
2680 * nand_block_markbad - [MTD Interface] Mark block at the given offset as bad
2681 * @mtd: MTD device structure
2682 * @ofs: offset relative to mtd start
2684 static int nand_block_markbad(struct mtd_info
*mtd
, loff_t ofs
)
2686 struct nand_chip
*chip
= mtd
->priv
;
2689 if ((ret
= nand_block_isbad(mtd
, ofs
))) {
2690 /* If it was bad already, return success and do nothing. */
2696 return chip
->block_markbad(mtd
, ofs
);
2700 * nand_suspend - [MTD Interface] Suspend the NAND flash
2701 * @mtd: MTD device structure
2703 static int nand_suspend(struct mtd_info
*mtd
)
2705 struct nand_chip
*chip
= mtd
->priv
;
2707 return nand_get_device(chip
, mtd
, FL_PM_SUSPENDED
);
2711 * nand_resume - [MTD Interface] Resume the NAND flash
2712 * @mtd: MTD device structure
2714 static void nand_resume(struct mtd_info
*mtd
)
2716 struct nand_chip
*chip
= mtd
->priv
;
2718 if (chip
->state
== FL_PM_SUSPENDED
)
2719 nand_release_device(mtd
);
2721 printk(KERN_ERR
"%s called for a chip which is not "
2722 "in suspended state\n", __func__
);
2726 * Set default functions
2728 static void nand_set_defaults(struct nand_chip
*chip
, int busw
)
2730 /* check for proper chip_delay setup, set 20us if not */
2731 if (!chip
->chip_delay
)
2732 chip
->chip_delay
= 20;
2734 /* check, if a user supplied command function given */
2735 if (chip
->cmdfunc
== NULL
)
2736 chip
->cmdfunc
= nand_command
;
2738 /* check, if a user supplied wait function given */
2739 if (chip
->waitfunc
== NULL
)
2740 chip
->waitfunc
= nand_wait
;
2742 if (!chip
->select_chip
)
2743 chip
->select_chip
= nand_select_chip
;
2744 if (!chip
->read_byte
)
2745 chip
->read_byte
= busw
? nand_read_byte16
: nand_read_byte
;
2746 if (!chip
->read_word
)
2747 chip
->read_word
= nand_read_word
;
2748 if (!chip
->block_bad
)
2749 chip
->block_bad
= nand_block_bad
;
2750 if (!chip
->block_markbad
)
2751 chip
->block_markbad
= nand_default_block_markbad
;
2752 if (!chip
->write_buf
)
2753 chip
->write_buf
= busw
? nand_write_buf16
: nand_write_buf
;
2754 if (!chip
->read_buf
)
2755 chip
->read_buf
= busw
? nand_read_buf16
: nand_read_buf
;
2756 if (!chip
->verify_buf
)
2757 chip
->verify_buf
= busw
? nand_verify_buf16
: nand_verify_buf
;
2758 if (!chip
->scan_bbt
)
2759 chip
->scan_bbt
= nand_default_bbt
;
2761 if (!chip
->controller
) {
2762 chip
->controller
= &chip
->hwcontrol
;
2763 spin_lock_init(&chip
->controller
->lock
);
2764 init_waitqueue_head(&chip
->controller
->wq
);
2770 * Get the flash and manufacturer id and lookup if the type is supported
2772 static struct nand_flash_dev
*nand_get_flash_type(struct mtd_info
*mtd
,
2773 struct nand_chip
*chip
,
2774 int busw
, int *maf_id
,
2775 struct nand_flash_dev
*type
)
2777 int dev_id
, maf_idx
;
2778 int tmp_id
, tmp_manf
;
2780 /* Select the device */
2781 chip
->select_chip(mtd
, 0);
2784 * Reset the chip, required by some chips (e.g. Micron MT29FxGxxxxx)
2787 chip
->cmdfunc(mtd
, NAND_CMD_RESET
, -1, -1);
2789 /* Send the command for reading device ID */
2790 chip
->cmdfunc(mtd
, NAND_CMD_READID
, 0x00, -1);
2792 /* Read manufacturer and device IDs */
2793 *maf_id
= chip
->read_byte(mtd
);
2794 dev_id
= chip
->read_byte(mtd
);
2796 /* Try again to make sure, as some systems the bus-hold or other
2797 * interface concerns can cause random data which looks like a
2798 * possibly credible NAND flash to appear. If the two results do
2799 * not match, ignore the device completely.
2802 chip
->cmdfunc(mtd
, NAND_CMD_READID
, 0x00, -1);
2804 /* Read manufacturer and device IDs */
2806 tmp_manf
= chip
->read_byte(mtd
);
2807 tmp_id
= chip
->read_byte(mtd
);
2809 if (tmp_manf
!= *maf_id
|| tmp_id
!= dev_id
) {
2810 printk(KERN_INFO
"%s: second ID read did not match "
2811 "%02x,%02x against %02x,%02x\n", __func__
,
2812 *maf_id
, dev_id
, tmp_manf
, tmp_id
);
2813 return ERR_PTR(-ENODEV
);
2817 type
= nand_flash_ids
;
2819 for (; type
->name
!= NULL
; type
++)
2820 if (dev_id
== type
->id
)
2824 return ERR_PTR(-ENODEV
);
2827 mtd
->name
= type
->name
;
2829 chip
->chipsize
= (uint64_t)type
->chipsize
<< 20;
2831 /* Newer devices have all the information in additional id bytes */
2832 if (!type
->pagesize
) {
2834 /* The 3rd id byte holds MLC / multichip data */
2835 chip
->cellinfo
= chip
->read_byte(mtd
);
2836 /* The 4th id byte is the important one */
2837 extid
= chip
->read_byte(mtd
);
2839 mtd
->writesize
= 1024 << (extid
& 0x3);
2842 mtd
->oobsize
= (8 << (extid
& 0x01)) * (mtd
->writesize
>> 9);
2844 /* Calc blocksize. Blocksize is multiples of 64KiB */
2845 mtd
->erasesize
= (64 * 1024) << (extid
& 0x03);
2847 /* Get buswidth information */
2848 busw
= (extid
& 0x01) ? NAND_BUSWIDTH_16
: 0;
2852 * Old devices have chip data hardcoded in the device id table
2854 mtd
->erasesize
= type
->erasesize
;
2855 mtd
->writesize
= type
->pagesize
;
2856 mtd
->oobsize
= mtd
->writesize
/ 32;
2857 busw
= type
->options
& NAND_BUSWIDTH_16
;
2860 /* Try to identify manufacturer */
2861 for (maf_idx
= 0; nand_manuf_ids
[maf_idx
].id
!= 0x0; maf_idx
++) {
2862 if (nand_manuf_ids
[maf_idx
].id
== *maf_id
)
2867 * Check, if buswidth is correct. Hardware drivers should set
2870 if (busw
!= (chip
->options
& NAND_BUSWIDTH_16
)) {
2871 printk(KERN_INFO
"NAND device: Manufacturer ID:"
2872 " 0x%02x, Chip ID: 0x%02x (%s %s)\n", *maf_id
,
2873 dev_id
, nand_manuf_ids
[maf_idx
].name
, mtd
->name
);
2874 printk(KERN_WARNING
"NAND bus width %d instead %d bit\n",
2875 (chip
->options
& NAND_BUSWIDTH_16
) ? 16 : 8,
2877 return ERR_PTR(-EINVAL
);
2880 /* Calculate the address shift from the page size */
2881 chip
->page_shift
= ffs(mtd
->writesize
) - 1;
2882 /* Convert chipsize to number of pages per chip -1. */
2883 chip
->pagemask
= (chip
->chipsize
>> chip
->page_shift
) - 1;
2885 chip
->bbt_erase_shift
= chip
->phys_erase_shift
=
2886 ffs(mtd
->erasesize
) - 1;
2887 if (chip
->chipsize
& 0xffffffff)
2888 chip
->chip_shift
= ffs((unsigned)chip
->chipsize
) - 1;
2890 chip
->chip_shift
= ffs((unsigned)(chip
->chipsize
>> 32)) + 32 - 1;
2892 /* Set the bad block position */
2893 chip
->badblockpos
= mtd
->writesize
> 512 ?
2894 NAND_LARGE_BADBLOCK_POS
: NAND_SMALL_BADBLOCK_POS
;
2895 chip
->badblockbits
= 8;
2897 /* Get chip options, preserve non chip based options */
2898 chip
->options
&= ~NAND_CHIPOPTIONS_MSK
;
2899 chip
->options
|= type
->options
& NAND_CHIPOPTIONS_MSK
;
2902 * Set chip as a default. Board drivers can override it, if necessary
2904 chip
->options
|= NAND_NO_AUTOINCR
;
2906 /* Check if chip is a not a samsung device. Do not clear the
2907 * options for chips which are not having an extended id.
2909 if (*maf_id
!= NAND_MFR_SAMSUNG
&& !type
->pagesize
)
2910 chip
->options
&= ~NAND_SAMSUNG_LP_OPTIONS
;
2912 /* Check for AND chips with 4 page planes */
2913 if (chip
->options
& NAND_4PAGE_ARRAY
)
2914 chip
->erase_cmd
= multi_erase_cmd
;
2916 chip
->erase_cmd
= single_erase_cmd
;
2918 /* Do not replace user supplied command function ! */
2919 if (mtd
->writesize
> 512 && chip
->cmdfunc
== nand_command
)
2920 chip
->cmdfunc
= nand_command_lp
;
2922 printk(KERN_INFO
"NAND device: Manufacturer ID:"
2923 " 0x%02x, Chip ID: 0x%02x (%s %s)\n", *maf_id
, dev_id
,
2924 nand_manuf_ids
[maf_idx
].name
, type
->name
);
2930 * nand_scan_ident - [NAND Interface] Scan for the NAND device
2931 * @mtd: MTD device structure
2932 * @maxchips: Number of chips to scan for
2933 * @table: Alternative NAND ID table
2935 * This is the first phase of the normal nand_scan() function. It
2936 * reads the flash ID and sets up MTD fields accordingly.
2938 * The mtd->owner field must be set to the module of the caller.
2940 int nand_scan_ident(struct mtd_info
*mtd
, int maxchips
,
2941 struct nand_flash_dev
*table
)
2943 int i
, busw
, nand_maf_id
;
2944 struct nand_chip
*chip
= mtd
->priv
;
2945 struct nand_flash_dev
*type
;
2947 /* Get buswidth to select the correct functions */
2948 busw
= chip
->options
& NAND_BUSWIDTH_16
;
2949 /* Set the default functions */
2950 nand_set_defaults(chip
, busw
);
2952 /* Read the flash type */
2953 type
= nand_get_flash_type(mtd
, chip
, busw
, &nand_maf_id
, table
);
2956 if (!(chip
->options
& NAND_SCAN_SILENT_NODEV
))
2957 printk(KERN_WARNING
"No NAND device found.\n");
2958 chip
->select_chip(mtd
, -1);
2959 return PTR_ERR(type
);
2962 /* Check for a chip array */
2963 for (i
= 1; i
< maxchips
; i
++) {
2964 chip
->select_chip(mtd
, i
);
2965 /* See comment in nand_get_flash_type for reset */
2966 chip
->cmdfunc(mtd
, NAND_CMD_RESET
, -1, -1);
2967 /* Send the command for reading device ID */
2968 chip
->cmdfunc(mtd
, NAND_CMD_READID
, 0x00, -1);
2969 /* Read manufacturer and device IDs */
2970 if (nand_maf_id
!= chip
->read_byte(mtd
) ||
2971 type
->id
!= chip
->read_byte(mtd
))
2975 printk(KERN_INFO
"%d NAND chips detected\n", i
);
2977 /* Store the number of chips and calc total size for mtd */
2979 mtd
->size
= i
* chip
->chipsize
;
2986 * nand_scan_tail - [NAND Interface] Scan for the NAND device
2987 * @mtd: MTD device structure
2989 * This is the second phase of the normal nand_scan() function. It
2990 * fills out all the uninitialized function pointers with the defaults
2991 * and scans for a bad block table if appropriate.
2993 int nand_scan_tail(struct mtd_info
*mtd
)
2996 struct nand_chip
*chip
= mtd
->priv
;
2998 if (!(chip
->options
& NAND_OWN_BUFFERS
))
2999 chip
->buffers
= kmalloc(sizeof(*chip
->buffers
), GFP_KERNEL
);
3003 /* Set the internal oob buffer location, just after the page data */
3004 chip
->oob_poi
= chip
->buffers
->databuf
+ mtd
->writesize
;
3007 * If no default placement scheme is given, select an appropriate one
3009 if (!chip
->ecc
.layout
) {
3010 switch (mtd
->oobsize
) {
3012 chip
->ecc
.layout
= &nand_oob_8
;
3015 chip
->ecc
.layout
= &nand_oob_16
;
3018 chip
->ecc
.layout
= &nand_oob_64
;
3021 chip
->ecc
.layout
= &nand_oob_128
;
3024 printk(KERN_WARNING
"No oob scheme defined for "
3025 "oobsize %d\n", mtd
->oobsize
);
3030 if (!chip
->write_page
)
3031 chip
->write_page
= nand_write_page
;
3034 * check ECC mode, default to software if 3byte/512byte hardware ECC is
3035 * selected and we have 256 byte pagesize fallback to software ECC
3038 switch (chip
->ecc
.mode
) {
3039 case NAND_ECC_HW_OOB_FIRST
:
3040 /* Similar to NAND_ECC_HW, but a separate read_page handle */
3041 if (!chip
->ecc
.calculate
|| !chip
->ecc
.correct
||
3043 printk(KERN_WARNING
"No ECC functions supplied; "
3044 "Hardware ECC not possible\n");
3047 if (!chip
->ecc
.read_page
)
3048 chip
->ecc
.read_page
= nand_read_page_hwecc_oob_first
;
3051 /* Use standard hwecc read page function ? */
3052 if (!chip
->ecc
.read_page
)
3053 chip
->ecc
.read_page
= nand_read_page_hwecc
;
3054 if (!chip
->ecc
.write_page
)
3055 chip
->ecc
.write_page
= nand_write_page_hwecc
;
3056 if (!chip
->ecc
.read_page_raw
)
3057 chip
->ecc
.read_page_raw
= nand_read_page_raw
;
3058 if (!chip
->ecc
.write_page_raw
)
3059 chip
->ecc
.write_page_raw
= nand_write_page_raw
;
3060 if (!chip
->ecc
.read_oob
)
3061 chip
->ecc
.read_oob
= nand_read_oob_std
;
3062 if (!chip
->ecc
.write_oob
)
3063 chip
->ecc
.write_oob
= nand_write_oob_std
;
3065 case NAND_ECC_HW_SYNDROME
:
3066 if ((!chip
->ecc
.calculate
|| !chip
->ecc
.correct
||
3067 !chip
->ecc
.hwctl
) &&
3068 (!chip
->ecc
.read_page
||
3069 chip
->ecc
.read_page
== nand_read_page_hwecc
||
3070 !chip
->ecc
.write_page
||
3071 chip
->ecc
.write_page
== nand_write_page_hwecc
)) {
3072 printk(KERN_WARNING
"No ECC functions supplied; "
3073 "Hardware ECC not possible\n");
3076 /* Use standard syndrome read/write page function ? */
3077 if (!chip
->ecc
.read_page
)
3078 chip
->ecc
.read_page
= nand_read_page_syndrome
;
3079 if (!chip
->ecc
.write_page
)
3080 chip
->ecc
.write_page
= nand_write_page_syndrome
;
3081 if (!chip
->ecc
.read_page_raw
)
3082 chip
->ecc
.read_page_raw
= nand_read_page_raw_syndrome
;
3083 if (!chip
->ecc
.write_page_raw
)
3084 chip
->ecc
.write_page_raw
= nand_write_page_raw_syndrome
;
3085 if (!chip
->ecc
.read_oob
)
3086 chip
->ecc
.read_oob
= nand_read_oob_syndrome
;
3087 if (!chip
->ecc
.write_oob
)
3088 chip
->ecc
.write_oob
= nand_write_oob_syndrome
;
3090 if (mtd
->writesize
>= chip
->ecc
.size
)
3092 printk(KERN_WARNING
"%d byte HW ECC not possible on "
3093 "%d byte page size, fallback to SW ECC\n",
3094 chip
->ecc
.size
, mtd
->writesize
);
3095 chip
->ecc
.mode
= NAND_ECC_SOFT
;
3098 chip
->ecc
.calculate
= nand_calculate_ecc
;
3099 chip
->ecc
.correct
= nand_correct_data
;
3100 chip
->ecc
.read_page
= nand_read_page_swecc
;
3101 chip
->ecc
.read_subpage
= nand_read_subpage
;
3102 chip
->ecc
.write_page
= nand_write_page_swecc
;
3103 chip
->ecc
.read_page_raw
= nand_read_page_raw
;
3104 chip
->ecc
.write_page_raw
= nand_write_page_raw
;
3105 chip
->ecc
.read_oob
= nand_read_oob_std
;
3106 chip
->ecc
.write_oob
= nand_write_oob_std
;
3107 if (!chip
->ecc
.size
)
3108 chip
->ecc
.size
= 256;
3109 chip
->ecc
.bytes
= 3;
3113 printk(KERN_WARNING
"NAND_ECC_NONE selected by board driver. "
3114 "This is not recommended !!\n");
3115 chip
->ecc
.read_page
= nand_read_page_raw
;
3116 chip
->ecc
.write_page
= nand_write_page_raw
;
3117 chip
->ecc
.read_oob
= nand_read_oob_std
;
3118 chip
->ecc
.read_page_raw
= nand_read_page_raw
;
3119 chip
->ecc
.write_page_raw
= nand_write_page_raw
;
3120 chip
->ecc
.write_oob
= nand_write_oob_std
;
3121 chip
->ecc
.size
= mtd
->writesize
;
3122 chip
->ecc
.bytes
= 0;
3126 printk(KERN_WARNING
"Invalid NAND_ECC_MODE %d\n",
3132 * The number of bytes available for a client to place data into
3133 * the out of band area
3135 chip
->ecc
.layout
->oobavail
= 0;
3136 for (i
= 0; chip
->ecc
.layout
->oobfree
[i
].length
3137 && i
< ARRAY_SIZE(chip
->ecc
.layout
->oobfree
); i
++)
3138 chip
->ecc
.layout
->oobavail
+=
3139 chip
->ecc
.layout
->oobfree
[i
].length
;
3140 mtd
->oobavail
= chip
->ecc
.layout
->oobavail
;
3143 * Set the number of read / write steps for one page depending on ECC
3146 chip
->ecc
.steps
= mtd
->writesize
/ chip
->ecc
.size
;
3147 if(chip
->ecc
.steps
* chip
->ecc
.size
!= mtd
->writesize
) {
3148 printk(KERN_WARNING
"Invalid ecc parameters\n");
3151 chip
->ecc
.total
= chip
->ecc
.steps
* chip
->ecc
.bytes
;
3154 * Allow subpage writes up to ecc.steps. Not possible for MLC
3157 if (!(chip
->options
& NAND_NO_SUBPAGE_WRITE
) &&
3158 !(chip
->cellinfo
& NAND_CI_CELLTYPE_MSK
)) {
3159 switch(chip
->ecc
.steps
) {
3161 mtd
->subpage_sft
= 1;
3166 mtd
->subpage_sft
= 2;
3170 chip
->subpagesize
= mtd
->writesize
>> mtd
->subpage_sft
;
3172 /* Initialize state */
3173 chip
->state
= FL_READY
;
3175 /* De-select the device */
3176 chip
->select_chip(mtd
, -1);
3178 /* Invalidate the pagebuffer reference */
3181 /* Fill in remaining MTD driver data */
3182 mtd
->type
= MTD_NANDFLASH
;
3183 mtd
->flags
= (chip
->options
& NAND_ROM
) ? MTD_CAP_ROM
:
3185 mtd
->erase
= nand_erase
;
3187 mtd
->unpoint
= NULL
;
3188 mtd
->read
= nand_read
;
3189 mtd
->write
= nand_write
;
3190 mtd
->panic_write
= panic_nand_write
;
3191 mtd
->read_oob
= nand_read_oob
;
3192 mtd
->write_oob
= nand_write_oob
;
3193 mtd
->sync
= nand_sync
;
3196 mtd
->suspend
= nand_suspend
;
3197 mtd
->resume
= nand_resume
;
3198 mtd
->block_isbad
= nand_block_isbad
;
3199 mtd
->block_markbad
= nand_block_markbad
;
3201 /* propagate ecc.layout to mtd_info */
3202 mtd
->ecclayout
= chip
->ecc
.layout
;
3204 /* Check, if we should skip the bad block table scan */
3205 if (chip
->options
& NAND_SKIP_BBTSCAN
)
3208 /* Build bad block table */
3209 return chip
->scan_bbt(mtd
);
3212 /* is_module_text_address() isn't exported, and it's mostly a pointless
3213 test if this is a module _anyway_ -- they'd have to try _really_ hard
3214 to call us from in-kernel code if the core NAND support is modular. */
3216 #define caller_is_module() (1)
3218 #define caller_is_module() \
3219 is_module_text_address((unsigned long)__builtin_return_address(0))
3223 * nand_scan - [NAND Interface] Scan for the NAND device
3224 * @mtd: MTD device structure
3225 * @maxchips: Number of chips to scan for
3227 * This fills out all the uninitialized function pointers
3228 * with the defaults.
3229 * The flash ID is read and the mtd/chip structures are
3230 * filled with the appropriate values.
3231 * The mtd->owner field must be set to the module of the caller
3234 int nand_scan(struct mtd_info
*mtd
, int maxchips
)
3238 /* Many callers got this wrong, so check for it for a while... */
3239 if (!mtd
->owner
&& caller_is_module()) {
3240 printk(KERN_CRIT
"%s called with NULL mtd->owner!\n",
3245 ret
= nand_scan_ident(mtd
, maxchips
, NULL
);
3247 ret
= nand_scan_tail(mtd
);
3252 * nand_release - [NAND Interface] Free resources held by the NAND device
3253 * @mtd: MTD device structure
3255 void nand_release(struct mtd_info
*mtd
)
3257 struct nand_chip
*chip
= mtd
->priv
;
3259 #ifdef CONFIG_MTD_PARTITIONS
3260 /* Deregister partitions */
3261 del_mtd_partitions(mtd
);
3263 /* Deregister the device */
3264 del_mtd_device(mtd
);
3266 /* Free bad block table memory */
3268 if (!(chip
->options
& NAND_OWN_BUFFERS
))
3269 kfree(chip
->buffers
);
3272 EXPORT_SYMBOL_GPL(nand_lock
);
3273 EXPORT_SYMBOL_GPL(nand_unlock
);
3274 EXPORT_SYMBOL_GPL(nand_scan
);
3275 EXPORT_SYMBOL_GPL(nand_scan_ident
);
3276 EXPORT_SYMBOL_GPL(nand_scan_tail
);
3277 EXPORT_SYMBOL_GPL(nand_release
);
3279 static int __init
nand_base_init(void)
3281 led_trigger_register_simple("nand-disk", &nand_led_trigger
);
3285 static void __exit
nand_base_exit(void)
3287 led_trigger_unregister_simple(nand_led_trigger
);
3290 module_init(nand_base_init
);
3291 module_exit(nand_base_exit
);
3293 MODULE_LICENSE("GPL");
3294 MODULE_AUTHOR("Steven J. Hill <sjhill@realitydiluted.com>, Thomas Gleixner <tglx@linutronix.de>");
3295 MODULE_DESCRIPTION("Generic NAND flash driver code");