5 * This is the generic MTD driver for NAND flash devices. It should be
6 * capable of working with almost all NAND chips currently available.
7 * Basic support for AG-AND chips is provided.
9 * Additional technical information is available on
10 * http://www.linux-mtd.infradead.org/tech/nand.html
12 * Copyright (C) 2000 Steven J. Hill (sjhill@realitydiluted.com)
13 * 2002-2006 Thomas Gleixner (tglx@linutronix.de)
16 * David Woodhouse for adding multichip support
18 * Aleph One Ltd. and Toby Churchill Ltd. for supporting the
19 * rework for 2K page size chips
22 * Enable cached programming for 2k page size chips
23 * Check, if mtd->ecctype should be set to MTD_ECC_HW
24 * if we have HW ecc support.
25 * The AG-AND chips have nice features for speed improvement,
26 * which are not supported yet. Read / program 4 pages in one go.
28 * This program is free software; you can redistribute it and/or modify
29 * it under the terms of the GNU General Public License version 2 as
30 * published by the Free Software Foundation.
34 #include <linux/module.h>
35 #include <linux/delay.h>
36 #include <linux/errno.h>
37 #include <linux/err.h>
38 #include <linux/sched.h>
39 #include <linux/slab.h>
40 #include <linux/types.h>
41 #include <linux/mtd/mtd.h>
42 #include <linux/mtd/nand.h>
43 #include <linux/mtd/nand_ecc.h>
44 #include <linux/mtd/compatmac.h>
45 #include <linux/interrupt.h>
46 #include <linux/bitops.h>
47 #include <linux/leds.h>
50 #ifdef CONFIG_MTD_PARTITIONS
51 #include <linux/mtd/partitions.h>
54 /* Define default oob placement schemes for large and small page devices */
55 static struct nand_ecclayout nand_oob_8
= {
65 static struct nand_ecclayout nand_oob_16
= {
67 .eccpos
= {0, 1, 2, 3, 6, 7},
73 static struct nand_ecclayout nand_oob_64
= {
76 40, 41, 42, 43, 44, 45, 46, 47,
77 48, 49, 50, 51, 52, 53, 54, 55,
78 56, 57, 58, 59, 60, 61, 62, 63},
84 static int nand_get_device(struct nand_chip
*chip
, struct mtd_info
*mtd
,
87 static int nand_do_write_oob(struct mtd_info
*mtd
, loff_t to
,
88 struct mtd_oob_ops
*ops
);
91 * For devices which display every fart in the system on a seperate LED. Is
92 * compiled away when LED support is disabled.
94 DEFINE_LED_TRIGGER(nand_led_trigger
);
97 * nand_release_device - [GENERIC] release chip
98 * @mtd: MTD device structure
100 * Deselect, release chip lock and wake up anyone waiting on the device
102 static void nand_release_device(struct mtd_info
*mtd
)
104 struct nand_chip
*chip
= mtd
->priv
;
106 /* De-select the NAND device */
107 chip
->select_chip(mtd
, -1);
109 /* Release the controller and the chip */
110 spin_lock(&chip
->controller
->lock
);
111 chip
->controller
->active
= NULL
;
112 chip
->state
= FL_READY
;
113 wake_up(&chip
->controller
->wq
);
114 spin_unlock(&chip
->controller
->lock
);
118 * nand_read_byte - [DEFAULT] read one byte from the chip
119 * @mtd: MTD device structure
121 * Default read function for 8bit buswith
123 static uint8_t nand_read_byte(struct mtd_info
*mtd
)
125 struct nand_chip
*chip
= mtd
->priv
;
126 return readb(chip
->IO_ADDR_R
);
130 * nand_read_byte16 - [DEFAULT] read one byte endianess aware from the chip
131 * @mtd: MTD device structure
133 * Default read function for 16bit buswith with
134 * endianess conversion
136 static uint8_t nand_read_byte16(struct mtd_info
*mtd
)
138 struct nand_chip
*chip
= mtd
->priv
;
139 return (uint8_t) cpu_to_le16(readw(chip
->IO_ADDR_R
));
143 * nand_read_word - [DEFAULT] read one word from the chip
144 * @mtd: MTD device structure
146 * Default read function for 16bit buswith without
147 * endianess conversion
149 static u16
nand_read_word(struct mtd_info
*mtd
)
151 struct nand_chip
*chip
= mtd
->priv
;
152 return readw(chip
->IO_ADDR_R
);
156 * nand_select_chip - [DEFAULT] control CE line
157 * @mtd: MTD device structure
158 * @chip: chipnumber to select, -1 for deselect
160 * Default select function for 1 chip devices.
162 static void nand_select_chip(struct mtd_info
*mtd
, int chipnr
)
164 struct nand_chip
*chip
= mtd
->priv
;
168 chip
->cmd_ctrl(mtd
, NAND_CMD_NONE
, 0 | NAND_CTRL_CHANGE
);
179 * nand_write_buf - [DEFAULT] write buffer to chip
180 * @mtd: MTD device structure
182 * @len: number of bytes to write
184 * Default write function for 8bit buswith
186 static void nand_write_buf(struct mtd_info
*mtd
, const uint8_t *buf
, int len
)
189 struct nand_chip
*chip
= mtd
->priv
;
191 for (i
= 0; i
< len
; i
++)
192 writeb(buf
[i
], chip
->IO_ADDR_W
);
196 * nand_read_buf - [DEFAULT] read chip data into buffer
197 * @mtd: MTD device structure
198 * @buf: buffer to store date
199 * @len: number of bytes to read
201 * Default read function for 8bit buswith
203 static void nand_read_buf(struct mtd_info
*mtd
, uint8_t *buf
, int len
)
206 struct nand_chip
*chip
= mtd
->priv
;
208 for (i
= 0; i
< len
; i
++)
209 buf
[i
] = readb(chip
->IO_ADDR_R
);
213 * nand_verify_buf - [DEFAULT] Verify chip data against buffer
214 * @mtd: MTD device structure
215 * @buf: buffer containing the data to compare
216 * @len: number of bytes to compare
218 * Default verify function for 8bit buswith
220 static int nand_verify_buf(struct mtd_info
*mtd
, const uint8_t *buf
, int len
)
223 struct nand_chip
*chip
= mtd
->priv
;
225 for (i
= 0; i
< len
; i
++)
226 if (buf
[i
] != readb(chip
->IO_ADDR_R
))
232 * nand_write_buf16 - [DEFAULT] write buffer to chip
233 * @mtd: MTD device structure
235 * @len: number of bytes to write
237 * Default write function for 16bit buswith
239 static void nand_write_buf16(struct mtd_info
*mtd
, const uint8_t *buf
, int len
)
242 struct nand_chip
*chip
= mtd
->priv
;
243 u16
*p
= (u16
*) buf
;
246 for (i
= 0; i
< len
; i
++)
247 writew(p
[i
], chip
->IO_ADDR_W
);
252 * nand_read_buf16 - [DEFAULT] read chip data into buffer
253 * @mtd: MTD device structure
254 * @buf: buffer to store date
255 * @len: number of bytes to read
257 * Default read function for 16bit buswith
259 static void nand_read_buf16(struct mtd_info
*mtd
, uint8_t *buf
, int len
)
262 struct nand_chip
*chip
= mtd
->priv
;
263 u16
*p
= (u16
*) buf
;
266 for (i
= 0; i
< len
; i
++)
267 p
[i
] = readw(chip
->IO_ADDR_R
);
271 * nand_verify_buf16 - [DEFAULT] Verify chip data against buffer
272 * @mtd: MTD device structure
273 * @buf: buffer containing the data to compare
274 * @len: number of bytes to compare
276 * Default verify function for 16bit buswith
278 static int nand_verify_buf16(struct mtd_info
*mtd
, const uint8_t *buf
, int len
)
281 struct nand_chip
*chip
= mtd
->priv
;
282 u16
*p
= (u16
*) buf
;
285 for (i
= 0; i
< len
; i
++)
286 if (p
[i
] != readw(chip
->IO_ADDR_R
))
293 * nand_block_bad - [DEFAULT] Read bad block marker from the chip
294 * @mtd: MTD device structure
295 * @ofs: offset from device start
296 * @getchip: 0, if the chip is already selected
298 * Check, if the block is bad.
300 static int nand_block_bad(struct mtd_info
*mtd
, loff_t ofs
, int getchip
)
302 int page
, chipnr
, res
= 0;
303 struct nand_chip
*chip
= mtd
->priv
;
307 page
= (int)(ofs
>> chip
->page_shift
);
308 chipnr
= (int)(ofs
>> chip
->chip_shift
);
310 nand_get_device(chip
, mtd
, FL_READING
);
312 /* Select the NAND device */
313 chip
->select_chip(mtd
, chipnr
);
317 if (chip
->options
& NAND_BUSWIDTH_16
) {
318 chip
->cmdfunc(mtd
, NAND_CMD_READOOB
, chip
->badblockpos
& 0xFE,
319 page
& chip
->pagemask
);
320 bad
= cpu_to_le16(chip
->read_word(mtd
));
321 if (chip
->badblockpos
& 0x1)
323 if ((bad
& 0xFF) != 0xff)
326 chip
->cmdfunc(mtd
, NAND_CMD_READOOB
, chip
->badblockpos
,
327 page
& chip
->pagemask
);
328 if (chip
->read_byte(mtd
) != 0xff)
333 nand_release_device(mtd
);
339 * nand_default_block_markbad - [DEFAULT] mark a block bad
340 * @mtd: MTD device structure
341 * @ofs: offset from device start
343 * This is the default implementation, which can be overridden by
344 * a hardware specific driver.
346 static int nand_default_block_markbad(struct mtd_info
*mtd
, loff_t ofs
)
348 struct nand_chip
*chip
= mtd
->priv
;
349 uint8_t buf
[2] = { 0, 0 };
352 /* Get block number */
353 block
= ((int)ofs
) >> chip
->bbt_erase_shift
;
355 chip
->bbt
[block
>> 2] |= 0x01 << ((block
& 0x03) << 1);
357 /* Do we have a flash based bad block table ? */
358 if (chip
->options
& NAND_USE_FLASH_BBT
)
359 ret
= nand_update_bbt(mtd
, ofs
);
361 /* We write two bytes, so we dont have to mess with 16 bit
366 chip
->ops
.datbuf
= NULL
;
367 chip
->ops
.oobbuf
= buf
;
368 chip
->ops
.ooboffs
= chip
->badblockpos
& ~0x01;
370 ret
= nand_do_write_oob(mtd
, ofs
, &chip
->ops
);
373 mtd
->ecc_stats
.badblocks
++;
378 * nand_check_wp - [GENERIC] check if the chip is write protected
379 * @mtd: MTD device structure
380 * Check, if the device is write protected
382 * The function expects, that the device is already selected
384 static int nand_check_wp(struct mtd_info
*mtd
)
386 struct nand_chip
*chip
= mtd
->priv
;
387 /* Check the WP bit */
388 chip
->cmdfunc(mtd
, NAND_CMD_STATUS
, -1, -1);
389 return (chip
->read_byte(mtd
) & NAND_STATUS_WP
) ? 0 : 1;
393 * nand_block_checkbad - [GENERIC] Check if a block is marked bad
394 * @mtd: MTD device structure
395 * @ofs: offset from device start
396 * @getchip: 0, if the chip is already selected
397 * @allowbbt: 1, if its allowed to access the bbt area
399 * Check, if the block is bad. Either by reading the bad block table or
400 * calling of the scan function.
402 static int nand_block_checkbad(struct mtd_info
*mtd
, loff_t ofs
, int getchip
,
405 struct nand_chip
*chip
= mtd
->priv
;
408 return chip
->block_bad(mtd
, ofs
, getchip
);
410 /* Return info from the table */
411 return nand_isbad_bbt(mtd
, ofs
, allowbbt
);
415 * Wait for the ready pin, after a command
416 * The timeout is catched later.
418 static void nand_wait_ready(struct mtd_info
*mtd
)
420 struct nand_chip
*chip
= mtd
->priv
;
421 unsigned long timeo
= jiffies
+ 2;
423 led_trigger_event(nand_led_trigger
, LED_FULL
);
424 /* wait until command is processed or timeout occures */
426 if (chip
->dev_ready(mtd
))
428 touch_softlockup_watchdog();
429 } while (time_before(jiffies
, timeo
));
430 led_trigger_event(nand_led_trigger
, LED_OFF
);
434 * nand_command - [DEFAULT] Send command to NAND device
435 * @mtd: MTD device structure
436 * @command: the command to be sent
437 * @column: the column address for this command, -1 if none
438 * @page_addr: the page address for this command, -1 if none
440 * Send command to NAND device. This function is used for small page
441 * devices (256/512 Bytes per page)
443 static void nand_command(struct mtd_info
*mtd
, unsigned int command
,
444 int column
, int page_addr
)
446 register struct nand_chip
*chip
= mtd
->priv
;
447 int ctrl
= NAND_CTRL_CLE
| NAND_CTRL_CHANGE
;
450 * Write out the command to the device.
452 if (command
== NAND_CMD_SEQIN
) {
455 if (column
>= mtd
->writesize
) {
457 column
-= mtd
->writesize
;
458 readcmd
= NAND_CMD_READOOB
;
459 } else if (column
< 256) {
460 /* First 256 bytes --> READ0 */
461 readcmd
= NAND_CMD_READ0
;
464 readcmd
= NAND_CMD_READ1
;
466 chip
->cmd_ctrl(mtd
, readcmd
, ctrl
);
467 ctrl
&= ~NAND_CTRL_CHANGE
;
469 chip
->cmd_ctrl(mtd
, command
, ctrl
);
472 * Address cycle, when necessary
474 ctrl
= NAND_CTRL_ALE
| NAND_CTRL_CHANGE
;
475 /* Serially input address */
477 /* Adjust columns for 16 bit buswidth */
478 if (chip
->options
& NAND_BUSWIDTH_16
)
480 chip
->cmd_ctrl(mtd
, column
, ctrl
);
481 ctrl
&= ~NAND_CTRL_CHANGE
;
483 if (page_addr
!= -1) {
484 chip
->cmd_ctrl(mtd
, page_addr
, ctrl
);
485 ctrl
&= ~NAND_CTRL_CHANGE
;
486 chip
->cmd_ctrl(mtd
, page_addr
>> 8, ctrl
);
487 /* One more address cycle for devices > 32MiB */
488 if (chip
->chipsize
> (32 << 20))
489 chip
->cmd_ctrl(mtd
, page_addr
>> 16, ctrl
);
491 chip
->cmd_ctrl(mtd
, NAND_CMD_NONE
, NAND_NCE
| NAND_CTRL_CHANGE
);
494 * program and erase have their own busy handlers
495 * status and sequential in needs no delay
499 case NAND_CMD_PAGEPROG
:
500 case NAND_CMD_ERASE1
:
501 case NAND_CMD_ERASE2
:
503 case NAND_CMD_STATUS
:
509 udelay(chip
->chip_delay
);
510 chip
->cmd_ctrl(mtd
, NAND_CMD_STATUS
,
511 NAND_CTRL_CLE
| NAND_CTRL_CHANGE
);
513 NAND_CMD_NONE
, NAND_NCE
| NAND_CTRL_CHANGE
);
514 while (!(chip
->read_byte(mtd
) & NAND_STATUS_READY
)) ;
517 /* This applies to read commands */
520 * If we don't have access to the busy pin, we apply the given
523 if (!chip
->dev_ready
) {
524 udelay(chip
->chip_delay
);
528 /* Apply this short delay always to ensure that we do wait tWB in
529 * any case on any machine. */
532 nand_wait_ready(mtd
);
536 * nand_command_lp - [DEFAULT] Send command to NAND large page device
537 * @mtd: MTD device structure
538 * @command: the command to be sent
539 * @column: the column address for this command, -1 if none
540 * @page_addr: the page address for this command, -1 if none
542 * Send command to NAND device. This is the version for the new large page
543 * devices We dont have the separate regions as we have in the small page
544 * devices. We must emulate NAND_CMD_READOOB to keep the code compatible.
547 static void nand_command_lp(struct mtd_info
*mtd
, unsigned int command
,
548 int column
, int page_addr
)
550 register struct nand_chip
*chip
= mtd
->priv
;
552 /* Emulate NAND_CMD_READOOB */
553 if (command
== NAND_CMD_READOOB
) {
554 column
+= mtd
->writesize
;
555 command
= NAND_CMD_READ0
;
558 /* Command latch cycle */
559 chip
->cmd_ctrl(mtd
, command
& 0xff,
560 NAND_NCE
| NAND_CLE
| NAND_CTRL_CHANGE
);
562 if (column
!= -1 || page_addr
!= -1) {
563 int ctrl
= NAND_CTRL_CHANGE
| NAND_NCE
| NAND_ALE
;
565 /* Serially input address */
567 /* Adjust columns for 16 bit buswidth */
568 if (chip
->options
& NAND_BUSWIDTH_16
)
570 chip
->cmd_ctrl(mtd
, column
, ctrl
);
571 ctrl
&= ~NAND_CTRL_CHANGE
;
572 chip
->cmd_ctrl(mtd
, column
>> 8, ctrl
);
574 if (page_addr
!= -1) {
575 chip
->cmd_ctrl(mtd
, page_addr
, ctrl
);
576 chip
->cmd_ctrl(mtd
, page_addr
>> 8,
577 NAND_NCE
| NAND_ALE
);
578 /* One more address cycle for devices > 128MiB */
579 if (chip
->chipsize
> (128 << 20))
580 chip
->cmd_ctrl(mtd
, page_addr
>> 16,
581 NAND_NCE
| NAND_ALE
);
584 chip
->cmd_ctrl(mtd
, NAND_CMD_NONE
, NAND_NCE
| NAND_CTRL_CHANGE
);
587 * program and erase have their own busy handlers
588 * status, sequential in, and deplete1 need no delay
592 case NAND_CMD_CACHEDPROG
:
593 case NAND_CMD_PAGEPROG
:
594 case NAND_CMD_ERASE1
:
595 case NAND_CMD_ERASE2
:
598 case NAND_CMD_STATUS
:
599 case NAND_CMD_DEPLETE1
:
603 * read error status commands require only a short delay
605 case NAND_CMD_STATUS_ERROR
:
606 case NAND_CMD_STATUS_ERROR0
:
607 case NAND_CMD_STATUS_ERROR1
:
608 case NAND_CMD_STATUS_ERROR2
:
609 case NAND_CMD_STATUS_ERROR3
:
610 udelay(chip
->chip_delay
);
616 udelay(chip
->chip_delay
);
617 chip
->cmd_ctrl(mtd
, NAND_CMD_STATUS
,
618 NAND_NCE
| NAND_CLE
| NAND_CTRL_CHANGE
);
619 chip
->cmd_ctrl(mtd
, NAND_CMD_NONE
,
620 NAND_NCE
| NAND_CTRL_CHANGE
);
621 while (!(chip
->read_byte(mtd
) & NAND_STATUS_READY
)) ;
624 case NAND_CMD_RNDOUT
:
625 /* No ready / busy check necessary */
626 chip
->cmd_ctrl(mtd
, NAND_CMD_RNDOUTSTART
,
627 NAND_NCE
| NAND_CLE
| NAND_CTRL_CHANGE
);
628 chip
->cmd_ctrl(mtd
, NAND_CMD_NONE
,
629 NAND_NCE
| NAND_CTRL_CHANGE
);
633 chip
->cmd_ctrl(mtd
, NAND_CMD_READSTART
,
634 NAND_NCE
| NAND_CLE
| NAND_CTRL_CHANGE
);
635 chip
->cmd_ctrl(mtd
, NAND_CMD_NONE
,
636 NAND_NCE
| NAND_CTRL_CHANGE
);
638 /* This applies to read commands */
641 * If we don't have access to the busy pin, we apply the given
644 if (!chip
->dev_ready
) {
645 udelay(chip
->chip_delay
);
650 /* Apply this short delay always to ensure that we do wait tWB in
651 * any case on any machine. */
654 nand_wait_ready(mtd
);
658 * nand_get_device - [GENERIC] Get chip for selected access
659 * @this: the nand chip descriptor
660 * @mtd: MTD device structure
661 * @new_state: the state which is requested
663 * Get the device and lock it for exclusive access
666 nand_get_device(struct nand_chip
*chip
, struct mtd_info
*mtd
, int new_state
)
668 spinlock_t
*lock
= &chip
->controller
->lock
;
669 wait_queue_head_t
*wq
= &chip
->controller
->wq
;
670 DECLARE_WAITQUEUE(wait
, current
);
674 /* Hardware controller shared among independend devices */
675 /* Hardware controller shared among independend devices */
676 if (!chip
->controller
->active
)
677 chip
->controller
->active
= chip
;
679 if (chip
->controller
->active
== chip
&& chip
->state
== FL_READY
) {
680 chip
->state
= new_state
;
684 if (new_state
== FL_PM_SUSPENDED
) {
686 return (chip
->state
== FL_PM_SUSPENDED
) ? 0 : -EAGAIN
;
688 set_current_state(TASK_UNINTERRUPTIBLE
);
689 add_wait_queue(wq
, &wait
);
692 remove_wait_queue(wq
, &wait
);
697 * nand_wait - [DEFAULT] wait until the command is done
698 * @mtd: MTD device structure
699 * @this: NAND chip structure
701 * Wait for command done. This applies to erase and program only
702 * Erase can take up to 400ms and program up to 20ms according to
703 * general NAND and SmartMedia specs
706 static int nand_wait(struct mtd_info
*mtd
, struct nand_chip
*chip
)
709 unsigned long timeo
= jiffies
;
710 int status
, state
= chip
->state
;
712 if (state
== FL_ERASING
)
713 timeo
+= (HZ
* 400) / 1000;
715 timeo
+= (HZ
* 20) / 1000;
717 led_trigger_event(nand_led_trigger
, LED_FULL
);
719 /* Apply this short delay always to ensure that we do wait tWB in
720 * any case on any machine. */
723 if ((state
== FL_ERASING
) && (chip
->options
& NAND_IS_AND
))
724 chip
->cmdfunc(mtd
, NAND_CMD_STATUS_MULTI
, -1, -1);
726 chip
->cmdfunc(mtd
, NAND_CMD_STATUS
, -1, -1);
728 while (time_before(jiffies
, timeo
)) {
729 if (chip
->dev_ready
) {
730 if (chip
->dev_ready(mtd
))
733 if (chip
->read_byte(mtd
) & NAND_STATUS_READY
)
738 led_trigger_event(nand_led_trigger
, LED_OFF
);
740 status
= (int)chip
->read_byte(mtd
);
745 * nand_read_page_raw - [Intern] read raw page data without ecc
746 * @mtd: mtd info structure
747 * @chip: nand chip info structure
748 * @buf: buffer to store read data
750 static int nand_read_page_raw(struct mtd_info
*mtd
, struct nand_chip
*chip
,
753 chip
->read_buf(mtd
, buf
, mtd
->writesize
);
754 chip
->read_buf(mtd
, chip
->oob_poi
, mtd
->oobsize
);
759 * nand_read_page_swecc - {REPLACABLE] software ecc based page read function
760 * @mtd: mtd info structure
761 * @chip: nand chip info structure
762 * @buf: buffer to store read data
764 static int nand_read_page_swecc(struct mtd_info
*mtd
, struct nand_chip
*chip
,
767 int i
, eccsize
= chip
->ecc
.size
;
768 int eccbytes
= chip
->ecc
.bytes
;
769 int eccsteps
= chip
->ecc
.steps
;
771 uint8_t *ecc_calc
= chip
->buffers
.ecccalc
;
772 uint8_t *ecc_code
= chip
->buffers
.ecccode
;
773 int *eccpos
= chip
->ecc
.layout
->eccpos
;
775 nand_read_page_raw(mtd
, chip
, buf
);
777 for (i
= 0; eccsteps
; eccsteps
--, i
+= eccbytes
, p
+= eccsize
)
778 chip
->ecc
.calculate(mtd
, p
, &ecc_calc
[i
]);
780 for (i
= 0; i
< chip
->ecc
.total
; i
++)
781 ecc_code
[i
] = chip
->oob_poi
[eccpos
[i
]];
783 eccsteps
= chip
->ecc
.steps
;
786 for (i
= 0 ; eccsteps
; eccsteps
--, i
+= eccbytes
, p
+= eccsize
) {
789 stat
= chip
->ecc
.correct(mtd
, p
, &ecc_code
[i
], &ecc_calc
[i
]);
791 mtd
->ecc_stats
.failed
++;
793 mtd
->ecc_stats
.corrected
+= stat
;
799 * nand_read_page_hwecc - {REPLACABLE] hardware ecc based page read function
800 * @mtd: mtd info structure
801 * @chip: nand chip info structure
802 * @buf: buffer to store read data
804 * Not for syndrome calculating ecc controllers which need a special oob layout
806 static int nand_read_page_hwecc(struct mtd_info
*mtd
, struct nand_chip
*chip
,
809 int i
, eccsize
= chip
->ecc
.size
;
810 int eccbytes
= chip
->ecc
.bytes
;
811 int eccsteps
= chip
->ecc
.steps
;
813 uint8_t *ecc_calc
= chip
->buffers
.ecccalc
;
814 uint8_t *ecc_code
= chip
->buffers
.ecccode
;
815 int *eccpos
= chip
->ecc
.layout
->eccpos
;
817 for (i
= 0; eccsteps
; eccsteps
--, i
+= eccbytes
, p
+= eccsize
) {
818 chip
->ecc
.hwctl(mtd
, NAND_ECC_READ
);
819 chip
->read_buf(mtd
, p
, eccsize
);
820 chip
->ecc
.calculate(mtd
, p
, &ecc_calc
[i
]);
822 chip
->read_buf(mtd
, chip
->oob_poi
, mtd
->oobsize
);
824 for (i
= 0; i
< chip
->ecc
.total
; i
++)
825 ecc_code
[i
] = chip
->oob_poi
[eccpos
[i
]];
827 eccsteps
= chip
->ecc
.steps
;
830 for (i
= 0 ; eccsteps
; eccsteps
--, i
+= eccbytes
, p
+= eccsize
) {
833 stat
= chip
->ecc
.correct(mtd
, p
, &ecc_code
[i
], &ecc_calc
[i
]);
835 mtd
->ecc_stats
.failed
++;
837 mtd
->ecc_stats
.corrected
+= stat
;
843 * nand_read_page_syndrome - {REPLACABLE] hardware ecc syndrom based page read
844 * @mtd: mtd info structure
845 * @chip: nand chip info structure
846 * @buf: buffer to store read data
848 * The hw generator calculates the error syndrome automatically. Therefor
849 * we need a special oob layout and handling.
851 static int nand_read_page_syndrome(struct mtd_info
*mtd
, struct nand_chip
*chip
,
854 int i
, eccsize
= chip
->ecc
.size
;
855 int eccbytes
= chip
->ecc
.bytes
;
856 int eccsteps
= chip
->ecc
.steps
;
858 uint8_t *oob
= chip
->oob_poi
;
860 for (i
= 0; eccsteps
; eccsteps
--, i
+= eccbytes
, p
+= eccsize
) {
863 chip
->ecc
.hwctl(mtd
, NAND_ECC_READ
);
864 chip
->read_buf(mtd
, p
, eccsize
);
866 if (chip
->ecc
.prepad
) {
867 chip
->read_buf(mtd
, oob
, chip
->ecc
.prepad
);
868 oob
+= chip
->ecc
.prepad
;
871 chip
->ecc
.hwctl(mtd
, NAND_ECC_READSYN
);
872 chip
->read_buf(mtd
, oob
, eccbytes
);
873 stat
= chip
->ecc
.correct(mtd
, p
, oob
, NULL
);
876 mtd
->ecc_stats
.failed
++;
878 mtd
->ecc_stats
.corrected
+= stat
;
882 if (chip
->ecc
.postpad
) {
883 chip
->read_buf(mtd
, oob
, chip
->ecc
.postpad
);
884 oob
+= chip
->ecc
.postpad
;
888 /* Calculate remaining oob bytes */
889 i
= mtd
->oobsize
- (oob
- chip
->oob_poi
);
891 chip
->read_buf(mtd
, oob
, i
);
897 * nand_transfer_oob - [Internal] Transfer oob to client buffer
898 * @chip: nand chip structure
899 * @ops: oob ops structure
901 static uint8_t *nand_transfer_oob(struct nand_chip
*chip
, uint8_t *oob
,
902 struct mtd_oob_ops
*ops
)
904 size_t len
= ops
->ooblen
;
910 memcpy(oob
, chip
->oob_poi
+ ops
->ooboffs
, len
);
914 struct nand_oobfree
*free
= chip
->ecc
.layout
->oobfree
;
915 uint32_t boffs
= 0, roffs
= ops
->ooboffs
;
918 for(; free
->length
&& len
; free
++, len
-= bytes
) {
919 /* Read request not from offset 0 ? */
920 if (unlikely(roffs
)) {
921 if (roffs
>= free
->length
) {
922 roffs
-= free
->length
;
925 boffs
= free
->offset
+ roffs
;
926 bytes
= min_t(size_t, len
,
927 (free
->length
- roffs
));
930 bytes
= min_t(size_t, len
, free
->length
);
931 boffs
= free
->offset
;
933 memcpy(oob
, chip
->oob_poi
+ boffs
, bytes
);
945 * nand_do_read_ops - [Internal] Read data with ECC
947 * @mtd: MTD device structure
948 * @from: offset to read from
950 * Internal function. Called with chip held.
952 static int nand_do_read_ops(struct mtd_info
*mtd
, loff_t from
,
953 struct mtd_oob_ops
*ops
)
955 int chipnr
, page
, realpage
, col
, bytes
, aligned
;
956 struct nand_chip
*chip
= mtd
->priv
;
957 struct mtd_ecc_stats stats
;
958 int blkcheck
= (1 << (chip
->phys_erase_shift
- chip
->page_shift
)) - 1;
961 uint32_t readlen
= ops
->len
;
962 uint8_t *bufpoi
, *oob
, *buf
;
964 stats
= mtd
->ecc_stats
;
966 chipnr
= (int)(from
>> chip
->chip_shift
);
967 chip
->select_chip(mtd
, chipnr
);
969 realpage
= (int)(from
>> chip
->page_shift
);
970 page
= realpage
& chip
->pagemask
;
972 col
= (int)(from
& (mtd
->writesize
- 1));
973 chip
->oob_poi
= chip
->buffers
.oobrbuf
;
979 bytes
= min(mtd
->writesize
- col
, readlen
);
980 aligned
= (bytes
== mtd
->writesize
);
982 /* Is the current page in the buffer ? */
983 if (realpage
!= chip
->pagebuf
|| oob
) {
984 bufpoi
= aligned
? buf
: chip
->buffers
.databuf
;
986 if (likely(sndcmd
)) {
987 chip
->cmdfunc(mtd
, NAND_CMD_READ0
, 0x00, page
);
991 /* Now read the page into the buffer */
992 ret
= chip
->ecc
.read_page(mtd
, chip
, bufpoi
);
996 /* Transfer not aligned data */
998 chip
->pagebuf
= realpage
;
999 memcpy(buf
, chip
->buffers
.databuf
+ col
, bytes
);
1004 if (unlikely(oob
)) {
1005 /* Raw mode does data:oob:data:oob */
1006 if (ops
->mode
!= MTD_OOB_RAW
)
1007 oob
= nand_transfer_oob(chip
, oob
, ops
);
1009 buf
= nand_transfer_oob(chip
, buf
, ops
);
1012 if (!(chip
->options
& NAND_NO_READRDY
)) {
1014 * Apply delay or wait for ready/busy pin. Do
1015 * this before the AUTOINCR check, so no
1016 * problems arise if a chip which does auto
1017 * increment is marked as NOAUTOINCR by the
1020 if (!chip
->dev_ready
)
1021 udelay(chip
->chip_delay
);
1023 nand_wait_ready(mtd
);
1026 memcpy(buf
, chip
->buffers
.databuf
+ col
, bytes
);
1035 /* For subsequent reads align to page boundary. */
1037 /* Increment page address */
1040 page
= realpage
& chip
->pagemask
;
1041 /* Check, if we cross a chip boundary */
1044 chip
->select_chip(mtd
, -1);
1045 chip
->select_chip(mtd
, chipnr
);
1048 /* Check, if the chip supports auto page increment
1049 * or if we have hit a block boundary.
1051 if (!NAND_CANAUTOINCR(chip
) || !(page
& blkcheck
))
1055 ops
->retlen
= ops
->len
- (size_t) readlen
;
1060 if (mtd
->ecc_stats
.failed
- stats
.failed
)
1063 return mtd
->ecc_stats
.corrected
- stats
.corrected
? -EUCLEAN
: 0;
1067 * nand_read - [MTD Interface] MTD compability function for nand_do_read_ecc
1068 * @mtd: MTD device structure
1069 * @from: offset to read from
1070 * @len: number of bytes to read
1071 * @retlen: pointer to variable to store the number of read bytes
1072 * @buf: the databuffer to put data
1074 * Get hold of the chip and call nand_do_read
1076 static int nand_read(struct mtd_info
*mtd
, loff_t from
, size_t len
,
1077 size_t *retlen
, uint8_t *buf
)
1079 struct nand_chip
*chip
= mtd
->priv
;
1082 /* Do not allow reads past end of device */
1083 if ((from
+ len
) > mtd
->size
)
1088 nand_get_device(chip
, mtd
, FL_READING
);
1090 chip
->ops
.len
= len
;
1091 chip
->ops
.datbuf
= buf
;
1092 chip
->ops
.oobbuf
= NULL
;
1094 ret
= nand_do_read_ops(mtd
, from
, &chip
->ops
);
1096 nand_release_device(mtd
);
1098 *retlen
= chip
->ops
.retlen
;
1103 * nand_read_oob_std - [REPLACABLE] the most common OOB data read function
1104 * @mtd: mtd info structure
1105 * @chip: nand chip info structure
1106 * @page: page number to read
1107 * @sndcmd: flag whether to issue read command or not
1109 static int nand_read_oob_std(struct mtd_info
*mtd
, struct nand_chip
*chip
,
1110 int page
, int sndcmd
)
1113 chip
->cmdfunc(mtd
, NAND_CMD_READOOB
, 0, page
);
1116 chip
->read_buf(mtd
, chip
->oob_poi
, mtd
->oobsize
);
1121 * nand_read_oob_syndrome - [REPLACABLE] OOB data read function for HW ECC
1123 * @mtd: mtd info structure
1124 * @chip: nand chip info structure
1125 * @page: page number to read
1126 * @sndcmd: flag whether to issue read command or not
1128 static int nand_read_oob_syndrome(struct mtd_info
*mtd
, struct nand_chip
*chip
,
1129 int page
, int sndcmd
)
1131 uint8_t *buf
= chip
->oob_poi
;
1132 int length
= mtd
->oobsize
;
1133 int chunk
= chip
->ecc
.bytes
+ chip
->ecc
.prepad
+ chip
->ecc
.postpad
;
1134 int eccsize
= chip
->ecc
.size
;
1135 uint8_t *bufpoi
= buf
;
1136 int i
, toread
, sndrnd
= 0, pos
;
1138 chip
->cmdfunc(mtd
, NAND_CMD_READ0
, chip
->ecc
.size
, page
);
1139 for (i
= 0; i
< chip
->ecc
.steps
; i
++) {
1141 pos
= eccsize
+ i
* (eccsize
+ chunk
);
1142 if (mtd
->writesize
> 512)
1143 chip
->cmdfunc(mtd
, NAND_CMD_RNDOUT
, pos
, -1);
1145 chip
->cmdfunc(mtd
, NAND_CMD_READ0
, pos
, page
);
1148 toread
= min_t(int, length
, chunk
);
1149 chip
->read_buf(mtd
, bufpoi
, toread
);
1154 chip
->read_buf(mtd
, bufpoi
, length
);
1160 * nand_write_oob_std - [REPLACABLE] the most common OOB data write function
1161 * @mtd: mtd info structure
1162 * @chip: nand chip info structure
1163 * @page: page number to write
1165 static int nand_write_oob_std(struct mtd_info
*mtd
, struct nand_chip
*chip
,
1169 const uint8_t *buf
= chip
->oob_poi
;
1170 int length
= mtd
->oobsize
;
1172 chip
->cmdfunc(mtd
, NAND_CMD_SEQIN
, mtd
->writesize
, page
);
1173 chip
->write_buf(mtd
, buf
, length
);
1174 /* Send command to program the OOB data */
1175 chip
->cmdfunc(mtd
, NAND_CMD_PAGEPROG
, -1, -1);
1177 status
= chip
->waitfunc(mtd
, chip
);
1183 * nand_write_oob_syndrome - [REPLACABLE] OOB data write function for HW ECC
1184 * with syndrome - only for large page flash !
1185 * @mtd: mtd info structure
1186 * @chip: nand chip info structure
1187 * @page: page number to write
1189 static int nand_write_oob_syndrome(struct mtd_info
*mtd
,
1190 struct nand_chip
*chip
, int page
)
1192 int chunk
= chip
->ecc
.bytes
+ chip
->ecc
.prepad
+ chip
->ecc
.postpad
;
1193 int eccsize
= chip
->ecc
.size
, length
= mtd
->oobsize
;
1194 int i
, len
, pos
, status
= 0, sndcmd
= 0, steps
= chip
->ecc
.steps
;
1195 const uint8_t *bufpoi
= chip
->oob_poi
;
1198 * data-ecc-data-ecc ... ecc-oob
1200 * data-pad-ecc-pad-data-pad .... ecc-pad-oob
1202 if (!chip
->ecc
.prepad
&& !chip
->ecc
.postpad
) {
1203 pos
= steps
* (eccsize
+ chunk
);
1206 pos
= eccsize
+ chunk
;
1208 chip
->cmdfunc(mtd
, NAND_CMD_SEQIN
, pos
, page
);
1209 for (i
= 0; i
< steps
; i
++) {
1211 if (mtd
->writesize
<= 512) {
1212 uint32_t fill
= 0xFFFFFFFF;
1216 int num
= min_t(int, len
, 4);
1217 chip
->write_buf(mtd
, (uint8_t *)&fill
,
1222 pos
= eccsize
+ i
* (eccsize
+ chunk
);
1223 chip
->cmdfunc(mtd
, NAND_CMD_RNDIN
, pos
, -1);
1227 len
= min_t(int, length
, chunk
);
1228 chip
->write_buf(mtd
, bufpoi
, len
);
1233 chip
->write_buf(mtd
, bufpoi
, length
);
1235 chip
->cmdfunc(mtd
, NAND_CMD_PAGEPROG
, -1, -1);
1236 status
= chip
->waitfunc(mtd
, chip
);
1238 return status
& NAND_STATUS_FAIL
? -EIO
: 0;
1242 * nand_do_read_oob - [Intern] NAND read out-of-band
1243 * @mtd: MTD device structure
1244 * @from: offset to read from
1245 * @ops: oob operations description structure
1247 * NAND read out-of-band data from the spare area
1249 static int nand_do_read_oob(struct mtd_info
*mtd
, loff_t from
,
1250 struct mtd_oob_ops
*ops
)
1252 int page
, realpage
, chipnr
, sndcmd
= 1;
1253 struct nand_chip
*chip
= mtd
->priv
;
1254 int blkcheck
= (1 << (chip
->phys_erase_shift
- chip
->page_shift
)) - 1;
1255 int readlen
= ops
->len
;
1256 uint8_t *buf
= ops
->oobbuf
;
1258 DEBUG(MTD_DEBUG_LEVEL3
, "nand_read_oob: from = 0x%08Lx, len = %i\n",
1259 (unsigned long long)from
, readlen
);
1261 chipnr
= (int)(from
>> chip
->chip_shift
);
1262 chip
->select_chip(mtd
, chipnr
);
1264 /* Shift to get page */
1265 realpage
= (int)(from
>> chip
->page_shift
);
1266 page
= realpage
& chip
->pagemask
;
1268 chip
->oob_poi
= chip
->buffers
.oobrbuf
;
1271 sndcmd
= chip
->ecc
.read_oob(mtd
, chip
, page
, sndcmd
);
1272 buf
= nand_transfer_oob(chip
, buf
, ops
);
1274 readlen
-= ops
->ooblen
;
1278 if (!(chip
->options
& NAND_NO_READRDY
)) {
1280 * Apply delay or wait for ready/busy pin. Do this
1281 * before the AUTOINCR check, so no problems arise if a
1282 * chip which does auto increment is marked as
1283 * NOAUTOINCR by the board driver.
1285 if (!chip
->dev_ready
)
1286 udelay(chip
->chip_delay
);
1288 nand_wait_ready(mtd
);
1291 /* Increment page address */
1294 page
= realpage
& chip
->pagemask
;
1295 /* Check, if we cross a chip boundary */
1298 chip
->select_chip(mtd
, -1);
1299 chip
->select_chip(mtd
, chipnr
);
1302 /* Check, if the chip supports auto page increment
1303 * or if we have hit a block boundary.
1305 if (!NAND_CANAUTOINCR(chip
) || !(page
& blkcheck
))
1309 ops
->retlen
= ops
->len
;
1314 * nand_read_oob - [MTD Interface] NAND read data and/or out-of-band
1315 * @mtd: MTD device structure
1316 * @from: offset to read from
1317 * @ops: oob operation description structure
1319 * NAND read data and/or out-of-band data
1321 static int nand_read_oob(struct mtd_info
*mtd
, loff_t from
,
1322 struct mtd_oob_ops
*ops
)
1324 int (*read_page
)(struct mtd_info
*mtd
, struct nand_chip
*chip
,
1325 uint8_t *buf
) = NULL
;
1326 struct nand_chip
*chip
= mtd
->priv
;
1327 int ret
= -ENOTSUPP
;
1331 /* Do not allow reads past end of device */
1332 if ((from
+ ops
->len
) > mtd
->size
) {
1333 DEBUG(MTD_DEBUG_LEVEL0
, "nand_read_oob: "
1334 "Attempt read beyond end of device\n");
1338 nand_get_device(chip
, mtd
, FL_READING
);
1346 /* Replace the read_page algorithm temporary */
1347 read_page
= chip
->ecc
.read_page
;
1348 chip
->ecc
.read_page
= nand_read_page_raw
;
1356 ret
= nand_do_read_oob(mtd
, from
, ops
);
1358 ret
= nand_do_read_ops(mtd
, from
, ops
);
1360 if (unlikely(ops
->mode
== MTD_OOB_RAW
))
1361 chip
->ecc
.read_page
= read_page
;
1363 nand_release_device(mtd
);
1369 * nand_write_page_raw - [Intern] raw page write function
1370 * @mtd: mtd info structure
1371 * @chip: nand chip info structure
1374 static void nand_write_page_raw(struct mtd_info
*mtd
, struct nand_chip
*chip
,
1377 chip
->write_buf(mtd
, buf
, mtd
->writesize
);
1378 chip
->write_buf(mtd
, chip
->oob_poi
, mtd
->oobsize
);
1382 * nand_write_page_swecc - {REPLACABLE] software ecc based page write function
1383 * @mtd: mtd info structure
1384 * @chip: nand chip info structure
1387 static void nand_write_page_swecc(struct mtd_info
*mtd
, struct nand_chip
*chip
,
1390 int i
, eccsize
= chip
->ecc
.size
;
1391 int eccbytes
= chip
->ecc
.bytes
;
1392 int eccsteps
= chip
->ecc
.steps
;
1393 uint8_t *ecc_calc
= chip
->buffers
.ecccalc
;
1394 const uint8_t *p
= buf
;
1395 int *eccpos
= chip
->ecc
.layout
->eccpos
;
1397 /* Software ecc calculation */
1398 for (i
= 0; eccsteps
; eccsteps
--, i
+= eccbytes
, p
+= eccsize
)
1399 chip
->ecc
.calculate(mtd
, p
, &ecc_calc
[i
]);
1401 for (i
= 0; i
< chip
->ecc
.total
; i
++)
1402 chip
->oob_poi
[eccpos
[i
]] = ecc_calc
[i
];
1404 nand_write_page_raw(mtd
, chip
, buf
);
1408 * nand_write_page_hwecc - {REPLACABLE] hardware ecc based page write function
1409 * @mtd: mtd info structure
1410 * @chip: nand chip info structure
1413 static void nand_write_page_hwecc(struct mtd_info
*mtd
, struct nand_chip
*chip
,
1416 int i
, eccsize
= chip
->ecc
.size
;
1417 int eccbytes
= chip
->ecc
.bytes
;
1418 int eccsteps
= chip
->ecc
.steps
;
1419 uint8_t *ecc_calc
= chip
->buffers
.ecccalc
;
1420 const uint8_t *p
= buf
;
1421 int *eccpos
= chip
->ecc
.layout
->eccpos
;
1423 for (i
= 0; eccsteps
; eccsteps
--, i
+= eccbytes
, p
+= eccsize
) {
1424 chip
->ecc
.hwctl(mtd
, NAND_ECC_WRITE
);
1425 chip
->write_buf(mtd
, p
, eccsize
);
1426 chip
->ecc
.calculate(mtd
, p
, &ecc_calc
[i
]);
1429 for (i
= 0; i
< chip
->ecc
.total
; i
++)
1430 chip
->oob_poi
[eccpos
[i
]] = ecc_calc
[i
];
1432 chip
->write_buf(mtd
, chip
->oob_poi
, mtd
->oobsize
);
1436 * nand_write_page_syndrome - {REPLACABLE] hardware ecc syndrom based page write
1437 * @mtd: mtd info structure
1438 * @chip: nand chip info structure
1441 * The hw generator calculates the error syndrome automatically. Therefor
1442 * we need a special oob layout and handling.
1444 static void nand_write_page_syndrome(struct mtd_info
*mtd
,
1445 struct nand_chip
*chip
, const uint8_t *buf
)
1447 int i
, eccsize
= chip
->ecc
.size
;
1448 int eccbytes
= chip
->ecc
.bytes
;
1449 int eccsteps
= chip
->ecc
.steps
;
1450 const uint8_t *p
= buf
;
1451 uint8_t *oob
= chip
->oob_poi
;
1453 for (i
= 0; eccsteps
; eccsteps
--, i
+= eccbytes
, p
+= eccsize
) {
1455 chip
->ecc
.hwctl(mtd
, NAND_ECC_WRITE
);
1456 chip
->write_buf(mtd
, p
, eccsize
);
1458 if (chip
->ecc
.prepad
) {
1459 chip
->write_buf(mtd
, oob
, chip
->ecc
.prepad
);
1460 oob
+= chip
->ecc
.prepad
;
1463 chip
->ecc
.calculate(mtd
, p
, oob
);
1464 chip
->write_buf(mtd
, oob
, eccbytes
);
1467 if (chip
->ecc
.postpad
) {
1468 chip
->write_buf(mtd
, oob
, chip
->ecc
.postpad
);
1469 oob
+= chip
->ecc
.postpad
;
1473 /* Calculate remaining oob bytes */
1474 i
= mtd
->oobsize
- (oob
- chip
->oob_poi
);
1476 chip
->write_buf(mtd
, oob
, i
);
1480 * nand_write_page - [INTERNAL] write one page
1481 * @mtd: MTD device structure
1482 * @chip: NAND chip descriptor
1483 * @buf: the data to write
1484 * @page: page number to write
1485 * @cached: cached programming
1487 static int nand_write_page(struct mtd_info
*mtd
, struct nand_chip
*chip
,
1488 const uint8_t *buf
, int page
, int cached
)
1492 chip
->cmdfunc(mtd
, NAND_CMD_SEQIN
, 0x00, page
);
1494 chip
->ecc
.write_page(mtd
, chip
, buf
);
1497 * Cached progamming disabled for now, Not sure if its worth the
1498 * trouble. The speed gain is not very impressive. (2.3->2.6Mib/s)
1502 if (!cached
|| !(chip
->options
& NAND_CACHEPRG
)) {
1504 chip
->cmdfunc(mtd
, NAND_CMD_PAGEPROG
, -1, -1);
1505 status
= chip
->waitfunc(mtd
, chip
);
1507 * See if operation failed and additional status checks are
1510 if ((status
& NAND_STATUS_FAIL
) && (chip
->errstat
))
1511 status
= chip
->errstat(mtd
, chip
, FL_WRITING
, status
,
1514 if (status
& NAND_STATUS_FAIL
)
1517 chip
->cmdfunc(mtd
, NAND_CMD_CACHEDPROG
, -1, -1);
1518 status
= chip
->waitfunc(mtd
, chip
);
1521 #ifdef CONFIG_MTD_NAND_VERIFY_WRITE
1522 /* Send command to read back the data */
1523 chip
->cmdfunc(mtd
, NAND_CMD_READ0
, 0, page
);
1525 if (chip
->verify_buf(mtd
, buf
, mtd
->writesize
))
1532 * nand_fill_oob - [Internal] Transfer client buffer to oob
1533 * @chip: nand chip structure
1534 * @oob: oob data buffer
1535 * @ops: oob ops structure
1537 static uint8_t *nand_fill_oob(struct nand_chip
*chip
, uint8_t *oob
,
1538 struct mtd_oob_ops
*ops
)
1540 size_t len
= ops
->ooblen
;
1546 memcpy(chip
->oob_poi
+ ops
->ooboffs
, oob
, len
);
1549 case MTD_OOB_AUTO
: {
1550 struct nand_oobfree
*free
= chip
->ecc
.layout
->oobfree
;
1551 uint32_t boffs
= 0, woffs
= ops
->ooboffs
;
1554 for(; free
->length
&& len
; free
++, len
-= bytes
) {
1555 /* Write request not from offset 0 ? */
1556 if (unlikely(woffs
)) {
1557 if (woffs
>= free
->length
) {
1558 woffs
-= free
->length
;
1561 boffs
= free
->offset
+ woffs
;
1562 bytes
= min_t(size_t, len
,
1563 (free
->length
- woffs
));
1566 bytes
= min_t(size_t, len
, free
->length
);
1567 boffs
= free
->offset
;
1569 memcpy(chip
->oob_poi
+ woffs
, oob
, bytes
);
1580 #define NOTALIGNED(x) (x & (mtd->writesize-1)) != 0
1583 * nand_do_write_ops - [Internal] NAND write with ECC
1584 * @mtd: MTD device structure
1585 * @to: offset to write to
1586 * @ops: oob operations description structure
1588 * NAND write with ECC
1590 static int nand_do_write_ops(struct mtd_info
*mtd
, loff_t to
,
1591 struct mtd_oob_ops
*ops
)
1593 int chipnr
, realpage
, page
, blockmask
;
1594 struct nand_chip
*chip
= mtd
->priv
;
1595 uint32_t writelen
= ops
->len
;
1596 uint8_t *oob
= ops
->oobbuf
;
1597 uint8_t *buf
= ops
->datbuf
;
1598 int bytes
= mtd
->writesize
;
1603 /* reject writes, which are not page aligned */
1604 if (NOTALIGNED(to
) || NOTALIGNED(ops
->len
)) {
1605 printk(KERN_NOTICE
"nand_write: "
1606 "Attempt to write not page aligned data\n");
1613 /* Check, if it is write protected */
1614 if (nand_check_wp(mtd
))
1617 chipnr
= (int)(to
>> chip
->chip_shift
);
1618 chip
->select_chip(mtd
, chipnr
);
1620 realpage
= (int)(to
>> chip
->page_shift
);
1621 page
= realpage
& chip
->pagemask
;
1622 blockmask
= (1 << (chip
->phys_erase_shift
- chip
->page_shift
)) - 1;
1624 /* Invalidate the page cache, when we write to the cached page */
1625 if (to
<= (chip
->pagebuf
<< chip
->page_shift
) &&
1626 (chip
->pagebuf
<< chip
->page_shift
) < (to
+ ops
->len
))
1629 chip
->oob_poi
= chip
->buffers
.oobwbuf
;
1632 int cached
= writelen
> bytes
&& page
!= blockmask
;
1635 oob
= nand_fill_oob(chip
, oob
, ops
);
1637 ret
= nand_write_page(mtd
, chip
, buf
, page
, cached
);
1648 page
= realpage
& chip
->pagemask
;
1649 /* Check, if we cross a chip boundary */
1652 chip
->select_chip(mtd
, -1);
1653 chip
->select_chip(mtd
, chipnr
);
1658 memset(chip
->oob_poi
, 0xff, mtd
->oobsize
);
1660 ops
->retlen
= ops
->len
- writelen
;
1665 * nand_write - [MTD Interface] NAND write with ECC
1666 * @mtd: MTD device structure
1667 * @to: offset to write to
1668 * @len: number of bytes to write
1669 * @retlen: pointer to variable to store the number of written bytes
1670 * @buf: the data to write
1672 * NAND write with ECC
1674 static int nand_write(struct mtd_info
*mtd
, loff_t to
, size_t len
,
1675 size_t *retlen
, const uint8_t *buf
)
1677 struct nand_chip
*chip
= mtd
->priv
;
1680 /* Do not allow reads past end of device */
1681 if ((to
+ len
) > mtd
->size
)
1686 nand_get_device(chip
, mtd
, FL_WRITING
);
1688 chip
->ops
.len
= len
;
1689 chip
->ops
.datbuf
= (uint8_t *)buf
;
1690 chip
->ops
.oobbuf
= NULL
;
1692 ret
= nand_do_write_ops(mtd
, to
, &chip
->ops
);
1694 nand_release_device(mtd
);
1696 *retlen
= chip
->ops
.retlen
;
1701 * nand_do_write_oob - [MTD Interface] NAND write out-of-band
1702 * @mtd: MTD device structure
1703 * @to: offset to write to
1704 * @ops: oob operation description structure
1706 * NAND write out-of-band
1708 static int nand_do_write_oob(struct mtd_info
*mtd
, loff_t to
,
1709 struct mtd_oob_ops
*ops
)
1711 int chipnr
, page
, status
;
1712 struct nand_chip
*chip
= mtd
->priv
;
1714 DEBUG(MTD_DEBUG_LEVEL3
, "nand_write_oob: to = 0x%08x, len = %i\n",
1715 (unsigned int)to
, (int)ops
->len
);
1717 /* Do not allow write past end of page */
1718 if ((ops
->ooboffs
+ ops
->len
) > mtd
->oobsize
) {
1719 DEBUG(MTD_DEBUG_LEVEL0
, "nand_write_oob: "
1720 "Attempt to write past end of page\n");
1724 chipnr
= (int)(to
>> chip
->chip_shift
);
1725 chip
->select_chip(mtd
, chipnr
);
1727 /* Shift to get page */
1728 page
= (int)(to
>> chip
->page_shift
);
1731 * Reset the chip. Some chips (like the Toshiba TC5832DC found in one
1732 * of my DiskOnChip 2000 test units) will clear the whole data page too
1733 * if we don't do this. I have no clue why, but I seem to have 'fixed'
1734 * it in the doc2000 driver in August 1999. dwmw2.
1736 chip
->cmdfunc(mtd
, NAND_CMD_RESET
, -1, -1);
1738 /* Check, if it is write protected */
1739 if (nand_check_wp(mtd
))
1742 /* Invalidate the page cache, if we write to the cached page */
1743 if (page
== chip
->pagebuf
)
1746 chip
->oob_poi
= chip
->buffers
.oobwbuf
;
1747 memset(chip
->oob_poi
, 0xff, mtd
->oobsize
);
1748 nand_fill_oob(chip
, ops
->oobbuf
, ops
);
1749 status
= chip
->ecc
.write_oob(mtd
, chip
, page
& chip
->pagemask
);
1750 memset(chip
->oob_poi
, 0xff, mtd
->oobsize
);
1755 ops
->retlen
= ops
->len
;
1761 * nand_write_oob - [MTD Interface] NAND write data and/or out-of-band
1762 * @mtd: MTD device structure
1763 * @from: offset to read from
1764 * @ops: oob operation description structure
1766 static int nand_write_oob(struct mtd_info
*mtd
, loff_t to
,
1767 struct mtd_oob_ops
*ops
)
1769 void (*write_page
)(struct mtd_info
*mtd
, struct nand_chip
*chip
,
1770 const uint8_t *buf
) = NULL
;
1771 struct nand_chip
*chip
= mtd
->priv
;
1772 int ret
= -ENOTSUPP
;
1776 /* Do not allow writes past end of device */
1777 if ((to
+ ops
->len
) > mtd
->size
) {
1778 DEBUG(MTD_DEBUG_LEVEL0
, "nand_read_oob: "
1779 "Attempt read beyond end of device\n");
1783 nand_get_device(chip
, mtd
, FL_WRITING
);
1791 /* Replace the write_page algorithm temporary */
1792 write_page
= chip
->ecc
.write_page
;
1793 chip
->ecc
.write_page
= nand_write_page_raw
;
1801 ret
= nand_do_write_oob(mtd
, to
, ops
);
1803 ret
= nand_do_write_ops(mtd
, to
, ops
);
1805 if (unlikely(ops
->mode
== MTD_OOB_RAW
))
1806 chip
->ecc
.write_page
= write_page
;
1808 nand_release_device(mtd
);
1813 * single_erease_cmd - [GENERIC] NAND standard block erase command function
1814 * @mtd: MTD device structure
1815 * @page: the page address of the block which will be erased
1817 * Standard erase command for NAND chips
1819 static void single_erase_cmd(struct mtd_info
*mtd
, int page
)
1821 struct nand_chip
*chip
= mtd
->priv
;
1822 /* Send commands to erase a block */
1823 chip
->cmdfunc(mtd
, NAND_CMD_ERASE1
, -1, page
);
1824 chip
->cmdfunc(mtd
, NAND_CMD_ERASE2
, -1, -1);
1828 * multi_erease_cmd - [GENERIC] AND specific block erase command function
1829 * @mtd: MTD device structure
1830 * @page: the page address of the block which will be erased
1832 * AND multi block erase command function
1833 * Erase 4 consecutive blocks
1835 static void multi_erase_cmd(struct mtd_info
*mtd
, int page
)
1837 struct nand_chip
*chip
= mtd
->priv
;
1838 /* Send commands to erase a block */
1839 chip
->cmdfunc(mtd
, NAND_CMD_ERASE1
, -1, page
++);
1840 chip
->cmdfunc(mtd
, NAND_CMD_ERASE1
, -1, page
++);
1841 chip
->cmdfunc(mtd
, NAND_CMD_ERASE1
, -1, page
++);
1842 chip
->cmdfunc(mtd
, NAND_CMD_ERASE1
, -1, page
);
1843 chip
->cmdfunc(mtd
, NAND_CMD_ERASE2
, -1, -1);
1847 * nand_erase - [MTD Interface] erase block(s)
1848 * @mtd: MTD device structure
1849 * @instr: erase instruction
1851 * Erase one ore more blocks
1853 static int nand_erase(struct mtd_info
*mtd
, struct erase_info
*instr
)
1855 return nand_erase_nand(mtd
, instr
, 0);
1858 #define BBT_PAGE_MASK 0xffffff3f
1860 * nand_erase_nand - [Internal] erase block(s)
1861 * @mtd: MTD device structure
1862 * @instr: erase instruction
1863 * @allowbbt: allow erasing the bbt area
1865 * Erase one ore more blocks
1867 int nand_erase_nand(struct mtd_info
*mtd
, struct erase_info
*instr
,
1870 int page
, len
, status
, pages_per_block
, ret
, chipnr
;
1871 struct nand_chip
*chip
= mtd
->priv
;
1872 int rewrite_bbt
[NAND_MAX_CHIPS
]={0};
1873 unsigned int bbt_masked_page
= 0xffffffff;
1875 DEBUG(MTD_DEBUG_LEVEL3
, "nand_erase: start = 0x%08x, len = %i\n",
1876 (unsigned int)instr
->addr
, (unsigned int)instr
->len
);
1878 /* Start address must align on block boundary */
1879 if (instr
->addr
& ((1 << chip
->phys_erase_shift
) - 1)) {
1880 DEBUG(MTD_DEBUG_LEVEL0
, "nand_erase: Unaligned address\n");
1884 /* Length must align on block boundary */
1885 if (instr
->len
& ((1 << chip
->phys_erase_shift
) - 1)) {
1886 DEBUG(MTD_DEBUG_LEVEL0
, "nand_erase: "
1887 "Length not block aligned\n");
1891 /* Do not allow erase past end of device */
1892 if ((instr
->len
+ instr
->addr
) > mtd
->size
) {
1893 DEBUG(MTD_DEBUG_LEVEL0
, "nand_erase: "
1894 "Erase past end of device\n");
1898 instr
->fail_addr
= 0xffffffff;
1900 /* Grab the lock and see if the device is available */
1901 nand_get_device(chip
, mtd
, FL_ERASING
);
1903 /* Shift to get first page */
1904 page
= (int)(instr
->addr
>> chip
->page_shift
);
1905 chipnr
= (int)(instr
->addr
>> chip
->chip_shift
);
1907 /* Calculate pages in each block */
1908 pages_per_block
= 1 << (chip
->phys_erase_shift
- chip
->page_shift
);
1910 /* Select the NAND device */
1911 chip
->select_chip(mtd
, chipnr
);
1913 /* Check, if it is write protected */
1914 if (nand_check_wp(mtd
)) {
1915 DEBUG(MTD_DEBUG_LEVEL0
, "nand_erase: "
1916 "Device is write protected!!!\n");
1917 instr
->state
= MTD_ERASE_FAILED
;
1922 * If BBT requires refresh, set the BBT page mask to see if the BBT
1923 * should be rewritten. Otherwise the mask is set to 0xffffffff which
1924 * can not be matched. This is also done when the bbt is actually
1925 * erased to avoid recusrsive updates
1927 if (chip
->options
& BBT_AUTO_REFRESH
&& !allowbbt
)
1928 bbt_masked_page
= chip
->bbt_td
->pages
[chipnr
] & BBT_PAGE_MASK
;
1930 /* Loop through the pages */
1933 instr
->state
= MTD_ERASING
;
1937 * heck if we have a bad block, we do not erase bad blocks !
1939 if (nand_block_checkbad(mtd
, ((loff_t
) page
) <<
1940 chip
->page_shift
, 0, allowbbt
)) {
1941 printk(KERN_WARNING
"nand_erase: attempt to erase a "
1942 "bad block at page 0x%08x\n", page
);
1943 instr
->state
= MTD_ERASE_FAILED
;
1948 * Invalidate the page cache, if we erase the block which
1949 * contains the current cached page
1951 if (page
<= chip
->pagebuf
&& chip
->pagebuf
<
1952 (page
+ pages_per_block
))
1955 chip
->erase_cmd(mtd
, page
& chip
->pagemask
);
1957 status
= chip
->waitfunc(mtd
, chip
);
1960 * See if operation failed and additional status checks are
1963 if ((status
& NAND_STATUS_FAIL
) && (chip
->errstat
))
1964 status
= chip
->errstat(mtd
, chip
, FL_ERASING
,
1967 /* See if block erase succeeded */
1968 if (status
& NAND_STATUS_FAIL
) {
1969 DEBUG(MTD_DEBUG_LEVEL0
, "nand_erase: "
1970 "Failed erase, page 0x%08x\n", page
);
1971 instr
->state
= MTD_ERASE_FAILED
;
1972 instr
->fail_addr
= (page
<< chip
->page_shift
);
1977 * If BBT requires refresh, set the BBT rewrite flag to the
1980 if (bbt_masked_page
!= 0xffffffff &&
1981 (page
& BBT_PAGE_MASK
) == bbt_masked_page
)
1982 rewrite_bbt
[chipnr
] = (page
<< chip
->page_shift
);
1984 /* Increment page address and decrement length */
1985 len
-= (1 << chip
->phys_erase_shift
);
1986 page
+= pages_per_block
;
1988 /* Check, if we cross a chip boundary */
1989 if (len
&& !(page
& chip
->pagemask
)) {
1991 chip
->select_chip(mtd
, -1);
1992 chip
->select_chip(mtd
, chipnr
);
1995 * If BBT requires refresh and BBT-PERCHIP, set the BBT
1996 * page mask to see if this BBT should be rewritten
1998 if (bbt_masked_page
!= 0xffffffff &&
1999 (chip
->bbt_td
->options
& NAND_BBT_PERCHIP
))
2000 bbt_masked_page
= chip
->bbt_td
->pages
[chipnr
] &
2004 instr
->state
= MTD_ERASE_DONE
;
2008 ret
= instr
->state
== MTD_ERASE_DONE
? 0 : -EIO
;
2009 /* Do call back function */
2011 mtd_erase_callback(instr
);
2013 /* Deselect and wake up anyone waiting on the device */
2014 nand_release_device(mtd
);
2017 * If BBT requires refresh and erase was successful, rewrite any
2018 * selected bad block tables
2020 if (bbt_masked_page
== 0xffffffff || ret
)
2023 for (chipnr
= 0; chipnr
< chip
->numchips
; chipnr
++) {
2024 if (!rewrite_bbt
[chipnr
])
2026 /* update the BBT for chip */
2027 DEBUG(MTD_DEBUG_LEVEL0
, "nand_erase_nand: nand_update_bbt "
2028 "(%d:0x%0x 0x%0x)\n", chipnr
, rewrite_bbt
[chipnr
],
2029 chip
->bbt_td
->pages
[chipnr
]);
2030 nand_update_bbt(mtd
, rewrite_bbt
[chipnr
]);
2033 /* Return more or less happy */
2038 * nand_sync - [MTD Interface] sync
2039 * @mtd: MTD device structure
2041 * Sync is actually a wait for chip ready function
2043 static void nand_sync(struct mtd_info
*mtd
)
2045 struct nand_chip
*chip
= mtd
->priv
;
2047 DEBUG(MTD_DEBUG_LEVEL3
, "nand_sync: called\n");
2049 /* Grab the lock and see if the device is available */
2050 nand_get_device(chip
, mtd
, FL_SYNCING
);
2051 /* Release it and go back */
2052 nand_release_device(mtd
);
2056 * nand_block_isbad - [MTD Interface] Check if block at offset is bad
2057 * @mtd: MTD device structure
2058 * @ofs: offset relative to mtd start
2060 static int nand_block_isbad(struct mtd_info
*mtd
, loff_t offs
)
2062 /* Check for invalid offset */
2063 if (offs
> mtd
->size
)
2066 return nand_block_checkbad(mtd
, offs
, 1, 0);
2070 * nand_block_markbad - [MTD Interface] Mark block at the given offset as bad
2071 * @mtd: MTD device structure
2072 * @ofs: offset relative to mtd start
2074 static int nand_block_markbad(struct mtd_info
*mtd
, loff_t ofs
)
2076 struct nand_chip
*chip
= mtd
->priv
;
2079 if ((ret
= nand_block_isbad(mtd
, ofs
))) {
2080 /* If it was bad already, return success and do nothing. */
2086 return chip
->block_markbad(mtd
, ofs
);
2090 * nand_suspend - [MTD Interface] Suspend the NAND flash
2091 * @mtd: MTD device structure
2093 static int nand_suspend(struct mtd_info
*mtd
)
2095 struct nand_chip
*chip
= mtd
->priv
;
2097 return nand_get_device(chip
, mtd
, FL_PM_SUSPENDED
);
2101 * nand_resume - [MTD Interface] Resume the NAND flash
2102 * @mtd: MTD device structure
2104 static void nand_resume(struct mtd_info
*mtd
)
2106 struct nand_chip
*chip
= mtd
->priv
;
2108 if (chip
->state
== FL_PM_SUSPENDED
)
2109 nand_release_device(mtd
);
2111 printk(KERN_ERR
"nand_resume() called for a chip which is not "
2112 "in suspended state\n");
2116 * Set default functions
2118 static void nand_set_defaults(struct nand_chip
*chip
, int busw
)
2120 /* check for proper chip_delay setup, set 20us if not */
2121 if (!chip
->chip_delay
)
2122 chip
->chip_delay
= 20;
2124 /* check, if a user supplied command function given */
2125 if (chip
->cmdfunc
== NULL
)
2126 chip
->cmdfunc
= nand_command
;
2128 /* check, if a user supplied wait function given */
2129 if (chip
->waitfunc
== NULL
)
2130 chip
->waitfunc
= nand_wait
;
2132 if (!chip
->select_chip
)
2133 chip
->select_chip
= nand_select_chip
;
2134 if (!chip
->read_byte
)
2135 chip
->read_byte
= busw
? nand_read_byte16
: nand_read_byte
;
2136 if (!chip
->read_word
)
2137 chip
->read_word
= nand_read_word
;
2138 if (!chip
->block_bad
)
2139 chip
->block_bad
= nand_block_bad
;
2140 if (!chip
->block_markbad
)
2141 chip
->block_markbad
= nand_default_block_markbad
;
2142 if (!chip
->write_buf
)
2143 chip
->write_buf
= busw
? nand_write_buf16
: nand_write_buf
;
2144 if (!chip
->read_buf
)
2145 chip
->read_buf
= busw
? nand_read_buf16
: nand_read_buf
;
2146 if (!chip
->verify_buf
)
2147 chip
->verify_buf
= busw
? nand_verify_buf16
: nand_verify_buf
;
2148 if (!chip
->scan_bbt
)
2149 chip
->scan_bbt
= nand_default_bbt
;
2151 if (!chip
->controller
) {
2152 chip
->controller
= &chip
->hwcontrol
;
2153 spin_lock_init(&chip
->controller
->lock
);
2154 init_waitqueue_head(&chip
->controller
->wq
);
2160 * Get the flash and manufacturer id and lookup if the type is supported
2162 static struct nand_flash_dev
*nand_get_flash_type(struct mtd_info
*mtd
,
2163 struct nand_chip
*chip
,
2164 int busw
, int *maf_id
)
2166 struct nand_flash_dev
*type
= NULL
;
2167 int i
, dev_id
, maf_idx
;
2169 /* Select the device */
2170 chip
->select_chip(mtd
, 0);
2172 /* Send the command for reading device ID */
2173 chip
->cmdfunc(mtd
, NAND_CMD_READID
, 0x00, -1);
2175 /* Read manufacturer and device IDs */
2176 *maf_id
= chip
->read_byte(mtd
);
2177 dev_id
= chip
->read_byte(mtd
);
2179 /* Lookup the flash id */
2180 for (i
= 0; nand_flash_ids
[i
].name
!= NULL
; i
++) {
2181 if (dev_id
== nand_flash_ids
[i
].id
) {
2182 type
= &nand_flash_ids
[i
];
2188 return ERR_PTR(-ENODEV
);
2191 mtd
->name
= type
->name
;
2193 chip
->chipsize
= type
->chipsize
<< 20;
2195 /* Newer devices have all the information in additional id bytes */
2196 if (!type
->pagesize
) {
2198 /* The 3rd id byte contains non relevant data ATM */
2199 extid
= chip
->read_byte(mtd
);
2200 /* The 4th id byte is the important one */
2201 extid
= chip
->read_byte(mtd
);
2203 mtd
->writesize
= 1024 << (extid
& 0x3);
2206 mtd
->oobsize
= (8 << (extid
& 0x01)) * (mtd
->writesize
>> 9);
2208 /* Calc blocksize. Blocksize is multiples of 64KiB */
2209 mtd
->erasesize
= (64 * 1024) << (extid
& 0x03);
2211 /* Get buswidth information */
2212 busw
= (extid
& 0x01) ? NAND_BUSWIDTH_16
: 0;
2216 * Old devices have chip data hardcoded in the device id table
2218 mtd
->erasesize
= type
->erasesize
;
2219 mtd
->writesize
= type
->pagesize
;
2220 mtd
->oobsize
= mtd
->writesize
/ 32;
2221 busw
= type
->options
& NAND_BUSWIDTH_16
;
2224 /* Try to identify manufacturer */
2225 for (maf_idx
= 0; nand_manuf_ids
[maf_idx
].id
!= 0x0; maf_id
++) {
2226 if (nand_manuf_ids
[maf_idx
].id
== *maf_id
)
2231 * Check, if buswidth is correct. Hardware drivers should set
2234 if (busw
!= (chip
->options
& NAND_BUSWIDTH_16
)) {
2235 printk(KERN_INFO
"NAND device: Manufacturer ID:"
2236 " 0x%02x, Chip ID: 0x%02x (%s %s)\n", *maf_id
,
2237 dev_id
, nand_manuf_ids
[maf_idx
].name
, mtd
->name
);
2238 printk(KERN_WARNING
"NAND bus width %d instead %d bit\n",
2239 (chip
->options
& NAND_BUSWIDTH_16
) ? 16 : 8,
2241 return ERR_PTR(-EINVAL
);
2244 /* Calculate the address shift from the page size */
2245 chip
->page_shift
= ffs(mtd
->writesize
) - 1;
2246 /* Convert chipsize to number of pages per chip -1. */
2247 chip
->pagemask
= (chip
->chipsize
>> chip
->page_shift
) - 1;
2249 chip
->bbt_erase_shift
= chip
->phys_erase_shift
=
2250 ffs(mtd
->erasesize
) - 1;
2251 chip
->chip_shift
= ffs(chip
->chipsize
) - 1;
2253 /* Set the bad block position */
2254 chip
->badblockpos
= mtd
->writesize
> 512 ?
2255 NAND_LARGE_BADBLOCK_POS
: NAND_SMALL_BADBLOCK_POS
;
2257 /* Get chip options, preserve non chip based options */
2258 chip
->options
&= ~NAND_CHIPOPTIONS_MSK
;
2259 chip
->options
|= type
->options
& NAND_CHIPOPTIONS_MSK
;
2262 * Set chip as a default. Board drivers can override it, if necessary
2264 chip
->options
|= NAND_NO_AUTOINCR
;
2266 /* Check if chip is a not a samsung device. Do not clear the
2267 * options for chips which are not having an extended id.
2269 if (*maf_id
!= NAND_MFR_SAMSUNG
&& !type
->pagesize
)
2270 chip
->options
&= ~NAND_SAMSUNG_LP_OPTIONS
;
2272 /* Check for AND chips with 4 page planes */
2273 if (chip
->options
& NAND_4PAGE_ARRAY
)
2274 chip
->erase_cmd
= multi_erase_cmd
;
2276 chip
->erase_cmd
= single_erase_cmd
;
2278 /* Do not replace user supplied command function ! */
2279 if (mtd
->writesize
> 512 && chip
->cmdfunc
== nand_command
)
2280 chip
->cmdfunc
= nand_command_lp
;
2282 printk(KERN_INFO
"NAND device: Manufacturer ID:"
2283 " 0x%02x, Chip ID: 0x%02x (%s %s)\n", *maf_id
, dev_id
,
2284 nand_manuf_ids
[maf_idx
].name
, type
->name
);
2289 /* module_text_address() isn't exported, and it's mostly a pointless
2290 test if this is a module _anyway_ -- they'd have to try _really_ hard
2291 to call us from in-kernel code if the core NAND support is modular. */
2293 #define caller_is_module() (1)
2295 #define caller_is_module() \
2296 module_text_address((unsigned long)__builtin_return_address(0))
2300 * nand_scan - [NAND Interface] Scan for the NAND device
2301 * @mtd: MTD device structure
2302 * @maxchips: Number of chips to scan for
2304 * This fills out all the uninitialized function pointers
2305 * with the defaults.
2306 * The flash ID is read and the mtd/chip structures are
2307 * filled with the appropriate values.
2308 * The mtd->owner field must be set to the module of the caller
2311 int nand_scan(struct mtd_info
*mtd
, int maxchips
)
2313 int i
, busw
, nand_maf_id
;
2314 struct nand_chip
*chip
= mtd
->priv
;
2315 struct nand_flash_dev
*type
;
2317 /* Many callers got this wrong, so check for it for a while... */
2318 if (!mtd
->owner
&& caller_is_module()) {
2319 printk(KERN_CRIT
"nand_scan() called with NULL mtd->owner!\n");
2323 /* Get buswidth to select the correct functions */
2324 busw
= chip
->options
& NAND_BUSWIDTH_16
;
2325 /* Set the default functions */
2326 nand_set_defaults(chip
, busw
);
2328 /* Read the flash type */
2329 type
= nand_get_flash_type(mtd
, chip
, busw
, &nand_maf_id
);
2332 printk(KERN_WARNING
"No NAND device found!!!\n");
2333 chip
->select_chip(mtd
, -1);
2334 return PTR_ERR(type
);
2337 /* Check for a chip array */
2338 for (i
= 1; i
< maxchips
; i
++) {
2339 chip
->select_chip(mtd
, i
);
2340 /* Send the command for reading device ID */
2341 chip
->cmdfunc(mtd
, NAND_CMD_READID
, 0x00, -1);
2342 /* Read manufacturer and device IDs */
2343 if (nand_maf_id
!= chip
->read_byte(mtd
) ||
2344 type
->id
!= chip
->read_byte(mtd
))
2348 printk(KERN_INFO
"%d NAND chips detected\n", i
);
2350 /* Store the number of chips and calc total size for mtd */
2352 mtd
->size
= i
* chip
->chipsize
;
2354 /* Preset the internal oob write buffer */
2355 memset(chip
->buffers
.oobwbuf
, 0xff, mtd
->oobsize
);
2358 * If no default placement scheme is given, select an appropriate one
2360 if (!chip
->ecc
.layout
) {
2361 switch (mtd
->oobsize
) {
2363 chip
->ecc
.layout
= &nand_oob_8
;
2366 chip
->ecc
.layout
= &nand_oob_16
;
2369 chip
->ecc
.layout
= &nand_oob_64
;
2372 printk(KERN_WARNING
"No oob scheme defined for "
2373 "oobsize %d\n", mtd
->oobsize
);
2379 * check ECC mode, default to software if 3byte/512byte hardware ECC is
2380 * selected and we have 256 byte pagesize fallback to software ECC
2382 switch (chip
->ecc
.mode
) {
2384 /* Use standard hwecc read page function ? */
2385 if (!chip
->ecc
.read_page
)
2386 chip
->ecc
.read_page
= nand_read_page_hwecc
;
2387 if (!chip
->ecc
.write_page
)
2388 chip
->ecc
.write_page
= nand_write_page_hwecc
;
2389 if (!chip
->ecc
.read_oob
)
2390 chip
->ecc
.read_oob
= nand_read_oob_std
;
2391 if (!chip
->ecc
.write_oob
)
2392 chip
->ecc
.write_oob
= nand_write_oob_std
;
2394 case NAND_ECC_HW_SYNDROME
:
2395 if (!chip
->ecc
.calculate
|| !chip
->ecc
.correct
||
2397 printk(KERN_WARNING
"No ECC functions supplied, "
2398 "Hardware ECC not possible\n");
2401 /* Use standard syndrome read/write page function ? */
2402 if (!chip
->ecc
.read_page
)
2403 chip
->ecc
.read_page
= nand_read_page_syndrome
;
2404 if (!chip
->ecc
.write_page
)
2405 chip
->ecc
.write_page
= nand_write_page_syndrome
;
2406 if (!chip
->ecc
.read_oob
)
2407 chip
->ecc
.read_oob
= nand_read_oob_syndrome
;
2408 if (!chip
->ecc
.write_oob
)
2409 chip
->ecc
.write_oob
= nand_write_oob_syndrome
;
2411 if (mtd
->writesize
>= chip
->ecc
.size
)
2413 printk(KERN_WARNING
"%d byte HW ECC not possible on "
2414 "%d byte page size, fallback to SW ECC\n",
2415 chip
->ecc
.size
, mtd
->writesize
);
2416 chip
->ecc
.mode
= NAND_ECC_SOFT
;
2419 chip
->ecc
.calculate
= nand_calculate_ecc
;
2420 chip
->ecc
.correct
= nand_correct_data
;
2421 chip
->ecc
.read_page
= nand_read_page_swecc
;
2422 chip
->ecc
.write_page
= nand_write_page_swecc
;
2423 chip
->ecc
.read_oob
= nand_read_oob_std
;
2424 chip
->ecc
.write_oob
= nand_write_oob_std
;
2425 chip
->ecc
.size
= 256;
2426 chip
->ecc
.bytes
= 3;
2430 printk(KERN_WARNING
"NAND_ECC_NONE selected by board driver. "
2431 "This is not recommended !!\n");
2432 chip
->ecc
.read_page
= nand_read_page_raw
;
2433 chip
->ecc
.write_page
= nand_write_page_raw
;
2434 chip
->ecc
.read_oob
= nand_read_oob_std
;
2435 chip
->ecc
.write_oob
= nand_write_oob_std
;
2436 chip
->ecc
.size
= mtd
->writesize
;
2437 chip
->ecc
.bytes
= 0;
2440 printk(KERN_WARNING
"Invalid NAND_ECC_MODE %d\n",
2446 * The number of bytes available for a client to place data into
2447 * the out of band area
2449 chip
->ecc
.layout
->oobavail
= 0;
2450 for (i
= 0; chip
->ecc
.layout
->oobfree
[i
].length
; i
++)
2451 chip
->ecc
.layout
->oobavail
+=
2452 chip
->ecc
.layout
->oobfree
[i
].length
;
2455 * Set the number of read / write steps for one page depending on ECC
2458 chip
->ecc
.steps
= mtd
->writesize
/ chip
->ecc
.size
;
2459 if(chip
->ecc
.steps
* chip
->ecc
.size
!= mtd
->writesize
) {
2460 printk(KERN_WARNING
"Invalid ecc parameters\n");
2463 chip
->ecc
.total
= chip
->ecc
.steps
* chip
->ecc
.bytes
;
2465 /* Initialize state */
2466 chip
->state
= FL_READY
;
2468 /* De-select the device */
2469 chip
->select_chip(mtd
, -1);
2471 /* Invalidate the pagebuffer reference */
2474 /* Fill in remaining MTD driver data */
2475 mtd
->type
= MTD_NANDFLASH
;
2476 mtd
->flags
= MTD_CAP_NANDFLASH
;
2477 mtd
->ecctype
= MTD_ECC_SW
;
2478 mtd
->erase
= nand_erase
;
2480 mtd
->unpoint
= NULL
;
2481 mtd
->read
= nand_read
;
2482 mtd
->write
= nand_write
;
2483 mtd
->read_oob
= nand_read_oob
;
2484 mtd
->write_oob
= nand_write_oob
;
2485 mtd
->sync
= nand_sync
;
2488 mtd
->suspend
= nand_suspend
;
2489 mtd
->resume
= nand_resume
;
2490 mtd
->block_isbad
= nand_block_isbad
;
2491 mtd
->block_markbad
= nand_block_markbad
;
2493 /* propagate ecc.layout to mtd_info */
2494 mtd
->ecclayout
= chip
->ecc
.layout
;
2496 /* Check, if we should skip the bad block table scan */
2497 if (chip
->options
& NAND_SKIP_BBTSCAN
)
2500 /* Build bad block table */
2501 return chip
->scan_bbt(mtd
);
2505 * nand_release - [NAND Interface] Free resources held by the NAND device
2506 * @mtd: MTD device structure
2508 void nand_release(struct mtd_info
*mtd
)
2510 struct nand_chip
*chip
= mtd
->priv
;
2512 #ifdef CONFIG_MTD_PARTITIONS
2513 /* Deregister partitions */
2514 del_mtd_partitions(mtd
);
2516 /* Deregister the device */
2517 del_mtd_device(mtd
);
2519 /* Free bad block table memory */
2523 EXPORT_SYMBOL_GPL(nand_scan
);
2524 EXPORT_SYMBOL_GPL(nand_release
);
2526 static int __init
nand_base_init(void)
2528 led_trigger_register_simple("nand-disk", &nand_led_trigger
);
2532 static void __exit
nand_base_exit(void)
2534 led_trigger_unregister_simple(nand_led_trigger
);
2537 module_init(nand_base_init
);
2538 module_exit(nand_base_exit
);
2540 MODULE_LICENSE("GPL");
2541 MODULE_AUTHOR("Steven J. Hill <sjhill@realitydiluted.com>, Thomas Gleixner <tglx@linutronix.de>");
2542 MODULE_DESCRIPTION("Generic NAND flash driver code");