5 * This is the generic MTD driver for NAND flash devices. It should be
6 * capable of working with almost all NAND chips currently available.
7 * Basic support for AG-AND chips is provided.
9 * Additional technical information is available on
10 * http://www.linux-mtd.infradead.org/tech/nand.html
12 * Copyright (C) 2000 Steven J. Hill (sjhill@realitydiluted.com)
13 * 2002-2006 Thomas Gleixner (tglx@linutronix.de)
16 * David Woodhouse for adding multichip support
18 * Aleph One Ltd. and Toby Churchill Ltd. for supporting the
19 * rework for 2K page size chips
22 * Enable cached programming for 2k page size chips
23 * Check, if mtd->ecctype should be set to MTD_ECC_HW
24 * if we have HW ecc support.
25 * The AG-AND chips have nice features for speed improvement,
26 * which are not supported yet. Read / program 4 pages in one go.
28 * This program is free software; you can redistribute it and/or modify
29 * it under the terms of the GNU General Public License version 2 as
30 * published by the Free Software Foundation.
34 #include <linux/module.h>
35 #include <linux/delay.h>
36 #include <linux/errno.h>
37 #include <linux/err.h>
38 #include <linux/sched.h>
39 #include <linux/slab.h>
40 #include <linux/types.h>
41 #include <linux/mtd/mtd.h>
42 #include <linux/mtd/nand.h>
43 #include <linux/mtd/nand_ecc.h>
44 #include <linux/mtd/compatmac.h>
45 #include <linux/interrupt.h>
46 #include <linux/bitops.h>
47 #include <linux/leds.h>
50 #ifdef CONFIG_MTD_PARTITIONS
51 #include <linux/mtd/partitions.h>
54 /* Define default oob placement schemes for large and small page devices */
55 static struct nand_ecclayout nand_oob_8
= {
65 static struct nand_ecclayout nand_oob_16
= {
67 .eccpos
= {0, 1, 2, 3, 6, 7},
73 static struct nand_ecclayout nand_oob_64
= {
76 40, 41, 42, 43, 44, 45, 46, 47,
77 48, 49, 50, 51, 52, 53, 54, 55,
78 56, 57, 58, 59, 60, 61, 62, 63},
84 static int nand_get_device(struct nand_chip
*chip
, struct mtd_info
*mtd
,
87 static int nand_do_write_oob(struct mtd_info
*mtd
, loff_t to
,
88 struct mtd_oob_ops
*ops
);
91 * For devices which display every fart in the system on a seperate LED. Is
92 * compiled away when LED support is disabled.
94 DEFINE_LED_TRIGGER(nand_led_trigger
);
97 * nand_release_device - [GENERIC] release chip
98 * @mtd: MTD device structure
100 * Deselect, release chip lock and wake up anyone waiting on the device
102 static void nand_release_device(struct mtd_info
*mtd
)
104 struct nand_chip
*chip
= mtd
->priv
;
106 /* De-select the NAND device */
107 chip
->select_chip(mtd
, -1);
109 /* Release the controller and the chip */
110 spin_lock(&chip
->controller
->lock
);
111 chip
->controller
->active
= NULL
;
112 chip
->state
= FL_READY
;
113 wake_up(&chip
->controller
->wq
);
114 spin_unlock(&chip
->controller
->lock
);
118 * nand_read_byte - [DEFAULT] read one byte from the chip
119 * @mtd: MTD device structure
121 * Default read function for 8bit buswith
123 static uint8_t nand_read_byte(struct mtd_info
*mtd
)
125 struct nand_chip
*chip
= mtd
->priv
;
126 return readb(chip
->IO_ADDR_R
);
130 * nand_read_byte16 - [DEFAULT] read one byte endianess aware from the chip
131 * @mtd: MTD device structure
133 * Default read function for 16bit buswith with
134 * endianess conversion
136 static uint8_t nand_read_byte16(struct mtd_info
*mtd
)
138 struct nand_chip
*chip
= mtd
->priv
;
139 return (uint8_t) cpu_to_le16(readw(chip
->IO_ADDR_R
));
143 * nand_read_word - [DEFAULT] read one word from the chip
144 * @mtd: MTD device structure
146 * Default read function for 16bit buswith without
147 * endianess conversion
149 static u16
nand_read_word(struct mtd_info
*mtd
)
151 struct nand_chip
*chip
= mtd
->priv
;
152 return readw(chip
->IO_ADDR_R
);
156 * nand_select_chip - [DEFAULT] control CE line
157 * @mtd: MTD device structure
158 * @chipnr: chipnumber to select, -1 for deselect
160 * Default select function for 1 chip devices.
162 static void nand_select_chip(struct mtd_info
*mtd
, int chipnr
)
164 struct nand_chip
*chip
= mtd
->priv
;
168 chip
->cmd_ctrl(mtd
, NAND_CMD_NONE
, 0 | NAND_CTRL_CHANGE
);
179 * nand_write_buf - [DEFAULT] write buffer to chip
180 * @mtd: MTD device structure
182 * @len: number of bytes to write
184 * Default write function for 8bit buswith
186 static void nand_write_buf(struct mtd_info
*mtd
, const uint8_t *buf
, int len
)
189 struct nand_chip
*chip
= mtd
->priv
;
191 for (i
= 0; i
< len
; i
++)
192 writeb(buf
[i
], chip
->IO_ADDR_W
);
196 * nand_read_buf - [DEFAULT] read chip data into buffer
197 * @mtd: MTD device structure
198 * @buf: buffer to store date
199 * @len: number of bytes to read
201 * Default read function for 8bit buswith
203 static void nand_read_buf(struct mtd_info
*mtd
, uint8_t *buf
, int len
)
206 struct nand_chip
*chip
= mtd
->priv
;
208 for (i
= 0; i
< len
; i
++)
209 buf
[i
] = readb(chip
->IO_ADDR_R
);
213 * nand_verify_buf - [DEFAULT] Verify chip data against buffer
214 * @mtd: MTD device structure
215 * @buf: buffer containing the data to compare
216 * @len: number of bytes to compare
218 * Default verify function for 8bit buswith
220 static int nand_verify_buf(struct mtd_info
*mtd
, const uint8_t *buf
, int len
)
223 struct nand_chip
*chip
= mtd
->priv
;
225 for (i
= 0; i
< len
; i
++)
226 if (buf
[i
] != readb(chip
->IO_ADDR_R
))
232 * nand_write_buf16 - [DEFAULT] write buffer to chip
233 * @mtd: MTD device structure
235 * @len: number of bytes to write
237 * Default write function for 16bit buswith
239 static void nand_write_buf16(struct mtd_info
*mtd
, const uint8_t *buf
, int len
)
242 struct nand_chip
*chip
= mtd
->priv
;
243 u16
*p
= (u16
*) buf
;
246 for (i
= 0; i
< len
; i
++)
247 writew(p
[i
], chip
->IO_ADDR_W
);
252 * nand_read_buf16 - [DEFAULT] read chip data into buffer
253 * @mtd: MTD device structure
254 * @buf: buffer to store date
255 * @len: number of bytes to read
257 * Default read function for 16bit buswith
259 static void nand_read_buf16(struct mtd_info
*mtd
, uint8_t *buf
, int len
)
262 struct nand_chip
*chip
= mtd
->priv
;
263 u16
*p
= (u16
*) buf
;
266 for (i
= 0; i
< len
; i
++)
267 p
[i
] = readw(chip
->IO_ADDR_R
);
271 * nand_verify_buf16 - [DEFAULT] Verify chip data against buffer
272 * @mtd: MTD device structure
273 * @buf: buffer containing the data to compare
274 * @len: number of bytes to compare
276 * Default verify function for 16bit buswith
278 static int nand_verify_buf16(struct mtd_info
*mtd
, const uint8_t *buf
, int len
)
281 struct nand_chip
*chip
= mtd
->priv
;
282 u16
*p
= (u16
*) buf
;
285 for (i
= 0; i
< len
; i
++)
286 if (p
[i
] != readw(chip
->IO_ADDR_R
))
293 * nand_block_bad - [DEFAULT] Read bad block marker from the chip
294 * @mtd: MTD device structure
295 * @ofs: offset from device start
296 * @getchip: 0, if the chip is already selected
298 * Check, if the block is bad.
300 static int nand_block_bad(struct mtd_info
*mtd
, loff_t ofs
, int getchip
)
302 int page
, chipnr
, res
= 0;
303 struct nand_chip
*chip
= mtd
->priv
;
307 page
= (int)(ofs
>> chip
->page_shift
);
308 chipnr
= (int)(ofs
>> chip
->chip_shift
);
310 nand_get_device(chip
, mtd
, FL_READING
);
312 /* Select the NAND device */
313 chip
->select_chip(mtd
, chipnr
);
317 if (chip
->options
& NAND_BUSWIDTH_16
) {
318 chip
->cmdfunc(mtd
, NAND_CMD_READOOB
, chip
->badblockpos
& 0xFE,
319 page
& chip
->pagemask
);
320 bad
= cpu_to_le16(chip
->read_word(mtd
));
321 if (chip
->badblockpos
& 0x1)
323 if ((bad
& 0xFF) != 0xff)
326 chip
->cmdfunc(mtd
, NAND_CMD_READOOB
, chip
->badblockpos
,
327 page
& chip
->pagemask
);
328 if (chip
->read_byte(mtd
) != 0xff)
333 nand_release_device(mtd
);
339 * nand_default_block_markbad - [DEFAULT] mark a block bad
340 * @mtd: MTD device structure
341 * @ofs: offset from device start
343 * This is the default implementation, which can be overridden by
344 * a hardware specific driver.
346 static int nand_default_block_markbad(struct mtd_info
*mtd
, loff_t ofs
)
348 struct nand_chip
*chip
= mtd
->priv
;
349 uint8_t buf
[2] = { 0, 0 };
352 /* Get block number */
353 block
= ((int)ofs
) >> chip
->bbt_erase_shift
;
355 chip
->bbt
[block
>> 2] |= 0x01 << ((block
& 0x03) << 1);
357 /* Do we have a flash based bad block table ? */
358 if (chip
->options
& NAND_USE_FLASH_BBT
)
359 ret
= nand_update_bbt(mtd
, ofs
);
361 /* We write two bytes, so we dont have to mess with 16 bit
366 chip
->ops
.datbuf
= NULL
;
367 chip
->ops
.oobbuf
= buf
;
368 chip
->ops
.ooboffs
= chip
->badblockpos
& ~0x01;
370 ret
= nand_do_write_oob(mtd
, ofs
, &chip
->ops
);
373 mtd
->ecc_stats
.badblocks
++;
378 * nand_check_wp - [GENERIC] check if the chip is write protected
379 * @mtd: MTD device structure
380 * Check, if the device is write protected
382 * The function expects, that the device is already selected
384 static int nand_check_wp(struct mtd_info
*mtd
)
386 struct nand_chip
*chip
= mtd
->priv
;
387 /* Check the WP bit */
388 chip
->cmdfunc(mtd
, NAND_CMD_STATUS
, -1, -1);
389 return (chip
->read_byte(mtd
) & NAND_STATUS_WP
) ? 0 : 1;
393 * nand_block_checkbad - [GENERIC] Check if a block is marked bad
394 * @mtd: MTD device structure
395 * @ofs: offset from device start
396 * @getchip: 0, if the chip is already selected
397 * @allowbbt: 1, if its allowed to access the bbt area
399 * Check, if the block is bad. Either by reading the bad block table or
400 * calling of the scan function.
402 static int nand_block_checkbad(struct mtd_info
*mtd
, loff_t ofs
, int getchip
,
405 struct nand_chip
*chip
= mtd
->priv
;
408 return chip
->block_bad(mtd
, ofs
, getchip
);
410 /* Return info from the table */
411 return nand_isbad_bbt(mtd
, ofs
, allowbbt
);
415 * Wait for the ready pin, after a command
416 * The timeout is catched later.
418 static void nand_wait_ready(struct mtd_info
*mtd
)
420 struct nand_chip
*chip
= mtd
->priv
;
421 unsigned long timeo
= jiffies
+ 2;
423 led_trigger_event(nand_led_trigger
, LED_FULL
);
424 /* wait until command is processed or timeout occures */
426 if (chip
->dev_ready(mtd
))
428 touch_softlockup_watchdog();
429 } while (time_before(jiffies
, timeo
));
430 led_trigger_event(nand_led_trigger
, LED_OFF
);
434 * nand_command - [DEFAULT] Send command to NAND device
435 * @mtd: MTD device structure
436 * @command: the command to be sent
437 * @column: the column address for this command, -1 if none
438 * @page_addr: the page address for this command, -1 if none
440 * Send command to NAND device. This function is used for small page
441 * devices (256/512 Bytes per page)
443 static void nand_command(struct mtd_info
*mtd
, unsigned int command
,
444 int column
, int page_addr
)
446 register struct nand_chip
*chip
= mtd
->priv
;
447 int ctrl
= NAND_CTRL_CLE
| NAND_CTRL_CHANGE
;
450 * Write out the command to the device.
452 if (command
== NAND_CMD_SEQIN
) {
455 if (column
>= mtd
->writesize
) {
457 column
-= mtd
->writesize
;
458 readcmd
= NAND_CMD_READOOB
;
459 } else if (column
< 256) {
460 /* First 256 bytes --> READ0 */
461 readcmd
= NAND_CMD_READ0
;
464 readcmd
= NAND_CMD_READ1
;
466 chip
->cmd_ctrl(mtd
, readcmd
, ctrl
);
467 ctrl
&= ~NAND_CTRL_CHANGE
;
469 chip
->cmd_ctrl(mtd
, command
, ctrl
);
472 * Address cycle, when necessary
474 ctrl
= NAND_CTRL_ALE
| NAND_CTRL_CHANGE
;
475 /* Serially input address */
477 /* Adjust columns for 16 bit buswidth */
478 if (chip
->options
& NAND_BUSWIDTH_16
)
480 chip
->cmd_ctrl(mtd
, column
, ctrl
);
481 ctrl
&= ~NAND_CTRL_CHANGE
;
483 if (page_addr
!= -1) {
484 chip
->cmd_ctrl(mtd
, page_addr
, ctrl
);
485 ctrl
&= ~NAND_CTRL_CHANGE
;
486 chip
->cmd_ctrl(mtd
, page_addr
>> 8, ctrl
);
487 /* One more address cycle for devices > 32MiB */
488 if (chip
->chipsize
> (32 << 20))
489 chip
->cmd_ctrl(mtd
, page_addr
>> 16, ctrl
);
491 chip
->cmd_ctrl(mtd
, NAND_CMD_NONE
, NAND_NCE
| NAND_CTRL_CHANGE
);
494 * program and erase have their own busy handlers
495 * status and sequential in needs no delay
499 case NAND_CMD_PAGEPROG
:
500 case NAND_CMD_ERASE1
:
501 case NAND_CMD_ERASE2
:
503 case NAND_CMD_STATUS
:
509 udelay(chip
->chip_delay
);
510 chip
->cmd_ctrl(mtd
, NAND_CMD_STATUS
,
511 NAND_CTRL_CLE
| NAND_CTRL_CHANGE
);
513 NAND_CMD_NONE
, NAND_NCE
| NAND_CTRL_CHANGE
);
514 while (!(chip
->read_byte(mtd
) & NAND_STATUS_READY
)) ;
517 /* This applies to read commands */
520 * If we don't have access to the busy pin, we apply the given
523 if (!chip
->dev_ready
) {
524 udelay(chip
->chip_delay
);
528 /* Apply this short delay always to ensure that we do wait tWB in
529 * any case on any machine. */
532 nand_wait_ready(mtd
);
536 * nand_command_lp - [DEFAULT] Send command to NAND large page device
537 * @mtd: MTD device structure
538 * @command: the command to be sent
539 * @column: the column address for this command, -1 if none
540 * @page_addr: the page address for this command, -1 if none
542 * Send command to NAND device. This is the version for the new large page
543 * devices We dont have the separate regions as we have in the small page
544 * devices. We must emulate NAND_CMD_READOOB to keep the code compatible.
546 static void nand_command_lp(struct mtd_info
*mtd
, unsigned int command
,
547 int column
, int page_addr
)
549 register struct nand_chip
*chip
= mtd
->priv
;
551 /* Emulate NAND_CMD_READOOB */
552 if (command
== NAND_CMD_READOOB
) {
553 column
+= mtd
->writesize
;
554 command
= NAND_CMD_READ0
;
557 /* Command latch cycle */
558 chip
->cmd_ctrl(mtd
, command
& 0xff,
559 NAND_NCE
| NAND_CLE
| NAND_CTRL_CHANGE
);
561 if (column
!= -1 || page_addr
!= -1) {
562 int ctrl
= NAND_CTRL_CHANGE
| NAND_NCE
| NAND_ALE
;
564 /* Serially input address */
566 /* Adjust columns for 16 bit buswidth */
567 if (chip
->options
& NAND_BUSWIDTH_16
)
569 chip
->cmd_ctrl(mtd
, column
, ctrl
);
570 ctrl
&= ~NAND_CTRL_CHANGE
;
571 chip
->cmd_ctrl(mtd
, column
>> 8, ctrl
);
573 if (page_addr
!= -1) {
574 chip
->cmd_ctrl(mtd
, page_addr
, ctrl
);
575 chip
->cmd_ctrl(mtd
, page_addr
>> 8,
576 NAND_NCE
| NAND_ALE
);
577 /* One more address cycle for devices > 128MiB */
578 if (chip
->chipsize
> (128 << 20))
579 chip
->cmd_ctrl(mtd
, page_addr
>> 16,
580 NAND_NCE
| NAND_ALE
);
583 chip
->cmd_ctrl(mtd
, NAND_CMD_NONE
, NAND_NCE
| NAND_CTRL_CHANGE
);
586 * program and erase have their own busy handlers
587 * status, sequential in, and deplete1 need no delay
591 case NAND_CMD_CACHEDPROG
:
592 case NAND_CMD_PAGEPROG
:
593 case NAND_CMD_ERASE1
:
594 case NAND_CMD_ERASE2
:
597 case NAND_CMD_STATUS
:
598 case NAND_CMD_DEPLETE1
:
602 * read error status commands require only a short delay
604 case NAND_CMD_STATUS_ERROR
:
605 case NAND_CMD_STATUS_ERROR0
:
606 case NAND_CMD_STATUS_ERROR1
:
607 case NAND_CMD_STATUS_ERROR2
:
608 case NAND_CMD_STATUS_ERROR3
:
609 udelay(chip
->chip_delay
);
615 udelay(chip
->chip_delay
);
616 chip
->cmd_ctrl(mtd
, NAND_CMD_STATUS
,
617 NAND_NCE
| NAND_CLE
| NAND_CTRL_CHANGE
);
618 chip
->cmd_ctrl(mtd
, NAND_CMD_NONE
,
619 NAND_NCE
| NAND_CTRL_CHANGE
);
620 while (!(chip
->read_byte(mtd
) & NAND_STATUS_READY
)) ;
623 case NAND_CMD_RNDOUT
:
624 /* No ready / busy check necessary */
625 chip
->cmd_ctrl(mtd
, NAND_CMD_RNDOUTSTART
,
626 NAND_NCE
| NAND_CLE
| NAND_CTRL_CHANGE
);
627 chip
->cmd_ctrl(mtd
, NAND_CMD_NONE
,
628 NAND_NCE
| NAND_CTRL_CHANGE
);
632 chip
->cmd_ctrl(mtd
, NAND_CMD_READSTART
,
633 NAND_NCE
| NAND_CLE
| NAND_CTRL_CHANGE
);
634 chip
->cmd_ctrl(mtd
, NAND_CMD_NONE
,
635 NAND_NCE
| NAND_CTRL_CHANGE
);
637 /* This applies to read commands */
640 * If we don't have access to the busy pin, we apply the given
643 if (!chip
->dev_ready
) {
644 udelay(chip
->chip_delay
);
649 /* Apply this short delay always to ensure that we do wait tWB in
650 * any case on any machine. */
653 nand_wait_ready(mtd
);
657 * nand_get_device - [GENERIC] Get chip for selected access
658 * @chip: the nand chip descriptor
659 * @mtd: MTD device structure
660 * @new_state: the state which is requested
662 * Get the device and lock it for exclusive access
665 nand_get_device(struct nand_chip
*chip
, struct mtd_info
*mtd
, int new_state
)
667 spinlock_t
*lock
= &chip
->controller
->lock
;
668 wait_queue_head_t
*wq
= &chip
->controller
->wq
;
669 DECLARE_WAITQUEUE(wait
, current
);
673 /* Hardware controller shared among independend devices */
674 /* Hardware controller shared among independend devices */
675 if (!chip
->controller
->active
)
676 chip
->controller
->active
= chip
;
678 if (chip
->controller
->active
== chip
&& chip
->state
== FL_READY
) {
679 chip
->state
= new_state
;
683 if (new_state
== FL_PM_SUSPENDED
) {
685 return (chip
->state
== FL_PM_SUSPENDED
) ? 0 : -EAGAIN
;
687 set_current_state(TASK_UNINTERRUPTIBLE
);
688 add_wait_queue(wq
, &wait
);
691 remove_wait_queue(wq
, &wait
);
696 * nand_wait - [DEFAULT] wait until the command is done
697 * @mtd: MTD device structure
698 * @chip: NAND chip structure
700 * Wait for command done. This applies to erase and program only
701 * Erase can take up to 400ms and program up to 20ms according to
702 * general NAND and SmartMedia specs
704 static int nand_wait(struct mtd_info
*mtd
, struct nand_chip
*chip
)
707 unsigned long timeo
= jiffies
;
708 int status
, state
= chip
->state
;
710 if (state
== FL_ERASING
)
711 timeo
+= (HZ
* 400) / 1000;
713 timeo
+= (HZ
* 20) / 1000;
715 led_trigger_event(nand_led_trigger
, LED_FULL
);
717 /* Apply this short delay always to ensure that we do wait tWB in
718 * any case on any machine. */
721 if ((state
== FL_ERASING
) && (chip
->options
& NAND_IS_AND
))
722 chip
->cmdfunc(mtd
, NAND_CMD_STATUS_MULTI
, -1, -1);
724 chip
->cmdfunc(mtd
, NAND_CMD_STATUS
, -1, -1);
726 while (time_before(jiffies
, timeo
)) {
727 if (chip
->dev_ready
) {
728 if (chip
->dev_ready(mtd
))
731 if (chip
->read_byte(mtd
) & NAND_STATUS_READY
)
736 led_trigger_event(nand_led_trigger
, LED_OFF
);
738 status
= (int)chip
->read_byte(mtd
);
743 * nand_read_page_raw - [Intern] read raw page data without ecc
744 * @mtd: mtd info structure
745 * @chip: nand chip info structure
746 * @buf: buffer to store read data
748 static int nand_read_page_raw(struct mtd_info
*mtd
, struct nand_chip
*chip
,
751 chip
->read_buf(mtd
, buf
, mtd
->writesize
);
752 chip
->read_buf(mtd
, chip
->oob_poi
, mtd
->oobsize
);
757 * nand_read_page_swecc - {REPLACABLE] software ecc based page read function
758 * @mtd: mtd info structure
759 * @chip: nand chip info structure
760 * @buf: buffer to store read data
762 static int nand_read_page_swecc(struct mtd_info
*mtd
, struct nand_chip
*chip
,
765 int i
, eccsize
= chip
->ecc
.size
;
766 int eccbytes
= chip
->ecc
.bytes
;
767 int eccsteps
= chip
->ecc
.steps
;
769 uint8_t *ecc_calc
= chip
->buffers
.ecccalc
;
770 uint8_t *ecc_code
= chip
->buffers
.ecccode
;
771 int *eccpos
= chip
->ecc
.layout
->eccpos
;
773 nand_read_page_raw(mtd
, chip
, buf
);
775 for (i
= 0; eccsteps
; eccsteps
--, i
+= eccbytes
, p
+= eccsize
)
776 chip
->ecc
.calculate(mtd
, p
, &ecc_calc
[i
]);
778 for (i
= 0; i
< chip
->ecc
.total
; i
++)
779 ecc_code
[i
] = chip
->oob_poi
[eccpos
[i
]];
781 eccsteps
= chip
->ecc
.steps
;
784 for (i
= 0 ; eccsteps
; eccsteps
--, i
+= eccbytes
, p
+= eccsize
) {
787 stat
= chip
->ecc
.correct(mtd
, p
, &ecc_code
[i
], &ecc_calc
[i
]);
789 mtd
->ecc_stats
.failed
++;
791 mtd
->ecc_stats
.corrected
+= stat
;
797 * nand_read_page_hwecc - {REPLACABLE] hardware ecc based page read function
798 * @mtd: mtd info structure
799 * @chip: nand chip info structure
800 * @buf: buffer to store read data
802 * Not for syndrome calculating ecc controllers which need a special oob layout
804 static int nand_read_page_hwecc(struct mtd_info
*mtd
, struct nand_chip
*chip
,
807 int i
, eccsize
= chip
->ecc
.size
;
808 int eccbytes
= chip
->ecc
.bytes
;
809 int eccsteps
= chip
->ecc
.steps
;
811 uint8_t *ecc_calc
= chip
->buffers
.ecccalc
;
812 uint8_t *ecc_code
= chip
->buffers
.ecccode
;
813 int *eccpos
= chip
->ecc
.layout
->eccpos
;
815 for (i
= 0; eccsteps
; eccsteps
--, i
+= eccbytes
, p
+= eccsize
) {
816 chip
->ecc
.hwctl(mtd
, NAND_ECC_READ
);
817 chip
->read_buf(mtd
, p
, eccsize
);
818 chip
->ecc
.calculate(mtd
, p
, &ecc_calc
[i
]);
820 chip
->read_buf(mtd
, chip
->oob_poi
, mtd
->oobsize
);
822 for (i
= 0; i
< chip
->ecc
.total
; i
++)
823 ecc_code
[i
] = chip
->oob_poi
[eccpos
[i
]];
825 eccsteps
= chip
->ecc
.steps
;
828 for (i
= 0 ; eccsteps
; eccsteps
--, i
+= eccbytes
, p
+= eccsize
) {
831 stat
= chip
->ecc
.correct(mtd
, p
, &ecc_code
[i
], &ecc_calc
[i
]);
833 mtd
->ecc_stats
.failed
++;
835 mtd
->ecc_stats
.corrected
+= stat
;
841 * nand_read_page_syndrome - {REPLACABLE] hardware ecc syndrom based page read
842 * @mtd: mtd info structure
843 * @chip: nand chip info structure
844 * @buf: buffer to store read data
846 * The hw generator calculates the error syndrome automatically. Therefor
847 * we need a special oob layout and handling.
849 static int nand_read_page_syndrome(struct mtd_info
*mtd
, struct nand_chip
*chip
,
852 int i
, eccsize
= chip
->ecc
.size
;
853 int eccbytes
= chip
->ecc
.bytes
;
854 int eccsteps
= chip
->ecc
.steps
;
856 uint8_t *oob
= chip
->oob_poi
;
858 for (i
= 0; eccsteps
; eccsteps
--, i
+= eccbytes
, p
+= eccsize
) {
861 chip
->ecc
.hwctl(mtd
, NAND_ECC_READ
);
862 chip
->read_buf(mtd
, p
, eccsize
);
864 if (chip
->ecc
.prepad
) {
865 chip
->read_buf(mtd
, oob
, chip
->ecc
.prepad
);
866 oob
+= chip
->ecc
.prepad
;
869 chip
->ecc
.hwctl(mtd
, NAND_ECC_READSYN
);
870 chip
->read_buf(mtd
, oob
, eccbytes
);
871 stat
= chip
->ecc
.correct(mtd
, p
, oob
, NULL
);
874 mtd
->ecc_stats
.failed
++;
876 mtd
->ecc_stats
.corrected
+= stat
;
880 if (chip
->ecc
.postpad
) {
881 chip
->read_buf(mtd
, oob
, chip
->ecc
.postpad
);
882 oob
+= chip
->ecc
.postpad
;
886 /* Calculate remaining oob bytes */
887 i
= mtd
->oobsize
- (oob
- chip
->oob_poi
);
889 chip
->read_buf(mtd
, oob
, i
);
895 * nand_transfer_oob - [Internal] Transfer oob to client buffer
896 * @chip: nand chip structure
897 * @oob: oob destination address
898 * @ops: oob ops structure
900 static uint8_t *nand_transfer_oob(struct nand_chip
*chip
, uint8_t *oob
,
901 struct mtd_oob_ops
*ops
)
903 size_t len
= ops
->ooblen
;
909 memcpy(oob
, chip
->oob_poi
+ ops
->ooboffs
, len
);
913 struct nand_oobfree
*free
= chip
->ecc
.layout
->oobfree
;
914 uint32_t boffs
= 0, roffs
= ops
->ooboffs
;
917 for(; free
->length
&& len
; free
++, len
-= bytes
) {
918 /* Read request not from offset 0 ? */
919 if (unlikely(roffs
)) {
920 if (roffs
>= free
->length
) {
921 roffs
-= free
->length
;
924 boffs
= free
->offset
+ roffs
;
925 bytes
= min_t(size_t, len
,
926 (free
->length
- roffs
));
929 bytes
= min_t(size_t, len
, free
->length
);
930 boffs
= free
->offset
;
932 memcpy(oob
, chip
->oob_poi
+ boffs
, bytes
);
944 * nand_do_read_ops - [Internal] Read data with ECC
946 * @mtd: MTD device structure
947 * @from: offset to read from
948 * @ops: oob ops structure
950 * Internal function. Called with chip held.
952 static int nand_do_read_ops(struct mtd_info
*mtd
, loff_t from
,
953 struct mtd_oob_ops
*ops
)
955 int chipnr
, page
, realpage
, col
, bytes
, aligned
;
956 struct nand_chip
*chip
= mtd
->priv
;
957 struct mtd_ecc_stats stats
;
958 int blkcheck
= (1 << (chip
->phys_erase_shift
- chip
->page_shift
)) - 1;
961 uint32_t readlen
= ops
->len
;
962 uint8_t *bufpoi
, *oob
, *buf
;
964 stats
= mtd
->ecc_stats
;
966 chipnr
= (int)(from
>> chip
->chip_shift
);
967 chip
->select_chip(mtd
, chipnr
);
969 realpage
= (int)(from
>> chip
->page_shift
);
970 page
= realpage
& chip
->pagemask
;
972 col
= (int)(from
& (mtd
->writesize
- 1));
973 chip
->oob_poi
= chip
->buffers
.oobrbuf
;
979 bytes
= min(mtd
->writesize
- col
, readlen
);
980 aligned
= (bytes
== mtd
->writesize
);
982 /* Is the current page in the buffer ? */
983 if (realpage
!= chip
->pagebuf
|| oob
) {
984 bufpoi
= aligned
? buf
: chip
->buffers
.databuf
;
986 if (likely(sndcmd
)) {
987 chip
->cmdfunc(mtd
, NAND_CMD_READ0
, 0x00, page
);
991 /* Now read the page into the buffer */
992 ret
= chip
->ecc
.read_page(mtd
, chip
, bufpoi
);
996 /* Transfer not aligned data */
998 chip
->pagebuf
= realpage
;
999 memcpy(buf
, chip
->buffers
.databuf
+ col
, bytes
);
1004 if (unlikely(oob
)) {
1005 /* Raw mode does data:oob:data:oob */
1006 if (ops
->mode
!= MTD_OOB_RAW
)
1007 oob
= nand_transfer_oob(chip
, oob
, ops
);
1009 buf
= nand_transfer_oob(chip
, buf
, ops
);
1012 if (!(chip
->options
& NAND_NO_READRDY
)) {
1014 * Apply delay or wait for ready/busy pin. Do
1015 * this before the AUTOINCR check, so no
1016 * problems arise if a chip which does auto
1017 * increment is marked as NOAUTOINCR by the
1020 if (!chip
->dev_ready
)
1021 udelay(chip
->chip_delay
);
1023 nand_wait_ready(mtd
);
1026 memcpy(buf
, chip
->buffers
.databuf
+ col
, bytes
);
1035 /* For subsequent reads align to page boundary. */
1037 /* Increment page address */
1040 page
= realpage
& chip
->pagemask
;
1041 /* Check, if we cross a chip boundary */
1044 chip
->select_chip(mtd
, -1);
1045 chip
->select_chip(mtd
, chipnr
);
1048 /* Check, if the chip supports auto page increment
1049 * or if we have hit a block boundary.
1051 if (!NAND_CANAUTOINCR(chip
) || !(page
& blkcheck
))
1055 ops
->retlen
= ops
->len
- (size_t) readlen
;
1060 if (mtd
->ecc_stats
.failed
- stats
.failed
)
1063 return mtd
->ecc_stats
.corrected
- stats
.corrected
? -EUCLEAN
: 0;
1067 * nand_read - [MTD Interface] MTD compability function for nand_do_read_ecc
1068 * @mtd: MTD device structure
1069 * @from: offset to read from
1070 * @len: number of bytes to read
1071 * @retlen: pointer to variable to store the number of read bytes
1072 * @buf: the databuffer to put data
1074 * Get hold of the chip and call nand_do_read
1076 static int nand_read(struct mtd_info
*mtd
, loff_t from
, size_t len
,
1077 size_t *retlen
, uint8_t *buf
)
1079 struct nand_chip
*chip
= mtd
->priv
;
1082 /* Do not allow reads past end of device */
1083 if ((from
+ len
) > mtd
->size
)
1088 nand_get_device(chip
, mtd
, FL_READING
);
1090 chip
->ops
.len
= len
;
1091 chip
->ops
.datbuf
= buf
;
1092 chip
->ops
.oobbuf
= NULL
;
1094 ret
= nand_do_read_ops(mtd
, from
, &chip
->ops
);
1096 *retlen
= chip
->ops
.retlen
;
1098 nand_release_device(mtd
);
1104 * nand_read_oob_std - [REPLACABLE] the most common OOB data read function
1105 * @mtd: mtd info structure
1106 * @chip: nand chip info structure
1107 * @page: page number to read
1108 * @sndcmd: flag whether to issue read command or not
1110 static int nand_read_oob_std(struct mtd_info
*mtd
, struct nand_chip
*chip
,
1111 int page
, int sndcmd
)
1114 chip
->cmdfunc(mtd
, NAND_CMD_READOOB
, 0, page
);
1117 chip
->read_buf(mtd
, chip
->oob_poi
, mtd
->oobsize
);
1122 * nand_read_oob_syndrome - [REPLACABLE] OOB data read function for HW ECC
1124 * @mtd: mtd info structure
1125 * @chip: nand chip info structure
1126 * @page: page number to read
1127 * @sndcmd: flag whether to issue read command or not
1129 static int nand_read_oob_syndrome(struct mtd_info
*mtd
, struct nand_chip
*chip
,
1130 int page
, int sndcmd
)
1132 uint8_t *buf
= chip
->oob_poi
;
1133 int length
= mtd
->oobsize
;
1134 int chunk
= chip
->ecc
.bytes
+ chip
->ecc
.prepad
+ chip
->ecc
.postpad
;
1135 int eccsize
= chip
->ecc
.size
;
1136 uint8_t *bufpoi
= buf
;
1137 int i
, toread
, sndrnd
= 0, pos
;
1139 chip
->cmdfunc(mtd
, NAND_CMD_READ0
, chip
->ecc
.size
, page
);
1140 for (i
= 0; i
< chip
->ecc
.steps
; i
++) {
1142 pos
= eccsize
+ i
* (eccsize
+ chunk
);
1143 if (mtd
->writesize
> 512)
1144 chip
->cmdfunc(mtd
, NAND_CMD_RNDOUT
, pos
, -1);
1146 chip
->cmdfunc(mtd
, NAND_CMD_READ0
, pos
, page
);
1149 toread
= min_t(int, length
, chunk
);
1150 chip
->read_buf(mtd
, bufpoi
, toread
);
1155 chip
->read_buf(mtd
, bufpoi
, length
);
1161 * nand_write_oob_std - [REPLACABLE] the most common OOB data write function
1162 * @mtd: mtd info structure
1163 * @chip: nand chip info structure
1164 * @page: page number to write
1166 static int nand_write_oob_std(struct mtd_info
*mtd
, struct nand_chip
*chip
,
1170 const uint8_t *buf
= chip
->oob_poi
;
1171 int length
= mtd
->oobsize
;
1173 chip
->cmdfunc(mtd
, NAND_CMD_SEQIN
, mtd
->writesize
, page
);
1174 chip
->write_buf(mtd
, buf
, length
);
1175 /* Send command to program the OOB data */
1176 chip
->cmdfunc(mtd
, NAND_CMD_PAGEPROG
, -1, -1);
1178 status
= chip
->waitfunc(mtd
, chip
);
1180 return status
& NAND_STATUS_FAIL
? -EIO
: 0;
1184 * nand_write_oob_syndrome - [REPLACABLE] OOB data write function for HW ECC
1185 * with syndrome - only for large page flash !
1186 * @mtd: mtd info structure
1187 * @chip: nand chip info structure
1188 * @page: page number to write
1190 static int nand_write_oob_syndrome(struct mtd_info
*mtd
,
1191 struct nand_chip
*chip
, int page
)
1193 int chunk
= chip
->ecc
.bytes
+ chip
->ecc
.prepad
+ chip
->ecc
.postpad
;
1194 int eccsize
= chip
->ecc
.size
, length
= mtd
->oobsize
;
1195 int i
, len
, pos
, status
= 0, sndcmd
= 0, steps
= chip
->ecc
.steps
;
1196 const uint8_t *bufpoi
= chip
->oob_poi
;
1199 * data-ecc-data-ecc ... ecc-oob
1201 * data-pad-ecc-pad-data-pad .... ecc-pad-oob
1203 if (!chip
->ecc
.prepad
&& !chip
->ecc
.postpad
) {
1204 pos
= steps
* (eccsize
+ chunk
);
1209 chip
->cmdfunc(mtd
, NAND_CMD_SEQIN
, pos
, page
);
1210 for (i
= 0; i
< steps
; i
++) {
1212 if (mtd
->writesize
<= 512) {
1213 uint32_t fill
= 0xFFFFFFFF;
1217 int num
= min_t(int, len
, 4);
1218 chip
->write_buf(mtd
, (uint8_t *)&fill
,
1223 pos
= eccsize
+ i
* (eccsize
+ chunk
);
1224 chip
->cmdfunc(mtd
, NAND_CMD_RNDIN
, pos
, -1);
1228 len
= min_t(int, length
, chunk
);
1229 chip
->write_buf(mtd
, bufpoi
, len
);
1234 chip
->write_buf(mtd
, bufpoi
, length
);
1236 chip
->cmdfunc(mtd
, NAND_CMD_PAGEPROG
, -1, -1);
1237 status
= chip
->waitfunc(mtd
, chip
);
1239 return status
& NAND_STATUS_FAIL
? -EIO
: 0;
1243 * nand_do_read_oob - [Intern] NAND read out-of-band
1244 * @mtd: MTD device structure
1245 * @from: offset to read from
1246 * @ops: oob operations description structure
1248 * NAND read out-of-band data from the spare area
1250 static int nand_do_read_oob(struct mtd_info
*mtd
, loff_t from
,
1251 struct mtd_oob_ops
*ops
)
1253 int page
, realpage
, chipnr
, sndcmd
= 1;
1254 struct nand_chip
*chip
= mtd
->priv
;
1255 int blkcheck
= (1 << (chip
->phys_erase_shift
- chip
->page_shift
)) - 1;
1256 int readlen
= ops
->len
;
1257 uint8_t *buf
= ops
->oobbuf
;
1259 DEBUG(MTD_DEBUG_LEVEL3
, "nand_read_oob: from = 0x%08Lx, len = %i\n",
1260 (unsigned long long)from
, readlen
);
1262 chipnr
= (int)(from
>> chip
->chip_shift
);
1263 chip
->select_chip(mtd
, chipnr
);
1265 /* Shift to get page */
1266 realpage
= (int)(from
>> chip
->page_shift
);
1267 page
= realpage
& chip
->pagemask
;
1269 chip
->oob_poi
= chip
->buffers
.oobrbuf
;
1272 sndcmd
= chip
->ecc
.read_oob(mtd
, chip
, page
, sndcmd
);
1273 buf
= nand_transfer_oob(chip
, buf
, ops
);
1275 if (!(chip
->options
& NAND_NO_READRDY
)) {
1277 * Apply delay or wait for ready/busy pin. Do this
1278 * before the AUTOINCR check, so no problems arise if a
1279 * chip which does auto increment is marked as
1280 * NOAUTOINCR by the board driver.
1282 if (!chip
->dev_ready
)
1283 udelay(chip
->chip_delay
);
1285 nand_wait_ready(mtd
);
1288 readlen
-= ops
->ooblen
;
1292 /* Increment page address */
1295 page
= realpage
& chip
->pagemask
;
1296 /* Check, if we cross a chip boundary */
1299 chip
->select_chip(mtd
, -1);
1300 chip
->select_chip(mtd
, chipnr
);
1303 /* Check, if the chip supports auto page increment
1304 * or if we have hit a block boundary.
1306 if (!NAND_CANAUTOINCR(chip
) || !(page
& blkcheck
))
1310 ops
->retlen
= ops
->len
;
1315 * nand_read_oob - [MTD Interface] NAND read data and/or out-of-band
1316 * @mtd: MTD device structure
1317 * @from: offset to read from
1318 * @ops: oob operation description structure
1320 * NAND read data and/or out-of-band data
1322 static int nand_read_oob(struct mtd_info
*mtd
, loff_t from
,
1323 struct mtd_oob_ops
*ops
)
1325 int (*read_page
)(struct mtd_info
*mtd
, struct nand_chip
*chip
,
1326 uint8_t *buf
) = NULL
;
1327 struct nand_chip
*chip
= mtd
->priv
;
1328 int ret
= -ENOTSUPP
;
1332 /* Do not allow reads past end of device */
1333 if ((from
+ ops
->len
) > mtd
->size
) {
1334 DEBUG(MTD_DEBUG_LEVEL0
, "nand_read_oob: "
1335 "Attempt read beyond end of device\n");
1339 nand_get_device(chip
, mtd
, FL_READING
);
1347 /* Replace the read_page algorithm temporary */
1348 read_page
= chip
->ecc
.read_page
;
1349 chip
->ecc
.read_page
= nand_read_page_raw
;
1357 ret
= nand_do_read_oob(mtd
, from
, ops
);
1359 ret
= nand_do_read_ops(mtd
, from
, ops
);
1361 if (unlikely(ops
->mode
== MTD_OOB_RAW
))
1362 chip
->ecc
.read_page
= read_page
;
1364 nand_release_device(mtd
);
1370 * nand_write_page_raw - [Intern] raw page write function
1371 * @mtd: mtd info structure
1372 * @chip: nand chip info structure
1375 static void nand_write_page_raw(struct mtd_info
*mtd
, struct nand_chip
*chip
,
1378 chip
->write_buf(mtd
, buf
, mtd
->writesize
);
1379 chip
->write_buf(mtd
, chip
->oob_poi
, mtd
->oobsize
);
1383 * nand_write_page_swecc - {REPLACABLE] software ecc based page write function
1384 * @mtd: mtd info structure
1385 * @chip: nand chip info structure
1388 static void nand_write_page_swecc(struct mtd_info
*mtd
, struct nand_chip
*chip
,
1391 int i
, eccsize
= chip
->ecc
.size
;
1392 int eccbytes
= chip
->ecc
.bytes
;
1393 int eccsteps
= chip
->ecc
.steps
;
1394 uint8_t *ecc_calc
= chip
->buffers
.ecccalc
;
1395 const uint8_t *p
= buf
;
1396 int *eccpos
= chip
->ecc
.layout
->eccpos
;
1398 /* Software ecc calculation */
1399 for (i
= 0; eccsteps
; eccsteps
--, i
+= eccbytes
, p
+= eccsize
)
1400 chip
->ecc
.calculate(mtd
, p
, &ecc_calc
[i
]);
1402 for (i
= 0; i
< chip
->ecc
.total
; i
++)
1403 chip
->oob_poi
[eccpos
[i
]] = ecc_calc
[i
];
1405 nand_write_page_raw(mtd
, chip
, buf
);
1409 * nand_write_page_hwecc - {REPLACABLE] hardware ecc based page write function
1410 * @mtd: mtd info structure
1411 * @chip: nand chip info structure
1414 static void nand_write_page_hwecc(struct mtd_info
*mtd
, struct nand_chip
*chip
,
1417 int i
, eccsize
= chip
->ecc
.size
;
1418 int eccbytes
= chip
->ecc
.bytes
;
1419 int eccsteps
= chip
->ecc
.steps
;
1420 uint8_t *ecc_calc
= chip
->buffers
.ecccalc
;
1421 const uint8_t *p
= buf
;
1422 int *eccpos
= chip
->ecc
.layout
->eccpos
;
1424 for (i
= 0; eccsteps
; eccsteps
--, i
+= eccbytes
, p
+= eccsize
) {
1425 chip
->ecc
.hwctl(mtd
, NAND_ECC_WRITE
);
1426 chip
->write_buf(mtd
, p
, eccsize
);
1427 chip
->ecc
.calculate(mtd
, p
, &ecc_calc
[i
]);
1430 for (i
= 0; i
< chip
->ecc
.total
; i
++)
1431 chip
->oob_poi
[eccpos
[i
]] = ecc_calc
[i
];
1433 chip
->write_buf(mtd
, chip
->oob_poi
, mtd
->oobsize
);
1437 * nand_write_page_syndrome - {REPLACABLE] hardware ecc syndrom based page write
1438 * @mtd: mtd info structure
1439 * @chip: nand chip info structure
1442 * The hw generator calculates the error syndrome automatically. Therefor
1443 * we need a special oob layout and handling.
1445 static void nand_write_page_syndrome(struct mtd_info
*mtd
,
1446 struct nand_chip
*chip
, const uint8_t *buf
)
1448 int i
, eccsize
= chip
->ecc
.size
;
1449 int eccbytes
= chip
->ecc
.bytes
;
1450 int eccsteps
= chip
->ecc
.steps
;
1451 const uint8_t *p
= buf
;
1452 uint8_t *oob
= chip
->oob_poi
;
1454 for (i
= 0; eccsteps
; eccsteps
--, i
+= eccbytes
, p
+= eccsize
) {
1456 chip
->ecc
.hwctl(mtd
, NAND_ECC_WRITE
);
1457 chip
->write_buf(mtd
, p
, eccsize
);
1459 if (chip
->ecc
.prepad
) {
1460 chip
->write_buf(mtd
, oob
, chip
->ecc
.prepad
);
1461 oob
+= chip
->ecc
.prepad
;
1464 chip
->ecc
.calculate(mtd
, p
, oob
);
1465 chip
->write_buf(mtd
, oob
, eccbytes
);
1468 if (chip
->ecc
.postpad
) {
1469 chip
->write_buf(mtd
, oob
, chip
->ecc
.postpad
);
1470 oob
+= chip
->ecc
.postpad
;
1474 /* Calculate remaining oob bytes */
1475 i
= mtd
->oobsize
- (oob
- chip
->oob_poi
);
1477 chip
->write_buf(mtd
, oob
, i
);
1481 * nand_write_page - [INTERNAL] write one page
1482 * @mtd: MTD device structure
1483 * @chip: NAND chip descriptor
1484 * @buf: the data to write
1485 * @page: page number to write
1486 * @cached: cached programming
1488 static int nand_write_page(struct mtd_info
*mtd
, struct nand_chip
*chip
,
1489 const uint8_t *buf
, int page
, int cached
)
1493 chip
->cmdfunc(mtd
, NAND_CMD_SEQIN
, 0x00, page
);
1495 chip
->ecc
.write_page(mtd
, chip
, buf
);
1498 * Cached progamming disabled for now, Not sure if its worth the
1499 * trouble. The speed gain is not very impressive. (2.3->2.6Mib/s)
1503 if (!cached
|| !(chip
->options
& NAND_CACHEPRG
)) {
1505 chip
->cmdfunc(mtd
, NAND_CMD_PAGEPROG
, -1, -1);
1506 status
= chip
->waitfunc(mtd
, chip
);
1508 * See if operation failed and additional status checks are
1511 if ((status
& NAND_STATUS_FAIL
) && (chip
->errstat
))
1512 status
= chip
->errstat(mtd
, chip
, FL_WRITING
, status
,
1515 if (status
& NAND_STATUS_FAIL
)
1518 chip
->cmdfunc(mtd
, NAND_CMD_CACHEDPROG
, -1, -1);
1519 status
= chip
->waitfunc(mtd
, chip
);
1522 #ifdef CONFIG_MTD_NAND_VERIFY_WRITE
1523 /* Send command to read back the data */
1524 chip
->cmdfunc(mtd
, NAND_CMD_READ0
, 0, page
);
1526 if (chip
->verify_buf(mtd
, buf
, mtd
->writesize
))
1533 * nand_fill_oob - [Internal] Transfer client buffer to oob
1534 * @chip: nand chip structure
1535 * @oob: oob data buffer
1536 * @ops: oob ops structure
1538 static uint8_t *nand_fill_oob(struct nand_chip
*chip
, uint8_t *oob
,
1539 struct mtd_oob_ops
*ops
)
1541 size_t len
= ops
->ooblen
;
1547 memcpy(chip
->oob_poi
+ ops
->ooboffs
, oob
, len
);
1550 case MTD_OOB_AUTO
: {
1551 struct nand_oobfree
*free
= chip
->ecc
.layout
->oobfree
;
1552 uint32_t boffs
= 0, woffs
= ops
->ooboffs
;
1555 for(; free
->length
&& len
; free
++, len
-= bytes
) {
1556 /* Write request not from offset 0 ? */
1557 if (unlikely(woffs
)) {
1558 if (woffs
>= free
->length
) {
1559 woffs
-= free
->length
;
1562 boffs
= free
->offset
+ woffs
;
1563 bytes
= min_t(size_t, len
,
1564 (free
->length
- woffs
));
1567 bytes
= min_t(size_t, len
, free
->length
);
1568 boffs
= free
->offset
;
1570 memcpy(chip
->oob_poi
+ boffs
, oob
, bytes
);
1581 #define NOTALIGNED(x) (x & (mtd->writesize-1)) != 0
1584 * nand_do_write_ops - [Internal] NAND write with ECC
1585 * @mtd: MTD device structure
1586 * @to: offset to write to
1587 * @ops: oob operations description structure
1589 * NAND write with ECC
1591 static int nand_do_write_ops(struct mtd_info
*mtd
, loff_t to
,
1592 struct mtd_oob_ops
*ops
)
1594 int chipnr
, realpage
, page
, blockmask
;
1595 struct nand_chip
*chip
= mtd
->priv
;
1596 uint32_t writelen
= ops
->len
;
1597 uint8_t *oob
= ops
->oobbuf
;
1598 uint8_t *buf
= ops
->datbuf
;
1599 int bytes
= mtd
->writesize
;
1604 /* reject writes, which are not page aligned */
1605 if (NOTALIGNED(to
) || NOTALIGNED(ops
->len
)) {
1606 printk(KERN_NOTICE
"nand_write: "
1607 "Attempt to write not page aligned data\n");
1614 chipnr
= (int)(to
>> chip
->chip_shift
);
1615 chip
->select_chip(mtd
, chipnr
);
1617 /* Check, if it is write protected */
1618 if (nand_check_wp(mtd
))
1621 realpage
= (int)(to
>> chip
->page_shift
);
1622 page
= realpage
& chip
->pagemask
;
1623 blockmask
= (1 << (chip
->phys_erase_shift
- chip
->page_shift
)) - 1;
1625 /* Invalidate the page cache, when we write to the cached page */
1626 if (to
<= (chip
->pagebuf
<< chip
->page_shift
) &&
1627 (chip
->pagebuf
<< chip
->page_shift
) < (to
+ ops
->len
))
1630 chip
->oob_poi
= chip
->buffers
.oobwbuf
;
1633 int cached
= writelen
> bytes
&& page
!= blockmask
;
1636 oob
= nand_fill_oob(chip
, oob
, ops
);
1638 ret
= nand_write_page(mtd
, chip
, buf
, page
, cached
);
1649 page
= realpage
& chip
->pagemask
;
1650 /* Check, if we cross a chip boundary */
1653 chip
->select_chip(mtd
, -1);
1654 chip
->select_chip(mtd
, chipnr
);
1659 memset(chip
->oob_poi
, 0xff, mtd
->oobsize
);
1661 ops
->retlen
= ops
->len
- writelen
;
1666 * nand_write - [MTD Interface] NAND write with ECC
1667 * @mtd: MTD device structure
1668 * @to: offset to write to
1669 * @len: number of bytes to write
1670 * @retlen: pointer to variable to store the number of written bytes
1671 * @buf: the data to write
1673 * NAND write with ECC
1675 static int nand_write(struct mtd_info
*mtd
, loff_t to
, size_t len
,
1676 size_t *retlen
, const uint8_t *buf
)
1678 struct nand_chip
*chip
= mtd
->priv
;
1681 /* Do not allow reads past end of device */
1682 if ((to
+ len
) > mtd
->size
)
1687 nand_get_device(chip
, mtd
, FL_WRITING
);
1689 chip
->ops
.len
= len
;
1690 chip
->ops
.datbuf
= (uint8_t *)buf
;
1691 chip
->ops
.oobbuf
= NULL
;
1693 ret
= nand_do_write_ops(mtd
, to
, &chip
->ops
);
1695 *retlen
= chip
->ops
.retlen
;
1697 nand_release_device(mtd
);
1703 * nand_do_write_oob - [MTD Interface] NAND write out-of-band
1704 * @mtd: MTD device structure
1705 * @to: offset to write to
1706 * @ops: oob operation description structure
1708 * NAND write out-of-band
1710 static int nand_do_write_oob(struct mtd_info
*mtd
, loff_t to
,
1711 struct mtd_oob_ops
*ops
)
1713 int chipnr
, page
, status
;
1714 struct nand_chip
*chip
= mtd
->priv
;
1716 DEBUG(MTD_DEBUG_LEVEL3
, "nand_write_oob: to = 0x%08x, len = %i\n",
1717 (unsigned int)to
, (int)ops
->len
);
1719 /* Do not allow write past end of page */
1720 if ((ops
->ooboffs
+ ops
->len
) > mtd
->oobsize
) {
1721 DEBUG(MTD_DEBUG_LEVEL0
, "nand_write_oob: "
1722 "Attempt to write past end of page\n");
1726 chipnr
= (int)(to
>> chip
->chip_shift
);
1727 chip
->select_chip(mtd
, chipnr
);
1729 /* Shift to get page */
1730 page
= (int)(to
>> chip
->page_shift
);
1733 * Reset the chip. Some chips (like the Toshiba TC5832DC found in one
1734 * of my DiskOnChip 2000 test units) will clear the whole data page too
1735 * if we don't do this. I have no clue why, but I seem to have 'fixed'
1736 * it in the doc2000 driver in August 1999. dwmw2.
1738 chip
->cmdfunc(mtd
, NAND_CMD_RESET
, -1, -1);
1740 /* Check, if it is write protected */
1741 if (nand_check_wp(mtd
))
1744 /* Invalidate the page cache, if we write to the cached page */
1745 if (page
== chip
->pagebuf
)
1748 chip
->oob_poi
= chip
->buffers
.oobwbuf
;
1749 memset(chip
->oob_poi
, 0xff, mtd
->oobsize
);
1750 nand_fill_oob(chip
, ops
->oobbuf
, ops
);
1751 status
= chip
->ecc
.write_oob(mtd
, chip
, page
& chip
->pagemask
);
1752 memset(chip
->oob_poi
, 0xff, mtd
->oobsize
);
1757 ops
->retlen
= ops
->len
;
1763 * nand_write_oob - [MTD Interface] NAND write data and/or out-of-band
1764 * @mtd: MTD device structure
1765 * @to: offset to write to
1766 * @ops: oob operation description structure
1768 static int nand_write_oob(struct mtd_info
*mtd
, loff_t to
,
1769 struct mtd_oob_ops
*ops
)
1771 void (*write_page
)(struct mtd_info
*mtd
, struct nand_chip
*chip
,
1772 const uint8_t *buf
) = NULL
;
1773 struct nand_chip
*chip
= mtd
->priv
;
1774 int ret
= -ENOTSUPP
;
1778 /* Do not allow writes past end of device */
1779 if ((to
+ ops
->len
) > mtd
->size
) {
1780 DEBUG(MTD_DEBUG_LEVEL0
, "nand_read_oob: "
1781 "Attempt read beyond end of device\n");
1785 nand_get_device(chip
, mtd
, FL_WRITING
);
1793 /* Replace the write_page algorithm temporary */
1794 write_page
= chip
->ecc
.write_page
;
1795 chip
->ecc
.write_page
= nand_write_page_raw
;
1803 ret
= nand_do_write_oob(mtd
, to
, ops
);
1805 ret
= nand_do_write_ops(mtd
, to
, ops
);
1807 if (unlikely(ops
->mode
== MTD_OOB_RAW
))
1808 chip
->ecc
.write_page
= write_page
;
1810 nand_release_device(mtd
);
1815 * single_erease_cmd - [GENERIC] NAND standard block erase command function
1816 * @mtd: MTD device structure
1817 * @page: the page address of the block which will be erased
1819 * Standard erase command for NAND chips
1821 static void single_erase_cmd(struct mtd_info
*mtd
, int page
)
1823 struct nand_chip
*chip
= mtd
->priv
;
1824 /* Send commands to erase a block */
1825 chip
->cmdfunc(mtd
, NAND_CMD_ERASE1
, -1, page
);
1826 chip
->cmdfunc(mtd
, NAND_CMD_ERASE2
, -1, -1);
1830 * multi_erease_cmd - [GENERIC] AND specific block erase command function
1831 * @mtd: MTD device structure
1832 * @page: the page address of the block which will be erased
1834 * AND multi block erase command function
1835 * Erase 4 consecutive blocks
1837 static void multi_erase_cmd(struct mtd_info
*mtd
, int page
)
1839 struct nand_chip
*chip
= mtd
->priv
;
1840 /* Send commands to erase a block */
1841 chip
->cmdfunc(mtd
, NAND_CMD_ERASE1
, -1, page
++);
1842 chip
->cmdfunc(mtd
, NAND_CMD_ERASE1
, -1, page
++);
1843 chip
->cmdfunc(mtd
, NAND_CMD_ERASE1
, -1, page
++);
1844 chip
->cmdfunc(mtd
, NAND_CMD_ERASE1
, -1, page
);
1845 chip
->cmdfunc(mtd
, NAND_CMD_ERASE2
, -1, -1);
1849 * nand_erase - [MTD Interface] erase block(s)
1850 * @mtd: MTD device structure
1851 * @instr: erase instruction
1853 * Erase one ore more blocks
1855 static int nand_erase(struct mtd_info
*mtd
, struct erase_info
*instr
)
1857 return nand_erase_nand(mtd
, instr
, 0);
1860 #define BBT_PAGE_MASK 0xffffff3f
1862 * nand_erase_nand - [Internal] erase block(s)
1863 * @mtd: MTD device structure
1864 * @instr: erase instruction
1865 * @allowbbt: allow erasing the bbt area
1867 * Erase one ore more blocks
1869 int nand_erase_nand(struct mtd_info
*mtd
, struct erase_info
*instr
,
1872 int page
, len
, status
, pages_per_block
, ret
, chipnr
;
1873 struct nand_chip
*chip
= mtd
->priv
;
1874 int rewrite_bbt
[NAND_MAX_CHIPS
]={0};
1875 unsigned int bbt_masked_page
= 0xffffffff;
1877 DEBUG(MTD_DEBUG_LEVEL3
, "nand_erase: start = 0x%08x, len = %i\n",
1878 (unsigned int)instr
->addr
, (unsigned int)instr
->len
);
1880 /* Start address must align on block boundary */
1881 if (instr
->addr
& ((1 << chip
->phys_erase_shift
) - 1)) {
1882 DEBUG(MTD_DEBUG_LEVEL0
, "nand_erase: Unaligned address\n");
1886 /* Length must align on block boundary */
1887 if (instr
->len
& ((1 << chip
->phys_erase_shift
) - 1)) {
1888 DEBUG(MTD_DEBUG_LEVEL0
, "nand_erase: "
1889 "Length not block aligned\n");
1893 /* Do not allow erase past end of device */
1894 if ((instr
->len
+ instr
->addr
) > mtd
->size
) {
1895 DEBUG(MTD_DEBUG_LEVEL0
, "nand_erase: "
1896 "Erase past end of device\n");
1900 instr
->fail_addr
= 0xffffffff;
1902 /* Grab the lock and see if the device is available */
1903 nand_get_device(chip
, mtd
, FL_ERASING
);
1905 /* Shift to get first page */
1906 page
= (int)(instr
->addr
>> chip
->page_shift
);
1907 chipnr
= (int)(instr
->addr
>> chip
->chip_shift
);
1909 /* Calculate pages in each block */
1910 pages_per_block
= 1 << (chip
->phys_erase_shift
- chip
->page_shift
);
1912 /* Select the NAND device */
1913 chip
->select_chip(mtd
, chipnr
);
1915 /* Check, if it is write protected */
1916 if (nand_check_wp(mtd
)) {
1917 DEBUG(MTD_DEBUG_LEVEL0
, "nand_erase: "
1918 "Device is write protected!!!\n");
1919 instr
->state
= MTD_ERASE_FAILED
;
1924 * If BBT requires refresh, set the BBT page mask to see if the BBT
1925 * should be rewritten. Otherwise the mask is set to 0xffffffff which
1926 * can not be matched. This is also done when the bbt is actually
1927 * erased to avoid recusrsive updates
1929 if (chip
->options
& BBT_AUTO_REFRESH
&& !allowbbt
)
1930 bbt_masked_page
= chip
->bbt_td
->pages
[chipnr
] & BBT_PAGE_MASK
;
1932 /* Loop through the pages */
1935 instr
->state
= MTD_ERASING
;
1939 * heck if we have a bad block, we do not erase bad blocks !
1941 if (nand_block_checkbad(mtd
, ((loff_t
) page
) <<
1942 chip
->page_shift
, 0, allowbbt
)) {
1943 printk(KERN_WARNING
"nand_erase: attempt to erase a "
1944 "bad block at page 0x%08x\n", page
);
1945 instr
->state
= MTD_ERASE_FAILED
;
1950 * Invalidate the page cache, if we erase the block which
1951 * contains the current cached page
1953 if (page
<= chip
->pagebuf
&& chip
->pagebuf
<
1954 (page
+ pages_per_block
))
1957 chip
->erase_cmd(mtd
, page
& chip
->pagemask
);
1959 status
= chip
->waitfunc(mtd
, chip
);
1962 * See if operation failed and additional status checks are
1965 if ((status
& NAND_STATUS_FAIL
) && (chip
->errstat
))
1966 status
= chip
->errstat(mtd
, chip
, FL_ERASING
,
1969 /* See if block erase succeeded */
1970 if (status
& NAND_STATUS_FAIL
) {
1971 DEBUG(MTD_DEBUG_LEVEL0
, "nand_erase: "
1972 "Failed erase, page 0x%08x\n", page
);
1973 instr
->state
= MTD_ERASE_FAILED
;
1974 instr
->fail_addr
= (page
<< chip
->page_shift
);
1979 * If BBT requires refresh, set the BBT rewrite flag to the
1982 if (bbt_masked_page
!= 0xffffffff &&
1983 (page
& BBT_PAGE_MASK
) == bbt_masked_page
)
1984 rewrite_bbt
[chipnr
] = (page
<< chip
->page_shift
);
1986 /* Increment page address and decrement length */
1987 len
-= (1 << chip
->phys_erase_shift
);
1988 page
+= pages_per_block
;
1990 /* Check, if we cross a chip boundary */
1991 if (len
&& !(page
& chip
->pagemask
)) {
1993 chip
->select_chip(mtd
, -1);
1994 chip
->select_chip(mtd
, chipnr
);
1997 * If BBT requires refresh and BBT-PERCHIP, set the BBT
1998 * page mask to see if this BBT should be rewritten
2000 if (bbt_masked_page
!= 0xffffffff &&
2001 (chip
->bbt_td
->options
& NAND_BBT_PERCHIP
))
2002 bbt_masked_page
= chip
->bbt_td
->pages
[chipnr
] &
2006 instr
->state
= MTD_ERASE_DONE
;
2010 ret
= instr
->state
== MTD_ERASE_DONE
? 0 : -EIO
;
2011 /* Do call back function */
2013 mtd_erase_callback(instr
);
2015 /* Deselect and wake up anyone waiting on the device */
2016 nand_release_device(mtd
);
2019 * If BBT requires refresh and erase was successful, rewrite any
2020 * selected bad block tables
2022 if (bbt_masked_page
== 0xffffffff || ret
)
2025 for (chipnr
= 0; chipnr
< chip
->numchips
; chipnr
++) {
2026 if (!rewrite_bbt
[chipnr
])
2028 /* update the BBT for chip */
2029 DEBUG(MTD_DEBUG_LEVEL0
, "nand_erase_nand: nand_update_bbt "
2030 "(%d:0x%0x 0x%0x)\n", chipnr
, rewrite_bbt
[chipnr
],
2031 chip
->bbt_td
->pages
[chipnr
]);
2032 nand_update_bbt(mtd
, rewrite_bbt
[chipnr
]);
2035 /* Return more or less happy */
2040 * nand_sync - [MTD Interface] sync
2041 * @mtd: MTD device structure
2043 * Sync is actually a wait for chip ready function
2045 static void nand_sync(struct mtd_info
*mtd
)
2047 struct nand_chip
*chip
= mtd
->priv
;
2049 DEBUG(MTD_DEBUG_LEVEL3
, "nand_sync: called\n");
2051 /* Grab the lock and see if the device is available */
2052 nand_get_device(chip
, mtd
, FL_SYNCING
);
2053 /* Release it and go back */
2054 nand_release_device(mtd
);
2058 * nand_block_isbad - [MTD Interface] Check if block at offset is bad
2059 * @mtd: MTD device structure
2060 * @offs: offset relative to mtd start
2062 static int nand_block_isbad(struct mtd_info
*mtd
, loff_t offs
)
2064 /* Check for invalid offset */
2065 if (offs
> mtd
->size
)
2068 return nand_block_checkbad(mtd
, offs
, 1, 0);
2072 * nand_block_markbad - [MTD Interface] Mark block at the given offset as bad
2073 * @mtd: MTD device structure
2074 * @ofs: offset relative to mtd start
2076 static int nand_block_markbad(struct mtd_info
*mtd
, loff_t ofs
)
2078 struct nand_chip
*chip
= mtd
->priv
;
2081 if ((ret
= nand_block_isbad(mtd
, ofs
))) {
2082 /* If it was bad already, return success and do nothing. */
2088 return chip
->block_markbad(mtd
, ofs
);
2092 * nand_suspend - [MTD Interface] Suspend the NAND flash
2093 * @mtd: MTD device structure
2095 static int nand_suspend(struct mtd_info
*mtd
)
2097 struct nand_chip
*chip
= mtd
->priv
;
2099 return nand_get_device(chip
, mtd
, FL_PM_SUSPENDED
);
2103 * nand_resume - [MTD Interface] Resume the NAND flash
2104 * @mtd: MTD device structure
2106 static void nand_resume(struct mtd_info
*mtd
)
2108 struct nand_chip
*chip
= mtd
->priv
;
2110 if (chip
->state
== FL_PM_SUSPENDED
)
2111 nand_release_device(mtd
);
2113 printk(KERN_ERR
"nand_resume() called for a chip which is not "
2114 "in suspended state\n");
2118 * Set default functions
2120 static void nand_set_defaults(struct nand_chip
*chip
, int busw
)
2122 /* check for proper chip_delay setup, set 20us if not */
2123 if (!chip
->chip_delay
)
2124 chip
->chip_delay
= 20;
2126 /* check, if a user supplied command function given */
2127 if (chip
->cmdfunc
== NULL
)
2128 chip
->cmdfunc
= nand_command
;
2130 /* check, if a user supplied wait function given */
2131 if (chip
->waitfunc
== NULL
)
2132 chip
->waitfunc
= nand_wait
;
2134 if (!chip
->select_chip
)
2135 chip
->select_chip
= nand_select_chip
;
2136 if (!chip
->read_byte
)
2137 chip
->read_byte
= busw
? nand_read_byte16
: nand_read_byte
;
2138 if (!chip
->read_word
)
2139 chip
->read_word
= nand_read_word
;
2140 if (!chip
->block_bad
)
2141 chip
->block_bad
= nand_block_bad
;
2142 if (!chip
->block_markbad
)
2143 chip
->block_markbad
= nand_default_block_markbad
;
2144 if (!chip
->write_buf
)
2145 chip
->write_buf
= busw
? nand_write_buf16
: nand_write_buf
;
2146 if (!chip
->read_buf
)
2147 chip
->read_buf
= busw
? nand_read_buf16
: nand_read_buf
;
2148 if (!chip
->verify_buf
)
2149 chip
->verify_buf
= busw
? nand_verify_buf16
: nand_verify_buf
;
2150 if (!chip
->scan_bbt
)
2151 chip
->scan_bbt
= nand_default_bbt
;
2153 if (!chip
->controller
) {
2154 chip
->controller
= &chip
->hwcontrol
;
2155 spin_lock_init(&chip
->controller
->lock
);
2156 init_waitqueue_head(&chip
->controller
->wq
);
2162 * Get the flash and manufacturer id and lookup if the type is supported
2164 static struct nand_flash_dev
*nand_get_flash_type(struct mtd_info
*mtd
,
2165 struct nand_chip
*chip
,
2166 int busw
, int *maf_id
)
2168 struct nand_flash_dev
*type
= NULL
;
2169 int i
, dev_id
, maf_idx
;
2171 /* Select the device */
2172 chip
->select_chip(mtd
, 0);
2174 /* Send the command for reading device ID */
2175 chip
->cmdfunc(mtd
, NAND_CMD_READID
, 0x00, -1);
2177 /* Read manufacturer and device IDs */
2178 *maf_id
= chip
->read_byte(mtd
);
2179 dev_id
= chip
->read_byte(mtd
);
2181 /* Lookup the flash id */
2182 for (i
= 0; nand_flash_ids
[i
].name
!= NULL
; i
++) {
2183 if (dev_id
== nand_flash_ids
[i
].id
) {
2184 type
= &nand_flash_ids
[i
];
2190 return ERR_PTR(-ENODEV
);
2193 mtd
->name
= type
->name
;
2195 chip
->chipsize
= type
->chipsize
<< 20;
2197 /* Newer devices have all the information in additional id bytes */
2198 if (!type
->pagesize
) {
2200 /* The 3rd id byte contains non relevant data ATM */
2201 extid
= chip
->read_byte(mtd
);
2202 /* The 4th id byte is the important one */
2203 extid
= chip
->read_byte(mtd
);
2205 mtd
->writesize
= 1024 << (extid
& 0x3);
2208 mtd
->oobsize
= (8 << (extid
& 0x01)) * (mtd
->writesize
>> 9);
2210 /* Calc blocksize. Blocksize is multiples of 64KiB */
2211 mtd
->erasesize
= (64 * 1024) << (extid
& 0x03);
2213 /* Get buswidth information */
2214 busw
= (extid
& 0x01) ? NAND_BUSWIDTH_16
: 0;
2218 * Old devices have chip data hardcoded in the device id table
2220 mtd
->erasesize
= type
->erasesize
;
2221 mtd
->writesize
= type
->pagesize
;
2222 mtd
->oobsize
= mtd
->writesize
/ 32;
2223 busw
= type
->options
& NAND_BUSWIDTH_16
;
2226 /* Try to identify manufacturer */
2227 for (maf_idx
= 0; nand_manuf_ids
[maf_idx
].id
!= 0x0; maf_idx
++) {
2228 if (nand_manuf_ids
[maf_idx
].id
== *maf_id
)
2233 * Check, if buswidth is correct. Hardware drivers should set
2236 if (busw
!= (chip
->options
& NAND_BUSWIDTH_16
)) {
2237 printk(KERN_INFO
"NAND device: Manufacturer ID:"
2238 " 0x%02x, Chip ID: 0x%02x (%s %s)\n", *maf_id
,
2239 dev_id
, nand_manuf_ids
[maf_idx
].name
, mtd
->name
);
2240 printk(KERN_WARNING
"NAND bus width %d instead %d bit\n",
2241 (chip
->options
& NAND_BUSWIDTH_16
) ? 16 : 8,
2243 return ERR_PTR(-EINVAL
);
2246 /* Calculate the address shift from the page size */
2247 chip
->page_shift
= ffs(mtd
->writesize
) - 1;
2248 /* Convert chipsize to number of pages per chip -1. */
2249 chip
->pagemask
= (chip
->chipsize
>> chip
->page_shift
) - 1;
2251 chip
->bbt_erase_shift
= chip
->phys_erase_shift
=
2252 ffs(mtd
->erasesize
) - 1;
2253 chip
->chip_shift
= ffs(chip
->chipsize
) - 1;
2255 /* Set the bad block position */
2256 chip
->badblockpos
= mtd
->writesize
> 512 ?
2257 NAND_LARGE_BADBLOCK_POS
: NAND_SMALL_BADBLOCK_POS
;
2259 /* Get chip options, preserve non chip based options */
2260 chip
->options
&= ~NAND_CHIPOPTIONS_MSK
;
2261 chip
->options
|= type
->options
& NAND_CHIPOPTIONS_MSK
;
2264 * Set chip as a default. Board drivers can override it, if necessary
2266 chip
->options
|= NAND_NO_AUTOINCR
;
2268 /* Check if chip is a not a samsung device. Do not clear the
2269 * options for chips which are not having an extended id.
2271 if (*maf_id
!= NAND_MFR_SAMSUNG
&& !type
->pagesize
)
2272 chip
->options
&= ~NAND_SAMSUNG_LP_OPTIONS
;
2274 /* Check for AND chips with 4 page planes */
2275 if (chip
->options
& NAND_4PAGE_ARRAY
)
2276 chip
->erase_cmd
= multi_erase_cmd
;
2278 chip
->erase_cmd
= single_erase_cmd
;
2280 /* Do not replace user supplied command function ! */
2281 if (mtd
->writesize
> 512 && chip
->cmdfunc
== nand_command
)
2282 chip
->cmdfunc
= nand_command_lp
;
2284 printk(KERN_INFO
"NAND device: Manufacturer ID:"
2285 " 0x%02x, Chip ID: 0x%02x (%s %s)\n", *maf_id
, dev_id
,
2286 nand_manuf_ids
[maf_idx
].name
, type
->name
);
2291 /* module_text_address() isn't exported, and it's mostly a pointless
2292 test if this is a module _anyway_ -- they'd have to try _really_ hard
2293 to call us from in-kernel code if the core NAND support is modular. */
2295 #define caller_is_module() (1)
2297 #define caller_is_module() \
2298 module_text_address((unsigned long)__builtin_return_address(0))
2302 * nand_scan - [NAND Interface] Scan for the NAND device
2303 * @mtd: MTD device structure
2304 * @maxchips: Number of chips to scan for
2306 * This fills out all the uninitialized function pointers
2307 * with the defaults.
2308 * The flash ID is read and the mtd/chip structures are
2309 * filled with the appropriate values.
2310 * The mtd->owner field must be set to the module of the caller
2313 int nand_scan(struct mtd_info
*mtd
, int maxchips
)
2315 int i
, busw
, nand_maf_id
;
2316 struct nand_chip
*chip
= mtd
->priv
;
2317 struct nand_flash_dev
*type
;
2319 /* Many callers got this wrong, so check for it for a while... */
2320 if (!mtd
->owner
&& caller_is_module()) {
2321 printk(KERN_CRIT
"nand_scan() called with NULL mtd->owner!\n");
2325 /* Get buswidth to select the correct functions */
2326 busw
= chip
->options
& NAND_BUSWIDTH_16
;
2327 /* Set the default functions */
2328 nand_set_defaults(chip
, busw
);
2330 /* Read the flash type */
2331 type
= nand_get_flash_type(mtd
, chip
, busw
, &nand_maf_id
);
2334 printk(KERN_WARNING
"No NAND device found!!!\n");
2335 chip
->select_chip(mtd
, -1);
2336 return PTR_ERR(type
);
2339 /* Check for a chip array */
2340 for (i
= 1; i
< maxchips
; i
++) {
2341 chip
->select_chip(mtd
, i
);
2342 /* Send the command for reading device ID */
2343 chip
->cmdfunc(mtd
, NAND_CMD_READID
, 0x00, -1);
2344 /* Read manufacturer and device IDs */
2345 if (nand_maf_id
!= chip
->read_byte(mtd
) ||
2346 type
->id
!= chip
->read_byte(mtd
))
2350 printk(KERN_INFO
"%d NAND chips detected\n", i
);
2352 /* Store the number of chips and calc total size for mtd */
2354 mtd
->size
= i
* chip
->chipsize
;
2356 /* Preset the internal oob write buffer */
2357 memset(chip
->buffers
.oobwbuf
, 0xff, mtd
->oobsize
);
2360 * If no default placement scheme is given, select an appropriate one
2362 if (!chip
->ecc
.layout
) {
2363 switch (mtd
->oobsize
) {
2365 chip
->ecc
.layout
= &nand_oob_8
;
2368 chip
->ecc
.layout
= &nand_oob_16
;
2371 chip
->ecc
.layout
= &nand_oob_64
;
2374 printk(KERN_WARNING
"No oob scheme defined for "
2375 "oobsize %d\n", mtd
->oobsize
);
2381 * check ECC mode, default to software if 3byte/512byte hardware ECC is
2382 * selected and we have 256 byte pagesize fallback to software ECC
2384 switch (chip
->ecc
.mode
) {
2386 /* Use standard hwecc read page function ? */
2387 if (!chip
->ecc
.read_page
)
2388 chip
->ecc
.read_page
= nand_read_page_hwecc
;
2389 if (!chip
->ecc
.write_page
)
2390 chip
->ecc
.write_page
= nand_write_page_hwecc
;
2391 if (!chip
->ecc
.read_oob
)
2392 chip
->ecc
.read_oob
= nand_read_oob_std
;
2393 if (!chip
->ecc
.write_oob
)
2394 chip
->ecc
.write_oob
= nand_write_oob_std
;
2396 case NAND_ECC_HW_SYNDROME
:
2397 if (!chip
->ecc
.calculate
|| !chip
->ecc
.correct
||
2399 printk(KERN_WARNING
"No ECC functions supplied, "
2400 "Hardware ECC not possible\n");
2403 /* Use standard syndrome read/write page function ? */
2404 if (!chip
->ecc
.read_page
)
2405 chip
->ecc
.read_page
= nand_read_page_syndrome
;
2406 if (!chip
->ecc
.write_page
)
2407 chip
->ecc
.write_page
= nand_write_page_syndrome
;
2408 if (!chip
->ecc
.read_oob
)
2409 chip
->ecc
.read_oob
= nand_read_oob_syndrome
;
2410 if (!chip
->ecc
.write_oob
)
2411 chip
->ecc
.write_oob
= nand_write_oob_syndrome
;
2413 if (mtd
->writesize
>= chip
->ecc
.size
)
2415 printk(KERN_WARNING
"%d byte HW ECC not possible on "
2416 "%d byte page size, fallback to SW ECC\n",
2417 chip
->ecc
.size
, mtd
->writesize
);
2418 chip
->ecc
.mode
= NAND_ECC_SOFT
;
2421 chip
->ecc
.calculate
= nand_calculate_ecc
;
2422 chip
->ecc
.correct
= nand_correct_data
;
2423 chip
->ecc
.read_page
= nand_read_page_swecc
;
2424 chip
->ecc
.write_page
= nand_write_page_swecc
;
2425 chip
->ecc
.read_oob
= nand_read_oob_std
;
2426 chip
->ecc
.write_oob
= nand_write_oob_std
;
2427 chip
->ecc
.size
= 256;
2428 chip
->ecc
.bytes
= 3;
2432 printk(KERN_WARNING
"NAND_ECC_NONE selected by board driver. "
2433 "This is not recommended !!\n");
2434 chip
->ecc
.read_page
= nand_read_page_raw
;
2435 chip
->ecc
.write_page
= nand_write_page_raw
;
2436 chip
->ecc
.read_oob
= nand_read_oob_std
;
2437 chip
->ecc
.write_oob
= nand_write_oob_std
;
2438 chip
->ecc
.size
= mtd
->writesize
;
2439 chip
->ecc
.bytes
= 0;
2442 printk(KERN_WARNING
"Invalid NAND_ECC_MODE %d\n",
2448 * The number of bytes available for a client to place data into
2449 * the out of band area
2451 chip
->ecc
.layout
->oobavail
= 0;
2452 for (i
= 0; chip
->ecc
.layout
->oobfree
[i
].length
; i
++)
2453 chip
->ecc
.layout
->oobavail
+=
2454 chip
->ecc
.layout
->oobfree
[i
].length
;
2457 * Set the number of read / write steps for one page depending on ECC
2460 chip
->ecc
.steps
= mtd
->writesize
/ chip
->ecc
.size
;
2461 if(chip
->ecc
.steps
* chip
->ecc
.size
!= mtd
->writesize
) {
2462 printk(KERN_WARNING
"Invalid ecc parameters\n");
2465 chip
->ecc
.total
= chip
->ecc
.steps
* chip
->ecc
.bytes
;
2467 /* Initialize state */
2468 chip
->state
= FL_READY
;
2470 /* De-select the device */
2471 chip
->select_chip(mtd
, -1);
2473 /* Invalidate the pagebuffer reference */
2476 /* Fill in remaining MTD driver data */
2477 mtd
->type
= MTD_NANDFLASH
;
2478 mtd
->flags
= MTD_CAP_NANDFLASH
;
2479 mtd
->ecctype
= MTD_ECC_SW
;
2480 mtd
->erase
= nand_erase
;
2482 mtd
->unpoint
= NULL
;
2483 mtd
->read
= nand_read
;
2484 mtd
->write
= nand_write
;
2485 mtd
->read_oob
= nand_read_oob
;
2486 mtd
->write_oob
= nand_write_oob
;
2487 mtd
->sync
= nand_sync
;
2490 mtd
->suspend
= nand_suspend
;
2491 mtd
->resume
= nand_resume
;
2492 mtd
->block_isbad
= nand_block_isbad
;
2493 mtd
->block_markbad
= nand_block_markbad
;
2495 /* propagate ecc.layout to mtd_info */
2496 mtd
->ecclayout
= chip
->ecc
.layout
;
2498 /* Check, if we should skip the bad block table scan */
2499 if (chip
->options
& NAND_SKIP_BBTSCAN
)
2502 /* Build bad block table */
2503 return chip
->scan_bbt(mtd
);
2507 * nand_release - [NAND Interface] Free resources held by the NAND device
2508 * @mtd: MTD device structure
2510 void nand_release(struct mtd_info
*mtd
)
2512 struct nand_chip
*chip
= mtd
->priv
;
2514 #ifdef CONFIG_MTD_PARTITIONS
2515 /* Deregister partitions */
2516 del_mtd_partitions(mtd
);
2518 /* Deregister the device */
2519 del_mtd_device(mtd
);
2521 /* Free bad block table memory */
2525 EXPORT_SYMBOL_GPL(nand_scan
);
2526 EXPORT_SYMBOL_GPL(nand_release
);
2528 static int __init
nand_base_init(void)
2530 led_trigger_register_simple("nand-disk", &nand_led_trigger
);
2534 static void __exit
nand_base_exit(void)
2536 led_trigger_unregister_simple(nand_led_trigger
);
2539 module_init(nand_base_init
);
2540 module_exit(nand_base_exit
);
2542 MODULE_LICENSE("GPL");
2543 MODULE_AUTHOR("Steven J. Hill <sjhill@realitydiluted.com>, Thomas Gleixner <tglx@linutronix.de>");
2544 MODULE_DESCRIPTION("Generic NAND flash driver code");