drivers/mtd/nand/r852.h

   1 /*
   2  * Copyright © 2009 - Maxim Levitsky
   3  * driver for Ricoh xD readers
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License version 2 as
   7  * published by the Free Software Foundation.
   8  */
   9
  10 #include <linux/pci.h>
  11 #include <linux/completion.h>
  12 #include <linux/workqueue.h>
  13 #include <linux/mtd/nand.h>
  14 #include <linux/spinlock.h>
  15
  16
  17 /* nand interface + ecc
  18    byte write/read does one cycle on nand data lines.
  19    dword write/read does 4 cycles
  20    if R852_CTL_ECC_ACCESS is set in R852_CTL, then dword read reads
  21    results of ecc correction, if DMA read was done before.
  22    If write was done two dword reads read generated ecc checksums
  23 */
  24 #define R852_DATALINE           0x00
  25
  26 /* control register */
  27 #define R852_CTL                0x04
  28 #define R852_CTL_COMMAND        0x01    /* send command (#CLE)*/
  29 #define R852_CTL_DATA           0x02    /* read/write data (#ALE)*/
  30 #define R852_CTL_ON             0x04    /* only seem to controls the hd led, */
  31                                         /* but has to be set on start...*/
  32 #define R852_CTL_RESET          0x08    /* unknown, set only on start once*/
  33 #define R852_CTL_CARDENABLE     0x10    /* probably (#CE) - always set*/
  34 #define R852_CTL_ECC_ENABLE     0x20    /* enable ecc engine */
  35 #define R852_CTL_ECC_ACCESS     0x40    /* read/write ecc via reg #0*/
  36 #define R852_CTL_WRITE          0x80    /* set when performing writes (#WP) */
  37
  38 /* card detection status */
  39 #define R852_CARD_STA           0x05
  40
  41 #define R852_CARD_STA_CD        0x01    /* state of #CD line, same as 0x04 */
  42 #define R852_CARD_STA_RO        0x02    /* card is readonly */
  43 #define R852_CARD_STA_PRESENT   0x04    /* card is present (#CD) */
  44 #define R852_CARD_STA_ABSENT    0x08    /* card is absent */
  45 #define R852_CARD_STA_BUSY      0x80    /* card is busy - (#R/B) */
  46
  47 /* card detection irq status & enable*/
  48 #define R852_CARD_IRQ_STA       0x06    /* IRQ status */
  49 #define R852_CARD_IRQ_ENABLE    0x07    /* IRQ enable */
  50
  51 #define R852_CARD_IRQ_CD        0x01    /* fire when #CD lights, same as 0x04*/
  52 #define R852_CARD_IRQ_REMOVE    0x04    /* detect card removal */
  53 #define R852_CARD_IRQ_INSERT    0x08    /* detect card insert */
  54 #define R852_CARD_IRQ_UNK1      0x10    /* unknown */
  55 #define R852_CARD_IRQ_GENABLE   0x80    /* general enable */
  56 #define R852_CARD_IRQ_MASK      0x1D
  57
  58
  59
  60 /* hardware enable */
  61 #define R852_HW                 0x08
  62 #define R852_HW_ENABLED         0x01    /* hw enabled */
  63 #define R852_HW_UNKNOWN         0x80
  64
  65
  66 /* dma capabilities */
  67 #define R852_DMA_CAP            0x09
  68 #define R852_SMBIT              0x20    /* if set with bit #6 or bit #7, then */
  69                                         /* hw is smartmedia */
  70 #define R852_DMA1               0x40    /* if set w/bit #7, dma is supported */
  71 #define R852_DMA2               0x80    /* if set w/bit #6, dma is supported */
  72
  73
  74 /* physical DMA address - 32 bit value*/
  75 #define R852_DMA_ADDR           0x0C
  76
  77
  78 /* dma settings */
  79 #define R852_DMA_SETTINGS       0x10
  80 #define R852_DMA_MEMORY         0x01    /* (memory <-> internal hw buffer) */
  81 #define R852_DMA_READ           0x02    /* 0 = write, 1 = read */
  82 #define R852_DMA_INTERNAL       0x04    /* (internal hw buffer <-> card) */
  83
  84 /* dma IRQ status */
  85 #define R852_DMA_IRQ_STA                0x14
  86
  87 /* dma IRQ enable */
  88 #define R852_DMA_IRQ_ENABLE     0x18
  89
  90 #define R852_DMA_IRQ_MEMORY     0x01    /* (memory <-> internal hw buffer) */
  91 #define R852_DMA_IRQ_ERROR      0x02    /* error did happen */
  92 #define R852_DMA_IRQ_INTERNAL   0x04    /* (internal hw buffer <-> card) */
  93 #define R852_DMA_IRQ_MASK       0x07    /* mask of all IRQ bits */
  94
  95
  96 /* ECC syndrome format - read from reg #0 will return two copies of these for
  97    each half of the page.
  98    first byte is error byte location, and second, bit location + flags */
  99 #define R852_ECC_ERR_BIT_MSK    0x07    /* error bit location */
 100 #define R852_ECC_CORRECT                0x10    /* no errors - (guessed) */
 101 #define R852_ECC_CORRECTABLE    0x20    /* correctable error exist */
 102 #define R852_ECC_FAIL           0x40    /* non correctable error detected */
 103
 104 #define R852_DMA_LEN            512
 105
 106 #define DMA_INTERNAL    0
 107 #define DMA_MEMORY      1
 108
 109 struct r852_device {
 110         void __iomem *mmio;             /* mmio */
 111         struct nand_chip *chip;         /* nand chip backpointer */
 112         struct pci_dev *pci_dev;        /* pci backpointer */
 113
 114         /* dma area */
 115         dma_addr_t phys_dma_addr;       /* bus address of buffer*/
 116         struct completion dma_done;     /* data transfer done */
 117
 118         dma_addr_t phys_bounce_buffer;  /* bus address of bounce buffer */
 119         uint8_t *bounce_buffer;         /* virtual address of bounce buffer */
 120
 121         int dma_dir;                    /* 1 = read, 0 = write */
 122         int dma_stage;                  /* 0 - idle, 1 - first step,
 123                                            2 - second step */
 124
 125         int dma_state;                  /* 0 = internal, 1 = memory */
 126         int dma_error;                  /* dma errors */
 127         int dma_usable;                 /* is it possible to use dma */
 128
 129         /* card status area */
 130         struct delayed_work card_detect_work;
 131         struct workqueue_struct *card_workqueue;
 132         int card_registred;             /* card registered with mtd */
 133         int card_detected;              /* card detected in slot */
 134         int card_unstable;              /* whenever the card is inserted,
 135                                            is not known yet */
 136         int readonly;                   /* card is readonly */
 137         int sm;                         /* Is card smartmedia */
 138
 139         /* interrupt handling */
 140         spinlock_t irqlock;             /* IRQ protecting lock */
 141         int irq;                        /* irq num */
 142         /* misc */
 143         void *tmp_buffer;               /* temporary buffer */
 144         uint8_t ctlreg;                 /* cached contents of control reg */
 145 };
 146
 147 #define DRV_NAME "r852"
 148
 149
 150 #define dbg(format, ...) \
 151         if (debug) \
 152                 printk(KERN_DEBUG DRV_NAME ": " format "\n", ## __VA_ARGS__)
 153
 154 #define dbg_verbose(format, ...) \
 155         if (debug > 1) \
 156                 printk(KERN_DEBUG DRV_NAME ": " format "\n", ## __VA_ARGS__)
 157
 158
 159 #define message(format, ...) \
 160         printk(KERN_INFO DRV_NAME ": " format "\n", ## __VA_ARGS__)