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[mirror_ubuntu-zesty-kernel.git] / drivers / net / benet / be_main.c
1 /*
2 * Copyright (C) 2005 - 2009 ServerEngines
3 * All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License version 2
7 * as published by the Free Software Foundation. The full GNU General
8 * Public License is included in this distribution in the file called COPYING.
9 *
10 * Contact Information:
11 * linux-drivers@serverengines.com
12 *
13 * ServerEngines
14 * 209 N. Fair Oaks Ave
15 * Sunnyvale, CA 94085
16 */
17
18 #include "be.h"
19 #include "be_cmds.h"
20 #include <asm/div64.h>
21
22 MODULE_VERSION(DRV_VER);
23 MODULE_DEVICE_TABLE(pci, be_dev_ids);
24 MODULE_DESCRIPTION(DRV_DESC " " DRV_VER);
25 MODULE_AUTHOR("ServerEngines Corporation");
26 MODULE_LICENSE("GPL");
27
28 static unsigned int rx_frag_size = 2048;
29 module_param(rx_frag_size, uint, S_IRUGO);
30 MODULE_PARM_DESC(rx_frag_size, "Size of a fragment that holds rcvd data.");
31
32 static DEFINE_PCI_DEVICE_TABLE(be_dev_ids) = {
33 { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID1) },
34 { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID2) },
35 { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID1) },
36 { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID2) },
37 { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID3) },
38 { 0 }
39 };
40 MODULE_DEVICE_TABLE(pci, be_dev_ids);
41
42 static void be_queue_free(struct be_adapter *adapter, struct be_queue_info *q)
43 {
44 struct be_dma_mem *mem = &q->dma_mem;
45 if (mem->va)
46 pci_free_consistent(adapter->pdev, mem->size,
47 mem->va, mem->dma);
48 }
49
50 static int be_queue_alloc(struct be_adapter *adapter, struct be_queue_info *q,
51 u16 len, u16 entry_size)
52 {
53 struct be_dma_mem *mem = &q->dma_mem;
54
55 memset(q, 0, sizeof(*q));
56 q->len = len;
57 q->entry_size = entry_size;
58 mem->size = len * entry_size;
59 mem->va = pci_alloc_consistent(adapter->pdev, mem->size, &mem->dma);
60 if (!mem->va)
61 return -1;
62 memset(mem->va, 0, mem->size);
63 return 0;
64 }
65
66 static void be_intr_set(struct be_adapter *adapter, bool enable)
67 {
68 u8 __iomem *addr = adapter->pcicfg + PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET;
69 u32 reg = ioread32(addr);
70 u32 enabled = reg & MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
71
72 if (!enabled && enable)
73 reg |= MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
74 else if (enabled && !enable)
75 reg &= ~MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
76 else
77 return;
78
79 iowrite32(reg, addr);
80 }
81
82 static void be_rxq_notify(struct be_adapter *adapter, u16 qid, u16 posted)
83 {
84 u32 val = 0;
85 val |= qid & DB_RQ_RING_ID_MASK;
86 val |= posted << DB_RQ_NUM_POSTED_SHIFT;
87 iowrite32(val, adapter->db + DB_RQ_OFFSET);
88 }
89
90 static void be_txq_notify(struct be_adapter *adapter, u16 qid, u16 posted)
91 {
92 u32 val = 0;
93 val |= qid & DB_TXULP_RING_ID_MASK;
94 val |= (posted & DB_TXULP_NUM_POSTED_MASK) << DB_TXULP_NUM_POSTED_SHIFT;
95 iowrite32(val, adapter->db + DB_TXULP1_OFFSET);
96 }
97
98 static void be_eq_notify(struct be_adapter *adapter, u16 qid,
99 bool arm, bool clear_int, u16 num_popped)
100 {
101 u32 val = 0;
102 val |= qid & DB_EQ_RING_ID_MASK;
103 if (arm)
104 val |= 1 << DB_EQ_REARM_SHIFT;
105 if (clear_int)
106 val |= 1 << DB_EQ_CLR_SHIFT;
107 val |= 1 << DB_EQ_EVNT_SHIFT;
108 val |= num_popped << DB_EQ_NUM_POPPED_SHIFT;
109 iowrite32(val, adapter->db + DB_EQ_OFFSET);
110 }
111
112 void be_cq_notify(struct be_adapter *adapter, u16 qid, bool arm, u16 num_popped)
113 {
114 u32 val = 0;
115 val |= qid & DB_CQ_RING_ID_MASK;
116 if (arm)
117 val |= 1 << DB_CQ_REARM_SHIFT;
118 val |= num_popped << DB_CQ_NUM_POPPED_SHIFT;
119 iowrite32(val, adapter->db + DB_CQ_OFFSET);
120 }
121
122 static int be_mac_addr_set(struct net_device *netdev, void *p)
123 {
124 struct be_adapter *adapter = netdev_priv(netdev);
125 struct sockaddr *addr = p;
126 int status = 0;
127
128 if (!is_valid_ether_addr(addr->sa_data))
129 return -EADDRNOTAVAIL;
130
131 status = be_cmd_pmac_del(adapter, adapter->if_handle, adapter->pmac_id);
132 if (status)
133 return status;
134
135 status = be_cmd_pmac_add(adapter, (u8 *)addr->sa_data,
136 adapter->if_handle, &adapter->pmac_id);
137 if (!status)
138 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
139
140 return status;
141 }
142
143 void netdev_stats_update(struct be_adapter *adapter)
144 {
145 struct be_hw_stats *hw_stats = hw_stats_from_cmd(adapter->stats.cmd.va);
146 struct be_rxf_stats *rxf_stats = &hw_stats->rxf;
147 struct be_port_rxf_stats *port_stats =
148 &rxf_stats->port[adapter->port_num];
149 struct net_device_stats *dev_stats = &adapter->netdev->stats;
150 struct be_erx_stats *erx_stats = &hw_stats->erx;
151
152 dev_stats->rx_packets = port_stats->rx_total_frames;
153 dev_stats->tx_packets = port_stats->tx_unicastframes +
154 port_stats->tx_multicastframes + port_stats->tx_broadcastframes;
155 dev_stats->rx_bytes = (u64) port_stats->rx_bytes_msd << 32 |
156 (u64) port_stats->rx_bytes_lsd;
157 dev_stats->tx_bytes = (u64) port_stats->tx_bytes_msd << 32 |
158 (u64) port_stats->tx_bytes_lsd;
159
160 /* bad pkts received */
161 dev_stats->rx_errors = port_stats->rx_crc_errors +
162 port_stats->rx_alignment_symbol_errors +
163 port_stats->rx_in_range_errors +
164 port_stats->rx_out_range_errors +
165 port_stats->rx_frame_too_long +
166 port_stats->rx_dropped_too_small +
167 port_stats->rx_dropped_too_short +
168 port_stats->rx_dropped_header_too_small +
169 port_stats->rx_dropped_tcp_length +
170 port_stats->rx_dropped_runt +
171 port_stats->rx_tcp_checksum_errs +
172 port_stats->rx_ip_checksum_errs +
173 port_stats->rx_udp_checksum_errs;
174
175 /* no space in linux buffers: best possible approximation */
176 dev_stats->rx_dropped =
177 erx_stats->rx_drops_no_fragments[adapter->rx_obj.q.id];
178
179 /* detailed rx errors */
180 dev_stats->rx_length_errors = port_stats->rx_in_range_errors +
181 port_stats->rx_out_range_errors +
182 port_stats->rx_frame_too_long;
183
184 /* receive ring buffer overflow */
185 dev_stats->rx_over_errors = 0;
186
187 dev_stats->rx_crc_errors = port_stats->rx_crc_errors;
188
189 /* frame alignment errors */
190 dev_stats->rx_frame_errors = port_stats->rx_alignment_symbol_errors;
191
192 /* receiver fifo overrun */
193 /* drops_no_pbuf is no per i/f, it's per BE card */
194 dev_stats->rx_fifo_errors = port_stats->rx_fifo_overflow +
195 port_stats->rx_input_fifo_overflow +
196 rxf_stats->rx_drops_no_pbuf;
197 /* receiver missed packetd */
198 dev_stats->rx_missed_errors = 0;
199
200 /* packet transmit problems */
201 dev_stats->tx_errors = 0;
202
203 /* no space available in linux */
204 dev_stats->tx_dropped = 0;
205
206 dev_stats->multicast = port_stats->rx_multicast_frames;
207 dev_stats->collisions = 0;
208
209 /* detailed tx_errors */
210 dev_stats->tx_aborted_errors = 0;
211 dev_stats->tx_carrier_errors = 0;
212 dev_stats->tx_fifo_errors = 0;
213 dev_stats->tx_heartbeat_errors = 0;
214 dev_stats->tx_window_errors = 0;
215 }
216
217 void be_link_status_update(struct be_adapter *adapter, bool link_up)
218 {
219 struct net_device *netdev = adapter->netdev;
220
221 /* If link came up or went down */
222 if (adapter->link_up != link_up) {
223 adapter->link_speed = -1;
224 if (link_up) {
225 netif_start_queue(netdev);
226 netif_carrier_on(netdev);
227 printk(KERN_INFO "%s: Link up\n", netdev->name);
228 } else {
229 netif_stop_queue(netdev);
230 netif_carrier_off(netdev);
231 printk(KERN_INFO "%s: Link down\n", netdev->name);
232 }
233 adapter->link_up = link_up;
234 }
235 }
236
237 /* Update the EQ delay n BE based on the RX frags consumed / sec */
238 static void be_rx_eqd_update(struct be_adapter *adapter)
239 {
240 struct be_eq_obj *rx_eq = &adapter->rx_eq;
241 struct be_drvr_stats *stats = &adapter->stats.drvr_stats;
242 ulong now = jiffies;
243 u32 eqd;
244
245 if (!rx_eq->enable_aic)
246 return;
247
248 /* Wrapped around */
249 if (time_before(now, stats->rx_fps_jiffies)) {
250 stats->rx_fps_jiffies = now;
251 return;
252 }
253
254 /* Update once a second */
255 if ((now - stats->rx_fps_jiffies) < HZ)
256 return;
257
258 stats->be_rx_fps = (stats->be_rx_frags - stats->be_prev_rx_frags) /
259 ((now - stats->rx_fps_jiffies) / HZ);
260
261 stats->rx_fps_jiffies = now;
262 stats->be_prev_rx_frags = stats->be_rx_frags;
263 eqd = stats->be_rx_fps / 110000;
264 eqd = eqd << 3;
265 if (eqd > rx_eq->max_eqd)
266 eqd = rx_eq->max_eqd;
267 if (eqd < rx_eq->min_eqd)
268 eqd = rx_eq->min_eqd;
269 if (eqd < 10)
270 eqd = 0;
271 if (eqd != rx_eq->cur_eqd)
272 be_cmd_modify_eqd(adapter, rx_eq->q.id, eqd);
273
274 rx_eq->cur_eqd = eqd;
275 }
276
277 static struct net_device_stats *be_get_stats(struct net_device *dev)
278 {
279 return &dev->stats;
280 }
281
282 static u32 be_calc_rate(u64 bytes, unsigned long ticks)
283 {
284 u64 rate = bytes;
285
286 do_div(rate, ticks / HZ);
287 rate <<= 3; /* bytes/sec -> bits/sec */
288 do_div(rate, 1000000ul); /* MB/Sec */
289
290 return rate;
291 }
292
293 static void be_tx_rate_update(struct be_adapter *adapter)
294 {
295 struct be_drvr_stats *stats = drvr_stats(adapter);
296 ulong now = jiffies;
297
298 /* Wrapped around? */
299 if (time_before(now, stats->be_tx_jiffies)) {
300 stats->be_tx_jiffies = now;
301 return;
302 }
303
304 /* Update tx rate once in two seconds */
305 if ((now - stats->be_tx_jiffies) > 2 * HZ) {
306 stats->be_tx_rate = be_calc_rate(stats->be_tx_bytes
307 - stats->be_tx_bytes_prev,
308 now - stats->be_tx_jiffies);
309 stats->be_tx_jiffies = now;
310 stats->be_tx_bytes_prev = stats->be_tx_bytes;
311 }
312 }
313
314 static void be_tx_stats_update(struct be_adapter *adapter,
315 u32 wrb_cnt, u32 copied, bool stopped)
316 {
317 struct be_drvr_stats *stats = drvr_stats(adapter);
318 stats->be_tx_reqs++;
319 stats->be_tx_wrbs += wrb_cnt;
320 stats->be_tx_bytes += copied;
321 if (stopped)
322 stats->be_tx_stops++;
323 }
324
325 /* Determine number of WRB entries needed to xmit data in an skb */
326 static u32 wrb_cnt_for_skb(struct sk_buff *skb, bool *dummy)
327 {
328 int cnt = (skb->len > skb->data_len);
329
330 cnt += skb_shinfo(skb)->nr_frags;
331
332 /* to account for hdr wrb */
333 cnt++;
334 if (cnt & 1) {
335 /* add a dummy to make it an even num */
336 cnt++;
337 *dummy = true;
338 } else
339 *dummy = false;
340 BUG_ON(cnt > BE_MAX_TX_FRAG_COUNT);
341 return cnt;
342 }
343
344 static inline void wrb_fill(struct be_eth_wrb *wrb, u64 addr, int len)
345 {
346 wrb->frag_pa_hi = upper_32_bits(addr);
347 wrb->frag_pa_lo = addr & 0xFFFFFFFF;
348 wrb->frag_len = len & ETH_WRB_FRAG_LEN_MASK;
349 }
350
351 static void wrb_fill_hdr(struct be_eth_hdr_wrb *hdr, struct sk_buff *skb,
352 bool vlan, u32 wrb_cnt, u32 len)
353 {
354 memset(hdr, 0, sizeof(*hdr));
355
356 AMAP_SET_BITS(struct amap_eth_hdr_wrb, crc, hdr, 1);
357
358 if (skb_shinfo(skb)->gso_segs > 1 && skb_shinfo(skb)->gso_size) {
359 AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso, hdr, 1);
360 AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso_mss,
361 hdr, skb_shinfo(skb)->gso_size);
362 } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
363 if (is_tcp_pkt(skb))
364 AMAP_SET_BITS(struct amap_eth_hdr_wrb, tcpcs, hdr, 1);
365 else if (is_udp_pkt(skb))
366 AMAP_SET_BITS(struct amap_eth_hdr_wrb, udpcs, hdr, 1);
367 }
368
369 if (vlan && vlan_tx_tag_present(skb)) {
370 AMAP_SET_BITS(struct amap_eth_hdr_wrb, vlan, hdr, 1);
371 AMAP_SET_BITS(struct amap_eth_hdr_wrb, vlan_tag,
372 hdr, vlan_tx_tag_get(skb));
373 }
374
375 AMAP_SET_BITS(struct amap_eth_hdr_wrb, event, hdr, 1);
376 AMAP_SET_BITS(struct amap_eth_hdr_wrb, complete, hdr, 1);
377 AMAP_SET_BITS(struct amap_eth_hdr_wrb, num_wrb, hdr, wrb_cnt);
378 AMAP_SET_BITS(struct amap_eth_hdr_wrb, len, hdr, len);
379 }
380
381
382 static int make_tx_wrbs(struct be_adapter *adapter,
383 struct sk_buff *skb, u32 wrb_cnt, bool dummy_wrb)
384 {
385 u64 busaddr;
386 u32 i, copied = 0;
387 struct pci_dev *pdev = adapter->pdev;
388 struct sk_buff *first_skb = skb;
389 struct be_queue_info *txq = &adapter->tx_obj.q;
390 struct be_eth_wrb *wrb;
391 struct be_eth_hdr_wrb *hdr;
392
393 hdr = queue_head_node(txq);
394 atomic_add(wrb_cnt, &txq->used);
395 queue_head_inc(txq);
396
397 if (skb->len > skb->data_len) {
398 int len = skb->len - skb->data_len;
399 busaddr = pci_map_single(pdev, skb->data, len,
400 PCI_DMA_TODEVICE);
401 wrb = queue_head_node(txq);
402 wrb_fill(wrb, busaddr, len);
403 be_dws_cpu_to_le(wrb, sizeof(*wrb));
404 queue_head_inc(txq);
405 copied += len;
406 }
407
408 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
409 struct skb_frag_struct *frag =
410 &skb_shinfo(skb)->frags[i];
411 busaddr = pci_map_page(pdev, frag->page,
412 frag->page_offset,
413 frag->size, PCI_DMA_TODEVICE);
414 wrb = queue_head_node(txq);
415 wrb_fill(wrb, busaddr, frag->size);
416 be_dws_cpu_to_le(wrb, sizeof(*wrb));
417 queue_head_inc(txq);
418 copied += frag->size;
419 }
420
421 if (dummy_wrb) {
422 wrb = queue_head_node(txq);
423 wrb_fill(wrb, 0, 0);
424 be_dws_cpu_to_le(wrb, sizeof(*wrb));
425 queue_head_inc(txq);
426 }
427
428 wrb_fill_hdr(hdr, first_skb, adapter->vlan_grp ? true : false,
429 wrb_cnt, copied);
430 be_dws_cpu_to_le(hdr, sizeof(*hdr));
431
432 return copied;
433 }
434
435 static netdev_tx_t be_xmit(struct sk_buff *skb,
436 struct net_device *netdev)
437 {
438 struct be_adapter *adapter = netdev_priv(netdev);
439 struct be_tx_obj *tx_obj = &adapter->tx_obj;
440 struct be_queue_info *txq = &tx_obj->q;
441 u32 wrb_cnt = 0, copied = 0;
442 u32 start = txq->head;
443 bool dummy_wrb, stopped = false;
444
445 wrb_cnt = wrb_cnt_for_skb(skb, &dummy_wrb);
446
447 copied = make_tx_wrbs(adapter, skb, wrb_cnt, dummy_wrb);
448 if (copied) {
449 /* record the sent skb in the sent_skb table */
450 BUG_ON(tx_obj->sent_skb_list[start]);
451 tx_obj->sent_skb_list[start] = skb;
452
453 /* Ensure txq has space for the next skb; Else stop the queue
454 * *BEFORE* ringing the tx doorbell, so that we serialze the
455 * tx compls of the current transmit which'll wake up the queue
456 */
457 if ((BE_MAX_TX_FRAG_COUNT + atomic_read(&txq->used)) >=
458 txq->len) {
459 netif_stop_queue(netdev);
460 stopped = true;
461 }
462
463 be_txq_notify(adapter, txq->id, wrb_cnt);
464
465 be_tx_stats_update(adapter, wrb_cnt, copied, stopped);
466 } else {
467 txq->head = start;
468 dev_kfree_skb_any(skb);
469 }
470 return NETDEV_TX_OK;
471 }
472
473 static int be_change_mtu(struct net_device *netdev, int new_mtu)
474 {
475 struct be_adapter *adapter = netdev_priv(netdev);
476 if (new_mtu < BE_MIN_MTU ||
477 new_mtu > BE_MAX_JUMBO_FRAME_SIZE) {
478 dev_info(&adapter->pdev->dev,
479 "MTU must be between %d and %d bytes\n",
480 BE_MIN_MTU, BE_MAX_JUMBO_FRAME_SIZE);
481 return -EINVAL;
482 }
483 dev_info(&adapter->pdev->dev, "MTU changed from %d to %d bytes\n",
484 netdev->mtu, new_mtu);
485 netdev->mtu = new_mtu;
486 return 0;
487 }
488
489 /*
490 * if there are BE_NUM_VLANS_SUPPORTED or lesser number of VLANS configured,
491 * program them in BE. If more than BE_NUM_VLANS_SUPPORTED are configured,
492 * set the BE in promiscuous VLAN mode.
493 */
494 static int be_vid_config(struct be_adapter *adapter)
495 {
496 u16 vtag[BE_NUM_VLANS_SUPPORTED];
497 u16 ntags = 0, i;
498 int status;
499
500 if (adapter->num_vlans <= BE_NUM_VLANS_SUPPORTED) {
501 /* Construct VLAN Table to give to HW */
502 for (i = 0; i < VLAN_GROUP_ARRAY_LEN; i++) {
503 if (adapter->vlan_tag[i]) {
504 vtag[ntags] = cpu_to_le16(i);
505 ntags++;
506 }
507 }
508 status = be_cmd_vlan_config(adapter, adapter->if_handle,
509 vtag, ntags, 1, 0);
510 } else {
511 status = be_cmd_vlan_config(adapter, adapter->if_handle,
512 NULL, 0, 1, 1);
513 }
514 return status;
515 }
516
517 static void be_vlan_register(struct net_device *netdev, struct vlan_group *grp)
518 {
519 struct be_adapter *adapter = netdev_priv(netdev);
520 struct be_eq_obj *rx_eq = &adapter->rx_eq;
521 struct be_eq_obj *tx_eq = &adapter->tx_eq;
522
523 be_eq_notify(adapter, rx_eq->q.id, false, false, 0);
524 be_eq_notify(adapter, tx_eq->q.id, false, false, 0);
525 adapter->vlan_grp = grp;
526 be_eq_notify(adapter, rx_eq->q.id, true, false, 0);
527 be_eq_notify(adapter, tx_eq->q.id, true, false, 0);
528 }
529
530 static void be_vlan_add_vid(struct net_device *netdev, u16 vid)
531 {
532 struct be_adapter *adapter = netdev_priv(netdev);
533
534 adapter->num_vlans++;
535 adapter->vlan_tag[vid] = 1;
536
537 be_vid_config(adapter);
538 }
539
540 static void be_vlan_rem_vid(struct net_device *netdev, u16 vid)
541 {
542 struct be_adapter *adapter = netdev_priv(netdev);
543
544 adapter->num_vlans--;
545 adapter->vlan_tag[vid] = 0;
546
547 vlan_group_set_device(adapter->vlan_grp, vid, NULL);
548 be_vid_config(adapter);
549 }
550
551 static void be_set_multicast_list(struct net_device *netdev)
552 {
553 struct be_adapter *adapter = netdev_priv(netdev);
554
555 if (netdev->flags & IFF_PROMISC) {
556 be_cmd_promiscuous_config(adapter, adapter->port_num, 1);
557 adapter->promiscuous = true;
558 goto done;
559 }
560
561 /* BE was previously in promiscous mode; disable it */
562 if (adapter->promiscuous) {
563 adapter->promiscuous = false;
564 be_cmd_promiscuous_config(adapter, adapter->port_num, 0);
565 }
566
567 /* Enable multicast promisc if num configured exceeds what we support */
568 if (netdev->flags & IFF_ALLMULTI || netdev->mc_count > BE_MAX_MC) {
569 be_cmd_multicast_set(adapter, adapter->if_handle, NULL, 0,
570 &adapter->mc_cmd_mem);
571 goto done;
572 }
573
574 be_cmd_multicast_set(adapter, adapter->if_handle, netdev->mc_list,
575 netdev->mc_count, &adapter->mc_cmd_mem);
576 done:
577 return;
578 }
579
580 static void be_rx_rate_update(struct be_adapter *adapter)
581 {
582 struct be_drvr_stats *stats = drvr_stats(adapter);
583 ulong now = jiffies;
584
585 /* Wrapped around */
586 if (time_before(now, stats->be_rx_jiffies)) {
587 stats->be_rx_jiffies = now;
588 return;
589 }
590
591 /* Update the rate once in two seconds */
592 if ((now - stats->be_rx_jiffies) < 2 * HZ)
593 return;
594
595 stats->be_rx_rate = be_calc_rate(stats->be_rx_bytes
596 - stats->be_rx_bytes_prev,
597 now - stats->be_rx_jiffies);
598 stats->be_rx_jiffies = now;
599 stats->be_rx_bytes_prev = stats->be_rx_bytes;
600 }
601
602 static void be_rx_stats_update(struct be_adapter *adapter,
603 u32 pktsize, u16 numfrags)
604 {
605 struct be_drvr_stats *stats = drvr_stats(adapter);
606
607 stats->be_rx_compl++;
608 stats->be_rx_frags += numfrags;
609 stats->be_rx_bytes += pktsize;
610 }
611
612 static inline bool do_pkt_csum(struct be_eth_rx_compl *rxcp, bool cso)
613 {
614 u8 l4_cksm, ip_version, ipcksm, tcpf = 0, udpf = 0, ipv6_chk;
615
616 l4_cksm = AMAP_GET_BITS(struct amap_eth_rx_compl, l4_cksm, rxcp);
617 ipcksm = AMAP_GET_BITS(struct amap_eth_rx_compl, ipcksm, rxcp);
618 ip_version = AMAP_GET_BITS(struct amap_eth_rx_compl, ip_version, rxcp);
619 if (ip_version) {
620 tcpf = AMAP_GET_BITS(struct amap_eth_rx_compl, tcpf, rxcp);
621 udpf = AMAP_GET_BITS(struct amap_eth_rx_compl, udpf, rxcp);
622 }
623 ipv6_chk = (ip_version && (tcpf || udpf));
624
625 return ((l4_cksm && ipv6_chk && ipcksm) && cso) ? false : true;
626 }
627
628 static struct be_rx_page_info *
629 get_rx_page_info(struct be_adapter *adapter, u16 frag_idx)
630 {
631 struct be_rx_page_info *rx_page_info;
632 struct be_queue_info *rxq = &adapter->rx_obj.q;
633
634 rx_page_info = &adapter->rx_obj.page_info_tbl[frag_idx];
635 BUG_ON(!rx_page_info->page);
636
637 if (rx_page_info->last_page_user)
638 pci_unmap_page(adapter->pdev, pci_unmap_addr(rx_page_info, bus),
639 adapter->big_page_size, PCI_DMA_FROMDEVICE);
640
641 atomic_dec(&rxq->used);
642 return rx_page_info;
643 }
644
645 /* Throwaway the data in the Rx completion */
646 static void be_rx_compl_discard(struct be_adapter *adapter,
647 struct be_eth_rx_compl *rxcp)
648 {
649 struct be_queue_info *rxq = &adapter->rx_obj.q;
650 struct be_rx_page_info *page_info;
651 u16 rxq_idx, i, num_rcvd;
652
653 rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
654 num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
655
656 for (i = 0; i < num_rcvd; i++) {
657 page_info = get_rx_page_info(adapter, rxq_idx);
658 put_page(page_info->page);
659 memset(page_info, 0, sizeof(*page_info));
660 index_inc(&rxq_idx, rxq->len);
661 }
662 }
663
664 /*
665 * skb_fill_rx_data forms a complete skb for an ether frame
666 * indicated by rxcp.
667 */
668 static void skb_fill_rx_data(struct be_adapter *adapter,
669 struct sk_buff *skb, struct be_eth_rx_compl *rxcp)
670 {
671 struct be_queue_info *rxq = &adapter->rx_obj.q;
672 struct be_rx_page_info *page_info;
673 u16 rxq_idx, i, num_rcvd, j;
674 u32 pktsize, hdr_len, curr_frag_len, size;
675 u8 *start;
676
677 rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
678 pktsize = AMAP_GET_BITS(struct amap_eth_rx_compl, pktsize, rxcp);
679 num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
680
681 page_info = get_rx_page_info(adapter, rxq_idx);
682
683 start = page_address(page_info->page) + page_info->page_offset;
684 prefetch(start);
685
686 /* Copy data in the first descriptor of this completion */
687 curr_frag_len = min(pktsize, rx_frag_size);
688
689 /* Copy the header portion into skb_data */
690 hdr_len = min((u32)BE_HDR_LEN, curr_frag_len);
691 memcpy(skb->data, start, hdr_len);
692 skb->len = curr_frag_len;
693 if (curr_frag_len <= BE_HDR_LEN) { /* tiny packet */
694 /* Complete packet has now been moved to data */
695 put_page(page_info->page);
696 skb->data_len = 0;
697 skb->tail += curr_frag_len;
698 } else {
699 skb_shinfo(skb)->nr_frags = 1;
700 skb_shinfo(skb)->frags[0].page = page_info->page;
701 skb_shinfo(skb)->frags[0].page_offset =
702 page_info->page_offset + hdr_len;
703 skb_shinfo(skb)->frags[0].size = curr_frag_len - hdr_len;
704 skb->data_len = curr_frag_len - hdr_len;
705 skb->tail += hdr_len;
706 }
707 memset(page_info, 0, sizeof(*page_info));
708
709 if (pktsize <= rx_frag_size) {
710 BUG_ON(num_rcvd != 1);
711 goto done;
712 }
713
714 /* More frags present for this completion */
715 size = pktsize;
716 for (i = 1, j = 0; i < num_rcvd; i++) {
717 size -= curr_frag_len;
718 index_inc(&rxq_idx, rxq->len);
719 page_info = get_rx_page_info(adapter, rxq_idx);
720
721 curr_frag_len = min(size, rx_frag_size);
722
723 /* Coalesce all frags from the same physical page in one slot */
724 if (page_info->page_offset == 0) {
725 /* Fresh page */
726 j++;
727 skb_shinfo(skb)->frags[j].page = page_info->page;
728 skb_shinfo(skb)->frags[j].page_offset =
729 page_info->page_offset;
730 skb_shinfo(skb)->frags[j].size = 0;
731 skb_shinfo(skb)->nr_frags++;
732 } else {
733 put_page(page_info->page);
734 }
735
736 skb_shinfo(skb)->frags[j].size += curr_frag_len;
737 skb->len += curr_frag_len;
738 skb->data_len += curr_frag_len;
739
740 memset(page_info, 0, sizeof(*page_info));
741 }
742 BUG_ON(j > MAX_SKB_FRAGS);
743
744 done:
745 be_rx_stats_update(adapter, pktsize, num_rcvd);
746 return;
747 }
748
749 /* Process the RX completion indicated by rxcp when GRO is disabled */
750 static void be_rx_compl_process(struct be_adapter *adapter,
751 struct be_eth_rx_compl *rxcp)
752 {
753 struct sk_buff *skb;
754 u32 vlanf, vid;
755 u8 vtm;
756
757 vlanf = AMAP_GET_BITS(struct amap_eth_rx_compl, vtp, rxcp);
758 vtm = AMAP_GET_BITS(struct amap_eth_rx_compl, vtm, rxcp);
759
760 /* vlanf could be wrongly set in some cards.
761 * ignore if vtm is not set */
762 if ((adapter->cap & 0x400) && !vtm)
763 vlanf = 0;
764
765 skb = netdev_alloc_skb_ip_align(adapter->netdev, BE_HDR_LEN);
766 if (!skb) {
767 if (net_ratelimit())
768 dev_warn(&adapter->pdev->dev, "skb alloc failed\n");
769 be_rx_compl_discard(adapter, rxcp);
770 return;
771 }
772
773 skb_fill_rx_data(adapter, skb, rxcp);
774
775 if (do_pkt_csum(rxcp, adapter->rx_csum))
776 skb->ip_summed = CHECKSUM_NONE;
777 else
778 skb->ip_summed = CHECKSUM_UNNECESSARY;
779
780 skb->truesize = skb->len + sizeof(struct sk_buff);
781 skb->protocol = eth_type_trans(skb, adapter->netdev);
782 skb->dev = adapter->netdev;
783
784 if (vlanf) {
785 if (!adapter->vlan_grp || adapter->num_vlans == 0) {
786 kfree_skb(skb);
787 return;
788 }
789 vid = AMAP_GET_BITS(struct amap_eth_rx_compl, vlan_tag, rxcp);
790 vid = be16_to_cpu(vid);
791 vlan_hwaccel_receive_skb(skb, adapter->vlan_grp, vid);
792 } else {
793 netif_receive_skb(skb);
794 }
795
796 return;
797 }
798
799 /* Process the RX completion indicated by rxcp when GRO is enabled */
800 static void be_rx_compl_process_gro(struct be_adapter *adapter,
801 struct be_eth_rx_compl *rxcp)
802 {
803 struct be_rx_page_info *page_info;
804 struct sk_buff *skb = NULL;
805 struct be_queue_info *rxq = &adapter->rx_obj.q;
806 struct be_eq_obj *eq_obj = &adapter->rx_eq;
807 u32 num_rcvd, pkt_size, remaining, vlanf, curr_frag_len;
808 u16 i, rxq_idx = 0, vid, j;
809 u8 vtm;
810
811 num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
812 pkt_size = AMAP_GET_BITS(struct amap_eth_rx_compl, pktsize, rxcp);
813 vlanf = AMAP_GET_BITS(struct amap_eth_rx_compl, vtp, rxcp);
814 rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
815 vtm = AMAP_GET_BITS(struct amap_eth_rx_compl, vtm, rxcp);
816
817 /* vlanf could be wrongly set in some cards.
818 * ignore if vtm is not set */
819 if ((adapter->cap & 0x400) && !vtm)
820 vlanf = 0;
821
822 skb = napi_get_frags(&eq_obj->napi);
823 if (!skb) {
824 be_rx_compl_discard(adapter, rxcp);
825 return;
826 }
827
828 remaining = pkt_size;
829 for (i = 0, j = -1; i < num_rcvd; i++) {
830 page_info = get_rx_page_info(adapter, rxq_idx);
831
832 curr_frag_len = min(remaining, rx_frag_size);
833
834 /* Coalesce all frags from the same physical page in one slot */
835 if (i == 0 || page_info->page_offset == 0) {
836 /* First frag or Fresh page */
837 j++;
838 skb_shinfo(skb)->frags[j].page = page_info->page;
839 skb_shinfo(skb)->frags[j].page_offset =
840 page_info->page_offset;
841 skb_shinfo(skb)->frags[j].size = 0;
842 } else {
843 put_page(page_info->page);
844 }
845 skb_shinfo(skb)->frags[j].size += curr_frag_len;
846
847 remaining -= curr_frag_len;
848 index_inc(&rxq_idx, rxq->len);
849 memset(page_info, 0, sizeof(*page_info));
850 }
851 BUG_ON(j > MAX_SKB_FRAGS);
852
853 skb_shinfo(skb)->nr_frags = j + 1;
854 skb->len = pkt_size;
855 skb->data_len = pkt_size;
856 skb->truesize += pkt_size;
857 skb->ip_summed = CHECKSUM_UNNECESSARY;
858
859 if (likely(!vlanf)) {
860 napi_gro_frags(&eq_obj->napi);
861 } else {
862 vid = AMAP_GET_BITS(struct amap_eth_rx_compl, vlan_tag, rxcp);
863 vid = be16_to_cpu(vid);
864
865 if (!adapter->vlan_grp || adapter->num_vlans == 0)
866 return;
867
868 vlan_gro_frags(&eq_obj->napi, adapter->vlan_grp, vid);
869 }
870
871 be_rx_stats_update(adapter, pkt_size, num_rcvd);
872 return;
873 }
874
875 static struct be_eth_rx_compl *be_rx_compl_get(struct be_adapter *adapter)
876 {
877 struct be_eth_rx_compl *rxcp = queue_tail_node(&adapter->rx_obj.cq);
878
879 if (rxcp->dw[offsetof(struct amap_eth_rx_compl, valid) / 32] == 0)
880 return NULL;
881
882 be_dws_le_to_cpu(rxcp, sizeof(*rxcp));
883
884 queue_tail_inc(&adapter->rx_obj.cq);
885 return rxcp;
886 }
887
888 /* To reset the valid bit, we need to reset the whole word as
889 * when walking the queue the valid entries are little-endian
890 * and invalid entries are host endian
891 */
892 static inline void be_rx_compl_reset(struct be_eth_rx_compl *rxcp)
893 {
894 rxcp->dw[offsetof(struct amap_eth_rx_compl, valid) / 32] = 0;
895 }
896
897 static inline struct page *be_alloc_pages(u32 size)
898 {
899 gfp_t alloc_flags = GFP_ATOMIC;
900 u32 order = get_order(size);
901 if (order > 0)
902 alloc_flags |= __GFP_COMP;
903 return alloc_pages(alloc_flags, order);
904 }
905
906 /*
907 * Allocate a page, split it to fragments of size rx_frag_size and post as
908 * receive buffers to BE
909 */
910 static void be_post_rx_frags(struct be_adapter *adapter)
911 {
912 struct be_rx_page_info *page_info_tbl = adapter->rx_obj.page_info_tbl;
913 struct be_rx_page_info *page_info = NULL, *prev_page_info = NULL;
914 struct be_queue_info *rxq = &adapter->rx_obj.q;
915 struct page *pagep = NULL;
916 struct be_eth_rx_d *rxd;
917 u64 page_dmaaddr = 0, frag_dmaaddr;
918 u32 posted, page_offset = 0;
919
920 page_info = &page_info_tbl[rxq->head];
921 for (posted = 0; posted < MAX_RX_POST && !page_info->page; posted++) {
922 if (!pagep) {
923 pagep = be_alloc_pages(adapter->big_page_size);
924 if (unlikely(!pagep)) {
925 drvr_stats(adapter)->be_ethrx_post_fail++;
926 break;
927 }
928 page_dmaaddr = pci_map_page(adapter->pdev, pagep, 0,
929 adapter->big_page_size,
930 PCI_DMA_FROMDEVICE);
931 page_info->page_offset = 0;
932 } else {
933 get_page(pagep);
934 page_info->page_offset = page_offset + rx_frag_size;
935 }
936 page_offset = page_info->page_offset;
937 page_info->page = pagep;
938 pci_unmap_addr_set(page_info, bus, page_dmaaddr);
939 frag_dmaaddr = page_dmaaddr + page_info->page_offset;
940
941 rxd = queue_head_node(rxq);
942 rxd->fragpa_lo = cpu_to_le32(frag_dmaaddr & 0xFFFFFFFF);
943 rxd->fragpa_hi = cpu_to_le32(upper_32_bits(frag_dmaaddr));
944
945 /* Any space left in the current big page for another frag? */
946 if ((page_offset + rx_frag_size + rx_frag_size) >
947 adapter->big_page_size) {
948 pagep = NULL;
949 page_info->last_page_user = true;
950 }
951
952 prev_page_info = page_info;
953 queue_head_inc(rxq);
954 page_info = &page_info_tbl[rxq->head];
955 }
956 if (pagep)
957 prev_page_info->last_page_user = true;
958
959 if (posted) {
960 atomic_add(posted, &rxq->used);
961 be_rxq_notify(adapter, rxq->id, posted);
962 } else if (atomic_read(&rxq->used) == 0) {
963 /* Let be_worker replenish when memory is available */
964 adapter->rx_post_starved = true;
965 }
966
967 return;
968 }
969
970 static struct be_eth_tx_compl *be_tx_compl_get(struct be_queue_info *tx_cq)
971 {
972 struct be_eth_tx_compl *txcp = queue_tail_node(tx_cq);
973
974 if (txcp->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] == 0)
975 return NULL;
976
977 be_dws_le_to_cpu(txcp, sizeof(*txcp));
978
979 txcp->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] = 0;
980
981 queue_tail_inc(tx_cq);
982 return txcp;
983 }
984
985 static void be_tx_compl_process(struct be_adapter *adapter, u16 last_index)
986 {
987 struct be_queue_info *txq = &adapter->tx_obj.q;
988 struct be_eth_wrb *wrb;
989 struct sk_buff **sent_skbs = adapter->tx_obj.sent_skb_list;
990 struct sk_buff *sent_skb;
991 u64 busaddr;
992 u16 cur_index, num_wrbs = 0;
993
994 cur_index = txq->tail;
995 sent_skb = sent_skbs[cur_index];
996 BUG_ON(!sent_skb);
997 sent_skbs[cur_index] = NULL;
998 wrb = queue_tail_node(txq);
999 be_dws_le_to_cpu(wrb, sizeof(*wrb));
1000 busaddr = ((u64)wrb->frag_pa_hi << 32) | (u64)wrb->frag_pa_lo;
1001 if (busaddr != 0) {
1002 pci_unmap_single(adapter->pdev, busaddr,
1003 wrb->frag_len, PCI_DMA_TODEVICE);
1004 }
1005 num_wrbs++;
1006 queue_tail_inc(txq);
1007
1008 while (cur_index != last_index) {
1009 cur_index = txq->tail;
1010 wrb = queue_tail_node(txq);
1011 be_dws_le_to_cpu(wrb, sizeof(*wrb));
1012 busaddr = ((u64)wrb->frag_pa_hi << 32) | (u64)wrb->frag_pa_lo;
1013 if (busaddr != 0) {
1014 pci_unmap_page(adapter->pdev, busaddr,
1015 wrb->frag_len, PCI_DMA_TODEVICE);
1016 }
1017 num_wrbs++;
1018 queue_tail_inc(txq);
1019 }
1020
1021 atomic_sub(num_wrbs, &txq->used);
1022
1023 kfree_skb(sent_skb);
1024 }
1025
1026 static inline struct be_eq_entry *event_get(struct be_eq_obj *eq_obj)
1027 {
1028 struct be_eq_entry *eqe = queue_tail_node(&eq_obj->q);
1029
1030 if (!eqe->evt)
1031 return NULL;
1032
1033 eqe->evt = le32_to_cpu(eqe->evt);
1034 queue_tail_inc(&eq_obj->q);
1035 return eqe;
1036 }
1037
1038 static int event_handle(struct be_adapter *adapter,
1039 struct be_eq_obj *eq_obj)
1040 {
1041 struct be_eq_entry *eqe;
1042 u16 num = 0;
1043
1044 while ((eqe = event_get(eq_obj)) != NULL) {
1045 eqe->evt = 0;
1046 num++;
1047 }
1048
1049 /* Deal with any spurious interrupts that come
1050 * without events
1051 */
1052 be_eq_notify(adapter, eq_obj->q.id, true, true, num);
1053 if (num)
1054 napi_schedule(&eq_obj->napi);
1055
1056 return num;
1057 }
1058
1059 /* Just read and notify events without processing them.
1060 * Used at the time of destroying event queues */
1061 static void be_eq_clean(struct be_adapter *adapter,
1062 struct be_eq_obj *eq_obj)
1063 {
1064 struct be_eq_entry *eqe;
1065 u16 num = 0;
1066
1067 while ((eqe = event_get(eq_obj)) != NULL) {
1068 eqe->evt = 0;
1069 num++;
1070 }
1071
1072 if (num)
1073 be_eq_notify(adapter, eq_obj->q.id, false, true, num);
1074 }
1075
1076 static void be_rx_q_clean(struct be_adapter *adapter)
1077 {
1078 struct be_rx_page_info *page_info;
1079 struct be_queue_info *rxq = &adapter->rx_obj.q;
1080 struct be_queue_info *rx_cq = &adapter->rx_obj.cq;
1081 struct be_eth_rx_compl *rxcp;
1082 u16 tail;
1083
1084 /* First cleanup pending rx completions */
1085 while ((rxcp = be_rx_compl_get(adapter)) != NULL) {
1086 be_rx_compl_discard(adapter, rxcp);
1087 be_rx_compl_reset(rxcp);
1088 be_cq_notify(adapter, rx_cq->id, true, 1);
1089 }
1090
1091 /* Then free posted rx buffer that were not used */
1092 tail = (rxq->head + rxq->len - atomic_read(&rxq->used)) % rxq->len;
1093 for (; atomic_read(&rxq->used) > 0; index_inc(&tail, rxq->len)) {
1094 page_info = get_rx_page_info(adapter, tail);
1095 put_page(page_info->page);
1096 memset(page_info, 0, sizeof(*page_info));
1097 }
1098 BUG_ON(atomic_read(&rxq->used));
1099 }
1100
1101 static void be_tx_compl_clean(struct be_adapter *adapter)
1102 {
1103 struct be_queue_info *tx_cq = &adapter->tx_obj.cq;
1104 struct be_queue_info *txq = &adapter->tx_obj.q;
1105 struct be_eth_tx_compl *txcp;
1106 u16 end_idx, cmpl = 0, timeo = 0;
1107
1108 /* Wait for a max of 200ms for all the tx-completions to arrive. */
1109 do {
1110 while ((txcp = be_tx_compl_get(tx_cq))) {
1111 end_idx = AMAP_GET_BITS(struct amap_eth_tx_compl,
1112 wrb_index, txcp);
1113 be_tx_compl_process(adapter, end_idx);
1114 cmpl++;
1115 }
1116 if (cmpl) {
1117 be_cq_notify(adapter, tx_cq->id, false, cmpl);
1118 cmpl = 0;
1119 }
1120
1121 if (atomic_read(&txq->used) == 0 || ++timeo > 200)
1122 break;
1123
1124 mdelay(1);
1125 } while (true);
1126
1127 if (atomic_read(&txq->used))
1128 dev_err(&adapter->pdev->dev, "%d pending tx-completions\n",
1129 atomic_read(&txq->used));
1130 }
1131
1132 static void be_mcc_queues_destroy(struct be_adapter *adapter)
1133 {
1134 struct be_queue_info *q;
1135
1136 q = &adapter->mcc_obj.q;
1137 if (q->created)
1138 be_cmd_q_destroy(adapter, q, QTYPE_MCCQ);
1139 be_queue_free(adapter, q);
1140
1141 q = &adapter->mcc_obj.cq;
1142 if (q->created)
1143 be_cmd_q_destroy(adapter, q, QTYPE_CQ);
1144 be_queue_free(adapter, q);
1145 }
1146
1147 /* Must be called only after TX qs are created as MCC shares TX EQ */
1148 static int be_mcc_queues_create(struct be_adapter *adapter)
1149 {
1150 struct be_queue_info *q, *cq;
1151
1152 /* Alloc MCC compl queue */
1153 cq = &adapter->mcc_obj.cq;
1154 if (be_queue_alloc(adapter, cq, MCC_CQ_LEN,
1155 sizeof(struct be_mcc_compl)))
1156 goto err;
1157
1158 /* Ask BE to create MCC compl queue; share TX's eq */
1159 if (be_cmd_cq_create(adapter, cq, &adapter->tx_eq.q, false, true, 0))
1160 goto mcc_cq_free;
1161
1162 /* Alloc MCC queue */
1163 q = &adapter->mcc_obj.q;
1164 if (be_queue_alloc(adapter, q, MCC_Q_LEN, sizeof(struct be_mcc_wrb)))
1165 goto mcc_cq_destroy;
1166
1167 /* Ask BE to create MCC queue */
1168 if (be_cmd_mccq_create(adapter, q, cq))
1169 goto mcc_q_free;
1170
1171 return 0;
1172
1173 mcc_q_free:
1174 be_queue_free(adapter, q);
1175 mcc_cq_destroy:
1176 be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
1177 mcc_cq_free:
1178 be_queue_free(adapter, cq);
1179 err:
1180 return -1;
1181 }
1182
1183 static void be_tx_queues_destroy(struct be_adapter *adapter)
1184 {
1185 struct be_queue_info *q;
1186
1187 q = &adapter->tx_obj.q;
1188 if (q->created)
1189 be_cmd_q_destroy(adapter, q, QTYPE_TXQ);
1190 be_queue_free(adapter, q);
1191
1192 q = &adapter->tx_obj.cq;
1193 if (q->created)
1194 be_cmd_q_destroy(adapter, q, QTYPE_CQ);
1195 be_queue_free(adapter, q);
1196
1197 /* Clear any residual events */
1198 be_eq_clean(adapter, &adapter->tx_eq);
1199
1200 q = &adapter->tx_eq.q;
1201 if (q->created)
1202 be_cmd_q_destroy(adapter, q, QTYPE_EQ);
1203 be_queue_free(adapter, q);
1204 }
1205
1206 static int be_tx_queues_create(struct be_adapter *adapter)
1207 {
1208 struct be_queue_info *eq, *q, *cq;
1209
1210 adapter->tx_eq.max_eqd = 0;
1211 adapter->tx_eq.min_eqd = 0;
1212 adapter->tx_eq.cur_eqd = 96;
1213 adapter->tx_eq.enable_aic = false;
1214 /* Alloc Tx Event queue */
1215 eq = &adapter->tx_eq.q;
1216 if (be_queue_alloc(adapter, eq, EVNT_Q_LEN, sizeof(struct be_eq_entry)))
1217 return -1;
1218
1219 /* Ask BE to create Tx Event queue */
1220 if (be_cmd_eq_create(adapter, eq, adapter->tx_eq.cur_eqd))
1221 goto tx_eq_free;
1222 /* Alloc TX eth compl queue */
1223 cq = &adapter->tx_obj.cq;
1224 if (be_queue_alloc(adapter, cq, TX_CQ_LEN,
1225 sizeof(struct be_eth_tx_compl)))
1226 goto tx_eq_destroy;
1227
1228 /* Ask BE to create Tx eth compl queue */
1229 if (be_cmd_cq_create(adapter, cq, eq, false, false, 3))
1230 goto tx_cq_free;
1231
1232 /* Alloc TX eth queue */
1233 q = &adapter->tx_obj.q;
1234 if (be_queue_alloc(adapter, q, TX_Q_LEN, sizeof(struct be_eth_wrb)))
1235 goto tx_cq_destroy;
1236
1237 /* Ask BE to create Tx eth queue */
1238 if (be_cmd_txq_create(adapter, q, cq))
1239 goto tx_q_free;
1240 return 0;
1241
1242 tx_q_free:
1243 be_queue_free(adapter, q);
1244 tx_cq_destroy:
1245 be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
1246 tx_cq_free:
1247 be_queue_free(adapter, cq);
1248 tx_eq_destroy:
1249 be_cmd_q_destroy(adapter, eq, QTYPE_EQ);
1250 tx_eq_free:
1251 be_queue_free(adapter, eq);
1252 return -1;
1253 }
1254
1255 static void be_rx_queues_destroy(struct be_adapter *adapter)
1256 {
1257 struct be_queue_info *q;
1258
1259 q = &adapter->rx_obj.q;
1260 if (q->created) {
1261 be_cmd_q_destroy(adapter, q, QTYPE_RXQ);
1262 be_rx_q_clean(adapter);
1263 }
1264 be_queue_free(adapter, q);
1265
1266 q = &adapter->rx_obj.cq;
1267 if (q->created)
1268 be_cmd_q_destroy(adapter, q, QTYPE_CQ);
1269 be_queue_free(adapter, q);
1270
1271 /* Clear any residual events */
1272 be_eq_clean(adapter, &adapter->rx_eq);
1273
1274 q = &adapter->rx_eq.q;
1275 if (q->created)
1276 be_cmd_q_destroy(adapter, q, QTYPE_EQ);
1277 be_queue_free(adapter, q);
1278 }
1279
1280 static int be_rx_queues_create(struct be_adapter *adapter)
1281 {
1282 struct be_queue_info *eq, *q, *cq;
1283 int rc;
1284
1285 adapter->big_page_size = (1 << get_order(rx_frag_size)) * PAGE_SIZE;
1286 adapter->rx_eq.max_eqd = BE_MAX_EQD;
1287 adapter->rx_eq.min_eqd = 0;
1288 adapter->rx_eq.cur_eqd = 0;
1289 adapter->rx_eq.enable_aic = true;
1290
1291 /* Alloc Rx Event queue */
1292 eq = &adapter->rx_eq.q;
1293 rc = be_queue_alloc(adapter, eq, EVNT_Q_LEN,
1294 sizeof(struct be_eq_entry));
1295 if (rc)
1296 return rc;
1297
1298 /* Ask BE to create Rx Event queue */
1299 rc = be_cmd_eq_create(adapter, eq, adapter->rx_eq.cur_eqd);
1300 if (rc)
1301 goto rx_eq_free;
1302
1303 /* Alloc RX eth compl queue */
1304 cq = &adapter->rx_obj.cq;
1305 rc = be_queue_alloc(adapter, cq, RX_CQ_LEN,
1306 sizeof(struct be_eth_rx_compl));
1307 if (rc)
1308 goto rx_eq_destroy;
1309
1310 /* Ask BE to create Rx eth compl queue */
1311 rc = be_cmd_cq_create(adapter, cq, eq, false, false, 3);
1312 if (rc)
1313 goto rx_cq_free;
1314
1315 /* Alloc RX eth queue */
1316 q = &adapter->rx_obj.q;
1317 rc = be_queue_alloc(adapter, q, RX_Q_LEN, sizeof(struct be_eth_rx_d));
1318 if (rc)
1319 goto rx_cq_destroy;
1320
1321 /* Ask BE to create Rx eth queue */
1322 rc = be_cmd_rxq_create(adapter, q, cq->id, rx_frag_size,
1323 BE_MAX_JUMBO_FRAME_SIZE, adapter->if_handle, false);
1324 if (rc)
1325 goto rx_q_free;
1326
1327 return 0;
1328 rx_q_free:
1329 be_queue_free(adapter, q);
1330 rx_cq_destroy:
1331 be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
1332 rx_cq_free:
1333 be_queue_free(adapter, cq);
1334 rx_eq_destroy:
1335 be_cmd_q_destroy(adapter, eq, QTYPE_EQ);
1336 rx_eq_free:
1337 be_queue_free(adapter, eq);
1338 return rc;
1339 }
1340
1341 /* There are 8 evt ids per func. Retruns the evt id's bit number */
1342 static inline int be_evt_bit_get(struct be_adapter *adapter, u32 eq_id)
1343 {
1344 return eq_id - 8 * be_pci_func(adapter);
1345 }
1346
1347 static irqreturn_t be_intx(int irq, void *dev)
1348 {
1349 struct be_adapter *adapter = dev;
1350 int isr;
1351
1352 isr = ioread32(adapter->csr + CEV_ISR0_OFFSET +
1353 be_pci_func(adapter) * CEV_ISR_SIZE);
1354 if (!isr)
1355 return IRQ_NONE;
1356
1357 event_handle(adapter, &adapter->tx_eq);
1358 event_handle(adapter, &adapter->rx_eq);
1359
1360 return IRQ_HANDLED;
1361 }
1362
1363 static irqreturn_t be_msix_rx(int irq, void *dev)
1364 {
1365 struct be_adapter *adapter = dev;
1366
1367 event_handle(adapter, &adapter->rx_eq);
1368
1369 return IRQ_HANDLED;
1370 }
1371
1372 static irqreturn_t be_msix_tx_mcc(int irq, void *dev)
1373 {
1374 struct be_adapter *adapter = dev;
1375
1376 event_handle(adapter, &adapter->tx_eq);
1377
1378 return IRQ_HANDLED;
1379 }
1380
1381 static inline bool do_gro(struct be_adapter *adapter,
1382 struct be_eth_rx_compl *rxcp)
1383 {
1384 int err = AMAP_GET_BITS(struct amap_eth_rx_compl, err, rxcp);
1385 int tcp_frame = AMAP_GET_BITS(struct amap_eth_rx_compl, tcpf, rxcp);
1386
1387 if (err)
1388 drvr_stats(adapter)->be_rxcp_err++;
1389
1390 return (tcp_frame && !err) ? true : false;
1391 }
1392
1393 int be_poll_rx(struct napi_struct *napi, int budget)
1394 {
1395 struct be_eq_obj *rx_eq = container_of(napi, struct be_eq_obj, napi);
1396 struct be_adapter *adapter =
1397 container_of(rx_eq, struct be_adapter, rx_eq);
1398 struct be_queue_info *rx_cq = &adapter->rx_obj.cq;
1399 struct be_eth_rx_compl *rxcp;
1400 u32 work_done;
1401
1402 adapter->stats.drvr_stats.be_rx_polls++;
1403 for (work_done = 0; work_done < budget; work_done++) {
1404 rxcp = be_rx_compl_get(adapter);
1405 if (!rxcp)
1406 break;
1407
1408 if (do_gro(adapter, rxcp))
1409 be_rx_compl_process_gro(adapter, rxcp);
1410 else
1411 be_rx_compl_process(adapter, rxcp);
1412
1413 be_rx_compl_reset(rxcp);
1414 }
1415
1416 /* Refill the queue */
1417 if (atomic_read(&adapter->rx_obj.q.used) < RX_FRAGS_REFILL_WM)
1418 be_post_rx_frags(adapter);
1419
1420 /* All consumed */
1421 if (work_done < budget) {
1422 napi_complete(napi);
1423 be_cq_notify(adapter, rx_cq->id, true, work_done);
1424 } else {
1425 /* More to be consumed; continue with interrupts disabled */
1426 be_cq_notify(adapter, rx_cq->id, false, work_done);
1427 }
1428 return work_done;
1429 }
1430
1431 void be_process_tx(struct be_adapter *adapter)
1432 {
1433 struct be_queue_info *txq = &adapter->tx_obj.q;
1434 struct be_queue_info *tx_cq = &adapter->tx_obj.cq;
1435 struct be_eth_tx_compl *txcp;
1436 u32 num_cmpl = 0;
1437 u16 end_idx;
1438
1439 while ((txcp = be_tx_compl_get(tx_cq))) {
1440 end_idx = AMAP_GET_BITS(struct amap_eth_tx_compl,
1441 wrb_index, txcp);
1442 be_tx_compl_process(adapter, end_idx);
1443 num_cmpl++;
1444 }
1445
1446 if (num_cmpl) {
1447 be_cq_notify(adapter, tx_cq->id, true, num_cmpl);
1448
1449 /* As Tx wrbs have been freed up, wake up netdev queue if
1450 * it was stopped due to lack of tx wrbs.
1451 */
1452 if (netif_queue_stopped(adapter->netdev) &&
1453 atomic_read(&txq->used) < txq->len / 2) {
1454 netif_wake_queue(adapter->netdev);
1455 }
1456
1457 drvr_stats(adapter)->be_tx_events++;
1458 drvr_stats(adapter)->be_tx_compl += num_cmpl;
1459 }
1460 }
1461
1462 /* As TX and MCC share the same EQ check for both TX and MCC completions.
1463 * For TX/MCC we don't honour budget; consume everything
1464 */
1465 static int be_poll_tx_mcc(struct napi_struct *napi, int budget)
1466 {
1467 struct be_eq_obj *tx_eq = container_of(napi, struct be_eq_obj, napi);
1468 struct be_adapter *adapter =
1469 container_of(tx_eq, struct be_adapter, tx_eq);
1470
1471 napi_complete(napi);
1472
1473 be_process_tx(adapter);
1474
1475 be_process_mcc(adapter);
1476
1477 return 1;
1478 }
1479
1480 static void be_worker(struct work_struct *work)
1481 {
1482 struct be_adapter *adapter =
1483 container_of(work, struct be_adapter, work.work);
1484
1485 be_cmd_get_stats(adapter, &adapter->stats.cmd);
1486
1487 /* Set EQ delay */
1488 be_rx_eqd_update(adapter);
1489
1490 be_tx_rate_update(adapter);
1491 be_rx_rate_update(adapter);
1492
1493 if (adapter->rx_post_starved) {
1494 adapter->rx_post_starved = false;
1495 be_post_rx_frags(adapter);
1496 }
1497
1498 schedule_delayed_work(&adapter->work, msecs_to_jiffies(1000));
1499 }
1500
1501 static void be_msix_disable(struct be_adapter *adapter)
1502 {
1503 if (adapter->msix_enabled) {
1504 pci_disable_msix(adapter->pdev);
1505 adapter->msix_enabled = false;
1506 }
1507 }
1508
1509 static void be_msix_enable(struct be_adapter *adapter)
1510 {
1511 int i, status;
1512
1513 for (i = 0; i < BE_NUM_MSIX_VECTORS; i++)
1514 adapter->msix_entries[i].entry = i;
1515
1516 status = pci_enable_msix(adapter->pdev, adapter->msix_entries,
1517 BE_NUM_MSIX_VECTORS);
1518 if (status == 0)
1519 adapter->msix_enabled = true;
1520 return;
1521 }
1522
1523 static inline int be_msix_vec_get(struct be_adapter *adapter, u32 eq_id)
1524 {
1525 return adapter->msix_entries[
1526 be_evt_bit_get(adapter, eq_id)].vector;
1527 }
1528
1529 static int be_request_irq(struct be_adapter *adapter,
1530 struct be_eq_obj *eq_obj,
1531 void *handler, char *desc)
1532 {
1533 struct net_device *netdev = adapter->netdev;
1534 int vec;
1535
1536 sprintf(eq_obj->desc, "%s-%s", netdev->name, desc);
1537 vec = be_msix_vec_get(adapter, eq_obj->q.id);
1538 return request_irq(vec, handler, 0, eq_obj->desc, adapter);
1539 }
1540
1541 static void be_free_irq(struct be_adapter *adapter, struct be_eq_obj *eq_obj)
1542 {
1543 int vec = be_msix_vec_get(adapter, eq_obj->q.id);
1544 free_irq(vec, adapter);
1545 }
1546
1547 static int be_msix_register(struct be_adapter *adapter)
1548 {
1549 int status;
1550
1551 status = be_request_irq(adapter, &adapter->tx_eq, be_msix_tx_mcc, "tx");
1552 if (status)
1553 goto err;
1554
1555 status = be_request_irq(adapter, &adapter->rx_eq, be_msix_rx, "rx");
1556 if (status)
1557 goto free_tx_irq;
1558
1559 return 0;
1560
1561 free_tx_irq:
1562 be_free_irq(adapter, &adapter->tx_eq);
1563 err:
1564 dev_warn(&adapter->pdev->dev,
1565 "MSIX Request IRQ failed - err %d\n", status);
1566 pci_disable_msix(adapter->pdev);
1567 adapter->msix_enabled = false;
1568 return status;
1569 }
1570
1571 static int be_irq_register(struct be_adapter *adapter)
1572 {
1573 struct net_device *netdev = adapter->netdev;
1574 int status;
1575
1576 if (adapter->msix_enabled) {
1577 status = be_msix_register(adapter);
1578 if (status == 0)
1579 goto done;
1580 }
1581
1582 /* INTx */
1583 netdev->irq = adapter->pdev->irq;
1584 status = request_irq(netdev->irq, be_intx, IRQF_SHARED, netdev->name,
1585 adapter);
1586 if (status) {
1587 dev_err(&adapter->pdev->dev,
1588 "INTx request IRQ failed - err %d\n", status);
1589 return status;
1590 }
1591 done:
1592 adapter->isr_registered = true;
1593 return 0;
1594 }
1595
1596 static void be_irq_unregister(struct be_adapter *adapter)
1597 {
1598 struct net_device *netdev = adapter->netdev;
1599
1600 if (!adapter->isr_registered)
1601 return;
1602
1603 /* INTx */
1604 if (!adapter->msix_enabled) {
1605 free_irq(netdev->irq, adapter);
1606 goto done;
1607 }
1608
1609 /* MSIx */
1610 be_free_irq(adapter, &adapter->tx_eq);
1611 be_free_irq(adapter, &adapter->rx_eq);
1612 done:
1613 adapter->isr_registered = false;
1614 return;
1615 }
1616
1617 static int be_open(struct net_device *netdev)
1618 {
1619 struct be_adapter *adapter = netdev_priv(netdev);
1620 struct be_eq_obj *rx_eq = &adapter->rx_eq;
1621 struct be_eq_obj *tx_eq = &adapter->tx_eq;
1622 bool link_up;
1623 int status;
1624 u8 mac_speed;
1625 u16 link_speed;
1626
1627 /* First time posting */
1628 be_post_rx_frags(adapter);
1629
1630 napi_enable(&rx_eq->napi);
1631 napi_enable(&tx_eq->napi);
1632
1633 be_irq_register(adapter);
1634
1635 be_intr_set(adapter, true);
1636
1637 /* The evt queues are created in unarmed state; arm them */
1638 be_eq_notify(adapter, rx_eq->q.id, true, false, 0);
1639 be_eq_notify(adapter, tx_eq->q.id, true, false, 0);
1640
1641 /* Rx compl queue may be in unarmed state; rearm it */
1642 be_cq_notify(adapter, adapter->rx_obj.cq.id, true, 0);
1643
1644 status = be_cmd_link_status_query(adapter, &link_up, &mac_speed,
1645 &link_speed);
1646 if (status)
1647 goto ret_sts;
1648 be_link_status_update(adapter, link_up);
1649
1650 status = be_vid_config(adapter);
1651 if (status)
1652 goto ret_sts;
1653
1654 status = be_cmd_set_flow_control(adapter,
1655 adapter->tx_fc, adapter->rx_fc);
1656 if (status)
1657 goto ret_sts;
1658
1659 schedule_delayed_work(&adapter->work, msecs_to_jiffies(100));
1660 ret_sts:
1661 return status;
1662 }
1663
1664 static int be_setup_wol(struct be_adapter *adapter, bool enable)
1665 {
1666 struct be_dma_mem cmd;
1667 int status = 0;
1668 u8 mac[ETH_ALEN];
1669
1670 memset(mac, 0, ETH_ALEN);
1671
1672 cmd.size = sizeof(struct be_cmd_req_acpi_wol_magic_config);
1673 cmd.va = pci_alloc_consistent(adapter->pdev, cmd.size, &cmd.dma);
1674 if (cmd.va == NULL)
1675 return -1;
1676 memset(cmd.va, 0, cmd.size);
1677
1678 if (enable) {
1679 status = pci_write_config_dword(adapter->pdev,
1680 PCICFG_PM_CONTROL_OFFSET, PCICFG_PM_CONTROL_MASK);
1681 if (status) {
1682 dev_err(&adapter->pdev->dev,
1683 "Could not enable Wake-on-lan \n");
1684 pci_free_consistent(adapter->pdev, cmd.size, cmd.va,
1685 cmd.dma);
1686 return status;
1687 }
1688 status = be_cmd_enable_magic_wol(adapter,
1689 adapter->netdev->dev_addr, &cmd);
1690 pci_enable_wake(adapter->pdev, PCI_D3hot, 1);
1691 pci_enable_wake(adapter->pdev, PCI_D3cold, 1);
1692 } else {
1693 status = be_cmd_enable_magic_wol(adapter, mac, &cmd);
1694 pci_enable_wake(adapter->pdev, PCI_D3hot, 0);
1695 pci_enable_wake(adapter->pdev, PCI_D3cold, 0);
1696 }
1697
1698 pci_free_consistent(adapter->pdev, cmd.size, cmd.va, cmd.dma);
1699 return status;
1700 }
1701
1702 static int be_setup(struct be_adapter *adapter)
1703 {
1704 struct net_device *netdev = adapter->netdev;
1705 u32 cap_flags, en_flags;
1706 int status;
1707
1708 cap_flags = BE_IF_FLAGS_UNTAGGED | BE_IF_FLAGS_BROADCAST |
1709 BE_IF_FLAGS_MCAST_PROMISCUOUS |
1710 BE_IF_FLAGS_PROMISCUOUS |
1711 BE_IF_FLAGS_PASS_L3L4_ERRORS;
1712 en_flags = BE_IF_FLAGS_UNTAGGED | BE_IF_FLAGS_BROADCAST |
1713 BE_IF_FLAGS_PASS_L3L4_ERRORS;
1714
1715 status = be_cmd_if_create(adapter, cap_flags, en_flags,
1716 netdev->dev_addr, false/* pmac_invalid */,
1717 &adapter->if_handle, &adapter->pmac_id);
1718 if (status != 0)
1719 goto do_none;
1720
1721 status = be_tx_queues_create(adapter);
1722 if (status != 0)
1723 goto if_destroy;
1724
1725 status = be_rx_queues_create(adapter);
1726 if (status != 0)
1727 goto tx_qs_destroy;
1728
1729 status = be_mcc_queues_create(adapter);
1730 if (status != 0)
1731 goto rx_qs_destroy;
1732
1733 adapter->link_speed = -1;
1734
1735 return 0;
1736
1737 rx_qs_destroy:
1738 be_rx_queues_destroy(adapter);
1739 tx_qs_destroy:
1740 be_tx_queues_destroy(adapter);
1741 if_destroy:
1742 be_cmd_if_destroy(adapter, adapter->if_handle);
1743 do_none:
1744 return status;
1745 }
1746
1747 static int be_clear(struct be_adapter *adapter)
1748 {
1749 be_mcc_queues_destroy(adapter);
1750 be_rx_queues_destroy(adapter);
1751 be_tx_queues_destroy(adapter);
1752
1753 be_cmd_if_destroy(adapter, adapter->if_handle);
1754
1755 /* tell fw we're done with firing cmds */
1756 be_cmd_fw_clean(adapter);
1757 return 0;
1758 }
1759
1760 static int be_close(struct net_device *netdev)
1761 {
1762 struct be_adapter *adapter = netdev_priv(netdev);
1763 struct be_eq_obj *rx_eq = &adapter->rx_eq;
1764 struct be_eq_obj *tx_eq = &adapter->tx_eq;
1765 int vec;
1766
1767 cancel_delayed_work_sync(&adapter->work);
1768
1769 netif_stop_queue(netdev);
1770 netif_carrier_off(netdev);
1771 adapter->link_up = false;
1772
1773 be_intr_set(adapter, false);
1774
1775 if (adapter->msix_enabled) {
1776 vec = be_msix_vec_get(adapter, tx_eq->q.id);
1777 synchronize_irq(vec);
1778 vec = be_msix_vec_get(adapter, rx_eq->q.id);
1779 synchronize_irq(vec);
1780 } else {
1781 synchronize_irq(netdev->irq);
1782 }
1783 be_irq_unregister(adapter);
1784
1785 napi_disable(&rx_eq->napi);
1786 napi_disable(&tx_eq->napi);
1787
1788 /* Wait for all pending tx completions to arrive so that
1789 * all tx skbs are freed.
1790 */
1791 be_tx_compl_clean(adapter);
1792
1793 return 0;
1794 }
1795
1796 #define FW_FILE_HDR_SIGN "ServerEngines Corp. "
1797 char flash_cookie[2][16] = {"*** SE FLAS",
1798 "H DIRECTORY *** "};
1799
1800 static bool be_flash_redboot(struct be_adapter *adapter,
1801 const u8 *p)
1802 {
1803 u32 crc_offset;
1804 u8 flashed_crc[4];
1805 int status;
1806 crc_offset = FLASH_REDBOOT_START + FLASH_REDBOOT_IMAGE_MAX_SIZE - 4
1807 + sizeof(struct flash_file_hdr) - 32*1024;
1808 p += crc_offset;
1809 status = be_cmd_get_flash_crc(adapter, flashed_crc);
1810 if (status) {
1811 dev_err(&adapter->pdev->dev,
1812 "could not get crc from flash, not flashing redboot\n");
1813 return false;
1814 }
1815
1816 /*update redboot only if crc does not match*/
1817 if (!memcmp(flashed_crc, p, 4))
1818 return false;
1819 else
1820 return true;
1821
1822 }
1823
1824 static int be_flash_image(struct be_adapter *adapter,
1825 const struct firmware *fw,
1826 struct be_dma_mem *flash_cmd, u32 flash_type)
1827 {
1828 int status;
1829 u32 flash_op, image_offset = 0, total_bytes, image_size = 0;
1830 int num_bytes;
1831 const u8 *p = fw->data;
1832 struct be_cmd_write_flashrom *req = flash_cmd->va;
1833
1834 switch (flash_type) {
1835 case FLASHROM_TYPE_ISCSI_ACTIVE:
1836 image_offset = FLASH_iSCSI_PRIMARY_IMAGE_START;
1837 image_size = FLASH_IMAGE_MAX_SIZE;
1838 break;
1839 case FLASHROM_TYPE_ISCSI_BACKUP:
1840 image_offset = FLASH_iSCSI_BACKUP_IMAGE_START;
1841 image_size = FLASH_IMAGE_MAX_SIZE;
1842 break;
1843 case FLASHROM_TYPE_FCOE_FW_ACTIVE:
1844 image_offset = FLASH_FCoE_PRIMARY_IMAGE_START;
1845 image_size = FLASH_IMAGE_MAX_SIZE;
1846 break;
1847 case FLASHROM_TYPE_FCOE_FW_BACKUP:
1848 image_offset = FLASH_FCoE_BACKUP_IMAGE_START;
1849 image_size = FLASH_IMAGE_MAX_SIZE;
1850 break;
1851 case FLASHROM_TYPE_BIOS:
1852 image_offset = FLASH_iSCSI_BIOS_START;
1853 image_size = FLASH_BIOS_IMAGE_MAX_SIZE;
1854 break;
1855 case FLASHROM_TYPE_FCOE_BIOS:
1856 image_offset = FLASH_FCoE_BIOS_START;
1857 image_size = FLASH_BIOS_IMAGE_MAX_SIZE;
1858 break;
1859 case FLASHROM_TYPE_PXE_BIOS:
1860 image_offset = FLASH_PXE_BIOS_START;
1861 image_size = FLASH_BIOS_IMAGE_MAX_SIZE;
1862 break;
1863 case FLASHROM_TYPE_REDBOOT:
1864 if (!be_flash_redboot(adapter, fw->data))
1865 return 0;
1866 image_offset = FLASH_REDBOOT_ISM_START;
1867 image_size = FLASH_REDBOOT_IMAGE_MAX_SIZE;
1868 break;
1869 default:
1870 return 0;
1871 }
1872
1873 p += sizeof(struct flash_file_hdr) + image_offset;
1874 if (p + image_size > fw->data + fw->size)
1875 return -1;
1876
1877 total_bytes = image_size;
1878
1879 while (total_bytes) {
1880 if (total_bytes > 32*1024)
1881 num_bytes = 32*1024;
1882 else
1883 num_bytes = total_bytes;
1884 total_bytes -= num_bytes;
1885
1886 if (!total_bytes)
1887 flash_op = FLASHROM_OPER_FLASH;
1888 else
1889 flash_op = FLASHROM_OPER_SAVE;
1890 memcpy(req->params.data_buf, p, num_bytes);
1891 p += num_bytes;
1892 status = be_cmd_write_flashrom(adapter, flash_cmd,
1893 flash_type, flash_op, num_bytes);
1894 if (status) {
1895 dev_err(&adapter->pdev->dev,
1896 "cmd to write to flash rom failed. type/op %d/%d\n",
1897 flash_type, flash_op);
1898 return -1;
1899 }
1900 yield();
1901 }
1902
1903 return 0;
1904 }
1905
1906 int be_load_fw(struct be_adapter *adapter, u8 *func)
1907 {
1908 char fw_file[ETHTOOL_FLASH_MAX_FILENAME];
1909 const struct firmware *fw;
1910 struct flash_file_hdr *fhdr;
1911 struct flash_section_info *fsec = NULL;
1912 struct be_dma_mem flash_cmd;
1913 int status;
1914 const u8 *p;
1915 bool entry_found = false;
1916 int flash_type;
1917 char fw_ver[FW_VER_LEN];
1918 char fw_cfg;
1919
1920 status = be_cmd_get_fw_ver(adapter, fw_ver);
1921 if (status)
1922 return status;
1923
1924 fw_cfg = *(fw_ver + 2);
1925 if (fw_cfg == '0')
1926 fw_cfg = '1';
1927 strcpy(fw_file, func);
1928
1929 status = request_firmware(&fw, fw_file, &adapter->pdev->dev);
1930 if (status)
1931 goto fw_exit;
1932
1933 p = fw->data;
1934 fhdr = (struct flash_file_hdr *) p;
1935 if (memcmp(fhdr->sign, FW_FILE_HDR_SIGN, strlen(FW_FILE_HDR_SIGN))) {
1936 dev_err(&adapter->pdev->dev,
1937 "Firmware(%s) load error (signature did not match)\n",
1938 fw_file);
1939 status = -1;
1940 goto fw_exit;
1941 }
1942
1943 dev_info(&adapter->pdev->dev, "Flashing firmware file %s\n", fw_file);
1944
1945 p += sizeof(struct flash_file_hdr);
1946 while (p < (fw->data + fw->size)) {
1947 fsec = (struct flash_section_info *)p;
1948 if (!memcmp(flash_cookie, fsec->cookie, sizeof(flash_cookie))) {
1949 entry_found = true;
1950 break;
1951 }
1952 p += 32;
1953 }
1954
1955 if (!entry_found) {
1956 status = -1;
1957 dev_err(&adapter->pdev->dev,
1958 "Flash cookie not found in firmware image\n");
1959 goto fw_exit;
1960 }
1961
1962 flash_cmd.size = sizeof(struct be_cmd_write_flashrom) + 32*1024;
1963 flash_cmd.va = pci_alloc_consistent(adapter->pdev, flash_cmd.size,
1964 &flash_cmd.dma);
1965 if (!flash_cmd.va) {
1966 status = -ENOMEM;
1967 dev_err(&adapter->pdev->dev,
1968 "Memory allocation failure while flashing\n");
1969 goto fw_exit;
1970 }
1971
1972 for (flash_type = FLASHROM_TYPE_ISCSI_ACTIVE;
1973 flash_type <= FLASHROM_TYPE_FCOE_FW_BACKUP; flash_type++) {
1974 status = be_flash_image(adapter, fw, &flash_cmd,
1975 flash_type);
1976 if (status)
1977 break;
1978 }
1979
1980 pci_free_consistent(adapter->pdev, flash_cmd.size, flash_cmd.va,
1981 flash_cmd.dma);
1982 if (status) {
1983 dev_err(&adapter->pdev->dev, "Firmware load error\n");
1984 goto fw_exit;
1985 }
1986
1987 dev_info(&adapter->pdev->dev, "Firmware flashed successfully\n");
1988
1989 fw_exit:
1990 release_firmware(fw);
1991 return status;
1992 }
1993
1994 static struct net_device_ops be_netdev_ops = {
1995 .ndo_open = be_open,
1996 .ndo_stop = be_close,
1997 .ndo_start_xmit = be_xmit,
1998 .ndo_get_stats = be_get_stats,
1999 .ndo_set_rx_mode = be_set_multicast_list,
2000 .ndo_set_mac_address = be_mac_addr_set,
2001 .ndo_change_mtu = be_change_mtu,
2002 .ndo_validate_addr = eth_validate_addr,
2003 .ndo_vlan_rx_register = be_vlan_register,
2004 .ndo_vlan_rx_add_vid = be_vlan_add_vid,
2005 .ndo_vlan_rx_kill_vid = be_vlan_rem_vid,
2006 };
2007
2008 static void be_netdev_init(struct net_device *netdev)
2009 {
2010 struct be_adapter *adapter = netdev_priv(netdev);
2011
2012 netdev->features |= NETIF_F_SG | NETIF_F_HW_VLAN_RX | NETIF_F_TSO |
2013 NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_FILTER | NETIF_F_HW_CSUM |
2014 NETIF_F_GRO;
2015
2016 netdev->vlan_features |= NETIF_F_SG | NETIF_F_TSO | NETIF_F_HW_CSUM;
2017
2018 netdev->flags |= IFF_MULTICAST;
2019
2020 adapter->rx_csum = true;
2021
2022 /* Default settings for Rx and Tx flow control */
2023 adapter->rx_fc = true;
2024 adapter->tx_fc = true;
2025
2026 netif_set_gso_max_size(netdev, 65535);
2027
2028 BE_SET_NETDEV_OPS(netdev, &be_netdev_ops);
2029
2030 SET_ETHTOOL_OPS(netdev, &be_ethtool_ops);
2031
2032 netif_napi_add(netdev, &adapter->rx_eq.napi, be_poll_rx,
2033 BE_NAPI_WEIGHT);
2034 netif_napi_add(netdev, &adapter->tx_eq.napi, be_poll_tx_mcc,
2035 BE_NAPI_WEIGHT);
2036
2037 netif_carrier_off(netdev);
2038 netif_stop_queue(netdev);
2039 }
2040
2041 static void be_unmap_pci_bars(struct be_adapter *adapter)
2042 {
2043 if (adapter->csr)
2044 iounmap(adapter->csr);
2045 if (adapter->db)
2046 iounmap(adapter->db);
2047 if (adapter->pcicfg)
2048 iounmap(adapter->pcicfg);
2049 }
2050
2051 static int be_map_pci_bars(struct be_adapter *adapter)
2052 {
2053 u8 __iomem *addr;
2054 int pcicfg_reg;
2055
2056 addr = ioremap_nocache(pci_resource_start(adapter->pdev, 2),
2057 pci_resource_len(adapter->pdev, 2));
2058 if (addr == NULL)
2059 return -ENOMEM;
2060 adapter->csr = addr;
2061
2062 addr = ioremap_nocache(pci_resource_start(adapter->pdev, 4),
2063 128 * 1024);
2064 if (addr == NULL)
2065 goto pci_map_err;
2066 adapter->db = addr;
2067
2068 if (adapter->generation == BE_GEN2)
2069 pcicfg_reg = 1;
2070 else
2071 pcicfg_reg = 0;
2072
2073 addr = ioremap_nocache(pci_resource_start(adapter->pdev, pcicfg_reg),
2074 pci_resource_len(adapter->pdev, pcicfg_reg));
2075 if (addr == NULL)
2076 goto pci_map_err;
2077 adapter->pcicfg = addr;
2078
2079 return 0;
2080 pci_map_err:
2081 be_unmap_pci_bars(adapter);
2082 return -ENOMEM;
2083 }
2084
2085
2086 static void be_ctrl_cleanup(struct be_adapter *adapter)
2087 {
2088 struct be_dma_mem *mem = &adapter->mbox_mem_alloced;
2089
2090 be_unmap_pci_bars(adapter);
2091
2092 if (mem->va)
2093 pci_free_consistent(adapter->pdev, mem->size,
2094 mem->va, mem->dma);
2095
2096 mem = &adapter->mc_cmd_mem;
2097 if (mem->va)
2098 pci_free_consistent(adapter->pdev, mem->size,
2099 mem->va, mem->dma);
2100 }
2101
2102 static int be_ctrl_init(struct be_adapter *adapter)
2103 {
2104 struct be_dma_mem *mbox_mem_alloc = &adapter->mbox_mem_alloced;
2105 struct be_dma_mem *mbox_mem_align = &adapter->mbox_mem;
2106 struct be_dma_mem *mc_cmd_mem = &adapter->mc_cmd_mem;
2107 int status;
2108
2109 status = be_map_pci_bars(adapter);
2110 if (status)
2111 goto done;
2112
2113 mbox_mem_alloc->size = sizeof(struct be_mcc_mailbox) + 16;
2114 mbox_mem_alloc->va = pci_alloc_consistent(adapter->pdev,
2115 mbox_mem_alloc->size, &mbox_mem_alloc->dma);
2116 if (!mbox_mem_alloc->va) {
2117 status = -ENOMEM;
2118 goto unmap_pci_bars;
2119 }
2120
2121 mbox_mem_align->size = sizeof(struct be_mcc_mailbox);
2122 mbox_mem_align->va = PTR_ALIGN(mbox_mem_alloc->va, 16);
2123 mbox_mem_align->dma = PTR_ALIGN(mbox_mem_alloc->dma, 16);
2124 memset(mbox_mem_align->va, 0, sizeof(struct be_mcc_mailbox));
2125
2126 mc_cmd_mem->size = sizeof(struct be_cmd_req_mcast_mac_config);
2127 mc_cmd_mem->va = pci_alloc_consistent(adapter->pdev, mc_cmd_mem->size,
2128 &mc_cmd_mem->dma);
2129 if (mc_cmd_mem->va == NULL) {
2130 status = -ENOMEM;
2131 goto free_mbox;
2132 }
2133 memset(mc_cmd_mem->va, 0, mc_cmd_mem->size);
2134
2135 spin_lock_init(&adapter->mbox_lock);
2136 spin_lock_init(&adapter->mcc_lock);
2137 spin_lock_init(&adapter->mcc_cq_lock);
2138
2139 return 0;
2140
2141 free_mbox:
2142 pci_free_consistent(adapter->pdev, mbox_mem_alloc->size,
2143 mbox_mem_alloc->va, mbox_mem_alloc->dma);
2144
2145 unmap_pci_bars:
2146 be_unmap_pci_bars(adapter);
2147
2148 done:
2149 return status;
2150 }
2151
2152 static void be_stats_cleanup(struct be_adapter *adapter)
2153 {
2154 struct be_stats_obj *stats = &adapter->stats;
2155 struct be_dma_mem *cmd = &stats->cmd;
2156
2157 if (cmd->va)
2158 pci_free_consistent(adapter->pdev, cmd->size,
2159 cmd->va, cmd->dma);
2160 }
2161
2162 static int be_stats_init(struct be_adapter *adapter)
2163 {
2164 struct be_stats_obj *stats = &adapter->stats;
2165 struct be_dma_mem *cmd = &stats->cmd;
2166
2167 cmd->size = sizeof(struct be_cmd_req_get_stats);
2168 cmd->va = pci_alloc_consistent(adapter->pdev, cmd->size, &cmd->dma);
2169 if (cmd->va == NULL)
2170 return -1;
2171 memset(cmd->va, 0, cmd->size);
2172 return 0;
2173 }
2174
2175 static void __devexit be_remove(struct pci_dev *pdev)
2176 {
2177 struct be_adapter *adapter = pci_get_drvdata(pdev);
2178
2179 if (!adapter)
2180 return;
2181
2182 unregister_netdev(adapter->netdev);
2183
2184 be_clear(adapter);
2185
2186 be_stats_cleanup(adapter);
2187
2188 be_ctrl_cleanup(adapter);
2189
2190 be_msix_disable(adapter);
2191
2192 pci_set_drvdata(pdev, NULL);
2193 pci_release_regions(pdev);
2194 pci_disable_device(pdev);
2195
2196 free_netdev(adapter->netdev);
2197 }
2198
2199 static int be_get_config(struct be_adapter *adapter)
2200 {
2201 int status;
2202 u8 mac[ETH_ALEN];
2203
2204 status = be_cmd_get_fw_ver(adapter, adapter->fw_ver);
2205 if (status)
2206 return status;
2207
2208 status = be_cmd_query_fw_cfg(adapter,
2209 &adapter->port_num, &adapter->cap);
2210 if (status)
2211 return status;
2212
2213 memset(mac, 0, ETH_ALEN);
2214 status = be_cmd_mac_addr_query(adapter, mac,
2215 MAC_ADDRESS_TYPE_NETWORK, true /*permanent */, 0);
2216 if (status)
2217 return status;
2218
2219 if (!is_valid_ether_addr(mac))
2220 return -EADDRNOTAVAIL;
2221
2222 memcpy(adapter->netdev->dev_addr, mac, ETH_ALEN);
2223 memcpy(adapter->netdev->perm_addr, mac, ETH_ALEN);
2224
2225 return 0;
2226 }
2227
2228 static int __devinit be_probe(struct pci_dev *pdev,
2229 const struct pci_device_id *pdev_id)
2230 {
2231 int status = 0;
2232 struct be_adapter *adapter;
2233 struct net_device *netdev;
2234
2235 status = pci_enable_device(pdev);
2236 if (status)
2237 goto do_none;
2238
2239 status = pci_request_regions(pdev, DRV_NAME);
2240 if (status)
2241 goto disable_dev;
2242 pci_set_master(pdev);
2243
2244 netdev = alloc_etherdev(sizeof(struct be_adapter));
2245 if (netdev == NULL) {
2246 status = -ENOMEM;
2247 goto rel_reg;
2248 }
2249 adapter = netdev_priv(netdev);
2250
2251 switch (pdev->device) {
2252 case BE_DEVICE_ID1:
2253 case OC_DEVICE_ID1:
2254 adapter->generation = BE_GEN2;
2255 break;
2256 case BE_DEVICE_ID2:
2257 case OC_DEVICE_ID2:
2258 adapter->generation = BE_GEN3;
2259 break;
2260 default:
2261 adapter->generation = 0;
2262 }
2263
2264 adapter->pdev = pdev;
2265 pci_set_drvdata(pdev, adapter);
2266 adapter->netdev = netdev;
2267 be_netdev_init(netdev);
2268 SET_NETDEV_DEV(netdev, &pdev->dev);
2269
2270 be_msix_enable(adapter);
2271
2272 status = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
2273 if (!status) {
2274 netdev->features |= NETIF_F_HIGHDMA;
2275 } else {
2276 status = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
2277 if (status) {
2278 dev_err(&pdev->dev, "Could not set PCI DMA Mask\n");
2279 goto free_netdev;
2280 }
2281 }
2282
2283 status = be_ctrl_init(adapter);
2284 if (status)
2285 goto free_netdev;
2286
2287 /* sync up with fw's ready state */
2288 status = be_cmd_POST(adapter);
2289 if (status)
2290 goto ctrl_clean;
2291
2292 /* tell fw we're ready to fire cmds */
2293 status = be_cmd_fw_init(adapter);
2294 if (status)
2295 goto ctrl_clean;
2296
2297 status = be_cmd_reset_function(adapter);
2298 if (status)
2299 goto ctrl_clean;
2300
2301 status = be_stats_init(adapter);
2302 if (status)
2303 goto ctrl_clean;
2304
2305 status = be_get_config(adapter);
2306 if (status)
2307 goto stats_clean;
2308
2309 INIT_DELAYED_WORK(&adapter->work, be_worker);
2310
2311 status = be_setup(adapter);
2312 if (status)
2313 goto stats_clean;
2314
2315 status = register_netdev(netdev);
2316 if (status != 0)
2317 goto unsetup;
2318
2319 dev_info(&pdev->dev, "%s port %d\n", nic_name(pdev), adapter->port_num);
2320 return 0;
2321
2322 unsetup:
2323 be_clear(adapter);
2324 stats_clean:
2325 be_stats_cleanup(adapter);
2326 ctrl_clean:
2327 be_ctrl_cleanup(adapter);
2328 free_netdev:
2329 be_msix_disable(adapter);
2330 free_netdev(adapter->netdev);
2331 pci_set_drvdata(pdev, NULL);
2332 rel_reg:
2333 pci_release_regions(pdev);
2334 disable_dev:
2335 pci_disable_device(pdev);
2336 do_none:
2337 dev_err(&pdev->dev, "%s initialization failed\n", nic_name(pdev));
2338 return status;
2339 }
2340
2341 static int be_suspend(struct pci_dev *pdev, pm_message_t state)
2342 {
2343 struct be_adapter *adapter = pci_get_drvdata(pdev);
2344 struct net_device *netdev = adapter->netdev;
2345
2346 if (adapter->wol)
2347 be_setup_wol(adapter, true);
2348
2349 netif_device_detach(netdev);
2350 if (netif_running(netdev)) {
2351 rtnl_lock();
2352 be_close(netdev);
2353 rtnl_unlock();
2354 }
2355 be_cmd_get_flow_control(adapter, &adapter->tx_fc, &adapter->rx_fc);
2356 be_clear(adapter);
2357
2358 pci_save_state(pdev);
2359 pci_disable_device(pdev);
2360 pci_set_power_state(pdev, pci_choose_state(pdev, state));
2361 return 0;
2362 }
2363
2364 static int be_resume(struct pci_dev *pdev)
2365 {
2366 int status = 0;
2367 struct be_adapter *adapter = pci_get_drvdata(pdev);
2368 struct net_device *netdev = adapter->netdev;
2369
2370 netif_device_detach(netdev);
2371
2372 status = pci_enable_device(pdev);
2373 if (status)
2374 return status;
2375
2376 pci_set_power_state(pdev, 0);
2377 pci_restore_state(pdev);
2378
2379 /* tell fw we're ready to fire cmds */
2380 status = be_cmd_fw_init(adapter);
2381 if (status)
2382 return status;
2383
2384 be_setup(adapter);
2385 if (netif_running(netdev)) {
2386 rtnl_lock();
2387 be_open(netdev);
2388 rtnl_unlock();
2389 }
2390 netif_device_attach(netdev);
2391
2392 if (adapter->wol)
2393 be_setup_wol(adapter, false);
2394 return 0;
2395 }
2396
2397 static struct pci_driver be_driver = {
2398 .name = DRV_NAME,
2399 .id_table = be_dev_ids,
2400 .probe = be_probe,
2401 .remove = be_remove,
2402 .suspend = be_suspend,
2403 .resume = be_resume
2404 };
2405
2406 static int __init be_init_module(void)
2407 {
2408 if (rx_frag_size != 8192 && rx_frag_size != 4096 &&
2409 rx_frag_size != 2048) {
2410 printk(KERN_WARNING DRV_NAME
2411 " : Module param rx_frag_size must be 2048/4096/8192."
2412 " Using 2048\n");
2413 rx_frag_size = 2048;
2414 }
2415
2416 return pci_register_driver(&be_driver);
2417 }
2418 module_init(be_init_module);
2419
2420 static void __exit be_exit_module(void)
2421 {
2422 pci_unregister_driver(&be_driver);
2423 }
2424 module_exit(be_exit_module);
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