2 * at91_can.c - CAN network driver for AT91 SoC CAN controller
4 * (C) 2007 by Hans J. Koch <hjk@hansjkoch.de>
5 * (C) 2008, 2009, 2010, 2011 by Marc Kleine-Budde <kernel@pengutronix.de>
7 * This software may be distributed under the terms of the GNU General
8 * Public License ("GPL") version 2 as distributed in the 'COPYING'
9 * file from the main directory of the linux kernel source.
11 * Send feedback to <socketcan-users@lists.berlios.de>
14 * Your platform definition file should specify something like:
16 * static struct at91_can_data ek_can_data = {
17 * transceiver_switch = sam9263ek_transceiver_switch,
20 * at91_add_device_can(&ek_can_data);
24 #include <linux/clk.h>
25 #include <linux/errno.h>
26 #include <linux/if_arp.h>
27 #include <linux/init.h>
28 #include <linux/interrupt.h>
29 #include <linux/kernel.h>
30 #include <linux/module.h>
31 #include <linux/netdevice.h>
32 #include <linux/platform_device.h>
33 #include <linux/skbuff.h>
34 #include <linux/spinlock.h>
35 #include <linux/string.h>
36 #include <linux/types.h>
38 #include <linux/can/dev.h>
39 #include <linux/can/error.h>
41 #include <mach/board.h>
43 #define AT91_NAPI_WEIGHT 11
49 #define AT91_MB_RX_NUM 11
50 #define AT91_MB_TX_SHIFT 2
52 #define AT91_MB_RX_FIRST 1
53 #define AT91_MB_RX_LAST (AT91_MB_RX_FIRST + AT91_MB_RX_NUM - 1)
55 #define AT91_MB_RX_MASK(i) ((1 << (i)) - 1)
56 #define AT91_MB_RX_SPLIT 8
57 #define AT91_MB_RX_LOW_LAST (AT91_MB_RX_SPLIT - 1)
58 #define AT91_MB_RX_LOW_MASK (AT91_MB_RX_MASK(AT91_MB_RX_SPLIT) & \
59 ~AT91_MB_RX_MASK(AT91_MB_RX_FIRST))
61 #define AT91_MB_TX_NUM (1 << AT91_MB_TX_SHIFT)
62 #define AT91_MB_TX_FIRST (AT91_MB_RX_LAST + 1)
63 #define AT91_MB_TX_LAST (AT91_MB_TX_FIRST + AT91_MB_TX_NUM - 1)
65 #define AT91_NEXT_PRIO_SHIFT (AT91_MB_TX_SHIFT)
66 #define AT91_NEXT_PRIO_MASK (0xf << AT91_MB_TX_SHIFT)
67 #define AT91_NEXT_MB_MASK (AT91_MB_TX_NUM - 1)
68 #define AT91_NEXT_MASK ((AT91_MB_TX_NUM - 1) | AT91_NEXT_PRIO_MASK)
70 /* Common registers */
85 /* Mailbox registers (0 <= i <= 15) */
86 #define AT91_MMR(i) (enum at91_reg)(0x200 + ((i) * 0x20))
87 #define AT91_MAM(i) (enum at91_reg)(0x204 + ((i) * 0x20))
88 #define AT91_MID(i) (enum at91_reg)(0x208 + ((i) * 0x20))
89 #define AT91_MFID(i) (enum at91_reg)(0x20C + ((i) * 0x20))
90 #define AT91_MSR(i) (enum at91_reg)(0x210 + ((i) * 0x20))
91 #define AT91_MDL(i) (enum at91_reg)(0x214 + ((i) * 0x20))
92 #define AT91_MDH(i) (enum at91_reg)(0x218 + ((i) * 0x20))
93 #define AT91_MCR(i) (enum at91_reg)(0x21C + ((i) * 0x20))
96 #define AT91_MR_CANEN BIT(0)
97 #define AT91_MR_LPM BIT(1)
98 #define AT91_MR_ABM BIT(2)
99 #define AT91_MR_OVL BIT(3)
100 #define AT91_MR_TEOF BIT(4)
101 #define AT91_MR_TTM BIT(5)
102 #define AT91_MR_TIMFRZ BIT(6)
103 #define AT91_MR_DRPT BIT(7)
105 #define AT91_SR_RBSY BIT(29)
107 #define AT91_MMR_PRIO_SHIFT (16)
109 #define AT91_MID_MIDE BIT(29)
111 #define AT91_MSR_MRTR BIT(20)
112 #define AT91_MSR_MABT BIT(22)
113 #define AT91_MSR_MRDY BIT(23)
114 #define AT91_MSR_MMI BIT(24)
116 #define AT91_MCR_MRTR BIT(20)
117 #define AT91_MCR_MTCR BIT(23)
121 AT91_MB_MODE_DISABLED
= 0,
123 AT91_MB_MODE_RX_OVRWR
= 2,
125 AT91_MB_MODE_CONSUMER
= 4,
126 AT91_MB_MODE_PRODUCER
= 5,
129 /* Interrupt mask bits */
130 #define AT91_IRQ_MB_RX ((1 << (AT91_MB_RX_LAST + 1)) \
131 - (1 << AT91_MB_RX_FIRST))
132 #define AT91_IRQ_MB_TX ((1 << (AT91_MB_TX_LAST + 1)) \
133 - (1 << AT91_MB_TX_FIRST))
134 #define AT91_IRQ_MB_ALL (AT91_IRQ_MB_RX | AT91_IRQ_MB_TX)
136 #define AT91_IRQ_ERRA (1 << 16)
137 #define AT91_IRQ_WARN (1 << 17)
138 #define AT91_IRQ_ERRP (1 << 18)
139 #define AT91_IRQ_BOFF (1 << 19)
140 #define AT91_IRQ_SLEEP (1 << 20)
141 #define AT91_IRQ_WAKEUP (1 << 21)
142 #define AT91_IRQ_TOVF (1 << 22)
143 #define AT91_IRQ_TSTP (1 << 23)
144 #define AT91_IRQ_CERR (1 << 24)
145 #define AT91_IRQ_SERR (1 << 25)
146 #define AT91_IRQ_AERR (1 << 26)
147 #define AT91_IRQ_FERR (1 << 27)
148 #define AT91_IRQ_BERR (1 << 28)
150 #define AT91_IRQ_ERR_ALL (0x1fff0000)
151 #define AT91_IRQ_ERR_FRAME (AT91_IRQ_CERR | AT91_IRQ_SERR | \
152 AT91_IRQ_AERR | AT91_IRQ_FERR | AT91_IRQ_BERR)
153 #define AT91_IRQ_ERR_LINE (AT91_IRQ_ERRA | AT91_IRQ_WARN | \
154 AT91_IRQ_ERRP | AT91_IRQ_BOFF)
156 #define AT91_IRQ_ALL (0x1fffffff)
159 struct can_priv can
; /* must be the first member! */
160 struct net_device
*dev
;
161 struct napi_struct napi
;
163 void __iomem
*reg_base
;
166 unsigned int tx_next
;
167 unsigned int tx_echo
;
168 unsigned int rx_next
;
171 struct at91_can_data
*pdata
;
174 static struct can_bittiming_const at91_bittiming_const
= {
175 .name
= KBUILD_MODNAME
,
186 static inline int get_tx_next_mb(const struct at91_priv
*priv
)
188 return (priv
->tx_next
& AT91_NEXT_MB_MASK
) + AT91_MB_TX_FIRST
;
191 static inline int get_tx_next_prio(const struct at91_priv
*priv
)
193 return (priv
->tx_next
>> AT91_NEXT_PRIO_SHIFT
) & 0xf;
196 static inline int get_tx_echo_mb(const struct at91_priv
*priv
)
198 return (priv
->tx_echo
& AT91_NEXT_MB_MASK
) + AT91_MB_TX_FIRST
;
201 static inline u32
at91_read(const struct at91_priv
*priv
, enum at91_reg reg
)
203 return __raw_readl(priv
->reg_base
+ reg
);
206 static inline void at91_write(const struct at91_priv
*priv
, enum at91_reg reg
,
209 __raw_writel(value
, priv
->reg_base
+ reg
);
212 static inline void set_mb_mode_prio(const struct at91_priv
*priv
,
213 unsigned int mb
, enum at91_mb_mode mode
, int prio
)
215 at91_write(priv
, AT91_MMR(mb
), (mode
<< 24) | (prio
<< 16));
218 static inline void set_mb_mode(const struct at91_priv
*priv
, unsigned int mb
,
219 enum at91_mb_mode mode
)
221 set_mb_mode_prio(priv
, mb
, mode
, 0);
225 * Swtich transceiver on or off
227 static void at91_transceiver_switch(const struct at91_priv
*priv
, int on
)
229 if (priv
->pdata
&& priv
->pdata
->transceiver_switch
)
230 priv
->pdata
->transceiver_switch(on
);
233 static void at91_setup_mailboxes(struct net_device
*dev
)
235 struct at91_priv
*priv
= netdev_priv(dev
);
239 * Due to a chip bug (errata 50.2.6.3 & 50.3.5.3) the first
240 * mailbox is disabled. The next 11 mailboxes are used as a
241 * reception FIFO. The last mailbox is configured with
242 * overwrite option. The overwrite flag indicates a FIFO
245 for (i
= 0; i
< AT91_MB_RX_FIRST
; i
++)
246 set_mb_mode(priv
, i
, AT91_MB_MODE_DISABLED
);
247 for (i
= AT91_MB_RX_FIRST
; i
< AT91_MB_RX_LAST
; i
++)
248 set_mb_mode(priv
, i
, AT91_MB_MODE_RX
);
249 set_mb_mode(priv
, AT91_MB_RX_LAST
, AT91_MB_MODE_RX_OVRWR
);
251 /* reset acceptance mask and id register */
252 for (i
= AT91_MB_RX_FIRST
; i
<= AT91_MB_RX_LAST
; i
++) {
253 at91_write(priv
, AT91_MAM(i
), 0x0 );
254 at91_write(priv
, AT91_MID(i
), AT91_MID_MIDE
);
257 /* The last 4 mailboxes are used for transmitting. */
258 for (i
= AT91_MB_TX_FIRST
; i
<= AT91_MB_TX_LAST
; i
++)
259 set_mb_mode_prio(priv
, i
, AT91_MB_MODE_TX
, 0);
261 /* Reset tx and rx helper pointers */
262 priv
->tx_next
= priv
->tx_echo
= 0;
263 priv
->rx_next
= AT91_MB_RX_FIRST
;
266 static int at91_set_bittiming(struct net_device
*dev
)
268 const struct at91_priv
*priv
= netdev_priv(dev
);
269 const struct can_bittiming
*bt
= &priv
->can
.bittiming
;
272 reg_br
= ((priv
->can
.ctrlmode
& CAN_CTRLMODE_3_SAMPLES
) ? 1 << 24 : 0) |
273 ((bt
->brp
- 1) << 16) | ((bt
->sjw
- 1) << 12) |
274 ((bt
->prop_seg
- 1) << 8) | ((bt
->phase_seg1
- 1) << 4) |
275 ((bt
->phase_seg2
- 1) << 0);
277 netdev_info(dev
, "writing AT91_BR: 0x%08x\n", reg_br
);
279 at91_write(priv
, AT91_BR
, reg_br
);
284 static int at91_get_berr_counter(const struct net_device
*dev
,
285 struct can_berr_counter
*bec
)
287 const struct at91_priv
*priv
= netdev_priv(dev
);
288 u32 reg_ecr
= at91_read(priv
, AT91_ECR
);
290 bec
->rxerr
= reg_ecr
& 0xff;
291 bec
->txerr
= reg_ecr
>> 16;
296 static void at91_chip_start(struct net_device
*dev
)
298 struct at91_priv
*priv
= netdev_priv(dev
);
301 /* disable interrupts */
302 at91_write(priv
, AT91_IDR
, AT91_IRQ_ALL
);
305 reg_mr
= at91_read(priv
, AT91_MR
);
306 at91_write(priv
, AT91_MR
, reg_mr
& ~AT91_MR_CANEN
);
308 at91_set_bittiming(dev
);
309 at91_setup_mailboxes(dev
);
310 at91_transceiver_switch(priv
, 1);
313 at91_write(priv
, AT91_MR
, AT91_MR_CANEN
);
315 priv
->can
.state
= CAN_STATE_ERROR_ACTIVE
;
317 /* Enable interrupts */
318 reg_ier
= AT91_IRQ_MB_RX
| AT91_IRQ_ERRP
| AT91_IRQ_ERR_FRAME
;
319 at91_write(priv
, AT91_IDR
, AT91_IRQ_ALL
);
320 at91_write(priv
, AT91_IER
, reg_ier
);
323 static void at91_chip_stop(struct net_device
*dev
, enum can_state state
)
325 struct at91_priv
*priv
= netdev_priv(dev
);
328 /* disable interrupts */
329 at91_write(priv
, AT91_IDR
, AT91_IRQ_ALL
);
331 reg_mr
= at91_read(priv
, AT91_MR
);
332 at91_write(priv
, AT91_MR
, reg_mr
& ~AT91_MR_CANEN
);
334 at91_transceiver_switch(priv
, 0);
335 priv
->can
.state
= state
;
339 * theory of operation:
341 * According to the datasheet priority 0 is the highest priority, 15
342 * is the lowest. If two mailboxes have the same priority level the
343 * message of the mailbox with the lowest number is sent first.
345 * We use the first TX mailbox (AT91_MB_TX_FIRST) with prio 0, then
346 * the next mailbox with prio 0, and so on, until all mailboxes are
347 * used. Then we start from the beginning with mailbox
348 * AT91_MB_TX_FIRST, but with prio 1, mailbox AT91_MB_TX_FIRST + 1
349 * prio 1. When we reach the last mailbox with prio 15, we have to
350 * stop sending, waiting for all messages to be delivered, then start
351 * again with mailbox AT91_MB_TX_FIRST prio 0.
353 * We use the priv->tx_next as counter for the next transmission
354 * mailbox, but without the offset AT91_MB_TX_FIRST. The lower bits
355 * encode the mailbox number, the upper 4 bits the mailbox priority:
357 * priv->tx_next = (prio << AT91_NEXT_PRIO_SHIFT) ||
358 * (mb - AT91_MB_TX_FIRST);
361 static netdev_tx_t
at91_start_xmit(struct sk_buff
*skb
, struct net_device
*dev
)
363 struct at91_priv
*priv
= netdev_priv(dev
);
364 struct net_device_stats
*stats
= &dev
->stats
;
365 struct can_frame
*cf
= (struct can_frame
*)skb
->data
;
366 unsigned int mb
, prio
;
367 u32 reg_mid
, reg_mcr
;
369 if (can_dropped_invalid_skb(dev
, skb
))
372 mb
= get_tx_next_mb(priv
);
373 prio
= get_tx_next_prio(priv
);
375 if (unlikely(!(at91_read(priv
, AT91_MSR(mb
)) & AT91_MSR_MRDY
))) {
376 netif_stop_queue(dev
);
378 netdev_err(dev
, "BUG! TX buffer full when queue awake!\n");
379 return NETDEV_TX_BUSY
;
382 if (cf
->can_id
& CAN_EFF_FLAG
)
383 reg_mid
= (cf
->can_id
& CAN_EFF_MASK
) | AT91_MID_MIDE
;
385 reg_mid
= (cf
->can_id
& CAN_SFF_MASK
) << 18;
387 reg_mcr
= ((cf
->can_id
& CAN_RTR_FLAG
) ? AT91_MCR_MRTR
: 0) |
388 (cf
->can_dlc
<< 16) | AT91_MCR_MTCR
;
390 /* disable MB while writing ID (see datasheet) */
391 set_mb_mode(priv
, mb
, AT91_MB_MODE_DISABLED
);
392 at91_write(priv
, AT91_MID(mb
), reg_mid
);
393 set_mb_mode_prio(priv
, mb
, AT91_MB_MODE_TX
, prio
);
395 at91_write(priv
, AT91_MDL(mb
), *(u32
*)(cf
->data
+ 0));
396 at91_write(priv
, AT91_MDH(mb
), *(u32
*)(cf
->data
+ 4));
398 /* This triggers transmission */
399 at91_write(priv
, AT91_MCR(mb
), reg_mcr
);
401 stats
->tx_bytes
+= cf
->can_dlc
;
403 /* _NOTE_: substract AT91_MB_TX_FIRST offset from mb! */
404 can_put_echo_skb(skb
, dev
, mb
- AT91_MB_TX_FIRST
);
407 * we have to stop the queue and deliver all messages in case
408 * of a prio+mb counter wrap around. This is the case if
409 * tx_next buffer prio and mailbox equals 0.
411 * also stop the queue if next buffer is still in use
415 if (!(at91_read(priv
, AT91_MSR(get_tx_next_mb(priv
))) &
417 (priv
->tx_next
& AT91_NEXT_MASK
) == 0)
418 netif_stop_queue(dev
);
420 /* Enable interrupt for this mailbox */
421 at91_write(priv
, AT91_IER
, 1 << mb
);
427 * at91_activate_rx_low - activate lower rx mailboxes
430 * Reenables the lower mailboxes for reception of new CAN messages
432 static inline void at91_activate_rx_low(const struct at91_priv
*priv
)
434 u32 mask
= AT91_MB_RX_LOW_MASK
;
435 at91_write(priv
, AT91_TCR
, mask
);
439 * at91_activate_rx_mb - reactive single rx mailbox
441 * @mb: mailbox to reactivate
443 * Reenables given mailbox for reception of new CAN messages
445 static inline void at91_activate_rx_mb(const struct at91_priv
*priv
,
449 at91_write(priv
, AT91_TCR
, mask
);
453 * at91_rx_overflow_err - send error frame due to rx overflow
456 static void at91_rx_overflow_err(struct net_device
*dev
)
458 struct net_device_stats
*stats
= &dev
->stats
;
460 struct can_frame
*cf
;
462 netdev_dbg(dev
, "RX buffer overflow\n");
463 stats
->rx_over_errors
++;
466 skb
= alloc_can_err_skb(dev
, &cf
);
470 cf
->can_id
|= CAN_ERR_CRTL
;
471 cf
->data
[1] = CAN_ERR_CRTL_RX_OVERFLOW
;
472 netif_receive_skb(skb
);
475 stats
->rx_bytes
+= cf
->can_dlc
;
479 * at91_read_mb - read CAN msg from mailbox (lowlevel impl)
481 * @mb: mailbox number to read from
482 * @cf: can frame where to store message
484 * Reads a CAN message from the given mailbox and stores data into
485 * given can frame. "mb" and "cf" must be valid.
487 static void at91_read_mb(struct net_device
*dev
, unsigned int mb
,
488 struct can_frame
*cf
)
490 const struct at91_priv
*priv
= netdev_priv(dev
);
491 u32 reg_msr
, reg_mid
;
493 reg_mid
= at91_read(priv
, AT91_MID(mb
));
494 if (reg_mid
& AT91_MID_MIDE
)
495 cf
->can_id
= ((reg_mid
>> 0) & CAN_EFF_MASK
) | CAN_EFF_FLAG
;
497 cf
->can_id
= (reg_mid
>> 18) & CAN_SFF_MASK
;
499 reg_msr
= at91_read(priv
, AT91_MSR(mb
));
500 if (reg_msr
& AT91_MSR_MRTR
)
501 cf
->can_id
|= CAN_RTR_FLAG
;
502 cf
->can_dlc
= get_can_dlc((reg_msr
>> 16) & 0xf);
504 *(u32
*)(cf
->data
+ 0) = at91_read(priv
, AT91_MDL(mb
));
505 *(u32
*)(cf
->data
+ 4) = at91_read(priv
, AT91_MDH(mb
));
507 /* allow RX of extended frames */
508 at91_write(priv
, AT91_MID(mb
), AT91_MID_MIDE
);
510 if (unlikely(mb
== AT91_MB_RX_LAST
&& reg_msr
& AT91_MSR_MMI
))
511 at91_rx_overflow_err(dev
);
515 * at91_read_msg - read CAN message from mailbox
517 * @mb: mail box to read from
519 * Reads a CAN message from given mailbox, and put into linux network
520 * RX queue, does all housekeeping chores (stats, ...)
522 static void at91_read_msg(struct net_device
*dev
, unsigned int mb
)
524 struct net_device_stats
*stats
= &dev
->stats
;
525 struct can_frame
*cf
;
528 skb
= alloc_can_skb(dev
, &cf
);
529 if (unlikely(!skb
)) {
534 at91_read_mb(dev
, mb
, cf
);
535 netif_receive_skb(skb
);
538 stats
->rx_bytes
+= cf
->can_dlc
;
542 * at91_poll_rx - read multiple CAN messages from mailboxes
544 * @quota: max number of pkgs we're allowed to receive
546 * Theory of Operation:
548 * 11 of the 16 mailboxes on the chip are reserved for RX. we split
549 * them into 2 groups. The lower group holds 7 and upper 4 mailboxes.
551 * Like it or not, but the chip always saves a received CAN message
552 * into the first free mailbox it finds (starting with the
553 * lowest). This makes it very difficult to read the messages in the
554 * right order from the chip. This is how we work around that problem:
556 * The first message goes into mb nr. 1 and issues an interrupt. All
557 * rx ints are disabled in the interrupt handler and a napi poll is
558 * scheduled. We read the mailbox, but do _not_ reenable the mb (to
559 * receive another message).
564 * +-+-+-+-+-+-+-+-++-+-+-+-+
565 * | |x|x|x|x|x|x|x|| | | | |
566 * +-+-+-+-+-+-+-+-++-+-+-+-+
567 * 0 0 0 0 0 0 0 0 0 0 1 1 \ mail
568 * 0 1 2 3 4 5 6 7 8 9 0 1 / box
572 * unused, due to chip bug
574 * The variable priv->rx_next points to the next mailbox to read a
575 * message from. As long we're in the lower mailboxes we just read the
576 * mailbox but not reenable it.
578 * With completion of the last of the lower mailboxes, we reenable the
579 * whole first group, but continue to look for filled mailboxes in the
580 * upper mailboxes. Imagine the second group like overflow mailboxes,
581 * which takes CAN messages if the lower goup is full. While in the
582 * upper group we reenable the mailbox right after reading it. Giving
583 * the chip more room to store messages.
585 * After finishing we look again in the lower group if we've still
589 static int at91_poll_rx(struct net_device
*dev
, int quota
)
591 struct at91_priv
*priv
= netdev_priv(dev
);
592 u32 reg_sr
= at91_read(priv
, AT91_SR
);
593 const unsigned long *addr
= (unsigned long *)®_sr
;
597 if (priv
->rx_next
> AT91_MB_RX_LOW_LAST
&&
598 reg_sr
& AT91_MB_RX_LOW_MASK
)
600 "order of incoming frames cannot be guaranteed\n");
603 for (mb
= find_next_bit(addr
, AT91_MB_RX_LAST
+ 1, priv
->rx_next
);
604 mb
< AT91_MB_RX_LAST
+ 1 && quota
> 0;
605 reg_sr
= at91_read(priv
, AT91_SR
),
606 mb
= find_next_bit(addr
, AT91_MB_RX_LAST
+ 1, ++priv
->rx_next
)) {
607 at91_read_msg(dev
, mb
);
609 /* reactivate mailboxes */
610 if (mb
== AT91_MB_RX_LOW_LAST
)
611 /* all lower mailboxed, if just finished it */
612 at91_activate_rx_low(priv
);
613 else if (mb
> AT91_MB_RX_LOW_LAST
)
614 /* only the mailbox we read */
615 at91_activate_rx_mb(priv
, mb
);
621 /* upper group completed, look again in lower */
622 if (priv
->rx_next
> AT91_MB_RX_LOW_LAST
&&
623 quota
> 0 && mb
> AT91_MB_RX_LAST
) {
624 priv
->rx_next
= AT91_MB_RX_FIRST
;
631 static void at91_poll_err_frame(struct net_device
*dev
,
632 struct can_frame
*cf
, u32 reg_sr
)
634 struct at91_priv
*priv
= netdev_priv(dev
);
637 if (reg_sr
& AT91_IRQ_CERR
) {
638 netdev_dbg(dev
, "CERR irq\n");
639 dev
->stats
.rx_errors
++;
640 priv
->can
.can_stats
.bus_error
++;
641 cf
->can_id
|= CAN_ERR_PROT
| CAN_ERR_BUSERROR
;
645 if (reg_sr
& AT91_IRQ_SERR
) {
646 netdev_dbg(dev
, "SERR irq\n");
647 dev
->stats
.rx_errors
++;
648 priv
->can
.can_stats
.bus_error
++;
649 cf
->can_id
|= CAN_ERR_PROT
| CAN_ERR_BUSERROR
;
650 cf
->data
[2] |= CAN_ERR_PROT_STUFF
;
653 /* Acknowledgement Error */
654 if (reg_sr
& AT91_IRQ_AERR
) {
655 netdev_dbg(dev
, "AERR irq\n");
656 dev
->stats
.tx_errors
++;
657 cf
->can_id
|= CAN_ERR_ACK
;
661 if (reg_sr
& AT91_IRQ_FERR
) {
662 netdev_dbg(dev
, "FERR irq\n");
663 dev
->stats
.rx_errors
++;
664 priv
->can
.can_stats
.bus_error
++;
665 cf
->can_id
|= CAN_ERR_PROT
| CAN_ERR_BUSERROR
;
666 cf
->data
[2] |= CAN_ERR_PROT_FORM
;
670 if (reg_sr
& AT91_IRQ_BERR
) {
671 netdev_dbg(dev
, "BERR irq\n");
672 dev
->stats
.tx_errors
++;
673 priv
->can
.can_stats
.bus_error
++;
674 cf
->can_id
|= CAN_ERR_PROT
| CAN_ERR_BUSERROR
;
675 cf
->data
[2] |= CAN_ERR_PROT_BIT
;
679 static int at91_poll_err(struct net_device
*dev
, int quota
, u32 reg_sr
)
682 struct can_frame
*cf
;
687 skb
= alloc_can_err_skb(dev
, &cf
);
691 at91_poll_err_frame(dev
, cf
, reg_sr
);
692 netif_receive_skb(skb
);
694 dev
->stats
.rx_packets
++;
695 dev
->stats
.rx_bytes
+= cf
->can_dlc
;
700 static int at91_poll(struct napi_struct
*napi
, int quota
)
702 struct net_device
*dev
= napi
->dev
;
703 const struct at91_priv
*priv
= netdev_priv(dev
);
704 u32 reg_sr
= at91_read(priv
, AT91_SR
);
707 if (reg_sr
& AT91_IRQ_MB_RX
)
708 work_done
+= at91_poll_rx(dev
, quota
- work_done
);
711 * The error bits are clear on read,
712 * so use saved value from irq handler.
714 reg_sr
|= priv
->reg_sr
;
715 if (reg_sr
& AT91_IRQ_ERR_FRAME
)
716 work_done
+= at91_poll_err(dev
, quota
- work_done
, reg_sr
);
718 if (work_done
< quota
) {
719 /* enable IRQs for frame errors and all mailboxes >= rx_next */
720 u32 reg_ier
= AT91_IRQ_ERR_FRAME
;
721 reg_ier
|= AT91_IRQ_MB_RX
& ~AT91_MB_RX_MASK(priv
->rx_next
);
724 at91_write(priv
, AT91_IER
, reg_ier
);
731 * theory of operation:
733 * priv->tx_echo holds the number of the oldest can_frame put for
734 * transmission into the hardware, but not yet ACKed by the CAN tx
737 * We iterate from priv->tx_echo to priv->tx_next and check if the
738 * packet has been transmitted, echo it back to the CAN framework. If
739 * we discover a not yet transmitted package, stop looking for more.
742 static void at91_irq_tx(struct net_device
*dev
, u32 reg_sr
)
744 struct at91_priv
*priv
= netdev_priv(dev
);
748 /* masking of reg_sr not needed, already done by at91_irq */
750 for (/* nix */; (priv
->tx_next
- priv
->tx_echo
) > 0; priv
->tx_echo
++) {
751 mb
= get_tx_echo_mb(priv
);
753 /* no event in mailbox? */
754 if (!(reg_sr
& (1 << mb
)))
757 /* Disable irq for this TX mailbox */
758 at91_write(priv
, AT91_IDR
, 1 << mb
);
761 * only echo if mailbox signals us a transfer
762 * complete (MSR_MRDY). Otherwise it's a tansfer
763 * abort. "can_bus_off()" takes care about the skbs
764 * parked in the echo queue.
766 reg_msr
= at91_read(priv
, AT91_MSR(mb
));
767 if (likely(reg_msr
& AT91_MSR_MRDY
&&
768 ~reg_msr
& AT91_MSR_MABT
)) {
769 /* _NOTE_: substract AT91_MB_TX_FIRST offset from mb! */
770 can_get_echo_skb(dev
, mb
- AT91_MB_TX_FIRST
);
771 dev
->stats
.tx_packets
++;
776 * restart queue if we don't have a wrap around but restart if
777 * we get a TX int for the last can frame directly before a
780 if ((priv
->tx_next
& AT91_NEXT_MASK
) != 0 ||
781 (priv
->tx_echo
& AT91_NEXT_MASK
) == 0)
782 netif_wake_queue(dev
);
785 static void at91_irq_err_state(struct net_device
*dev
,
786 struct can_frame
*cf
, enum can_state new_state
)
788 struct at91_priv
*priv
= netdev_priv(dev
);
789 u32 reg_idr
= 0, reg_ier
= 0;
790 struct can_berr_counter bec
;
792 at91_get_berr_counter(dev
, &bec
);
794 switch (priv
->can
.state
) {
795 case CAN_STATE_ERROR_ACTIVE
:
798 * to : ERROR_WARNING, ERROR_PASSIVE, BUS_OFF
799 * => : there was a warning int
801 if (new_state
>= CAN_STATE_ERROR_WARNING
&&
802 new_state
<= CAN_STATE_BUS_OFF
) {
803 netdev_dbg(dev
, "Error Warning IRQ\n");
804 priv
->can
.can_stats
.error_warning
++;
806 cf
->can_id
|= CAN_ERR_CRTL
;
807 cf
->data
[1] = (bec
.txerr
> bec
.rxerr
) ?
808 CAN_ERR_CRTL_TX_WARNING
:
809 CAN_ERR_CRTL_RX_WARNING
;
811 case CAN_STATE_ERROR_WARNING
: /* fallthrough */
813 * from: ERROR_ACTIVE, ERROR_WARNING
814 * to : ERROR_PASSIVE, BUS_OFF
815 * => : error passive int
817 if (new_state
>= CAN_STATE_ERROR_PASSIVE
&&
818 new_state
<= CAN_STATE_BUS_OFF
) {
819 netdev_dbg(dev
, "Error Passive IRQ\n");
820 priv
->can
.can_stats
.error_passive
++;
822 cf
->can_id
|= CAN_ERR_CRTL
;
823 cf
->data
[1] = (bec
.txerr
> bec
.rxerr
) ?
824 CAN_ERR_CRTL_TX_PASSIVE
:
825 CAN_ERR_CRTL_RX_PASSIVE
;
828 case CAN_STATE_BUS_OFF
:
831 * to : ERROR_ACTIVE, ERROR_WARNING, ERROR_PASSIVE
833 if (new_state
<= CAN_STATE_ERROR_PASSIVE
) {
834 cf
->can_id
|= CAN_ERR_RESTARTED
;
836 netdev_dbg(dev
, "restarted\n");
837 priv
->can
.can_stats
.restarts
++;
839 netif_carrier_on(dev
);
840 netif_wake_queue(dev
);
848 /* process state changes depending on the new state */
850 case CAN_STATE_ERROR_ACTIVE
:
852 * actually we want to enable AT91_IRQ_WARN here, but
853 * it screws up the system under certain
854 * circumstances. so just enable AT91_IRQ_ERRP, thus
857 netdev_dbg(dev
, "Error Active\n");
858 cf
->can_id
|= CAN_ERR_PROT
;
859 cf
->data
[2] = CAN_ERR_PROT_ACTIVE
;
860 case CAN_STATE_ERROR_WARNING
: /* fallthrough */
861 reg_idr
= AT91_IRQ_ERRA
| AT91_IRQ_WARN
| AT91_IRQ_BOFF
;
862 reg_ier
= AT91_IRQ_ERRP
;
864 case CAN_STATE_ERROR_PASSIVE
:
865 reg_idr
= AT91_IRQ_ERRA
| AT91_IRQ_WARN
| AT91_IRQ_ERRP
;
866 reg_ier
= AT91_IRQ_BOFF
;
868 case CAN_STATE_BUS_OFF
:
869 reg_idr
= AT91_IRQ_ERRA
| AT91_IRQ_ERRP
|
870 AT91_IRQ_WARN
| AT91_IRQ_BOFF
;
873 cf
->can_id
|= CAN_ERR_BUSOFF
;
875 netdev_dbg(dev
, "bus-off\n");
876 netif_carrier_off(dev
);
877 priv
->can
.can_stats
.bus_off
++;
879 /* turn off chip, if restart is disabled */
880 if (!priv
->can
.restart_ms
) {
881 at91_chip_stop(dev
, CAN_STATE_BUS_OFF
);
889 at91_write(priv
, AT91_IDR
, reg_idr
);
890 at91_write(priv
, AT91_IER
, reg_ier
);
893 static void at91_irq_err(struct net_device
*dev
)
895 struct at91_priv
*priv
= netdev_priv(dev
);
897 struct can_frame
*cf
;
898 enum can_state new_state
;
901 reg_sr
= at91_read(priv
, AT91_SR
);
903 /* we need to look at the unmasked reg_sr */
904 if (unlikely(reg_sr
& AT91_IRQ_BOFF
))
905 new_state
= CAN_STATE_BUS_OFF
;
906 else if (unlikely(reg_sr
& AT91_IRQ_ERRP
))
907 new_state
= CAN_STATE_ERROR_PASSIVE
;
908 else if (unlikely(reg_sr
& AT91_IRQ_WARN
))
909 new_state
= CAN_STATE_ERROR_WARNING
;
910 else if (likely(reg_sr
& AT91_IRQ_ERRA
))
911 new_state
= CAN_STATE_ERROR_ACTIVE
;
913 netdev_err(dev
, "BUG! hardware in undefined state\n");
917 /* state hasn't changed */
918 if (likely(new_state
== priv
->can
.state
))
921 skb
= alloc_can_err_skb(dev
, &cf
);
925 at91_irq_err_state(dev
, cf
, new_state
);
928 dev
->stats
.rx_packets
++;
929 dev
->stats
.rx_bytes
+= cf
->can_dlc
;
931 priv
->can
.state
= new_state
;
937 static irqreturn_t
at91_irq(int irq
, void *dev_id
)
939 struct net_device
*dev
= dev_id
;
940 struct at91_priv
*priv
= netdev_priv(dev
);
941 irqreturn_t handled
= IRQ_NONE
;
944 reg_sr
= at91_read(priv
, AT91_SR
);
945 reg_imr
= at91_read(priv
, AT91_IMR
);
947 /* Ignore masked interrupts */
952 handled
= IRQ_HANDLED
;
954 /* Receive or error interrupt? -> napi */
955 if (reg_sr
& (AT91_IRQ_MB_RX
| AT91_IRQ_ERR_FRAME
)) {
957 * The error bits are clear on read,
958 * save for later use.
960 priv
->reg_sr
= reg_sr
;
961 at91_write(priv
, AT91_IDR
,
962 AT91_IRQ_MB_RX
| AT91_IRQ_ERR_FRAME
);
963 napi_schedule(&priv
->napi
);
966 /* Transmission complete interrupt */
967 if (reg_sr
& AT91_IRQ_MB_TX
)
968 at91_irq_tx(dev
, reg_sr
);
976 static int at91_open(struct net_device
*dev
)
978 struct at91_priv
*priv
= netdev_priv(dev
);
981 clk_enable(priv
->clk
);
983 /* check or determine and set bittime */
984 err
= open_candev(dev
);
988 /* register interrupt handler */
989 if (request_irq(dev
->irq
, at91_irq
, IRQF_SHARED
,
995 /* start chip and queuing */
996 at91_chip_start(dev
);
997 napi_enable(&priv
->napi
);
998 netif_start_queue(dev
);
1005 clk_disable(priv
->clk
);
1011 * stop CAN bus activity
1013 static int at91_close(struct net_device
*dev
)
1015 struct at91_priv
*priv
= netdev_priv(dev
);
1017 netif_stop_queue(dev
);
1018 napi_disable(&priv
->napi
);
1019 at91_chip_stop(dev
, CAN_STATE_STOPPED
);
1021 free_irq(dev
->irq
, dev
);
1022 clk_disable(priv
->clk
);
1029 static int at91_set_mode(struct net_device
*dev
, enum can_mode mode
)
1032 case CAN_MODE_START
:
1033 at91_chip_start(dev
);
1034 netif_wake_queue(dev
);
1044 static const struct net_device_ops at91_netdev_ops
= {
1045 .ndo_open
= at91_open
,
1046 .ndo_stop
= at91_close
,
1047 .ndo_start_xmit
= at91_start_xmit
,
1050 static int __devinit
at91_can_probe(struct platform_device
*pdev
)
1052 struct net_device
*dev
;
1053 struct at91_priv
*priv
;
1054 struct resource
*res
;
1059 clk
= clk_get(&pdev
->dev
, "can_clk");
1061 dev_err(&pdev
->dev
, "no clock defined\n");
1066 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
1067 irq
= platform_get_irq(pdev
, 0);
1068 if (!res
|| irq
<= 0) {
1073 if (!request_mem_region(res
->start
,
1080 addr
= ioremap_nocache(res
->start
, resource_size(res
));
1086 dev
= alloc_candev(sizeof(struct at91_priv
), AT91_MB_TX_NUM
);
1092 dev
->netdev_ops
= &at91_netdev_ops
;
1094 dev
->flags
|= IFF_ECHO
;
1096 priv
= netdev_priv(dev
);
1097 priv
->can
.clock
.freq
= clk_get_rate(clk
);
1098 priv
->can
.bittiming_const
= &at91_bittiming_const
;
1099 priv
->can
.do_set_mode
= at91_set_mode
;
1100 priv
->can
.do_get_berr_counter
= at91_get_berr_counter
;
1101 priv
->can
.ctrlmode_supported
= CAN_CTRLMODE_3_SAMPLES
;
1102 priv
->reg_base
= addr
;
1105 priv
->pdata
= pdev
->dev
.platform_data
;
1107 netif_napi_add(dev
, &priv
->napi
, at91_poll
, AT91_NAPI_WEIGHT
);
1109 dev_set_drvdata(&pdev
->dev
, dev
);
1110 SET_NETDEV_DEV(dev
, &pdev
->dev
);
1112 err
= register_candev(dev
);
1114 dev_err(&pdev
->dev
, "registering netdev failed\n");
1118 dev_info(&pdev
->dev
, "device registered (reg_base=%p, irq=%d)\n",
1119 priv
->reg_base
, dev
->irq
);
1128 release_mem_region(res
->start
, resource_size(res
));
1135 static int __devexit
at91_can_remove(struct platform_device
*pdev
)
1137 struct net_device
*dev
= platform_get_drvdata(pdev
);
1138 struct at91_priv
*priv
= netdev_priv(dev
);
1139 struct resource
*res
;
1141 unregister_netdev(dev
);
1143 platform_set_drvdata(pdev
, NULL
);
1145 iounmap(priv
->reg_base
);
1147 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
1148 release_mem_region(res
->start
, resource_size(res
));
1157 static struct platform_driver at91_can_driver
= {
1158 .probe
= at91_can_probe
,
1159 .remove
= __devexit_p(at91_can_remove
),
1161 .name
= KBUILD_MODNAME
,
1162 .owner
= THIS_MODULE
,
1166 static int __init
at91_can_module_init(void)
1168 return platform_driver_register(&at91_can_driver
);
1171 static void __exit
at91_can_module_exit(void)
1173 platform_driver_unregister(&at91_can_driver
);
1176 module_init(at91_can_module_init
);
1177 module_exit(at91_can_module_exit
);
1179 MODULE_AUTHOR("Marc Kleine-Budde <mkl@pengutronix.de>");
1180 MODULE_LICENSE("GPL v2");
1181 MODULE_DESCRIPTION(KBUILD_MODNAME
" CAN netdevice driver");