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[mirror_ubuntu-bionic-kernel.git] / drivers / net / can / bfin_can.c
1 /*
2 * Blackfin On-Chip CAN Driver
3 *
4 * Copyright 2004-2009 Analog Devices Inc.
5 *
6 * Enter bugs at http://blackfin.uclinux.org/
7 *
8 * Licensed under the GPL-2 or later.
9 */
10
11 #include <linux/module.h>
12 #include <linux/kernel.h>
13 #include <linux/bitops.h>
14 #include <linux/interrupt.h>
15 #include <linux/errno.h>
16 #include <linux/netdevice.h>
17 #include <linux/skbuff.h>
18 #include <linux/platform_device.h>
19
20 #include <linux/can/dev.h>
21 #include <linux/can/error.h>
22
23 #include <asm/bfin_can.h>
24 #include <asm/portmux.h>
25
26 #define DRV_NAME "bfin_can"
27 #define BFIN_CAN_TIMEOUT 100
28 #define TX_ECHO_SKB_MAX 1
29
30 /*
31 * bfin can private data
32 */
33 struct bfin_can_priv {
34 struct can_priv can; /* must be the first member */
35 struct net_device *dev;
36 void __iomem *membase;
37 int rx_irq;
38 int tx_irq;
39 int err_irq;
40 unsigned short *pin_list;
41 };
42
43 /*
44 * bfin can timing parameters
45 */
46 static const struct can_bittiming_const bfin_can_bittiming_const = {
47 .name = DRV_NAME,
48 .tseg1_min = 1,
49 .tseg1_max = 16,
50 .tseg2_min = 1,
51 .tseg2_max = 8,
52 .sjw_max = 4,
53 /*
54 * Although the BRP field can be set to any value, it is recommended
55 * that the value be greater than or equal to 4, as restrictions
56 * apply to the bit timing configuration when BRP is less than 4.
57 */
58 .brp_min = 4,
59 .brp_max = 1024,
60 .brp_inc = 1,
61 };
62
63 static int bfin_can_set_bittiming(struct net_device *dev)
64 {
65 struct bfin_can_priv *priv = netdev_priv(dev);
66 struct bfin_can_regs __iomem *reg = priv->membase;
67 struct can_bittiming *bt = &priv->can.bittiming;
68 u16 clk, timing;
69
70 clk = bt->brp - 1;
71 timing = ((bt->sjw - 1) << 8) | (bt->prop_seg + bt->phase_seg1 - 1) |
72 ((bt->phase_seg2 - 1) << 4);
73
74 /*
75 * If the SAM bit is set, the input signal is oversampled three times
76 * at the SCLK rate.
77 */
78 if (priv->can.ctrlmode & CAN_CTRLMODE_3_SAMPLES)
79 timing |= SAM;
80
81 bfin_write(&reg->clock, clk);
82 bfin_write(&reg->timing, timing);
83
84 netdev_info(dev, "setting CLOCK=0x%04x TIMING=0x%04x\n", clk, timing);
85
86 return 0;
87 }
88
89 static void bfin_can_set_reset_mode(struct net_device *dev)
90 {
91 struct bfin_can_priv *priv = netdev_priv(dev);
92 struct bfin_can_regs __iomem *reg = priv->membase;
93 int timeout = BFIN_CAN_TIMEOUT;
94 int i;
95
96 /* disable interrupts */
97 bfin_write(&reg->mbim1, 0);
98 bfin_write(&reg->mbim2, 0);
99 bfin_write(&reg->gim, 0);
100
101 /* reset can and enter configuration mode */
102 bfin_write(&reg->control, SRS | CCR);
103 SSYNC();
104 bfin_write(&reg->control, CCR);
105 SSYNC();
106 while (!(bfin_read(&reg->control) & CCA)) {
107 udelay(10);
108 if (--timeout == 0) {
109 netdev_err(dev, "fail to enter configuration mode\n");
110 BUG();
111 }
112 }
113
114 /*
115 * All mailbox configurations are marked as inactive
116 * by writing to CAN Mailbox Configuration Registers 1 and 2
117 * For all bits: 0 - Mailbox disabled, 1 - Mailbox enabled
118 */
119 bfin_write(&reg->mc1, 0);
120 bfin_write(&reg->mc2, 0);
121
122 /* Set Mailbox Direction */
123 bfin_write(&reg->md1, 0xFFFF); /* mailbox 1-16 are RX */
124 bfin_write(&reg->md2, 0); /* mailbox 17-32 are TX */
125
126 /* RECEIVE_STD_CHL */
127 for (i = 0; i < 2; i++) {
128 bfin_write(&reg->chl[RECEIVE_STD_CHL + i].id0, 0);
129 bfin_write(&reg->chl[RECEIVE_STD_CHL + i].id1, AME);
130 bfin_write(&reg->chl[RECEIVE_STD_CHL + i].dlc, 0);
131 bfin_write(&reg->msk[RECEIVE_STD_CHL + i].amh, 0x1FFF);
132 bfin_write(&reg->msk[RECEIVE_STD_CHL + i].aml, 0xFFFF);
133 }
134
135 /* RECEIVE_EXT_CHL */
136 for (i = 0; i < 2; i++) {
137 bfin_write(&reg->chl[RECEIVE_EXT_CHL + i].id0, 0);
138 bfin_write(&reg->chl[RECEIVE_EXT_CHL + i].id1, AME | IDE);
139 bfin_write(&reg->chl[RECEIVE_EXT_CHL + i].dlc, 0);
140 bfin_write(&reg->msk[RECEIVE_EXT_CHL + i].amh, 0x1FFF);
141 bfin_write(&reg->msk[RECEIVE_EXT_CHL + i].aml, 0xFFFF);
142 }
143
144 bfin_write(&reg->mc2, BIT(TRANSMIT_CHL - 16));
145 bfin_write(&reg->mc1, BIT(RECEIVE_STD_CHL) + BIT(RECEIVE_EXT_CHL));
146 SSYNC();
147
148 priv->can.state = CAN_STATE_STOPPED;
149 }
150
151 static void bfin_can_set_normal_mode(struct net_device *dev)
152 {
153 struct bfin_can_priv *priv = netdev_priv(dev);
154 struct bfin_can_regs __iomem *reg = priv->membase;
155 int timeout = BFIN_CAN_TIMEOUT;
156
157 /*
158 * leave configuration mode
159 */
160 bfin_write(&reg->control, bfin_read(&reg->control) & ~CCR);
161
162 while (bfin_read(&reg->status) & CCA) {
163 udelay(10);
164 if (--timeout == 0) {
165 netdev_err(dev, "fail to leave configuration mode\n");
166 BUG();
167 }
168 }
169
170 /*
171 * clear _All_ tx and rx interrupts
172 */
173 bfin_write(&reg->mbtif1, 0xFFFF);
174 bfin_write(&reg->mbtif2, 0xFFFF);
175 bfin_write(&reg->mbrif1, 0xFFFF);
176 bfin_write(&reg->mbrif2, 0xFFFF);
177
178 /*
179 * clear global interrupt status register
180 */
181 bfin_write(&reg->gis, 0x7FF); /* overwrites with '1' */
182
183 /*
184 * Initialize Interrupts
185 * - set bits in the mailbox interrupt mask register
186 * - global interrupt mask
187 */
188 bfin_write(&reg->mbim1, BIT(RECEIVE_STD_CHL) + BIT(RECEIVE_EXT_CHL));
189 bfin_write(&reg->mbim2, BIT(TRANSMIT_CHL - 16));
190
191 bfin_write(&reg->gim, EPIM | BOIM | RMLIM);
192 SSYNC();
193 }
194
195 static void bfin_can_start(struct net_device *dev)
196 {
197 struct bfin_can_priv *priv = netdev_priv(dev);
198
199 /* enter reset mode */
200 if (priv->can.state != CAN_STATE_STOPPED)
201 bfin_can_set_reset_mode(dev);
202
203 /* leave reset mode */
204 bfin_can_set_normal_mode(dev);
205 }
206
207 static int bfin_can_set_mode(struct net_device *dev, enum can_mode mode)
208 {
209 switch (mode) {
210 case CAN_MODE_START:
211 bfin_can_start(dev);
212 if (netif_queue_stopped(dev))
213 netif_wake_queue(dev);
214 break;
215
216 default:
217 return -EOPNOTSUPP;
218 }
219
220 return 0;
221 }
222
223 static int bfin_can_get_berr_counter(const struct net_device *dev,
224 struct can_berr_counter *bec)
225 {
226 struct bfin_can_priv *priv = netdev_priv(dev);
227 struct bfin_can_regs __iomem *reg = priv->membase;
228
229 u16 cec = bfin_read(&reg->cec);
230
231 bec->txerr = cec >> 8;
232 bec->rxerr = cec;
233
234 return 0;
235 }
236
237 static int bfin_can_start_xmit(struct sk_buff *skb, struct net_device *dev)
238 {
239 struct bfin_can_priv *priv = netdev_priv(dev);
240 struct bfin_can_regs __iomem *reg = priv->membase;
241 struct can_frame *cf = (struct can_frame *)skb->data;
242 u8 dlc = cf->can_dlc;
243 canid_t id = cf->can_id;
244 u8 *data = cf->data;
245 u16 val;
246 int i;
247
248 if (can_dropped_invalid_skb(dev, skb))
249 return NETDEV_TX_OK;
250
251 netif_stop_queue(dev);
252
253 /* fill id */
254 if (id & CAN_EFF_FLAG) {
255 bfin_write(&reg->chl[TRANSMIT_CHL].id0, id);
256 val = ((id & 0x1FFF0000) >> 16) | IDE;
257 } else
258 val = (id << 2);
259 if (id & CAN_RTR_FLAG)
260 val |= RTR;
261 bfin_write(&reg->chl[TRANSMIT_CHL].id1, val | AME);
262
263 /* fill payload */
264 for (i = 0; i < 8; i += 2) {
265 val = ((7 - i) < dlc ? (data[7 - i]) : 0) +
266 ((6 - i) < dlc ? (data[6 - i] << 8) : 0);
267 bfin_write(&reg->chl[TRANSMIT_CHL].data[i], val);
268 }
269
270 /* fill data length code */
271 bfin_write(&reg->chl[TRANSMIT_CHL].dlc, dlc);
272
273 can_put_echo_skb(skb, dev, 0);
274
275 /* set transmit request */
276 bfin_write(&reg->trs2, BIT(TRANSMIT_CHL - 16));
277
278 return 0;
279 }
280
281 static void bfin_can_rx(struct net_device *dev, u16 isrc)
282 {
283 struct bfin_can_priv *priv = netdev_priv(dev);
284 struct net_device_stats *stats = &dev->stats;
285 struct bfin_can_regs __iomem *reg = priv->membase;
286 struct can_frame *cf;
287 struct sk_buff *skb;
288 int obj;
289 int i;
290 u16 val;
291
292 skb = alloc_can_skb(dev, &cf);
293 if (skb == NULL)
294 return;
295
296 /* get id */
297 if (isrc & BIT(RECEIVE_EXT_CHL)) {
298 /* extended frame format (EFF) */
299 cf->can_id = ((bfin_read(&reg->chl[RECEIVE_EXT_CHL].id1)
300 & 0x1FFF) << 16)
301 + bfin_read(&reg->chl[RECEIVE_EXT_CHL].id0);
302 cf->can_id |= CAN_EFF_FLAG;
303 obj = RECEIVE_EXT_CHL;
304 } else {
305 /* standard frame format (SFF) */
306 cf->can_id = (bfin_read(&reg->chl[RECEIVE_STD_CHL].id1)
307 & 0x1ffc) >> 2;
308 obj = RECEIVE_STD_CHL;
309 }
310 if (bfin_read(&reg->chl[obj].id1) & RTR)
311 cf->can_id |= CAN_RTR_FLAG;
312
313 /* get data length code */
314 cf->can_dlc = get_can_dlc(bfin_read(&reg->chl[obj].dlc) & 0xF);
315
316 /* get payload */
317 for (i = 0; i < 8; i += 2) {
318 val = bfin_read(&reg->chl[obj].data[i]);
319 cf->data[7 - i] = (7 - i) < cf->can_dlc ? val : 0;
320 cf->data[6 - i] = (6 - i) < cf->can_dlc ? (val >> 8) : 0;
321 }
322
323 netif_rx(skb);
324
325 stats->rx_packets++;
326 stats->rx_bytes += cf->can_dlc;
327 }
328
329 static int bfin_can_err(struct net_device *dev, u16 isrc, u16 status)
330 {
331 struct bfin_can_priv *priv = netdev_priv(dev);
332 struct bfin_can_regs __iomem *reg = priv->membase;
333 struct net_device_stats *stats = &dev->stats;
334 struct can_frame *cf;
335 struct sk_buff *skb;
336 enum can_state state = priv->can.state;
337
338 skb = alloc_can_err_skb(dev, &cf);
339 if (skb == NULL)
340 return -ENOMEM;
341
342 if (isrc & RMLIS) {
343 /* data overrun interrupt */
344 netdev_dbg(dev, "data overrun interrupt\n");
345 cf->can_id |= CAN_ERR_CRTL;
346 cf->data[1] = CAN_ERR_CRTL_RX_OVERFLOW;
347 stats->rx_over_errors++;
348 stats->rx_errors++;
349 }
350
351 if (isrc & BOIS) {
352 netdev_dbg(dev, "bus-off mode interrupt\n");
353 state = CAN_STATE_BUS_OFF;
354 cf->can_id |= CAN_ERR_BUSOFF;
355 can_bus_off(dev);
356 }
357
358 if (isrc & EPIS) {
359 /* error passive interrupt */
360 netdev_dbg(dev, "error passive interrupt\n");
361 state = CAN_STATE_ERROR_PASSIVE;
362 }
363
364 if ((isrc & EWTIS) || (isrc & EWRIS)) {
365 netdev_dbg(dev, "Error Warning Transmit/Receive Interrupt\n");
366 state = CAN_STATE_ERROR_WARNING;
367 }
368
369 if (state != priv->can.state && (state == CAN_STATE_ERROR_WARNING ||
370 state == CAN_STATE_ERROR_PASSIVE)) {
371 u16 cec = bfin_read(&reg->cec);
372 u8 rxerr = cec;
373 u8 txerr = cec >> 8;
374
375 cf->can_id |= CAN_ERR_CRTL;
376 if (state == CAN_STATE_ERROR_WARNING) {
377 priv->can.can_stats.error_warning++;
378 cf->data[1] = (txerr > rxerr) ?
379 CAN_ERR_CRTL_TX_WARNING :
380 CAN_ERR_CRTL_RX_WARNING;
381 } else {
382 priv->can.can_stats.error_passive++;
383 cf->data[1] = (txerr > rxerr) ?
384 CAN_ERR_CRTL_TX_PASSIVE :
385 CAN_ERR_CRTL_RX_PASSIVE;
386 }
387 }
388
389 if (status) {
390 priv->can.can_stats.bus_error++;
391
392 cf->can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR;
393
394 if (status & BEF)
395 cf->data[2] |= CAN_ERR_PROT_BIT;
396 else if (status & FER)
397 cf->data[2] |= CAN_ERR_PROT_FORM;
398 else if (status & SER)
399 cf->data[2] |= CAN_ERR_PROT_STUFF;
400 else
401 cf->data[2] |= CAN_ERR_PROT_UNSPEC;
402 }
403
404 priv->can.state = state;
405
406 netif_rx(skb);
407
408 stats->rx_packets++;
409 stats->rx_bytes += cf->can_dlc;
410
411 return 0;
412 }
413
414 static irqreturn_t bfin_can_interrupt(int irq, void *dev_id)
415 {
416 struct net_device *dev = dev_id;
417 struct bfin_can_priv *priv = netdev_priv(dev);
418 struct bfin_can_regs __iomem *reg = priv->membase;
419 struct net_device_stats *stats = &dev->stats;
420 u16 status, isrc;
421
422 if ((irq == priv->tx_irq) && bfin_read(&reg->mbtif2)) {
423 /* transmission complete interrupt */
424 bfin_write(&reg->mbtif2, 0xFFFF);
425 stats->tx_packets++;
426 stats->tx_bytes += bfin_read(&reg->chl[TRANSMIT_CHL].dlc);
427 can_get_echo_skb(dev, 0);
428 netif_wake_queue(dev);
429 } else if ((irq == priv->rx_irq) && bfin_read(&reg->mbrif1)) {
430 /* receive interrupt */
431 isrc = bfin_read(&reg->mbrif1);
432 bfin_write(&reg->mbrif1, 0xFFFF);
433 bfin_can_rx(dev, isrc);
434 } else if ((irq == priv->err_irq) && bfin_read(&reg->gis)) {
435 /* error interrupt */
436 isrc = bfin_read(&reg->gis);
437 status = bfin_read(&reg->esr);
438 bfin_write(&reg->gis, 0x7FF);
439 bfin_can_err(dev, isrc, status);
440 } else {
441 return IRQ_NONE;
442 }
443
444 return IRQ_HANDLED;
445 }
446
447 static int bfin_can_open(struct net_device *dev)
448 {
449 struct bfin_can_priv *priv = netdev_priv(dev);
450 int err;
451
452 /* set chip into reset mode */
453 bfin_can_set_reset_mode(dev);
454
455 /* common open */
456 err = open_candev(dev);
457 if (err)
458 goto exit_open;
459
460 /* register interrupt handler */
461 err = request_irq(priv->rx_irq, &bfin_can_interrupt, 0,
462 "bfin-can-rx", dev);
463 if (err)
464 goto exit_rx_irq;
465 err = request_irq(priv->tx_irq, &bfin_can_interrupt, 0,
466 "bfin-can-tx", dev);
467 if (err)
468 goto exit_tx_irq;
469 err = request_irq(priv->err_irq, &bfin_can_interrupt, 0,
470 "bfin-can-err", dev);
471 if (err)
472 goto exit_err_irq;
473
474 bfin_can_start(dev);
475
476 netif_start_queue(dev);
477
478 return 0;
479
480 exit_err_irq:
481 free_irq(priv->tx_irq, dev);
482 exit_tx_irq:
483 free_irq(priv->rx_irq, dev);
484 exit_rx_irq:
485 close_candev(dev);
486 exit_open:
487 return err;
488 }
489
490 static int bfin_can_close(struct net_device *dev)
491 {
492 struct bfin_can_priv *priv = netdev_priv(dev);
493
494 netif_stop_queue(dev);
495 bfin_can_set_reset_mode(dev);
496
497 close_candev(dev);
498
499 free_irq(priv->rx_irq, dev);
500 free_irq(priv->tx_irq, dev);
501 free_irq(priv->err_irq, dev);
502
503 return 0;
504 }
505
506 static struct net_device *alloc_bfin_candev(void)
507 {
508 struct net_device *dev;
509 struct bfin_can_priv *priv;
510
511 dev = alloc_candev(sizeof(*priv), TX_ECHO_SKB_MAX);
512 if (!dev)
513 return NULL;
514
515 priv = netdev_priv(dev);
516
517 priv->dev = dev;
518 priv->can.bittiming_const = &bfin_can_bittiming_const;
519 priv->can.do_set_bittiming = bfin_can_set_bittiming;
520 priv->can.do_set_mode = bfin_can_set_mode;
521 priv->can.do_get_berr_counter = bfin_can_get_berr_counter;
522 priv->can.ctrlmode_supported = CAN_CTRLMODE_3_SAMPLES;
523
524 return dev;
525 }
526
527 static const struct net_device_ops bfin_can_netdev_ops = {
528 .ndo_open = bfin_can_open,
529 .ndo_stop = bfin_can_close,
530 .ndo_start_xmit = bfin_can_start_xmit,
531 };
532
533 static int bfin_can_probe(struct platform_device *pdev)
534 {
535 int err;
536 struct net_device *dev;
537 struct bfin_can_priv *priv;
538 struct resource *res_mem, *rx_irq, *tx_irq, *err_irq;
539 unsigned short *pdata;
540
541 pdata = dev_get_platdata(&pdev->dev);
542 if (!pdata) {
543 dev_err(&pdev->dev, "No platform data provided!\n");
544 err = -EINVAL;
545 goto exit;
546 }
547
548 res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
549 rx_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
550 tx_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 1);
551 err_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 2);
552 if (!res_mem || !rx_irq || !tx_irq || !err_irq) {
553 err = -EINVAL;
554 goto exit;
555 }
556
557 if (!request_mem_region(res_mem->start, resource_size(res_mem),
558 dev_name(&pdev->dev))) {
559 err = -EBUSY;
560 goto exit;
561 }
562
563 /* request peripheral pins */
564 err = peripheral_request_list(pdata, dev_name(&pdev->dev));
565 if (err)
566 goto exit_mem_release;
567
568 dev = alloc_bfin_candev();
569 if (!dev) {
570 err = -ENOMEM;
571 goto exit_peri_pin_free;
572 }
573
574 priv = netdev_priv(dev);
575 priv->membase = (void __iomem *)res_mem->start;
576 priv->rx_irq = rx_irq->start;
577 priv->tx_irq = tx_irq->start;
578 priv->err_irq = err_irq->start;
579 priv->pin_list = pdata;
580 priv->can.clock.freq = get_sclk();
581
582 platform_set_drvdata(pdev, dev);
583 SET_NETDEV_DEV(dev, &pdev->dev);
584
585 dev->flags |= IFF_ECHO; /* we support local echo */
586 dev->netdev_ops = &bfin_can_netdev_ops;
587
588 bfin_can_set_reset_mode(dev);
589
590 err = register_candev(dev);
591 if (err) {
592 dev_err(&pdev->dev, "registering failed (err=%d)\n", err);
593 goto exit_candev_free;
594 }
595
596 dev_info(&pdev->dev,
597 "%s device registered"
598 "(&reg_base=%p, rx_irq=%d, tx_irq=%d, err_irq=%d, sclk=%d)\n",
599 DRV_NAME, priv->membase, priv->rx_irq,
600 priv->tx_irq, priv->err_irq, priv->can.clock.freq);
601 return 0;
602
603 exit_candev_free:
604 free_candev(dev);
605 exit_peri_pin_free:
606 peripheral_free_list(pdata);
607 exit_mem_release:
608 release_mem_region(res_mem->start, resource_size(res_mem));
609 exit:
610 return err;
611 }
612
613 static int bfin_can_remove(struct platform_device *pdev)
614 {
615 struct net_device *dev = platform_get_drvdata(pdev);
616 struct bfin_can_priv *priv = netdev_priv(dev);
617 struct resource *res;
618
619 bfin_can_set_reset_mode(dev);
620
621 unregister_candev(dev);
622
623 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
624 release_mem_region(res->start, resource_size(res));
625
626 peripheral_free_list(priv->pin_list);
627
628 free_candev(dev);
629 return 0;
630 }
631
632 #ifdef CONFIG_PM
633 static int bfin_can_suspend(struct platform_device *pdev, pm_message_t mesg)
634 {
635 struct net_device *dev = platform_get_drvdata(pdev);
636 struct bfin_can_priv *priv = netdev_priv(dev);
637 struct bfin_can_regs __iomem *reg = priv->membase;
638 int timeout = BFIN_CAN_TIMEOUT;
639
640 if (netif_running(dev)) {
641 /* enter sleep mode */
642 bfin_write(&reg->control, bfin_read(&reg->control) | SMR);
643 SSYNC();
644 while (!(bfin_read(&reg->intr) & SMACK)) {
645 udelay(10);
646 if (--timeout == 0) {
647 netdev_err(dev, "fail to enter sleep mode\n");
648 BUG();
649 }
650 }
651 }
652
653 return 0;
654 }
655
656 static int bfin_can_resume(struct platform_device *pdev)
657 {
658 struct net_device *dev = platform_get_drvdata(pdev);
659 struct bfin_can_priv *priv = netdev_priv(dev);
660 struct bfin_can_regs __iomem *reg = priv->membase;
661
662 if (netif_running(dev)) {
663 /* leave sleep mode */
664 bfin_write(&reg->intr, 0);
665 SSYNC();
666 }
667
668 return 0;
669 }
670 #else
671 #define bfin_can_suspend NULL
672 #define bfin_can_resume NULL
673 #endif /* CONFIG_PM */
674
675 static struct platform_driver bfin_can_driver = {
676 .probe = bfin_can_probe,
677 .remove = bfin_can_remove,
678 .suspend = bfin_can_suspend,
679 .resume = bfin_can_resume,
680 .driver = {
681 .name = DRV_NAME,
682 .owner = THIS_MODULE,
683 },
684 };
685
686 module_platform_driver(bfin_can_driver);
687
688 MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>");
689 MODULE_LICENSE("GPL");
690 MODULE_DESCRIPTION("Blackfin on-chip CAN netdevice driver");
691 MODULE_ALIAS("platform:" DRV_NAME);