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[mirror_ubuntu-artful-kernel.git] / drivers / net / cris / eth_v10.c
1 /* $Id: ethernet.c,v 1.31 2004/10/18 14:49:03 starvik Exp $
2 *
3 * e100net.c: A network driver for the ETRAX 100LX network controller.
4 *
5 * Copyright (c) 1998-2002 Axis Communications AB.
6 *
7 * The outline of this driver comes from skeleton.c.
8 *
9 * $Log: ethernet.c,v $
10 * Revision 1.31 2004/10/18 14:49:03 starvik
11 * Use RX interrupt as random source
12 *
13 * Revision 1.30 2004/09/29 10:44:04 starvik
14 * Enabed MAC-address output again
15 *
16 * Revision 1.29 2004/08/24 07:14:05 starvik
17 * Make use of generic MDIO interface and constants.
18 *
19 * Revision 1.28 2004/08/20 09:37:11 starvik
20 * Added support for Intel LXT972A. Creds to Randy Scarborough.
21 *
22 * Revision 1.27 2004/08/16 12:37:22 starvik
23 * Merge of Linux 2.6.8
24 *
25 * Revision 1.25 2004/06/21 10:29:57 starvik
26 * Merge of Linux 2.6.7
27 *
28 * Revision 1.23 2004/06/09 05:29:22 starvik
29 * Avoid any race where R_DMA_CH1_FIRST is NULL (may trigger cache bug).
30 *
31 * Revision 1.22 2004/05/14 07:58:03 starvik
32 * Merge of changes from 2.4
33 *
34 * Revision 1.20 2004/03/11 11:38:40 starvik
35 * Merge of Linux 2.6.4
36 *
37 * Revision 1.18 2003/12/03 13:45:46 starvik
38 * Use hardware pad for short packets to prevent information leakage.
39 *
40 * Revision 1.17 2003/07/04 08:27:37 starvik
41 * Merge of Linux 2.5.74
42 *
43 * Revision 1.16 2003/04/24 08:28:22 starvik
44 * New LED behaviour: LED off when no link
45 *
46 * Revision 1.15 2003/04/09 05:20:47 starvik
47 * Merge of Linux 2.5.67
48 *
49 * Revision 1.13 2003/03/06 16:11:01 henriken
50 * Off by one error in group address register setting.
51 *
52 * Revision 1.12 2003/02/27 17:24:19 starvik
53 * Corrected Rev to Revision
54 *
55 * Revision 1.11 2003/01/24 09:53:21 starvik
56 * Oops. Initialize GA to 0, not to 1
57 *
58 * Revision 1.10 2003/01/24 09:50:55 starvik
59 * Initialize GA_0 and GA_1 to 0 to avoid matching of unwanted packets
60 *
61 * Revision 1.9 2002/12/13 07:40:58 starvik
62 * Added basic ethtool interface
63 * Handled out of memory when allocating new buffers
64 *
65 * Revision 1.8 2002/12/11 13:13:57 starvik
66 * Added arch/ to v10 specific includes
67 * Added fix from Linux 2.4 in serial.c (flush_to_flip_buffer)
68 *
69 * Revision 1.7 2002/11/26 09:41:42 starvik
70 * Added e100_set_config (standard interface to set media type)
71 * Added protection against preemptive scheduling
72 * Added standard MII ioctls
73 *
74 * Revision 1.6 2002/11/21 07:18:18 starvik
75 * Timers must be initialized in 2.5.48
76 *
77 * Revision 1.5 2002/11/20 11:56:11 starvik
78 * Merge of Linux 2.5.48
79 *
80 * Revision 1.4 2002/11/18 07:26:46 starvik
81 * Linux 2.5 port of latest Linux 2.4 ethernet driver
82 *
83 * Revision 1.33 2002/10/02 20:16:17 hp
84 * SETF, SETS: Use underscored IO_x_ macros rather than incorrect token concatenation
85 *
86 * Revision 1.32 2002/09/16 06:05:58 starvik
87 * Align memory returned by dev_alloc_skb
88 * Moved handling of sent packets to interrupt to avoid reference counting problem
89 *
90 * Revision 1.31 2002/09/10 13:28:23 larsv
91 * Return -EINVAL for unknown ioctls to avoid confusing tools that tests
92 * for supported functionality by issuing special ioctls, i.e. wireless
93 * extensions.
94 *
95 * Revision 1.30 2002/05/07 18:50:08 johana
96 * Correct spelling in comments.
97 *
98 * Revision 1.29 2002/05/06 05:38:49 starvik
99 * Performance improvements:
100 * Large packets are not copied (breakpoint set to 256 bytes)
101 * The cache bug workaround is delayed until half of the receive list
102 * has been used
103 * Added transmit list
104 * Transmit interrupts are only enabled when transmit queue is full
105 *
106 * Revision 1.28.2.1 2002/04/30 08:15:51 starvik
107 * Performance improvements:
108 * Large packets are not copied (breakpoint set to 256 bytes)
109 * The cache bug workaround is delayed until half of the receive list
110 * has been used.
111 * Added transmit list
112 * Transmit interrupts are only enabled when transmit queue is full
113 *
114 * Revision 1.28 2002/04/22 11:47:21 johana
115 * Fix according to 2.4.19-pre7. time_after/time_before and
116 * missing end of comment.
117 * The patch has a typo for ethernet.c in e100_clear_network_leds(),
118 * that is fixed here.
119 *
120 * Revision 1.27 2002/04/12 11:55:11 bjornw
121 * Added TODO
122 *
123 * Revision 1.26 2002/03/15 17:11:02 bjornw
124 * Use prepare_rx_descriptor after the CPU has touched the receiving descs
125 *
126 * Revision 1.25 2002/03/08 13:07:53 bjornw
127 * Unnecessary spinlock removed
128 *
129 * Revision 1.24 2002/02/20 12:57:43 fredriks
130 * Replaced MIN() with min().
131 *
132 * Revision 1.23 2002/02/20 10:58:14 fredriks
133 * Strip the Ethernet checksum (4 bytes) before forwarding a frame to upper layers.
134 *
135 * Revision 1.22 2002/01/30 07:48:22 matsfg
136 * Initiate R_NETWORK_TR_CTRL
137 *
138 * Revision 1.21 2001/11/23 11:54:49 starvik
139 * Added IFF_PROMISC and IFF_ALLMULTI handling in set_multicast_list
140 * Removed compiler warnings
141 *
142 * Revision 1.20 2001/11/12 19:26:00 pkj
143 * * Corrected e100_negotiate() to not assign half to current_duplex when
144 * it was supposed to compare them...
145 * * Cleaned up failure handling in e100_open().
146 * * Fixed compiler warnings.
147 *
148 * Revision 1.19 2001/11/09 07:43:09 starvik
149 * Added full duplex support
150 * Added ioctl to set speed and duplex
151 * Clear LED timer only runs when LED is lit
152 *
153 * Revision 1.18 2001/10/03 14:40:43 jonashg
154 * Update rx_bytes counter.
155 *
156 * Revision 1.17 2001/06/11 12:43:46 olof
157 * Modified defines for network LED behavior
158 *
159 * Revision 1.16 2001/05/30 06:12:46 markusl
160 * TxDesc.next should not be set to NULL
161 *
162 * Revision 1.15 2001/05/29 10:27:04 markusl
163 * Updated after review remarks:
164 * +Use IO_EXTRACT
165 * +Handle underrun
166 *
167 * Revision 1.14 2001/05/29 09:20:14 jonashg
168 * Use driver name on printk output so one can tell which driver that complains.
169 *
170 * Revision 1.13 2001/05/09 12:35:59 johana
171 * Use DMA_NBR and IRQ_NBR defines from dma.h and irq.h
172 *
173 * Revision 1.12 2001/04/05 11:43:11 tobiasa
174 * Check dev before panic.
175 *
176 * Revision 1.11 2001/04/04 11:21:05 markusl
177 * Updated according to review remarks
178 *
179 * Revision 1.10 2001/03/26 16:03:06 bjornw
180 * Needs linux/config.h
181 *
182 * Revision 1.9 2001/03/19 14:47:48 pkj
183 * * Make sure there is always a pause after the network LEDs are
184 * changed so they will not look constantly lit during heavy traffic.
185 * * Always use HZ when setting times relative to jiffies.
186 * * Use LED_NETWORK_SET() when setting the network LEDs.
187 *
188 * Revision 1.8 2001/02/27 13:52:48 bjornw
189 * malloc.h -> slab.h
190 *
191 * Revision 1.7 2001/02/23 13:46:38 bjornw
192 * Spellling check
193 *
194 * Revision 1.6 2001/01/26 15:21:04 starvik
195 * Don't disable interrupts while reading MDIO registers (MDIO is slow)
196 * Corrected promiscuous mode
197 * Improved deallocation of IRQs ("ifconfig eth0 down" now works)
198 *
199 * Revision 1.5 2000/11/29 17:22:22 bjornw
200 * Get rid of the udword types legacy stuff
201 *
202 * Revision 1.4 2000/11/22 16:36:09 bjornw
203 * Please marketing by using the correct case when spelling Etrax.
204 *
205 * Revision 1.3 2000/11/21 16:43:04 bjornw
206 * Minor short->int change
207 *
208 * Revision 1.2 2000/11/08 14:27:57 bjornw
209 * 2.4 port
210 *
211 * Revision 1.1 2000/11/06 13:56:00 bjornw
212 * Verbatim copy of the 1.24 version of e100net.c from elinux
213 *
214 * Revision 1.24 2000/10/04 15:55:23 bjornw
215 * * Use virt_to_phys etc. for DMA addresses
216 * * Removed bogus CHECKSUM_UNNECESSARY
217 *
218 *
219 */
220
221 #include <linux/config.h>
222
223 #include <linux/module.h>
224
225 #include <linux/kernel.h>
226 #include <linux/sched.h>
227 #include <linux/delay.h>
228 #include <linux/types.h>
229 #include <linux/fcntl.h>
230 #include <linux/interrupt.h>
231 #include <linux/ptrace.h>
232 #include <linux/ioport.h>
233 #include <linux/in.h>
234 #include <linux/slab.h>
235 #include <linux/string.h>
236 #include <linux/spinlock.h>
237 #include <linux/errno.h>
238 #include <linux/init.h>
239
240 #include <linux/if.h>
241 #include <linux/mii.h>
242 #include <linux/netdevice.h>
243 #include <linux/etherdevice.h>
244 #include <linux/skbuff.h>
245 #include <linux/ethtool.h>
246
247 #include <asm/arch/svinto.h>/* DMA and register descriptions */
248 #include <asm/io.h> /* LED_* I/O functions */
249 #include <asm/irq.h>
250 #include <asm/dma.h>
251 #include <asm/system.h>
252 #include <asm/bitops.h>
253 #include <asm/ethernet.h>
254 #include <asm/cache.h>
255
256 //#define ETHDEBUG
257 #define D(x)
258
259 /*
260 * The name of the card. Is used for messages and in the requests for
261 * io regions, irqs and dma channels
262 */
263
264 static const char* cardname = "ETRAX 100LX built-in ethernet controller";
265
266 /* A default ethernet address. Highlevel SW will set the real one later */
267
268 static struct sockaddr default_mac = {
269 0,
270 { 0x00, 0x40, 0x8C, 0xCD, 0x00, 0x00 }
271 };
272
273 /* Information that need to be kept for each board. */
274 struct net_local {
275 struct net_device_stats stats;
276 struct mii_if_info mii_if;
277
278 /* Tx control lock. This protects the transmit buffer ring
279 * state along with the "tx full" state of the driver. This
280 * means all netif_queue flow control actions are protected
281 * by this lock as well.
282 */
283 spinlock_t lock;
284 };
285
286 typedef struct etrax_eth_descr
287 {
288 etrax_dma_descr descr;
289 struct sk_buff* skb;
290 } etrax_eth_descr;
291
292 /* Some transceivers requires special handling */
293 struct transceiver_ops
294 {
295 unsigned int oui;
296 void (*check_speed)(struct net_device* dev);
297 void (*check_duplex)(struct net_device* dev);
298 };
299
300 struct transceiver_ops* transceiver;
301
302 /* Duplex settings */
303 enum duplex
304 {
305 half,
306 full,
307 autoneg
308 };
309
310 /* Dma descriptors etc. */
311
312 #define MAX_MEDIA_DATA_SIZE 1518
313
314 #define MIN_PACKET_LEN 46
315 #define ETHER_HEAD_LEN 14
316
317 /*
318 ** MDIO constants.
319 */
320 #define MDIO_START 0x1
321 #define MDIO_READ 0x2
322 #define MDIO_WRITE 0x1
323 #define MDIO_PREAMBLE 0xfffffffful
324
325 /* Broadcom specific */
326 #define MDIO_AUX_CTRL_STATUS_REG 0x18
327 #define MDIO_BC_FULL_DUPLEX_IND 0x1
328 #define MDIO_BC_SPEED 0x2
329
330 /* TDK specific */
331 #define MDIO_TDK_DIAGNOSTIC_REG 18
332 #define MDIO_TDK_DIAGNOSTIC_RATE 0x400
333 #define MDIO_TDK_DIAGNOSTIC_DPLX 0x800
334
335 /*Intel LXT972A specific*/
336 #define MDIO_INT_STATUS_REG_2 0x0011
337 #define MDIO_INT_FULL_DUPLEX_IND ( 1 << 9 )
338 #define MDIO_INT_SPEED ( 1 << 14 )
339
340 /* Network flash constants */
341 #define NET_FLASH_TIME (HZ/50) /* 20 ms */
342 #define NET_FLASH_PAUSE (HZ/100) /* 10 ms */
343 #define NET_LINK_UP_CHECK_INTERVAL (2*HZ) /* 2 s */
344 #define NET_DUPLEX_CHECK_INTERVAL (2*HZ) /* 2 s */
345
346 #define NO_NETWORK_ACTIVITY 0
347 #define NETWORK_ACTIVITY 1
348
349 #define NBR_OF_RX_DESC 64
350 #define NBR_OF_TX_DESC 256
351
352 /* Large packets are sent directly to upper layers while small packets are */
353 /* copied (to reduce memory waste). The following constant decides the breakpoint */
354 #define RX_COPYBREAK 256
355
356 /* Due to a chip bug we need to flush the cache when descriptors are returned */
357 /* to the DMA. To decrease performance impact we return descriptors in chunks. */
358 /* The following constant determines the number of descriptors to return. */
359 #define RX_QUEUE_THRESHOLD NBR_OF_RX_DESC/2
360
361 #define GET_BIT(bit,val) (((val) >> (bit)) & 0x01)
362
363 /* Define some macros to access ETRAX 100 registers */
364 #define SETF(var, reg, field, val) var = (var & ~IO_MASK_(reg##_, field##_)) | \
365 IO_FIELD_(reg##_, field##_, val)
366 #define SETS(var, reg, field, val) var = (var & ~IO_MASK_(reg##_, field##_)) | \
367 IO_STATE_(reg##_, field##_, _##val)
368
369 static etrax_eth_descr *myNextRxDesc; /* Points to the next descriptor to
370 to be processed */
371 static etrax_eth_descr *myLastRxDesc; /* The last processed descriptor */
372 static etrax_eth_descr *myPrevRxDesc; /* The descriptor right before myNextRxDesc */
373
374 static etrax_eth_descr RxDescList[NBR_OF_RX_DESC] __attribute__ ((aligned(32)));
375
376 static etrax_eth_descr* myFirstTxDesc; /* First packet not yet sent */
377 static etrax_eth_descr* myLastTxDesc; /* End of send queue */
378 static etrax_eth_descr* myNextTxDesc; /* Next descriptor to use */
379 static etrax_eth_descr TxDescList[NBR_OF_TX_DESC] __attribute__ ((aligned(32)));
380
381 static unsigned int network_rec_config_shadow = 0;
382 static unsigned int mdio_phy_addr; /* Transciever address */
383
384 static unsigned int network_tr_ctrl_shadow = 0;
385
386 /* Network speed indication. */
387 static struct timer_list speed_timer = TIMER_INITIALIZER(NULL, 0, 0);
388 static struct timer_list clear_led_timer = TIMER_INITIALIZER(NULL, 0, 0);
389 static int current_speed; /* Speed read from transceiver */
390 static int current_speed_selection; /* Speed selected by user */
391 static unsigned long led_next_time;
392 static int led_active;
393 static int rx_queue_len;
394
395 /* Duplex */
396 static struct timer_list duplex_timer = TIMER_INITIALIZER(NULL, 0, 0);
397 static int full_duplex;
398 static enum duplex current_duplex;
399
400 /* Index to functions, as function prototypes. */
401
402 static int etrax_ethernet_init(void);
403
404 static int e100_open(struct net_device *dev);
405 static int e100_set_mac_address(struct net_device *dev, void *addr);
406 static int e100_send_packet(struct sk_buff *skb, struct net_device *dev);
407 static irqreturn_t e100rxtx_interrupt(int irq, void *dev_id, struct pt_regs *regs);
408 static irqreturn_t e100nw_interrupt(int irq, void *dev_id, struct pt_regs *regs);
409 static void e100_rx(struct net_device *dev);
410 static int e100_close(struct net_device *dev);
411 static int e100_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd);
412 static int e100_ethtool_ioctl(struct net_device* dev, struct ifreq *ifr);
413 static int e100_set_config(struct net_device* dev, struct ifmap* map);
414 static void e100_tx_timeout(struct net_device *dev);
415 static struct net_device_stats *e100_get_stats(struct net_device *dev);
416 static void set_multicast_list(struct net_device *dev);
417 static void e100_hardware_send_packet(char *buf, int length);
418 static void update_rx_stats(struct net_device_stats *);
419 static void update_tx_stats(struct net_device_stats *);
420 static int e100_probe_transceiver(struct net_device* dev);
421
422 static void e100_check_speed(unsigned long priv);
423 static void e100_set_speed(struct net_device* dev, unsigned long speed);
424 static void e100_check_duplex(unsigned long priv);
425 static void e100_set_duplex(struct net_device* dev, enum duplex);
426 static void e100_negotiate(struct net_device* dev);
427
428 static int e100_get_mdio_reg(struct net_device *dev, int phy_id, int location);
429 static void e100_set_mdio_reg(struct net_device *dev, int phy_id, int location, int value);
430
431 static void e100_send_mdio_cmd(unsigned short cmd, int write_cmd);
432 static void e100_send_mdio_bit(unsigned char bit);
433 static unsigned char e100_receive_mdio_bit(void);
434 static void e100_reset_transceiver(struct net_device* net);
435
436 static void e100_clear_network_leds(unsigned long dummy);
437 static void e100_set_network_leds(int active);
438
439 static void broadcom_check_speed(struct net_device* dev);
440 static void broadcom_check_duplex(struct net_device* dev);
441 static void tdk_check_speed(struct net_device* dev);
442 static void tdk_check_duplex(struct net_device* dev);
443 static void intel_check_speed(struct net_device* dev);
444 static void intel_check_duplex(struct net_device* dev);
445 static void generic_check_speed(struct net_device* dev);
446 static void generic_check_duplex(struct net_device* dev);
447
448 struct transceiver_ops transceivers[] =
449 {
450 {0x1018, broadcom_check_speed, broadcom_check_duplex}, /* Broadcom */
451 {0xC039, tdk_check_speed, tdk_check_duplex}, /* TDK 2120 */
452 {0x039C, tdk_check_speed, tdk_check_duplex}, /* TDK 2120C */
453 {0x04de, intel_check_speed, intel_check_duplex}, /* Intel LXT972A*/
454 {0x0000, generic_check_speed, generic_check_duplex} /* Generic, must be last */
455 };
456
457 #define tx_done(dev) (*R_DMA_CH0_CMD == 0)
458
459 /*
460 * Check for a network adaptor of this type, and return '0' if one exists.
461 * If dev->base_addr == 0, probe all likely locations.
462 * If dev->base_addr == 1, always return failure.
463 * If dev->base_addr == 2, allocate space for the device and return success
464 * (detachable devices only).
465 */
466
467 static int __init
468 etrax_ethernet_init(void)
469 {
470 struct net_device *dev;
471 struct net_local* np;
472 int i, err;
473
474 printk(KERN_INFO
475 "ETRAX 100LX 10/100MBit ethernet v2.0 (c) 2000-2003 Axis Communications AB\n");
476
477 dev = alloc_etherdev(sizeof(struct net_local));
478 np = dev->priv;
479
480 if (!dev)
481 return -ENOMEM;
482
483 dev->base_addr = (unsigned int)R_NETWORK_SA_0; /* just to have something to show */
484
485 /* now setup our etrax specific stuff */
486
487 dev->irq = NETWORK_DMA_RX_IRQ_NBR; /* we really use DMATX as well... */
488 dev->dma = NETWORK_RX_DMA_NBR;
489
490 /* fill in our handlers so the network layer can talk to us in the future */
491
492 dev->open = e100_open;
493 dev->hard_start_xmit = e100_send_packet;
494 dev->stop = e100_close;
495 dev->get_stats = e100_get_stats;
496 dev->set_multicast_list = set_multicast_list;
497 dev->set_mac_address = e100_set_mac_address;
498 dev->do_ioctl = e100_ioctl;
499 dev->set_config = e100_set_config;
500 dev->tx_timeout = e100_tx_timeout;
501
502 /* Initialise the list of Etrax DMA-descriptors */
503
504 /* Initialise receive descriptors */
505
506 for (i = 0; i < NBR_OF_RX_DESC; i++) {
507 /* Allocate two extra cachelines to make sure that buffer used by DMA
508 * does not share cacheline with any other data (to avoid cache bug)
509 */
510 RxDescList[i].skb = dev_alloc_skb(MAX_MEDIA_DATA_SIZE + 2 * L1_CACHE_BYTES);
511 RxDescList[i].descr.ctrl = 0;
512 RxDescList[i].descr.sw_len = MAX_MEDIA_DATA_SIZE;
513 RxDescList[i].descr.next = virt_to_phys(&RxDescList[i + 1]);
514 RxDescList[i].descr.buf = L1_CACHE_ALIGN(virt_to_phys(RxDescList[i].skb->data));
515 RxDescList[i].descr.status = 0;
516 RxDescList[i].descr.hw_len = 0;
517 prepare_rx_descriptor(&RxDescList[i].descr);
518 }
519
520 RxDescList[NBR_OF_RX_DESC - 1].descr.ctrl = d_eol;
521 RxDescList[NBR_OF_RX_DESC - 1].descr.next = virt_to_phys(&RxDescList[0]);
522 rx_queue_len = 0;
523
524 /* Initialize transmit descriptors */
525 for (i = 0; i < NBR_OF_TX_DESC; i++) {
526 TxDescList[i].descr.ctrl = 0;
527 TxDescList[i].descr.sw_len = 0;
528 TxDescList[i].descr.next = virt_to_phys(&TxDescList[i + 1].descr);
529 TxDescList[i].descr.buf = 0;
530 TxDescList[i].descr.status = 0;
531 TxDescList[i].descr.hw_len = 0;
532 TxDescList[i].skb = 0;
533 }
534
535 TxDescList[NBR_OF_TX_DESC - 1].descr.ctrl = d_eol;
536 TxDescList[NBR_OF_TX_DESC - 1].descr.next = virt_to_phys(&TxDescList[0].descr);
537
538 /* Initialise initial pointers */
539
540 myNextRxDesc = &RxDescList[0];
541 myLastRxDesc = &RxDescList[NBR_OF_RX_DESC - 1];
542 myPrevRxDesc = &RxDescList[NBR_OF_RX_DESC - 1];
543 myFirstTxDesc = &TxDescList[0];
544 myNextTxDesc = &TxDescList[0];
545 myLastTxDesc = &TxDescList[NBR_OF_TX_DESC - 1];
546
547 /* Register device */
548 err = register_netdev(dev);
549 if (err) {
550 free_netdev(dev);
551 return err;
552 }
553
554 /* set the default MAC address */
555
556 e100_set_mac_address(dev, &default_mac);
557
558 /* Initialize speed indicator stuff. */
559
560 current_speed = 10;
561 current_speed_selection = 0; /* Auto */
562 speed_timer.expires = jiffies + NET_LINK_UP_CHECK_INTERVAL;
563 duplex_timer.data = (unsigned long)dev;
564 speed_timer.function = e100_check_speed;
565
566 clear_led_timer.function = e100_clear_network_leds;
567
568 full_duplex = 0;
569 current_duplex = autoneg;
570 duplex_timer.expires = jiffies + NET_DUPLEX_CHECK_INTERVAL;
571 duplex_timer.data = (unsigned long)dev;
572 duplex_timer.function = e100_check_duplex;
573
574 /* Initialize mii interface */
575 np->mii_if.phy_id = mdio_phy_addr;
576 np->mii_if.phy_id_mask = 0x1f;
577 np->mii_if.reg_num_mask = 0x1f;
578 np->mii_if.dev = dev;
579 np->mii_if.mdio_read = e100_get_mdio_reg;
580 np->mii_if.mdio_write = e100_set_mdio_reg;
581
582 /* Initialize group address registers to make sure that no */
583 /* unwanted addresses are matched */
584 *R_NETWORK_GA_0 = 0x00000000;
585 *R_NETWORK_GA_1 = 0x00000000;
586 return 0;
587 }
588
589 /* set MAC address of the interface. called from the core after a
590 * SIOCSIFADDR ioctl, and from the bootup above.
591 */
592
593 static int
594 e100_set_mac_address(struct net_device *dev, void *p)
595 {
596 struct net_local *np = (struct net_local *)dev->priv;
597 struct sockaddr *addr = p;
598 int i;
599
600 spin_lock(&np->lock); /* preemption protection */
601
602 /* remember it */
603
604 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
605
606 /* Write it to the hardware.
607 * Note the way the address is wrapped:
608 * *R_NETWORK_SA_0 = a0_0 | (a0_1 << 8) | (a0_2 << 16) | (a0_3 << 24);
609 * *R_NETWORK_SA_1 = a0_4 | (a0_5 << 8);
610 */
611
612 *R_NETWORK_SA_0 = dev->dev_addr[0] | (dev->dev_addr[1] << 8) |
613 (dev->dev_addr[2] << 16) | (dev->dev_addr[3] << 24);
614 *R_NETWORK_SA_1 = dev->dev_addr[4] | (dev->dev_addr[5] << 8);
615 *R_NETWORK_SA_2 = 0;
616
617 /* show it in the log as well */
618
619 printk(KERN_INFO "%s: changed MAC to ", dev->name);
620
621 for (i = 0; i < 5; i++)
622 printk("%02X:", dev->dev_addr[i]);
623
624 printk("%02X\n", dev->dev_addr[i]);
625
626 spin_unlock(&np->lock);
627
628 return 0;
629 }
630
631 /*
632 * Open/initialize the board. This is called (in the current kernel)
633 * sometime after booting when the 'ifconfig' program is run.
634 *
635 * This routine should set everything up anew at each open, even
636 * registers that "should" only need to be set once at boot, so that
637 * there is non-reboot way to recover if something goes wrong.
638 */
639
640 static int
641 e100_open(struct net_device *dev)
642 {
643 unsigned long flags;
644
645 /* enable the MDIO output pin */
646
647 *R_NETWORK_MGM_CTRL = IO_STATE(R_NETWORK_MGM_CTRL, mdoe, enable);
648
649 *R_IRQ_MASK0_CLR =
650 IO_STATE(R_IRQ_MASK0_CLR, overrun, clr) |
651 IO_STATE(R_IRQ_MASK0_CLR, underrun, clr) |
652 IO_STATE(R_IRQ_MASK0_CLR, excessive_col, clr);
653
654 /* clear dma0 and 1 eop and descr irq masks */
655 *R_IRQ_MASK2_CLR =
656 IO_STATE(R_IRQ_MASK2_CLR, dma0_descr, clr) |
657 IO_STATE(R_IRQ_MASK2_CLR, dma0_eop, clr) |
658 IO_STATE(R_IRQ_MASK2_CLR, dma1_descr, clr) |
659 IO_STATE(R_IRQ_MASK2_CLR, dma1_eop, clr);
660
661 /* Reset and wait for the DMA channels */
662
663 RESET_DMA(NETWORK_TX_DMA_NBR);
664 RESET_DMA(NETWORK_RX_DMA_NBR);
665 WAIT_DMA(NETWORK_TX_DMA_NBR);
666 WAIT_DMA(NETWORK_RX_DMA_NBR);
667
668 /* Initialise the etrax network controller */
669
670 /* allocate the irq corresponding to the receiving DMA */
671
672 if (request_irq(NETWORK_DMA_RX_IRQ_NBR, e100rxtx_interrupt,
673 SA_SAMPLE_RANDOM, cardname, (void *)dev)) {
674 goto grace_exit0;
675 }
676
677 /* allocate the irq corresponding to the transmitting DMA */
678
679 if (request_irq(NETWORK_DMA_TX_IRQ_NBR, e100rxtx_interrupt, 0,
680 cardname, (void *)dev)) {
681 goto grace_exit1;
682 }
683
684 /* allocate the irq corresponding to the network errors etc */
685
686 if (request_irq(NETWORK_STATUS_IRQ_NBR, e100nw_interrupt, 0,
687 cardname, (void *)dev)) {
688 goto grace_exit2;
689 }
690
691 /* give the HW an idea of what MAC address we want */
692
693 *R_NETWORK_SA_0 = dev->dev_addr[0] | (dev->dev_addr[1] << 8) |
694 (dev->dev_addr[2] << 16) | (dev->dev_addr[3] << 24);
695 *R_NETWORK_SA_1 = dev->dev_addr[4] | (dev->dev_addr[5] << 8);
696 *R_NETWORK_SA_2 = 0;
697
698 #if 0
699 /* use promiscuous mode for testing */
700 *R_NETWORK_GA_0 = 0xffffffff;
701 *R_NETWORK_GA_1 = 0xffffffff;
702
703 *R_NETWORK_REC_CONFIG = 0xd; /* broadcast rec, individ. rec, ma0 enabled */
704 #else
705 SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, broadcast, receive);
706 SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, ma0, enable);
707 SETF(network_rec_config_shadow, R_NETWORK_REC_CONFIG, duplex, full_duplex);
708 *R_NETWORK_REC_CONFIG = network_rec_config_shadow;
709 #endif
710
711 *R_NETWORK_GEN_CONFIG =
712 IO_STATE(R_NETWORK_GEN_CONFIG, phy, mii_clk) |
713 IO_STATE(R_NETWORK_GEN_CONFIG, enable, on);
714
715 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, clr_error, clr);
716 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, delay, none);
717 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, cancel, dont);
718 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, cd, enable);
719 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, retry, enable);
720 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, pad, enable);
721 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, crc, enable);
722 *R_NETWORK_TR_CTRL = network_tr_ctrl_shadow;
723
724 save_flags(flags);
725 cli();
726
727 /* enable the irq's for ethernet DMA */
728
729 *R_IRQ_MASK2_SET =
730 IO_STATE(R_IRQ_MASK2_SET, dma0_eop, set) |
731 IO_STATE(R_IRQ_MASK2_SET, dma1_eop, set);
732
733 *R_IRQ_MASK0_SET =
734 IO_STATE(R_IRQ_MASK0_SET, overrun, set) |
735 IO_STATE(R_IRQ_MASK0_SET, underrun, set) |
736 IO_STATE(R_IRQ_MASK0_SET, excessive_col, set);
737
738 /* make sure the irqs are cleared */
739
740 *R_DMA_CH0_CLR_INTR = IO_STATE(R_DMA_CH0_CLR_INTR, clr_eop, do);
741 *R_DMA_CH1_CLR_INTR = IO_STATE(R_DMA_CH1_CLR_INTR, clr_eop, do);
742
743 /* make sure the rec and transmit error counters are cleared */
744
745 (void)*R_REC_COUNTERS; /* dummy read */
746 (void)*R_TR_COUNTERS; /* dummy read */
747
748 /* start the receiving DMA channel so we can receive packets from now on */
749
750 *R_DMA_CH1_FIRST = virt_to_phys(myNextRxDesc);
751 *R_DMA_CH1_CMD = IO_STATE(R_DMA_CH1_CMD, cmd, start);
752
753 /* Set up transmit DMA channel so it can be restarted later */
754
755 *R_DMA_CH0_FIRST = 0;
756 *R_DMA_CH0_DESCR = virt_to_phys(myLastTxDesc);
757
758 restore_flags(flags);
759
760 /* Probe for transceiver */
761 if (e100_probe_transceiver(dev))
762 goto grace_exit3;
763
764 /* Start duplex/speed timers */
765 add_timer(&speed_timer);
766 add_timer(&duplex_timer);
767
768 /* We are now ready to accept transmit requeusts from
769 * the queueing layer of the networking.
770 */
771 netif_start_queue(dev);
772
773 return 0;
774
775 grace_exit3:
776 free_irq(NETWORK_STATUS_IRQ_NBR, (void *)dev);
777 grace_exit2:
778 free_irq(NETWORK_DMA_TX_IRQ_NBR, (void *)dev);
779 grace_exit1:
780 free_irq(NETWORK_DMA_RX_IRQ_NBR, (void *)dev);
781 grace_exit0:
782 return -EAGAIN;
783 }
784
785
786 static void
787 generic_check_speed(struct net_device* dev)
788 {
789 unsigned long data;
790 data = e100_get_mdio_reg(dev, mdio_phy_addr, MII_ADVERTISE);
791 if ((data & ADVERTISE_100FULL) ||
792 (data & ADVERTISE_100HALF))
793 current_speed = 100;
794 else
795 current_speed = 10;
796 }
797
798 static void
799 tdk_check_speed(struct net_device* dev)
800 {
801 unsigned long data;
802 data = e100_get_mdio_reg(dev, mdio_phy_addr, MDIO_TDK_DIAGNOSTIC_REG);
803 current_speed = (data & MDIO_TDK_DIAGNOSTIC_RATE ? 100 : 10);
804 }
805
806 static void
807 broadcom_check_speed(struct net_device* dev)
808 {
809 unsigned long data;
810 data = e100_get_mdio_reg(dev, mdio_phy_addr, MDIO_AUX_CTRL_STATUS_REG);
811 current_speed = (data & MDIO_BC_SPEED ? 100 : 10);
812 }
813
814 static void
815 intel_check_speed(struct net_device* dev)
816 {
817 unsigned long data;
818 data = e100_get_mdio_reg(dev, mdio_phy_addr, MDIO_INT_STATUS_REG_2);
819 current_speed = (data & MDIO_INT_SPEED ? 100 : 10);
820 }
821
822 static void
823 e100_check_speed(unsigned long priv)
824 {
825 struct net_device* dev = (struct net_device*)priv;
826 static int led_initiated = 0;
827 unsigned long data;
828 int old_speed = current_speed;
829
830 data = e100_get_mdio_reg(dev, mdio_phy_addr, MII_BMSR);
831 if (!(data & BMSR_LSTATUS)) {
832 current_speed = 0;
833 } else {
834 transceiver->check_speed(dev);
835 }
836
837 if ((old_speed != current_speed) || !led_initiated) {
838 led_initiated = 1;
839 e100_set_network_leds(NO_NETWORK_ACTIVITY);
840 }
841
842 /* Reinitialize the timer. */
843 speed_timer.expires = jiffies + NET_LINK_UP_CHECK_INTERVAL;
844 add_timer(&speed_timer);
845 }
846
847 static void
848 e100_negotiate(struct net_device* dev)
849 {
850 unsigned short data = e100_get_mdio_reg(dev, mdio_phy_addr, MII_ADVERTISE);
851
852 /* Discard old speed and duplex settings */
853 data &= ~(ADVERTISE_100HALF | ADVERTISE_100FULL |
854 ADVERTISE_10HALF | ADVERTISE_10FULL);
855
856 switch (current_speed_selection) {
857 case 10 :
858 if (current_duplex == full)
859 data |= ADVERTISE_10FULL;
860 else if (current_duplex == half)
861 data |= ADVERTISE_10HALF;
862 else
863 data |= ADVERTISE_10HALF | ADVERTISE_10FULL;
864 break;
865
866 case 100 :
867 if (current_duplex == full)
868 data |= ADVERTISE_100FULL;
869 else if (current_duplex == half)
870 data |= ADVERTISE_100HALF;
871 else
872 data |= ADVERTISE_100HALF | ADVERTISE_100FULL;
873 break;
874
875 case 0 : /* Auto */
876 if (current_duplex == full)
877 data |= ADVERTISE_100FULL | ADVERTISE_10FULL;
878 else if (current_duplex == half)
879 data |= ADVERTISE_100HALF | ADVERTISE_10HALF;
880 else
881 data |= ADVERTISE_10HALF | ADVERTISE_10FULL |
882 ADVERTISE_100HALF | ADVERTISE_100FULL;
883 break;
884
885 default : /* assume autoneg speed and duplex */
886 data |= ADVERTISE_10HALF | ADVERTISE_10FULL |
887 ADVERTISE_100HALF | ADVERTISE_100FULL;
888 }
889
890 e100_set_mdio_reg(dev, mdio_phy_addr, MII_ADVERTISE, data);
891
892 /* Renegotiate with link partner */
893 data = e100_get_mdio_reg(dev, mdio_phy_addr, MII_BMCR);
894 data |= BMCR_ANENABLE | BMCR_ANRESTART;
895
896 e100_set_mdio_reg(dev, mdio_phy_addr, MII_BMCR, data);
897 }
898
899 static void
900 e100_set_speed(struct net_device* dev, unsigned long speed)
901 {
902 if (speed != current_speed_selection) {
903 current_speed_selection = speed;
904 e100_negotiate(dev);
905 }
906 }
907
908 static void
909 e100_check_duplex(unsigned long priv)
910 {
911 struct net_device *dev = (struct net_device *)priv;
912 struct net_local *np = (struct net_local *)dev->priv;
913 int old_duplex = full_duplex;
914 transceiver->check_duplex(dev);
915 if (old_duplex != full_duplex) {
916 /* Duplex changed */
917 SETF(network_rec_config_shadow, R_NETWORK_REC_CONFIG, duplex, full_duplex);
918 *R_NETWORK_REC_CONFIG = network_rec_config_shadow;
919 }
920
921 /* Reinitialize the timer. */
922 duplex_timer.expires = jiffies + NET_DUPLEX_CHECK_INTERVAL;
923 add_timer(&duplex_timer);
924 np->mii_if.full_duplex = full_duplex;
925 }
926
927 static void
928 generic_check_duplex(struct net_device* dev)
929 {
930 unsigned long data;
931 data = e100_get_mdio_reg(dev, mdio_phy_addr, MII_ADVERTISE);
932 if ((data & ADVERTISE_10FULL) ||
933 (data & ADVERTISE_100FULL))
934 full_duplex = 1;
935 else
936 full_duplex = 0;
937 }
938
939 static void
940 tdk_check_duplex(struct net_device* dev)
941 {
942 unsigned long data;
943 data = e100_get_mdio_reg(dev, mdio_phy_addr, MDIO_TDK_DIAGNOSTIC_REG);
944 full_duplex = (data & MDIO_TDK_DIAGNOSTIC_DPLX) ? 1 : 0;
945 }
946
947 static void
948 broadcom_check_duplex(struct net_device* dev)
949 {
950 unsigned long data;
951 data = e100_get_mdio_reg(dev, mdio_phy_addr, MDIO_AUX_CTRL_STATUS_REG);
952 full_duplex = (data & MDIO_BC_FULL_DUPLEX_IND) ? 1 : 0;
953 }
954
955 static void
956 intel_check_duplex(struct net_device* dev)
957 {
958 unsigned long data;
959 data = e100_get_mdio_reg(dev, mdio_phy_addr, MDIO_INT_STATUS_REG_2);
960 full_duplex = (data & MDIO_INT_FULL_DUPLEX_IND) ? 1 : 0;
961 }
962
963 static void
964 e100_set_duplex(struct net_device* dev, enum duplex new_duplex)
965 {
966 if (new_duplex != current_duplex) {
967 current_duplex = new_duplex;
968 e100_negotiate(dev);
969 }
970 }
971
972 static int
973 e100_probe_transceiver(struct net_device* dev)
974 {
975 unsigned int phyid_high;
976 unsigned int phyid_low;
977 unsigned int oui;
978 struct transceiver_ops* ops = NULL;
979
980 /* Probe MDIO physical address */
981 for (mdio_phy_addr = 0; mdio_phy_addr <= 31; mdio_phy_addr++) {
982 if (e100_get_mdio_reg(dev, mdio_phy_addr, MII_BMSR) != 0xffff)
983 break;
984 }
985 if (mdio_phy_addr == 32)
986 return -ENODEV;
987
988 /* Get manufacturer */
989 phyid_high = e100_get_mdio_reg(dev, mdio_phy_addr, MII_PHYSID1);
990 phyid_low = e100_get_mdio_reg(dev, mdio_phy_addr, MII_PHYSID2);
991 oui = (phyid_high << 6) | (phyid_low >> 10);
992
993 for (ops = &transceivers[0]; ops->oui; ops++) {
994 if (ops->oui == oui)
995 break;
996 }
997 transceiver = ops;
998
999 return 0;
1000 }
1001
1002 static int
1003 e100_get_mdio_reg(struct net_device *dev, int phy_id, int location)
1004 {
1005 unsigned short cmd; /* Data to be sent on MDIO port */
1006 int data; /* Data read from MDIO */
1007 int bitCounter;
1008
1009 /* Start of frame, OP Code, Physical Address, Register Address */
1010 cmd = (MDIO_START << 14) | (MDIO_READ << 12) | (phy_id << 7) |
1011 (location << 2);
1012
1013 e100_send_mdio_cmd(cmd, 0);
1014
1015 data = 0;
1016
1017 /* Data... */
1018 for (bitCounter=15; bitCounter>=0 ; bitCounter--) {
1019 data |= (e100_receive_mdio_bit() << bitCounter);
1020 }
1021
1022 return data;
1023 }
1024
1025 static void
1026 e100_set_mdio_reg(struct net_device *dev, int phy_id, int location, int value)
1027 {
1028 int bitCounter;
1029 unsigned short cmd;
1030
1031 cmd = (MDIO_START << 14) | (MDIO_WRITE << 12) | (phy_id << 7) |
1032 (location << 2);
1033
1034 e100_send_mdio_cmd(cmd, 1);
1035
1036 /* Data... */
1037 for (bitCounter=15; bitCounter>=0 ; bitCounter--) {
1038 e100_send_mdio_bit(GET_BIT(bitCounter, value));
1039 }
1040
1041 }
1042
1043 static void
1044 e100_send_mdio_cmd(unsigned short cmd, int write_cmd)
1045 {
1046 int bitCounter;
1047 unsigned char data = 0x2;
1048
1049 /* Preamble */
1050 for (bitCounter = 31; bitCounter>= 0; bitCounter--)
1051 e100_send_mdio_bit(GET_BIT(bitCounter, MDIO_PREAMBLE));
1052
1053 for (bitCounter = 15; bitCounter >= 2; bitCounter--)
1054 e100_send_mdio_bit(GET_BIT(bitCounter, cmd));
1055
1056 /* Turnaround */
1057 for (bitCounter = 1; bitCounter >= 0 ; bitCounter--)
1058 if (write_cmd)
1059 e100_send_mdio_bit(GET_BIT(bitCounter, data));
1060 else
1061 e100_receive_mdio_bit();
1062 }
1063
1064 static void
1065 e100_send_mdio_bit(unsigned char bit)
1066 {
1067 *R_NETWORK_MGM_CTRL =
1068 IO_STATE(R_NETWORK_MGM_CTRL, mdoe, enable) |
1069 IO_FIELD(R_NETWORK_MGM_CTRL, mdio, bit);
1070 udelay(1);
1071 *R_NETWORK_MGM_CTRL =
1072 IO_STATE(R_NETWORK_MGM_CTRL, mdoe, enable) |
1073 IO_MASK(R_NETWORK_MGM_CTRL, mdck) |
1074 IO_FIELD(R_NETWORK_MGM_CTRL, mdio, bit);
1075 udelay(1);
1076 }
1077
1078 static unsigned char
1079 e100_receive_mdio_bit()
1080 {
1081 unsigned char bit;
1082 *R_NETWORK_MGM_CTRL = 0;
1083 bit = IO_EXTRACT(R_NETWORK_STAT, mdio, *R_NETWORK_STAT);
1084 udelay(1);
1085 *R_NETWORK_MGM_CTRL = IO_MASK(R_NETWORK_MGM_CTRL, mdck);
1086 udelay(1);
1087 return bit;
1088 }
1089
1090 static void
1091 e100_reset_transceiver(struct net_device* dev)
1092 {
1093 unsigned short cmd;
1094 unsigned short data;
1095 int bitCounter;
1096
1097 data = e100_get_mdio_reg(dev, mdio_phy_addr, MII_BMCR);
1098
1099 cmd = (MDIO_START << 14) | (MDIO_WRITE << 12) | (mdio_phy_addr << 7) | (MII_BMCR << 2);
1100
1101 e100_send_mdio_cmd(cmd, 1);
1102
1103 data |= 0x8000;
1104
1105 for (bitCounter = 15; bitCounter >= 0 ; bitCounter--) {
1106 e100_send_mdio_bit(GET_BIT(bitCounter, data));
1107 }
1108 }
1109
1110 /* Called by upper layers if they decide it took too long to complete
1111 * sending a packet - we need to reset and stuff.
1112 */
1113
1114 static void
1115 e100_tx_timeout(struct net_device *dev)
1116 {
1117 struct net_local *np = (struct net_local *)dev->priv;
1118 unsigned long flags;
1119
1120 spin_lock_irqsave(&np->lock, flags);
1121
1122 printk(KERN_WARNING "%s: transmit timed out, %s?\n", dev->name,
1123 tx_done(dev) ? "IRQ problem" : "network cable problem");
1124
1125 /* remember we got an error */
1126
1127 np->stats.tx_errors++;
1128
1129 /* reset the TX DMA in case it has hung on something */
1130
1131 RESET_DMA(NETWORK_TX_DMA_NBR);
1132 WAIT_DMA(NETWORK_TX_DMA_NBR);
1133
1134 /* Reset the transceiver. */
1135
1136 e100_reset_transceiver(dev);
1137
1138 /* and get rid of the packets that never got an interrupt */
1139 while (myFirstTxDesc != myNextTxDesc)
1140 {
1141 dev_kfree_skb(myFirstTxDesc->skb);
1142 myFirstTxDesc->skb = 0;
1143 myFirstTxDesc = phys_to_virt(myFirstTxDesc->descr.next);
1144 }
1145
1146 /* Set up transmit DMA channel so it can be restarted later */
1147 *R_DMA_CH0_FIRST = 0;
1148 *R_DMA_CH0_DESCR = virt_to_phys(myLastTxDesc);
1149
1150 /* tell the upper layers we're ok again */
1151
1152 netif_wake_queue(dev);
1153 spin_unlock_irqrestore(&np->lock, flags);
1154 }
1155
1156
1157 /* This will only be invoked if the driver is _not_ in XOFF state.
1158 * What this means is that we need not check it, and that this
1159 * invariant will hold if we make sure that the netif_*_queue()
1160 * calls are done at the proper times.
1161 */
1162
1163 static int
1164 e100_send_packet(struct sk_buff *skb, struct net_device *dev)
1165 {
1166 struct net_local *np = (struct net_local *)dev->priv;
1167 unsigned char *buf = skb->data;
1168 unsigned long flags;
1169
1170 #ifdef ETHDEBUG
1171 printk("send packet len %d\n", length);
1172 #endif
1173 spin_lock_irqsave(&np->lock, flags); /* protect from tx_interrupt and ourself */
1174
1175 myNextTxDesc->skb = skb;
1176
1177 dev->trans_start = jiffies;
1178
1179 e100_hardware_send_packet(buf, skb->len);
1180
1181 myNextTxDesc = phys_to_virt(myNextTxDesc->descr.next);
1182
1183 /* Stop queue if full */
1184 if (myNextTxDesc == myFirstTxDesc) {
1185 netif_stop_queue(dev);
1186 }
1187
1188 spin_unlock_irqrestore(&np->lock, flags);
1189
1190 return 0;
1191 }
1192
1193 /*
1194 * The typical workload of the driver:
1195 * Handle the network interface interrupts.
1196 */
1197
1198 static irqreturn_t
1199 e100rxtx_interrupt(int irq, void *dev_id, struct pt_regs * regs)
1200 {
1201 struct net_device *dev = (struct net_device *)dev_id;
1202 struct net_local *np = (struct net_local *)dev->priv;
1203 unsigned long irqbits = *R_IRQ_MASK2_RD;
1204
1205 /* Disable RX/TX IRQs to avoid reentrancy */
1206 *R_IRQ_MASK2_CLR =
1207 IO_STATE(R_IRQ_MASK2_CLR, dma0_eop, clr) |
1208 IO_STATE(R_IRQ_MASK2_CLR, dma1_eop, clr);
1209
1210 /* Handle received packets */
1211 if (irqbits & IO_STATE(R_IRQ_MASK2_RD, dma1_eop, active)) {
1212 /* acknowledge the eop interrupt */
1213
1214 *R_DMA_CH1_CLR_INTR = IO_STATE(R_DMA_CH1_CLR_INTR, clr_eop, do);
1215
1216 /* check if one or more complete packets were indeed received */
1217
1218 while ((*R_DMA_CH1_FIRST != virt_to_phys(myNextRxDesc)) &&
1219 (myNextRxDesc != myLastRxDesc)) {
1220 /* Take out the buffer and give it to the OS, then
1221 * allocate a new buffer to put a packet in.
1222 */
1223 e100_rx(dev);
1224 ((struct net_local *)dev->priv)->stats.rx_packets++;
1225 /* restart/continue on the channel, for safety */
1226 *R_DMA_CH1_CMD = IO_STATE(R_DMA_CH1_CMD, cmd, restart);
1227 /* clear dma channel 1 eop/descr irq bits */
1228 *R_DMA_CH1_CLR_INTR =
1229 IO_STATE(R_DMA_CH1_CLR_INTR, clr_eop, do) |
1230 IO_STATE(R_DMA_CH1_CLR_INTR, clr_descr, do);
1231
1232 /* now, we might have gotten another packet
1233 so we have to loop back and check if so */
1234 }
1235 }
1236
1237 /* Report any packets that have been sent */
1238 while (myFirstTxDesc != phys_to_virt(*R_DMA_CH0_FIRST) &&
1239 myFirstTxDesc != myNextTxDesc)
1240 {
1241 np->stats.tx_bytes += myFirstTxDesc->skb->len;
1242 np->stats.tx_packets++;
1243
1244 /* dma is ready with the transmission of the data in tx_skb, so now
1245 we can release the skb memory */
1246 dev_kfree_skb_irq(myFirstTxDesc->skb);
1247 myFirstTxDesc->skb = 0;
1248 myFirstTxDesc = phys_to_virt(myFirstTxDesc->descr.next);
1249 }
1250
1251 if (irqbits & IO_STATE(R_IRQ_MASK2_RD, dma0_eop, active)) {
1252 /* acknowledge the eop interrupt and wake up queue */
1253 *R_DMA_CH0_CLR_INTR = IO_STATE(R_DMA_CH0_CLR_INTR, clr_eop, do);
1254 netif_wake_queue(dev);
1255 }
1256
1257 /* Enable RX/TX IRQs again */
1258 *R_IRQ_MASK2_SET =
1259 IO_STATE(R_IRQ_MASK2_SET, dma0_eop, set) |
1260 IO_STATE(R_IRQ_MASK2_SET, dma1_eop, set);
1261
1262 return IRQ_HANDLED;
1263 }
1264
1265 static irqreturn_t
1266 e100nw_interrupt(int irq, void *dev_id, struct pt_regs * regs)
1267 {
1268 struct net_device *dev = (struct net_device *)dev_id;
1269 struct net_local *np = (struct net_local *)dev->priv;
1270 unsigned long irqbits = *R_IRQ_MASK0_RD;
1271
1272 /* check for underrun irq */
1273 if (irqbits & IO_STATE(R_IRQ_MASK0_RD, underrun, active)) {
1274 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, clr_error, clr);
1275 *R_NETWORK_TR_CTRL = network_tr_ctrl_shadow;
1276 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, clr_error, nop);
1277 np->stats.tx_errors++;
1278 D(printk("ethernet receiver underrun!\n"));
1279 }
1280
1281 /* check for overrun irq */
1282 if (irqbits & IO_STATE(R_IRQ_MASK0_RD, overrun, active)) {
1283 update_rx_stats(&np->stats); /* this will ack the irq */
1284 D(printk("ethernet receiver overrun!\n"));
1285 }
1286 /* check for excessive collision irq */
1287 if (irqbits & IO_STATE(R_IRQ_MASK0_RD, excessive_col, active)) {
1288 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, clr_error, clr);
1289 *R_NETWORK_TR_CTRL = network_tr_ctrl_shadow;
1290 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, clr_error, nop);
1291 *R_NETWORK_TR_CTRL = IO_STATE(R_NETWORK_TR_CTRL, clr_error, clr);
1292 np->stats.tx_errors++;
1293 D(printk("ethernet excessive collisions!\n"));
1294 }
1295 return IRQ_HANDLED;
1296 }
1297
1298 /* We have a good packet(s), get it/them out of the buffers. */
1299 static void
1300 e100_rx(struct net_device *dev)
1301 {
1302 struct sk_buff *skb;
1303 int length = 0;
1304 struct net_local *np = (struct net_local *)dev->priv;
1305 unsigned char *skb_data_ptr;
1306 #ifdef ETHDEBUG
1307 int i;
1308 #endif
1309
1310 if (!led_active && time_after(jiffies, led_next_time)) {
1311 /* light the network leds depending on the current speed. */
1312 e100_set_network_leds(NETWORK_ACTIVITY);
1313
1314 /* Set the earliest time we may clear the LED */
1315 led_next_time = jiffies + NET_FLASH_TIME;
1316 led_active = 1;
1317 mod_timer(&clear_led_timer, jiffies + HZ/10);
1318 }
1319
1320 length = myNextRxDesc->descr.hw_len - 4;
1321 ((struct net_local *)dev->priv)->stats.rx_bytes += length;
1322
1323 #ifdef ETHDEBUG
1324 printk("Got a packet of length %d:\n", length);
1325 /* dump the first bytes in the packet */
1326 skb_data_ptr = (unsigned char *)phys_to_virt(myNextRxDesc->descr.buf);
1327 for (i = 0; i < 8; i++) {
1328 printk("%d: %.2x %.2x %.2x %.2x %.2x %.2x %.2x %.2x\n", i * 8,
1329 skb_data_ptr[0],skb_data_ptr[1],skb_data_ptr[2],skb_data_ptr[3],
1330 skb_data_ptr[4],skb_data_ptr[5],skb_data_ptr[6],skb_data_ptr[7]);
1331 skb_data_ptr += 8;
1332 }
1333 #endif
1334
1335 if (length < RX_COPYBREAK) {
1336 /* Small packet, copy data */
1337 skb = dev_alloc_skb(length - ETHER_HEAD_LEN);
1338 if (!skb) {
1339 np->stats.rx_errors++;
1340 printk(KERN_NOTICE "%s: Memory squeeze, dropping packet.\n", dev->name);
1341 return;
1342 }
1343
1344 skb_put(skb, length - ETHER_HEAD_LEN); /* allocate room for the packet body */
1345 skb_data_ptr = skb_push(skb, ETHER_HEAD_LEN); /* allocate room for the header */
1346
1347 #ifdef ETHDEBUG
1348 printk("head = 0x%x, data = 0x%x, tail = 0x%x, end = 0x%x\n",
1349 skb->head, skb->data, skb->tail, skb->end);
1350 printk("copying packet to 0x%x.\n", skb_data_ptr);
1351 #endif
1352
1353 memcpy(skb_data_ptr, phys_to_virt(myNextRxDesc->descr.buf), length);
1354 }
1355 else {
1356 /* Large packet, send directly to upper layers and allocate new
1357 * memory (aligned to cache line boundary to avoid bug).
1358 * Before sending the skb to upper layers we must make sure that
1359 * skb->data points to the aligned start of the packet.
1360 */
1361 int align;
1362 struct sk_buff *new_skb = dev_alloc_skb(MAX_MEDIA_DATA_SIZE + 2 * L1_CACHE_BYTES);
1363 if (!new_skb) {
1364 np->stats.rx_errors++;
1365 printk(KERN_NOTICE "%s: Memory squeeze, dropping packet.\n", dev->name);
1366 return;
1367 }
1368 skb = myNextRxDesc->skb;
1369 align = (int)phys_to_virt(myNextRxDesc->descr.buf) - (int)skb->data;
1370 skb_put(skb, length + align);
1371 skb_pull(skb, align); /* Remove alignment bytes */
1372 myNextRxDesc->skb = new_skb;
1373 myNextRxDesc->descr.buf = L1_CACHE_ALIGN(virt_to_phys(myNextRxDesc->skb->data));
1374 }
1375
1376 skb->dev = dev;
1377 skb->protocol = eth_type_trans(skb, dev);
1378
1379 /* Send the packet to the upper layers */
1380 netif_rx(skb);
1381
1382 /* Prepare for next packet */
1383 myNextRxDesc->descr.status = 0;
1384 myPrevRxDesc = myNextRxDesc;
1385 myNextRxDesc = phys_to_virt(myNextRxDesc->descr.next);
1386
1387 rx_queue_len++;
1388
1389 /* Check if descriptors should be returned */
1390 if (rx_queue_len == RX_QUEUE_THRESHOLD) {
1391 flush_etrax_cache();
1392 myPrevRxDesc->descr.ctrl |= d_eol;
1393 myLastRxDesc->descr.ctrl &= ~d_eol;
1394 myLastRxDesc = myPrevRxDesc;
1395 rx_queue_len = 0;
1396 }
1397 }
1398
1399 /* The inverse routine to net_open(). */
1400 static int
1401 e100_close(struct net_device *dev)
1402 {
1403 struct net_local *np = (struct net_local *)dev->priv;
1404
1405 printk(KERN_INFO "Closing %s.\n", dev->name);
1406
1407 netif_stop_queue(dev);
1408
1409 *R_IRQ_MASK0_CLR =
1410 IO_STATE(R_IRQ_MASK0_CLR, overrun, clr) |
1411 IO_STATE(R_IRQ_MASK0_CLR, underrun, clr) |
1412 IO_STATE(R_IRQ_MASK0_CLR, excessive_col, clr);
1413
1414 *R_IRQ_MASK2_CLR =
1415 IO_STATE(R_IRQ_MASK2_CLR, dma0_descr, clr) |
1416 IO_STATE(R_IRQ_MASK2_CLR, dma0_eop, clr) |
1417 IO_STATE(R_IRQ_MASK2_CLR, dma1_descr, clr) |
1418 IO_STATE(R_IRQ_MASK2_CLR, dma1_eop, clr);
1419
1420 /* Stop the receiver and the transmitter */
1421
1422 RESET_DMA(NETWORK_TX_DMA_NBR);
1423 RESET_DMA(NETWORK_RX_DMA_NBR);
1424
1425 /* Flush the Tx and disable Rx here. */
1426
1427 free_irq(NETWORK_DMA_RX_IRQ_NBR, (void *)dev);
1428 free_irq(NETWORK_DMA_TX_IRQ_NBR, (void *)dev);
1429 free_irq(NETWORK_STATUS_IRQ_NBR, (void *)dev);
1430
1431 /* Update the statistics here. */
1432
1433 update_rx_stats(&np->stats);
1434 update_tx_stats(&np->stats);
1435
1436 /* Stop speed/duplex timers */
1437 del_timer(&speed_timer);
1438 del_timer(&duplex_timer);
1439
1440 return 0;
1441 }
1442
1443 static int
1444 e100_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
1445 {
1446 struct mii_ioctl_data *data = if_mii(ifr);
1447 struct net_local *np = netdev_priv(dev);
1448
1449 spin_lock(&np->lock); /* Preempt protection */
1450 switch (cmd) {
1451 case SIOCETHTOOL:
1452 return e100_ethtool_ioctl(dev,ifr);
1453 case SIOCGMIIPHY: /* Get PHY address */
1454 data->phy_id = mdio_phy_addr;
1455 break;
1456 case SIOCGMIIREG: /* Read MII register */
1457 data->val_out = e100_get_mdio_reg(dev, mdio_phy_addr, data->reg_num);
1458 break;
1459 case SIOCSMIIREG: /* Write MII register */
1460 e100_set_mdio_reg(dev, mdio_phy_addr, data->reg_num, data->val_in);
1461 break;
1462 /* The ioctls below should be considered obsolete but are */
1463 /* still present for compatability with old scripts/apps */
1464 case SET_ETH_SPEED_10: /* 10 Mbps */
1465 e100_set_speed(dev, 10);
1466 break;
1467 case SET_ETH_SPEED_100: /* 100 Mbps */
1468 e100_set_speed(dev, 100);
1469 break;
1470 case SET_ETH_SPEED_AUTO: /* Auto negotiate speed */
1471 e100_set_speed(dev, 0);
1472 break;
1473 case SET_ETH_DUPLEX_HALF: /* Half duplex. */
1474 e100_set_duplex(dev, half);
1475 break;
1476 case SET_ETH_DUPLEX_FULL: /* Full duplex. */
1477 e100_set_duplex(dev, full);
1478 break;
1479 case SET_ETH_DUPLEX_AUTO: /* Autonegotiate duplex*/
1480 e100_set_duplex(dev, autoneg);
1481 break;
1482 default:
1483 return -EINVAL;
1484 }
1485 spin_unlock(&np->lock);
1486 return 0;
1487 }
1488
1489 static int
1490 e100_ethtool_ioctl(struct net_device *dev, struct ifreq *ifr)
1491 {
1492 struct ethtool_cmd ecmd;
1493
1494 if (copy_from_user(&ecmd, ifr->ifr_data, sizeof (ecmd)))
1495 return -EFAULT;
1496
1497 switch (ecmd.cmd) {
1498 case ETHTOOL_GSET:
1499 {
1500 memset((void *) &ecmd, 0, sizeof (ecmd));
1501 ecmd.supported =
1502 SUPPORTED_Autoneg | SUPPORTED_TP | SUPPORTED_MII |
1503 SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full |
1504 SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full;
1505 ecmd.port = PORT_TP;
1506 ecmd.transceiver = XCVR_EXTERNAL;
1507 ecmd.phy_address = mdio_phy_addr;
1508 ecmd.speed = current_speed;
1509 ecmd.duplex = full_duplex ? DUPLEX_FULL : DUPLEX_HALF;
1510 ecmd.advertising = ADVERTISED_TP;
1511 if (current_duplex == autoneg && current_speed_selection == 0)
1512 ecmd.advertising |= ADVERTISED_Autoneg;
1513 else {
1514 ecmd.advertising |=
1515 ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full |
1516 ADVERTISED_100baseT_Half | ADVERTISED_100baseT_Full;
1517 if (current_speed_selection == 10)
1518 ecmd.advertising &= ~(ADVERTISED_100baseT_Half | ADVERTISED_100baseT_Full);
1519 else if (current_speed_selection == 100)
1520 ecmd.advertising &= ~(ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full);
1521 if (current_duplex == half)
1522 ecmd.advertising &= ~(ADVERTISED_10baseT_Full | ADVERTISED_100baseT_Full);
1523 else if (current_duplex == full)
1524 ecmd.advertising &= ~(ADVERTISED_10baseT_Half | ADVERTISED_100baseT_Half);
1525 }
1526 ecmd.autoneg = AUTONEG_ENABLE;
1527 if (copy_to_user(ifr->ifr_data, &ecmd, sizeof (ecmd)))
1528 return -EFAULT;
1529 }
1530 break;
1531 case ETHTOOL_SSET:
1532 {
1533 if (!capable(CAP_NET_ADMIN)) {
1534 return -EPERM;
1535 }
1536 if (ecmd.autoneg == AUTONEG_ENABLE) {
1537 e100_set_duplex(dev, autoneg);
1538 e100_set_speed(dev, 0);
1539 } else {
1540 e100_set_duplex(dev, ecmd.duplex == DUPLEX_HALF ? half : full);
1541 e100_set_speed(dev, ecmd.speed == SPEED_10 ? 10: 100);
1542 }
1543 }
1544 break;
1545 case ETHTOOL_GDRVINFO:
1546 {
1547 struct ethtool_drvinfo info;
1548 memset((void *) &info, 0, sizeof (info));
1549 strncpy(info.driver, "ETRAX 100LX", sizeof(info.driver) - 1);
1550 strncpy(info.version, "$Revision: 1.31 $", sizeof(info.version) - 1);
1551 strncpy(info.fw_version, "N/A", sizeof(info.fw_version) - 1);
1552 strncpy(info.bus_info, "N/A", sizeof(info.bus_info) - 1);
1553 info.regdump_len = 0;
1554 info.eedump_len = 0;
1555 info.testinfo_len = 0;
1556 if (copy_to_user(ifr->ifr_data, &info, sizeof (info)))
1557 return -EFAULT;
1558 }
1559 break;
1560 case ETHTOOL_NWAY_RST:
1561 if (current_duplex == autoneg && current_speed_selection == 0)
1562 e100_negotiate(dev);
1563 break;
1564 default:
1565 return -EOPNOTSUPP;
1566 break;
1567 }
1568 return 0;
1569 }
1570
1571 static int
1572 e100_set_config(struct net_device *dev, struct ifmap *map)
1573 {
1574 struct net_local *np = (struct net_local *)dev->priv;
1575 spin_lock(&np->lock); /* Preempt protection */
1576
1577 switch(map->port) {
1578 case IF_PORT_UNKNOWN:
1579 /* Use autoneg */
1580 e100_set_speed(dev, 0);
1581 e100_set_duplex(dev, autoneg);
1582 break;
1583 case IF_PORT_10BASET:
1584 e100_set_speed(dev, 10);
1585 e100_set_duplex(dev, autoneg);
1586 break;
1587 case IF_PORT_100BASET:
1588 case IF_PORT_100BASETX:
1589 e100_set_speed(dev, 100);
1590 e100_set_duplex(dev, autoneg);
1591 break;
1592 case IF_PORT_100BASEFX:
1593 case IF_PORT_10BASE2:
1594 case IF_PORT_AUI:
1595 spin_unlock(&np->lock);
1596 return -EOPNOTSUPP;
1597 break;
1598 default:
1599 printk(KERN_ERR "%s: Invalid media selected", dev->name);
1600 spin_unlock(&np->lock);
1601 return -EINVAL;
1602 }
1603 spin_unlock(&np->lock);
1604 return 0;
1605 }
1606
1607 static void
1608 update_rx_stats(struct net_device_stats *es)
1609 {
1610 unsigned long r = *R_REC_COUNTERS;
1611 /* update stats relevant to reception errors */
1612 es->rx_fifo_errors += IO_EXTRACT(R_REC_COUNTERS, congestion, r);
1613 es->rx_crc_errors += IO_EXTRACT(R_REC_COUNTERS, crc_error, r);
1614 es->rx_frame_errors += IO_EXTRACT(R_REC_COUNTERS, alignment_error, r);
1615 es->rx_length_errors += IO_EXTRACT(R_REC_COUNTERS, oversize, r);
1616 }
1617
1618 static void
1619 update_tx_stats(struct net_device_stats *es)
1620 {
1621 unsigned long r = *R_TR_COUNTERS;
1622 /* update stats relevant to transmission errors */
1623 es->collisions +=
1624 IO_EXTRACT(R_TR_COUNTERS, single_col, r) +
1625 IO_EXTRACT(R_TR_COUNTERS, multiple_col, r);
1626 es->tx_errors += IO_EXTRACT(R_TR_COUNTERS, deferred, r);
1627 }
1628
1629 /*
1630 * Get the current statistics.
1631 * This may be called with the card open or closed.
1632 */
1633 static struct net_device_stats *
1634 e100_get_stats(struct net_device *dev)
1635 {
1636 struct net_local *lp = (struct net_local *)dev->priv;
1637 unsigned long flags;
1638 spin_lock_irqsave(&lp->lock, flags);
1639
1640 update_rx_stats(&lp->stats);
1641 update_tx_stats(&lp->stats);
1642
1643 spin_unlock_irqrestore(&lp->lock, flags);
1644 return &lp->stats;
1645 }
1646
1647 /*
1648 * Set or clear the multicast filter for this adaptor.
1649 * num_addrs == -1 Promiscuous mode, receive all packets
1650 * num_addrs == 0 Normal mode, clear multicast list
1651 * num_addrs > 0 Multicast mode, receive normal and MC packets,
1652 * and do best-effort filtering.
1653 */
1654 static void
1655 set_multicast_list(struct net_device *dev)
1656 {
1657 struct net_local *lp = (struct net_local *)dev->priv;
1658 int num_addr = dev->mc_count;
1659 unsigned long int lo_bits;
1660 unsigned long int hi_bits;
1661 spin_lock(&lp->lock);
1662 if (dev->flags & IFF_PROMISC)
1663 {
1664 /* promiscuous mode */
1665 lo_bits = 0xfffffffful;
1666 hi_bits = 0xfffffffful;
1667
1668 /* Enable individual receive */
1669 SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, individual, receive);
1670 *R_NETWORK_REC_CONFIG = network_rec_config_shadow;
1671 } else if (dev->flags & IFF_ALLMULTI) {
1672 /* enable all multicasts */
1673 lo_bits = 0xfffffffful;
1674 hi_bits = 0xfffffffful;
1675
1676 /* Disable individual receive */
1677 SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, individual, discard);
1678 *R_NETWORK_REC_CONFIG = network_rec_config_shadow;
1679 } else if (num_addr == 0) {
1680 /* Normal, clear the mc list */
1681 lo_bits = 0x00000000ul;
1682 hi_bits = 0x00000000ul;
1683
1684 /* Disable individual receive */
1685 SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, individual, discard);
1686 *R_NETWORK_REC_CONFIG = network_rec_config_shadow;
1687 } else {
1688 /* MC mode, receive normal and MC packets */
1689 char hash_ix;
1690 struct dev_mc_list *dmi = dev->mc_list;
1691 int i;
1692 char *baddr;
1693 lo_bits = 0x00000000ul;
1694 hi_bits = 0x00000000ul;
1695 for (i=0; i<num_addr; i++) {
1696 /* Calculate the hash index for the GA registers */
1697
1698 hash_ix = 0;
1699 baddr = dmi->dmi_addr;
1700 hash_ix ^= (*baddr) & 0x3f;
1701 hash_ix ^= ((*baddr) >> 6) & 0x03;
1702 ++baddr;
1703 hash_ix ^= ((*baddr) << 2) & 0x03c;
1704 hash_ix ^= ((*baddr) >> 4) & 0xf;
1705 ++baddr;
1706 hash_ix ^= ((*baddr) << 4) & 0x30;
1707 hash_ix ^= ((*baddr) >> 2) & 0x3f;
1708 ++baddr;
1709 hash_ix ^= (*baddr) & 0x3f;
1710 hash_ix ^= ((*baddr) >> 6) & 0x03;
1711 ++baddr;
1712 hash_ix ^= ((*baddr) << 2) & 0x03c;
1713 hash_ix ^= ((*baddr) >> 4) & 0xf;
1714 ++baddr;
1715 hash_ix ^= ((*baddr) << 4) & 0x30;
1716 hash_ix ^= ((*baddr) >> 2) & 0x3f;
1717
1718 hash_ix &= 0x3f;
1719
1720 if (hash_ix >= 32) {
1721 hi_bits |= (1 << (hash_ix-32));
1722 }
1723 else {
1724 lo_bits |= (1 << hash_ix);
1725 }
1726 dmi = dmi->next;
1727 }
1728 /* Disable individual receive */
1729 SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, individual, discard);
1730 *R_NETWORK_REC_CONFIG = network_rec_config_shadow;
1731 }
1732 *R_NETWORK_GA_0 = lo_bits;
1733 *R_NETWORK_GA_1 = hi_bits;
1734 spin_unlock(&lp->lock);
1735 }
1736
1737 void
1738 e100_hardware_send_packet(char *buf, int length)
1739 {
1740 D(printk("e100 send pack, buf 0x%x len %d\n", buf, length));
1741
1742 if (!led_active && time_after(jiffies, led_next_time)) {
1743 /* light the network leds depending on the current speed. */
1744 e100_set_network_leds(NETWORK_ACTIVITY);
1745
1746 /* Set the earliest time we may clear the LED */
1747 led_next_time = jiffies + NET_FLASH_TIME;
1748 led_active = 1;
1749 mod_timer(&clear_led_timer, jiffies + HZ/10);
1750 }
1751
1752 /* configure the tx dma descriptor */
1753 myNextTxDesc->descr.sw_len = length;
1754 myNextTxDesc->descr.ctrl = d_eop | d_eol | d_wait;
1755 myNextTxDesc->descr.buf = virt_to_phys(buf);
1756
1757 /* Move end of list */
1758 myLastTxDesc->descr.ctrl &= ~d_eol;
1759 myLastTxDesc = myNextTxDesc;
1760
1761 /* Restart DMA channel */
1762 *R_DMA_CH0_CMD = IO_STATE(R_DMA_CH0_CMD, cmd, restart);
1763 }
1764
1765 static void
1766 e100_clear_network_leds(unsigned long dummy)
1767 {
1768 if (led_active && time_after(jiffies, led_next_time)) {
1769 e100_set_network_leds(NO_NETWORK_ACTIVITY);
1770
1771 /* Set the earliest time we may set the LED */
1772 led_next_time = jiffies + NET_FLASH_PAUSE;
1773 led_active = 0;
1774 }
1775 }
1776
1777 static void
1778 e100_set_network_leds(int active)
1779 {
1780 #if defined(CONFIG_ETRAX_NETWORK_LED_ON_WHEN_LINK)
1781 int light_leds = (active == NO_NETWORK_ACTIVITY);
1782 #elif defined(CONFIG_ETRAX_NETWORK_LED_ON_WHEN_ACTIVITY)
1783 int light_leds = (active == NETWORK_ACTIVITY);
1784 #else
1785 #error "Define either CONFIG_ETRAX_NETWORK_LED_ON_WHEN_LINK or CONFIG_ETRAX_NETWORK_LED_ON_WHEN_ACTIVITY"
1786 #endif
1787
1788 if (!current_speed) {
1789 /* Make LED red, link is down */
1790 #if defined(CONFIG_ETRAX_NETWORK_RED_ON_NO_CONNECTION)
1791 LED_NETWORK_SET(LED_RED);
1792 #else
1793 LED_NETWORK_SET(LED_OFF);
1794 #endif
1795 }
1796 else if (light_leds) {
1797 if (current_speed == 10) {
1798 LED_NETWORK_SET(LED_ORANGE);
1799 } else {
1800 LED_NETWORK_SET(LED_GREEN);
1801 }
1802 }
1803 else {
1804 LED_NETWORK_SET(LED_OFF);
1805 }
1806 }
1807
1808 static int
1809 etrax_init_module(void)
1810 {
1811 return etrax_ethernet_init();
1812 }
1813
1814 static int __init
1815 e100_boot_setup(char* str)
1816 {
1817 struct sockaddr sa = {0};
1818 int i;
1819
1820 /* Parse the colon separated Ethernet station address */
1821 for (i = 0; i < ETH_ALEN; i++) {
1822 unsigned int tmp;
1823 if (sscanf(str + 3*i, "%2x", &tmp) != 1) {
1824 printk(KERN_WARNING "Malformed station address");
1825 return 0;
1826 }
1827 sa.sa_data[i] = (char)tmp;
1828 }
1829
1830 default_mac = sa;
1831 return 1;
1832 }
1833
1834 __setup("etrax100_eth=", e100_boot_setup);
1835
1836 module_init(etrax_init_module);
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