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1 /*
2 * net/dsa/mv88e6xxx.h - Marvell 88e6xxx switch chip support
3 * Copyright (c) 2008 Marvell Semiconductor
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 */
10
11 #ifndef __MV88E6XXX_H
12 #define __MV88E6XXX_H
13
14 #define REG_PORT(p) (0x10 + (p))
15 #define REG_GLOBAL 0x1b
16 #define REG_GLOBAL2 0x1c
17
18 struct mv88e6xxx_priv_state {
19 /* When using multi-chip addressing, this mutex protects
20 * access to the indirect access registers. (In single-chip
21 * mode, this mutex is effectively useless.)
22 */
23 struct mutex smi_mutex;
24
25 #ifdef CONFIG_NET_DSA_MV88E6XXX_NEED_PPU
26 /* Handles automatic disabling and re-enabling of the PHY
27 * polling unit.
28 */
29 struct mutex ppu_mutex;
30 int ppu_disabled;
31 struct work_struct ppu_work;
32 struct timer_list ppu_timer;
33 #endif
34
35 /* This mutex serialises access to the statistics unit.
36 * Hold this mutex over snapshot + dump sequences.
37 */
38 struct mutex stats_mutex;
39
40 /* This mutex serializes phy access for chips with
41 * indirect phy addressing. It is unused for chips
42 * with direct phy access.
43 */
44 struct mutex phy_mutex;
45
46 int id; /* switch product id */
47 };
48
49 struct mv88e6xxx_hw_stat {
50 char string[ETH_GSTRING_LEN];
51 int sizeof_stat;
52 int reg;
53 };
54
55 int __mv88e6xxx_reg_read(struct mii_bus *bus, int sw_addr, int addr, int reg);
56 int mv88e6xxx_reg_read(struct dsa_switch *ds, int addr, int reg);
57 int __mv88e6xxx_reg_write(struct mii_bus *bus, int sw_addr, int addr,
58 int reg, u16 val);
59 int mv88e6xxx_reg_write(struct dsa_switch *ds, int addr, int reg, u16 val);
60 int mv88e6xxx_config_prio(struct dsa_switch *ds);
61 int mv88e6xxx_set_addr_direct(struct dsa_switch *ds, u8 *addr);
62 int mv88e6xxx_set_addr_indirect(struct dsa_switch *ds, u8 *addr);
63 int mv88e6xxx_phy_read(struct dsa_switch *ds, int addr, int regnum);
64 int mv88e6xxx_phy_write(struct dsa_switch *ds, int addr, int regnum, u16 val);
65 void mv88e6xxx_ppu_state_init(struct dsa_switch *ds);
66 int mv88e6xxx_phy_read_ppu(struct dsa_switch *ds, int addr, int regnum);
67 int mv88e6xxx_phy_write_ppu(struct dsa_switch *ds, int addr,
68 int regnum, u16 val);
69 void mv88e6xxx_poll_link(struct dsa_switch *ds);
70 void mv88e6xxx_get_strings(struct dsa_switch *ds,
71 int nr_stats, struct mv88e6xxx_hw_stat *stats,
72 int port, uint8_t *data);
73 void mv88e6xxx_get_ethtool_stats(struct dsa_switch *ds,
74 int nr_stats, struct mv88e6xxx_hw_stat *stats,
75 int port, uint64_t *data);
76
77 extern struct dsa_switch_driver mv88e6131_switch_driver;
78 extern struct dsa_switch_driver mv88e6123_61_65_switch_driver;
79 extern struct dsa_switch_driver mv88e6352_switch_driver;
80 extern struct dsa_switch_driver mv88e6171_switch_driver;
81
82 #define REG_READ(addr, reg) \
83 ({ \
84 int __ret; \
85 \
86 __ret = mv88e6xxx_reg_read(ds, addr, reg); \
87 if (__ret < 0) \
88 return __ret; \
89 __ret; \
90 })
91
92 #define REG_WRITE(addr, reg, val) \
93 ({ \
94 int __ret; \
95 \
96 __ret = mv88e6xxx_reg_write(ds, addr, reg, val); \
97 if (__ret < 0) \
98 return __ret; \
99 })
100
101
102
103 #endif