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1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright 2019 NXP Semiconductors
3 */
4 #include <uapi/linux/if_bridge.h>
5 #include <soc/mscc/ocelot_vcap.h>
6 #include <soc/mscc/ocelot_qsys.h>
7 #include <soc/mscc/ocelot_sys.h>
8 #include <soc/mscc/ocelot_dev.h>
9 #include <soc/mscc/ocelot_ana.h>
10 #include <soc/mscc/ocelot_ptp.h>
11 #include <soc/mscc/ocelot.h>
12 #include <linux/packing.h>
13 #include <linux/module.h>
14 #include <linux/of_net.h>
15 #include <linux/pci.h>
16 #include <linux/of.h>
17 #include <net/pkt_sched.h>
18 #include <net/dsa.h>
19 #include "felix.h"
20
21 static enum dsa_tag_protocol felix_get_tag_protocol(struct dsa_switch *ds,
22 int port,
23 enum dsa_tag_protocol mp)
24 {
25 return DSA_TAG_PROTO_OCELOT;
26 }
27
28 static int felix_set_ageing_time(struct dsa_switch *ds,
29 unsigned int ageing_time)
30 {
31 struct ocelot *ocelot = ds->priv;
32
33 ocelot_set_ageing_time(ocelot, ageing_time);
34
35 return 0;
36 }
37
38 static int felix_fdb_dump(struct dsa_switch *ds, int port,
39 dsa_fdb_dump_cb_t *cb, void *data)
40 {
41 struct ocelot *ocelot = ds->priv;
42
43 return ocelot_fdb_dump(ocelot, port, cb, data);
44 }
45
46 static int felix_fdb_add(struct dsa_switch *ds, int port,
47 const unsigned char *addr, u16 vid)
48 {
49 struct ocelot *ocelot = ds->priv;
50
51 return ocelot_fdb_add(ocelot, port, addr, vid);
52 }
53
54 static int felix_fdb_del(struct dsa_switch *ds, int port,
55 const unsigned char *addr, u16 vid)
56 {
57 struct ocelot *ocelot = ds->priv;
58
59 return ocelot_fdb_del(ocelot, port, addr, vid);
60 }
61
62 static void felix_bridge_stp_state_set(struct dsa_switch *ds, int port,
63 u8 state)
64 {
65 struct ocelot *ocelot = ds->priv;
66
67 return ocelot_bridge_stp_state_set(ocelot, port, state);
68 }
69
70 static int felix_bridge_join(struct dsa_switch *ds, int port,
71 struct net_device *br)
72 {
73 struct ocelot *ocelot = ds->priv;
74
75 return ocelot_port_bridge_join(ocelot, port, br);
76 }
77
78 static void felix_bridge_leave(struct dsa_switch *ds, int port,
79 struct net_device *br)
80 {
81 struct ocelot *ocelot = ds->priv;
82
83 ocelot_port_bridge_leave(ocelot, port, br);
84 }
85
86 /* This callback needs to be present */
87 static int felix_vlan_prepare(struct dsa_switch *ds, int port,
88 const struct switchdev_obj_port_vlan *vlan)
89 {
90 return 0;
91 }
92
93 static int felix_vlan_filtering(struct dsa_switch *ds, int port, bool enabled)
94 {
95 struct ocelot *ocelot = ds->priv;
96
97 ocelot_port_vlan_filtering(ocelot, port, enabled);
98
99 return 0;
100 }
101
102 static void felix_vlan_add(struct dsa_switch *ds, int port,
103 const struct switchdev_obj_port_vlan *vlan)
104 {
105 struct ocelot *ocelot = ds->priv;
106 u16 vid;
107 int err;
108
109 for (vid = vlan->vid_begin; vid <= vlan->vid_end; vid++) {
110 err = ocelot_vlan_add(ocelot, port, vid,
111 vlan->flags & BRIDGE_VLAN_INFO_PVID,
112 vlan->flags & BRIDGE_VLAN_INFO_UNTAGGED);
113 if (err) {
114 dev_err(ds->dev, "Failed to add VLAN %d to port %d: %d\n",
115 vid, port, err);
116 return;
117 }
118 }
119 }
120
121 static int felix_vlan_del(struct dsa_switch *ds, int port,
122 const struct switchdev_obj_port_vlan *vlan)
123 {
124 struct ocelot *ocelot = ds->priv;
125 u16 vid;
126 int err;
127
128 for (vid = vlan->vid_begin; vid <= vlan->vid_end; vid++) {
129 err = ocelot_vlan_del(ocelot, port, vid);
130 if (err) {
131 dev_err(ds->dev, "Failed to remove VLAN %d from port %d: %d\n",
132 vid, port, err);
133 return err;
134 }
135 }
136 return 0;
137 }
138
139 static int felix_port_enable(struct dsa_switch *ds, int port,
140 struct phy_device *phy)
141 {
142 struct ocelot *ocelot = ds->priv;
143
144 ocelot_port_enable(ocelot, port, phy);
145
146 return 0;
147 }
148
149 static void felix_port_disable(struct dsa_switch *ds, int port)
150 {
151 struct ocelot *ocelot = ds->priv;
152
153 return ocelot_port_disable(ocelot, port);
154 }
155
156 static void felix_phylink_validate(struct dsa_switch *ds, int port,
157 unsigned long *supported,
158 struct phylink_link_state *state)
159 {
160 struct ocelot *ocelot = ds->priv;
161 struct ocelot_port *ocelot_port = ocelot->ports[port];
162 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
163
164 if (state->interface != PHY_INTERFACE_MODE_NA &&
165 state->interface != ocelot_port->phy_mode) {
166 bitmap_zero(supported, __ETHTOOL_LINK_MODE_MASK_NBITS);
167 return;
168 }
169
170 /* No half-duplex. */
171 phylink_set_port_modes(mask);
172 phylink_set(mask, Autoneg);
173 phylink_set(mask, Pause);
174 phylink_set(mask, Asym_Pause);
175 phylink_set(mask, 10baseT_Full);
176 phylink_set(mask, 100baseT_Full);
177 phylink_set(mask, 1000baseT_Full);
178
179 if (state->interface == PHY_INTERFACE_MODE_INTERNAL ||
180 state->interface == PHY_INTERFACE_MODE_2500BASEX ||
181 state->interface == PHY_INTERFACE_MODE_USXGMII) {
182 phylink_set(mask, 2500baseT_Full);
183 phylink_set(mask, 2500baseX_Full);
184 }
185
186 bitmap_and(supported, supported, mask,
187 __ETHTOOL_LINK_MODE_MASK_NBITS);
188 bitmap_and(state->advertising, state->advertising, mask,
189 __ETHTOOL_LINK_MODE_MASK_NBITS);
190 }
191
192 static int felix_phylink_mac_pcs_get_state(struct dsa_switch *ds, int port,
193 struct phylink_link_state *state)
194 {
195 struct ocelot *ocelot = ds->priv;
196 struct felix *felix = ocelot_to_felix(ocelot);
197
198 if (felix->info->pcs_link_state)
199 felix->info->pcs_link_state(ocelot, port, state);
200
201 return 0;
202 }
203
204 static void felix_phylink_mac_config(struct dsa_switch *ds, int port,
205 unsigned int link_an_mode,
206 const struct phylink_link_state *state)
207 {
208 struct ocelot *ocelot = ds->priv;
209 struct ocelot_port *ocelot_port = ocelot->ports[port];
210 struct felix *felix = ocelot_to_felix(ocelot);
211 u32 mac_fc_cfg;
212
213 /* Take port out of reset by clearing the MAC_TX_RST, MAC_RX_RST and
214 * PORT_RST bits in CLOCK_CFG
215 */
216 ocelot_port_writel(ocelot_port, DEV_CLOCK_CFG_LINK_SPEED(state->speed),
217 DEV_CLOCK_CFG);
218
219 /* Flow control. Link speed is only used here to evaluate the time
220 * specification in incoming pause frames.
221 */
222 mac_fc_cfg = SYS_MAC_FC_CFG_FC_LINK_SPEED(state->speed);
223
224 /* handle Rx pause in all cases, with 2500base-X this is used for rate
225 * adaptation.
226 */
227 mac_fc_cfg |= SYS_MAC_FC_CFG_RX_FC_ENA;
228
229 if (state->pause & MLO_PAUSE_TX)
230 mac_fc_cfg |= SYS_MAC_FC_CFG_TX_FC_ENA |
231 SYS_MAC_FC_CFG_PAUSE_VAL_CFG(0xffff) |
232 SYS_MAC_FC_CFG_FC_LATENCY_CFG(0x7) |
233 SYS_MAC_FC_CFG_ZERO_PAUSE_ENA;
234 ocelot_write_rix(ocelot, mac_fc_cfg, SYS_MAC_FC_CFG, port);
235
236 ocelot_write_rix(ocelot, 0, ANA_POL_FLOWC, port);
237
238 if (felix->info->pcs_init)
239 felix->info->pcs_init(ocelot, port, link_an_mode, state);
240
241 if (felix->info->port_sched_speed_set)
242 felix->info->port_sched_speed_set(ocelot, port,
243 state->speed);
244 }
245
246 static void felix_phylink_mac_an_restart(struct dsa_switch *ds, int port)
247 {
248 struct ocelot *ocelot = ds->priv;
249 struct felix *felix = ocelot_to_felix(ocelot);
250
251 if (felix->info->pcs_an_restart)
252 felix->info->pcs_an_restart(ocelot, port);
253 }
254
255 static void felix_phylink_mac_link_down(struct dsa_switch *ds, int port,
256 unsigned int link_an_mode,
257 phy_interface_t interface)
258 {
259 struct ocelot *ocelot = ds->priv;
260 struct ocelot_port *ocelot_port = ocelot->ports[port];
261
262 ocelot_port_writel(ocelot_port, 0, DEV_MAC_ENA_CFG);
263 ocelot_rmw_rix(ocelot, 0, QSYS_SWITCH_PORT_MODE_PORT_ENA,
264 QSYS_SWITCH_PORT_MODE, port);
265 }
266
267 static void felix_phylink_mac_link_up(struct dsa_switch *ds, int port,
268 unsigned int link_an_mode,
269 phy_interface_t interface,
270 struct phy_device *phydev,
271 int speed, int duplex,
272 bool tx_pause, bool rx_pause)
273 {
274 struct ocelot *ocelot = ds->priv;
275 struct ocelot_port *ocelot_port = ocelot->ports[port];
276
277 /* Enable MAC module */
278 ocelot_port_writel(ocelot_port, DEV_MAC_ENA_CFG_RX_ENA |
279 DEV_MAC_ENA_CFG_TX_ENA, DEV_MAC_ENA_CFG);
280
281 /* Enable receiving frames on the port, and activate auto-learning of
282 * MAC addresses.
283 */
284 ocelot_write_gix(ocelot, ANA_PORT_PORT_CFG_LEARNAUTO |
285 ANA_PORT_PORT_CFG_RECV_ENA |
286 ANA_PORT_PORT_CFG_PORTID_VAL(port),
287 ANA_PORT_PORT_CFG, port);
288
289 /* Core: Enable port for frame transfer */
290 ocelot_write_rix(ocelot, QSYS_SWITCH_PORT_MODE_INGRESS_DROP_MODE |
291 QSYS_SWITCH_PORT_MODE_SCH_NEXT_CFG(1) |
292 QSYS_SWITCH_PORT_MODE_PORT_ENA,
293 QSYS_SWITCH_PORT_MODE, port);
294 }
295
296 static void felix_port_qos_map_init(struct ocelot *ocelot, int port)
297 {
298 int i;
299
300 ocelot_rmw_gix(ocelot,
301 ANA_PORT_QOS_CFG_QOS_PCP_ENA,
302 ANA_PORT_QOS_CFG_QOS_PCP_ENA,
303 ANA_PORT_QOS_CFG,
304 port);
305
306 for (i = 0; i < FELIX_NUM_TC * 2; i++) {
307 ocelot_rmw_ix(ocelot,
308 (ANA_PORT_PCP_DEI_MAP_DP_PCP_DEI_VAL & i) |
309 ANA_PORT_PCP_DEI_MAP_QOS_PCP_DEI_VAL(i),
310 ANA_PORT_PCP_DEI_MAP_DP_PCP_DEI_VAL |
311 ANA_PORT_PCP_DEI_MAP_QOS_PCP_DEI_VAL_M,
312 ANA_PORT_PCP_DEI_MAP,
313 port, i);
314 }
315 }
316
317 static void felix_get_strings(struct dsa_switch *ds, int port,
318 u32 stringset, u8 *data)
319 {
320 struct ocelot *ocelot = ds->priv;
321
322 return ocelot_get_strings(ocelot, port, stringset, data);
323 }
324
325 static void felix_get_ethtool_stats(struct dsa_switch *ds, int port, u64 *data)
326 {
327 struct ocelot *ocelot = ds->priv;
328
329 ocelot_get_ethtool_stats(ocelot, port, data);
330 }
331
332 static int felix_get_sset_count(struct dsa_switch *ds, int port, int sset)
333 {
334 struct ocelot *ocelot = ds->priv;
335
336 return ocelot_get_sset_count(ocelot, port, sset);
337 }
338
339 static int felix_get_ts_info(struct dsa_switch *ds, int port,
340 struct ethtool_ts_info *info)
341 {
342 struct ocelot *ocelot = ds->priv;
343
344 return ocelot_get_ts_info(ocelot, port, info);
345 }
346
347 static int felix_parse_ports_node(struct felix *felix,
348 struct device_node *ports_node,
349 phy_interface_t *port_phy_modes)
350 {
351 struct ocelot *ocelot = &felix->ocelot;
352 struct device *dev = felix->ocelot.dev;
353 struct device_node *child;
354
355 for_each_available_child_of_node(ports_node, child) {
356 phy_interface_t phy_mode;
357 u32 port;
358 int err;
359
360 /* Get switch port number from DT */
361 if (of_property_read_u32(child, "reg", &port) < 0) {
362 dev_err(dev, "Port number not defined in device tree "
363 "(property \"reg\")\n");
364 of_node_put(child);
365 return -ENODEV;
366 }
367
368 /* Get PHY mode from DT */
369 err = of_get_phy_mode(child, &phy_mode);
370 if (err) {
371 dev_err(dev, "Failed to read phy-mode or "
372 "phy-interface-type property for port %d\n",
373 port);
374 of_node_put(child);
375 return -ENODEV;
376 }
377
378 err = felix->info->prevalidate_phy_mode(ocelot, port, phy_mode);
379 if (err < 0) {
380 dev_err(dev, "Unsupported PHY mode %s on port %d\n",
381 phy_modes(phy_mode), port);
382 return err;
383 }
384
385 port_phy_modes[port] = phy_mode;
386 }
387
388 return 0;
389 }
390
391 static int felix_parse_dt(struct felix *felix, phy_interface_t *port_phy_modes)
392 {
393 struct device *dev = felix->ocelot.dev;
394 struct device_node *switch_node;
395 struct device_node *ports_node;
396 int err;
397
398 switch_node = dev->of_node;
399
400 ports_node = of_get_child_by_name(switch_node, "ports");
401 if (!ports_node) {
402 dev_err(dev, "Incorrect bindings: absent \"ports\" node\n");
403 return -ENODEV;
404 }
405
406 err = felix_parse_ports_node(felix, ports_node, port_phy_modes);
407 of_node_put(ports_node);
408
409 return err;
410 }
411
412 static int felix_init_structs(struct felix *felix, int num_phys_ports)
413 {
414 struct ocelot *ocelot = &felix->ocelot;
415 phy_interface_t *port_phy_modes;
416 resource_size_t switch_base;
417 struct resource res;
418 int port, i, err;
419
420 ocelot->num_phys_ports = num_phys_ports;
421 ocelot->ports = devm_kcalloc(ocelot->dev, num_phys_ports,
422 sizeof(struct ocelot_port *), GFP_KERNEL);
423 if (!ocelot->ports)
424 return -ENOMEM;
425
426 ocelot->map = felix->info->map;
427 ocelot->stats_layout = felix->info->stats_layout;
428 ocelot->num_stats = felix->info->num_stats;
429 ocelot->shared_queue_sz = felix->info->shared_queue_sz;
430 ocelot->num_mact_rows = felix->info->num_mact_rows;
431 ocelot->vcap_is2_keys = felix->info->vcap_is2_keys;
432 ocelot->vcap_is2_actions= felix->info->vcap_is2_actions;
433 ocelot->vcap = felix->info->vcap;
434 ocelot->ops = felix->info->ops;
435
436 port_phy_modes = kcalloc(num_phys_ports, sizeof(phy_interface_t),
437 GFP_KERNEL);
438 if (!port_phy_modes)
439 return -ENOMEM;
440
441 err = felix_parse_dt(felix, port_phy_modes);
442 if (err) {
443 kfree(port_phy_modes);
444 return err;
445 }
446
447 switch_base = pci_resource_start(felix->pdev,
448 felix->info->switch_pci_bar);
449
450 for (i = 0; i < TARGET_MAX; i++) {
451 struct regmap *target;
452
453 if (!felix->info->target_io_res[i].name)
454 continue;
455
456 memcpy(&res, &felix->info->target_io_res[i], sizeof(res));
457 res.flags = IORESOURCE_MEM;
458 res.start += switch_base;
459 res.end += switch_base;
460
461 target = ocelot_regmap_init(ocelot, &res);
462 if (IS_ERR(target)) {
463 dev_err(ocelot->dev,
464 "Failed to map device memory space\n");
465 kfree(port_phy_modes);
466 return PTR_ERR(target);
467 }
468
469 ocelot->targets[i] = target;
470 }
471
472 err = ocelot_regfields_init(ocelot, felix->info->regfields);
473 if (err) {
474 dev_err(ocelot->dev, "failed to init reg fields map\n");
475 kfree(port_phy_modes);
476 return err;
477 }
478
479 for (port = 0; port < num_phys_ports; port++) {
480 struct ocelot_port *ocelot_port;
481 void __iomem *port_regs;
482
483 ocelot_port = devm_kzalloc(ocelot->dev,
484 sizeof(struct ocelot_port),
485 GFP_KERNEL);
486 if (!ocelot_port) {
487 dev_err(ocelot->dev,
488 "failed to allocate port memory\n");
489 kfree(port_phy_modes);
490 return -ENOMEM;
491 }
492
493 memcpy(&res, &felix->info->port_io_res[port], sizeof(res));
494 res.flags = IORESOURCE_MEM;
495 res.start += switch_base;
496 res.end += switch_base;
497
498 port_regs = devm_ioremap_resource(ocelot->dev, &res);
499 if (IS_ERR(port_regs)) {
500 dev_err(ocelot->dev,
501 "failed to map registers for port %d\n", port);
502 kfree(port_phy_modes);
503 return PTR_ERR(port_regs);
504 }
505
506 ocelot_port->phy_mode = port_phy_modes[port];
507 ocelot_port->ocelot = ocelot;
508 ocelot_port->regs = port_regs;
509 ocelot->ports[port] = ocelot_port;
510 }
511
512 kfree(port_phy_modes);
513
514 if (felix->info->mdio_bus_alloc) {
515 err = felix->info->mdio_bus_alloc(ocelot);
516 if (err < 0)
517 return err;
518 }
519
520 return 0;
521 }
522
523 static struct ptp_clock_info ocelot_ptp_clock_info = {
524 .owner = THIS_MODULE,
525 .name = "felix ptp",
526 .max_adj = 0x7fffffff,
527 .n_alarm = 0,
528 .n_ext_ts = 0,
529 .n_per_out = OCELOT_PTP_PINS_NUM,
530 .n_pins = OCELOT_PTP_PINS_NUM,
531 .pps = 0,
532 .gettime64 = ocelot_ptp_gettime64,
533 .settime64 = ocelot_ptp_settime64,
534 .adjtime = ocelot_ptp_adjtime,
535 .adjfine = ocelot_ptp_adjfine,
536 .verify = ocelot_ptp_verify,
537 .enable = ocelot_ptp_enable,
538 };
539
540 /* Hardware initialization done here so that we can allocate structures with
541 * devm without fear of dsa_register_switch returning -EPROBE_DEFER and causing
542 * us to allocate structures twice (leak memory) and map PCI memory twice
543 * (which will not work).
544 */
545 static int felix_setup(struct dsa_switch *ds)
546 {
547 struct ocelot *ocelot = ds->priv;
548 struct felix *felix = ocelot_to_felix(ocelot);
549 int port, err;
550 int tc;
551
552 err = felix_init_structs(felix, ds->num_ports);
553 if (err)
554 return err;
555
556 ocelot_init(ocelot);
557 if (ocelot->ptp) {
558 err = ocelot_init_timestamp(ocelot, &ocelot_ptp_clock_info);
559 if (err) {
560 dev_err(ocelot->dev,
561 "Timestamp initialization failed\n");
562 ocelot->ptp = 0;
563 }
564 }
565
566 for (port = 0; port < ds->num_ports; port++) {
567 ocelot_init_port(ocelot, port);
568
569 /* Bring up the CPU port module and configure the NPI port */
570 if (dsa_is_cpu_port(ds, port))
571 ocelot_configure_cpu(ocelot, port,
572 OCELOT_TAG_PREFIX_NONE,
573 OCELOT_TAG_PREFIX_LONG);
574
575 /* Set the default QoS Classification based on PCP and DEI
576 * bits of vlan tag.
577 */
578 felix_port_qos_map_init(ocelot, port);
579 }
580
581 /* Include the CPU port module in the forwarding mask for unknown
582 * unicast - the hardware default value for ANA_FLOODING_FLD_UNICAST
583 * excludes BIT(ocelot->num_phys_ports), and so does ocelot_init, since
584 * Ocelot relies on whitelisting MAC addresses towards PGID_CPU.
585 */
586 ocelot_write_rix(ocelot,
587 ANA_PGID_PGID_PGID(GENMASK(ocelot->num_phys_ports, 0)),
588 ANA_PGID_PGID, PGID_UC);
589 /* Setup the per-traffic class flooding PGIDs */
590 for (tc = 0; tc < FELIX_NUM_TC; tc++)
591 ocelot_write_rix(ocelot, ANA_FLOODING_FLD_MULTICAST(PGID_MC) |
592 ANA_FLOODING_FLD_BROADCAST(PGID_MC) |
593 ANA_FLOODING_FLD_UNICAST(PGID_UC),
594 ANA_FLOODING, tc);
595
596 ds->mtu_enforcement_ingress = true;
597 /* It looks like the MAC/PCS interrupt register - PM0_IEVENT (0x8040)
598 * isn't instantiated for the Felix PF.
599 * In-band AN may take a few ms to complete, so we need to poll.
600 */
601 ds->pcs_poll = true;
602
603 return 0;
604 }
605
606 static void felix_teardown(struct dsa_switch *ds)
607 {
608 struct ocelot *ocelot = ds->priv;
609 struct felix *felix = ocelot_to_felix(ocelot);
610
611 if (felix->info->mdio_bus_free)
612 felix->info->mdio_bus_free(ocelot);
613
614 ocelot_deinit_timestamp(ocelot);
615 /* stop workqueue thread */
616 ocelot_deinit(ocelot);
617 }
618
619 static int felix_hwtstamp_get(struct dsa_switch *ds, int port,
620 struct ifreq *ifr)
621 {
622 struct ocelot *ocelot = ds->priv;
623
624 return ocelot_hwstamp_get(ocelot, port, ifr);
625 }
626
627 static int felix_hwtstamp_set(struct dsa_switch *ds, int port,
628 struct ifreq *ifr)
629 {
630 struct ocelot *ocelot = ds->priv;
631
632 return ocelot_hwstamp_set(ocelot, port, ifr);
633 }
634
635 static bool felix_rxtstamp(struct dsa_switch *ds, int port,
636 struct sk_buff *skb, unsigned int type)
637 {
638 struct skb_shared_hwtstamps *shhwtstamps;
639 struct ocelot *ocelot = ds->priv;
640 u8 *extraction = skb->data - ETH_HLEN - OCELOT_TAG_LEN;
641 u32 tstamp_lo, tstamp_hi;
642 struct timespec64 ts;
643 u64 tstamp, val;
644
645 ocelot_ptp_gettime64(&ocelot->ptp_info, &ts);
646 tstamp = ktime_set(ts.tv_sec, ts.tv_nsec);
647
648 packing(extraction, &val, 116, 85, OCELOT_TAG_LEN, UNPACK, 0);
649 tstamp_lo = (u32)val;
650
651 tstamp_hi = tstamp >> 32;
652 if ((tstamp & 0xffffffff) < tstamp_lo)
653 tstamp_hi--;
654
655 tstamp = ((u64)tstamp_hi << 32) | tstamp_lo;
656
657 shhwtstamps = skb_hwtstamps(skb);
658 memset(shhwtstamps, 0, sizeof(struct skb_shared_hwtstamps));
659 shhwtstamps->hwtstamp = tstamp;
660 return false;
661 }
662
663 static bool felix_txtstamp(struct dsa_switch *ds, int port,
664 struct sk_buff *clone, unsigned int type)
665 {
666 struct ocelot *ocelot = ds->priv;
667 struct ocelot_port *ocelot_port = ocelot->ports[port];
668
669 if (!ocelot_port_add_txtstamp_skb(ocelot_port, clone))
670 return true;
671
672 return false;
673 }
674
675 static int felix_change_mtu(struct dsa_switch *ds, int port, int new_mtu)
676 {
677 struct ocelot *ocelot = ds->priv;
678
679 ocelot_port_set_maxlen(ocelot, port, new_mtu);
680
681 return 0;
682 }
683
684 static int felix_get_max_mtu(struct dsa_switch *ds, int port)
685 {
686 struct ocelot *ocelot = ds->priv;
687
688 return ocelot_get_max_mtu(ocelot, port);
689 }
690
691 static int felix_cls_flower_add(struct dsa_switch *ds, int port,
692 struct flow_cls_offload *cls, bool ingress)
693 {
694 struct ocelot *ocelot = ds->priv;
695
696 return ocelot_cls_flower_replace(ocelot, port, cls, ingress);
697 }
698
699 static int felix_cls_flower_del(struct dsa_switch *ds, int port,
700 struct flow_cls_offload *cls, bool ingress)
701 {
702 struct ocelot *ocelot = ds->priv;
703
704 return ocelot_cls_flower_destroy(ocelot, port, cls, ingress);
705 }
706
707 static int felix_cls_flower_stats(struct dsa_switch *ds, int port,
708 struct flow_cls_offload *cls, bool ingress)
709 {
710 struct ocelot *ocelot = ds->priv;
711
712 return ocelot_cls_flower_stats(ocelot, port, cls, ingress);
713 }
714
715 static int felix_port_policer_add(struct dsa_switch *ds, int port,
716 struct dsa_mall_policer_tc_entry *policer)
717 {
718 struct ocelot *ocelot = ds->priv;
719 struct ocelot_policer pol = {
720 .rate = div_u64(policer->rate_bytes_per_sec, 1000) * 8,
721 .burst = div_u64(policer->rate_bytes_per_sec *
722 PSCHED_NS2TICKS(policer->burst),
723 PSCHED_TICKS_PER_SEC),
724 };
725
726 return ocelot_port_policer_add(ocelot, port, &pol);
727 }
728
729 static void felix_port_policer_del(struct dsa_switch *ds, int port)
730 {
731 struct ocelot *ocelot = ds->priv;
732
733 ocelot_port_policer_del(ocelot, port);
734 }
735
736 static int felix_port_setup_tc(struct dsa_switch *ds, int port,
737 enum tc_setup_type type,
738 void *type_data)
739 {
740 struct ocelot *ocelot = ds->priv;
741 struct felix *felix = ocelot_to_felix(ocelot);
742
743 if (felix->info->port_setup_tc)
744 return felix->info->port_setup_tc(ds, port, type, type_data);
745 else
746 return -EOPNOTSUPP;
747 }
748
749 static const struct dsa_switch_ops felix_switch_ops = {
750 .get_tag_protocol = felix_get_tag_protocol,
751 .setup = felix_setup,
752 .teardown = felix_teardown,
753 .set_ageing_time = felix_set_ageing_time,
754 .get_strings = felix_get_strings,
755 .get_ethtool_stats = felix_get_ethtool_stats,
756 .get_sset_count = felix_get_sset_count,
757 .get_ts_info = felix_get_ts_info,
758 .phylink_validate = felix_phylink_validate,
759 .phylink_mac_link_state = felix_phylink_mac_pcs_get_state,
760 .phylink_mac_config = felix_phylink_mac_config,
761 .phylink_mac_an_restart = felix_phylink_mac_an_restart,
762 .phylink_mac_link_down = felix_phylink_mac_link_down,
763 .phylink_mac_link_up = felix_phylink_mac_link_up,
764 .port_enable = felix_port_enable,
765 .port_disable = felix_port_disable,
766 .port_fdb_dump = felix_fdb_dump,
767 .port_fdb_add = felix_fdb_add,
768 .port_fdb_del = felix_fdb_del,
769 .port_bridge_join = felix_bridge_join,
770 .port_bridge_leave = felix_bridge_leave,
771 .port_stp_state_set = felix_bridge_stp_state_set,
772 .port_vlan_prepare = felix_vlan_prepare,
773 .port_vlan_filtering = felix_vlan_filtering,
774 .port_vlan_add = felix_vlan_add,
775 .port_vlan_del = felix_vlan_del,
776 .port_hwtstamp_get = felix_hwtstamp_get,
777 .port_hwtstamp_set = felix_hwtstamp_set,
778 .port_rxtstamp = felix_rxtstamp,
779 .port_txtstamp = felix_txtstamp,
780 .port_change_mtu = felix_change_mtu,
781 .port_max_mtu = felix_get_max_mtu,
782 .port_policer_add = felix_port_policer_add,
783 .port_policer_del = felix_port_policer_del,
784 .cls_flower_add = felix_cls_flower_add,
785 .cls_flower_del = felix_cls_flower_del,
786 .cls_flower_stats = felix_cls_flower_stats,
787 .port_setup_tc = felix_port_setup_tc,
788 };
789
790 static struct felix_info *felix_instance_tbl[] = {
791 [FELIX_INSTANCE_VSC9959] = &felix_info_vsc9959,
792 };
793
794 static irqreturn_t felix_irq_handler(int irq, void *data)
795 {
796 struct ocelot *ocelot = (struct ocelot *)data;
797
798 /* The INTB interrupt is used for both PTP TX timestamp interrupt
799 * and preemption status change interrupt on each port.
800 *
801 * - Get txtstamp if have
802 * - TODO: handle preemption. Without handling it, driver may get
803 * interrupt storm.
804 */
805
806 ocelot_get_txtstamp(ocelot);
807
808 return IRQ_HANDLED;
809 }
810
811 static int felix_pci_probe(struct pci_dev *pdev,
812 const struct pci_device_id *id)
813 {
814 enum felix_instance instance = id->driver_data;
815 struct dsa_switch *ds;
816 struct ocelot *ocelot;
817 struct felix *felix;
818 int err;
819
820 if (pdev->dev.of_node && !of_device_is_available(pdev->dev.of_node)) {
821 dev_info(&pdev->dev, "device is disabled, skipping\n");
822 return -ENODEV;
823 }
824
825 err = pci_enable_device(pdev);
826 if (err) {
827 dev_err(&pdev->dev, "device enable failed\n");
828 goto err_pci_enable;
829 }
830
831 /* set up for high or low dma */
832 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
833 if (err) {
834 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
835 if (err) {
836 dev_err(&pdev->dev,
837 "DMA configuration failed: 0x%x\n", err);
838 goto err_dma;
839 }
840 }
841
842 felix = kzalloc(sizeof(struct felix), GFP_KERNEL);
843 if (!felix) {
844 err = -ENOMEM;
845 dev_err(&pdev->dev, "Failed to allocate driver memory\n");
846 goto err_alloc_felix;
847 }
848
849 pci_set_drvdata(pdev, felix);
850 ocelot = &felix->ocelot;
851 ocelot->dev = &pdev->dev;
852 felix->pdev = pdev;
853 felix->info = felix_instance_tbl[instance];
854
855 pci_set_master(pdev);
856
857 err = devm_request_threaded_irq(&pdev->dev, pdev->irq, NULL,
858 &felix_irq_handler, IRQF_ONESHOT,
859 "felix-intb", ocelot);
860 if (err) {
861 dev_err(&pdev->dev, "Failed to request irq\n");
862 goto err_alloc_irq;
863 }
864
865 ocelot->ptp = 1;
866
867 ds = kzalloc(sizeof(struct dsa_switch), GFP_KERNEL);
868 if (!ds) {
869 err = -ENOMEM;
870 dev_err(&pdev->dev, "Failed to allocate DSA switch\n");
871 goto err_alloc_ds;
872 }
873
874 ds->dev = &pdev->dev;
875 ds->num_ports = felix->info->num_ports;
876 ds->num_tx_queues = felix->info->num_tx_queues;
877 ds->ops = &felix_switch_ops;
878 ds->priv = ocelot;
879 felix->ds = ds;
880
881 err = dsa_register_switch(ds);
882 if (err) {
883 dev_err(&pdev->dev, "Failed to register DSA switch: %d\n", err);
884 goto err_register_ds;
885 }
886
887 return 0;
888
889 err_register_ds:
890 kfree(ds);
891 err_alloc_ds:
892 err_alloc_irq:
893 err_alloc_felix:
894 kfree(felix);
895 err_dma:
896 pci_disable_device(pdev);
897 err_pci_enable:
898 return err;
899 }
900
901 static void felix_pci_remove(struct pci_dev *pdev)
902 {
903 struct felix *felix;
904
905 felix = pci_get_drvdata(pdev);
906
907 dsa_unregister_switch(felix->ds);
908
909 kfree(felix->ds);
910 kfree(felix);
911
912 pci_disable_device(pdev);
913 }
914
915 static struct pci_device_id felix_ids[] = {
916 {
917 /* NXP LS1028A */
918 PCI_DEVICE(PCI_VENDOR_ID_FREESCALE, 0xEEF0),
919 .driver_data = FELIX_INSTANCE_VSC9959,
920 },
921 { 0, }
922 };
923 MODULE_DEVICE_TABLE(pci, felix_ids);
924
925 static struct pci_driver felix_pci_driver = {
926 .name = KBUILD_MODNAME,
927 .id_table = felix_ids,
928 .probe = felix_pci_probe,
929 .remove = felix_pci_remove,
930 };
931
932 module_pci_driver(felix_pci_driver);
933
934 MODULE_DESCRIPTION("Felix Switch driver");
935 MODULE_LICENSE("GPL v2");