1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright (c) 2018, Sensor-Technik Wiedemann GmbH
3 * Copyright (c) 2018-2019, Vladimir Oltean <olteanv@gmail.com>
6 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
8 #include <linux/delay.h>
9 #include <linux/module.h>
10 #include <linux/printk.h>
11 #include <linux/spi/spi.h>
12 #include <linux/errno.h>
13 #include <linux/gpio/consumer.h>
14 #include <linux/phylink.h>
16 #include <linux/of_net.h>
17 #include <linux/of_mdio.h>
18 #include <linux/of_device.h>
19 #include <linux/pcs/pcs-xpcs.h>
20 #include <linux/netdev_features.h>
21 #include <linux/netdevice.h>
22 #include <linux/if_bridge.h>
23 #include <linux/if_ether.h>
24 #include <linux/dsa/8021q.h>
26 #include "sja1105_tas.h"
28 #define SJA1105_UNKNOWN_MULTICAST 0x010000000000ull
29 #define SJA1105_DEFAULT_VLAN (VLAN_N_VID - 1)
31 static const struct dsa_switch_ops sja1105_switch_ops
;
33 static void sja1105_hw_reset(struct gpio_desc
*gpio
, unsigned int pulse_len
,
34 unsigned int startup_delay
)
36 gpiod_set_value_cansleep(gpio
, 1);
37 /* Wait for minimum reset pulse length */
39 gpiod_set_value_cansleep(gpio
, 0);
40 /* Wait until chip is ready after reset */
41 msleep(startup_delay
);
45 sja1105_port_allow_traffic(struct sja1105_l2_forwarding_entry
*l2_fwd
,
46 int from
, int to
, bool allow
)
49 l2_fwd
[from
].reach_port
|= BIT(to
);
51 l2_fwd
[from
].reach_port
&= ~BIT(to
);
54 static bool sja1105_can_forward(struct sja1105_l2_forwarding_entry
*l2_fwd
,
57 return !!(l2_fwd
[from
].reach_port
& BIT(to
));
60 static int sja1105_init_mac_settings(struct sja1105_private
*priv
)
62 struct sja1105_mac_config_entry default_mac
= {
63 /* Enable all 8 priority queues on egress.
64 * Every queue i holds top[i] - base[i] frames.
65 * Sum of top[i] - base[i] is 511 (max hardware limit).
67 .top
= {0x3F, 0x7F, 0xBF, 0xFF, 0x13F, 0x17F, 0x1BF, 0x1FF},
68 .base
= {0x0, 0x40, 0x80, 0xC0, 0x100, 0x140, 0x180, 0x1C0},
69 .enabled
= {true, true, true, true, true, true, true, true},
70 /* Keep standard IFG of 12 bytes on egress. */
72 /* Always put the MAC speed in automatic mode, where it can be
73 * adjusted at runtime by PHYLINK.
75 .speed
= priv
->info
->port_speed
[SJA1105_SPEED_AUTO
],
76 /* No static correction for 1-step 1588 events */
79 /* Disable aging for critical TTEthernet traffic */
81 /* Internal VLAN (pvid) to apply to untagged ingress */
86 /* Don't drop traffic with other EtherType than ETH_P_IP */
88 /* Don't drop double-tagged traffic */
90 /* Don't drop untagged traffic */
92 /* Don't retag 802.1p (VID 0) traffic with the pvid */
94 /* Disable learning and I/O on user ports by default -
101 struct sja1105_mac_config_entry
*mac
;
102 struct dsa_switch
*ds
= priv
->ds
;
103 struct sja1105_table
*table
;
106 table
= &priv
->static_config
.tables
[BLK_IDX_MAC_CONFIG
];
108 /* Discard previous MAC Configuration Table */
109 if (table
->entry_count
) {
110 kfree(table
->entries
);
111 table
->entry_count
= 0;
114 table
->entries
= kcalloc(table
->ops
->max_entry_count
,
115 table
->ops
->unpacked_entry_size
, GFP_KERNEL
);
119 table
->entry_count
= table
->ops
->max_entry_count
;
121 mac
= table
->entries
;
123 for (i
= 0; i
< ds
->num_ports
; i
++) {
124 mac
[i
] = default_mac
;
125 if (i
== dsa_upstream_port(priv
->ds
, i
)) {
126 /* STP doesn't get called for CPU port, so we need to
127 * set the I/O parameters statically.
129 mac
[i
].dyn_learn
= true;
130 mac
[i
].ingress
= true;
131 mac
[i
].egress
= true;
138 static int sja1105_init_mii_settings(struct sja1105_private
*priv
)
140 struct device
*dev
= &priv
->spidev
->dev
;
141 struct sja1105_xmii_params_entry
*mii
;
142 struct dsa_switch
*ds
= priv
->ds
;
143 struct sja1105_table
*table
;
146 table
= &priv
->static_config
.tables
[BLK_IDX_XMII_PARAMS
];
148 /* Discard previous xMII Mode Parameters Table */
149 if (table
->entry_count
) {
150 kfree(table
->entries
);
151 table
->entry_count
= 0;
154 table
->entries
= kcalloc(table
->ops
->max_entry_count
,
155 table
->ops
->unpacked_entry_size
, GFP_KERNEL
);
159 /* Override table based on PHYLINK DT bindings */
160 table
->entry_count
= table
->ops
->max_entry_count
;
162 mii
= table
->entries
;
164 for (i
= 0; i
< ds
->num_ports
; i
++) {
165 sja1105_mii_role_t role
= XMII_MAC
;
167 if (dsa_is_unused_port(priv
->ds
, i
))
170 switch (priv
->phy_mode
[i
]) {
171 case PHY_INTERFACE_MODE_INTERNAL
:
172 if (priv
->info
->internal_phy
[i
] == SJA1105_NO_PHY
)
175 mii
->xmii_mode
[i
] = XMII_MODE_MII
;
176 if (priv
->info
->internal_phy
[i
] == SJA1105_PHY_BASE_TX
)
177 mii
->special
[i
] = true;
180 case PHY_INTERFACE_MODE_REVMII
:
183 case PHY_INTERFACE_MODE_MII
:
184 if (!priv
->info
->supports_mii
[i
])
187 mii
->xmii_mode
[i
] = XMII_MODE_MII
;
189 case PHY_INTERFACE_MODE_REVRMII
:
192 case PHY_INTERFACE_MODE_RMII
:
193 if (!priv
->info
->supports_rmii
[i
])
196 mii
->xmii_mode
[i
] = XMII_MODE_RMII
;
198 case PHY_INTERFACE_MODE_RGMII
:
199 case PHY_INTERFACE_MODE_RGMII_ID
:
200 case PHY_INTERFACE_MODE_RGMII_RXID
:
201 case PHY_INTERFACE_MODE_RGMII_TXID
:
202 if (!priv
->info
->supports_rgmii
[i
])
205 mii
->xmii_mode
[i
] = XMII_MODE_RGMII
;
207 case PHY_INTERFACE_MODE_SGMII
:
208 if (!priv
->info
->supports_sgmii
[i
])
211 mii
->xmii_mode
[i
] = XMII_MODE_SGMII
;
212 mii
->special
[i
] = true;
214 case PHY_INTERFACE_MODE_2500BASEX
:
215 if (!priv
->info
->supports_2500basex
[i
])
218 mii
->xmii_mode
[i
] = XMII_MODE_SGMII
;
219 mii
->special
[i
] = true;
223 dev_err(dev
, "Unsupported PHY mode %s on port %d!\n",
224 phy_modes(priv
->phy_mode
[i
]), i
);
228 mii
->phy_mac
[i
] = role
;
233 static int sja1105_init_static_fdb(struct sja1105_private
*priv
)
235 struct sja1105_l2_lookup_entry
*l2_lookup
;
236 struct sja1105_table
*table
;
239 table
= &priv
->static_config
.tables
[BLK_IDX_L2_LOOKUP
];
241 /* We only populate the FDB table through dynamic L2 Address Lookup
242 * entries, except for a special entry at the end which is a catch-all
243 * for unknown multicast and will be used to control flooding domain.
245 if (table
->entry_count
) {
246 kfree(table
->entries
);
247 table
->entry_count
= 0;
250 if (!priv
->info
->can_limit_mcast_flood
)
253 table
->entries
= kcalloc(1, table
->ops
->unpacked_entry_size
,
258 table
->entry_count
= 1;
259 l2_lookup
= table
->entries
;
261 /* All L2 multicast addresses have an odd first octet */
262 l2_lookup
[0].macaddr
= SJA1105_UNKNOWN_MULTICAST
;
263 l2_lookup
[0].mask_macaddr
= SJA1105_UNKNOWN_MULTICAST
;
264 l2_lookup
[0].lockeds
= true;
265 l2_lookup
[0].index
= SJA1105_MAX_L2_LOOKUP_COUNT
- 1;
267 /* Flood multicast to every port by default */
268 for (port
= 0; port
< priv
->ds
->num_ports
; port
++)
269 if (!dsa_is_unused_port(priv
->ds
, port
))
270 l2_lookup
[0].destports
|= BIT(port
);
275 static int sja1105_init_l2_lookup_params(struct sja1105_private
*priv
)
277 struct sja1105_l2_lookup_params_entry default_l2_lookup_params
= {
278 /* Learned FDB entries are forgotten after 300 seconds */
279 .maxage
= SJA1105_AGEING_TIME_MS(300000),
280 /* All entries within a FDB bin are available for learning */
281 .dyn_tbsz
= SJA1105ET_FDB_BIN_SIZE
,
282 /* And the P/Q/R/S equivalent setting: */
284 /* 2^8 + 2^5 + 2^3 + 2^2 + 2^1 + 1 in Koopman notation */
286 /* This selects between Independent VLAN Learning (IVL) and
287 * Shared VLAN Learning (SVL)
289 .shared_learn
= true,
290 /* Don't discard management traffic based on ENFPORT -
291 * we don't perform SMAC port enforcement anyway, so
292 * what we are setting here doesn't matter.
294 .no_enf_hostprt
= false,
295 /* Don't learn SMAC for mac_fltres1 and mac_fltres0.
296 * Maybe correlate with no_linklocal_learn from bridge driver?
298 .no_mgmt_learn
= true,
301 /* Dynamically learned FDB entries can overwrite other (older)
302 * dynamic FDB entries
307 struct dsa_switch
*ds
= priv
->ds
;
308 int port
, num_used_ports
= 0;
309 struct sja1105_table
*table
;
312 for (port
= 0; port
< ds
->num_ports
; port
++)
313 if (!dsa_is_unused_port(ds
, port
))
316 max_fdb_entries
= SJA1105_MAX_L2_LOOKUP_COUNT
/ num_used_ports
;
318 for (port
= 0; port
< ds
->num_ports
; port
++) {
319 if (dsa_is_unused_port(ds
, port
))
322 default_l2_lookup_params
.maxaddrp
[port
] = max_fdb_entries
;
325 table
= &priv
->static_config
.tables
[BLK_IDX_L2_LOOKUP_PARAMS
];
327 if (table
->entry_count
) {
328 kfree(table
->entries
);
329 table
->entry_count
= 0;
332 table
->entries
= kcalloc(table
->ops
->max_entry_count
,
333 table
->ops
->unpacked_entry_size
, GFP_KERNEL
);
337 table
->entry_count
= table
->ops
->max_entry_count
;
339 /* This table only has a single entry */
340 ((struct sja1105_l2_lookup_params_entry
*)table
->entries
)[0] =
341 default_l2_lookup_params
;
346 /* Set up a default VLAN for untagged traffic injected from the CPU
347 * using management routes (e.g. STP, PTP) as opposed to tag_8021q.
348 * All DT-defined ports are members of this VLAN, and there are no
349 * restrictions on forwarding (since the CPU selects the destination).
350 * Frames from this VLAN will always be transmitted as untagged, and
351 * neither the bridge nor the 8021q module cannot create this VLAN ID.
353 static int sja1105_init_static_vlan(struct sja1105_private
*priv
)
355 struct sja1105_table
*table
;
356 struct sja1105_vlan_lookup_entry pvid
= {
357 .type_entry
= SJA1110_VLAN_D_TAG
,
363 .vlanid
= SJA1105_DEFAULT_VLAN
,
365 struct dsa_switch
*ds
= priv
->ds
;
368 table
= &priv
->static_config
.tables
[BLK_IDX_VLAN_LOOKUP
];
370 if (table
->entry_count
) {
371 kfree(table
->entries
);
372 table
->entry_count
= 0;
375 table
->entries
= kzalloc(table
->ops
->unpacked_entry_size
,
380 table
->entry_count
= 1;
382 for (port
= 0; port
< ds
->num_ports
; port
++) {
383 struct sja1105_bridge_vlan
*v
;
385 if (dsa_is_unused_port(ds
, port
))
388 pvid
.vmemb_port
|= BIT(port
);
389 pvid
.vlan_bc
|= BIT(port
);
390 pvid
.tag_port
&= ~BIT(port
);
392 v
= kzalloc(sizeof(*v
), GFP_KERNEL
);
397 v
->vid
= SJA1105_DEFAULT_VLAN
;
399 if (dsa_is_cpu_port(ds
, port
))
401 list_add(&v
->list
, &priv
->dsa_8021q_vlans
);
404 ((struct sja1105_vlan_lookup_entry
*)table
->entries
)[0] = pvid
;
408 static int sja1105_init_l2_forwarding(struct sja1105_private
*priv
)
410 struct sja1105_l2_forwarding_entry
*l2fwd
;
411 struct dsa_switch
*ds
= priv
->ds
;
412 struct sja1105_table
*table
;
415 table
= &priv
->static_config
.tables
[BLK_IDX_L2_FORWARDING
];
417 if (table
->entry_count
) {
418 kfree(table
->entries
);
419 table
->entry_count
= 0;
422 table
->entries
= kcalloc(table
->ops
->max_entry_count
,
423 table
->ops
->unpacked_entry_size
, GFP_KERNEL
);
427 table
->entry_count
= table
->ops
->max_entry_count
;
429 l2fwd
= table
->entries
;
431 /* First 5 entries define the forwarding rules */
432 for (i
= 0; i
< ds
->num_ports
; i
++) {
433 unsigned int upstream
= dsa_upstream_port(priv
->ds
, i
);
435 if (dsa_is_unused_port(ds
, i
))
438 for (j
= 0; j
< SJA1105_NUM_TC
; j
++)
439 l2fwd
[i
].vlan_pmap
[j
] = j
;
441 /* All ports start up with egress flooding enabled,
442 * including the CPU port.
444 priv
->ucast_egress_floods
|= BIT(i
);
445 priv
->bcast_egress_floods
|= BIT(i
);
450 sja1105_port_allow_traffic(l2fwd
, i
, upstream
, true);
451 sja1105_port_allow_traffic(l2fwd
, upstream
, i
, true);
453 l2fwd
[i
].bc_domain
= BIT(upstream
);
454 l2fwd
[i
].fl_domain
= BIT(upstream
);
456 l2fwd
[upstream
].bc_domain
|= BIT(i
);
457 l2fwd
[upstream
].fl_domain
|= BIT(i
);
460 /* Next 8 entries define VLAN PCP mapping from ingress to egress.
461 * Create a one-to-one mapping.
463 for (i
= 0; i
< SJA1105_NUM_TC
; i
++) {
464 for (j
= 0; j
< ds
->num_ports
; j
++) {
465 if (dsa_is_unused_port(ds
, j
))
468 l2fwd
[ds
->num_ports
+ i
].vlan_pmap
[j
] = i
;
471 l2fwd
[ds
->num_ports
+ i
].type_egrpcp2outputq
= true;
477 static int sja1110_init_pcp_remapping(struct sja1105_private
*priv
)
479 struct sja1110_pcp_remapping_entry
*pcp_remap
;
480 struct dsa_switch
*ds
= priv
->ds
;
481 struct sja1105_table
*table
;
484 table
= &priv
->static_config
.tables
[BLK_IDX_PCP_REMAPPING
];
486 /* Nothing to do for SJA1105 */
487 if (!table
->ops
->max_entry_count
)
490 if (table
->entry_count
) {
491 kfree(table
->entries
);
492 table
->entry_count
= 0;
495 table
->entries
= kcalloc(table
->ops
->max_entry_count
,
496 table
->ops
->unpacked_entry_size
, GFP_KERNEL
);
500 table
->entry_count
= table
->ops
->max_entry_count
;
502 pcp_remap
= table
->entries
;
504 /* Repeat the configuration done for vlan_pmap */
505 for (port
= 0; port
< ds
->num_ports
; port
++) {
506 if (dsa_is_unused_port(ds
, port
))
509 for (tc
= 0; tc
< SJA1105_NUM_TC
; tc
++)
510 pcp_remap
[port
].egrpcp
[tc
] = tc
;
516 static int sja1105_init_l2_forwarding_params(struct sja1105_private
*priv
)
518 struct sja1105_l2_forwarding_params_entry
*l2fwd_params
;
519 struct sja1105_table
*table
;
521 table
= &priv
->static_config
.tables
[BLK_IDX_L2_FORWARDING_PARAMS
];
523 if (table
->entry_count
) {
524 kfree(table
->entries
);
525 table
->entry_count
= 0;
528 table
->entries
= kcalloc(table
->ops
->max_entry_count
,
529 table
->ops
->unpacked_entry_size
, GFP_KERNEL
);
533 table
->entry_count
= table
->ops
->max_entry_count
;
535 /* This table only has a single entry */
536 l2fwd_params
= table
->entries
;
538 /* Disallow dynamic reconfiguration of vlan_pmap */
539 l2fwd_params
->max_dynp
= 0;
540 /* Use a single memory partition for all ingress queues */
541 l2fwd_params
->part_spc
[0] = priv
->info
->max_frame_mem
;
546 void sja1105_frame_memory_partitioning(struct sja1105_private
*priv
)
548 struct sja1105_l2_forwarding_params_entry
*l2_fwd_params
;
549 struct sja1105_vl_forwarding_params_entry
*vl_fwd_params
;
550 int max_mem
= priv
->info
->max_frame_mem
;
551 struct sja1105_table
*table
;
553 /* VLAN retagging is implemented using a loopback port that consumes
554 * frame buffers. That leaves less for us.
556 if (priv
->vlan_state
== SJA1105_VLAN_BEST_EFFORT
)
557 max_mem
-= SJA1105_FRAME_MEMORY_RETAGGING_OVERHEAD
;
559 table
= &priv
->static_config
.tables
[BLK_IDX_L2_FORWARDING_PARAMS
];
560 l2_fwd_params
= table
->entries
;
561 l2_fwd_params
->part_spc
[0] = max_mem
;
563 /* If we have any critical-traffic virtual links, we need to reserve
564 * some frame buffer memory for them. At the moment, hardcode the value
565 * at 100 blocks of 128 bytes of memory each. This leaves 829 blocks
566 * remaining for best-effort traffic. TODO: figure out a more flexible
567 * way to perform the frame buffer partitioning.
569 if (!priv
->static_config
.tables
[BLK_IDX_VL_FORWARDING
].entry_count
)
572 table
= &priv
->static_config
.tables
[BLK_IDX_VL_FORWARDING_PARAMS
];
573 vl_fwd_params
= table
->entries
;
575 l2_fwd_params
->part_spc
[0] -= SJA1105_VL_FRAME_MEMORY
;
576 vl_fwd_params
->partspc
[0] = SJA1105_VL_FRAME_MEMORY
;
579 /* SJA1110 TDMACONFIGIDX values:
581 * | 100 Mbps ports | 1Gbps ports | 2.5Gbps ports | Disabled ports
582 * -----+----------------+---------------+---------------+---------------
583 * 0 | 0, [5:10] | [1:2] | [3:4] | retag
584 * 1 |0, [5:10], retag| [1:2] | [3:4] | -
585 * 2 | 0, [5:10] | [1:3], retag | 4 | -
586 * 3 | 0, [5:10] |[1:2], 4, retag| 3 | -
587 * 4 | 0, 2, [5:10] | 1, retag | [3:4] | -
588 * 5 | 0, 1, [5:10] | 2, retag | [3:4] | -
589 * 14 | 0, [5:10] | [1:4], retag | - | -
590 * 15 | [5:10] | [0:4], retag | - | -
592 static void sja1110_select_tdmaconfigidx(struct sja1105_private
*priv
)
594 struct sja1105_general_params_entry
*general_params
;
595 struct sja1105_table
*table
;
596 bool port_1_is_base_tx
;
601 if (priv
->info
->device_id
!= SJA1110_DEVICE_ID
)
604 table
= &priv
->static_config
.tables
[BLK_IDX_GENERAL_PARAMS
];
605 general_params
= table
->entries
;
607 /* All the settings below are "as opposed to SGMII", which is the
608 * other pinmuxing option.
610 port_1_is_base_tx
= priv
->phy_mode
[1] == PHY_INTERFACE_MODE_INTERNAL
;
611 port_3_is_2500
= priv
->phy_mode
[3] == PHY_INTERFACE_MODE_2500BASEX
;
612 port_4_is_2500
= priv
->phy_mode
[4] == PHY_INTERFACE_MODE_2500BASEX
;
614 if (port_1_is_base_tx
)
615 /* Retagging port will operate at 1 Gbps */
617 else if (port_3_is_2500
&& port_4_is_2500
)
618 /* Retagging port will operate at 100 Mbps */
620 else if (port_3_is_2500
)
621 /* Retagging port will operate at 1 Gbps */
623 else if (port_4_is_2500
)
624 /* Retagging port will operate at 1 Gbps */
627 /* Retagging port will operate at 1 Gbps */
630 general_params
->tdmaconfigidx
= tdmaconfigidx
;
633 static int sja1105_init_general_params(struct sja1105_private
*priv
)
635 struct sja1105_general_params_entry default_general_params
= {
636 /* Allow dynamic changing of the mirror port */
638 .switchid
= priv
->ds
->index
,
639 /* Priority queue for link-local management frames
640 * (both ingress to and egress from CPU - PTP, STP etc)
643 .mac_fltres1
= SJA1105_LINKLOCAL_FILTER_A
,
644 .mac_flt1
= SJA1105_LINKLOCAL_FILTER_A_MASK
,
645 .incl_srcpt1
= false,
647 .mac_fltres0
= SJA1105_LINKLOCAL_FILTER_B
,
648 .mac_flt0
= SJA1105_LINKLOCAL_FILTER_B_MASK
,
649 .incl_srcpt0
= false,
651 /* The destination for traffic matching mac_fltres1 and
652 * mac_fltres0 on all ports except host_port. Such traffic
653 * receieved on host_port itself would be dropped, except
654 * by installing a temporary 'management route'
656 .host_port
= priv
->ds
->num_ports
,
657 /* Default to an invalid value */
658 .mirr_port
= priv
->ds
->num_ports
,
660 .vllupformat
= SJA1105_VL_FORMAT_PSFP
,
663 /* Only update correctionField for 1-step PTP (L2 transport) */
665 /* Forcefully disable VLAN filtering by telling
666 * the switch that VLAN has a different EtherType.
668 .tpid
= ETH_P_SJA1105
,
669 .tpid2
= ETH_P_SJA1105
,
670 /* Enable the TTEthernet engine on SJA1110 */
672 /* Set up the EtherType for control packets on SJA1110 */
673 .header_type
= ETH_P_SJA1110
,
675 struct sja1105_general_params_entry
*general_params
;
676 struct dsa_switch
*ds
= priv
->ds
;
677 struct sja1105_table
*table
;
680 for (port
= 0; port
< ds
->num_ports
; port
++) {
681 if (dsa_is_cpu_port(ds
, port
)) {
682 default_general_params
.host_port
= port
;
687 table
= &priv
->static_config
.tables
[BLK_IDX_GENERAL_PARAMS
];
689 if (table
->entry_count
) {
690 kfree(table
->entries
);
691 table
->entry_count
= 0;
694 table
->entries
= kcalloc(table
->ops
->max_entry_count
,
695 table
->ops
->unpacked_entry_size
, GFP_KERNEL
);
699 table
->entry_count
= table
->ops
->max_entry_count
;
701 general_params
= table
->entries
;
703 /* This table only has a single entry */
704 general_params
[0] = default_general_params
;
706 sja1110_select_tdmaconfigidx(priv
);
708 /* Link-local traffic received on casc_port will be forwarded
709 * to host_port without embedding the source port and device ID
710 * info in the destination MAC address, and no RX timestamps will be
711 * taken either (presumably because it is a cascaded port and a
712 * downstream SJA switch already did that).
713 * To disable the feature, we need to do different things depending on
714 * switch generation. On SJA1105 we need to set an invalid port, while
715 * on SJA1110 which support multiple cascaded ports, this field is a
716 * bitmask so it must be left zero.
718 if (!priv
->info
->multiple_cascade_ports
)
719 general_params
->casc_port
= ds
->num_ports
;
724 static int sja1105_init_avb_params(struct sja1105_private
*priv
)
726 struct sja1105_avb_params_entry
*avb
;
727 struct sja1105_table
*table
;
729 table
= &priv
->static_config
.tables
[BLK_IDX_AVB_PARAMS
];
731 /* Discard previous AVB Parameters Table */
732 if (table
->entry_count
) {
733 kfree(table
->entries
);
734 table
->entry_count
= 0;
737 table
->entries
= kcalloc(table
->ops
->max_entry_count
,
738 table
->ops
->unpacked_entry_size
, GFP_KERNEL
);
742 table
->entry_count
= table
->ops
->max_entry_count
;
744 avb
= table
->entries
;
746 /* Configure the MAC addresses for meta frames */
747 avb
->destmeta
= SJA1105_META_DMAC
;
748 avb
->srcmeta
= SJA1105_META_SMAC
;
749 /* On P/Q/R/S, configure the direction of the PTP_CLK pin as input by
750 * default. This is because there might be boards with a hardware
751 * layout where enabling the pin as output might cause an electrical
752 * clash. On E/T the pin is always an output, which the board designers
753 * probably already knew, so even if there are going to be electrical
754 * issues, there's nothing we can do.
756 avb
->cas_master
= false;
761 /* The L2 policing table is 2-stage. The table is looked up for each frame
762 * according to the ingress port, whether it was broadcast or not, and the
763 * classified traffic class (given by VLAN PCP). This portion of the lookup is
764 * fixed, and gives access to the SHARINDX, an indirection register pointing
765 * within the policing table itself, which is used to resolve the policer that
766 * will be used for this frame.
769 * +------------+--------+ +---------------------------------+
770 * |Port 0 TC 0 |SHARINDX| | Policer 0: Rate, Burst, MTU |
771 * +------------+--------+ +---------------------------------+
772 * |Port 0 TC 1 |SHARINDX| | Policer 1: Rate, Burst, MTU |
773 * +------------+--------+ +---------------------------------+
774 * ... | Policer 2: Rate, Burst, MTU |
775 * +------------+--------+ +---------------------------------+
776 * |Port 0 TC 7 |SHARINDX| | Policer 3: Rate, Burst, MTU |
777 * +------------+--------+ +---------------------------------+
778 * |Port 1 TC 0 |SHARINDX| | Policer 4: Rate, Burst, MTU |
779 * +------------+--------+ +---------------------------------+
780 * ... | Policer 5: Rate, Burst, MTU |
781 * +------------+--------+ +---------------------------------+
782 * |Port 1 TC 7 |SHARINDX| | Policer 6: Rate, Burst, MTU |
783 * +------------+--------+ +---------------------------------+
784 * ... | Policer 7: Rate, Burst, MTU |
785 * +------------+--------+ +---------------------------------+
786 * |Port 4 TC 7 |SHARINDX| ...
787 * +------------+--------+
788 * |Port 0 BCAST|SHARINDX| ...
789 * +------------+--------+
790 * |Port 1 BCAST|SHARINDX| ...
791 * +------------+--------+
793 * +------------+--------+ +---------------------------------+
794 * |Port 4 BCAST|SHARINDX| | Policer 44: Rate, Burst, MTU |
795 * +------------+--------+ +---------------------------------+
797 * In this driver, we shall use policers 0-4 as statically alocated port
798 * (matchall) policers. So we need to make the SHARINDX for all lookups
799 * corresponding to this ingress port (8 VLAN PCP lookups and 1 broadcast
801 * The remaining policers (40) shall be dynamically allocated for flower
802 * policers, where the key is either vlan_prio or dst_mac ff:ff:ff:ff:ff:ff.
804 #define SJA1105_RATE_MBPS(speed) (((speed) * 64000) / 1000)
806 static int sja1105_init_l2_policing(struct sja1105_private
*priv
)
808 struct sja1105_l2_policing_entry
*policing
;
809 struct dsa_switch
*ds
= priv
->ds
;
810 struct sja1105_table
*table
;
813 table
= &priv
->static_config
.tables
[BLK_IDX_L2_POLICING
];
815 /* Discard previous L2 Policing Table */
816 if (table
->entry_count
) {
817 kfree(table
->entries
);
818 table
->entry_count
= 0;
821 table
->entries
= kcalloc(table
->ops
->max_entry_count
,
822 table
->ops
->unpacked_entry_size
, GFP_KERNEL
);
826 table
->entry_count
= table
->ops
->max_entry_count
;
828 policing
= table
->entries
;
830 /* Setup shared indices for the matchall policers */
831 for (port
= 0; port
< ds
->num_ports
; port
++) {
832 int mcast
= (ds
->num_ports
* (SJA1105_NUM_TC
+ 1)) + port
;
833 int bcast
= (ds
->num_ports
* SJA1105_NUM_TC
) + port
;
835 for (tc
= 0; tc
< SJA1105_NUM_TC
; tc
++)
836 policing
[port
* SJA1105_NUM_TC
+ tc
].sharindx
= port
;
838 policing
[bcast
].sharindx
= port
;
839 /* Only SJA1110 has multicast policers */
840 if (mcast
<= table
->ops
->max_entry_count
)
841 policing
[mcast
].sharindx
= port
;
844 /* Setup the matchall policer parameters */
845 for (port
= 0; port
< ds
->num_ports
; port
++) {
846 int mtu
= VLAN_ETH_FRAME_LEN
+ ETH_FCS_LEN
;
848 if (dsa_is_cpu_port(priv
->ds
, port
))
851 policing
[port
].smax
= 65535; /* Burst size in bytes */
852 policing
[port
].rate
= SJA1105_RATE_MBPS(1000);
853 policing
[port
].maxlen
= mtu
;
854 policing
[port
].partition
= 0;
860 static int sja1105_static_config_load(struct sja1105_private
*priv
)
864 sja1105_static_config_free(&priv
->static_config
);
865 rc
= sja1105_static_config_init(&priv
->static_config
,
866 priv
->info
->static_ops
,
867 priv
->info
->device_id
);
871 /* Build static configuration */
872 rc
= sja1105_init_mac_settings(priv
);
875 rc
= sja1105_init_mii_settings(priv
);
878 rc
= sja1105_init_static_fdb(priv
);
881 rc
= sja1105_init_static_vlan(priv
);
884 rc
= sja1105_init_l2_lookup_params(priv
);
887 rc
= sja1105_init_l2_forwarding(priv
);
890 rc
= sja1105_init_l2_forwarding_params(priv
);
893 rc
= sja1105_init_l2_policing(priv
);
896 rc
= sja1105_init_general_params(priv
);
899 rc
= sja1105_init_avb_params(priv
);
902 rc
= sja1110_init_pcp_remapping(priv
);
906 /* Send initial configuration to hardware via SPI */
907 return sja1105_static_config_upload(priv
);
910 static int sja1105_parse_rgmii_delays(struct sja1105_private
*priv
)
912 struct dsa_switch
*ds
= priv
->ds
;
915 for (port
= 0; port
< ds
->num_ports
; port
++) {
916 if (!priv
->fixed_link
[port
])
919 if (priv
->phy_mode
[port
] == PHY_INTERFACE_MODE_RGMII_RXID
||
920 priv
->phy_mode
[port
] == PHY_INTERFACE_MODE_RGMII_ID
)
921 priv
->rgmii_rx_delay
[port
] = true;
923 if (priv
->phy_mode
[port
] == PHY_INTERFACE_MODE_RGMII_TXID
||
924 priv
->phy_mode
[port
] == PHY_INTERFACE_MODE_RGMII_ID
)
925 priv
->rgmii_tx_delay
[port
] = true;
927 if ((priv
->rgmii_rx_delay
[port
] || priv
->rgmii_tx_delay
[port
]) &&
928 !priv
->info
->setup_rgmii_delay
)
934 static int sja1105_parse_ports_node(struct sja1105_private
*priv
,
935 struct device_node
*ports_node
)
937 struct device
*dev
= &priv
->spidev
->dev
;
938 struct device_node
*child
;
940 for_each_available_child_of_node(ports_node
, child
) {
941 struct device_node
*phy_node
;
942 phy_interface_t phy_mode
;
946 /* Get switch port number from DT */
947 if (of_property_read_u32(child
, "reg", &index
) < 0) {
948 dev_err(dev
, "Port number not defined in device tree "
949 "(property \"reg\")\n");
954 /* Get PHY mode from DT */
955 err
= of_get_phy_mode(child
, &phy_mode
);
957 dev_err(dev
, "Failed to read phy-mode or "
958 "phy-interface-type property for port %d\n",
964 phy_node
= of_parse_phandle(child
, "phy-handle", 0);
966 if (!of_phy_is_fixed_link(child
)) {
967 dev_err(dev
, "phy-handle or fixed-link "
968 "properties missing!\n");
972 /* phy-handle is missing, but fixed-link isn't.
973 * So it's a fixed link. Default to PHY role.
975 priv
->fixed_link
[index
] = true;
977 of_node_put(phy_node
);
980 priv
->phy_mode
[index
] = phy_mode
;
986 static int sja1105_parse_dt(struct sja1105_private
*priv
)
988 struct device
*dev
= &priv
->spidev
->dev
;
989 struct device_node
*switch_node
= dev
->of_node
;
990 struct device_node
*ports_node
;
993 ports_node
= of_get_child_by_name(switch_node
, "ports");
995 ports_node
= of_get_child_by_name(switch_node
, "ethernet-ports");
997 dev_err(dev
, "Incorrect bindings: absent \"ports\" node\n");
1001 rc
= sja1105_parse_ports_node(priv
, ports_node
);
1002 of_node_put(ports_node
);
1007 /* Convert link speed from SJA1105 to ethtool encoding */
1008 static int sja1105_port_speed_to_ethtool(struct sja1105_private
*priv
,
1011 if (speed
== priv
->info
->port_speed
[SJA1105_SPEED_10MBPS
])
1013 if (speed
== priv
->info
->port_speed
[SJA1105_SPEED_100MBPS
])
1015 if (speed
== priv
->info
->port_speed
[SJA1105_SPEED_1000MBPS
])
1017 if (speed
== priv
->info
->port_speed
[SJA1105_SPEED_2500MBPS
])
1019 return SPEED_UNKNOWN
;
1022 /* Set link speed in the MAC configuration for a specific port. */
1023 static int sja1105_adjust_port_config(struct sja1105_private
*priv
, int port
,
1026 struct sja1105_mac_config_entry
*mac
;
1027 struct device
*dev
= priv
->ds
->dev
;
1031 /* On P/Q/R/S, one can read from the device via the MAC reconfiguration
1032 * tables. On E/T, MAC reconfig tables are not readable, only writable.
1033 * We have to *know* what the MAC looks like. For the sake of keeping
1034 * the code common, we'll use the static configuration tables as a
1035 * reasonable approximation for both E/T and P/Q/R/S.
1037 mac
= priv
->static_config
.tables
[BLK_IDX_MAC_CONFIG
].entries
;
1039 switch (speed_mbps
) {
1041 /* PHYLINK called sja1105_mac_config() to inform us about
1042 * the state->interface, but AN has not completed and the
1043 * speed is not yet valid. UM10944.pdf says that setting
1044 * SJA1105_SPEED_AUTO at runtime disables the port, so that is
1045 * ok for power consumption in case AN will never complete -
1046 * otherwise PHYLINK should come back with a new update.
1048 speed
= priv
->info
->port_speed
[SJA1105_SPEED_AUTO
];
1051 speed
= priv
->info
->port_speed
[SJA1105_SPEED_10MBPS
];
1054 speed
= priv
->info
->port_speed
[SJA1105_SPEED_100MBPS
];
1057 speed
= priv
->info
->port_speed
[SJA1105_SPEED_1000MBPS
];
1060 speed
= priv
->info
->port_speed
[SJA1105_SPEED_2500MBPS
];
1063 dev_err(dev
, "Invalid speed %iMbps\n", speed_mbps
);
1067 /* Overwrite SJA1105_SPEED_AUTO from the static MAC configuration
1068 * table, since this will be used for the clocking setup, and we no
1069 * longer need to store it in the static config (already told hardware
1070 * we want auto during upload phase).
1071 * Actually for the SGMII port, the MAC is fixed at 1 Gbps and
1072 * we need to configure the PCS only (if even that).
1074 if (priv
->phy_mode
[port
] == PHY_INTERFACE_MODE_SGMII
)
1075 mac
[port
].speed
= priv
->info
->port_speed
[SJA1105_SPEED_1000MBPS
];
1076 else if (priv
->phy_mode
[port
] == PHY_INTERFACE_MODE_2500BASEX
)
1077 mac
[port
].speed
= priv
->info
->port_speed
[SJA1105_SPEED_2500MBPS
];
1079 mac
[port
].speed
= speed
;
1081 /* Write to the dynamic reconfiguration tables */
1082 rc
= sja1105_dynamic_config_write(priv
, BLK_IDX_MAC_CONFIG
, port
,
1085 dev_err(dev
, "Failed to write MAC config: %d\n", rc
);
1089 /* Reconfigure the PLLs for the RGMII interfaces (required 125 MHz at
1090 * gigabit, 25 MHz at 100 Mbps and 2.5 MHz at 10 Mbps). For MII and
1091 * RMII no change of the clock setup is required. Actually, changing
1092 * the clock setup does interrupt the clock signal for a certain time
1093 * which causes trouble for all PHYs relying on this signal.
1095 if (!phy_interface_mode_is_rgmii(priv
->phy_mode
[port
]))
1098 return sja1105_clocking_setup_port(priv
, port
);
1101 /* The SJA1105 MAC programming model is through the static config (the xMII
1102 * Mode table cannot be dynamically reconfigured), and we have to program
1103 * that early (earlier than PHYLINK calls us, anyway).
1104 * So just error out in case the connected PHY attempts to change the initial
1105 * system interface MII protocol from what is defined in the DT, at least for
1108 static bool sja1105_phy_mode_mismatch(struct sja1105_private
*priv
, int port
,
1109 phy_interface_t interface
)
1111 return priv
->phy_mode
[port
] != interface
;
1114 static void sja1105_mac_config(struct dsa_switch
*ds
, int port
,
1116 const struct phylink_link_state
*state
)
1118 struct dsa_port
*dp
= dsa_to_port(ds
, port
);
1119 struct sja1105_private
*priv
= ds
->priv
;
1120 struct dw_xpcs
*xpcs
;
1122 if (sja1105_phy_mode_mismatch(priv
, port
, state
->interface
)) {
1123 dev_err(ds
->dev
, "Changing PHY mode to %s not supported!\n",
1124 phy_modes(state
->interface
));
1128 xpcs
= priv
->xpcs
[port
];
1131 phylink_set_pcs(dp
->pl
, &xpcs
->pcs
);
1134 static void sja1105_mac_link_down(struct dsa_switch
*ds
, int port
,
1136 phy_interface_t interface
)
1138 sja1105_inhibit_tx(ds
->priv
, BIT(port
), true);
1141 static void sja1105_mac_link_up(struct dsa_switch
*ds
, int port
,
1143 phy_interface_t interface
,
1144 struct phy_device
*phydev
,
1145 int speed
, int duplex
,
1146 bool tx_pause
, bool rx_pause
)
1148 struct sja1105_private
*priv
= ds
->priv
;
1150 sja1105_adjust_port_config(priv
, port
, speed
);
1152 sja1105_inhibit_tx(priv
, BIT(port
), false);
1155 static void sja1105_phylink_validate(struct dsa_switch
*ds
, int port
,
1156 unsigned long *supported
,
1157 struct phylink_link_state
*state
)
1159 /* Construct a new mask which exhaustively contains all link features
1160 * supported by the MAC, and then apply that (logical AND) to what will
1161 * be sent to the PHY for "marketing".
1163 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask
) = { 0, };
1164 struct sja1105_private
*priv
= ds
->priv
;
1165 struct sja1105_xmii_params_entry
*mii
;
1167 mii
= priv
->static_config
.tables
[BLK_IDX_XMII_PARAMS
].entries
;
1169 /* include/linux/phylink.h says:
1170 * When @state->interface is %PHY_INTERFACE_MODE_NA, phylink
1171 * expects the MAC driver to return all supported link modes.
1173 if (state
->interface
!= PHY_INTERFACE_MODE_NA
&&
1174 sja1105_phy_mode_mismatch(priv
, port
, state
->interface
)) {
1175 bitmap_zero(supported
, __ETHTOOL_LINK_MODE_MASK_NBITS
);
1179 /* The MAC does not support pause frames, and also doesn't
1180 * support half-duplex traffic modes.
1182 phylink_set(mask
, Autoneg
);
1183 phylink_set(mask
, MII
);
1184 phylink_set(mask
, 10baseT_Full
);
1185 phylink_set(mask
, 100baseT_Full
);
1186 phylink_set(mask
, 100baseT1_Full
);
1187 if (mii
->xmii_mode
[port
] == XMII_MODE_RGMII
||
1188 mii
->xmii_mode
[port
] == XMII_MODE_SGMII
)
1189 phylink_set(mask
, 1000baseT_Full
);
1190 if (priv
->info
->supports_2500basex
[port
]) {
1191 phylink_set(mask
, 2500baseT_Full
);
1192 phylink_set(mask
, 2500baseX_Full
);
1195 bitmap_and(supported
, supported
, mask
, __ETHTOOL_LINK_MODE_MASK_NBITS
);
1196 bitmap_and(state
->advertising
, state
->advertising
, mask
,
1197 __ETHTOOL_LINK_MODE_MASK_NBITS
);
1201 sja1105_find_static_fdb_entry(struct sja1105_private
*priv
, int port
,
1202 const struct sja1105_l2_lookup_entry
*requested
)
1204 struct sja1105_l2_lookup_entry
*l2_lookup
;
1205 struct sja1105_table
*table
;
1208 table
= &priv
->static_config
.tables
[BLK_IDX_L2_LOOKUP
];
1209 l2_lookup
= table
->entries
;
1211 for (i
= 0; i
< table
->entry_count
; i
++)
1212 if (l2_lookup
[i
].macaddr
== requested
->macaddr
&&
1213 l2_lookup
[i
].vlanid
== requested
->vlanid
&&
1214 l2_lookup
[i
].destports
& BIT(port
))
1220 /* We want FDB entries added statically through the bridge command to persist
1221 * across switch resets, which are a common thing during normal SJA1105
1222 * operation. So we have to back them up in the static configuration tables
1223 * and hence apply them on next static config upload... yay!
1226 sja1105_static_fdb_change(struct sja1105_private
*priv
, int port
,
1227 const struct sja1105_l2_lookup_entry
*requested
,
1230 struct sja1105_l2_lookup_entry
*l2_lookup
;
1231 struct sja1105_table
*table
;
1234 table
= &priv
->static_config
.tables
[BLK_IDX_L2_LOOKUP
];
1236 match
= sja1105_find_static_fdb_entry(priv
, port
, requested
);
1238 /* Can't delete a missing entry. */
1242 /* No match => new entry */
1243 rc
= sja1105_table_resize(table
, table
->entry_count
+ 1);
1247 match
= table
->entry_count
- 1;
1250 /* Assign pointer after the resize (it may be new memory) */
1251 l2_lookup
= table
->entries
;
1254 * If the job was to add this FDB entry, it's already done (mostly
1255 * anyway, since the port forwarding mask may have changed, case in
1256 * which we update it).
1257 * Otherwise we have to delete it.
1260 l2_lookup
[match
] = *requested
;
1264 /* To remove, the strategy is to overwrite the element with
1265 * the last one, and then reduce the array size by 1
1267 l2_lookup
[match
] = l2_lookup
[table
->entry_count
- 1];
1268 return sja1105_table_resize(table
, table
->entry_count
- 1);
1271 /* First-generation switches have a 4-way set associative TCAM that
1272 * holds the FDB entries. An FDB index spans from 0 to 1023 and is comprised of
1273 * a "bin" (grouping of 4 entries) and a "way" (an entry within a bin).
1274 * For the placement of a newly learnt FDB entry, the switch selects the bin
1275 * based on a hash function, and the way within that bin incrementally.
1277 static int sja1105et_fdb_index(int bin
, int way
)
1279 return bin
* SJA1105ET_FDB_BIN_SIZE
+ way
;
1282 static int sja1105et_is_fdb_entry_in_bin(struct sja1105_private
*priv
, int bin
,
1283 const u8
*addr
, u16 vid
,
1284 struct sja1105_l2_lookup_entry
*match
,
1289 for (way
= 0; way
< SJA1105ET_FDB_BIN_SIZE
; way
++) {
1290 struct sja1105_l2_lookup_entry l2_lookup
= {0};
1291 int index
= sja1105et_fdb_index(bin
, way
);
1293 /* Skip unused entries, optionally marking them
1294 * into the return value
1296 if (sja1105_dynamic_config_read(priv
, BLK_IDX_L2_LOOKUP
,
1297 index
, &l2_lookup
)) {
1303 if (l2_lookup
.macaddr
== ether_addr_to_u64(addr
) &&
1304 l2_lookup
.vlanid
== vid
) {
1310 /* Return an invalid entry index if not found */
1314 int sja1105et_fdb_add(struct dsa_switch
*ds
, int port
,
1315 const unsigned char *addr
, u16 vid
)
1317 struct sja1105_l2_lookup_entry l2_lookup
= {0};
1318 struct sja1105_private
*priv
= ds
->priv
;
1319 struct device
*dev
= ds
->dev
;
1320 int last_unused
= -1;
1323 bin
= sja1105et_fdb_hash(priv
, addr
, vid
);
1325 way
= sja1105et_is_fdb_entry_in_bin(priv
, bin
, addr
, vid
,
1326 &l2_lookup
, &last_unused
);
1328 /* We have an FDB entry. Is our port in the destination
1329 * mask? If yes, we need to do nothing. If not, we need
1330 * to rewrite the entry by adding this port to it.
1332 if (l2_lookup
.destports
& BIT(port
))
1334 l2_lookup
.destports
|= BIT(port
);
1336 int index
= sja1105et_fdb_index(bin
, way
);
1338 /* We don't have an FDB entry. We construct a new one and
1339 * try to find a place for it within the FDB table.
1341 l2_lookup
.macaddr
= ether_addr_to_u64(addr
);
1342 l2_lookup
.destports
= BIT(port
);
1343 l2_lookup
.vlanid
= vid
;
1345 if (last_unused
>= 0) {
1348 /* Bin is full, need to evict somebody.
1349 * Choose victim at random. If you get these messages
1350 * often, you may need to consider changing the
1351 * distribution function:
1352 * static_config[BLK_IDX_L2_LOOKUP_PARAMS].entries->poly
1354 get_random_bytes(&way
, sizeof(u8
));
1355 way
%= SJA1105ET_FDB_BIN_SIZE
;
1356 dev_warn(dev
, "Warning, FDB bin %d full while adding entry for %pM. Evicting entry %u.\n",
1359 sja1105_dynamic_config_write(priv
, BLK_IDX_L2_LOOKUP
,
1360 index
, NULL
, false);
1363 l2_lookup
.index
= sja1105et_fdb_index(bin
, way
);
1365 rc
= sja1105_dynamic_config_write(priv
, BLK_IDX_L2_LOOKUP
,
1366 l2_lookup
.index
, &l2_lookup
,
1371 return sja1105_static_fdb_change(priv
, port
, &l2_lookup
, true);
1374 int sja1105et_fdb_del(struct dsa_switch
*ds
, int port
,
1375 const unsigned char *addr
, u16 vid
)
1377 struct sja1105_l2_lookup_entry l2_lookup
= {0};
1378 struct sja1105_private
*priv
= ds
->priv
;
1379 int index
, bin
, way
, rc
;
1382 bin
= sja1105et_fdb_hash(priv
, addr
, vid
);
1383 way
= sja1105et_is_fdb_entry_in_bin(priv
, bin
, addr
, vid
,
1387 index
= sja1105et_fdb_index(bin
, way
);
1389 /* We have an FDB entry. Is our port in the destination mask? If yes,
1390 * we need to remove it. If the resulting port mask becomes empty, we
1391 * need to completely evict the FDB entry.
1392 * Otherwise we just write it back.
1394 l2_lookup
.destports
&= ~BIT(port
);
1396 if (l2_lookup
.destports
)
1401 rc
= sja1105_dynamic_config_write(priv
, BLK_IDX_L2_LOOKUP
,
1402 index
, &l2_lookup
, keep
);
1406 return sja1105_static_fdb_change(priv
, port
, &l2_lookup
, keep
);
1409 int sja1105pqrs_fdb_add(struct dsa_switch
*ds
, int port
,
1410 const unsigned char *addr
, u16 vid
)
1412 struct sja1105_l2_lookup_entry l2_lookup
= {0};
1413 struct sja1105_private
*priv
= ds
->priv
;
1416 /* Search for an existing entry in the FDB table */
1417 l2_lookup
.macaddr
= ether_addr_to_u64(addr
);
1418 l2_lookup
.vlanid
= vid
;
1419 l2_lookup
.iotag
= SJA1105_S_TAG
;
1420 l2_lookup
.mask_macaddr
= GENMASK_ULL(ETH_ALEN
* 8 - 1, 0);
1421 if (priv
->vlan_state
!= SJA1105_VLAN_UNAWARE
) {
1422 l2_lookup
.mask_vlanid
= VLAN_VID_MASK
;
1423 l2_lookup
.mask_iotag
= BIT(0);
1425 l2_lookup
.mask_vlanid
= 0;
1426 l2_lookup
.mask_iotag
= 0;
1428 l2_lookup
.destports
= BIT(port
);
1430 rc
= sja1105_dynamic_config_read(priv
, BLK_IDX_L2_LOOKUP
,
1431 SJA1105_SEARCH
, &l2_lookup
);
1433 /* Found and this port is already in the entry's
1434 * port mask => job done
1436 if (l2_lookup
.destports
& BIT(port
))
1438 /* l2_lookup.index is populated by the switch in case it
1441 l2_lookup
.destports
|= BIT(port
);
1442 goto skip_finding_an_index
;
1445 /* Not found, so try to find an unused spot in the FDB.
1446 * This is slightly inefficient because the strategy is knock-knock at
1447 * every possible position from 0 to 1023.
1449 for (i
= 0; i
< SJA1105_MAX_L2_LOOKUP_COUNT
; i
++) {
1450 rc
= sja1105_dynamic_config_read(priv
, BLK_IDX_L2_LOOKUP
,
1455 if (i
== SJA1105_MAX_L2_LOOKUP_COUNT
) {
1456 dev_err(ds
->dev
, "FDB is full, cannot add entry.\n");
1459 l2_lookup
.lockeds
= true;
1460 l2_lookup
.index
= i
;
1462 skip_finding_an_index
:
1463 rc
= sja1105_dynamic_config_write(priv
, BLK_IDX_L2_LOOKUP
,
1464 l2_lookup
.index
, &l2_lookup
,
1469 return sja1105_static_fdb_change(priv
, port
, &l2_lookup
, true);
1472 int sja1105pqrs_fdb_del(struct dsa_switch
*ds
, int port
,
1473 const unsigned char *addr
, u16 vid
)
1475 struct sja1105_l2_lookup_entry l2_lookup
= {0};
1476 struct sja1105_private
*priv
= ds
->priv
;
1480 l2_lookup
.macaddr
= ether_addr_to_u64(addr
);
1481 l2_lookup
.vlanid
= vid
;
1482 l2_lookup
.iotag
= SJA1105_S_TAG
;
1483 l2_lookup
.mask_macaddr
= GENMASK_ULL(ETH_ALEN
* 8 - 1, 0);
1484 if (priv
->vlan_state
!= SJA1105_VLAN_UNAWARE
) {
1485 l2_lookup
.mask_vlanid
= VLAN_VID_MASK
;
1486 l2_lookup
.mask_iotag
= BIT(0);
1488 l2_lookup
.mask_vlanid
= 0;
1489 l2_lookup
.mask_iotag
= 0;
1491 l2_lookup
.destports
= BIT(port
);
1493 rc
= sja1105_dynamic_config_read(priv
, BLK_IDX_L2_LOOKUP
,
1494 SJA1105_SEARCH
, &l2_lookup
);
1498 l2_lookup
.destports
&= ~BIT(port
);
1500 /* Decide whether we remove just this port from the FDB entry,
1501 * or if we remove it completely.
1503 if (l2_lookup
.destports
)
1508 rc
= sja1105_dynamic_config_write(priv
, BLK_IDX_L2_LOOKUP
,
1509 l2_lookup
.index
, &l2_lookup
, keep
);
1513 return sja1105_static_fdb_change(priv
, port
, &l2_lookup
, keep
);
1516 static int sja1105_fdb_add(struct dsa_switch
*ds
, int port
,
1517 const unsigned char *addr
, u16 vid
)
1519 struct sja1105_private
*priv
= ds
->priv
;
1521 /* dsa_8021q is in effect when the bridge's vlan_filtering isn't,
1522 * so the switch still does some VLAN processing internally.
1523 * But Shared VLAN Learning (SVL) is also active, and it will take
1524 * care of autonomous forwarding between the unique pvid's of each
1525 * port. Here we just make sure that users can't add duplicate FDB
1526 * entries when in this mode - the actual VID doesn't matter except
1527 * for what gets printed in 'bridge fdb show'. In the case of zero,
1528 * no VID gets printed at all.
1530 if (priv
->vlan_state
!= SJA1105_VLAN_FILTERING_FULL
)
1533 return priv
->info
->fdb_add_cmd(ds
, port
, addr
, vid
);
1536 static int sja1105_fdb_del(struct dsa_switch
*ds
, int port
,
1537 const unsigned char *addr
, u16 vid
)
1539 struct sja1105_private
*priv
= ds
->priv
;
1541 if (priv
->vlan_state
!= SJA1105_VLAN_FILTERING_FULL
)
1544 return priv
->info
->fdb_del_cmd(ds
, port
, addr
, vid
);
1547 static int sja1105_fdb_dump(struct dsa_switch
*ds
, int port
,
1548 dsa_fdb_dump_cb_t
*cb
, void *data
)
1550 struct sja1105_private
*priv
= ds
->priv
;
1551 struct device
*dev
= ds
->dev
;
1554 for (i
= 0; i
< SJA1105_MAX_L2_LOOKUP_COUNT
; i
++) {
1555 struct sja1105_l2_lookup_entry l2_lookup
= {0};
1556 u8 macaddr
[ETH_ALEN
];
1559 rc
= sja1105_dynamic_config_read(priv
, BLK_IDX_L2_LOOKUP
,
1561 /* No fdb entry at i, not an issue */
1565 dev_err(dev
, "Failed to dump FDB: %d\n", rc
);
1569 /* FDB dump callback is per port. This means we have to
1570 * disregard a valid entry if it's not for this port, even if
1571 * only to revisit it later. This is inefficient because the
1572 * 1024-sized FDB table needs to be traversed 4 times through
1573 * SPI during a 'bridge fdb show' command.
1575 if (!(l2_lookup
.destports
& BIT(port
)))
1578 /* We need to hide the FDB entry for unknown multicast */
1579 if (l2_lookup
.macaddr
== SJA1105_UNKNOWN_MULTICAST
&&
1580 l2_lookup
.mask_macaddr
== SJA1105_UNKNOWN_MULTICAST
)
1583 u64_to_ether_addr(l2_lookup
.macaddr
, macaddr
);
1585 /* We need to hide the dsa_8021q VLANs from the user. */
1586 if (priv
->vlan_state
== SJA1105_VLAN_UNAWARE
)
1587 l2_lookup
.vlanid
= 0;
1588 cb(macaddr
, l2_lookup
.vlanid
, l2_lookup
.lockeds
, data
);
1593 static int sja1105_mdb_add(struct dsa_switch
*ds
, int port
,
1594 const struct switchdev_obj_port_mdb
*mdb
)
1596 return sja1105_fdb_add(ds
, port
, mdb
->addr
, mdb
->vid
);
1599 static int sja1105_mdb_del(struct dsa_switch
*ds
, int port
,
1600 const struct switchdev_obj_port_mdb
*mdb
)
1602 return sja1105_fdb_del(ds
, port
, mdb
->addr
, mdb
->vid
);
1605 /* Common function for unicast and broadcast flood configuration.
1606 * Flooding is configured between each {ingress, egress} port pair, and since
1607 * the bridge's semantics are those of "egress flooding", it means we must
1608 * enable flooding towards this port from all ingress ports that are in the
1609 * same forwarding domain.
1611 static int sja1105_manage_flood_domains(struct sja1105_private
*priv
)
1613 struct sja1105_l2_forwarding_entry
*l2_fwd
;
1614 struct dsa_switch
*ds
= priv
->ds
;
1617 l2_fwd
= priv
->static_config
.tables
[BLK_IDX_L2_FORWARDING
].entries
;
1619 for (from
= 0; from
< ds
->num_ports
; from
++) {
1620 u64 fl_domain
= 0, bc_domain
= 0;
1622 for (to
= 0; to
< priv
->ds
->num_ports
; to
++) {
1623 if (!sja1105_can_forward(l2_fwd
, from
, to
))
1626 if (priv
->ucast_egress_floods
& BIT(to
))
1627 fl_domain
|= BIT(to
);
1628 if (priv
->bcast_egress_floods
& BIT(to
))
1629 bc_domain
|= BIT(to
);
1632 /* Nothing changed, nothing to do */
1633 if (l2_fwd
[from
].fl_domain
== fl_domain
&&
1634 l2_fwd
[from
].bc_domain
== bc_domain
)
1637 l2_fwd
[from
].fl_domain
= fl_domain
;
1638 l2_fwd
[from
].bc_domain
= bc_domain
;
1640 rc
= sja1105_dynamic_config_write(priv
, BLK_IDX_L2_FORWARDING
,
1641 from
, &l2_fwd
[from
], true);
1649 static int sja1105_bridge_member(struct dsa_switch
*ds
, int port
,
1650 struct net_device
*br
, bool member
)
1652 struct sja1105_l2_forwarding_entry
*l2_fwd
;
1653 struct sja1105_private
*priv
= ds
->priv
;
1656 l2_fwd
= priv
->static_config
.tables
[BLK_IDX_L2_FORWARDING
].entries
;
1658 for (i
= 0; i
< ds
->num_ports
; i
++) {
1659 /* Add this port to the forwarding matrix of the
1660 * other ports in the same bridge, and viceversa.
1662 if (!dsa_is_user_port(ds
, i
))
1664 /* For the ports already under the bridge, only one thing needs
1665 * to be done, and that is to add this port to their
1666 * reachability domain. So we can perform the SPI write for
1667 * them immediately. However, for this port itself (the one
1668 * that is new to the bridge), we need to add all other ports
1669 * to its reachability domain. So we do that incrementally in
1670 * this loop, and perform the SPI write only at the end, once
1671 * the domain contains all other bridge ports.
1675 if (dsa_to_port(ds
, i
)->bridge_dev
!= br
)
1677 sja1105_port_allow_traffic(l2_fwd
, i
, port
, member
);
1678 sja1105_port_allow_traffic(l2_fwd
, port
, i
, member
);
1680 rc
= sja1105_dynamic_config_write(priv
, BLK_IDX_L2_FORWARDING
,
1681 i
, &l2_fwd
[i
], true);
1686 rc
= sja1105_dynamic_config_write(priv
, BLK_IDX_L2_FORWARDING
,
1687 port
, &l2_fwd
[port
], true);
1691 return sja1105_manage_flood_domains(priv
);
1694 static void sja1105_bridge_stp_state_set(struct dsa_switch
*ds
, int port
,
1697 struct sja1105_private
*priv
= ds
->priv
;
1698 struct sja1105_mac_config_entry
*mac
;
1700 mac
= priv
->static_config
.tables
[BLK_IDX_MAC_CONFIG
].entries
;
1703 case BR_STATE_DISABLED
:
1704 case BR_STATE_BLOCKING
:
1705 /* From UM10944 description of DRPDTAG (why put this there?):
1706 * "Management traffic flows to the port regardless of the state
1707 * of the INGRESS flag". So BPDUs are still be allowed to pass.
1708 * At the moment no difference between DISABLED and BLOCKING.
1710 mac
[port
].ingress
= false;
1711 mac
[port
].egress
= false;
1712 mac
[port
].dyn_learn
= false;
1714 case BR_STATE_LISTENING
:
1715 mac
[port
].ingress
= true;
1716 mac
[port
].egress
= false;
1717 mac
[port
].dyn_learn
= false;
1719 case BR_STATE_LEARNING
:
1720 mac
[port
].ingress
= true;
1721 mac
[port
].egress
= false;
1722 mac
[port
].dyn_learn
= !!(priv
->learn_ena
& BIT(port
));
1724 case BR_STATE_FORWARDING
:
1725 mac
[port
].ingress
= true;
1726 mac
[port
].egress
= true;
1727 mac
[port
].dyn_learn
= !!(priv
->learn_ena
& BIT(port
));
1730 dev_err(ds
->dev
, "invalid STP state: %d\n", state
);
1734 sja1105_dynamic_config_write(priv
, BLK_IDX_MAC_CONFIG
, port
,
1738 static int sja1105_bridge_join(struct dsa_switch
*ds
, int port
,
1739 struct net_device
*br
)
1741 return sja1105_bridge_member(ds
, port
, br
, true);
1744 static void sja1105_bridge_leave(struct dsa_switch
*ds
, int port
,
1745 struct net_device
*br
)
1747 sja1105_bridge_member(ds
, port
, br
, false);
1750 #define BYTES_PER_KBIT (1000LL / 8)
1752 static int sja1105_find_unused_cbs_shaper(struct sja1105_private
*priv
)
1756 for (i
= 0; i
< priv
->info
->num_cbs_shapers
; i
++)
1757 if (!priv
->cbs
[i
].idle_slope
&& !priv
->cbs
[i
].send_slope
)
1763 static int sja1105_delete_cbs_shaper(struct sja1105_private
*priv
, int port
,
1768 for (i
= 0; i
< priv
->info
->num_cbs_shapers
; i
++) {
1769 struct sja1105_cbs_entry
*cbs
= &priv
->cbs
[i
];
1771 if (cbs
->port
== port
&& cbs
->prio
== prio
) {
1772 memset(cbs
, 0, sizeof(*cbs
));
1773 return sja1105_dynamic_config_write(priv
, BLK_IDX_CBS
,
1781 static int sja1105_setup_tc_cbs(struct dsa_switch
*ds
, int port
,
1782 struct tc_cbs_qopt_offload
*offload
)
1784 struct sja1105_private
*priv
= ds
->priv
;
1785 struct sja1105_cbs_entry
*cbs
;
1788 if (!offload
->enable
)
1789 return sja1105_delete_cbs_shaper(priv
, port
, offload
->queue
);
1791 index
= sja1105_find_unused_cbs_shaper(priv
);
1795 cbs
= &priv
->cbs
[index
];
1797 cbs
->prio
= offload
->queue
;
1798 /* locredit and sendslope are negative by definition. In hardware,
1799 * positive values must be provided, and the negative sign is implicit.
1801 cbs
->credit_hi
= offload
->hicredit
;
1802 cbs
->credit_lo
= abs(offload
->locredit
);
1803 /* User space is in kbits/sec, hardware in bytes/sec */
1804 cbs
->idle_slope
= offload
->idleslope
* BYTES_PER_KBIT
;
1805 cbs
->send_slope
= abs(offload
->sendslope
* BYTES_PER_KBIT
);
1806 /* Convert the negative values from 64-bit 2's complement
1807 * to 32-bit 2's complement (for the case of 0x80000000 whose
1808 * negative is still negative).
1810 cbs
->credit_lo
&= GENMASK_ULL(31, 0);
1811 cbs
->send_slope
&= GENMASK_ULL(31, 0);
1813 return sja1105_dynamic_config_write(priv
, BLK_IDX_CBS
, index
, cbs
,
1817 static int sja1105_reload_cbs(struct sja1105_private
*priv
)
1821 /* The credit based shapers are only allocated if
1822 * CONFIG_NET_SCH_CBS is enabled.
1827 for (i
= 0; i
< priv
->info
->num_cbs_shapers
; i
++) {
1828 struct sja1105_cbs_entry
*cbs
= &priv
->cbs
[i
];
1830 if (!cbs
->idle_slope
&& !cbs
->send_slope
)
1833 rc
= sja1105_dynamic_config_write(priv
, BLK_IDX_CBS
, i
, cbs
,
1842 static const char * const sja1105_reset_reasons
[] = {
1843 [SJA1105_VLAN_FILTERING
] = "VLAN filtering",
1844 [SJA1105_RX_HWTSTAMPING
] = "RX timestamping",
1845 [SJA1105_AGEING_TIME
] = "Ageing time",
1846 [SJA1105_SCHEDULING
] = "Time-aware scheduling",
1847 [SJA1105_BEST_EFFORT_POLICING
] = "Best-effort policing",
1848 [SJA1105_VIRTUAL_LINKS
] = "Virtual links",
1851 /* For situations where we need to change a setting at runtime that is only
1852 * available through the static configuration, resetting the switch in order
1853 * to upload the new static config is unavoidable. Back up the settings we
1854 * modify at runtime (currently only MAC) and restore them after uploading,
1855 * such that this operation is relatively seamless.
1857 int sja1105_static_config_reload(struct sja1105_private
*priv
,
1858 enum sja1105_reset_reason reason
)
1860 struct ptp_system_timestamp ptp_sts_before
;
1861 struct ptp_system_timestamp ptp_sts_after
;
1862 int speed_mbps
[SJA1105_MAX_NUM_PORTS
];
1863 u16 bmcr
[SJA1105_MAX_NUM_PORTS
] = {0};
1864 struct sja1105_mac_config_entry
*mac
;
1865 struct dsa_switch
*ds
= priv
->ds
;
1871 mutex_lock(&priv
->mgmt_lock
);
1873 mac
= priv
->static_config
.tables
[BLK_IDX_MAC_CONFIG
].entries
;
1875 /* Back up the dynamic link speed changed by sja1105_adjust_port_config
1876 * in order to temporarily restore it to SJA1105_SPEED_AUTO - which the
1877 * switch wants to see in the static config in order to allow us to
1878 * change it through the dynamic interface later.
1880 for (i
= 0; i
< ds
->num_ports
; i
++) {
1881 u32 reg_addr
= mdiobus_c45_addr(MDIO_MMD_VEND2
, MDIO_CTRL1
);
1883 speed_mbps
[i
] = sja1105_port_speed_to_ethtool(priv
,
1885 mac
[i
].speed
= priv
->info
->port_speed
[SJA1105_SPEED_AUTO
];
1888 bmcr
[i
] = mdiobus_read(priv
->mdio_pcs
, i
, reg_addr
);
1891 /* No PTP operations can run right now */
1892 mutex_lock(&priv
->ptp_data
.lock
);
1894 rc
= __sja1105_ptp_gettimex(ds
, &now
, &ptp_sts_before
);
1896 mutex_unlock(&priv
->ptp_data
.lock
);
1900 /* Reset switch and send updated static configuration */
1901 rc
= sja1105_static_config_upload(priv
);
1903 mutex_unlock(&priv
->ptp_data
.lock
);
1907 rc
= __sja1105_ptp_settime(ds
, 0, &ptp_sts_after
);
1909 mutex_unlock(&priv
->ptp_data
.lock
);
1913 t1
= timespec64_to_ns(&ptp_sts_before
.pre_ts
);
1914 t2
= timespec64_to_ns(&ptp_sts_before
.post_ts
);
1915 t3
= timespec64_to_ns(&ptp_sts_after
.pre_ts
);
1916 t4
= timespec64_to_ns(&ptp_sts_after
.post_ts
);
1917 /* Mid point, corresponds to pre-reset PTPCLKVAL */
1918 t12
= t1
+ (t2
- t1
) / 2;
1919 /* Mid point, corresponds to post-reset PTPCLKVAL, aka 0 */
1920 t34
= t3
+ (t4
- t3
) / 2;
1921 /* Advance PTPCLKVAL by the time it took since its readout */
1924 __sja1105_ptp_adjtime(ds
, now
);
1926 mutex_unlock(&priv
->ptp_data
.lock
);
1928 dev_info(priv
->ds
->dev
,
1929 "Reset switch and programmed static config. Reason: %s\n",
1930 sja1105_reset_reasons
[reason
]);
1932 /* Configure the CGU (PLLs) for MII and RMII PHYs.
1933 * For these interfaces there is no dynamic configuration
1934 * needed, since PLLs have same settings at all speeds.
1936 if (priv
->info
->clocking_setup
) {
1937 rc
= priv
->info
->clocking_setup(priv
);
1942 for (i
= 0; i
< ds
->num_ports
; i
++) {
1943 struct dw_xpcs
*xpcs
= priv
->xpcs
[i
];
1946 rc
= sja1105_adjust_port_config(priv
, i
, speed_mbps
[i
]);
1953 if (bmcr
[i
] & BMCR_ANENABLE
)
1954 mode
= MLO_AN_INBAND
;
1955 else if (priv
->fixed_link
[i
])
1956 mode
= MLO_AN_FIXED
;
1960 rc
= xpcs_do_config(xpcs
, priv
->phy_mode
[i
], mode
);
1964 if (!phylink_autoneg_inband(mode
)) {
1965 int speed
= SPEED_UNKNOWN
;
1967 if (priv
->phy_mode
[i
] == PHY_INTERFACE_MODE_2500BASEX
)
1969 else if (bmcr
[i
] & BMCR_SPEED1000
)
1971 else if (bmcr
[i
] & BMCR_SPEED100
)
1976 xpcs_link_up(&xpcs
->pcs
, mode
, priv
->phy_mode
[i
],
1977 speed
, DUPLEX_FULL
);
1981 rc
= sja1105_reload_cbs(priv
);
1985 mutex_unlock(&priv
->mgmt_lock
);
1990 static int sja1105_pvid_apply(struct sja1105_private
*priv
, int port
, u16 pvid
)
1992 struct sja1105_mac_config_entry
*mac
;
1994 mac
= priv
->static_config
.tables
[BLK_IDX_MAC_CONFIG
].entries
;
1996 mac
[port
].vlanid
= pvid
;
1998 return sja1105_dynamic_config_write(priv
, BLK_IDX_MAC_CONFIG
, port
,
2002 static int sja1105_crosschip_bridge_join(struct dsa_switch
*ds
,
2003 int tree_index
, int sw_index
,
2004 int other_port
, struct net_device
*br
)
2006 struct dsa_switch
*other_ds
= dsa_switch_find(tree_index
, sw_index
);
2007 struct sja1105_private
*other_priv
= other_ds
->priv
;
2008 struct sja1105_private
*priv
= ds
->priv
;
2011 if (other_ds
->ops
!= &sja1105_switch_ops
)
2014 for (port
= 0; port
< ds
->num_ports
; port
++) {
2015 if (!dsa_is_user_port(ds
, port
))
2017 if (dsa_to_port(ds
, port
)->bridge_dev
!= br
)
2020 rc
= dsa_8021q_crosschip_bridge_join(priv
->dsa_8021q_ctx
,
2022 other_priv
->dsa_8021q_ctx
,
2027 rc
= dsa_8021q_crosschip_bridge_join(other_priv
->dsa_8021q_ctx
,
2029 priv
->dsa_8021q_ctx
,
2038 static void sja1105_crosschip_bridge_leave(struct dsa_switch
*ds
,
2039 int tree_index
, int sw_index
,
2041 struct net_device
*br
)
2043 struct dsa_switch
*other_ds
= dsa_switch_find(tree_index
, sw_index
);
2044 struct sja1105_private
*other_priv
= other_ds
->priv
;
2045 struct sja1105_private
*priv
= ds
->priv
;
2048 if (other_ds
->ops
!= &sja1105_switch_ops
)
2051 for (port
= 0; port
< ds
->num_ports
; port
++) {
2052 if (!dsa_is_user_port(ds
, port
))
2054 if (dsa_to_port(ds
, port
)->bridge_dev
!= br
)
2057 dsa_8021q_crosschip_bridge_leave(priv
->dsa_8021q_ctx
, port
,
2058 other_priv
->dsa_8021q_ctx
,
2061 dsa_8021q_crosschip_bridge_leave(other_priv
->dsa_8021q_ctx
,
2063 priv
->dsa_8021q_ctx
, port
);
2067 static int sja1105_setup_8021q_tagging(struct dsa_switch
*ds
, bool enabled
)
2069 struct sja1105_private
*priv
= ds
->priv
;
2072 rc
= dsa_8021q_setup(priv
->dsa_8021q_ctx
, enabled
);
2076 dev_info(ds
->dev
, "%s switch tagging\n",
2077 enabled
? "Enabled" : "Disabled");
2081 static enum dsa_tag_protocol
2082 sja1105_get_tag_protocol(struct dsa_switch
*ds
, int port
,
2083 enum dsa_tag_protocol mp
)
2085 struct sja1105_private
*priv
= ds
->priv
;
2087 return priv
->info
->tag_proto
;
2090 static int sja1105_find_free_subvlan(u16
*subvlan_map
, bool pvid
)
2097 for (subvlan
= 1; subvlan
< DSA_8021Q_N_SUBVLAN
; subvlan
++)
2098 if (subvlan_map
[subvlan
] == VLAN_N_VID
)
2104 static int sja1105_find_subvlan(u16
*subvlan_map
, u16 vid
)
2108 for (subvlan
= 0; subvlan
< DSA_8021Q_N_SUBVLAN
; subvlan
++)
2109 if (subvlan_map
[subvlan
] == vid
)
2115 static int sja1105_find_committed_subvlan(struct sja1105_private
*priv
,
2118 struct sja1105_port
*sp
= &priv
->ports
[port
];
2120 return sja1105_find_subvlan(sp
->subvlan_map
, vid
);
2123 static void sja1105_init_subvlan_map(u16
*subvlan_map
)
2127 for (subvlan
= 0; subvlan
< DSA_8021Q_N_SUBVLAN
; subvlan
++)
2128 subvlan_map
[subvlan
] = VLAN_N_VID
;
2131 static void sja1105_commit_subvlan_map(struct sja1105_private
*priv
, int port
,
2134 struct sja1105_port
*sp
= &priv
->ports
[port
];
2137 for (subvlan
= 0; subvlan
< DSA_8021Q_N_SUBVLAN
; subvlan
++)
2138 sp
->subvlan_map
[subvlan
] = subvlan_map
[subvlan
];
2141 static int sja1105_is_vlan_configured(struct sja1105_private
*priv
, u16 vid
)
2143 struct sja1105_vlan_lookup_entry
*vlan
;
2146 vlan
= priv
->static_config
.tables
[BLK_IDX_VLAN_LOOKUP
].entries
;
2147 count
= priv
->static_config
.tables
[BLK_IDX_VLAN_LOOKUP
].entry_count
;
2149 for (i
= 0; i
< count
; i
++)
2150 if (vlan
[i
].vlanid
== vid
)
2153 /* Return an invalid entry index if not found */
2158 sja1105_find_retagging_entry(struct sja1105_retagging_entry
*retagging
,
2159 int count
, int from_port
, u16 from_vid
,
2164 for (i
= 0; i
< count
; i
++)
2165 if (retagging
[i
].ing_port
== BIT(from_port
) &&
2166 retagging
[i
].vlan_ing
== from_vid
&&
2167 retagging
[i
].vlan_egr
== to_vid
)
2170 /* Return an invalid entry index if not found */
2174 static int sja1105_commit_vlans(struct sja1105_private
*priv
,
2175 struct sja1105_vlan_lookup_entry
*new_vlan
,
2176 struct sja1105_retagging_entry
*new_retagging
,
2179 struct sja1105_retagging_entry
*retagging
;
2180 struct sja1105_vlan_lookup_entry
*vlan
;
2181 struct sja1105_table
*table
;
2186 table
= &priv
->static_config
.tables
[BLK_IDX_VLAN_LOOKUP
];
2187 vlan
= table
->entries
;
2189 for (i
= 0; i
< VLAN_N_VID
; i
++) {
2190 int match
= sja1105_is_vlan_configured(priv
, i
);
2192 if (new_vlan
[i
].vlanid
!= VLAN_N_VID
)
2195 if (new_vlan
[i
].vlanid
== VLAN_N_VID
&& match
>= 0) {
2196 /* Was there before, no longer is. Delete */
2197 dev_dbg(priv
->ds
->dev
, "Deleting VLAN %d\n", i
);
2198 rc
= sja1105_dynamic_config_write(priv
,
2199 BLK_IDX_VLAN_LOOKUP
,
2200 i
, &vlan
[match
], false);
2203 } else if (new_vlan
[i
].vlanid
!= VLAN_N_VID
) {
2204 /* Nothing changed, don't do anything */
2206 vlan
[match
].vlanid
== new_vlan
[i
].vlanid
&&
2207 vlan
[match
].tag_port
== new_vlan
[i
].tag_port
&&
2208 vlan
[match
].vlan_bc
== new_vlan
[i
].vlan_bc
&&
2209 vlan
[match
].vmemb_port
== new_vlan
[i
].vmemb_port
)
2212 dev_dbg(priv
->ds
->dev
, "Updating VLAN %d\n", i
);
2213 rc
= sja1105_dynamic_config_write(priv
,
2214 BLK_IDX_VLAN_LOOKUP
,
2222 if (table
->entry_count
)
2223 kfree(table
->entries
);
2225 table
->entries
= kcalloc(num_vlans
, table
->ops
->unpacked_entry_size
,
2227 if (!table
->entries
)
2230 table
->entry_count
= num_vlans
;
2231 vlan
= table
->entries
;
2233 for (i
= 0; i
< VLAN_N_VID
; i
++) {
2234 if (new_vlan
[i
].vlanid
== VLAN_N_VID
)
2236 vlan
[k
++] = new_vlan
[i
];
2239 /* VLAN Retagging Table */
2240 table
= &priv
->static_config
.tables
[BLK_IDX_RETAGGING
];
2241 retagging
= table
->entries
;
2243 for (i
= 0; i
< table
->entry_count
; i
++) {
2244 rc
= sja1105_dynamic_config_write(priv
, BLK_IDX_RETAGGING
,
2245 i
, &retagging
[i
], false);
2250 if (table
->entry_count
)
2251 kfree(table
->entries
);
2253 table
->entries
= kcalloc(num_retagging
, table
->ops
->unpacked_entry_size
,
2255 if (!table
->entries
)
2258 table
->entry_count
= num_retagging
;
2259 retagging
= table
->entries
;
2261 for (i
= 0; i
< num_retagging
; i
++) {
2262 retagging
[i
] = new_retagging
[i
];
2265 rc
= sja1105_dynamic_config_write(priv
, BLK_IDX_RETAGGING
,
2266 i
, &retagging
[i
], true);
2274 struct sja1105_crosschip_vlan
{
2275 struct list_head list
;
2280 struct dsa_8021q_context
*other_ctx
;
2283 struct sja1105_crosschip_switch
{
2284 struct list_head list
;
2285 struct dsa_8021q_context
*other_ctx
;
2288 static int sja1105_commit_pvid(struct sja1105_private
*priv
)
2290 struct sja1105_bridge_vlan
*v
;
2291 struct list_head
*vlan_list
;
2294 if (priv
->vlan_state
== SJA1105_VLAN_FILTERING_FULL
)
2295 vlan_list
= &priv
->bridge_vlans
;
2297 vlan_list
= &priv
->dsa_8021q_vlans
;
2299 list_for_each_entry(v
, vlan_list
, list
) {
2301 rc
= sja1105_pvid_apply(priv
, v
->port
, v
->vid
);
2311 sja1105_build_bridge_vlans(struct sja1105_private
*priv
,
2312 struct sja1105_vlan_lookup_entry
*new_vlan
)
2314 struct sja1105_bridge_vlan
*v
;
2316 if (priv
->vlan_state
== SJA1105_VLAN_UNAWARE
)
2319 list_for_each_entry(v
, &priv
->bridge_vlans
, list
) {
2322 new_vlan
[match
].vlanid
= v
->vid
;
2323 new_vlan
[match
].vmemb_port
|= BIT(v
->port
);
2324 new_vlan
[match
].vlan_bc
|= BIT(v
->port
);
2326 new_vlan
[match
].tag_port
|= BIT(v
->port
);
2327 new_vlan
[match
].type_entry
= SJA1110_VLAN_D_TAG
;
2334 sja1105_build_dsa_8021q_vlans(struct sja1105_private
*priv
,
2335 struct sja1105_vlan_lookup_entry
*new_vlan
)
2337 struct sja1105_bridge_vlan
*v
;
2339 if (priv
->vlan_state
== SJA1105_VLAN_FILTERING_FULL
)
2342 list_for_each_entry(v
, &priv
->dsa_8021q_vlans
, list
) {
2345 new_vlan
[match
].vlanid
= v
->vid
;
2346 new_vlan
[match
].vmemb_port
|= BIT(v
->port
);
2347 new_vlan
[match
].vlan_bc
|= BIT(v
->port
);
2349 new_vlan
[match
].tag_port
|= BIT(v
->port
);
2350 new_vlan
[match
].type_entry
= SJA1110_VLAN_D_TAG
;
2356 static int sja1105_build_subvlans(struct sja1105_private
*priv
,
2357 u16 subvlan_map
[][DSA_8021Q_N_SUBVLAN
],
2358 struct sja1105_vlan_lookup_entry
*new_vlan
,
2359 struct sja1105_retagging_entry
*new_retagging
,
2362 struct sja1105_bridge_vlan
*v
;
2363 int k
= *num_retagging
;
2365 if (priv
->vlan_state
!= SJA1105_VLAN_BEST_EFFORT
)
2368 list_for_each_entry(v
, &priv
->bridge_vlans
, list
) {
2369 int upstream
= dsa_upstream_port(priv
->ds
, v
->port
);
2373 /* Only sub-VLANs on user ports need to be applied.
2374 * Bridge VLANs also include VLANs added automatically
2375 * by DSA on the CPU port.
2377 if (!dsa_is_user_port(priv
->ds
, v
->port
))
2380 subvlan
= sja1105_find_subvlan(subvlan_map
[v
->port
],
2383 subvlan
= sja1105_find_free_subvlan(subvlan_map
[v
->port
],
2386 dev_err(priv
->ds
->dev
, "No more free subvlans\n");
2391 rx_vid
= dsa_8021q_rx_vid_subvlan(priv
->ds
, v
->port
, subvlan
);
2393 /* @v->vid on @v->port needs to be retagged to @rx_vid
2394 * on @upstream. Assume @v->vid on @v->port and on
2395 * @upstream was already configured by the previous
2396 * iteration over bridge_vlans.
2399 new_vlan
[match
].vlanid
= rx_vid
;
2400 new_vlan
[match
].vmemb_port
|= BIT(v
->port
);
2401 new_vlan
[match
].vmemb_port
|= BIT(upstream
);
2402 new_vlan
[match
].vlan_bc
|= BIT(v
->port
);
2403 new_vlan
[match
].vlan_bc
|= BIT(upstream
);
2404 /* The "untagged" flag is set the same as for the
2408 new_vlan
[match
].tag_port
|= BIT(v
->port
);
2409 /* But it's always tagged towards the CPU */
2410 new_vlan
[match
].tag_port
|= BIT(upstream
);
2411 new_vlan
[match
].type_entry
= SJA1110_VLAN_D_TAG
;
2413 /* The Retagging Table generates packet *clones* with
2414 * the new VLAN. This is a very odd hardware quirk
2415 * which we need to suppress by dropping the original
2417 * Deny egress of the original VLAN towards the CPU
2418 * port. This will force the switch to drop it, and
2419 * we'll see only the retagged packets.
2422 new_vlan
[match
].vlan_bc
&= ~BIT(upstream
);
2424 /* And the retagging itself */
2425 new_retagging
[k
].vlan_ing
= v
->vid
;
2426 new_retagging
[k
].vlan_egr
= rx_vid
;
2427 new_retagging
[k
].ing_port
= BIT(v
->port
);
2428 new_retagging
[k
].egr_port
= BIT(upstream
);
2429 if (k
++ == SJA1105_MAX_RETAGGING_COUNT
) {
2430 dev_err(priv
->ds
->dev
, "No more retagging rules\n");
2434 subvlan_map
[v
->port
][subvlan
] = v
->vid
;
2442 /* Sadly, in crosschip scenarios where the CPU port is also the link to another
2443 * switch, we should retag backwards (the dsa_8021q vid to the original vid) on
2444 * the CPU port of neighbour switches.
2447 sja1105_build_crosschip_subvlans(struct sja1105_private
*priv
,
2448 struct sja1105_vlan_lookup_entry
*new_vlan
,
2449 struct sja1105_retagging_entry
*new_retagging
,
2452 struct sja1105_crosschip_vlan
*tmp
, *pos
;
2453 struct dsa_8021q_crosschip_link
*c
;
2454 struct sja1105_bridge_vlan
*v
, *w
;
2455 struct list_head crosschip_vlans
;
2456 int k
= *num_retagging
;
2459 if (priv
->vlan_state
!= SJA1105_VLAN_BEST_EFFORT
)
2462 INIT_LIST_HEAD(&crosschip_vlans
);
2464 list_for_each_entry(c
, &priv
->dsa_8021q_ctx
->crosschip_links
, list
) {
2465 struct sja1105_private
*other_priv
= c
->other_ctx
->ds
->priv
;
2467 if (other_priv
->vlan_state
== SJA1105_VLAN_FILTERING_FULL
)
2470 /* Crosschip links are also added to the CPU ports.
2473 if (!dsa_is_user_port(priv
->ds
, c
->port
))
2475 if (!dsa_is_user_port(c
->other_ctx
->ds
, c
->other_port
))
2478 /* Search for VLANs on the remote port */
2479 list_for_each_entry(v
, &other_priv
->bridge_vlans
, list
) {
2480 bool already_added
= false;
2481 bool we_have_it
= false;
2483 if (v
->port
!= c
->other_port
)
2486 /* If @v is a pvid on @other_ds, it does not need
2487 * re-retagging, because its SVL field is 0 and we
2488 * already allow that, via the dsa_8021q crosschip
2494 /* Search for the VLAN on our local port */
2495 list_for_each_entry(w
, &priv
->bridge_vlans
, list
) {
2496 if (w
->port
== c
->port
&& w
->vid
== v
->vid
) {
2505 list_for_each_entry(tmp
, &crosschip_vlans
, list
) {
2506 if (tmp
->vid
== v
->vid
&&
2507 tmp
->untagged
== v
->untagged
&&
2508 tmp
->port
== c
->port
&&
2509 tmp
->other_port
== v
->port
&&
2510 tmp
->other_ctx
== c
->other_ctx
) {
2511 already_added
= true;
2519 tmp
= kzalloc(sizeof(*tmp
), GFP_KERNEL
);
2521 dev_err(priv
->ds
->dev
, "Failed to allocate memory\n");
2526 tmp
->port
= c
->port
;
2527 tmp
->other_port
= v
->port
;
2528 tmp
->other_ctx
= c
->other_ctx
;
2529 tmp
->untagged
= v
->untagged
;
2530 list_add(&tmp
->list
, &crosschip_vlans
);
2534 list_for_each_entry(tmp
, &crosschip_vlans
, list
) {
2535 struct sja1105_private
*other_priv
= tmp
->other_ctx
->ds
->priv
;
2536 int upstream
= dsa_upstream_port(priv
->ds
, tmp
->port
);
2540 subvlan
= sja1105_find_committed_subvlan(other_priv
,
2543 /* If this happens, it's a bug. The neighbour switch does not
2544 * have a subvlan for tmp->vid on tmp->other_port, but it
2545 * should, since we already checked for its vlan_state.
2547 if (WARN_ON(subvlan
< 0)) {
2552 rx_vid
= dsa_8021q_rx_vid_subvlan(tmp
->other_ctx
->ds
,
2556 /* The @rx_vid retagged from @tmp->vid on
2557 * {@tmp->other_ds, @tmp->other_port} needs to be
2558 * re-retagged to @tmp->vid on the way back to us.
2560 * Assume the original @tmp->vid is already configured
2561 * on this local switch, otherwise we wouldn't be
2562 * retagging its subvlan on the other switch in the
2563 * first place. We just need to add a reverse retagging
2564 * rule for @rx_vid and install @rx_vid on our ports.
2567 new_vlan
[match
].vlanid
= rx_vid
;
2568 new_vlan
[match
].vmemb_port
|= BIT(tmp
->port
);
2569 new_vlan
[match
].vmemb_port
|= BIT(upstream
);
2570 /* The "untagged" flag is set the same as for the
2571 * original VLAN. And towards the CPU, it doesn't
2572 * really matter, because @rx_vid will only receive
2573 * traffic on that port. For consistency with other dsa_8021q
2574 * VLANs, we'll keep the CPU port tagged.
2577 new_vlan
[match
].tag_port
|= BIT(tmp
->port
);
2578 new_vlan
[match
].tag_port
|= BIT(upstream
);
2579 new_vlan
[match
].type_entry
= SJA1110_VLAN_D_TAG
;
2580 /* Deny egress of @rx_vid towards our front-panel port.
2581 * This will force the switch to drop it, and we'll see
2582 * only the re-retagged packets (having the original,
2583 * pre-initial-retagging, VLAN @tmp->vid).
2585 new_vlan
[match
].vlan_bc
&= ~BIT(tmp
->port
);
2587 /* On reverse retagging, the same ingress VLAN goes to multiple
2588 * ports. So we have an opportunity to create composite rules
2589 * to not waste the limited space in the retagging table.
2591 k
= sja1105_find_retagging_entry(new_retagging
, *num_retagging
,
2592 upstream
, rx_vid
, tmp
->vid
);
2594 if (*num_retagging
== SJA1105_MAX_RETAGGING_COUNT
) {
2595 dev_err(priv
->ds
->dev
, "No more retagging rules\n");
2599 k
= (*num_retagging
)++;
2601 /* And the retagging itself */
2602 new_retagging
[k
].vlan_ing
= rx_vid
;
2603 new_retagging
[k
].vlan_egr
= tmp
->vid
;
2604 new_retagging
[k
].ing_port
= BIT(upstream
);
2605 new_retagging
[k
].egr_port
|= BIT(tmp
->port
);
2609 list_for_each_entry_safe(tmp
, pos
, &crosschip_vlans
, list
) {
2610 list_del(&tmp
->list
);
2617 static int sja1105_build_vlan_table(struct sja1105_private
*priv
, bool notify
);
2619 static int sja1105_notify_crosschip_switches(struct sja1105_private
*priv
)
2621 struct sja1105_crosschip_switch
*s
, *pos
;
2622 struct list_head crosschip_switches
;
2623 struct dsa_8021q_crosschip_link
*c
;
2626 INIT_LIST_HEAD(&crosschip_switches
);
2628 list_for_each_entry(c
, &priv
->dsa_8021q_ctx
->crosschip_links
, list
) {
2629 bool already_added
= false;
2631 list_for_each_entry(s
, &crosschip_switches
, list
) {
2632 if (s
->other_ctx
== c
->other_ctx
) {
2633 already_added
= true;
2641 s
= kzalloc(sizeof(*s
), GFP_KERNEL
);
2643 dev_err(priv
->ds
->dev
, "Failed to allocate memory\n");
2647 s
->other_ctx
= c
->other_ctx
;
2648 list_add(&s
->list
, &crosschip_switches
);
2651 list_for_each_entry(s
, &crosschip_switches
, list
) {
2652 struct sja1105_private
*other_priv
= s
->other_ctx
->ds
->priv
;
2654 rc
= sja1105_build_vlan_table(other_priv
, false);
2660 list_for_each_entry_safe(s
, pos
, &crosschip_switches
, list
) {
2668 static int sja1105_build_vlan_table(struct sja1105_private
*priv
, bool notify
)
2670 u16 subvlan_map
[SJA1105_MAX_NUM_PORTS
][DSA_8021Q_N_SUBVLAN
];
2671 struct sja1105_retagging_entry
*new_retagging
;
2672 struct sja1105_vlan_lookup_entry
*new_vlan
;
2673 struct sja1105_table
*table
;
2674 int i
, num_retagging
= 0;
2677 table
= &priv
->static_config
.tables
[BLK_IDX_VLAN_LOOKUP
];
2678 new_vlan
= kcalloc(VLAN_N_VID
,
2679 table
->ops
->unpacked_entry_size
, GFP_KERNEL
);
2683 table
= &priv
->static_config
.tables
[BLK_IDX_VLAN_LOOKUP
];
2684 new_retagging
= kcalloc(SJA1105_MAX_RETAGGING_COUNT
,
2685 table
->ops
->unpacked_entry_size
, GFP_KERNEL
);
2686 if (!new_retagging
) {
2691 for (i
= 0; i
< VLAN_N_VID
; i
++)
2692 new_vlan
[i
].vlanid
= VLAN_N_VID
;
2694 for (i
= 0; i
< SJA1105_MAX_RETAGGING_COUNT
; i
++)
2695 new_retagging
[i
].vlan_ing
= VLAN_N_VID
;
2697 for (i
= 0; i
< priv
->ds
->num_ports
; i
++)
2698 sja1105_init_subvlan_map(subvlan_map
[i
]);
2701 rc
= sja1105_build_bridge_vlans(priv
, new_vlan
);
2705 /* VLANs necessary for dsa_8021q operation, given to us by tag_8021q.c:
2710 rc
= sja1105_build_dsa_8021q_vlans(priv
, new_vlan
);
2714 /* Private VLANs necessary for dsa_8021q operation, which we need to
2715 * determine on our own:
2717 * - Sub-VLANs of crosschip switches
2719 rc
= sja1105_build_subvlans(priv
, subvlan_map
, new_vlan
, new_retagging
,
2724 rc
= sja1105_build_crosschip_subvlans(priv
, new_vlan
, new_retagging
,
2729 rc
= sja1105_commit_vlans(priv
, new_vlan
, new_retagging
, num_retagging
);
2733 rc
= sja1105_commit_pvid(priv
);
2737 for (i
= 0; i
< priv
->ds
->num_ports
; i
++)
2738 sja1105_commit_subvlan_map(priv
, i
, subvlan_map
[i
]);
2741 rc
= sja1105_notify_crosschip_switches(priv
);
2748 kfree(new_retagging
);
2753 /* The TPID setting belongs to the General Parameters table,
2754 * which can only be partially reconfigured at runtime (and not the TPID).
2755 * So a switch reset is required.
2757 int sja1105_vlan_filtering(struct dsa_switch
*ds
, int port
, bool enabled
,
2758 struct netlink_ext_ack
*extack
)
2760 struct sja1105_l2_lookup_params_entry
*l2_lookup_params
;
2761 struct sja1105_general_params_entry
*general_params
;
2762 struct sja1105_private
*priv
= ds
->priv
;
2763 enum sja1105_vlan_state state
;
2764 struct sja1105_table
*table
;
2765 struct sja1105_rule
*rule
;
2770 list_for_each_entry(rule
, &priv
->flow_block
.rules
, list
) {
2771 if (rule
->type
== SJA1105_RULE_VL
) {
2772 NL_SET_ERR_MSG_MOD(extack
,
2773 "Cannot change VLAN filtering with active VL rules");
2779 /* Enable VLAN filtering. */
2781 tpid2
= ETH_P_8021AD
;
2783 /* Disable VLAN filtering. */
2784 tpid
= ETH_P_SJA1105
;
2785 tpid2
= ETH_P_SJA1105
;
2788 for (port
= 0; port
< ds
->num_ports
; port
++) {
2789 struct sja1105_port
*sp
= &priv
->ports
[port
];
2792 sp
->xmit_tpid
= priv
->info
->qinq_tpid
;
2794 sp
->xmit_tpid
= ETH_P_SJA1105
;
2798 state
= SJA1105_VLAN_UNAWARE
;
2799 else if (priv
->best_effort_vlan_filtering
)
2800 state
= SJA1105_VLAN_BEST_EFFORT
;
2802 state
= SJA1105_VLAN_FILTERING_FULL
;
2804 if (priv
->vlan_state
== state
)
2807 priv
->vlan_state
= state
;
2808 want_tagging
= (state
== SJA1105_VLAN_UNAWARE
||
2809 state
== SJA1105_VLAN_BEST_EFFORT
);
2811 table
= &priv
->static_config
.tables
[BLK_IDX_GENERAL_PARAMS
];
2812 general_params
= table
->entries
;
2813 /* EtherType used to identify inner tagged (C-tag) VLAN traffic */
2814 general_params
->tpid
= tpid
;
2815 /* EtherType used to identify outer tagged (S-tag) VLAN traffic */
2816 general_params
->tpid2
= tpid2
;
2817 /* When VLAN filtering is on, we need to at least be able to
2818 * decode management traffic through the "backup plan".
2820 general_params
->incl_srcpt1
= enabled
;
2821 general_params
->incl_srcpt0
= enabled
;
2823 want_tagging
= priv
->best_effort_vlan_filtering
|| !enabled
;
2825 /* VLAN filtering => independent VLAN learning.
2826 * No VLAN filtering (or best effort) => shared VLAN learning.
2828 * In shared VLAN learning mode, untagged traffic still gets
2829 * pvid-tagged, and the FDB table gets populated with entries
2830 * containing the "real" (pvid or from VLAN tag) VLAN ID.
2831 * However the switch performs a masked L2 lookup in the FDB,
2832 * effectively only looking up a frame's DMAC (and not VID) for the
2833 * forwarding decision.
2835 * This is extremely convenient for us, because in modes with
2836 * vlan_filtering=0, dsa_8021q actually installs unique pvid's into
2837 * each front panel port. This is good for identification but breaks
2838 * learning badly - the VID of the learnt FDB entry is unique, aka
2839 * no frames coming from any other port are going to have it. So
2840 * for forwarding purposes, this is as though learning was broken
2841 * (all frames get flooded).
2843 table
= &priv
->static_config
.tables
[BLK_IDX_L2_LOOKUP_PARAMS
];
2844 l2_lookup_params
= table
->entries
;
2845 l2_lookup_params
->shared_learn
= want_tagging
;
2847 sja1105_frame_memory_partitioning(priv
);
2849 rc
= sja1105_build_vlan_table(priv
, false);
2853 rc
= sja1105_static_config_reload(priv
, SJA1105_VLAN_FILTERING
);
2855 NL_SET_ERR_MSG_MOD(extack
, "Failed to change VLAN Ethertype");
2857 /* Switch port identification based on 802.1Q is only passable
2858 * if we are not under a vlan_filtering bridge. So make sure
2859 * the two configurations are mutually exclusive (of course, the
2860 * user may know better, i.e. best_effort_vlan_filtering).
2862 return sja1105_setup_8021q_tagging(ds
, want_tagging
);
2865 /* Returns number of VLANs added (0 or 1) on success,
2866 * or a negative error code.
2868 static int sja1105_vlan_add_one(struct dsa_switch
*ds
, int port
, u16 vid
,
2869 u16 flags
, struct list_head
*vlan_list
)
2871 bool untagged
= flags
& BRIDGE_VLAN_INFO_UNTAGGED
;
2872 bool pvid
= flags
& BRIDGE_VLAN_INFO_PVID
;
2873 struct sja1105_bridge_vlan
*v
;
2875 list_for_each_entry(v
, vlan_list
, list
) {
2876 if (v
->port
== port
&& v
->vid
== vid
) {
2878 if (v
->untagged
== untagged
&& v
->pvid
== pvid
)
2879 /* Nothing changed */
2882 /* It's the same VLAN, but some of the flags changed
2883 * and the user did not bother to delete it first.
2884 * Update it and trigger sja1105_build_vlan_table.
2886 v
->untagged
= untagged
;
2892 v
= kzalloc(sizeof(*v
), GFP_KERNEL
);
2894 dev_err(ds
->dev
, "Out of memory while storing VLAN\n");
2900 v
->untagged
= untagged
;
2902 list_add(&v
->list
, vlan_list
);
2907 /* Returns number of VLANs deleted (0 or 1) */
2908 static int sja1105_vlan_del_one(struct dsa_switch
*ds
, int port
, u16 vid
,
2909 struct list_head
*vlan_list
)
2911 struct sja1105_bridge_vlan
*v
, *n
;
2913 list_for_each_entry_safe(v
, n
, vlan_list
, list
) {
2914 if (v
->port
== port
&& v
->vid
== vid
) {
2924 static int sja1105_vlan_add(struct dsa_switch
*ds
, int port
,
2925 const struct switchdev_obj_port_vlan
*vlan
,
2926 struct netlink_ext_ack
*extack
)
2928 struct sja1105_private
*priv
= ds
->priv
;
2929 bool vlan_table_changed
= false;
2932 /* If the user wants best-effort VLAN filtering (aka vlan_filtering
2933 * bridge plus tagging), be sure to at least deny alterations to the
2934 * configuration done by dsa_8021q.
2936 if (priv
->vlan_state
!= SJA1105_VLAN_FILTERING_FULL
&&
2937 vid_is_dsa_8021q(vlan
->vid
)) {
2938 NL_SET_ERR_MSG_MOD(extack
,
2939 "Range 1024-3071 reserved for dsa_8021q operation");
2943 rc
= sja1105_vlan_add_one(ds
, port
, vlan
->vid
, vlan
->flags
,
2944 &priv
->bridge_vlans
);
2948 vlan_table_changed
= true;
2950 if (!vlan_table_changed
)
2953 return sja1105_build_vlan_table(priv
, true);
2956 static int sja1105_vlan_del(struct dsa_switch
*ds
, int port
,
2957 const struct switchdev_obj_port_vlan
*vlan
)
2959 struct sja1105_private
*priv
= ds
->priv
;
2960 bool vlan_table_changed
= false;
2963 rc
= sja1105_vlan_del_one(ds
, port
, vlan
->vid
, &priv
->bridge_vlans
);
2965 vlan_table_changed
= true;
2967 if (!vlan_table_changed
)
2970 return sja1105_build_vlan_table(priv
, true);
2973 static int sja1105_dsa_8021q_vlan_add(struct dsa_switch
*ds
, int port
, u16 vid
,
2976 struct sja1105_private
*priv
= ds
->priv
;
2979 rc
= sja1105_vlan_add_one(ds
, port
, vid
, flags
, &priv
->dsa_8021q_vlans
);
2983 return sja1105_build_vlan_table(priv
, true);
2986 static int sja1105_dsa_8021q_vlan_del(struct dsa_switch
*ds
, int port
, u16 vid
)
2988 struct sja1105_private
*priv
= ds
->priv
;
2991 rc
= sja1105_vlan_del_one(ds
, port
, vid
, &priv
->dsa_8021q_vlans
);
2995 return sja1105_build_vlan_table(priv
, true);
2998 static const struct dsa_8021q_ops sja1105_dsa_8021q_ops
= {
2999 .vlan_add
= sja1105_dsa_8021q_vlan_add
,
3000 .vlan_del
= sja1105_dsa_8021q_vlan_del
,
3003 /* The programming model for the SJA1105 switch is "all-at-once" via static
3004 * configuration tables. Some of these can be dynamically modified at runtime,
3005 * but not the xMII mode parameters table.
3006 * Furthermode, some PHYs may not have crystals for generating their clocks
3007 * (e.g. RMII). Instead, their 50MHz clock is supplied via the SJA1105 port's
3008 * ref_clk pin. So port clocking needs to be initialized early, before
3009 * connecting to PHYs is attempted, otherwise they won't respond through MDIO.
3010 * Setting correct PHY link speed does not matter now.
3011 * But dsa_slave_phy_setup is called later than sja1105_setup, so the PHY
3012 * bindings are not yet parsed by DSA core. We need to parse early so that we
3013 * can populate the xMII mode parameters table.
3015 static int sja1105_setup(struct dsa_switch
*ds
)
3017 struct sja1105_private
*priv
= ds
->priv
;
3020 rc
= sja1105_parse_dt(priv
);
3022 dev_err(ds
->dev
, "Failed to parse DT: %d\n", rc
);
3026 /* Error out early if internal delays are required through DT
3027 * and we can't apply them.
3029 rc
= sja1105_parse_rgmii_delays(priv
);
3031 dev_err(ds
->dev
, "RGMII delay not supported\n");
3035 rc
= sja1105_ptp_clock_register(ds
);
3037 dev_err(ds
->dev
, "Failed to register PTP clock: %d\n", rc
);
3041 rc
= sja1105_mdiobus_register(ds
);
3043 dev_err(ds
->dev
, "Failed to register MDIO bus: %pe\n",
3045 goto out_ptp_clock_unregister
;
3048 if (priv
->info
->disable_microcontroller
) {
3049 rc
= priv
->info
->disable_microcontroller(priv
);
3052 "Failed to disable microcontroller: %pe\n",
3054 goto out_mdiobus_unregister
;
3058 /* Create and send configuration down to device */
3059 rc
= sja1105_static_config_load(priv
);
3061 dev_err(ds
->dev
, "Failed to load static config: %d\n", rc
);
3062 goto out_mdiobus_unregister
;
3065 /* Configure the CGU (PHY link modes and speeds) */
3066 if (priv
->info
->clocking_setup
) {
3067 rc
= priv
->info
->clocking_setup(priv
);
3070 "Failed to configure MII clocking: %pe\n",
3072 goto out_static_config_free
;
3076 /* On SJA1105, VLAN filtering per se is always enabled in hardware.
3077 * The only thing we can do to disable it is lie about what the 802.1Q
3079 * So it will still try to apply VLAN filtering, but all ingress
3080 * traffic (except frames received with EtherType of ETH_P_SJA1105)
3081 * will be internally tagged with a distorted VLAN header where the
3082 * TPID is ETH_P_SJA1105, and the VLAN ID is the port pvid.
3084 ds
->vlan_filtering_is_global
= true;
3086 /* Advertise the 8 egress queues */
3087 ds
->num_tx_queues
= SJA1105_NUM_TC
;
3089 ds
->mtu_enforcement_ingress
= true;
3091 priv
->best_effort_vlan_filtering
= true;
3093 rc
= sja1105_devlink_setup(ds
);
3095 goto out_static_config_free
;
3097 /* The DSA/switchdev model brings up switch ports in standalone mode by
3098 * default, and that means vlan_filtering is 0 since they're not under
3099 * a bridge, so it's safe to set up switch tagging at this time.
3102 rc
= sja1105_setup_8021q_tagging(ds
, true);
3105 goto out_devlink_teardown
;
3109 out_devlink_teardown
:
3110 sja1105_devlink_teardown(ds
);
3111 out_mdiobus_unregister
:
3112 sja1105_mdiobus_unregister(ds
);
3113 out_ptp_clock_unregister
:
3114 sja1105_ptp_clock_unregister(ds
);
3115 out_static_config_free
:
3116 sja1105_static_config_free(&priv
->static_config
);
3121 static void sja1105_teardown(struct dsa_switch
*ds
)
3123 struct sja1105_private
*priv
= ds
->priv
;
3124 struct sja1105_bridge_vlan
*v
, *n
;
3127 for (port
= 0; port
< ds
->num_ports
; port
++) {
3128 struct sja1105_port
*sp
= &priv
->ports
[port
];
3130 if (!dsa_is_user_port(ds
, port
))
3133 if (sp
->xmit_worker
)
3134 kthread_destroy_worker(sp
->xmit_worker
);
3137 sja1105_devlink_teardown(ds
);
3138 sja1105_flower_teardown(ds
);
3139 sja1105_tas_teardown(ds
);
3140 sja1105_ptp_clock_unregister(ds
);
3141 sja1105_static_config_free(&priv
->static_config
);
3143 list_for_each_entry_safe(v
, n
, &priv
->dsa_8021q_vlans
, list
) {
3148 list_for_each_entry_safe(v
, n
, &priv
->bridge_vlans
, list
) {
3154 static void sja1105_port_disable(struct dsa_switch
*ds
, int port
)
3156 struct sja1105_private
*priv
= ds
->priv
;
3157 struct sja1105_port
*sp
= &priv
->ports
[port
];
3159 if (!dsa_is_user_port(ds
, port
))
3162 kthread_cancel_work_sync(&sp
->xmit_work
);
3163 skb_queue_purge(&sp
->xmit_queue
);
3166 static int sja1105_mgmt_xmit(struct dsa_switch
*ds
, int port
, int slot
,
3167 struct sk_buff
*skb
, bool takets
)
3169 struct sja1105_mgmt_entry mgmt_route
= {0};
3170 struct sja1105_private
*priv
= ds
->priv
;
3177 mgmt_route
.macaddr
= ether_addr_to_u64(hdr
->h_dest
);
3178 mgmt_route
.destports
= BIT(port
);
3179 mgmt_route
.enfport
= 1;
3180 mgmt_route
.tsreg
= 0;
3181 mgmt_route
.takets
= takets
;
3183 rc
= sja1105_dynamic_config_write(priv
, BLK_IDX_MGMT_ROUTE
,
3184 slot
, &mgmt_route
, true);
3190 /* Transfer skb to the host port. */
3191 dsa_enqueue_skb(skb
, dsa_to_port(ds
, port
)->slave
);
3193 /* Wait until the switch has processed the frame */
3195 rc
= sja1105_dynamic_config_read(priv
, BLK_IDX_MGMT_ROUTE
,
3198 dev_err_ratelimited(priv
->ds
->dev
,
3199 "failed to poll for mgmt route\n");
3203 /* UM10944: The ENFPORT flag of the respective entry is
3204 * cleared when a match is found. The host can use this
3205 * flag as an acknowledgment.
3208 } while (mgmt_route
.enfport
&& --timeout
);
3211 /* Clean up the management route so that a follow-up
3212 * frame may not match on it by mistake.
3213 * This is only hardware supported on P/Q/R/S - on E/T it is
3214 * a no-op and we are silently discarding the -EOPNOTSUPP.
3216 sja1105_dynamic_config_write(priv
, BLK_IDX_MGMT_ROUTE
,
3217 slot
, &mgmt_route
, false);
3218 dev_err_ratelimited(priv
->ds
->dev
, "xmit timed out\n");
3221 return NETDEV_TX_OK
;
3224 #define work_to_port(work) \
3225 container_of((work), struct sja1105_port, xmit_work)
3226 #define tagger_to_sja1105(t) \
3227 container_of((t), struct sja1105_private, tagger_data)
3229 /* Deferred work is unfortunately necessary because setting up the management
3230 * route cannot be done from atomit context (SPI transfer takes a sleepable
3233 static void sja1105_port_deferred_xmit(struct kthread_work
*work
)
3235 struct sja1105_port
*sp
= work_to_port(work
);
3236 struct sja1105_tagger_data
*tagger_data
= sp
->data
;
3237 struct sja1105_private
*priv
= tagger_to_sja1105(tagger_data
);
3238 int port
= sp
- priv
->ports
;
3239 struct sk_buff
*skb
;
3241 while ((skb
= skb_dequeue(&sp
->xmit_queue
)) != NULL
) {
3242 struct sk_buff
*clone
= SJA1105_SKB_CB(skb
)->clone
;
3244 mutex_lock(&priv
->mgmt_lock
);
3246 sja1105_mgmt_xmit(priv
->ds
, port
, 0, skb
, !!clone
);
3248 /* The clone, if there, was made by dsa_skb_tx_timestamp */
3250 sja1105_ptp_txtstamp_skb(priv
->ds
, port
, clone
);
3252 mutex_unlock(&priv
->mgmt_lock
);
3256 /* The MAXAGE setting belongs to the L2 Forwarding Parameters table,
3257 * which cannot be reconfigured at runtime. So a switch reset is required.
3259 static int sja1105_set_ageing_time(struct dsa_switch
*ds
,
3260 unsigned int ageing_time
)
3262 struct sja1105_l2_lookup_params_entry
*l2_lookup_params
;
3263 struct sja1105_private
*priv
= ds
->priv
;
3264 struct sja1105_table
*table
;
3265 unsigned int maxage
;
3267 table
= &priv
->static_config
.tables
[BLK_IDX_L2_LOOKUP_PARAMS
];
3268 l2_lookup_params
= table
->entries
;
3270 maxage
= SJA1105_AGEING_TIME_MS(ageing_time
);
3272 if (l2_lookup_params
->maxage
== maxage
)
3275 l2_lookup_params
->maxage
= maxage
;
3277 return sja1105_static_config_reload(priv
, SJA1105_AGEING_TIME
);
3280 static int sja1105_change_mtu(struct dsa_switch
*ds
, int port
, int new_mtu
)
3282 struct sja1105_l2_policing_entry
*policing
;
3283 struct sja1105_private
*priv
= ds
->priv
;
3285 new_mtu
+= VLAN_ETH_HLEN
+ ETH_FCS_LEN
;
3287 if (dsa_is_cpu_port(ds
, port
))
3288 new_mtu
+= VLAN_HLEN
;
3290 policing
= priv
->static_config
.tables
[BLK_IDX_L2_POLICING
].entries
;
3292 if (policing
[port
].maxlen
== new_mtu
)
3295 policing
[port
].maxlen
= new_mtu
;
3297 return sja1105_static_config_reload(priv
, SJA1105_BEST_EFFORT_POLICING
);
3300 static int sja1105_get_max_mtu(struct dsa_switch
*ds
, int port
)
3302 return 2043 - VLAN_ETH_HLEN
- ETH_FCS_LEN
;
3305 static int sja1105_port_setup_tc(struct dsa_switch
*ds
, int port
,
3306 enum tc_setup_type type
,
3310 case TC_SETUP_QDISC_TAPRIO
:
3311 return sja1105_setup_tc_taprio(ds
, port
, type_data
);
3312 case TC_SETUP_QDISC_CBS
:
3313 return sja1105_setup_tc_cbs(ds
, port
, type_data
);
3319 /* We have a single mirror (@to) port, but can configure ingress and egress
3320 * mirroring on all other (@from) ports.
3321 * We need to allow mirroring rules only as long as the @to port is always the
3322 * same, and we need to unset the @to port from mirr_port only when there is no
3323 * mirroring rule that references it.
3325 static int sja1105_mirror_apply(struct sja1105_private
*priv
, int from
, int to
,
3326 bool ingress
, bool enabled
)
3328 struct sja1105_general_params_entry
*general_params
;
3329 struct sja1105_mac_config_entry
*mac
;
3330 struct dsa_switch
*ds
= priv
->ds
;
3331 struct sja1105_table
*table
;
3332 bool already_enabled
;
3336 table
= &priv
->static_config
.tables
[BLK_IDX_GENERAL_PARAMS
];
3337 general_params
= table
->entries
;
3339 mac
= priv
->static_config
.tables
[BLK_IDX_MAC_CONFIG
].entries
;
3341 already_enabled
= (general_params
->mirr_port
!= ds
->num_ports
);
3342 if (already_enabled
&& enabled
&& general_params
->mirr_port
!= to
) {
3343 dev_err(priv
->ds
->dev
,
3344 "Delete mirroring rules towards port %llu first\n",
3345 general_params
->mirr_port
);
3354 /* Anybody still referencing mirr_port? */
3355 for (port
= 0; port
< ds
->num_ports
; port
++) {
3356 if (mac
[port
].ing_mirr
|| mac
[port
].egr_mirr
) {
3361 /* Unset already_enabled for next time */
3363 new_mirr_port
= ds
->num_ports
;
3365 if (new_mirr_port
!= general_params
->mirr_port
) {
3366 general_params
->mirr_port
= new_mirr_port
;
3368 rc
= sja1105_dynamic_config_write(priv
, BLK_IDX_GENERAL_PARAMS
,
3369 0, general_params
, true);
3375 mac
[from
].ing_mirr
= enabled
;
3377 mac
[from
].egr_mirr
= enabled
;
3379 return sja1105_dynamic_config_write(priv
, BLK_IDX_MAC_CONFIG
, from
,
3383 static int sja1105_mirror_add(struct dsa_switch
*ds
, int port
,
3384 struct dsa_mall_mirror_tc_entry
*mirror
,
3387 return sja1105_mirror_apply(ds
->priv
, port
, mirror
->to_local_port
,
3391 static void sja1105_mirror_del(struct dsa_switch
*ds
, int port
,
3392 struct dsa_mall_mirror_tc_entry
*mirror
)
3394 sja1105_mirror_apply(ds
->priv
, port
, mirror
->to_local_port
,
3395 mirror
->ingress
, false);
3398 static int sja1105_port_policer_add(struct dsa_switch
*ds
, int port
,
3399 struct dsa_mall_policer_tc_entry
*policer
)
3401 struct sja1105_l2_policing_entry
*policing
;
3402 struct sja1105_private
*priv
= ds
->priv
;
3404 policing
= priv
->static_config
.tables
[BLK_IDX_L2_POLICING
].entries
;
3406 /* In hardware, every 8 microseconds the credit level is incremented by
3407 * the value of RATE bytes divided by 64, up to a maximum of SMAX
3410 policing
[port
].rate
= div_u64(512 * policer
->rate_bytes_per_sec
,
3412 policing
[port
].smax
= policer
->burst
;
3414 return sja1105_static_config_reload(priv
, SJA1105_BEST_EFFORT_POLICING
);
3417 static void sja1105_port_policer_del(struct dsa_switch
*ds
, int port
)
3419 struct sja1105_l2_policing_entry
*policing
;
3420 struct sja1105_private
*priv
= ds
->priv
;
3422 policing
= priv
->static_config
.tables
[BLK_IDX_L2_POLICING
].entries
;
3424 policing
[port
].rate
= SJA1105_RATE_MBPS(1000);
3425 policing
[port
].smax
= 65535;
3427 sja1105_static_config_reload(priv
, SJA1105_BEST_EFFORT_POLICING
);
3430 static int sja1105_port_set_learning(struct sja1105_private
*priv
, int port
,
3433 struct sja1105_mac_config_entry
*mac
;
3436 mac
= priv
->static_config
.tables
[BLK_IDX_MAC_CONFIG
].entries
;
3438 mac
[port
].dyn_learn
= enabled
;
3440 rc
= sja1105_dynamic_config_write(priv
, BLK_IDX_MAC_CONFIG
, port
,
3446 priv
->learn_ena
|= BIT(port
);
3448 priv
->learn_ena
&= ~BIT(port
);
3453 static int sja1105_port_ucast_bcast_flood(struct sja1105_private
*priv
, int to
,
3454 struct switchdev_brport_flags flags
)
3456 if (flags
.mask
& BR_FLOOD
) {
3457 if (flags
.val
& BR_FLOOD
)
3458 priv
->ucast_egress_floods
|= BIT(to
);
3460 priv
->ucast_egress_floods
&= ~BIT(to
);
3463 if (flags
.mask
& BR_BCAST_FLOOD
) {
3464 if (flags
.val
& BR_BCAST_FLOOD
)
3465 priv
->bcast_egress_floods
|= BIT(to
);
3467 priv
->bcast_egress_floods
&= ~BIT(to
);
3470 return sja1105_manage_flood_domains(priv
);
3473 static int sja1105_port_mcast_flood(struct sja1105_private
*priv
, int to
,
3474 struct switchdev_brport_flags flags
,
3475 struct netlink_ext_ack
*extack
)
3477 struct sja1105_l2_lookup_entry
*l2_lookup
;
3478 struct sja1105_table
*table
;
3481 table
= &priv
->static_config
.tables
[BLK_IDX_L2_LOOKUP
];
3482 l2_lookup
= table
->entries
;
3484 for (match
= 0; match
< table
->entry_count
; match
++)
3485 if (l2_lookup
[match
].macaddr
== SJA1105_UNKNOWN_MULTICAST
&&
3486 l2_lookup
[match
].mask_macaddr
== SJA1105_UNKNOWN_MULTICAST
)
3489 if (match
== table
->entry_count
) {
3490 NL_SET_ERR_MSG_MOD(extack
,
3491 "Could not find FDB entry for unknown multicast");
3495 if (flags
.val
& BR_MCAST_FLOOD
)
3496 l2_lookup
[match
].destports
|= BIT(to
);
3498 l2_lookup
[match
].destports
&= ~BIT(to
);
3500 return sja1105_dynamic_config_write(priv
, BLK_IDX_L2_LOOKUP
,
3501 l2_lookup
[match
].index
,
3506 static int sja1105_port_pre_bridge_flags(struct dsa_switch
*ds
, int port
,
3507 struct switchdev_brport_flags flags
,
3508 struct netlink_ext_ack
*extack
)
3510 struct sja1105_private
*priv
= ds
->priv
;
3512 if (flags
.mask
& ~(BR_LEARNING
| BR_FLOOD
| BR_MCAST_FLOOD
|
3516 if (flags
.mask
& (BR_FLOOD
| BR_MCAST_FLOOD
) &&
3517 !priv
->info
->can_limit_mcast_flood
) {
3518 bool multicast
= !!(flags
.val
& BR_MCAST_FLOOD
);
3519 bool unicast
= !!(flags
.val
& BR_FLOOD
);
3521 if (unicast
!= multicast
) {
3522 NL_SET_ERR_MSG_MOD(extack
,
3523 "This chip cannot configure multicast flooding independently of unicast");
3531 static int sja1105_port_bridge_flags(struct dsa_switch
*ds
, int port
,
3532 struct switchdev_brport_flags flags
,
3533 struct netlink_ext_ack
*extack
)
3535 struct sja1105_private
*priv
= ds
->priv
;
3538 if (flags
.mask
& BR_LEARNING
) {
3539 bool learn_ena
= !!(flags
.val
& BR_LEARNING
);
3541 rc
= sja1105_port_set_learning(priv
, port
, learn_ena
);
3546 if (flags
.mask
& (BR_FLOOD
| BR_BCAST_FLOOD
)) {
3547 rc
= sja1105_port_ucast_bcast_flood(priv
, port
, flags
);
3552 /* For chips that can't offload BR_MCAST_FLOOD independently, there
3553 * is nothing to do here, we ensured the configuration is in sync by
3554 * offloading BR_FLOOD.
3556 if (flags
.mask
& BR_MCAST_FLOOD
&& priv
->info
->can_limit_mcast_flood
) {
3557 rc
= sja1105_port_mcast_flood(priv
, port
, flags
,
3566 static const struct dsa_switch_ops sja1105_switch_ops
= {
3567 .get_tag_protocol
= sja1105_get_tag_protocol
,
3568 .setup
= sja1105_setup
,
3569 .teardown
= sja1105_teardown
,
3570 .set_ageing_time
= sja1105_set_ageing_time
,
3571 .port_change_mtu
= sja1105_change_mtu
,
3572 .port_max_mtu
= sja1105_get_max_mtu
,
3573 .phylink_validate
= sja1105_phylink_validate
,
3574 .phylink_mac_config
= sja1105_mac_config
,
3575 .phylink_mac_link_up
= sja1105_mac_link_up
,
3576 .phylink_mac_link_down
= sja1105_mac_link_down
,
3577 .get_strings
= sja1105_get_strings
,
3578 .get_ethtool_stats
= sja1105_get_ethtool_stats
,
3579 .get_sset_count
= sja1105_get_sset_count
,
3580 .get_ts_info
= sja1105_get_ts_info
,
3581 .port_disable
= sja1105_port_disable
,
3582 .port_fdb_dump
= sja1105_fdb_dump
,
3583 .port_fdb_add
= sja1105_fdb_add
,
3584 .port_fdb_del
= sja1105_fdb_del
,
3585 .port_bridge_join
= sja1105_bridge_join
,
3586 .port_bridge_leave
= sja1105_bridge_leave
,
3587 .port_pre_bridge_flags
= sja1105_port_pre_bridge_flags
,
3588 .port_bridge_flags
= sja1105_port_bridge_flags
,
3589 .port_stp_state_set
= sja1105_bridge_stp_state_set
,
3590 .port_vlan_filtering
= sja1105_vlan_filtering
,
3591 .port_vlan_add
= sja1105_vlan_add
,
3592 .port_vlan_del
= sja1105_vlan_del
,
3593 .port_mdb_add
= sja1105_mdb_add
,
3594 .port_mdb_del
= sja1105_mdb_del
,
3595 .port_hwtstamp_get
= sja1105_hwtstamp_get
,
3596 .port_hwtstamp_set
= sja1105_hwtstamp_set
,
3597 .port_rxtstamp
= sja1105_port_rxtstamp
,
3598 .port_txtstamp
= sja1105_port_txtstamp
,
3599 .port_setup_tc
= sja1105_port_setup_tc
,
3600 .port_mirror_add
= sja1105_mirror_add
,
3601 .port_mirror_del
= sja1105_mirror_del
,
3602 .port_policer_add
= sja1105_port_policer_add
,
3603 .port_policer_del
= sja1105_port_policer_del
,
3604 .cls_flower_add
= sja1105_cls_flower_add
,
3605 .cls_flower_del
= sja1105_cls_flower_del
,
3606 .cls_flower_stats
= sja1105_cls_flower_stats
,
3607 .crosschip_bridge_join
= sja1105_crosschip_bridge_join
,
3608 .crosschip_bridge_leave
= sja1105_crosschip_bridge_leave
,
3609 .devlink_param_get
= sja1105_devlink_param_get
,
3610 .devlink_param_set
= sja1105_devlink_param_set
,
3611 .devlink_info_get
= sja1105_devlink_info_get
,
3614 static const struct of_device_id sja1105_dt_ids
[];
3616 static int sja1105_check_device_id(struct sja1105_private
*priv
)
3618 const struct sja1105_regs
*regs
= priv
->info
->regs
;
3619 u8 prod_id
[SJA1105_SIZE_DEVICE_ID
] = {0};
3620 struct device
*dev
= &priv
->spidev
->dev
;
3621 const struct of_device_id
*match
;
3626 rc
= sja1105_xfer_u32(priv
, SPI_READ
, regs
->device_id
, &device_id
,
3631 rc
= sja1105_xfer_buf(priv
, SPI_READ
, regs
->prod_id
, prod_id
,
3632 SJA1105_SIZE_DEVICE_ID
);
3636 sja1105_unpack(prod_id
, &part_no
, 19, 4, SJA1105_SIZE_DEVICE_ID
);
3638 for (match
= sja1105_dt_ids
; match
->compatible
[0]; match
++) {
3639 const struct sja1105_info
*info
= match
->data
;
3641 /* Is what's been probed in our match table at all? */
3642 if (info
->device_id
!= device_id
|| info
->part_no
!= part_no
)
3645 /* But is it what's in the device tree? */
3646 if (priv
->info
->device_id
!= device_id
||
3647 priv
->info
->part_no
!= part_no
) {
3648 dev_warn(dev
, "Device tree specifies chip %s but found %s, please fix it!\n",
3649 priv
->info
->name
, info
->name
);
3650 /* It isn't. No problem, pick that up. */
3657 dev_err(dev
, "Unexpected {device ID, part number}: 0x%x 0x%llx\n",
3658 device_id
, part_no
);
3663 static int sja1105_probe(struct spi_device
*spi
)
3665 struct sja1105_tagger_data
*tagger_data
;
3666 struct device
*dev
= &spi
->dev
;
3667 struct sja1105_private
*priv
;
3668 size_t max_xfer
, max_msg
;
3669 struct dsa_switch
*ds
;
3672 if (!dev
->of_node
) {
3673 dev_err(dev
, "No DTS bindings for SJA1105 driver\n");
3677 priv
= devm_kzalloc(dev
, sizeof(struct sja1105_private
), GFP_KERNEL
);
3681 /* Configure the optional reset pin and bring up switch */
3682 priv
->reset_gpio
= devm_gpiod_get(dev
, "reset", GPIOD_OUT_HIGH
);
3683 if (IS_ERR(priv
->reset_gpio
))
3684 dev_dbg(dev
, "reset-gpios not defined, ignoring\n");
3686 sja1105_hw_reset(priv
->reset_gpio
, 1, 1);
3688 /* Populate our driver private structure (priv) based on
3689 * the device tree node that was probed (spi)
3692 spi_set_drvdata(spi
, priv
);
3694 /* Configure the SPI bus */
3695 spi
->bits_per_word
= 8;
3696 rc
= spi_setup(spi
);
3698 dev_err(dev
, "Could not init SPI\n");
3702 /* In sja1105_xfer, we send spi_messages composed of two spi_transfers:
3703 * a small one for the message header and another one for the current
3704 * chunk of the packed buffer.
3705 * Check that the restrictions imposed by the SPI controller are
3706 * respected: the chunk buffer is smaller than the max transfer size,
3707 * and the total length of the chunk plus its message header is smaller
3708 * than the max message size.
3709 * We do that during probe time since the maximum transfer size is a
3710 * runtime invariant.
3712 max_xfer
= spi_max_transfer_size(spi
);
3713 max_msg
= spi_max_message_size(spi
);
3715 /* We need to send at least one 64-bit word of SPI payload per message
3716 * in order to be able to make useful progress.
3718 if (max_msg
< SJA1105_SIZE_SPI_MSG_HEADER
+ 8) {
3719 dev_err(dev
, "SPI master cannot send large enough buffers, aborting\n");
3723 priv
->max_xfer_len
= SJA1105_SIZE_SPI_MSG_MAXLEN
;
3724 if (priv
->max_xfer_len
> max_xfer
)
3725 priv
->max_xfer_len
= max_xfer
;
3726 if (priv
->max_xfer_len
> max_msg
- SJA1105_SIZE_SPI_MSG_HEADER
)
3727 priv
->max_xfer_len
= max_msg
- SJA1105_SIZE_SPI_MSG_HEADER
;
3729 priv
->info
= of_device_get_match_data(dev
);
3731 /* Detect hardware device */
3732 rc
= sja1105_check_device_id(priv
);
3734 dev_err(dev
, "Device ID check failed: %d\n", rc
);
3738 dev_info(dev
, "Probed switch chip: %s\n", priv
->info
->name
);
3740 ds
= devm_kzalloc(dev
, sizeof(*ds
), GFP_KERNEL
);
3745 ds
->num_ports
= priv
->info
->num_ports
;
3746 ds
->ops
= &sja1105_switch_ops
;
3750 tagger_data
= &priv
->tagger_data
;
3752 mutex_init(&priv
->ptp_data
.lock
);
3753 mutex_init(&priv
->mgmt_lock
);
3755 priv
->dsa_8021q_ctx
= devm_kzalloc(dev
, sizeof(*priv
->dsa_8021q_ctx
),
3757 if (!priv
->dsa_8021q_ctx
)
3760 priv
->dsa_8021q_ctx
->ops
= &sja1105_dsa_8021q_ops
;
3761 priv
->dsa_8021q_ctx
->proto
= htons(ETH_P_8021Q
);
3762 priv
->dsa_8021q_ctx
->ds
= ds
;
3764 INIT_LIST_HEAD(&priv
->dsa_8021q_ctx
->crosschip_links
);
3765 INIT_LIST_HEAD(&priv
->bridge_vlans
);
3766 INIT_LIST_HEAD(&priv
->dsa_8021q_vlans
);
3768 sja1105_tas_setup(ds
);
3769 sja1105_flower_setup(ds
);
3771 rc
= dsa_register_switch(priv
->ds
);
3775 if (IS_ENABLED(CONFIG_NET_SCH_CBS
)) {
3776 priv
->cbs
= devm_kcalloc(dev
, priv
->info
->num_cbs_shapers
,
3777 sizeof(struct sja1105_cbs_entry
),
3781 goto out_unregister_switch
;
3785 /* Connections between dsa_port and sja1105_port */
3786 for (port
= 0; port
< ds
->num_ports
; port
++) {
3787 struct sja1105_port
*sp
= &priv
->ports
[port
];
3788 struct dsa_port
*dp
= dsa_to_port(ds
, port
);
3789 struct net_device
*slave
;
3792 if (!dsa_is_user_port(ds
, port
))
3797 sp
->data
= tagger_data
;
3799 kthread_init_work(&sp
->xmit_work
, sja1105_port_deferred_xmit
);
3800 sp
->xmit_worker
= kthread_create_worker(0, "%s_xmit",
3802 if (IS_ERR(sp
->xmit_worker
)) {
3803 rc
= PTR_ERR(sp
->xmit_worker
);
3805 "failed to create deferred xmit thread: %d\n",
3807 goto out_destroy_workers
;
3809 skb_queue_head_init(&sp
->xmit_queue
);
3810 sp
->xmit_tpid
= ETH_P_SJA1105
;
3812 for (subvlan
= 0; subvlan
< DSA_8021Q_N_SUBVLAN
; subvlan
++)
3813 sp
->subvlan_map
[subvlan
] = VLAN_N_VID
;
3818 out_destroy_workers
:
3819 while (port
-- > 0) {
3820 struct sja1105_port
*sp
= &priv
->ports
[port
];
3822 if (!dsa_is_user_port(ds
, port
))
3825 kthread_destroy_worker(sp
->xmit_worker
);
3828 out_unregister_switch
:
3829 dsa_unregister_switch(ds
);
3834 static int sja1105_remove(struct spi_device
*spi
)
3836 struct sja1105_private
*priv
= spi_get_drvdata(spi
);
3838 dsa_unregister_switch(priv
->ds
);
3842 static const struct of_device_id sja1105_dt_ids
[] = {
3843 { .compatible
= "nxp,sja1105e", .data
= &sja1105e_info
},
3844 { .compatible
= "nxp,sja1105t", .data
= &sja1105t_info
},
3845 { .compatible
= "nxp,sja1105p", .data
= &sja1105p_info
},
3846 { .compatible
= "nxp,sja1105q", .data
= &sja1105q_info
},
3847 { .compatible
= "nxp,sja1105r", .data
= &sja1105r_info
},
3848 { .compatible
= "nxp,sja1105s", .data
= &sja1105s_info
},
3849 { .compatible
= "nxp,sja1110a", .data
= &sja1110a_info
},
3850 { .compatible
= "nxp,sja1110b", .data
= &sja1110b_info
},
3851 { .compatible
= "nxp,sja1110c", .data
= &sja1110c_info
},
3852 { .compatible
= "nxp,sja1110d", .data
= &sja1110d_info
},
3855 MODULE_DEVICE_TABLE(of
, sja1105_dt_ids
);
3857 static struct spi_driver sja1105_driver
= {
3860 .owner
= THIS_MODULE
,
3861 .of_match_table
= of_match_ptr(sja1105_dt_ids
),
3863 .probe
= sja1105_probe
,
3864 .remove
= sja1105_remove
,
3867 module_spi_driver(sja1105_driver
);
3869 MODULE_AUTHOR("Vladimir Oltean <olteanv@gmail.com>");
3870 MODULE_AUTHOR("Georg Waibel <georg.waibel@sensor-technik.de>");
3871 MODULE_DESCRIPTION("SJA1105 Driver");
3872 MODULE_LICENSE("GPL v2");