]> git.proxmox.com Git - mirror_ubuntu-jammy-kernel.git/blob - drivers/net/e1000/e1000_ethtool.c
IRQ: Maintain regs pointer globally rather than passing to IRQ handlers
[mirror_ubuntu-jammy-kernel.git] / drivers / net / e1000 / e1000_ethtool.c
1 /*******************************************************************************
2
3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27 *******************************************************************************/
28
29 /* ethtool support for e1000 */
30
31 #include "e1000.h"
32
33 #include <asm/uaccess.h>
34
35 extern char e1000_driver_name[];
36 extern char e1000_driver_version[];
37
38 extern int e1000_up(struct e1000_adapter *adapter);
39 extern void e1000_down(struct e1000_adapter *adapter);
40 extern void e1000_reinit_locked(struct e1000_adapter *adapter);
41 extern void e1000_reset(struct e1000_adapter *adapter);
42 extern int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
43 extern int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
44 extern int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
45 extern void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
46 extern void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
47 extern void e1000_update_stats(struct e1000_adapter *adapter);
48
49
50 struct e1000_stats {
51 char stat_string[ETH_GSTRING_LEN];
52 int sizeof_stat;
53 int stat_offset;
54 };
55
56 #define E1000_STAT(m) sizeof(((struct e1000_adapter *)0)->m), \
57 offsetof(struct e1000_adapter, m)
58 static const struct e1000_stats e1000_gstrings_stats[] = {
59 { "rx_packets", E1000_STAT(stats.gprc) },
60 { "tx_packets", E1000_STAT(stats.gptc) },
61 { "rx_bytes", E1000_STAT(stats.gorcl) },
62 { "tx_bytes", E1000_STAT(stats.gotcl) },
63 { "rx_broadcast", E1000_STAT(stats.bprc) },
64 { "tx_broadcast", E1000_STAT(stats.bptc) },
65 { "rx_multicast", E1000_STAT(stats.mprc) },
66 { "tx_multicast", E1000_STAT(stats.mptc) },
67 { "rx_errors", E1000_STAT(stats.rxerrc) },
68 { "tx_errors", E1000_STAT(stats.txerrc) },
69 { "tx_dropped", E1000_STAT(net_stats.tx_dropped) },
70 { "multicast", E1000_STAT(stats.mprc) },
71 { "collisions", E1000_STAT(stats.colc) },
72 { "rx_length_errors", E1000_STAT(stats.rlerrc) },
73 { "rx_over_errors", E1000_STAT(net_stats.rx_over_errors) },
74 { "rx_crc_errors", E1000_STAT(stats.crcerrs) },
75 { "rx_frame_errors", E1000_STAT(net_stats.rx_frame_errors) },
76 { "rx_no_buffer_count", E1000_STAT(stats.rnbc) },
77 { "rx_missed_errors", E1000_STAT(stats.mpc) },
78 { "tx_aborted_errors", E1000_STAT(stats.ecol) },
79 { "tx_carrier_errors", E1000_STAT(stats.tncrs) },
80 { "tx_fifo_errors", E1000_STAT(net_stats.tx_fifo_errors) },
81 { "tx_heartbeat_errors", E1000_STAT(net_stats.tx_heartbeat_errors) },
82 { "tx_window_errors", E1000_STAT(stats.latecol) },
83 { "tx_abort_late_coll", E1000_STAT(stats.latecol) },
84 { "tx_deferred_ok", E1000_STAT(stats.dc) },
85 { "tx_single_coll_ok", E1000_STAT(stats.scc) },
86 { "tx_multi_coll_ok", E1000_STAT(stats.mcc) },
87 { "tx_timeout_count", E1000_STAT(tx_timeout_count) },
88 { "rx_long_length_errors", E1000_STAT(stats.roc) },
89 { "rx_short_length_errors", E1000_STAT(stats.ruc) },
90 { "rx_align_errors", E1000_STAT(stats.algnerrc) },
91 { "tx_tcp_seg_good", E1000_STAT(stats.tsctc) },
92 { "tx_tcp_seg_failed", E1000_STAT(stats.tsctfc) },
93 { "rx_flow_control_xon", E1000_STAT(stats.xonrxc) },
94 { "rx_flow_control_xoff", E1000_STAT(stats.xoffrxc) },
95 { "tx_flow_control_xon", E1000_STAT(stats.xontxc) },
96 { "tx_flow_control_xoff", E1000_STAT(stats.xofftxc) },
97 { "rx_long_byte_count", E1000_STAT(stats.gorcl) },
98 { "rx_csum_offload_good", E1000_STAT(hw_csum_good) },
99 { "rx_csum_offload_errors", E1000_STAT(hw_csum_err) },
100 { "rx_header_split", E1000_STAT(rx_hdr_split) },
101 { "alloc_rx_buff_failed", E1000_STAT(alloc_rx_buff_failed) },
102 };
103
104 #define E1000_QUEUE_STATS_LEN 0
105 #define E1000_GLOBAL_STATS_LEN \
106 sizeof(e1000_gstrings_stats) / sizeof(struct e1000_stats)
107 #define E1000_STATS_LEN (E1000_GLOBAL_STATS_LEN + E1000_QUEUE_STATS_LEN)
108 static const char e1000_gstrings_test[][ETH_GSTRING_LEN] = {
109 "Register test (offline)", "Eeprom test (offline)",
110 "Interrupt test (offline)", "Loopback test (offline)",
111 "Link test (on/offline)"
112 };
113 #define E1000_TEST_LEN sizeof(e1000_gstrings_test) / ETH_GSTRING_LEN
114
115 static int
116 e1000_get_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
117 {
118 struct e1000_adapter *adapter = netdev_priv(netdev);
119 struct e1000_hw *hw = &adapter->hw;
120
121 if (hw->media_type == e1000_media_type_copper) {
122
123 ecmd->supported = (SUPPORTED_10baseT_Half |
124 SUPPORTED_10baseT_Full |
125 SUPPORTED_100baseT_Half |
126 SUPPORTED_100baseT_Full |
127 SUPPORTED_1000baseT_Full|
128 SUPPORTED_Autoneg |
129 SUPPORTED_TP);
130 if (hw->phy_type == e1000_phy_ife)
131 ecmd->supported &= ~SUPPORTED_1000baseT_Full;
132 ecmd->advertising = ADVERTISED_TP;
133
134 if (hw->autoneg == 1) {
135 ecmd->advertising |= ADVERTISED_Autoneg;
136
137 /* the e1000 autoneg seems to match ethtool nicely */
138
139 ecmd->advertising |= hw->autoneg_advertised;
140 }
141
142 ecmd->port = PORT_TP;
143 ecmd->phy_address = hw->phy_addr;
144
145 if (hw->mac_type == e1000_82543)
146 ecmd->transceiver = XCVR_EXTERNAL;
147 else
148 ecmd->transceiver = XCVR_INTERNAL;
149
150 } else {
151 ecmd->supported = (SUPPORTED_1000baseT_Full |
152 SUPPORTED_FIBRE |
153 SUPPORTED_Autoneg);
154
155 ecmd->advertising = (ADVERTISED_1000baseT_Full |
156 ADVERTISED_FIBRE |
157 ADVERTISED_Autoneg);
158
159 ecmd->port = PORT_FIBRE;
160
161 if (hw->mac_type >= e1000_82545)
162 ecmd->transceiver = XCVR_INTERNAL;
163 else
164 ecmd->transceiver = XCVR_EXTERNAL;
165 }
166
167 if (netif_carrier_ok(adapter->netdev)) {
168
169 e1000_get_speed_and_duplex(hw, &adapter->link_speed,
170 &adapter->link_duplex);
171 ecmd->speed = adapter->link_speed;
172
173 /* unfortunatly FULL_DUPLEX != DUPLEX_FULL
174 * and HALF_DUPLEX != DUPLEX_HALF */
175
176 if (adapter->link_duplex == FULL_DUPLEX)
177 ecmd->duplex = DUPLEX_FULL;
178 else
179 ecmd->duplex = DUPLEX_HALF;
180 } else {
181 ecmd->speed = -1;
182 ecmd->duplex = -1;
183 }
184
185 ecmd->autoneg = ((hw->media_type == e1000_media_type_fiber) ||
186 hw->autoneg) ? AUTONEG_ENABLE : AUTONEG_DISABLE;
187 return 0;
188 }
189
190 static int
191 e1000_set_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
192 {
193 struct e1000_adapter *adapter = netdev_priv(netdev);
194 struct e1000_hw *hw = &adapter->hw;
195
196 /* When SoL/IDER sessions are active, autoneg/speed/duplex
197 * cannot be changed */
198 if (e1000_check_phy_reset_block(hw)) {
199 DPRINTK(DRV, ERR, "Cannot change link characteristics "
200 "when SoL/IDER is active.\n");
201 return -EINVAL;
202 }
203
204 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
205 msleep(1);
206
207 if (ecmd->autoneg == AUTONEG_ENABLE) {
208 hw->autoneg = 1;
209 if (hw->media_type == e1000_media_type_fiber)
210 hw->autoneg_advertised = ADVERTISED_1000baseT_Full |
211 ADVERTISED_FIBRE |
212 ADVERTISED_Autoneg;
213 else
214 hw->autoneg_advertised = ecmd->advertising |
215 ADVERTISED_TP |
216 ADVERTISED_Autoneg;
217 ecmd->advertising = hw->autoneg_advertised;
218 } else
219 if (e1000_set_spd_dplx(adapter, ecmd->speed + ecmd->duplex)) {
220 clear_bit(__E1000_RESETTING, &adapter->flags);
221 return -EINVAL;
222 }
223
224 /* reset the link */
225
226 if (netif_running(adapter->netdev)) {
227 e1000_down(adapter);
228 e1000_up(adapter);
229 } else
230 e1000_reset(adapter);
231
232 clear_bit(__E1000_RESETTING, &adapter->flags);
233 return 0;
234 }
235
236 static void
237 e1000_get_pauseparam(struct net_device *netdev,
238 struct ethtool_pauseparam *pause)
239 {
240 struct e1000_adapter *adapter = netdev_priv(netdev);
241 struct e1000_hw *hw = &adapter->hw;
242
243 pause->autoneg =
244 (adapter->fc_autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE);
245
246 if (hw->fc == E1000_FC_RX_PAUSE)
247 pause->rx_pause = 1;
248 else if (hw->fc == E1000_FC_TX_PAUSE)
249 pause->tx_pause = 1;
250 else if (hw->fc == E1000_FC_FULL) {
251 pause->rx_pause = 1;
252 pause->tx_pause = 1;
253 }
254 }
255
256 static int
257 e1000_set_pauseparam(struct net_device *netdev,
258 struct ethtool_pauseparam *pause)
259 {
260 struct e1000_adapter *adapter = netdev_priv(netdev);
261 struct e1000_hw *hw = &adapter->hw;
262 int retval = 0;
263
264 adapter->fc_autoneg = pause->autoneg;
265
266 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
267 msleep(1);
268
269 if (pause->rx_pause && pause->tx_pause)
270 hw->fc = E1000_FC_FULL;
271 else if (pause->rx_pause && !pause->tx_pause)
272 hw->fc = E1000_FC_RX_PAUSE;
273 else if (!pause->rx_pause && pause->tx_pause)
274 hw->fc = E1000_FC_TX_PAUSE;
275 else if (!pause->rx_pause && !pause->tx_pause)
276 hw->fc = E1000_FC_NONE;
277
278 hw->original_fc = hw->fc;
279
280 if (adapter->fc_autoneg == AUTONEG_ENABLE) {
281 if (netif_running(adapter->netdev)) {
282 e1000_down(adapter);
283 e1000_up(adapter);
284 } else
285 e1000_reset(adapter);
286 } else
287 retval = ((hw->media_type == e1000_media_type_fiber) ?
288 e1000_setup_link(hw) : e1000_force_mac_fc(hw));
289
290 clear_bit(__E1000_RESETTING, &adapter->flags);
291 return retval;
292 }
293
294 static uint32_t
295 e1000_get_rx_csum(struct net_device *netdev)
296 {
297 struct e1000_adapter *adapter = netdev_priv(netdev);
298 return adapter->rx_csum;
299 }
300
301 static int
302 e1000_set_rx_csum(struct net_device *netdev, uint32_t data)
303 {
304 struct e1000_adapter *adapter = netdev_priv(netdev);
305 adapter->rx_csum = data;
306
307 if (netif_running(netdev))
308 e1000_reinit_locked(adapter);
309 else
310 e1000_reset(adapter);
311 return 0;
312 }
313
314 static uint32_t
315 e1000_get_tx_csum(struct net_device *netdev)
316 {
317 return (netdev->features & NETIF_F_HW_CSUM) != 0;
318 }
319
320 static int
321 e1000_set_tx_csum(struct net_device *netdev, uint32_t data)
322 {
323 struct e1000_adapter *adapter = netdev_priv(netdev);
324
325 if (adapter->hw.mac_type < e1000_82543) {
326 if (!data)
327 return -EINVAL;
328 return 0;
329 }
330
331 if (data)
332 netdev->features |= NETIF_F_HW_CSUM;
333 else
334 netdev->features &= ~NETIF_F_HW_CSUM;
335
336 return 0;
337 }
338
339 #ifdef NETIF_F_TSO
340 static int
341 e1000_set_tso(struct net_device *netdev, uint32_t data)
342 {
343 struct e1000_adapter *adapter = netdev_priv(netdev);
344 if ((adapter->hw.mac_type < e1000_82544) ||
345 (adapter->hw.mac_type == e1000_82547))
346 return data ? -EINVAL : 0;
347
348 if (data)
349 netdev->features |= NETIF_F_TSO;
350 else
351 netdev->features &= ~NETIF_F_TSO;
352
353 DPRINTK(PROBE, INFO, "TSO is %s\n", data ? "Enabled" : "Disabled");
354 adapter->tso_force = TRUE;
355 return 0;
356 }
357 #endif /* NETIF_F_TSO */
358
359 static uint32_t
360 e1000_get_msglevel(struct net_device *netdev)
361 {
362 struct e1000_adapter *adapter = netdev_priv(netdev);
363 return adapter->msg_enable;
364 }
365
366 static void
367 e1000_set_msglevel(struct net_device *netdev, uint32_t data)
368 {
369 struct e1000_adapter *adapter = netdev_priv(netdev);
370 adapter->msg_enable = data;
371 }
372
373 static int
374 e1000_get_regs_len(struct net_device *netdev)
375 {
376 #define E1000_REGS_LEN 32
377 return E1000_REGS_LEN * sizeof(uint32_t);
378 }
379
380 static void
381 e1000_get_regs(struct net_device *netdev,
382 struct ethtool_regs *regs, void *p)
383 {
384 struct e1000_adapter *adapter = netdev_priv(netdev);
385 struct e1000_hw *hw = &adapter->hw;
386 uint32_t *regs_buff = p;
387 uint16_t phy_data;
388
389 memset(p, 0, E1000_REGS_LEN * sizeof(uint32_t));
390
391 regs->version = (1 << 24) | (hw->revision_id << 16) | hw->device_id;
392
393 regs_buff[0] = E1000_READ_REG(hw, CTRL);
394 regs_buff[1] = E1000_READ_REG(hw, STATUS);
395
396 regs_buff[2] = E1000_READ_REG(hw, RCTL);
397 regs_buff[3] = E1000_READ_REG(hw, RDLEN);
398 regs_buff[4] = E1000_READ_REG(hw, RDH);
399 regs_buff[5] = E1000_READ_REG(hw, RDT);
400 regs_buff[6] = E1000_READ_REG(hw, RDTR);
401
402 regs_buff[7] = E1000_READ_REG(hw, TCTL);
403 regs_buff[8] = E1000_READ_REG(hw, TDLEN);
404 regs_buff[9] = E1000_READ_REG(hw, TDH);
405 regs_buff[10] = E1000_READ_REG(hw, TDT);
406 regs_buff[11] = E1000_READ_REG(hw, TIDV);
407
408 regs_buff[12] = adapter->hw.phy_type; /* PHY type (IGP=1, M88=0) */
409 if (hw->phy_type == e1000_phy_igp) {
410 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
411 IGP01E1000_PHY_AGC_A);
412 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_A &
413 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
414 regs_buff[13] = (uint32_t)phy_data; /* cable length */
415 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
416 IGP01E1000_PHY_AGC_B);
417 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_B &
418 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
419 regs_buff[14] = (uint32_t)phy_data; /* cable length */
420 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
421 IGP01E1000_PHY_AGC_C);
422 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_C &
423 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
424 regs_buff[15] = (uint32_t)phy_data; /* cable length */
425 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
426 IGP01E1000_PHY_AGC_D);
427 e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_D &
428 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
429 regs_buff[16] = (uint32_t)phy_data; /* cable length */
430 regs_buff[17] = 0; /* extended 10bt distance (not needed) */
431 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 0x0);
432 e1000_read_phy_reg(hw, IGP01E1000_PHY_PORT_STATUS &
433 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
434 regs_buff[18] = (uint32_t)phy_data; /* cable polarity */
435 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
436 IGP01E1000_PHY_PCS_INIT_REG);
437 e1000_read_phy_reg(hw, IGP01E1000_PHY_PCS_INIT_REG &
438 IGP01E1000_PHY_PAGE_SELECT, &phy_data);
439 regs_buff[19] = (uint32_t)phy_data; /* cable polarity */
440 regs_buff[20] = 0; /* polarity correction enabled (always) */
441 regs_buff[22] = 0; /* phy receive errors (unavailable) */
442 regs_buff[23] = regs_buff[18]; /* mdix mode */
443 e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 0x0);
444 } else {
445 e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_STATUS, &phy_data);
446 regs_buff[13] = (uint32_t)phy_data; /* cable length */
447 regs_buff[14] = 0; /* Dummy (to align w/ IGP phy reg dump) */
448 regs_buff[15] = 0; /* Dummy (to align w/ IGP phy reg dump) */
449 regs_buff[16] = 0; /* Dummy (to align w/ IGP phy reg dump) */
450 e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
451 regs_buff[17] = (uint32_t)phy_data; /* extended 10bt distance */
452 regs_buff[18] = regs_buff[13]; /* cable polarity */
453 regs_buff[19] = 0; /* Dummy (to align w/ IGP phy reg dump) */
454 regs_buff[20] = regs_buff[17]; /* polarity correction */
455 /* phy receive errors */
456 regs_buff[22] = adapter->phy_stats.receive_errors;
457 regs_buff[23] = regs_buff[13]; /* mdix mode */
458 }
459 regs_buff[21] = adapter->phy_stats.idle_errors; /* phy idle errors */
460 e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_data);
461 regs_buff[24] = (uint32_t)phy_data; /* phy local receiver status */
462 regs_buff[25] = regs_buff[24]; /* phy remote receiver status */
463 if (hw->mac_type >= e1000_82540 &&
464 hw->media_type == e1000_media_type_copper) {
465 regs_buff[26] = E1000_READ_REG(hw, MANC);
466 }
467 }
468
469 static int
470 e1000_get_eeprom_len(struct net_device *netdev)
471 {
472 struct e1000_adapter *adapter = netdev_priv(netdev);
473 return adapter->hw.eeprom.word_size * 2;
474 }
475
476 static int
477 e1000_get_eeprom(struct net_device *netdev,
478 struct ethtool_eeprom *eeprom, uint8_t *bytes)
479 {
480 struct e1000_adapter *adapter = netdev_priv(netdev);
481 struct e1000_hw *hw = &adapter->hw;
482 uint16_t *eeprom_buff;
483 int first_word, last_word;
484 int ret_val = 0;
485 uint16_t i;
486
487 if (eeprom->len == 0)
488 return -EINVAL;
489
490 eeprom->magic = hw->vendor_id | (hw->device_id << 16);
491
492 first_word = eeprom->offset >> 1;
493 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
494
495 eeprom_buff = kmalloc(sizeof(uint16_t) *
496 (last_word - first_word + 1), GFP_KERNEL);
497 if (!eeprom_buff)
498 return -ENOMEM;
499
500 if (hw->eeprom.type == e1000_eeprom_spi)
501 ret_val = e1000_read_eeprom(hw, first_word,
502 last_word - first_word + 1,
503 eeprom_buff);
504 else {
505 for (i = 0; i < last_word - first_word + 1; i++)
506 if ((ret_val = e1000_read_eeprom(hw, first_word + i, 1,
507 &eeprom_buff[i])))
508 break;
509 }
510
511 /* Device's eeprom is always little-endian, word addressable */
512 for (i = 0; i < last_word - first_word + 1; i++)
513 le16_to_cpus(&eeprom_buff[i]);
514
515 memcpy(bytes, (uint8_t *)eeprom_buff + (eeprom->offset & 1),
516 eeprom->len);
517 kfree(eeprom_buff);
518
519 return ret_val;
520 }
521
522 static int
523 e1000_set_eeprom(struct net_device *netdev,
524 struct ethtool_eeprom *eeprom, uint8_t *bytes)
525 {
526 struct e1000_adapter *adapter = netdev_priv(netdev);
527 struct e1000_hw *hw = &adapter->hw;
528 uint16_t *eeprom_buff;
529 void *ptr;
530 int max_len, first_word, last_word, ret_val = 0;
531 uint16_t i;
532
533 if (eeprom->len == 0)
534 return -EOPNOTSUPP;
535
536 if (eeprom->magic != (hw->vendor_id | (hw->device_id << 16)))
537 return -EFAULT;
538
539 max_len = hw->eeprom.word_size * 2;
540
541 first_word = eeprom->offset >> 1;
542 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
543 eeprom_buff = kmalloc(max_len, GFP_KERNEL);
544 if (!eeprom_buff)
545 return -ENOMEM;
546
547 ptr = (void *)eeprom_buff;
548
549 if (eeprom->offset & 1) {
550 /* need read/modify/write of first changed EEPROM word */
551 /* only the second byte of the word is being modified */
552 ret_val = e1000_read_eeprom(hw, first_word, 1,
553 &eeprom_buff[0]);
554 ptr++;
555 }
556 if (((eeprom->offset + eeprom->len) & 1) && (ret_val == 0)) {
557 /* need read/modify/write of last changed EEPROM word */
558 /* only the first byte of the word is being modified */
559 ret_val = e1000_read_eeprom(hw, last_word, 1,
560 &eeprom_buff[last_word - first_word]);
561 }
562
563 /* Device's eeprom is always little-endian, word addressable */
564 for (i = 0; i < last_word - first_word + 1; i++)
565 le16_to_cpus(&eeprom_buff[i]);
566
567 memcpy(ptr, bytes, eeprom->len);
568
569 for (i = 0; i < last_word - first_word + 1; i++)
570 eeprom_buff[i] = cpu_to_le16(eeprom_buff[i]);
571
572 ret_val = e1000_write_eeprom(hw, first_word,
573 last_word - first_word + 1, eeprom_buff);
574
575 /* Update the checksum over the first part of the EEPROM if needed
576 * and flush shadow RAM for 82573 conrollers */
577 if ((ret_val == 0) && ((first_word <= EEPROM_CHECKSUM_REG) ||
578 (hw->mac_type == e1000_82573)))
579 e1000_update_eeprom_checksum(hw);
580
581 kfree(eeprom_buff);
582 return ret_val;
583 }
584
585 static void
586 e1000_get_drvinfo(struct net_device *netdev,
587 struct ethtool_drvinfo *drvinfo)
588 {
589 struct e1000_adapter *adapter = netdev_priv(netdev);
590 char firmware_version[32];
591 uint16_t eeprom_data;
592
593 strncpy(drvinfo->driver, e1000_driver_name, 32);
594 strncpy(drvinfo->version, e1000_driver_version, 32);
595
596 /* EEPROM image version # is reported as firmware version # for
597 * 8257{1|2|3} controllers */
598 e1000_read_eeprom(&adapter->hw, 5, 1, &eeprom_data);
599 switch (adapter->hw.mac_type) {
600 case e1000_82571:
601 case e1000_82572:
602 case e1000_82573:
603 case e1000_80003es2lan:
604 case e1000_ich8lan:
605 sprintf(firmware_version, "%d.%d-%d",
606 (eeprom_data & 0xF000) >> 12,
607 (eeprom_data & 0x0FF0) >> 4,
608 eeprom_data & 0x000F);
609 break;
610 default:
611 sprintf(firmware_version, "N/A");
612 }
613
614 strncpy(drvinfo->fw_version, firmware_version, 32);
615 strncpy(drvinfo->bus_info, pci_name(adapter->pdev), 32);
616 drvinfo->n_stats = E1000_STATS_LEN;
617 drvinfo->testinfo_len = E1000_TEST_LEN;
618 drvinfo->regdump_len = e1000_get_regs_len(netdev);
619 drvinfo->eedump_len = e1000_get_eeprom_len(netdev);
620 }
621
622 static void
623 e1000_get_ringparam(struct net_device *netdev,
624 struct ethtool_ringparam *ring)
625 {
626 struct e1000_adapter *adapter = netdev_priv(netdev);
627 e1000_mac_type mac_type = adapter->hw.mac_type;
628 struct e1000_tx_ring *txdr = adapter->tx_ring;
629 struct e1000_rx_ring *rxdr = adapter->rx_ring;
630
631 ring->rx_max_pending = (mac_type < e1000_82544) ? E1000_MAX_RXD :
632 E1000_MAX_82544_RXD;
633 ring->tx_max_pending = (mac_type < e1000_82544) ? E1000_MAX_TXD :
634 E1000_MAX_82544_TXD;
635 ring->rx_mini_max_pending = 0;
636 ring->rx_jumbo_max_pending = 0;
637 ring->rx_pending = rxdr->count;
638 ring->tx_pending = txdr->count;
639 ring->rx_mini_pending = 0;
640 ring->rx_jumbo_pending = 0;
641 }
642
643 static int
644 e1000_set_ringparam(struct net_device *netdev,
645 struct ethtool_ringparam *ring)
646 {
647 struct e1000_adapter *adapter = netdev_priv(netdev);
648 e1000_mac_type mac_type = adapter->hw.mac_type;
649 struct e1000_tx_ring *txdr, *tx_old;
650 struct e1000_rx_ring *rxdr, *rx_old;
651 int i, err, tx_ring_size, rx_ring_size;
652
653 if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
654 return -EINVAL;
655
656 tx_ring_size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues;
657 rx_ring_size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues;
658
659 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
660 msleep(1);
661
662 if (netif_running(adapter->netdev))
663 e1000_down(adapter);
664
665 tx_old = adapter->tx_ring;
666 rx_old = adapter->rx_ring;
667
668 err = -ENOMEM;
669 txdr = kzalloc(tx_ring_size, GFP_KERNEL);
670 if (!txdr)
671 goto err_alloc_tx;
672
673 rxdr = kzalloc(rx_ring_size, GFP_KERNEL);
674 if (!rxdr)
675 goto err_alloc_rx;
676
677 adapter->tx_ring = txdr;
678 adapter->rx_ring = rxdr;
679
680 rxdr->count = max(ring->rx_pending,(uint32_t)E1000_MIN_RXD);
681 rxdr->count = min(rxdr->count,(uint32_t)(mac_type < e1000_82544 ?
682 E1000_MAX_RXD : E1000_MAX_82544_RXD));
683 E1000_ROUNDUP(rxdr->count, REQ_RX_DESCRIPTOR_MULTIPLE);
684
685 txdr->count = max(ring->tx_pending,(uint32_t)E1000_MIN_TXD);
686 txdr->count = min(txdr->count,(uint32_t)(mac_type < e1000_82544 ?
687 E1000_MAX_TXD : E1000_MAX_82544_TXD));
688 E1000_ROUNDUP(txdr->count, REQ_TX_DESCRIPTOR_MULTIPLE);
689
690 for (i = 0; i < adapter->num_tx_queues; i++)
691 txdr[i].count = txdr->count;
692 for (i = 0; i < adapter->num_rx_queues; i++)
693 rxdr[i].count = rxdr->count;
694
695 if (netif_running(adapter->netdev)) {
696 /* Try to get new resources before deleting old */
697 if ((err = e1000_setup_all_rx_resources(adapter)))
698 goto err_setup_rx;
699 if ((err = e1000_setup_all_tx_resources(adapter)))
700 goto err_setup_tx;
701
702 /* save the new, restore the old in order to free it,
703 * then restore the new back again */
704
705 adapter->rx_ring = rx_old;
706 adapter->tx_ring = tx_old;
707 e1000_free_all_rx_resources(adapter);
708 e1000_free_all_tx_resources(adapter);
709 kfree(tx_old);
710 kfree(rx_old);
711 adapter->rx_ring = rxdr;
712 adapter->tx_ring = txdr;
713 if ((err = e1000_up(adapter)))
714 goto err_setup;
715 }
716
717 clear_bit(__E1000_RESETTING, &adapter->flags);
718 return 0;
719 err_setup_tx:
720 e1000_free_all_rx_resources(adapter);
721 err_setup_rx:
722 adapter->rx_ring = rx_old;
723 adapter->tx_ring = tx_old;
724 kfree(rxdr);
725 err_alloc_rx:
726 kfree(txdr);
727 err_alloc_tx:
728 e1000_up(adapter);
729 err_setup:
730 clear_bit(__E1000_RESETTING, &adapter->flags);
731 return err;
732 }
733
734 #define REG_PATTERN_TEST(R, M, W) \
735 { \
736 uint32_t pat, value; \
737 uint32_t test[] = \
738 {0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF}; \
739 for (pat = 0; pat < sizeof(test)/sizeof(test[0]); pat++) { \
740 E1000_WRITE_REG(&adapter->hw, R, (test[pat] & W)); \
741 value = E1000_READ_REG(&adapter->hw, R); \
742 if (value != (test[pat] & W & M)) { \
743 DPRINTK(DRV, ERR, "pattern test reg %04X failed: got " \
744 "0x%08X expected 0x%08X\n", \
745 E1000_##R, value, (test[pat] & W & M)); \
746 *data = (adapter->hw.mac_type < e1000_82543) ? \
747 E1000_82542_##R : E1000_##R; \
748 return 1; \
749 } \
750 } \
751 }
752
753 #define REG_SET_AND_CHECK(R, M, W) \
754 { \
755 uint32_t value; \
756 E1000_WRITE_REG(&adapter->hw, R, W & M); \
757 value = E1000_READ_REG(&adapter->hw, R); \
758 if ((W & M) != (value & M)) { \
759 DPRINTK(DRV, ERR, "set/check reg %04X test failed: got 0x%08X "\
760 "expected 0x%08X\n", E1000_##R, (value & M), (W & M)); \
761 *data = (adapter->hw.mac_type < e1000_82543) ? \
762 E1000_82542_##R : E1000_##R; \
763 return 1; \
764 } \
765 }
766
767 static int
768 e1000_reg_test(struct e1000_adapter *adapter, uint64_t *data)
769 {
770 uint32_t value, before, after;
771 uint32_t i, toggle;
772
773 /* The status register is Read Only, so a write should fail.
774 * Some bits that get toggled are ignored.
775 */
776 switch (adapter->hw.mac_type) {
777 /* there are several bits on newer hardware that are r/w */
778 case e1000_82571:
779 case e1000_82572:
780 case e1000_80003es2lan:
781 toggle = 0x7FFFF3FF;
782 break;
783 case e1000_82573:
784 case e1000_ich8lan:
785 toggle = 0x7FFFF033;
786 break;
787 default:
788 toggle = 0xFFFFF833;
789 break;
790 }
791
792 before = E1000_READ_REG(&adapter->hw, STATUS);
793 value = (E1000_READ_REG(&adapter->hw, STATUS) & toggle);
794 E1000_WRITE_REG(&adapter->hw, STATUS, toggle);
795 after = E1000_READ_REG(&adapter->hw, STATUS) & toggle;
796 if (value != after) {
797 DPRINTK(DRV, ERR, "failed STATUS register test got: "
798 "0x%08X expected: 0x%08X\n", after, value);
799 *data = 1;
800 return 1;
801 }
802 /* restore previous status */
803 E1000_WRITE_REG(&adapter->hw, STATUS, before);
804 if (adapter->hw.mac_type != e1000_ich8lan) {
805 REG_PATTERN_TEST(FCAL, 0xFFFFFFFF, 0xFFFFFFFF);
806 REG_PATTERN_TEST(FCAH, 0x0000FFFF, 0xFFFFFFFF);
807 REG_PATTERN_TEST(FCT, 0x0000FFFF, 0xFFFFFFFF);
808 REG_PATTERN_TEST(VET, 0x0000FFFF, 0xFFFFFFFF);
809 }
810 REG_PATTERN_TEST(RDTR, 0x0000FFFF, 0xFFFFFFFF);
811 REG_PATTERN_TEST(RDBAH, 0xFFFFFFFF, 0xFFFFFFFF);
812 REG_PATTERN_TEST(RDLEN, 0x000FFF80, 0x000FFFFF);
813 REG_PATTERN_TEST(RDH, 0x0000FFFF, 0x0000FFFF);
814 REG_PATTERN_TEST(RDT, 0x0000FFFF, 0x0000FFFF);
815 REG_PATTERN_TEST(FCRTH, 0x0000FFF8, 0x0000FFF8);
816 REG_PATTERN_TEST(FCTTV, 0x0000FFFF, 0x0000FFFF);
817 REG_PATTERN_TEST(TIPG, 0x3FFFFFFF, 0x3FFFFFFF);
818 REG_PATTERN_TEST(TDBAH, 0xFFFFFFFF, 0xFFFFFFFF);
819 REG_PATTERN_TEST(TDLEN, 0x000FFF80, 0x000FFFFF);
820
821 REG_SET_AND_CHECK(RCTL, 0xFFFFFFFF, 0x00000000);
822 before = (adapter->hw.mac_type == e1000_ich8lan ?
823 0x06C3B33E : 0x06DFB3FE);
824 REG_SET_AND_CHECK(RCTL, before, 0x003FFFFB);
825 REG_SET_AND_CHECK(TCTL, 0xFFFFFFFF, 0x00000000);
826
827 if (adapter->hw.mac_type >= e1000_82543) {
828
829 REG_SET_AND_CHECK(RCTL, before, 0xFFFFFFFF);
830 REG_PATTERN_TEST(RDBAL, 0xFFFFFFF0, 0xFFFFFFFF);
831 if (adapter->hw.mac_type != e1000_ich8lan)
832 REG_PATTERN_TEST(TXCW, 0xC000FFFF, 0x0000FFFF);
833 REG_PATTERN_TEST(TDBAL, 0xFFFFFFF0, 0xFFFFFFFF);
834 REG_PATTERN_TEST(TIDV, 0x0000FFFF, 0x0000FFFF);
835 value = (adapter->hw.mac_type == e1000_ich8lan ?
836 E1000_RAR_ENTRIES_ICH8LAN : E1000_RAR_ENTRIES);
837 for (i = 0; i < value; i++) {
838 REG_PATTERN_TEST(RA + (((i << 1) + 1) << 2), 0x8003FFFF,
839 0xFFFFFFFF);
840 }
841
842 } else {
843
844 REG_SET_AND_CHECK(RCTL, 0xFFFFFFFF, 0x01FFFFFF);
845 REG_PATTERN_TEST(RDBAL, 0xFFFFF000, 0xFFFFFFFF);
846 REG_PATTERN_TEST(TXCW, 0x0000FFFF, 0x0000FFFF);
847 REG_PATTERN_TEST(TDBAL, 0xFFFFF000, 0xFFFFFFFF);
848
849 }
850
851 value = (adapter->hw.mac_type == e1000_ich8lan ?
852 E1000_MC_TBL_SIZE_ICH8LAN : E1000_MC_TBL_SIZE);
853 for (i = 0; i < value; i++)
854 REG_PATTERN_TEST(MTA + (i << 2), 0xFFFFFFFF, 0xFFFFFFFF);
855
856 *data = 0;
857 return 0;
858 }
859
860 static int
861 e1000_eeprom_test(struct e1000_adapter *adapter, uint64_t *data)
862 {
863 uint16_t temp;
864 uint16_t checksum = 0;
865 uint16_t i;
866
867 *data = 0;
868 /* Read and add up the contents of the EEPROM */
869 for (i = 0; i < (EEPROM_CHECKSUM_REG + 1); i++) {
870 if ((e1000_read_eeprom(&adapter->hw, i, 1, &temp)) < 0) {
871 *data = 1;
872 break;
873 }
874 checksum += temp;
875 }
876
877 /* If Checksum is not Correct return error else test passed */
878 if ((checksum != (uint16_t) EEPROM_SUM) && !(*data))
879 *data = 2;
880
881 return *data;
882 }
883
884 static irqreturn_t
885 e1000_test_intr(int irq,
886 void *data)
887 {
888 struct net_device *netdev = (struct net_device *) data;
889 struct e1000_adapter *adapter = netdev_priv(netdev);
890
891 adapter->test_icr |= E1000_READ_REG(&adapter->hw, ICR);
892
893 return IRQ_HANDLED;
894 }
895
896 static int
897 e1000_intr_test(struct e1000_adapter *adapter, uint64_t *data)
898 {
899 struct net_device *netdev = adapter->netdev;
900 uint32_t mask, i=0, shared_int = TRUE;
901 uint32_t irq = adapter->pdev->irq;
902
903 *data = 0;
904
905 /* NOTE: we don't test MSI interrupts here, yet */
906 /* Hook up test interrupt handler just for this test */
907 if (!request_irq(irq, &e1000_test_intr, IRQF_PROBE_SHARED,
908 netdev->name, netdev))
909 shared_int = FALSE;
910 else if (request_irq(irq, &e1000_test_intr, IRQF_SHARED,
911 netdev->name, netdev)) {
912 *data = 1;
913 return -1;
914 }
915 DPRINTK(HW, INFO, "testing %s interrupt\n",
916 (shared_int ? "shared" : "unshared"));
917
918 /* Disable all the interrupts */
919 E1000_WRITE_REG(&adapter->hw, IMC, 0xFFFFFFFF);
920 msleep(10);
921
922 /* Test each interrupt */
923 for (; i < 10; i++) {
924
925 if (adapter->hw.mac_type == e1000_ich8lan && i == 8)
926 continue;
927 /* Interrupt to test */
928 mask = 1 << i;
929
930 if (!shared_int) {
931 /* Disable the interrupt to be reported in
932 * the cause register and then force the same
933 * interrupt and see if one gets posted. If
934 * an interrupt was posted to the bus, the
935 * test failed.
936 */
937 adapter->test_icr = 0;
938 E1000_WRITE_REG(&adapter->hw, IMC, mask);
939 E1000_WRITE_REG(&adapter->hw, ICS, mask);
940 msleep(10);
941
942 if (adapter->test_icr & mask) {
943 *data = 3;
944 break;
945 }
946 }
947
948 /* Enable the interrupt to be reported in
949 * the cause register and then force the same
950 * interrupt and see if one gets posted. If
951 * an interrupt was not posted to the bus, the
952 * test failed.
953 */
954 adapter->test_icr = 0;
955 E1000_WRITE_REG(&adapter->hw, IMS, mask);
956 E1000_WRITE_REG(&adapter->hw, ICS, mask);
957 msleep(10);
958
959 if (!(adapter->test_icr & mask)) {
960 *data = 4;
961 break;
962 }
963
964 if (!shared_int) {
965 /* Disable the other interrupts to be reported in
966 * the cause register and then force the other
967 * interrupts and see if any get posted. If
968 * an interrupt was posted to the bus, the
969 * test failed.
970 */
971 adapter->test_icr = 0;
972 E1000_WRITE_REG(&adapter->hw, IMC, ~mask & 0x00007FFF);
973 E1000_WRITE_REG(&adapter->hw, ICS, ~mask & 0x00007FFF);
974 msleep(10);
975
976 if (adapter->test_icr) {
977 *data = 5;
978 break;
979 }
980 }
981 }
982
983 /* Disable all the interrupts */
984 E1000_WRITE_REG(&adapter->hw, IMC, 0xFFFFFFFF);
985 msleep(10);
986
987 /* Unhook test interrupt handler */
988 free_irq(irq, netdev);
989
990 return *data;
991 }
992
993 static void
994 e1000_free_desc_rings(struct e1000_adapter *adapter)
995 {
996 struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
997 struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
998 struct pci_dev *pdev = adapter->pdev;
999 int i;
1000
1001 if (txdr->desc && txdr->buffer_info) {
1002 for (i = 0; i < txdr->count; i++) {
1003 if (txdr->buffer_info[i].dma)
1004 pci_unmap_single(pdev, txdr->buffer_info[i].dma,
1005 txdr->buffer_info[i].length,
1006 PCI_DMA_TODEVICE);
1007 if (txdr->buffer_info[i].skb)
1008 dev_kfree_skb(txdr->buffer_info[i].skb);
1009 }
1010 }
1011
1012 if (rxdr->desc && rxdr->buffer_info) {
1013 for (i = 0; i < rxdr->count; i++) {
1014 if (rxdr->buffer_info[i].dma)
1015 pci_unmap_single(pdev, rxdr->buffer_info[i].dma,
1016 rxdr->buffer_info[i].length,
1017 PCI_DMA_FROMDEVICE);
1018 if (rxdr->buffer_info[i].skb)
1019 dev_kfree_skb(rxdr->buffer_info[i].skb);
1020 }
1021 }
1022
1023 if (txdr->desc) {
1024 pci_free_consistent(pdev, txdr->size, txdr->desc, txdr->dma);
1025 txdr->desc = NULL;
1026 }
1027 if (rxdr->desc) {
1028 pci_free_consistent(pdev, rxdr->size, rxdr->desc, rxdr->dma);
1029 rxdr->desc = NULL;
1030 }
1031
1032 kfree(txdr->buffer_info);
1033 txdr->buffer_info = NULL;
1034 kfree(rxdr->buffer_info);
1035 rxdr->buffer_info = NULL;
1036
1037 return;
1038 }
1039
1040 static int
1041 e1000_setup_desc_rings(struct e1000_adapter *adapter)
1042 {
1043 struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
1044 struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
1045 struct pci_dev *pdev = adapter->pdev;
1046 uint32_t rctl;
1047 int size, i, ret_val;
1048
1049 /* Setup Tx descriptor ring and Tx buffers */
1050
1051 if (!txdr->count)
1052 txdr->count = E1000_DEFAULT_TXD;
1053
1054 size = txdr->count * sizeof(struct e1000_buffer);
1055 if (!(txdr->buffer_info = kmalloc(size, GFP_KERNEL))) {
1056 ret_val = 1;
1057 goto err_nomem;
1058 }
1059 memset(txdr->buffer_info, 0, size);
1060
1061 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
1062 E1000_ROUNDUP(txdr->size, 4096);
1063 if (!(txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma))) {
1064 ret_val = 2;
1065 goto err_nomem;
1066 }
1067 memset(txdr->desc, 0, txdr->size);
1068 txdr->next_to_use = txdr->next_to_clean = 0;
1069
1070 E1000_WRITE_REG(&adapter->hw, TDBAL,
1071 ((uint64_t) txdr->dma & 0x00000000FFFFFFFF));
1072 E1000_WRITE_REG(&adapter->hw, TDBAH, ((uint64_t) txdr->dma >> 32));
1073 E1000_WRITE_REG(&adapter->hw, TDLEN,
1074 txdr->count * sizeof(struct e1000_tx_desc));
1075 E1000_WRITE_REG(&adapter->hw, TDH, 0);
1076 E1000_WRITE_REG(&adapter->hw, TDT, 0);
1077 E1000_WRITE_REG(&adapter->hw, TCTL,
1078 E1000_TCTL_PSP | E1000_TCTL_EN |
1079 E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT |
1080 E1000_FDX_COLLISION_DISTANCE << E1000_COLD_SHIFT);
1081
1082 for (i = 0; i < txdr->count; i++) {
1083 struct e1000_tx_desc *tx_desc = E1000_TX_DESC(*txdr, i);
1084 struct sk_buff *skb;
1085 unsigned int size = 1024;
1086
1087 if (!(skb = alloc_skb(size, GFP_KERNEL))) {
1088 ret_val = 3;
1089 goto err_nomem;
1090 }
1091 skb_put(skb, size);
1092 txdr->buffer_info[i].skb = skb;
1093 txdr->buffer_info[i].length = skb->len;
1094 txdr->buffer_info[i].dma =
1095 pci_map_single(pdev, skb->data, skb->len,
1096 PCI_DMA_TODEVICE);
1097 tx_desc->buffer_addr = cpu_to_le64(txdr->buffer_info[i].dma);
1098 tx_desc->lower.data = cpu_to_le32(skb->len);
1099 tx_desc->lower.data |= cpu_to_le32(E1000_TXD_CMD_EOP |
1100 E1000_TXD_CMD_IFCS |
1101 E1000_TXD_CMD_RPS);
1102 tx_desc->upper.data = 0;
1103 }
1104
1105 /* Setup Rx descriptor ring and Rx buffers */
1106
1107 if (!rxdr->count)
1108 rxdr->count = E1000_DEFAULT_RXD;
1109
1110 size = rxdr->count * sizeof(struct e1000_buffer);
1111 if (!(rxdr->buffer_info = kmalloc(size, GFP_KERNEL))) {
1112 ret_val = 4;
1113 goto err_nomem;
1114 }
1115 memset(rxdr->buffer_info, 0, size);
1116
1117 rxdr->size = rxdr->count * sizeof(struct e1000_rx_desc);
1118 if (!(rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma))) {
1119 ret_val = 5;
1120 goto err_nomem;
1121 }
1122 memset(rxdr->desc, 0, rxdr->size);
1123 rxdr->next_to_use = rxdr->next_to_clean = 0;
1124
1125 rctl = E1000_READ_REG(&adapter->hw, RCTL);
1126 E1000_WRITE_REG(&adapter->hw, RCTL, rctl & ~E1000_RCTL_EN);
1127 E1000_WRITE_REG(&adapter->hw, RDBAL,
1128 ((uint64_t) rxdr->dma & 0xFFFFFFFF));
1129 E1000_WRITE_REG(&adapter->hw, RDBAH, ((uint64_t) rxdr->dma >> 32));
1130 E1000_WRITE_REG(&adapter->hw, RDLEN, rxdr->size);
1131 E1000_WRITE_REG(&adapter->hw, RDH, 0);
1132 E1000_WRITE_REG(&adapter->hw, RDT, 0);
1133 rctl = E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_SZ_2048 |
1134 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1135 (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
1136 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
1137
1138 for (i = 0; i < rxdr->count; i++) {
1139 struct e1000_rx_desc *rx_desc = E1000_RX_DESC(*rxdr, i);
1140 struct sk_buff *skb;
1141
1142 if (!(skb = alloc_skb(E1000_RXBUFFER_2048 + NET_IP_ALIGN,
1143 GFP_KERNEL))) {
1144 ret_val = 6;
1145 goto err_nomem;
1146 }
1147 skb_reserve(skb, NET_IP_ALIGN);
1148 rxdr->buffer_info[i].skb = skb;
1149 rxdr->buffer_info[i].length = E1000_RXBUFFER_2048;
1150 rxdr->buffer_info[i].dma =
1151 pci_map_single(pdev, skb->data, E1000_RXBUFFER_2048,
1152 PCI_DMA_FROMDEVICE);
1153 rx_desc->buffer_addr = cpu_to_le64(rxdr->buffer_info[i].dma);
1154 memset(skb->data, 0x00, skb->len);
1155 }
1156
1157 return 0;
1158
1159 err_nomem:
1160 e1000_free_desc_rings(adapter);
1161 return ret_val;
1162 }
1163
1164 static void
1165 e1000_phy_disable_receiver(struct e1000_adapter *adapter)
1166 {
1167 /* Write out to PHY registers 29 and 30 to disable the Receiver. */
1168 e1000_write_phy_reg(&adapter->hw, 29, 0x001F);
1169 e1000_write_phy_reg(&adapter->hw, 30, 0x8FFC);
1170 e1000_write_phy_reg(&adapter->hw, 29, 0x001A);
1171 e1000_write_phy_reg(&adapter->hw, 30, 0x8FF0);
1172 }
1173
1174 static void
1175 e1000_phy_reset_clk_and_crs(struct e1000_adapter *adapter)
1176 {
1177 uint16_t phy_reg;
1178
1179 /* Because we reset the PHY above, we need to re-force TX_CLK in the
1180 * Extended PHY Specific Control Register to 25MHz clock. This
1181 * value defaults back to a 2.5MHz clock when the PHY is reset.
1182 */
1183 e1000_read_phy_reg(&adapter->hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_reg);
1184 phy_reg |= M88E1000_EPSCR_TX_CLK_25;
1185 e1000_write_phy_reg(&adapter->hw,
1186 M88E1000_EXT_PHY_SPEC_CTRL, phy_reg);
1187
1188 /* In addition, because of the s/w reset above, we need to enable
1189 * CRS on TX. This must be set for both full and half duplex
1190 * operation.
1191 */
1192 e1000_read_phy_reg(&adapter->hw, M88E1000_PHY_SPEC_CTRL, &phy_reg);
1193 phy_reg |= M88E1000_PSCR_ASSERT_CRS_ON_TX;
1194 e1000_write_phy_reg(&adapter->hw,
1195 M88E1000_PHY_SPEC_CTRL, phy_reg);
1196 }
1197
1198 static int
1199 e1000_nonintegrated_phy_loopback(struct e1000_adapter *adapter)
1200 {
1201 uint32_t ctrl_reg;
1202 uint16_t phy_reg;
1203
1204 /* Setup the Device Control Register for PHY loopback test. */
1205
1206 ctrl_reg = E1000_READ_REG(&adapter->hw, CTRL);
1207 ctrl_reg |= (E1000_CTRL_ILOS | /* Invert Loss-Of-Signal */
1208 E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
1209 E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
1210 E1000_CTRL_SPD_1000 | /* Force Speed to 1000 */
1211 E1000_CTRL_FD); /* Force Duplex to FULL */
1212
1213 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl_reg);
1214
1215 /* Read the PHY Specific Control Register (0x10) */
1216 e1000_read_phy_reg(&adapter->hw, M88E1000_PHY_SPEC_CTRL, &phy_reg);
1217
1218 /* Clear Auto-Crossover bits in PHY Specific Control Register
1219 * (bits 6:5).
1220 */
1221 phy_reg &= ~M88E1000_PSCR_AUTO_X_MODE;
1222 e1000_write_phy_reg(&adapter->hw, M88E1000_PHY_SPEC_CTRL, phy_reg);
1223
1224 /* Perform software reset on the PHY */
1225 e1000_phy_reset(&adapter->hw);
1226
1227 /* Have to setup TX_CLK and TX_CRS after software reset */
1228 e1000_phy_reset_clk_and_crs(adapter);
1229
1230 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x8100);
1231
1232 /* Wait for reset to complete. */
1233 udelay(500);
1234
1235 /* Have to setup TX_CLK and TX_CRS after software reset */
1236 e1000_phy_reset_clk_and_crs(adapter);
1237
1238 /* Write out to PHY registers 29 and 30 to disable the Receiver. */
1239 e1000_phy_disable_receiver(adapter);
1240
1241 /* Set the loopback bit in the PHY control register. */
1242 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg);
1243 phy_reg |= MII_CR_LOOPBACK;
1244 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_reg);
1245
1246 /* Setup TX_CLK and TX_CRS one more time. */
1247 e1000_phy_reset_clk_and_crs(adapter);
1248
1249 /* Check Phy Configuration */
1250 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg);
1251 if (phy_reg != 0x4100)
1252 return 9;
1253
1254 e1000_read_phy_reg(&adapter->hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_reg);
1255 if (phy_reg != 0x0070)
1256 return 10;
1257
1258 e1000_read_phy_reg(&adapter->hw, 29, &phy_reg);
1259 if (phy_reg != 0x001A)
1260 return 11;
1261
1262 return 0;
1263 }
1264
1265 static int
1266 e1000_integrated_phy_loopback(struct e1000_adapter *adapter)
1267 {
1268 uint32_t ctrl_reg = 0;
1269 uint32_t stat_reg = 0;
1270
1271 adapter->hw.autoneg = FALSE;
1272
1273 if (adapter->hw.phy_type == e1000_phy_m88) {
1274 /* Auto-MDI/MDIX Off */
1275 e1000_write_phy_reg(&adapter->hw,
1276 M88E1000_PHY_SPEC_CTRL, 0x0808);
1277 /* reset to update Auto-MDI/MDIX */
1278 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x9140);
1279 /* autoneg off */
1280 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x8140);
1281 } else if (adapter->hw.phy_type == e1000_phy_gg82563)
1282 e1000_write_phy_reg(&adapter->hw,
1283 GG82563_PHY_KMRN_MODE_CTRL,
1284 0x1CC);
1285
1286 ctrl_reg = E1000_READ_REG(&adapter->hw, CTRL);
1287
1288 if (adapter->hw.phy_type == e1000_phy_ife) {
1289 /* force 100, set loopback */
1290 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x6100);
1291
1292 /* Now set up the MAC to the same speed/duplex as the PHY. */
1293 ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */
1294 ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
1295 E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
1296 E1000_CTRL_SPD_100 |/* Force Speed to 100 */
1297 E1000_CTRL_FD); /* Force Duplex to FULL */
1298 } else {
1299 /* force 1000, set loopback */
1300 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x4140);
1301
1302 /* Now set up the MAC to the same speed/duplex as the PHY. */
1303 ctrl_reg = E1000_READ_REG(&adapter->hw, CTRL);
1304 ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */
1305 ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
1306 E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
1307 E1000_CTRL_SPD_1000 |/* Force Speed to 1000 */
1308 E1000_CTRL_FD); /* Force Duplex to FULL */
1309 }
1310
1311 if (adapter->hw.media_type == e1000_media_type_copper &&
1312 adapter->hw.phy_type == e1000_phy_m88)
1313 ctrl_reg |= E1000_CTRL_ILOS; /* Invert Loss of Signal */
1314 else {
1315 /* Set the ILOS bit on the fiber Nic is half
1316 * duplex link is detected. */
1317 stat_reg = E1000_READ_REG(&adapter->hw, STATUS);
1318 if ((stat_reg & E1000_STATUS_FD) == 0)
1319 ctrl_reg |= (E1000_CTRL_ILOS | E1000_CTRL_SLU);
1320 }
1321
1322 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl_reg);
1323
1324 /* Disable the receiver on the PHY so when a cable is plugged in, the
1325 * PHY does not begin to autoneg when a cable is reconnected to the NIC.
1326 */
1327 if (adapter->hw.phy_type == e1000_phy_m88)
1328 e1000_phy_disable_receiver(adapter);
1329
1330 udelay(500);
1331
1332 return 0;
1333 }
1334
1335 static int
1336 e1000_set_phy_loopback(struct e1000_adapter *adapter)
1337 {
1338 uint16_t phy_reg = 0;
1339 uint16_t count = 0;
1340
1341 switch (adapter->hw.mac_type) {
1342 case e1000_82543:
1343 if (adapter->hw.media_type == e1000_media_type_copper) {
1344 /* Attempt to setup Loopback mode on Non-integrated PHY.
1345 * Some PHY registers get corrupted at random, so
1346 * attempt this 10 times.
1347 */
1348 while (e1000_nonintegrated_phy_loopback(adapter) &&
1349 count++ < 10);
1350 if (count < 11)
1351 return 0;
1352 }
1353 break;
1354
1355 case e1000_82544:
1356 case e1000_82540:
1357 case e1000_82545:
1358 case e1000_82545_rev_3:
1359 case e1000_82546:
1360 case e1000_82546_rev_3:
1361 case e1000_82541:
1362 case e1000_82541_rev_2:
1363 case e1000_82547:
1364 case e1000_82547_rev_2:
1365 case e1000_82571:
1366 case e1000_82572:
1367 case e1000_82573:
1368 case e1000_80003es2lan:
1369 case e1000_ich8lan:
1370 return e1000_integrated_phy_loopback(adapter);
1371 break;
1372
1373 default:
1374 /* Default PHY loopback work is to read the MII
1375 * control register and assert bit 14 (loopback mode).
1376 */
1377 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg);
1378 phy_reg |= MII_CR_LOOPBACK;
1379 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_reg);
1380 return 0;
1381 break;
1382 }
1383
1384 return 8;
1385 }
1386
1387 static int
1388 e1000_setup_loopback_test(struct e1000_adapter *adapter)
1389 {
1390 struct e1000_hw *hw = &adapter->hw;
1391 uint32_t rctl;
1392
1393 if (hw->media_type == e1000_media_type_fiber ||
1394 hw->media_type == e1000_media_type_internal_serdes) {
1395 switch (hw->mac_type) {
1396 case e1000_82545:
1397 case e1000_82546:
1398 case e1000_82545_rev_3:
1399 case e1000_82546_rev_3:
1400 return e1000_set_phy_loopback(adapter);
1401 break;
1402 case e1000_82571:
1403 case e1000_82572:
1404 #define E1000_SERDES_LB_ON 0x410
1405 e1000_set_phy_loopback(adapter);
1406 E1000_WRITE_REG(hw, SCTL, E1000_SERDES_LB_ON);
1407 msleep(10);
1408 return 0;
1409 break;
1410 default:
1411 rctl = E1000_READ_REG(hw, RCTL);
1412 rctl |= E1000_RCTL_LBM_TCVR;
1413 E1000_WRITE_REG(hw, RCTL, rctl);
1414 return 0;
1415 }
1416 } else if (hw->media_type == e1000_media_type_copper)
1417 return e1000_set_phy_loopback(adapter);
1418
1419 return 7;
1420 }
1421
1422 static void
1423 e1000_loopback_cleanup(struct e1000_adapter *adapter)
1424 {
1425 struct e1000_hw *hw = &adapter->hw;
1426 uint32_t rctl;
1427 uint16_t phy_reg;
1428
1429 rctl = E1000_READ_REG(hw, RCTL);
1430 rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
1431 E1000_WRITE_REG(hw, RCTL, rctl);
1432
1433 switch (hw->mac_type) {
1434 case e1000_82571:
1435 case e1000_82572:
1436 if (hw->media_type == e1000_media_type_fiber ||
1437 hw->media_type == e1000_media_type_internal_serdes) {
1438 #define E1000_SERDES_LB_OFF 0x400
1439 E1000_WRITE_REG(hw, SCTL, E1000_SERDES_LB_OFF);
1440 msleep(10);
1441 break;
1442 }
1443 /* Fall Through */
1444 case e1000_82545:
1445 case e1000_82546:
1446 case e1000_82545_rev_3:
1447 case e1000_82546_rev_3:
1448 default:
1449 hw->autoneg = TRUE;
1450 if (hw->phy_type == e1000_phy_gg82563)
1451 e1000_write_phy_reg(hw,
1452 GG82563_PHY_KMRN_MODE_CTRL,
1453 0x180);
1454 e1000_read_phy_reg(hw, PHY_CTRL, &phy_reg);
1455 if (phy_reg & MII_CR_LOOPBACK) {
1456 phy_reg &= ~MII_CR_LOOPBACK;
1457 e1000_write_phy_reg(hw, PHY_CTRL, phy_reg);
1458 e1000_phy_reset(hw);
1459 }
1460 break;
1461 }
1462 }
1463
1464 static void
1465 e1000_create_lbtest_frame(struct sk_buff *skb, unsigned int frame_size)
1466 {
1467 memset(skb->data, 0xFF, frame_size);
1468 frame_size &= ~1;
1469 memset(&skb->data[frame_size / 2], 0xAA, frame_size / 2 - 1);
1470 memset(&skb->data[frame_size / 2 + 10], 0xBE, 1);
1471 memset(&skb->data[frame_size / 2 + 12], 0xAF, 1);
1472 }
1473
1474 static int
1475 e1000_check_lbtest_frame(struct sk_buff *skb, unsigned int frame_size)
1476 {
1477 frame_size &= ~1;
1478 if (*(skb->data + 3) == 0xFF) {
1479 if ((*(skb->data + frame_size / 2 + 10) == 0xBE) &&
1480 (*(skb->data + frame_size / 2 + 12) == 0xAF)) {
1481 return 0;
1482 }
1483 }
1484 return 13;
1485 }
1486
1487 static int
1488 e1000_run_loopback_test(struct e1000_adapter *adapter)
1489 {
1490 struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
1491 struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
1492 struct pci_dev *pdev = adapter->pdev;
1493 int i, j, k, l, lc, good_cnt, ret_val=0;
1494 unsigned long time;
1495
1496 E1000_WRITE_REG(&adapter->hw, RDT, rxdr->count - 1);
1497
1498 /* Calculate the loop count based on the largest descriptor ring
1499 * The idea is to wrap the largest ring a number of times using 64
1500 * send/receive pairs during each loop
1501 */
1502
1503 if (rxdr->count <= txdr->count)
1504 lc = ((txdr->count / 64) * 2) + 1;
1505 else
1506 lc = ((rxdr->count / 64) * 2) + 1;
1507
1508 k = l = 0;
1509 for (j = 0; j <= lc; j++) { /* loop count loop */
1510 for (i = 0; i < 64; i++) { /* send the packets */
1511 e1000_create_lbtest_frame(txdr->buffer_info[i].skb,
1512 1024);
1513 pci_dma_sync_single_for_device(pdev,
1514 txdr->buffer_info[k].dma,
1515 txdr->buffer_info[k].length,
1516 PCI_DMA_TODEVICE);
1517 if (unlikely(++k == txdr->count)) k = 0;
1518 }
1519 E1000_WRITE_REG(&adapter->hw, TDT, k);
1520 msleep(200);
1521 time = jiffies; /* set the start time for the receive */
1522 good_cnt = 0;
1523 do { /* receive the sent packets */
1524 pci_dma_sync_single_for_cpu(pdev,
1525 rxdr->buffer_info[l].dma,
1526 rxdr->buffer_info[l].length,
1527 PCI_DMA_FROMDEVICE);
1528
1529 ret_val = e1000_check_lbtest_frame(
1530 rxdr->buffer_info[l].skb,
1531 1024);
1532 if (!ret_val)
1533 good_cnt++;
1534 if (unlikely(++l == rxdr->count)) l = 0;
1535 /* time + 20 msecs (200 msecs on 2.4) is more than
1536 * enough time to complete the receives, if it's
1537 * exceeded, break and error off
1538 */
1539 } while (good_cnt < 64 && jiffies < (time + 20));
1540 if (good_cnt != 64) {
1541 ret_val = 13; /* ret_val is the same as mis-compare */
1542 break;
1543 }
1544 if (jiffies >= (time + 2)) {
1545 ret_val = 14; /* error code for time out error */
1546 break;
1547 }
1548 } /* end loop count loop */
1549 return ret_val;
1550 }
1551
1552 static int
1553 e1000_loopback_test(struct e1000_adapter *adapter, uint64_t *data)
1554 {
1555 /* PHY loopback cannot be performed if SoL/IDER
1556 * sessions are active */
1557 if (e1000_check_phy_reset_block(&adapter->hw)) {
1558 DPRINTK(DRV, ERR, "Cannot do PHY loopback test "
1559 "when SoL/IDER is active.\n");
1560 *data = 0;
1561 goto out;
1562 }
1563
1564 if ((*data = e1000_setup_desc_rings(adapter)))
1565 goto out;
1566 if ((*data = e1000_setup_loopback_test(adapter)))
1567 goto err_loopback;
1568 *data = e1000_run_loopback_test(adapter);
1569 e1000_loopback_cleanup(adapter);
1570
1571 err_loopback:
1572 e1000_free_desc_rings(adapter);
1573 out:
1574 return *data;
1575 }
1576
1577 static int
1578 e1000_link_test(struct e1000_adapter *adapter, uint64_t *data)
1579 {
1580 *data = 0;
1581 if (adapter->hw.media_type == e1000_media_type_internal_serdes) {
1582 int i = 0;
1583 adapter->hw.serdes_link_down = TRUE;
1584
1585 /* On some blade server designs, link establishment
1586 * could take as long as 2-3 minutes */
1587 do {
1588 e1000_check_for_link(&adapter->hw);
1589 if (adapter->hw.serdes_link_down == FALSE)
1590 return *data;
1591 msleep(20);
1592 } while (i++ < 3750);
1593
1594 *data = 1;
1595 } else {
1596 e1000_check_for_link(&adapter->hw);
1597 if (adapter->hw.autoneg) /* if auto_neg is set wait for it */
1598 msleep(4000);
1599
1600 if (!(E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU)) {
1601 *data = 1;
1602 }
1603 }
1604 return *data;
1605 }
1606
1607 static int
1608 e1000_diag_test_count(struct net_device *netdev)
1609 {
1610 return E1000_TEST_LEN;
1611 }
1612
1613 extern void e1000_power_up_phy(struct e1000_adapter *);
1614
1615 static void
1616 e1000_diag_test(struct net_device *netdev,
1617 struct ethtool_test *eth_test, uint64_t *data)
1618 {
1619 struct e1000_adapter *adapter = netdev_priv(netdev);
1620 boolean_t if_running = netif_running(netdev);
1621
1622 set_bit(__E1000_TESTING, &adapter->flags);
1623 if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
1624 /* Offline tests */
1625
1626 /* save speed, duplex, autoneg settings */
1627 uint16_t autoneg_advertised = adapter->hw.autoneg_advertised;
1628 uint8_t forced_speed_duplex = adapter->hw.forced_speed_duplex;
1629 uint8_t autoneg = adapter->hw.autoneg;
1630
1631 DPRINTK(HW, INFO, "offline testing starting\n");
1632
1633 /* Link test performed before hardware reset so autoneg doesn't
1634 * interfere with test result */
1635 if (e1000_link_test(adapter, &data[4]))
1636 eth_test->flags |= ETH_TEST_FL_FAILED;
1637
1638 if (if_running)
1639 /* indicate we're in test mode */
1640 dev_close(netdev);
1641 else
1642 e1000_reset(adapter);
1643
1644 if (e1000_reg_test(adapter, &data[0]))
1645 eth_test->flags |= ETH_TEST_FL_FAILED;
1646
1647 e1000_reset(adapter);
1648 if (e1000_eeprom_test(adapter, &data[1]))
1649 eth_test->flags |= ETH_TEST_FL_FAILED;
1650
1651 e1000_reset(adapter);
1652 if (e1000_intr_test(adapter, &data[2]))
1653 eth_test->flags |= ETH_TEST_FL_FAILED;
1654
1655 e1000_reset(adapter);
1656 /* make sure the phy is powered up */
1657 e1000_power_up_phy(adapter);
1658 if (e1000_loopback_test(adapter, &data[3]))
1659 eth_test->flags |= ETH_TEST_FL_FAILED;
1660
1661 /* restore speed, duplex, autoneg settings */
1662 adapter->hw.autoneg_advertised = autoneg_advertised;
1663 adapter->hw.forced_speed_duplex = forced_speed_duplex;
1664 adapter->hw.autoneg = autoneg;
1665
1666 e1000_reset(adapter);
1667 clear_bit(__E1000_TESTING, &adapter->flags);
1668 if (if_running)
1669 dev_open(netdev);
1670 } else {
1671 DPRINTK(HW, INFO, "online testing starting\n");
1672 /* Online tests */
1673 if (e1000_link_test(adapter, &data[4]))
1674 eth_test->flags |= ETH_TEST_FL_FAILED;
1675
1676 /* Offline tests aren't run; pass by default */
1677 data[0] = 0;
1678 data[1] = 0;
1679 data[2] = 0;
1680 data[3] = 0;
1681
1682 clear_bit(__E1000_TESTING, &adapter->flags);
1683 }
1684 msleep_interruptible(4 * 1000);
1685 }
1686
1687 static int e1000_wol_exclusion(struct e1000_adapter *adapter, struct ethtool_wolinfo *wol)
1688 {
1689 struct e1000_hw *hw = &adapter->hw;
1690 int retval = 1; /* fail by default */
1691
1692 switch (hw->device_id) {
1693 case E1000_DEV_ID_82543GC_FIBER:
1694 case E1000_DEV_ID_82543GC_COPPER:
1695 case E1000_DEV_ID_82544EI_FIBER:
1696 case E1000_DEV_ID_82546EB_QUAD_COPPER:
1697 case E1000_DEV_ID_82545EM_FIBER:
1698 case E1000_DEV_ID_82545EM_COPPER:
1699 case E1000_DEV_ID_82546GB_QUAD_COPPER:
1700 case E1000_DEV_ID_82546GB_PCIE:
1701 /* these don't support WoL at all */
1702 wol->supported = 0;
1703 break;
1704 case E1000_DEV_ID_82546EB_FIBER:
1705 case E1000_DEV_ID_82546GB_FIBER:
1706 case E1000_DEV_ID_82571EB_FIBER:
1707 case E1000_DEV_ID_82571EB_SERDES:
1708 case E1000_DEV_ID_82571EB_COPPER:
1709 /* Wake events not supported on port B */
1710 if (E1000_READ_REG(hw, STATUS) & E1000_STATUS_FUNC_1) {
1711 wol->supported = 0;
1712 break;
1713 }
1714 /* return success for non excluded adapter ports */
1715 retval = 0;
1716 break;
1717 case E1000_DEV_ID_82571EB_QUAD_COPPER:
1718 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
1719 /* quad port adapters only support WoL on port A */
1720 if (!adapter->quad_port_a) {
1721 wol->supported = 0;
1722 break;
1723 }
1724 /* return success for non excluded adapter ports */
1725 retval = 0;
1726 break;
1727 default:
1728 /* dual port cards only support WoL on port A from now on
1729 * unless it was enabled in the eeprom for port B
1730 * so exclude FUNC_1 ports from having WoL enabled */
1731 if (E1000_READ_REG(hw, STATUS) & E1000_STATUS_FUNC_1 &&
1732 !adapter->eeprom_wol) {
1733 wol->supported = 0;
1734 break;
1735 }
1736
1737 retval = 0;
1738 }
1739
1740 return retval;
1741 }
1742
1743 static void
1744 e1000_get_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1745 {
1746 struct e1000_adapter *adapter = netdev_priv(netdev);
1747
1748 wol->supported = WAKE_UCAST | WAKE_MCAST |
1749 WAKE_BCAST | WAKE_MAGIC;
1750 wol->wolopts = 0;
1751
1752 /* this function will set ->supported = 0 and return 1 if wol is not
1753 * supported by this hardware */
1754 if (e1000_wol_exclusion(adapter, wol))
1755 return;
1756
1757 /* apply any specific unsupported masks here */
1758 switch (adapter->hw.device_id) {
1759 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
1760 /* KSP3 does not suppport UCAST wake-ups */
1761 wol->supported &= ~WAKE_UCAST;
1762
1763 if (adapter->wol & E1000_WUFC_EX)
1764 DPRINTK(DRV, ERR, "Interface does not support "
1765 "directed (unicast) frame wake-up packets\n");
1766 break;
1767 default:
1768 break;
1769 }
1770
1771 if (adapter->wol & E1000_WUFC_EX)
1772 wol->wolopts |= WAKE_UCAST;
1773 if (adapter->wol & E1000_WUFC_MC)
1774 wol->wolopts |= WAKE_MCAST;
1775 if (adapter->wol & E1000_WUFC_BC)
1776 wol->wolopts |= WAKE_BCAST;
1777 if (adapter->wol & E1000_WUFC_MAG)
1778 wol->wolopts |= WAKE_MAGIC;
1779
1780 return;
1781 }
1782
1783 static int
1784 e1000_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1785 {
1786 struct e1000_adapter *adapter = netdev_priv(netdev);
1787 struct e1000_hw *hw = &adapter->hw;
1788
1789 if (wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE))
1790 return -EOPNOTSUPP;
1791
1792 if (e1000_wol_exclusion(adapter, wol))
1793 return wol->wolopts ? -EOPNOTSUPP : 0;
1794
1795 switch (hw->device_id) {
1796 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
1797 if (wol->wolopts & WAKE_UCAST) {
1798 DPRINTK(DRV, ERR, "Interface does not support "
1799 "directed (unicast) frame wake-up packets\n");
1800 return -EOPNOTSUPP;
1801 }
1802 break;
1803 default:
1804 break;
1805 }
1806
1807 /* these settings will always override what we currently have */
1808 adapter->wol = 0;
1809
1810 if (wol->wolopts & WAKE_UCAST)
1811 adapter->wol |= E1000_WUFC_EX;
1812 if (wol->wolopts & WAKE_MCAST)
1813 adapter->wol |= E1000_WUFC_MC;
1814 if (wol->wolopts & WAKE_BCAST)
1815 adapter->wol |= E1000_WUFC_BC;
1816 if (wol->wolopts & WAKE_MAGIC)
1817 adapter->wol |= E1000_WUFC_MAG;
1818
1819 return 0;
1820 }
1821
1822 /* toggle LED 4 times per second = 2 "blinks" per second */
1823 #define E1000_ID_INTERVAL (HZ/4)
1824
1825 /* bit defines for adapter->led_status */
1826 #define E1000_LED_ON 0
1827
1828 static void
1829 e1000_led_blink_callback(unsigned long data)
1830 {
1831 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
1832
1833 if (test_and_change_bit(E1000_LED_ON, &adapter->led_status))
1834 e1000_led_off(&adapter->hw);
1835 else
1836 e1000_led_on(&adapter->hw);
1837
1838 mod_timer(&adapter->blink_timer, jiffies + E1000_ID_INTERVAL);
1839 }
1840
1841 static int
1842 e1000_phys_id(struct net_device *netdev, uint32_t data)
1843 {
1844 struct e1000_adapter *adapter = netdev_priv(netdev);
1845
1846 if (!data || data > (uint32_t)(MAX_SCHEDULE_TIMEOUT / HZ))
1847 data = (uint32_t)(MAX_SCHEDULE_TIMEOUT / HZ);
1848
1849 if (adapter->hw.mac_type < e1000_82571) {
1850 if (!adapter->blink_timer.function) {
1851 init_timer(&adapter->blink_timer);
1852 adapter->blink_timer.function = e1000_led_blink_callback;
1853 adapter->blink_timer.data = (unsigned long) adapter;
1854 }
1855 e1000_setup_led(&adapter->hw);
1856 mod_timer(&adapter->blink_timer, jiffies);
1857 msleep_interruptible(data * 1000);
1858 del_timer_sync(&adapter->blink_timer);
1859 } else if (adapter->hw.phy_type == e1000_phy_ife) {
1860 if (!adapter->blink_timer.function) {
1861 init_timer(&adapter->blink_timer);
1862 adapter->blink_timer.function = e1000_led_blink_callback;
1863 adapter->blink_timer.data = (unsigned long) adapter;
1864 }
1865 mod_timer(&adapter->blink_timer, jiffies);
1866 msleep_interruptible(data * 1000);
1867 del_timer_sync(&adapter->blink_timer);
1868 e1000_write_phy_reg(&(adapter->hw), IFE_PHY_SPECIAL_CONTROL_LED, 0);
1869 } else {
1870 e1000_blink_led_start(&adapter->hw);
1871 msleep_interruptible(data * 1000);
1872 }
1873
1874 e1000_led_off(&adapter->hw);
1875 clear_bit(E1000_LED_ON, &adapter->led_status);
1876 e1000_cleanup_led(&adapter->hw);
1877
1878 return 0;
1879 }
1880
1881 static int
1882 e1000_nway_reset(struct net_device *netdev)
1883 {
1884 struct e1000_adapter *adapter = netdev_priv(netdev);
1885 if (netif_running(netdev))
1886 e1000_reinit_locked(adapter);
1887 return 0;
1888 }
1889
1890 static int
1891 e1000_get_stats_count(struct net_device *netdev)
1892 {
1893 return E1000_STATS_LEN;
1894 }
1895
1896 static void
1897 e1000_get_ethtool_stats(struct net_device *netdev,
1898 struct ethtool_stats *stats, uint64_t *data)
1899 {
1900 struct e1000_adapter *adapter = netdev_priv(netdev);
1901 int i;
1902
1903 e1000_update_stats(adapter);
1904 for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) {
1905 char *p = (char *)adapter+e1000_gstrings_stats[i].stat_offset;
1906 data[i] = (e1000_gstrings_stats[i].sizeof_stat ==
1907 sizeof(uint64_t)) ? *(uint64_t *)p : *(uint32_t *)p;
1908 }
1909 /* BUG_ON(i != E1000_STATS_LEN); */
1910 }
1911
1912 static void
1913 e1000_get_strings(struct net_device *netdev, uint32_t stringset, uint8_t *data)
1914 {
1915 uint8_t *p = data;
1916 int i;
1917
1918 switch (stringset) {
1919 case ETH_SS_TEST:
1920 memcpy(data, *e1000_gstrings_test,
1921 E1000_TEST_LEN*ETH_GSTRING_LEN);
1922 break;
1923 case ETH_SS_STATS:
1924 for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) {
1925 memcpy(p, e1000_gstrings_stats[i].stat_string,
1926 ETH_GSTRING_LEN);
1927 p += ETH_GSTRING_LEN;
1928 }
1929 /* BUG_ON(p - data != E1000_STATS_LEN * ETH_GSTRING_LEN); */
1930 break;
1931 }
1932 }
1933
1934 static const struct ethtool_ops e1000_ethtool_ops = {
1935 .get_settings = e1000_get_settings,
1936 .set_settings = e1000_set_settings,
1937 .get_drvinfo = e1000_get_drvinfo,
1938 .get_regs_len = e1000_get_regs_len,
1939 .get_regs = e1000_get_regs,
1940 .get_wol = e1000_get_wol,
1941 .set_wol = e1000_set_wol,
1942 .get_msglevel = e1000_get_msglevel,
1943 .set_msglevel = e1000_set_msglevel,
1944 .nway_reset = e1000_nway_reset,
1945 .get_link = ethtool_op_get_link,
1946 .get_eeprom_len = e1000_get_eeprom_len,
1947 .get_eeprom = e1000_get_eeprom,
1948 .set_eeprom = e1000_set_eeprom,
1949 .get_ringparam = e1000_get_ringparam,
1950 .set_ringparam = e1000_set_ringparam,
1951 .get_pauseparam = e1000_get_pauseparam,
1952 .set_pauseparam = e1000_set_pauseparam,
1953 .get_rx_csum = e1000_get_rx_csum,
1954 .set_rx_csum = e1000_set_rx_csum,
1955 .get_tx_csum = e1000_get_tx_csum,
1956 .set_tx_csum = e1000_set_tx_csum,
1957 .get_sg = ethtool_op_get_sg,
1958 .set_sg = ethtool_op_set_sg,
1959 #ifdef NETIF_F_TSO
1960 .get_tso = ethtool_op_get_tso,
1961 .set_tso = e1000_set_tso,
1962 #endif
1963 .self_test_count = e1000_diag_test_count,
1964 .self_test = e1000_diag_test,
1965 .get_strings = e1000_get_strings,
1966 .phys_id = e1000_phys_id,
1967 .get_stats_count = e1000_get_stats_count,
1968 .get_ethtool_stats = e1000_get_ethtool_stats,
1969 .get_perm_addr = ethtool_op_get_perm_addr,
1970 };
1971
1972 void e1000_set_ethtool_ops(struct net_device *netdev)
1973 {
1974 SET_ETHTOOL_OPS(netdev, &e1000_ethtool_ops);
1975 }