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1 /*******************************************************************************
2
3
4 Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 2 of the License, or (at your option)
9 any later version.
10
11 This program is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 more details.
15
16 You should have received a copy of the GNU General Public License along with
17 this program; if not, write to the Free Software Foundation, Inc., 59
18 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19
20 The full GNU General Public License is included in this distribution in the
21 file called LICENSE.
22
23 Contact Information:
24 Linux NICS <linux.nics@intel.com>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27 *******************************************************************************/
28
29 #include "e1000.h"
30
31 /* Change Log
32 * 6.0.58 4/20/05
33 * o Accepted ethtool cleanup patch from Stephen Hemminger
34 * 6.0.44+ 2/15/05
35 * o applied Anton's patch to resolve tx hang in hardware
36 * o Applied Andrew Mortons patch - e1000 stops working after resume
37 */
38
39 char e1000_driver_name[] = "e1000";
40 static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
41 #ifndef CONFIG_E1000_NAPI
42 #define DRIVERNAPI
43 #else
44 #define DRIVERNAPI "-NAPI"
45 #endif
46 #define DRV_VERSION "6.3.9-k2"DRIVERNAPI
47 char e1000_driver_version[] = DRV_VERSION;
48 static char e1000_copyright[] = "Copyright (c) 1999-2005 Intel Corporation.";
49
50 /* e1000_pci_tbl - PCI Device ID Table
51 *
52 * Last entry must be all 0s
53 *
54 * Macro expands to...
55 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
56 */
57 static struct pci_device_id e1000_pci_tbl[] = {
58 INTEL_E1000_ETHERNET_DEVICE(0x1000),
59 INTEL_E1000_ETHERNET_DEVICE(0x1001),
60 INTEL_E1000_ETHERNET_DEVICE(0x1004),
61 INTEL_E1000_ETHERNET_DEVICE(0x1008),
62 INTEL_E1000_ETHERNET_DEVICE(0x1009),
63 INTEL_E1000_ETHERNET_DEVICE(0x100C),
64 INTEL_E1000_ETHERNET_DEVICE(0x100D),
65 INTEL_E1000_ETHERNET_DEVICE(0x100E),
66 INTEL_E1000_ETHERNET_DEVICE(0x100F),
67 INTEL_E1000_ETHERNET_DEVICE(0x1010),
68 INTEL_E1000_ETHERNET_DEVICE(0x1011),
69 INTEL_E1000_ETHERNET_DEVICE(0x1012),
70 INTEL_E1000_ETHERNET_DEVICE(0x1013),
71 INTEL_E1000_ETHERNET_DEVICE(0x1014),
72 INTEL_E1000_ETHERNET_DEVICE(0x1015),
73 INTEL_E1000_ETHERNET_DEVICE(0x1016),
74 INTEL_E1000_ETHERNET_DEVICE(0x1017),
75 INTEL_E1000_ETHERNET_DEVICE(0x1018),
76 INTEL_E1000_ETHERNET_DEVICE(0x1019),
77 INTEL_E1000_ETHERNET_DEVICE(0x101A),
78 INTEL_E1000_ETHERNET_DEVICE(0x101D),
79 INTEL_E1000_ETHERNET_DEVICE(0x101E),
80 INTEL_E1000_ETHERNET_DEVICE(0x1026),
81 INTEL_E1000_ETHERNET_DEVICE(0x1027),
82 INTEL_E1000_ETHERNET_DEVICE(0x1028),
83 INTEL_E1000_ETHERNET_DEVICE(0x105E),
84 INTEL_E1000_ETHERNET_DEVICE(0x105F),
85 INTEL_E1000_ETHERNET_DEVICE(0x1060),
86 INTEL_E1000_ETHERNET_DEVICE(0x1075),
87 INTEL_E1000_ETHERNET_DEVICE(0x1076),
88 INTEL_E1000_ETHERNET_DEVICE(0x1077),
89 INTEL_E1000_ETHERNET_DEVICE(0x1078),
90 INTEL_E1000_ETHERNET_DEVICE(0x1079),
91 INTEL_E1000_ETHERNET_DEVICE(0x107A),
92 INTEL_E1000_ETHERNET_DEVICE(0x107B),
93 INTEL_E1000_ETHERNET_DEVICE(0x107C),
94 INTEL_E1000_ETHERNET_DEVICE(0x107D),
95 INTEL_E1000_ETHERNET_DEVICE(0x107E),
96 INTEL_E1000_ETHERNET_DEVICE(0x107F),
97 INTEL_E1000_ETHERNET_DEVICE(0x108A),
98 INTEL_E1000_ETHERNET_DEVICE(0x108B),
99 INTEL_E1000_ETHERNET_DEVICE(0x108C),
100 INTEL_E1000_ETHERNET_DEVICE(0x109A),
101 /* required last entry */
102 {0,}
103 };
104
105 MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
106
107 int e1000_up(struct e1000_adapter *adapter);
108 void e1000_down(struct e1000_adapter *adapter);
109 void e1000_reset(struct e1000_adapter *adapter);
110 int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
111 int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
112 int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
113 void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
114 void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
115 static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
116 struct e1000_tx_ring *txdr);
117 static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
118 struct e1000_rx_ring *rxdr);
119 static void e1000_free_tx_resources(struct e1000_adapter *adapter,
120 struct e1000_tx_ring *tx_ring);
121 static void e1000_free_rx_resources(struct e1000_adapter *adapter,
122 struct e1000_rx_ring *rx_ring);
123 void e1000_update_stats(struct e1000_adapter *adapter);
124
125 /* Local Function Prototypes */
126
127 static int e1000_init_module(void);
128 static void e1000_exit_module(void);
129 static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
130 static void __devexit e1000_remove(struct pci_dev *pdev);
131 static int e1000_alloc_queues(struct e1000_adapter *adapter);
132 #ifdef CONFIG_E1000_MQ
133 static void e1000_setup_queue_mapping(struct e1000_adapter *adapter);
134 #endif
135 static int e1000_sw_init(struct e1000_adapter *adapter);
136 static int e1000_open(struct net_device *netdev);
137 static int e1000_close(struct net_device *netdev);
138 static void e1000_configure_tx(struct e1000_adapter *adapter);
139 static void e1000_configure_rx(struct e1000_adapter *adapter);
140 static void e1000_setup_rctl(struct e1000_adapter *adapter);
141 static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
142 static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
143 static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
144 struct e1000_tx_ring *tx_ring);
145 static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
146 struct e1000_rx_ring *rx_ring);
147 static void e1000_set_multi(struct net_device *netdev);
148 static void e1000_update_phy_info(unsigned long data);
149 static void e1000_watchdog(unsigned long data);
150 static void e1000_watchdog_task(struct e1000_adapter *adapter);
151 static void e1000_82547_tx_fifo_stall(unsigned long data);
152 static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
153 static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
154 static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
155 static int e1000_set_mac(struct net_device *netdev, void *p);
156 static irqreturn_t e1000_intr(int irq, void *data, struct pt_regs *regs);
157 static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter,
158 struct e1000_tx_ring *tx_ring);
159 #ifdef CONFIG_E1000_NAPI
160 static int e1000_clean(struct net_device *poll_dev, int *budget);
161 static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
162 struct e1000_rx_ring *rx_ring,
163 int *work_done, int work_to_do);
164 static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
165 struct e1000_rx_ring *rx_ring,
166 int *work_done, int work_to_do);
167 #else
168 static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
169 struct e1000_rx_ring *rx_ring);
170 static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
171 struct e1000_rx_ring *rx_ring);
172 #endif
173 static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
174 struct e1000_rx_ring *rx_ring,
175 int cleaned_count);
176 static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
177 struct e1000_rx_ring *rx_ring,
178 int cleaned_count);
179 static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
180 static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
181 int cmd);
182 void e1000_set_ethtool_ops(struct net_device *netdev);
183 static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
184 static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
185 static void e1000_tx_timeout(struct net_device *dev);
186 static void e1000_tx_timeout_task(struct net_device *dev);
187 static void e1000_smartspeed(struct e1000_adapter *adapter);
188 static inline int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
189 struct sk_buff *skb);
190
191 static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
192 static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
193 static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
194 static void e1000_restore_vlan(struct e1000_adapter *adapter);
195
196 #ifdef CONFIG_PM
197 static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
198 static int e1000_resume(struct pci_dev *pdev);
199 #endif
200
201 #ifdef CONFIG_NET_POLL_CONTROLLER
202 /* for netdump / net console */
203 static void e1000_netpoll (struct net_device *netdev);
204 #endif
205
206 #ifdef CONFIG_E1000_MQ
207 /* for multiple Rx queues */
208 void e1000_rx_schedule(void *data);
209 #endif
210
211 /* Exported from other modules */
212
213 extern void e1000_check_options(struct e1000_adapter *adapter);
214
215 static struct pci_driver e1000_driver = {
216 .name = e1000_driver_name,
217 .id_table = e1000_pci_tbl,
218 .probe = e1000_probe,
219 .remove = __devexit_p(e1000_remove),
220 /* Power Managment Hooks */
221 #ifdef CONFIG_PM
222 .suspend = e1000_suspend,
223 .resume = e1000_resume
224 #endif
225 };
226
227 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
228 MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
229 MODULE_LICENSE("GPL");
230 MODULE_VERSION(DRV_VERSION);
231
232 static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
233 module_param(debug, int, 0);
234 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
235
236 /**
237 * e1000_init_module - Driver Registration Routine
238 *
239 * e1000_init_module is the first routine called when the driver is
240 * loaded. All it does is register with the PCI subsystem.
241 **/
242
243 static int __init
244 e1000_init_module(void)
245 {
246 int ret;
247 printk(KERN_INFO "%s - version %s\n",
248 e1000_driver_string, e1000_driver_version);
249
250 printk(KERN_INFO "%s\n", e1000_copyright);
251
252 ret = pci_module_init(&e1000_driver);
253
254 return ret;
255 }
256
257 module_init(e1000_init_module);
258
259 /**
260 * e1000_exit_module - Driver Exit Cleanup Routine
261 *
262 * e1000_exit_module is called just before the driver is removed
263 * from memory.
264 **/
265
266 static void __exit
267 e1000_exit_module(void)
268 {
269 pci_unregister_driver(&e1000_driver);
270 }
271
272 module_exit(e1000_exit_module);
273
274 /**
275 * e1000_irq_disable - Mask off interrupt generation on the NIC
276 * @adapter: board private structure
277 **/
278
279 static inline void
280 e1000_irq_disable(struct e1000_adapter *adapter)
281 {
282 atomic_inc(&adapter->irq_sem);
283 E1000_WRITE_REG(&adapter->hw, IMC, ~0);
284 E1000_WRITE_FLUSH(&adapter->hw);
285 synchronize_irq(adapter->pdev->irq);
286 }
287
288 /**
289 * e1000_irq_enable - Enable default interrupt generation settings
290 * @adapter: board private structure
291 **/
292
293 static inline void
294 e1000_irq_enable(struct e1000_adapter *adapter)
295 {
296 if(likely(atomic_dec_and_test(&adapter->irq_sem))) {
297 E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
298 E1000_WRITE_FLUSH(&adapter->hw);
299 }
300 }
301
302 static void
303 e1000_update_mng_vlan(struct e1000_adapter *adapter)
304 {
305 struct net_device *netdev = adapter->netdev;
306 uint16_t vid = adapter->hw.mng_cookie.vlan_id;
307 uint16_t old_vid = adapter->mng_vlan_id;
308 if(adapter->vlgrp) {
309 if(!adapter->vlgrp->vlan_devices[vid]) {
310 if(adapter->hw.mng_cookie.status &
311 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
312 e1000_vlan_rx_add_vid(netdev, vid);
313 adapter->mng_vlan_id = vid;
314 } else
315 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
316
317 if((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
318 (vid != old_vid) &&
319 !adapter->vlgrp->vlan_devices[old_vid])
320 e1000_vlan_rx_kill_vid(netdev, old_vid);
321 }
322 }
323 }
324
325 /**
326 * e1000_release_hw_control - release control of the h/w to f/w
327 * @adapter: address of board private structure
328 *
329 * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
330 * For ASF and Pass Through versions of f/w this means that the
331 * driver is no longer loaded. For AMT version (only with 82573) i
332 * of the f/w this means that the netowrk i/f is closed.
333 *
334 **/
335
336 static inline void
337 e1000_release_hw_control(struct e1000_adapter *adapter)
338 {
339 uint32_t ctrl_ext;
340 uint32_t swsm;
341
342 /* Let firmware taken over control of h/w */
343 switch (adapter->hw.mac_type) {
344 case e1000_82571:
345 case e1000_82572:
346 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
347 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
348 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
349 break;
350 case e1000_82573:
351 swsm = E1000_READ_REG(&adapter->hw, SWSM);
352 E1000_WRITE_REG(&adapter->hw, SWSM,
353 swsm & ~E1000_SWSM_DRV_LOAD);
354 default:
355 break;
356 }
357 }
358
359 /**
360 * e1000_get_hw_control - get control of the h/w from f/w
361 * @adapter: address of board private structure
362 *
363 * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
364 * For ASF and Pass Through versions of f/w this means that
365 * the driver is loaded. For AMT version (only with 82573)
366 * of the f/w this means that the netowrk i/f is open.
367 *
368 **/
369
370 static inline void
371 e1000_get_hw_control(struct e1000_adapter *adapter)
372 {
373 uint32_t ctrl_ext;
374 uint32_t swsm;
375 /* Let firmware know the driver has taken over */
376 switch (adapter->hw.mac_type) {
377 case e1000_82571:
378 case e1000_82572:
379 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
380 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
381 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
382 break;
383 case e1000_82573:
384 swsm = E1000_READ_REG(&adapter->hw, SWSM);
385 E1000_WRITE_REG(&adapter->hw, SWSM,
386 swsm | E1000_SWSM_DRV_LOAD);
387 break;
388 default:
389 break;
390 }
391 }
392
393 int
394 e1000_up(struct e1000_adapter *adapter)
395 {
396 struct net_device *netdev = adapter->netdev;
397 int i, err;
398
399 /* hardware has been reset, we need to reload some things */
400
401 /* Reset the PHY if it was previously powered down */
402 if(adapter->hw.media_type == e1000_media_type_copper) {
403 uint16_t mii_reg;
404 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
405 if(mii_reg & MII_CR_POWER_DOWN)
406 e1000_phy_reset(&adapter->hw);
407 }
408
409 e1000_set_multi(netdev);
410
411 e1000_restore_vlan(adapter);
412
413 e1000_configure_tx(adapter);
414 e1000_setup_rctl(adapter);
415 e1000_configure_rx(adapter);
416 /* call E1000_DESC_UNUSED which always leaves
417 * at least 1 descriptor unused to make sure
418 * next_to_use != next_to_clean */
419 for (i = 0; i < adapter->num_rx_queues; i++) {
420 struct e1000_rx_ring *ring = &adapter->rx_ring[i];
421 adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
422 }
423
424 #ifdef CONFIG_PCI_MSI
425 if(adapter->hw.mac_type > e1000_82547_rev_2) {
426 adapter->have_msi = TRUE;
427 if((err = pci_enable_msi(adapter->pdev))) {
428 DPRINTK(PROBE, ERR,
429 "Unable to allocate MSI interrupt Error: %d\n", err);
430 adapter->have_msi = FALSE;
431 }
432 }
433 #endif
434 if((err = request_irq(adapter->pdev->irq, &e1000_intr,
435 SA_SHIRQ | SA_SAMPLE_RANDOM,
436 netdev->name, netdev))) {
437 DPRINTK(PROBE, ERR,
438 "Unable to allocate interrupt Error: %d\n", err);
439 return err;
440 }
441
442 #ifdef CONFIG_E1000_MQ
443 e1000_setup_queue_mapping(adapter);
444 #endif
445
446 adapter->tx_queue_len = netdev->tx_queue_len;
447
448 mod_timer(&adapter->watchdog_timer, jiffies);
449
450 #ifdef CONFIG_E1000_NAPI
451 netif_poll_enable(netdev);
452 #endif
453 e1000_irq_enable(adapter);
454
455 return 0;
456 }
457
458 void
459 e1000_down(struct e1000_adapter *adapter)
460 {
461 struct net_device *netdev = adapter->netdev;
462 boolean_t mng_mode_enabled = (adapter->hw.mac_type >= e1000_82571) &&
463 e1000_check_mng_mode(&adapter->hw);
464
465 e1000_irq_disable(adapter);
466 #ifdef CONFIG_E1000_MQ
467 while (atomic_read(&adapter->rx_sched_call_data.count) != 0);
468 #endif
469 free_irq(adapter->pdev->irq, netdev);
470 #ifdef CONFIG_PCI_MSI
471 if(adapter->hw.mac_type > e1000_82547_rev_2 &&
472 adapter->have_msi == TRUE)
473 pci_disable_msi(adapter->pdev);
474 #endif
475 del_timer_sync(&adapter->tx_fifo_stall_timer);
476 del_timer_sync(&adapter->watchdog_timer);
477 del_timer_sync(&adapter->phy_info_timer);
478
479 #ifdef CONFIG_E1000_NAPI
480 netif_poll_disable(netdev);
481 #endif
482 netdev->tx_queue_len = adapter->tx_queue_len;
483 adapter->link_speed = 0;
484 adapter->link_duplex = 0;
485 netif_carrier_off(netdev);
486 netif_stop_queue(netdev);
487
488 e1000_reset(adapter);
489 e1000_clean_all_tx_rings(adapter);
490 e1000_clean_all_rx_rings(adapter);
491
492 /* Power down the PHY so no link is implied when interface is down *
493 * The PHY cannot be powered down if any of the following is TRUE *
494 * (a) WoL is enabled
495 * (b) AMT is active
496 * (c) SoL/IDER session is active */
497 if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
498 adapter->hw.media_type == e1000_media_type_copper &&
499 !(E1000_READ_REG(&adapter->hw, MANC) & E1000_MANC_SMBUS_EN) &&
500 !mng_mode_enabled &&
501 !e1000_check_phy_reset_block(&adapter->hw)) {
502 uint16_t mii_reg;
503 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
504 mii_reg |= MII_CR_POWER_DOWN;
505 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
506 mdelay(1);
507 }
508 }
509
510 void
511 e1000_reset(struct e1000_adapter *adapter)
512 {
513 uint32_t pba, manc;
514 uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
515
516 /* Repartition Pba for greater than 9k mtu
517 * To take effect CTRL.RST is required.
518 */
519
520 switch (adapter->hw.mac_type) {
521 case e1000_82547:
522 case e1000_82547_rev_2:
523 pba = E1000_PBA_30K;
524 break;
525 case e1000_82571:
526 case e1000_82572:
527 pba = E1000_PBA_38K;
528 break;
529 case e1000_82573:
530 pba = E1000_PBA_12K;
531 break;
532 default:
533 pba = E1000_PBA_48K;
534 break;
535 }
536
537 if((adapter->hw.mac_type != e1000_82573) &&
538 (adapter->netdev->mtu > E1000_RXBUFFER_8192))
539 pba -= 8; /* allocate more FIFO for Tx */
540
541
542 if(adapter->hw.mac_type == e1000_82547) {
543 adapter->tx_fifo_head = 0;
544 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
545 adapter->tx_fifo_size =
546 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
547 atomic_set(&adapter->tx_fifo_stall, 0);
548 }
549
550 E1000_WRITE_REG(&adapter->hw, PBA, pba);
551
552 /* flow control settings */
553 /* Set the FC high water mark to 90% of the FIFO size.
554 * Required to clear last 3 LSB */
555 fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
556
557 adapter->hw.fc_high_water = fc_high_water_mark;
558 adapter->hw.fc_low_water = fc_high_water_mark - 8;
559 adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
560 adapter->hw.fc_send_xon = 1;
561 adapter->hw.fc = adapter->hw.original_fc;
562
563 /* Allow time for pending master requests to run */
564 e1000_reset_hw(&adapter->hw);
565 if(adapter->hw.mac_type >= e1000_82544)
566 E1000_WRITE_REG(&adapter->hw, WUC, 0);
567 if(e1000_init_hw(&adapter->hw))
568 DPRINTK(PROBE, ERR, "Hardware Error\n");
569 e1000_update_mng_vlan(adapter);
570 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
571 E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
572
573 e1000_reset_adaptive(&adapter->hw);
574 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
575 if (adapter->en_mng_pt) {
576 manc = E1000_READ_REG(&adapter->hw, MANC);
577 manc |= (E1000_MANC_ARP_EN | E1000_MANC_EN_MNG2HOST);
578 E1000_WRITE_REG(&adapter->hw, MANC, manc);
579 }
580 }
581
582 /**
583 * e1000_probe - Device Initialization Routine
584 * @pdev: PCI device information struct
585 * @ent: entry in e1000_pci_tbl
586 *
587 * Returns 0 on success, negative on failure
588 *
589 * e1000_probe initializes an adapter identified by a pci_dev structure.
590 * The OS initialization, configuring of the adapter private structure,
591 * and a hardware reset occur.
592 **/
593
594 static int __devinit
595 e1000_probe(struct pci_dev *pdev,
596 const struct pci_device_id *ent)
597 {
598 struct net_device *netdev;
599 struct e1000_adapter *adapter;
600 unsigned long mmio_start, mmio_len;
601
602 static int cards_found = 0;
603 int i, err, pci_using_dac;
604 uint16_t eeprom_data;
605 uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
606 if((err = pci_enable_device(pdev)))
607 return err;
608
609 if(!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK))) {
610 pci_using_dac = 1;
611 } else {
612 if((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK))) {
613 E1000_ERR("No usable DMA configuration, aborting\n");
614 return err;
615 }
616 pci_using_dac = 0;
617 }
618
619 if((err = pci_request_regions(pdev, e1000_driver_name)))
620 return err;
621
622 pci_set_master(pdev);
623
624 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
625 if(!netdev) {
626 err = -ENOMEM;
627 goto err_alloc_etherdev;
628 }
629
630 SET_MODULE_OWNER(netdev);
631 SET_NETDEV_DEV(netdev, &pdev->dev);
632
633 pci_set_drvdata(pdev, netdev);
634 adapter = netdev_priv(netdev);
635 adapter->netdev = netdev;
636 adapter->pdev = pdev;
637 adapter->hw.back = adapter;
638 adapter->msg_enable = (1 << debug) - 1;
639
640 mmio_start = pci_resource_start(pdev, BAR_0);
641 mmio_len = pci_resource_len(pdev, BAR_0);
642
643 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
644 if(!adapter->hw.hw_addr) {
645 err = -EIO;
646 goto err_ioremap;
647 }
648
649 for(i = BAR_1; i <= BAR_5; i++) {
650 if(pci_resource_len(pdev, i) == 0)
651 continue;
652 if(pci_resource_flags(pdev, i) & IORESOURCE_IO) {
653 adapter->hw.io_base = pci_resource_start(pdev, i);
654 break;
655 }
656 }
657
658 netdev->open = &e1000_open;
659 netdev->stop = &e1000_close;
660 netdev->hard_start_xmit = &e1000_xmit_frame;
661 netdev->get_stats = &e1000_get_stats;
662 netdev->set_multicast_list = &e1000_set_multi;
663 netdev->set_mac_address = &e1000_set_mac;
664 netdev->change_mtu = &e1000_change_mtu;
665 netdev->do_ioctl = &e1000_ioctl;
666 e1000_set_ethtool_ops(netdev);
667 netdev->tx_timeout = &e1000_tx_timeout;
668 netdev->watchdog_timeo = 5 * HZ;
669 #ifdef CONFIG_E1000_NAPI
670 netdev->poll = &e1000_clean;
671 netdev->weight = 64;
672 #endif
673 netdev->vlan_rx_register = e1000_vlan_rx_register;
674 netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
675 netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
676 #ifdef CONFIG_NET_POLL_CONTROLLER
677 netdev->poll_controller = e1000_netpoll;
678 #endif
679 strcpy(netdev->name, pci_name(pdev));
680
681 netdev->mem_start = mmio_start;
682 netdev->mem_end = mmio_start + mmio_len;
683 netdev->base_addr = adapter->hw.io_base;
684
685 adapter->bd_number = cards_found;
686
687 /* setup the private structure */
688
689 if((err = e1000_sw_init(adapter)))
690 goto err_sw_init;
691
692 if((err = e1000_check_phy_reset_block(&adapter->hw)))
693 DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
694
695 if(adapter->hw.mac_type >= e1000_82543) {
696 netdev->features = NETIF_F_SG |
697 NETIF_F_HW_CSUM |
698 NETIF_F_HW_VLAN_TX |
699 NETIF_F_HW_VLAN_RX |
700 NETIF_F_HW_VLAN_FILTER;
701 }
702
703 #ifdef NETIF_F_TSO
704 if((adapter->hw.mac_type >= e1000_82544) &&
705 (adapter->hw.mac_type != e1000_82547))
706 netdev->features |= NETIF_F_TSO;
707
708 #ifdef NETIF_F_TSO_IPV6
709 if(adapter->hw.mac_type > e1000_82547_rev_2)
710 netdev->features |= NETIF_F_TSO_IPV6;
711 #endif
712 #endif
713 if(pci_using_dac)
714 netdev->features |= NETIF_F_HIGHDMA;
715
716 /* hard_start_xmit is safe against parallel locking */
717 netdev->features |= NETIF_F_LLTX;
718
719 adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
720
721 /* before reading the EEPROM, reset the controller to
722 * put the device in a known good starting state */
723
724 e1000_reset_hw(&adapter->hw);
725
726 /* make sure the EEPROM is good */
727
728 if(e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
729 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
730 err = -EIO;
731 goto err_eeprom;
732 }
733
734 /* copy the MAC address out of the EEPROM */
735
736 if(e1000_read_mac_addr(&adapter->hw))
737 DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
738 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
739 memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
740
741 if(!is_valid_ether_addr(netdev->perm_addr)) {
742 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
743 err = -EIO;
744 goto err_eeprom;
745 }
746
747 e1000_read_part_num(&adapter->hw, &(adapter->part_num));
748
749 e1000_get_bus_info(&adapter->hw);
750
751 init_timer(&adapter->tx_fifo_stall_timer);
752 adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
753 adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
754
755 init_timer(&adapter->watchdog_timer);
756 adapter->watchdog_timer.function = &e1000_watchdog;
757 adapter->watchdog_timer.data = (unsigned long) adapter;
758
759 INIT_WORK(&adapter->watchdog_task,
760 (void (*)(void *))e1000_watchdog_task, adapter);
761
762 init_timer(&adapter->phy_info_timer);
763 adapter->phy_info_timer.function = &e1000_update_phy_info;
764 adapter->phy_info_timer.data = (unsigned long) adapter;
765
766 INIT_WORK(&adapter->tx_timeout_task,
767 (void (*)(void *))e1000_tx_timeout_task, netdev);
768
769 /* we're going to reset, so assume we have no link for now */
770
771 netif_carrier_off(netdev);
772 netif_stop_queue(netdev);
773
774 e1000_check_options(adapter);
775
776 /* Initial Wake on LAN setting
777 * If APM wake is enabled in the EEPROM,
778 * enable the ACPI Magic Packet filter
779 */
780
781 switch(adapter->hw.mac_type) {
782 case e1000_82542_rev2_0:
783 case e1000_82542_rev2_1:
784 case e1000_82543:
785 break;
786 case e1000_82544:
787 e1000_read_eeprom(&adapter->hw,
788 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
789 eeprom_apme_mask = E1000_EEPROM_82544_APM;
790 break;
791 case e1000_82546:
792 case e1000_82546_rev_3:
793 case e1000_82571:
794 if((E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1)
795 && (adapter->hw.media_type == e1000_media_type_copper)) {
796 e1000_read_eeprom(&adapter->hw,
797 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
798 break;
799 }
800 /* Fall Through */
801 default:
802 e1000_read_eeprom(&adapter->hw,
803 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
804 break;
805 }
806 if(eeprom_data & eeprom_apme_mask)
807 adapter->wol |= E1000_WUFC_MAG;
808
809 /* reset the hardware with the new settings */
810 e1000_reset(adapter);
811
812 /* If the controller is 82573 and f/w is AMT, do not set
813 * DRV_LOAD until the interface is up. For all other cases,
814 * let the f/w know that the h/w is now under the control
815 * of the driver. */
816 if (adapter->hw.mac_type != e1000_82573 ||
817 !e1000_check_mng_mode(&adapter->hw))
818 e1000_get_hw_control(adapter);
819
820 strcpy(netdev->name, "eth%d");
821 if((err = register_netdev(netdev)))
822 goto err_register;
823
824 DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
825
826 cards_found++;
827 return 0;
828
829 err_register:
830 err_sw_init:
831 err_eeprom:
832 iounmap(adapter->hw.hw_addr);
833 err_ioremap:
834 free_netdev(netdev);
835 err_alloc_etherdev:
836 pci_release_regions(pdev);
837 return err;
838 }
839
840 /**
841 * e1000_remove - Device Removal Routine
842 * @pdev: PCI device information struct
843 *
844 * e1000_remove is called by the PCI subsystem to alert the driver
845 * that it should release a PCI device. The could be caused by a
846 * Hot-Plug event, or because the driver is going to be removed from
847 * memory.
848 **/
849
850 static void __devexit
851 e1000_remove(struct pci_dev *pdev)
852 {
853 struct net_device *netdev = pci_get_drvdata(pdev);
854 struct e1000_adapter *adapter = netdev_priv(netdev);
855 uint32_t manc;
856 #ifdef CONFIG_E1000_NAPI
857 int i;
858 #endif
859
860 flush_scheduled_work();
861
862 if(adapter->hw.mac_type >= e1000_82540 &&
863 adapter->hw.media_type == e1000_media_type_copper) {
864 manc = E1000_READ_REG(&adapter->hw, MANC);
865 if(manc & E1000_MANC_SMBUS_EN) {
866 manc |= E1000_MANC_ARP_EN;
867 E1000_WRITE_REG(&adapter->hw, MANC, manc);
868 }
869 }
870
871 /* Release control of h/w to f/w. If f/w is AMT enabled, this
872 * would have already happened in close and is redundant. */
873 e1000_release_hw_control(adapter);
874
875 unregister_netdev(netdev);
876 #ifdef CONFIG_E1000_NAPI
877 for (i = 0; i < adapter->num_rx_queues; i++)
878 __dev_put(&adapter->polling_netdev[i]);
879 #endif
880
881 if(!e1000_check_phy_reset_block(&adapter->hw))
882 e1000_phy_hw_reset(&adapter->hw);
883
884 kfree(adapter->tx_ring);
885 kfree(adapter->rx_ring);
886 #ifdef CONFIG_E1000_NAPI
887 kfree(adapter->polling_netdev);
888 #endif
889
890 iounmap(adapter->hw.hw_addr);
891 pci_release_regions(pdev);
892
893 #ifdef CONFIG_E1000_MQ
894 free_percpu(adapter->cpu_netdev);
895 free_percpu(adapter->cpu_tx_ring);
896 #endif
897 free_netdev(netdev);
898
899 pci_disable_device(pdev);
900 }
901
902 /**
903 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
904 * @adapter: board private structure to initialize
905 *
906 * e1000_sw_init initializes the Adapter private data structure.
907 * Fields are initialized based on PCI device information and
908 * OS network device settings (MTU size).
909 **/
910
911 static int __devinit
912 e1000_sw_init(struct e1000_adapter *adapter)
913 {
914 struct e1000_hw *hw = &adapter->hw;
915 struct net_device *netdev = adapter->netdev;
916 struct pci_dev *pdev = adapter->pdev;
917 #ifdef CONFIG_E1000_NAPI
918 int i;
919 #endif
920
921 /* PCI config space info */
922
923 hw->vendor_id = pdev->vendor;
924 hw->device_id = pdev->device;
925 hw->subsystem_vendor_id = pdev->subsystem_vendor;
926 hw->subsystem_id = pdev->subsystem_device;
927
928 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
929
930 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
931
932 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
933 adapter->rx_ps_bsize0 = E1000_RXBUFFER_256;
934 hw->max_frame_size = netdev->mtu +
935 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
936 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
937
938 /* identify the MAC */
939
940 if(e1000_set_mac_type(hw)) {
941 DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
942 return -EIO;
943 }
944
945 /* initialize eeprom parameters */
946
947 if(e1000_init_eeprom_params(hw)) {
948 E1000_ERR("EEPROM initialization failed\n");
949 return -EIO;
950 }
951
952 switch(hw->mac_type) {
953 default:
954 break;
955 case e1000_82541:
956 case e1000_82547:
957 case e1000_82541_rev_2:
958 case e1000_82547_rev_2:
959 hw->phy_init_script = 1;
960 break;
961 }
962
963 e1000_set_media_type(hw);
964
965 hw->wait_autoneg_complete = FALSE;
966 hw->tbi_compatibility_en = TRUE;
967 hw->adaptive_ifs = TRUE;
968
969 /* Copper options */
970
971 if(hw->media_type == e1000_media_type_copper) {
972 hw->mdix = AUTO_ALL_MODES;
973 hw->disable_polarity_correction = FALSE;
974 hw->master_slave = E1000_MASTER_SLAVE;
975 }
976
977 #ifdef CONFIG_E1000_MQ
978 /* Number of supported queues */
979 switch (hw->mac_type) {
980 case e1000_82571:
981 case e1000_82572:
982 /* These controllers support 2 tx queues, but with a single
983 * qdisc implementation, multiple tx queues aren't quite as
984 * interesting. If we can find a logical way of mapping
985 * flows to a queue, then perhaps we can up the num_tx_queue
986 * count back to its default. Until then, we run the risk of
987 * terrible performance due to SACK overload. */
988 adapter->num_tx_queues = 1;
989 adapter->num_rx_queues = 2;
990 break;
991 default:
992 adapter->num_tx_queues = 1;
993 adapter->num_rx_queues = 1;
994 break;
995 }
996 adapter->num_rx_queues = min(adapter->num_rx_queues, num_online_cpus());
997 adapter->num_tx_queues = min(adapter->num_tx_queues, num_online_cpus());
998 DPRINTK(DRV, INFO, "Multiqueue Enabled: Rx Queue count = %u %s\n",
999 adapter->num_rx_queues,
1000 ((adapter->num_rx_queues == 1)
1001 ? ((num_online_cpus() > 1)
1002 ? "(due to unsupported feature in current adapter)"
1003 : "(due to unsupported system configuration)")
1004 : ""));
1005 DPRINTK(DRV, INFO, "Multiqueue Enabled: Tx Queue count = %u\n",
1006 adapter->num_tx_queues);
1007 #else
1008 adapter->num_tx_queues = 1;
1009 adapter->num_rx_queues = 1;
1010 #endif
1011
1012 if (e1000_alloc_queues(adapter)) {
1013 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
1014 return -ENOMEM;
1015 }
1016
1017 #ifdef CONFIG_E1000_NAPI
1018 for (i = 0; i < adapter->num_rx_queues; i++) {
1019 adapter->polling_netdev[i].priv = adapter;
1020 adapter->polling_netdev[i].poll = &e1000_clean;
1021 adapter->polling_netdev[i].weight = 64;
1022 dev_hold(&adapter->polling_netdev[i]);
1023 set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
1024 }
1025 spin_lock_init(&adapter->tx_queue_lock);
1026 #endif
1027
1028 atomic_set(&adapter->irq_sem, 1);
1029 spin_lock_init(&adapter->stats_lock);
1030
1031 return 0;
1032 }
1033
1034 /**
1035 * e1000_alloc_queues - Allocate memory for all rings
1036 * @adapter: board private structure to initialize
1037 *
1038 * We allocate one ring per queue at run-time since we don't know the
1039 * number of queues at compile-time. The polling_netdev array is
1040 * intended for Multiqueue, but should work fine with a single queue.
1041 **/
1042
1043 static int __devinit
1044 e1000_alloc_queues(struct e1000_adapter *adapter)
1045 {
1046 int size;
1047
1048 size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues;
1049 adapter->tx_ring = kmalloc(size, GFP_KERNEL);
1050 if (!adapter->tx_ring)
1051 return -ENOMEM;
1052 memset(adapter->tx_ring, 0, size);
1053
1054 size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues;
1055 adapter->rx_ring = kmalloc(size, GFP_KERNEL);
1056 if (!adapter->rx_ring) {
1057 kfree(adapter->tx_ring);
1058 return -ENOMEM;
1059 }
1060 memset(adapter->rx_ring, 0, size);
1061
1062 #ifdef CONFIG_E1000_NAPI
1063 size = sizeof(struct net_device) * adapter->num_rx_queues;
1064 adapter->polling_netdev = kmalloc(size, GFP_KERNEL);
1065 if (!adapter->polling_netdev) {
1066 kfree(adapter->tx_ring);
1067 kfree(adapter->rx_ring);
1068 return -ENOMEM;
1069 }
1070 memset(adapter->polling_netdev, 0, size);
1071 #endif
1072
1073 #ifdef CONFIG_E1000_MQ
1074 adapter->rx_sched_call_data.func = e1000_rx_schedule;
1075 adapter->rx_sched_call_data.info = adapter->netdev;
1076
1077 adapter->cpu_netdev = alloc_percpu(struct net_device *);
1078 adapter->cpu_tx_ring = alloc_percpu(struct e1000_tx_ring *);
1079 #endif
1080
1081 return E1000_SUCCESS;
1082 }
1083
1084 #ifdef CONFIG_E1000_MQ
1085 static void __devinit
1086 e1000_setup_queue_mapping(struct e1000_adapter *adapter)
1087 {
1088 int i, cpu;
1089
1090 adapter->rx_sched_call_data.func = e1000_rx_schedule;
1091 adapter->rx_sched_call_data.info = adapter->netdev;
1092 cpus_clear(adapter->rx_sched_call_data.cpumask);
1093
1094 adapter->cpu_netdev = alloc_percpu(struct net_device *);
1095 adapter->cpu_tx_ring = alloc_percpu(struct e1000_tx_ring *);
1096
1097 lock_cpu_hotplug();
1098 i = 0;
1099 for_each_online_cpu(cpu) {
1100 *per_cpu_ptr(adapter->cpu_tx_ring, cpu) = &adapter->tx_ring[i % adapter->num_tx_queues];
1101 /* This is incomplete because we'd like to assign separate
1102 * physical cpus to these netdev polling structures and
1103 * avoid saturating a subset of cpus.
1104 */
1105 if (i < adapter->num_rx_queues) {
1106 *per_cpu_ptr(adapter->cpu_netdev, cpu) = &adapter->polling_netdev[i];
1107 adapter->rx_ring[i].cpu = cpu;
1108 cpu_set(cpu, adapter->cpumask);
1109 } else
1110 *per_cpu_ptr(adapter->cpu_netdev, cpu) = NULL;
1111
1112 i++;
1113 }
1114 unlock_cpu_hotplug();
1115 }
1116 #endif
1117
1118 /**
1119 * e1000_open - Called when a network interface is made active
1120 * @netdev: network interface device structure
1121 *
1122 * Returns 0 on success, negative value on failure
1123 *
1124 * The open entry point is called when a network interface is made
1125 * active by the system (IFF_UP). At this point all resources needed
1126 * for transmit and receive operations are allocated, the interrupt
1127 * handler is registered with the OS, the watchdog timer is started,
1128 * and the stack is notified that the interface is ready.
1129 **/
1130
1131 static int
1132 e1000_open(struct net_device *netdev)
1133 {
1134 struct e1000_adapter *adapter = netdev_priv(netdev);
1135 int err;
1136
1137 /* allocate transmit descriptors */
1138
1139 if ((err = e1000_setup_all_tx_resources(adapter)))
1140 goto err_setup_tx;
1141
1142 /* allocate receive descriptors */
1143
1144 if ((err = e1000_setup_all_rx_resources(adapter)))
1145 goto err_setup_rx;
1146
1147 if((err = e1000_up(adapter)))
1148 goto err_up;
1149 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
1150 if((adapter->hw.mng_cookie.status &
1151 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1152 e1000_update_mng_vlan(adapter);
1153 }
1154
1155 /* If AMT is enabled, let the firmware know that the network
1156 * interface is now open */
1157 if (adapter->hw.mac_type == e1000_82573 &&
1158 e1000_check_mng_mode(&adapter->hw))
1159 e1000_get_hw_control(adapter);
1160
1161 return E1000_SUCCESS;
1162
1163 err_up:
1164 e1000_free_all_rx_resources(adapter);
1165 err_setup_rx:
1166 e1000_free_all_tx_resources(adapter);
1167 err_setup_tx:
1168 e1000_reset(adapter);
1169
1170 return err;
1171 }
1172
1173 /**
1174 * e1000_close - Disables a network interface
1175 * @netdev: network interface device structure
1176 *
1177 * Returns 0, this is not allowed to fail
1178 *
1179 * The close entry point is called when an interface is de-activated
1180 * by the OS. The hardware is still under the drivers control, but
1181 * needs to be disabled. A global MAC reset is issued to stop the
1182 * hardware, and all transmit and receive resources are freed.
1183 **/
1184
1185 static int
1186 e1000_close(struct net_device *netdev)
1187 {
1188 struct e1000_adapter *adapter = netdev_priv(netdev);
1189
1190 e1000_down(adapter);
1191
1192 e1000_free_all_tx_resources(adapter);
1193 e1000_free_all_rx_resources(adapter);
1194
1195 if((adapter->hw.mng_cookie.status &
1196 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1197 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1198 }
1199
1200 /* If AMT is enabled, let the firmware know that the network
1201 * interface is now closed */
1202 if (adapter->hw.mac_type == e1000_82573 &&
1203 e1000_check_mng_mode(&adapter->hw))
1204 e1000_release_hw_control(adapter);
1205
1206 return 0;
1207 }
1208
1209 /**
1210 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1211 * @adapter: address of board private structure
1212 * @start: address of beginning of memory
1213 * @len: length of memory
1214 **/
1215 static inline boolean_t
1216 e1000_check_64k_bound(struct e1000_adapter *adapter,
1217 void *start, unsigned long len)
1218 {
1219 unsigned long begin = (unsigned long) start;
1220 unsigned long end = begin + len;
1221
1222 /* First rev 82545 and 82546 need to not allow any memory
1223 * write location to cross 64k boundary due to errata 23 */
1224 if (adapter->hw.mac_type == e1000_82545 ||
1225 adapter->hw.mac_type == e1000_82546) {
1226 return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
1227 }
1228
1229 return TRUE;
1230 }
1231
1232 /**
1233 * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1234 * @adapter: board private structure
1235 * @txdr: tx descriptor ring (for a specific queue) to setup
1236 *
1237 * Return 0 on success, negative on failure
1238 **/
1239
1240 static int
1241 e1000_setup_tx_resources(struct e1000_adapter *adapter,
1242 struct e1000_tx_ring *txdr)
1243 {
1244 struct pci_dev *pdev = adapter->pdev;
1245 int size;
1246
1247 size = sizeof(struct e1000_buffer) * txdr->count;
1248
1249 txdr->buffer_info = vmalloc_node(size, pcibus_to_node(pdev->bus));
1250 if(!txdr->buffer_info) {
1251 DPRINTK(PROBE, ERR,
1252 "Unable to allocate memory for the transmit descriptor ring\n");
1253 return -ENOMEM;
1254 }
1255 memset(txdr->buffer_info, 0, size);
1256
1257 /* round up to nearest 4K */
1258
1259 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
1260 E1000_ROUNDUP(txdr->size, 4096);
1261
1262 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
1263 if(!txdr->desc) {
1264 setup_tx_desc_die:
1265 vfree(txdr->buffer_info);
1266 DPRINTK(PROBE, ERR,
1267 "Unable to allocate memory for the transmit descriptor ring\n");
1268 return -ENOMEM;
1269 }
1270
1271 /* Fix for errata 23, can't cross 64kB boundary */
1272 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1273 void *olddesc = txdr->desc;
1274 dma_addr_t olddma = txdr->dma;
1275 DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
1276 "at %p\n", txdr->size, txdr->desc);
1277 /* Try again, without freeing the previous */
1278 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
1279 if(!txdr->desc) {
1280 /* Failed allocation, critical failure */
1281 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1282 goto setup_tx_desc_die;
1283 }
1284
1285 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1286 /* give up */
1287 pci_free_consistent(pdev, txdr->size, txdr->desc,
1288 txdr->dma);
1289 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1290 DPRINTK(PROBE, ERR,
1291 "Unable to allocate aligned memory "
1292 "for the transmit descriptor ring\n");
1293 vfree(txdr->buffer_info);
1294 return -ENOMEM;
1295 } else {
1296 /* Free old allocation, new allocation was successful */
1297 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1298 }
1299 }
1300 memset(txdr->desc, 0, txdr->size);
1301
1302 txdr->next_to_use = 0;
1303 txdr->next_to_clean = 0;
1304 spin_lock_init(&txdr->tx_lock);
1305
1306 return 0;
1307 }
1308
1309 /**
1310 * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1311 * (Descriptors) for all queues
1312 * @adapter: board private structure
1313 *
1314 * If this function returns with an error, then it's possible one or
1315 * more of the rings is populated (while the rest are not). It is the
1316 * callers duty to clean those orphaned rings.
1317 *
1318 * Return 0 on success, negative on failure
1319 **/
1320
1321 int
1322 e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
1323 {
1324 int i, err = 0;
1325
1326 for (i = 0; i < adapter->num_tx_queues; i++) {
1327 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1328 if (err) {
1329 DPRINTK(PROBE, ERR,
1330 "Allocation for Tx Queue %u failed\n", i);
1331 break;
1332 }
1333 }
1334
1335 return err;
1336 }
1337
1338 /**
1339 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1340 * @adapter: board private structure
1341 *
1342 * Configure the Tx unit of the MAC after a reset.
1343 **/
1344
1345 static void
1346 e1000_configure_tx(struct e1000_adapter *adapter)
1347 {
1348 uint64_t tdba;
1349 struct e1000_hw *hw = &adapter->hw;
1350 uint32_t tdlen, tctl, tipg, tarc;
1351 uint32_t ipgr1, ipgr2;
1352
1353 /* Setup the HW Tx Head and Tail descriptor pointers */
1354
1355 switch (adapter->num_tx_queues) {
1356 case 2:
1357 tdba = adapter->tx_ring[1].dma;
1358 tdlen = adapter->tx_ring[1].count *
1359 sizeof(struct e1000_tx_desc);
1360 E1000_WRITE_REG(hw, TDBAL1, (tdba & 0x00000000ffffffffULL));
1361 E1000_WRITE_REG(hw, TDBAH1, (tdba >> 32));
1362 E1000_WRITE_REG(hw, TDLEN1, tdlen);
1363 E1000_WRITE_REG(hw, TDH1, 0);
1364 E1000_WRITE_REG(hw, TDT1, 0);
1365 adapter->tx_ring[1].tdh = E1000_TDH1;
1366 adapter->tx_ring[1].tdt = E1000_TDT1;
1367 /* Fall Through */
1368 case 1:
1369 default:
1370 tdba = adapter->tx_ring[0].dma;
1371 tdlen = adapter->tx_ring[0].count *
1372 sizeof(struct e1000_tx_desc);
1373 E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
1374 E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
1375 E1000_WRITE_REG(hw, TDLEN, tdlen);
1376 E1000_WRITE_REG(hw, TDH, 0);
1377 E1000_WRITE_REG(hw, TDT, 0);
1378 adapter->tx_ring[0].tdh = E1000_TDH;
1379 adapter->tx_ring[0].tdt = E1000_TDT;
1380 break;
1381 }
1382
1383 /* Set the default values for the Tx Inter Packet Gap timer */
1384
1385 if (hw->media_type == e1000_media_type_fiber ||
1386 hw->media_type == e1000_media_type_internal_serdes)
1387 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1388 else
1389 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1390
1391 switch (hw->mac_type) {
1392 case e1000_82542_rev2_0:
1393 case e1000_82542_rev2_1:
1394 tipg = DEFAULT_82542_TIPG_IPGT;
1395 ipgr1 = DEFAULT_82542_TIPG_IPGR1;
1396 ipgr2 = DEFAULT_82542_TIPG_IPGR2;
1397 break;
1398 default:
1399 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1400 ipgr2 = DEFAULT_82543_TIPG_IPGR2;
1401 break;
1402 }
1403 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
1404 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
1405 E1000_WRITE_REG(hw, TIPG, tipg);
1406
1407 /* Set the Tx Interrupt Delay register */
1408
1409 E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
1410 if (hw->mac_type >= e1000_82540)
1411 E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
1412
1413 /* Program the Transmit Control Register */
1414
1415 tctl = E1000_READ_REG(hw, TCTL);
1416
1417 tctl &= ~E1000_TCTL_CT;
1418 tctl |= E1000_TCTL_EN | E1000_TCTL_PSP | E1000_TCTL_RTLC |
1419 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1420
1421 E1000_WRITE_REG(hw, TCTL, tctl);
1422
1423 if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
1424 tarc = E1000_READ_REG(hw, TARC0);
1425 tarc |= ((1 << 25) | (1 << 21));
1426 E1000_WRITE_REG(hw, TARC0, tarc);
1427 tarc = E1000_READ_REG(hw, TARC1);
1428 tarc |= (1 << 25);
1429 if (tctl & E1000_TCTL_MULR)
1430 tarc &= ~(1 << 28);
1431 else
1432 tarc |= (1 << 28);
1433 E1000_WRITE_REG(hw, TARC1, tarc);
1434 }
1435
1436 e1000_config_collision_dist(hw);
1437
1438 /* Setup Transmit Descriptor Settings for eop descriptor */
1439 adapter->txd_cmd = E1000_TXD_CMD_IDE | E1000_TXD_CMD_EOP |
1440 E1000_TXD_CMD_IFCS;
1441
1442 if (hw->mac_type < e1000_82543)
1443 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1444 else
1445 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1446
1447 /* Cache if we're 82544 running in PCI-X because we'll
1448 * need this to apply a workaround later in the send path. */
1449 if (hw->mac_type == e1000_82544 &&
1450 hw->bus_type == e1000_bus_type_pcix)
1451 adapter->pcix_82544 = 1;
1452 }
1453
1454 /**
1455 * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1456 * @adapter: board private structure
1457 * @rxdr: rx descriptor ring (for a specific queue) to setup
1458 *
1459 * Returns 0 on success, negative on failure
1460 **/
1461
1462 static int
1463 e1000_setup_rx_resources(struct e1000_adapter *adapter,
1464 struct e1000_rx_ring *rxdr)
1465 {
1466 struct pci_dev *pdev = adapter->pdev;
1467 int size, desc_len;
1468
1469 size = sizeof(struct e1000_buffer) * rxdr->count;
1470 rxdr->buffer_info = vmalloc_node(size, pcibus_to_node(pdev->bus));
1471 if (!rxdr->buffer_info) {
1472 DPRINTK(PROBE, ERR,
1473 "Unable to allocate memory for the receive descriptor ring\n");
1474 return -ENOMEM;
1475 }
1476 memset(rxdr->buffer_info, 0, size);
1477
1478 size = sizeof(struct e1000_ps_page) * rxdr->count;
1479 rxdr->ps_page = kmalloc(size, GFP_KERNEL);
1480 if(!rxdr->ps_page) {
1481 vfree(rxdr->buffer_info);
1482 DPRINTK(PROBE, ERR,
1483 "Unable to allocate memory for the receive descriptor ring\n");
1484 return -ENOMEM;
1485 }
1486 memset(rxdr->ps_page, 0, size);
1487
1488 size = sizeof(struct e1000_ps_page_dma) * rxdr->count;
1489 rxdr->ps_page_dma = kmalloc(size, GFP_KERNEL);
1490 if(!rxdr->ps_page_dma) {
1491 vfree(rxdr->buffer_info);
1492 kfree(rxdr->ps_page);
1493 DPRINTK(PROBE, ERR,
1494 "Unable to allocate memory for the receive descriptor ring\n");
1495 return -ENOMEM;
1496 }
1497 memset(rxdr->ps_page_dma, 0, size);
1498
1499 if(adapter->hw.mac_type <= e1000_82547_rev_2)
1500 desc_len = sizeof(struct e1000_rx_desc);
1501 else
1502 desc_len = sizeof(union e1000_rx_desc_packet_split);
1503
1504 /* Round up to nearest 4K */
1505
1506 rxdr->size = rxdr->count * desc_len;
1507 E1000_ROUNDUP(rxdr->size, 4096);
1508
1509 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1510
1511 if (!rxdr->desc) {
1512 DPRINTK(PROBE, ERR,
1513 "Unable to allocate memory for the receive descriptor ring\n");
1514 setup_rx_desc_die:
1515 vfree(rxdr->buffer_info);
1516 kfree(rxdr->ps_page);
1517 kfree(rxdr->ps_page_dma);
1518 return -ENOMEM;
1519 }
1520
1521 /* Fix for errata 23, can't cross 64kB boundary */
1522 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1523 void *olddesc = rxdr->desc;
1524 dma_addr_t olddma = rxdr->dma;
1525 DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
1526 "at %p\n", rxdr->size, rxdr->desc);
1527 /* Try again, without freeing the previous */
1528 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1529 /* Failed allocation, critical failure */
1530 if (!rxdr->desc) {
1531 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1532 DPRINTK(PROBE, ERR,
1533 "Unable to allocate memory "
1534 "for the receive descriptor ring\n");
1535 goto setup_rx_desc_die;
1536 }
1537
1538 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1539 /* give up */
1540 pci_free_consistent(pdev, rxdr->size, rxdr->desc,
1541 rxdr->dma);
1542 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1543 DPRINTK(PROBE, ERR,
1544 "Unable to allocate aligned memory "
1545 "for the receive descriptor ring\n");
1546 goto setup_rx_desc_die;
1547 } else {
1548 /* Free old allocation, new allocation was successful */
1549 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1550 }
1551 }
1552 memset(rxdr->desc, 0, rxdr->size);
1553
1554 rxdr->next_to_clean = 0;
1555 rxdr->next_to_use = 0;
1556 rxdr->rx_skb_top = NULL;
1557 rxdr->rx_skb_prev = NULL;
1558
1559 return 0;
1560 }
1561
1562 /**
1563 * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1564 * (Descriptors) for all queues
1565 * @adapter: board private structure
1566 *
1567 * If this function returns with an error, then it's possible one or
1568 * more of the rings is populated (while the rest are not). It is the
1569 * callers duty to clean those orphaned rings.
1570 *
1571 * Return 0 on success, negative on failure
1572 **/
1573
1574 int
1575 e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
1576 {
1577 int i, err = 0;
1578
1579 for (i = 0; i < adapter->num_rx_queues; i++) {
1580 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1581 if (err) {
1582 DPRINTK(PROBE, ERR,
1583 "Allocation for Rx Queue %u failed\n", i);
1584 break;
1585 }
1586 }
1587
1588 return err;
1589 }
1590
1591 /**
1592 * e1000_setup_rctl - configure the receive control registers
1593 * @adapter: Board private structure
1594 **/
1595 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1596 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
1597 static void
1598 e1000_setup_rctl(struct e1000_adapter *adapter)
1599 {
1600 uint32_t rctl, rfctl;
1601 uint32_t psrctl = 0;
1602 #ifdef CONFIG_E1000_PACKET_SPLIT
1603 uint32_t pages = 0;
1604 #endif
1605
1606 rctl = E1000_READ_REG(&adapter->hw, RCTL);
1607
1608 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1609
1610 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1611 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1612 (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
1613
1614 if (adapter->hw.mac_type > e1000_82543)
1615 rctl |= E1000_RCTL_SECRC;
1616
1617 if (adapter->hw.tbi_compatibility_on == 1)
1618 rctl |= E1000_RCTL_SBP;
1619 else
1620 rctl &= ~E1000_RCTL_SBP;
1621
1622 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1623 rctl &= ~E1000_RCTL_LPE;
1624 else
1625 rctl |= E1000_RCTL_LPE;
1626
1627 /* Setup buffer sizes */
1628 if(adapter->hw.mac_type >= e1000_82571) {
1629 /* We can now specify buffers in 1K increments.
1630 * BSIZE and BSEX are ignored in this case. */
1631 rctl |= adapter->rx_buffer_len << 0x11;
1632 } else {
1633 rctl &= ~E1000_RCTL_SZ_4096;
1634 rctl |= E1000_RCTL_BSEX;
1635 switch (adapter->rx_buffer_len) {
1636 case E1000_RXBUFFER_2048:
1637 default:
1638 rctl |= E1000_RCTL_SZ_2048;
1639 rctl &= ~E1000_RCTL_BSEX;
1640 break;
1641 case E1000_RXBUFFER_4096:
1642 rctl |= E1000_RCTL_SZ_4096;
1643 break;
1644 case E1000_RXBUFFER_8192:
1645 rctl |= E1000_RCTL_SZ_8192;
1646 break;
1647 case E1000_RXBUFFER_16384:
1648 rctl |= E1000_RCTL_SZ_16384;
1649 break;
1650 }
1651 }
1652
1653 #ifdef CONFIG_E1000_PACKET_SPLIT
1654 /* 82571 and greater support packet-split where the protocol
1655 * header is placed in skb->data and the packet data is
1656 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
1657 * In the case of a non-split, skb->data is linearly filled,
1658 * followed by the page buffers. Therefore, skb->data is
1659 * sized to hold the largest protocol header.
1660 */
1661 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
1662 if ((adapter->hw.mac_type > e1000_82547_rev_2) && (pages <= 3) &&
1663 PAGE_SIZE <= 16384)
1664 adapter->rx_ps_pages = pages;
1665 else
1666 adapter->rx_ps_pages = 0;
1667 #endif
1668 if (adapter->rx_ps_pages) {
1669 /* Configure extra packet-split registers */
1670 rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
1671 rfctl |= E1000_RFCTL_EXTEN;
1672 /* disable IPv6 packet split support */
1673 rfctl |= E1000_RFCTL_IPV6_DIS;
1674 E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
1675
1676 rctl |= E1000_RCTL_DTYP_PS | E1000_RCTL_SECRC;
1677
1678 psrctl |= adapter->rx_ps_bsize0 >>
1679 E1000_PSRCTL_BSIZE0_SHIFT;
1680
1681 switch (adapter->rx_ps_pages) {
1682 case 3:
1683 psrctl |= PAGE_SIZE <<
1684 E1000_PSRCTL_BSIZE3_SHIFT;
1685 case 2:
1686 psrctl |= PAGE_SIZE <<
1687 E1000_PSRCTL_BSIZE2_SHIFT;
1688 case 1:
1689 psrctl |= PAGE_SIZE >>
1690 E1000_PSRCTL_BSIZE1_SHIFT;
1691 break;
1692 }
1693
1694 E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
1695 }
1696
1697 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
1698 }
1699
1700 /**
1701 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
1702 * @adapter: board private structure
1703 *
1704 * Configure the Rx unit of the MAC after a reset.
1705 **/
1706
1707 static void
1708 e1000_configure_rx(struct e1000_adapter *adapter)
1709 {
1710 uint64_t rdba;
1711 struct e1000_hw *hw = &adapter->hw;
1712 uint32_t rdlen, rctl, rxcsum, ctrl_ext;
1713 #ifdef CONFIG_E1000_MQ
1714 uint32_t reta, mrqc;
1715 int i;
1716 #endif
1717
1718 if (adapter->rx_ps_pages) {
1719 rdlen = adapter->rx_ring[0].count *
1720 sizeof(union e1000_rx_desc_packet_split);
1721 adapter->clean_rx = e1000_clean_rx_irq_ps;
1722 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
1723 } else {
1724 rdlen = adapter->rx_ring[0].count *
1725 sizeof(struct e1000_rx_desc);
1726 adapter->clean_rx = e1000_clean_rx_irq;
1727 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
1728 }
1729
1730 /* disable receives while setting up the descriptors */
1731 rctl = E1000_READ_REG(hw, RCTL);
1732 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
1733
1734 /* set the Receive Delay Timer Register */
1735 E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
1736
1737 if (hw->mac_type >= e1000_82540) {
1738 E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
1739 if(adapter->itr > 1)
1740 E1000_WRITE_REG(hw, ITR,
1741 1000000000 / (adapter->itr * 256));
1742 }
1743
1744 if (hw->mac_type >= e1000_82571) {
1745 ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
1746 /* Reset delay timers after every interrupt */
1747 ctrl_ext |= E1000_CTRL_EXT_CANC;
1748 #ifdef CONFIG_E1000_NAPI
1749 /* Auto-Mask interrupts upon ICR read. */
1750 ctrl_ext |= E1000_CTRL_EXT_IAME;
1751 #endif
1752 E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
1753 E1000_WRITE_REG(hw, IAM, ~0);
1754 E1000_WRITE_FLUSH(hw);
1755 }
1756
1757 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1758 * the Base and Length of the Rx Descriptor Ring */
1759 switch (adapter->num_rx_queues) {
1760 #ifdef CONFIG_E1000_MQ
1761 case 2:
1762 rdba = adapter->rx_ring[1].dma;
1763 E1000_WRITE_REG(hw, RDBAL1, (rdba & 0x00000000ffffffffULL));
1764 E1000_WRITE_REG(hw, RDBAH1, (rdba >> 32));
1765 E1000_WRITE_REG(hw, RDLEN1, rdlen);
1766 E1000_WRITE_REG(hw, RDH1, 0);
1767 E1000_WRITE_REG(hw, RDT1, 0);
1768 adapter->rx_ring[1].rdh = E1000_RDH1;
1769 adapter->rx_ring[1].rdt = E1000_RDT1;
1770 /* Fall Through */
1771 #endif
1772 case 1:
1773 default:
1774 rdba = adapter->rx_ring[0].dma;
1775 E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
1776 E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
1777 E1000_WRITE_REG(hw, RDLEN, rdlen);
1778 E1000_WRITE_REG(hw, RDH, 0);
1779 E1000_WRITE_REG(hw, RDT, 0);
1780 adapter->rx_ring[0].rdh = E1000_RDH;
1781 adapter->rx_ring[0].rdt = E1000_RDT;
1782 break;
1783 }
1784
1785 #ifdef CONFIG_E1000_MQ
1786 if (adapter->num_rx_queues > 1) {
1787 uint32_t random[10];
1788
1789 get_random_bytes(&random[0], 40);
1790
1791 if (hw->mac_type <= e1000_82572) {
1792 E1000_WRITE_REG(hw, RSSIR, 0);
1793 E1000_WRITE_REG(hw, RSSIM, 0);
1794 }
1795
1796 switch (adapter->num_rx_queues) {
1797 case 2:
1798 default:
1799 reta = 0x00800080;
1800 mrqc = E1000_MRQC_ENABLE_RSS_2Q;
1801 break;
1802 }
1803
1804 /* Fill out redirection table */
1805 for (i = 0; i < 32; i++)
1806 E1000_WRITE_REG_ARRAY(hw, RETA, i, reta);
1807 /* Fill out hash function seeds */
1808 for (i = 0; i < 10; i++)
1809 E1000_WRITE_REG_ARRAY(hw, RSSRK, i, random[i]);
1810
1811 mrqc |= (E1000_MRQC_RSS_FIELD_IPV4 |
1812 E1000_MRQC_RSS_FIELD_IPV4_TCP);
1813 E1000_WRITE_REG(hw, MRQC, mrqc);
1814 }
1815
1816 /* Multiqueue and packet checksumming are mutually exclusive. */
1817 if (hw->mac_type >= e1000_82571) {
1818 rxcsum = E1000_READ_REG(hw, RXCSUM);
1819 rxcsum |= E1000_RXCSUM_PCSD;
1820 E1000_WRITE_REG(hw, RXCSUM, rxcsum);
1821 }
1822
1823 #else
1824
1825 /* Enable 82543 Receive Checksum Offload for TCP and UDP */
1826 if (hw->mac_type >= e1000_82543) {
1827 rxcsum = E1000_READ_REG(hw, RXCSUM);
1828 if(adapter->rx_csum == TRUE) {
1829 rxcsum |= E1000_RXCSUM_TUOFL;
1830
1831 /* Enable 82571 IPv4 payload checksum for UDP fragments
1832 * Must be used in conjunction with packet-split. */
1833 if ((hw->mac_type >= e1000_82571) &&
1834 (adapter->rx_ps_pages)) {
1835 rxcsum |= E1000_RXCSUM_IPPCSE;
1836 }
1837 } else {
1838 rxcsum &= ~E1000_RXCSUM_TUOFL;
1839 /* don't need to clear IPPCSE as it defaults to 0 */
1840 }
1841 E1000_WRITE_REG(hw, RXCSUM, rxcsum);
1842 }
1843 #endif /* CONFIG_E1000_MQ */
1844
1845 if (hw->mac_type == e1000_82573)
1846 E1000_WRITE_REG(hw, ERT, 0x0100);
1847
1848 /* Enable Receives */
1849 E1000_WRITE_REG(hw, RCTL, rctl);
1850 }
1851
1852 /**
1853 * e1000_free_tx_resources - Free Tx Resources per Queue
1854 * @adapter: board private structure
1855 * @tx_ring: Tx descriptor ring for a specific queue
1856 *
1857 * Free all transmit software resources
1858 **/
1859
1860 static void
1861 e1000_free_tx_resources(struct e1000_adapter *adapter,
1862 struct e1000_tx_ring *tx_ring)
1863 {
1864 struct pci_dev *pdev = adapter->pdev;
1865
1866 e1000_clean_tx_ring(adapter, tx_ring);
1867
1868 vfree(tx_ring->buffer_info);
1869 tx_ring->buffer_info = NULL;
1870
1871 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
1872
1873 tx_ring->desc = NULL;
1874 }
1875
1876 /**
1877 * e1000_free_all_tx_resources - Free Tx Resources for All Queues
1878 * @adapter: board private structure
1879 *
1880 * Free all transmit software resources
1881 **/
1882
1883 void
1884 e1000_free_all_tx_resources(struct e1000_adapter *adapter)
1885 {
1886 int i;
1887
1888 for (i = 0; i < adapter->num_tx_queues; i++)
1889 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
1890 }
1891
1892 static inline void
1893 e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
1894 struct e1000_buffer *buffer_info)
1895 {
1896 if(buffer_info->dma) {
1897 pci_unmap_page(adapter->pdev,
1898 buffer_info->dma,
1899 buffer_info->length,
1900 PCI_DMA_TODEVICE);
1901 buffer_info->dma = 0;
1902 }
1903 if(buffer_info->skb) {
1904 dev_kfree_skb_any(buffer_info->skb);
1905 buffer_info->skb = NULL;
1906 }
1907 }
1908
1909 /**
1910 * e1000_clean_tx_ring - Free Tx Buffers
1911 * @adapter: board private structure
1912 * @tx_ring: ring to be cleaned
1913 **/
1914
1915 static void
1916 e1000_clean_tx_ring(struct e1000_adapter *adapter,
1917 struct e1000_tx_ring *tx_ring)
1918 {
1919 struct e1000_buffer *buffer_info;
1920 unsigned long size;
1921 unsigned int i;
1922
1923 /* Free all the Tx ring sk_buffs */
1924
1925 for(i = 0; i < tx_ring->count; i++) {
1926 buffer_info = &tx_ring->buffer_info[i];
1927 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
1928 }
1929
1930 size = sizeof(struct e1000_buffer) * tx_ring->count;
1931 memset(tx_ring->buffer_info, 0, size);
1932
1933 /* Zero out the descriptor ring */
1934
1935 memset(tx_ring->desc, 0, tx_ring->size);
1936
1937 tx_ring->next_to_use = 0;
1938 tx_ring->next_to_clean = 0;
1939 tx_ring->last_tx_tso = 0;
1940
1941 writel(0, adapter->hw.hw_addr + tx_ring->tdh);
1942 writel(0, adapter->hw.hw_addr + tx_ring->tdt);
1943 }
1944
1945 /**
1946 * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
1947 * @adapter: board private structure
1948 **/
1949
1950 static void
1951 e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
1952 {
1953 int i;
1954
1955 for (i = 0; i < adapter->num_tx_queues; i++)
1956 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1957 }
1958
1959 /**
1960 * e1000_free_rx_resources - Free Rx Resources
1961 * @adapter: board private structure
1962 * @rx_ring: ring to clean the resources from
1963 *
1964 * Free all receive software resources
1965 **/
1966
1967 static void
1968 e1000_free_rx_resources(struct e1000_adapter *adapter,
1969 struct e1000_rx_ring *rx_ring)
1970 {
1971 struct pci_dev *pdev = adapter->pdev;
1972
1973 e1000_clean_rx_ring(adapter, rx_ring);
1974
1975 vfree(rx_ring->buffer_info);
1976 rx_ring->buffer_info = NULL;
1977 kfree(rx_ring->ps_page);
1978 rx_ring->ps_page = NULL;
1979 kfree(rx_ring->ps_page_dma);
1980 rx_ring->ps_page_dma = NULL;
1981
1982 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
1983
1984 rx_ring->desc = NULL;
1985 }
1986
1987 /**
1988 * e1000_free_all_rx_resources - Free Rx Resources for All Queues
1989 * @adapter: board private structure
1990 *
1991 * Free all receive software resources
1992 **/
1993
1994 void
1995 e1000_free_all_rx_resources(struct e1000_adapter *adapter)
1996 {
1997 int i;
1998
1999 for (i = 0; i < adapter->num_rx_queues; i++)
2000 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
2001 }
2002
2003 /**
2004 * e1000_clean_rx_ring - Free Rx Buffers per Queue
2005 * @adapter: board private structure
2006 * @rx_ring: ring to free buffers from
2007 **/
2008
2009 static void
2010 e1000_clean_rx_ring(struct e1000_adapter *adapter,
2011 struct e1000_rx_ring *rx_ring)
2012 {
2013 struct e1000_buffer *buffer_info;
2014 struct e1000_ps_page *ps_page;
2015 struct e1000_ps_page_dma *ps_page_dma;
2016 struct pci_dev *pdev = adapter->pdev;
2017 unsigned long size;
2018 unsigned int i, j;
2019
2020 /* Free all the Rx ring sk_buffs */
2021
2022 for(i = 0; i < rx_ring->count; i++) {
2023 buffer_info = &rx_ring->buffer_info[i];
2024 if(buffer_info->skb) {
2025 ps_page = &rx_ring->ps_page[i];
2026 ps_page_dma = &rx_ring->ps_page_dma[i];
2027 pci_unmap_single(pdev,
2028 buffer_info->dma,
2029 buffer_info->length,
2030 PCI_DMA_FROMDEVICE);
2031
2032 dev_kfree_skb(buffer_info->skb);
2033 buffer_info->skb = NULL;
2034 }
2035 ps_page = &rx_ring->ps_page[i];
2036 ps_page_dma = &rx_ring->ps_page_dma[i];
2037 for (j = 0; j < adapter->rx_ps_pages; j++) {
2038 if (!ps_page->ps_page[j]) break;
2039 pci_unmap_page(pdev,
2040 ps_page_dma->ps_page_dma[j],
2041 PAGE_SIZE, PCI_DMA_FROMDEVICE);
2042 ps_page_dma->ps_page_dma[j] = 0;
2043 put_page(ps_page->ps_page[j]);
2044 ps_page->ps_page[j] = NULL;
2045 }
2046 }
2047
2048 /* there also may be some cached data in our adapter */
2049 if (rx_ring->rx_skb_top) {
2050 dev_kfree_skb(rx_ring->rx_skb_top);
2051
2052 /* rx_skb_prev will be wiped out by rx_skb_top */
2053 rx_ring->rx_skb_top = NULL;
2054 rx_ring->rx_skb_prev = NULL;
2055 }
2056
2057
2058 size = sizeof(struct e1000_buffer) * rx_ring->count;
2059 memset(rx_ring->buffer_info, 0, size);
2060 size = sizeof(struct e1000_ps_page) * rx_ring->count;
2061 memset(rx_ring->ps_page, 0, size);
2062 size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
2063 memset(rx_ring->ps_page_dma, 0, size);
2064
2065 /* Zero out the descriptor ring */
2066
2067 memset(rx_ring->desc, 0, rx_ring->size);
2068
2069 rx_ring->next_to_clean = 0;
2070 rx_ring->next_to_use = 0;
2071
2072 writel(0, adapter->hw.hw_addr + rx_ring->rdh);
2073 writel(0, adapter->hw.hw_addr + rx_ring->rdt);
2074 }
2075
2076 /**
2077 * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
2078 * @adapter: board private structure
2079 **/
2080
2081 static void
2082 e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
2083 {
2084 int i;
2085
2086 for (i = 0; i < adapter->num_rx_queues; i++)
2087 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
2088 }
2089
2090 /* The 82542 2.0 (revision 2) needs to have the receive unit in reset
2091 * and memory write and invalidate disabled for certain operations
2092 */
2093 static void
2094 e1000_enter_82542_rst(struct e1000_adapter *adapter)
2095 {
2096 struct net_device *netdev = adapter->netdev;
2097 uint32_t rctl;
2098
2099 e1000_pci_clear_mwi(&adapter->hw);
2100
2101 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2102 rctl |= E1000_RCTL_RST;
2103 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2104 E1000_WRITE_FLUSH(&adapter->hw);
2105 mdelay(5);
2106
2107 if(netif_running(netdev))
2108 e1000_clean_all_rx_rings(adapter);
2109 }
2110
2111 static void
2112 e1000_leave_82542_rst(struct e1000_adapter *adapter)
2113 {
2114 struct net_device *netdev = adapter->netdev;
2115 uint32_t rctl;
2116
2117 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2118 rctl &= ~E1000_RCTL_RST;
2119 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2120 E1000_WRITE_FLUSH(&adapter->hw);
2121 mdelay(5);
2122
2123 if(adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
2124 e1000_pci_set_mwi(&adapter->hw);
2125
2126 if(netif_running(netdev)) {
2127 e1000_configure_rx(adapter);
2128 /* No need to loop, because 82542 supports only 1 queue */
2129 struct e1000_rx_ring *ring = &adapter->rx_ring[0];
2130 adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
2131 }
2132 }
2133
2134 /**
2135 * e1000_set_mac - Change the Ethernet Address of the NIC
2136 * @netdev: network interface device structure
2137 * @p: pointer to an address structure
2138 *
2139 * Returns 0 on success, negative on failure
2140 **/
2141
2142 static int
2143 e1000_set_mac(struct net_device *netdev, void *p)
2144 {
2145 struct e1000_adapter *adapter = netdev_priv(netdev);
2146 struct sockaddr *addr = p;
2147
2148 if(!is_valid_ether_addr(addr->sa_data))
2149 return -EADDRNOTAVAIL;
2150
2151 /* 82542 2.0 needs to be in reset to write receive address registers */
2152
2153 if(adapter->hw.mac_type == e1000_82542_rev2_0)
2154 e1000_enter_82542_rst(adapter);
2155
2156 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2157 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
2158
2159 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2160
2161 /* With 82571 controllers, LAA may be overwritten (with the default)
2162 * due to controller reset from the other port. */
2163 if (adapter->hw.mac_type == e1000_82571) {
2164 /* activate the work around */
2165 adapter->hw.laa_is_present = 1;
2166
2167 /* Hold a copy of the LAA in RAR[14] This is done so that
2168 * between the time RAR[0] gets clobbered and the time it
2169 * gets fixed (in e1000_watchdog), the actual LAA is in one
2170 * of the RARs and no incoming packets directed to this port
2171 * are dropped. Eventaully the LAA will be in RAR[0] and
2172 * RAR[14] */
2173 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
2174 E1000_RAR_ENTRIES - 1);
2175 }
2176
2177 if(adapter->hw.mac_type == e1000_82542_rev2_0)
2178 e1000_leave_82542_rst(adapter);
2179
2180 return 0;
2181 }
2182
2183 /**
2184 * e1000_set_multi - Multicast and Promiscuous mode set
2185 * @netdev: network interface device structure
2186 *
2187 * The set_multi entry point is called whenever the multicast address
2188 * list or the network interface flags are updated. This routine is
2189 * responsible for configuring the hardware for proper multicast,
2190 * promiscuous mode, and all-multi behavior.
2191 **/
2192
2193 static void
2194 e1000_set_multi(struct net_device *netdev)
2195 {
2196 struct e1000_adapter *adapter = netdev_priv(netdev);
2197 struct e1000_hw *hw = &adapter->hw;
2198 struct dev_mc_list *mc_ptr;
2199 uint32_t rctl;
2200 uint32_t hash_value;
2201 int i, rar_entries = E1000_RAR_ENTRIES;
2202
2203 /* reserve RAR[14] for LAA over-write work-around */
2204 if (adapter->hw.mac_type == e1000_82571)
2205 rar_entries--;
2206
2207 /* Check for Promiscuous and All Multicast modes */
2208
2209 rctl = E1000_READ_REG(hw, RCTL);
2210
2211 if(netdev->flags & IFF_PROMISC) {
2212 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
2213 } else if(netdev->flags & IFF_ALLMULTI) {
2214 rctl |= E1000_RCTL_MPE;
2215 rctl &= ~E1000_RCTL_UPE;
2216 } else {
2217 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2218 }
2219
2220 E1000_WRITE_REG(hw, RCTL, rctl);
2221
2222 /* 82542 2.0 needs to be in reset to write receive address registers */
2223
2224 if(hw->mac_type == e1000_82542_rev2_0)
2225 e1000_enter_82542_rst(adapter);
2226
2227 /* load the first 14 multicast address into the exact filters 1-14
2228 * RAR 0 is used for the station MAC adddress
2229 * if there are not 14 addresses, go ahead and clear the filters
2230 * -- with 82571 controllers only 0-13 entries are filled here
2231 */
2232 mc_ptr = netdev->mc_list;
2233
2234 for(i = 1; i < rar_entries; i++) {
2235 if (mc_ptr) {
2236 e1000_rar_set(hw, mc_ptr->dmi_addr, i);
2237 mc_ptr = mc_ptr->next;
2238 } else {
2239 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
2240 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
2241 }
2242 }
2243
2244 /* clear the old settings from the multicast hash table */
2245
2246 for(i = 0; i < E1000_NUM_MTA_REGISTERS; i++)
2247 E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
2248
2249 /* load any remaining addresses into the hash table */
2250
2251 for(; mc_ptr; mc_ptr = mc_ptr->next) {
2252 hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr);
2253 e1000_mta_set(hw, hash_value);
2254 }
2255
2256 if(hw->mac_type == e1000_82542_rev2_0)
2257 e1000_leave_82542_rst(adapter);
2258 }
2259
2260 /* Need to wait a few seconds after link up to get diagnostic information from
2261 * the phy */
2262
2263 static void
2264 e1000_update_phy_info(unsigned long data)
2265 {
2266 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2267 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
2268 }
2269
2270 /**
2271 * e1000_82547_tx_fifo_stall - Timer Call-back
2272 * @data: pointer to adapter cast into an unsigned long
2273 **/
2274
2275 static void
2276 e1000_82547_tx_fifo_stall(unsigned long data)
2277 {
2278 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2279 struct net_device *netdev = adapter->netdev;
2280 uint32_t tctl;
2281
2282 if(atomic_read(&adapter->tx_fifo_stall)) {
2283 if((E1000_READ_REG(&adapter->hw, TDT) ==
2284 E1000_READ_REG(&adapter->hw, TDH)) &&
2285 (E1000_READ_REG(&adapter->hw, TDFT) ==
2286 E1000_READ_REG(&adapter->hw, TDFH)) &&
2287 (E1000_READ_REG(&adapter->hw, TDFTS) ==
2288 E1000_READ_REG(&adapter->hw, TDFHS))) {
2289 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2290 E1000_WRITE_REG(&adapter->hw, TCTL,
2291 tctl & ~E1000_TCTL_EN);
2292 E1000_WRITE_REG(&adapter->hw, TDFT,
2293 adapter->tx_head_addr);
2294 E1000_WRITE_REG(&adapter->hw, TDFH,
2295 adapter->tx_head_addr);
2296 E1000_WRITE_REG(&adapter->hw, TDFTS,
2297 adapter->tx_head_addr);
2298 E1000_WRITE_REG(&adapter->hw, TDFHS,
2299 adapter->tx_head_addr);
2300 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
2301 E1000_WRITE_FLUSH(&adapter->hw);
2302
2303 adapter->tx_fifo_head = 0;
2304 atomic_set(&adapter->tx_fifo_stall, 0);
2305 netif_wake_queue(netdev);
2306 } else {
2307 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
2308 }
2309 }
2310 }
2311
2312 /**
2313 * e1000_watchdog - Timer Call-back
2314 * @data: pointer to adapter cast into an unsigned long
2315 **/
2316 static void
2317 e1000_watchdog(unsigned long data)
2318 {
2319 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2320
2321 /* Do the rest outside of interrupt context */
2322 schedule_work(&adapter->watchdog_task);
2323 }
2324
2325 static void
2326 e1000_watchdog_task(struct e1000_adapter *adapter)
2327 {
2328 struct net_device *netdev = adapter->netdev;
2329 struct e1000_tx_ring *txdr = adapter->tx_ring;
2330 uint32_t link;
2331
2332 e1000_check_for_link(&adapter->hw);
2333 if (adapter->hw.mac_type == e1000_82573) {
2334 e1000_enable_tx_pkt_filtering(&adapter->hw);
2335 if(adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
2336 e1000_update_mng_vlan(adapter);
2337 }
2338
2339 if((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
2340 !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
2341 link = !adapter->hw.serdes_link_down;
2342 else
2343 link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
2344
2345 if(link) {
2346 if(!netif_carrier_ok(netdev)) {
2347 e1000_get_speed_and_duplex(&adapter->hw,
2348 &adapter->link_speed,
2349 &adapter->link_duplex);
2350
2351 DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s\n",
2352 adapter->link_speed,
2353 adapter->link_duplex == FULL_DUPLEX ?
2354 "Full Duplex" : "Half Duplex");
2355
2356 /* tweak tx_queue_len according to speed/duplex */
2357 netdev->tx_queue_len = adapter->tx_queue_len;
2358 adapter->tx_timeout_factor = 1;
2359 if (adapter->link_duplex == HALF_DUPLEX) {
2360 switch (adapter->link_speed) {
2361 case SPEED_10:
2362 netdev->tx_queue_len = 10;
2363 adapter->tx_timeout_factor = 8;
2364 break;
2365 case SPEED_100:
2366 netdev->tx_queue_len = 100;
2367 break;
2368 }
2369 }
2370
2371 netif_carrier_on(netdev);
2372 netif_wake_queue(netdev);
2373 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
2374 adapter->smartspeed = 0;
2375 }
2376 } else {
2377 if(netif_carrier_ok(netdev)) {
2378 adapter->link_speed = 0;
2379 adapter->link_duplex = 0;
2380 DPRINTK(LINK, INFO, "NIC Link is Down\n");
2381 netif_carrier_off(netdev);
2382 netif_stop_queue(netdev);
2383 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
2384 }
2385
2386 e1000_smartspeed(adapter);
2387 }
2388
2389 e1000_update_stats(adapter);
2390
2391 adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
2392 adapter->tpt_old = adapter->stats.tpt;
2393 adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
2394 adapter->colc_old = adapter->stats.colc;
2395
2396 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2397 adapter->gorcl_old = adapter->stats.gorcl;
2398 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2399 adapter->gotcl_old = adapter->stats.gotcl;
2400
2401 e1000_update_adaptive(&adapter->hw);
2402
2403 #ifdef CONFIG_E1000_MQ
2404 txdr = *per_cpu_ptr(adapter->cpu_tx_ring, smp_processor_id());
2405 #endif
2406 if (!netif_carrier_ok(netdev)) {
2407 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
2408 /* We've lost link, so the controller stops DMA,
2409 * but we've got queued Tx work that's never going
2410 * to get done, so reset controller to flush Tx.
2411 * (Do the reset outside of interrupt context). */
2412 schedule_work(&adapter->tx_timeout_task);
2413 }
2414 }
2415
2416 /* Dynamic mode for Interrupt Throttle Rate (ITR) */
2417 if(adapter->hw.mac_type >= e1000_82540 && adapter->itr == 1) {
2418 /* Symmetric Tx/Rx gets a reduced ITR=2000; Total
2419 * asymmetrical Tx or Rx gets ITR=8000; everyone
2420 * else is between 2000-8000. */
2421 uint32_t goc = (adapter->gotcl + adapter->gorcl) / 10000;
2422 uint32_t dif = (adapter->gotcl > adapter->gorcl ?
2423 adapter->gotcl - adapter->gorcl :
2424 adapter->gorcl - adapter->gotcl) / 10000;
2425 uint32_t itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
2426 E1000_WRITE_REG(&adapter->hw, ITR, 1000000000 / (itr * 256));
2427 }
2428
2429 /* Cause software interrupt to ensure rx ring is cleaned */
2430 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
2431
2432 /* Force detection of hung controller every watchdog period */
2433 adapter->detect_tx_hung = TRUE;
2434
2435 /* With 82571 controllers, LAA may be overwritten due to controller
2436 * reset from the other port. Set the appropriate LAA in RAR[0] */
2437 if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
2438 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2439
2440 /* Reset the timer */
2441 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
2442 }
2443
2444 #define E1000_TX_FLAGS_CSUM 0x00000001
2445 #define E1000_TX_FLAGS_VLAN 0x00000002
2446 #define E1000_TX_FLAGS_TSO 0x00000004
2447 #define E1000_TX_FLAGS_IPV4 0x00000008
2448 #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
2449 #define E1000_TX_FLAGS_VLAN_SHIFT 16
2450
2451 static inline int
2452 e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2453 struct sk_buff *skb)
2454 {
2455 #ifdef NETIF_F_TSO
2456 struct e1000_context_desc *context_desc;
2457 struct e1000_buffer *buffer_info;
2458 unsigned int i;
2459 uint32_t cmd_length = 0;
2460 uint16_t ipcse = 0, tucse, mss;
2461 uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
2462 int err;
2463
2464 if(skb_shinfo(skb)->tso_size) {
2465 if (skb_header_cloned(skb)) {
2466 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2467 if (err)
2468 return err;
2469 }
2470
2471 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
2472 mss = skb_shinfo(skb)->tso_size;
2473 if(skb->protocol == ntohs(ETH_P_IP)) {
2474 skb->nh.iph->tot_len = 0;
2475 skb->nh.iph->check = 0;
2476 skb->h.th->check =
2477 ~csum_tcpudp_magic(skb->nh.iph->saddr,
2478 skb->nh.iph->daddr,
2479 0,
2480 IPPROTO_TCP,
2481 0);
2482 cmd_length = E1000_TXD_CMD_IP;
2483 ipcse = skb->h.raw - skb->data - 1;
2484 #ifdef NETIF_F_TSO_IPV6
2485 } else if(skb->protocol == ntohs(ETH_P_IPV6)) {
2486 skb->nh.ipv6h->payload_len = 0;
2487 skb->h.th->check =
2488 ~csum_ipv6_magic(&skb->nh.ipv6h->saddr,
2489 &skb->nh.ipv6h->daddr,
2490 0,
2491 IPPROTO_TCP,
2492 0);
2493 ipcse = 0;
2494 #endif
2495 }
2496 ipcss = skb->nh.raw - skb->data;
2497 ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
2498 tucss = skb->h.raw - skb->data;
2499 tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
2500 tucse = 0;
2501
2502 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
2503 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
2504
2505 i = tx_ring->next_to_use;
2506 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
2507 buffer_info = &tx_ring->buffer_info[i];
2508
2509 context_desc->lower_setup.ip_fields.ipcss = ipcss;
2510 context_desc->lower_setup.ip_fields.ipcso = ipcso;
2511 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
2512 context_desc->upper_setup.tcp_fields.tucss = tucss;
2513 context_desc->upper_setup.tcp_fields.tucso = tucso;
2514 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
2515 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
2516 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
2517 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
2518
2519 buffer_info->time_stamp = jiffies;
2520
2521 if (++i == tx_ring->count) i = 0;
2522 tx_ring->next_to_use = i;
2523
2524 return 1;
2525 }
2526 #endif
2527
2528 return 0;
2529 }
2530
2531 static inline boolean_t
2532 e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2533 struct sk_buff *skb)
2534 {
2535 struct e1000_context_desc *context_desc;
2536 struct e1000_buffer *buffer_info;
2537 unsigned int i;
2538 uint8_t css;
2539
2540 if(likely(skb->ip_summed == CHECKSUM_HW)) {
2541 css = skb->h.raw - skb->data;
2542
2543 i = tx_ring->next_to_use;
2544 buffer_info = &tx_ring->buffer_info[i];
2545 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
2546
2547 context_desc->upper_setup.tcp_fields.tucss = css;
2548 context_desc->upper_setup.tcp_fields.tucso = css + skb->csum;
2549 context_desc->upper_setup.tcp_fields.tucse = 0;
2550 context_desc->tcp_seg_setup.data = 0;
2551 context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
2552
2553 buffer_info->time_stamp = jiffies;
2554
2555 if (unlikely(++i == tx_ring->count)) i = 0;
2556 tx_ring->next_to_use = i;
2557
2558 return TRUE;
2559 }
2560
2561 return FALSE;
2562 }
2563
2564 #define E1000_MAX_TXD_PWR 12
2565 #define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
2566
2567 static inline int
2568 e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2569 struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
2570 unsigned int nr_frags, unsigned int mss)
2571 {
2572 struct e1000_buffer *buffer_info;
2573 unsigned int len = skb->len;
2574 unsigned int offset = 0, size, count = 0, i;
2575 unsigned int f;
2576 len -= skb->data_len;
2577
2578 i = tx_ring->next_to_use;
2579
2580 while(len) {
2581 buffer_info = &tx_ring->buffer_info[i];
2582 size = min(len, max_per_txd);
2583 #ifdef NETIF_F_TSO
2584 /* Workaround for Controller erratum --
2585 * descriptor for non-tso packet in a linear SKB that follows a
2586 * tso gets written back prematurely before the data is fully
2587 * DMAd to the controller */
2588 if (!skb->data_len && tx_ring->last_tx_tso &&
2589 !skb_shinfo(skb)->tso_size) {
2590 tx_ring->last_tx_tso = 0;
2591 size -= 4;
2592 }
2593
2594 /* Workaround for premature desc write-backs
2595 * in TSO mode. Append 4-byte sentinel desc */
2596 if(unlikely(mss && !nr_frags && size == len && size > 8))
2597 size -= 4;
2598 #endif
2599 /* work-around for errata 10 and it applies
2600 * to all controllers in PCI-X mode
2601 * The fix is to make sure that the first descriptor of a
2602 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
2603 */
2604 if(unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
2605 (size > 2015) && count == 0))
2606 size = 2015;
2607
2608 /* Workaround for potential 82544 hang in PCI-X. Avoid
2609 * terminating buffers within evenly-aligned dwords. */
2610 if(unlikely(adapter->pcix_82544 &&
2611 !((unsigned long)(skb->data + offset + size - 1) & 4) &&
2612 size > 4))
2613 size -= 4;
2614
2615 buffer_info->length = size;
2616 buffer_info->dma =
2617 pci_map_single(adapter->pdev,
2618 skb->data + offset,
2619 size,
2620 PCI_DMA_TODEVICE);
2621 buffer_info->time_stamp = jiffies;
2622
2623 len -= size;
2624 offset += size;
2625 count++;
2626 if(unlikely(++i == tx_ring->count)) i = 0;
2627 }
2628
2629 for(f = 0; f < nr_frags; f++) {
2630 struct skb_frag_struct *frag;
2631
2632 frag = &skb_shinfo(skb)->frags[f];
2633 len = frag->size;
2634 offset = frag->page_offset;
2635
2636 while(len) {
2637 buffer_info = &tx_ring->buffer_info[i];
2638 size = min(len, max_per_txd);
2639 #ifdef NETIF_F_TSO
2640 /* Workaround for premature desc write-backs
2641 * in TSO mode. Append 4-byte sentinel desc */
2642 if(unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
2643 size -= 4;
2644 #endif
2645 /* Workaround for potential 82544 hang in PCI-X.
2646 * Avoid terminating buffers within evenly-aligned
2647 * dwords. */
2648 if(unlikely(adapter->pcix_82544 &&
2649 !((unsigned long)(frag->page+offset+size-1) & 4) &&
2650 size > 4))
2651 size -= 4;
2652
2653 buffer_info->length = size;
2654 buffer_info->dma =
2655 pci_map_page(adapter->pdev,
2656 frag->page,
2657 offset,
2658 size,
2659 PCI_DMA_TODEVICE);
2660 buffer_info->time_stamp = jiffies;
2661
2662 len -= size;
2663 offset += size;
2664 count++;
2665 if(unlikely(++i == tx_ring->count)) i = 0;
2666 }
2667 }
2668
2669 i = (i == 0) ? tx_ring->count - 1 : i - 1;
2670 tx_ring->buffer_info[i].skb = skb;
2671 tx_ring->buffer_info[first].next_to_watch = i;
2672
2673 return count;
2674 }
2675
2676 static inline void
2677 e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2678 int tx_flags, int count)
2679 {
2680 struct e1000_tx_desc *tx_desc = NULL;
2681 struct e1000_buffer *buffer_info;
2682 uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
2683 unsigned int i;
2684
2685 if(likely(tx_flags & E1000_TX_FLAGS_TSO)) {
2686 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
2687 E1000_TXD_CMD_TSE;
2688 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2689
2690 if(likely(tx_flags & E1000_TX_FLAGS_IPV4))
2691 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
2692 }
2693
2694 if(likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
2695 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
2696 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2697 }
2698
2699 if(unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
2700 txd_lower |= E1000_TXD_CMD_VLE;
2701 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
2702 }
2703
2704 i = tx_ring->next_to_use;
2705
2706 while(count--) {
2707 buffer_info = &tx_ring->buffer_info[i];
2708 tx_desc = E1000_TX_DESC(*tx_ring, i);
2709 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
2710 tx_desc->lower.data =
2711 cpu_to_le32(txd_lower | buffer_info->length);
2712 tx_desc->upper.data = cpu_to_le32(txd_upper);
2713 if(unlikely(++i == tx_ring->count)) i = 0;
2714 }
2715
2716 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
2717
2718 /* Force memory writes to complete before letting h/w
2719 * know there are new descriptors to fetch. (Only
2720 * applicable for weak-ordered memory model archs,
2721 * such as IA-64). */
2722 wmb();
2723
2724 tx_ring->next_to_use = i;
2725 writel(i, adapter->hw.hw_addr + tx_ring->tdt);
2726 }
2727
2728 /**
2729 * 82547 workaround to avoid controller hang in half-duplex environment.
2730 * The workaround is to avoid queuing a large packet that would span
2731 * the internal Tx FIFO ring boundary by notifying the stack to resend
2732 * the packet at a later time. This gives the Tx FIFO an opportunity to
2733 * flush all packets. When that occurs, we reset the Tx FIFO pointers
2734 * to the beginning of the Tx FIFO.
2735 **/
2736
2737 #define E1000_FIFO_HDR 0x10
2738 #define E1000_82547_PAD_LEN 0x3E0
2739
2740 static inline int
2741 e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
2742 {
2743 uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
2744 uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
2745
2746 E1000_ROUNDUP(skb_fifo_len, E1000_FIFO_HDR);
2747
2748 if(adapter->link_duplex != HALF_DUPLEX)
2749 goto no_fifo_stall_required;
2750
2751 if(atomic_read(&adapter->tx_fifo_stall))
2752 return 1;
2753
2754 if(skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
2755 atomic_set(&adapter->tx_fifo_stall, 1);
2756 return 1;
2757 }
2758
2759 no_fifo_stall_required:
2760 adapter->tx_fifo_head += skb_fifo_len;
2761 if(adapter->tx_fifo_head >= adapter->tx_fifo_size)
2762 adapter->tx_fifo_head -= adapter->tx_fifo_size;
2763 return 0;
2764 }
2765
2766 #define MINIMUM_DHCP_PACKET_SIZE 282
2767 static inline int
2768 e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
2769 {
2770 struct e1000_hw *hw = &adapter->hw;
2771 uint16_t length, offset;
2772 if(vlan_tx_tag_present(skb)) {
2773 if(!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
2774 ( adapter->hw.mng_cookie.status &
2775 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
2776 return 0;
2777 }
2778 if ((skb->len > MINIMUM_DHCP_PACKET_SIZE) && (!skb->protocol)) {
2779 struct ethhdr *eth = (struct ethhdr *) skb->data;
2780 if((htons(ETH_P_IP) == eth->h_proto)) {
2781 const struct iphdr *ip =
2782 (struct iphdr *)((uint8_t *)skb->data+14);
2783 if(IPPROTO_UDP == ip->protocol) {
2784 struct udphdr *udp =
2785 (struct udphdr *)((uint8_t *)ip +
2786 (ip->ihl << 2));
2787 if(ntohs(udp->dest) == 67) {
2788 offset = (uint8_t *)udp + 8 - skb->data;
2789 length = skb->len - offset;
2790
2791 return e1000_mng_write_dhcp_info(hw,
2792 (uint8_t *)udp + 8,
2793 length);
2794 }
2795 }
2796 }
2797 }
2798 return 0;
2799 }
2800
2801 #define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
2802 static int
2803 e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
2804 {
2805 struct e1000_adapter *adapter = netdev_priv(netdev);
2806 struct e1000_tx_ring *tx_ring;
2807 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
2808 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
2809 unsigned int tx_flags = 0;
2810 unsigned int len = skb->len;
2811 unsigned long flags;
2812 unsigned int nr_frags = 0;
2813 unsigned int mss = 0;
2814 int count = 0;
2815 int tso;
2816 unsigned int f;
2817 len -= skb->data_len;
2818
2819 #ifdef CONFIG_E1000_MQ
2820 tx_ring = *per_cpu_ptr(adapter->cpu_tx_ring, smp_processor_id());
2821 #else
2822 tx_ring = adapter->tx_ring;
2823 #endif
2824
2825 if (unlikely(skb->len <= 0)) {
2826 dev_kfree_skb_any(skb);
2827 return NETDEV_TX_OK;
2828 }
2829
2830 #ifdef NETIF_F_TSO
2831 mss = skb_shinfo(skb)->tso_size;
2832 /* The controller does a simple calculation to
2833 * make sure there is enough room in the FIFO before
2834 * initiating the DMA for each buffer. The calc is:
2835 * 4 = ceil(buffer len/mss). To make sure we don't
2836 * overrun the FIFO, adjust the max buffer len if mss
2837 * drops. */
2838 if(mss) {
2839 uint8_t hdr_len;
2840 max_per_txd = min(mss << 2, max_per_txd);
2841 max_txd_pwr = fls(max_per_txd) - 1;
2842
2843 /* TSO Workaround for 82571/2 Controllers -- if skb->data
2844 * points to just header, pull a few bytes of payload from
2845 * frags into skb->data */
2846 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
2847 if (skb->data_len && (hdr_len == (skb->len - skb->data_len)) &&
2848 (adapter->hw.mac_type == e1000_82571 ||
2849 adapter->hw.mac_type == e1000_82572)) {
2850 unsigned int pull_size;
2851 pull_size = min((unsigned int)4, skb->data_len);
2852 if (!__pskb_pull_tail(skb, pull_size)) {
2853 printk(KERN_ERR "__pskb_pull_tail failed.\n");
2854 dev_kfree_skb_any(skb);
2855 return -EFAULT;
2856 }
2857 len = skb->len - skb->data_len;
2858 }
2859 }
2860
2861 if((mss) || (skb->ip_summed == CHECKSUM_HW))
2862 /* reserve a descriptor for the offload context */
2863 count++;
2864 count++;
2865 #else
2866 if(skb->ip_summed == CHECKSUM_HW)
2867 count++;
2868 #endif
2869
2870 #ifdef NETIF_F_TSO
2871 /* Controller Erratum workaround */
2872 if (!skb->data_len && tx_ring->last_tx_tso &&
2873 !skb_shinfo(skb)->tso_size)
2874 count++;
2875 #endif
2876
2877 count += TXD_USE_COUNT(len, max_txd_pwr);
2878
2879 if(adapter->pcix_82544)
2880 count++;
2881
2882 /* work-around for errata 10 and it applies to all controllers
2883 * in PCI-X mode, so add one more descriptor to the count
2884 */
2885 if(unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
2886 (len > 2015)))
2887 count++;
2888
2889 nr_frags = skb_shinfo(skb)->nr_frags;
2890 for(f = 0; f < nr_frags; f++)
2891 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
2892 max_txd_pwr);
2893 if(adapter->pcix_82544)
2894 count += nr_frags;
2895
2896 if(adapter->hw.tx_pkt_filtering && (adapter->hw.mac_type == e1000_82573) )
2897 e1000_transfer_dhcp_info(adapter, skb);
2898
2899 local_irq_save(flags);
2900 if (!spin_trylock(&tx_ring->tx_lock)) {
2901 /* Collision - tell upper layer to requeue */
2902 local_irq_restore(flags);
2903 return NETDEV_TX_LOCKED;
2904 }
2905
2906 /* need: count + 2 desc gap to keep tail from touching
2907 * head, otherwise try next time */
2908 if (unlikely(E1000_DESC_UNUSED(tx_ring) < count + 2)) {
2909 netif_stop_queue(netdev);
2910 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
2911 return NETDEV_TX_BUSY;
2912 }
2913
2914 if(unlikely(adapter->hw.mac_type == e1000_82547)) {
2915 if(unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
2916 netif_stop_queue(netdev);
2917 mod_timer(&adapter->tx_fifo_stall_timer, jiffies);
2918 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
2919 return NETDEV_TX_BUSY;
2920 }
2921 }
2922
2923 if(unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
2924 tx_flags |= E1000_TX_FLAGS_VLAN;
2925 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
2926 }
2927
2928 first = tx_ring->next_to_use;
2929
2930 tso = e1000_tso(adapter, tx_ring, skb);
2931 if (tso < 0) {
2932 dev_kfree_skb_any(skb);
2933 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
2934 return NETDEV_TX_OK;
2935 }
2936
2937 if (likely(tso)) {
2938 tx_ring->last_tx_tso = 1;
2939 tx_flags |= E1000_TX_FLAGS_TSO;
2940 } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
2941 tx_flags |= E1000_TX_FLAGS_CSUM;
2942
2943 /* Old method was to assume IPv4 packet by default if TSO was enabled.
2944 * 82571 hardware supports TSO capabilities for IPv6 as well...
2945 * no longer assume, we must. */
2946 if (likely(skb->protocol == ntohs(ETH_P_IP)))
2947 tx_flags |= E1000_TX_FLAGS_IPV4;
2948
2949 e1000_tx_queue(adapter, tx_ring, tx_flags,
2950 e1000_tx_map(adapter, tx_ring, skb, first,
2951 max_per_txd, nr_frags, mss));
2952
2953 netdev->trans_start = jiffies;
2954
2955 /* Make sure there is space in the ring for the next send. */
2956 if (unlikely(E1000_DESC_UNUSED(tx_ring) < MAX_SKB_FRAGS + 2))
2957 netif_stop_queue(netdev);
2958
2959 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
2960 return NETDEV_TX_OK;
2961 }
2962
2963 /**
2964 * e1000_tx_timeout - Respond to a Tx Hang
2965 * @netdev: network interface device structure
2966 **/
2967
2968 static void
2969 e1000_tx_timeout(struct net_device *netdev)
2970 {
2971 struct e1000_adapter *adapter = netdev_priv(netdev);
2972
2973 /* Do the reset outside of interrupt context */
2974 schedule_work(&adapter->tx_timeout_task);
2975 }
2976
2977 static void
2978 e1000_tx_timeout_task(struct net_device *netdev)
2979 {
2980 struct e1000_adapter *adapter = netdev_priv(netdev);
2981
2982 adapter->tx_timeout_count++;
2983 e1000_down(adapter);
2984 e1000_up(adapter);
2985 }
2986
2987 /**
2988 * e1000_get_stats - Get System Network Statistics
2989 * @netdev: network interface device structure
2990 *
2991 * Returns the address of the device statistics structure.
2992 * The statistics are actually updated from the timer callback.
2993 **/
2994
2995 static struct net_device_stats *
2996 e1000_get_stats(struct net_device *netdev)
2997 {
2998 struct e1000_adapter *adapter = netdev_priv(netdev);
2999
3000 /* only return the current stats */
3001 return &adapter->net_stats;
3002 }
3003
3004 /**
3005 * e1000_change_mtu - Change the Maximum Transfer Unit
3006 * @netdev: network interface device structure
3007 * @new_mtu: new value for maximum frame size
3008 *
3009 * Returns 0 on success, negative on failure
3010 **/
3011
3012 static int
3013 e1000_change_mtu(struct net_device *netdev, int new_mtu)
3014 {
3015 struct e1000_adapter *adapter = netdev_priv(netdev);
3016 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
3017
3018 if((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
3019 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
3020 DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
3021 return -EINVAL;
3022 }
3023
3024 /* Adapter-specific max frame size limits. */
3025 switch (adapter->hw.mac_type) {
3026 case e1000_82542_rev2_0:
3027 case e1000_82542_rev2_1:
3028 case e1000_82573:
3029 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3030 DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
3031 return -EINVAL;
3032 }
3033 break;
3034 case e1000_82571:
3035 case e1000_82572:
3036 #define MAX_STD_JUMBO_FRAME_SIZE 9234
3037 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
3038 DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
3039 return -EINVAL;
3040 }
3041 break;
3042 default:
3043 /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
3044 break;
3045 }
3046
3047 /* since the driver code now supports splitting a packet across
3048 * multiple descriptors, most of the fifo related limitations on
3049 * jumbo frame traffic have gone away.
3050 * simply use 2k descriptors for everything.
3051 *
3052 * NOTE: dev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
3053 * means we reserve 2 more, this pushes us to allocate from the next
3054 * larger slab size
3055 * i.e. RXBUFFER_2048 --> size-4096 slab */
3056
3057 /* recent hardware supports 1KB granularity */
3058 if (adapter->hw.mac_type > e1000_82547_rev_2) {
3059 adapter->rx_buffer_len =
3060 ((max_frame < E1000_RXBUFFER_2048) ?
3061 max_frame : E1000_RXBUFFER_2048);
3062 E1000_ROUNDUP(adapter->rx_buffer_len, 1024);
3063 } else
3064 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
3065
3066 netdev->mtu = new_mtu;
3067
3068 if(netif_running(netdev)) {
3069 e1000_down(adapter);
3070 e1000_up(adapter);
3071 }
3072
3073 adapter->hw.max_frame_size = max_frame;
3074
3075 return 0;
3076 }
3077
3078 /**
3079 * e1000_update_stats - Update the board statistics counters
3080 * @adapter: board private structure
3081 **/
3082
3083 void
3084 e1000_update_stats(struct e1000_adapter *adapter)
3085 {
3086 struct e1000_hw *hw = &adapter->hw;
3087 unsigned long flags;
3088 uint16_t phy_tmp;
3089
3090 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3091
3092 spin_lock_irqsave(&adapter->stats_lock, flags);
3093
3094 /* these counters are modified from e1000_adjust_tbi_stats,
3095 * called from the interrupt context, so they must only
3096 * be written while holding adapter->stats_lock
3097 */
3098
3099 adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
3100 adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
3101 adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
3102 adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
3103 adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
3104 adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
3105 adapter->stats.roc += E1000_READ_REG(hw, ROC);
3106 adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
3107 adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
3108 adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
3109 adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
3110 adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
3111 adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
3112
3113 adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
3114 adapter->stats.mpc += E1000_READ_REG(hw, MPC);
3115 adapter->stats.scc += E1000_READ_REG(hw, SCC);
3116 adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
3117 adapter->stats.mcc += E1000_READ_REG(hw, MCC);
3118 adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
3119 adapter->stats.dc += E1000_READ_REG(hw, DC);
3120 adapter->stats.sec += E1000_READ_REG(hw, SEC);
3121 adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
3122 adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
3123 adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
3124 adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
3125 adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
3126 adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
3127 adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
3128 adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
3129 adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
3130 adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
3131 adapter->stats.ruc += E1000_READ_REG(hw, RUC);
3132 adapter->stats.rfc += E1000_READ_REG(hw, RFC);
3133 adapter->stats.rjc += E1000_READ_REG(hw, RJC);
3134 adapter->stats.torl += E1000_READ_REG(hw, TORL);
3135 adapter->stats.torh += E1000_READ_REG(hw, TORH);
3136 adapter->stats.totl += E1000_READ_REG(hw, TOTL);
3137 adapter->stats.toth += E1000_READ_REG(hw, TOTH);
3138 adapter->stats.tpr += E1000_READ_REG(hw, TPR);
3139 adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
3140 adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
3141 adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
3142 adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
3143 adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
3144 adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
3145 adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
3146 adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
3147
3148 /* used for adaptive IFS */
3149
3150 hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
3151 adapter->stats.tpt += hw->tx_packet_delta;
3152 hw->collision_delta = E1000_READ_REG(hw, COLC);
3153 adapter->stats.colc += hw->collision_delta;
3154
3155 if(hw->mac_type >= e1000_82543) {
3156 adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
3157 adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
3158 adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
3159 adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
3160 adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
3161 adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
3162 }
3163 if(hw->mac_type > e1000_82547_rev_2) {
3164 adapter->stats.iac += E1000_READ_REG(hw, IAC);
3165 adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
3166 adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
3167 adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
3168 adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
3169 adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
3170 adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
3171 adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
3172 adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
3173 }
3174
3175 /* Fill out the OS statistics structure */
3176
3177 adapter->net_stats.rx_packets = adapter->stats.gprc;
3178 adapter->net_stats.tx_packets = adapter->stats.gptc;
3179 adapter->net_stats.rx_bytes = adapter->stats.gorcl;
3180 adapter->net_stats.tx_bytes = adapter->stats.gotcl;
3181 adapter->net_stats.multicast = adapter->stats.mprc;
3182 adapter->net_stats.collisions = adapter->stats.colc;
3183
3184 /* Rx Errors */
3185
3186 adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3187 adapter->stats.crcerrs + adapter->stats.algnerrc +
3188 adapter->stats.rlec + adapter->stats.cexterr;
3189 adapter->net_stats.rx_dropped = 0;
3190 adapter->net_stats.rx_length_errors = adapter->stats.rlec;
3191 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3192 adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
3193 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3194
3195 /* Tx Errors */
3196
3197 adapter->net_stats.tx_errors = adapter->stats.ecol +
3198 adapter->stats.latecol;
3199 adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3200 adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3201 adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
3202
3203 /* Tx Dropped needs to be maintained elsewhere */
3204
3205 /* Phy Stats */
3206
3207 if(hw->media_type == e1000_media_type_copper) {
3208 if((adapter->link_speed == SPEED_1000) &&
3209 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
3210 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3211 adapter->phy_stats.idle_errors += phy_tmp;
3212 }
3213
3214 if((hw->mac_type <= e1000_82546) &&
3215 (hw->phy_type == e1000_phy_m88) &&
3216 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
3217 adapter->phy_stats.receive_errors += phy_tmp;
3218 }
3219
3220 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3221 }
3222
3223 #ifdef CONFIG_E1000_MQ
3224 void
3225 e1000_rx_schedule(void *data)
3226 {
3227 struct net_device *poll_dev, *netdev = data;
3228 struct e1000_adapter *adapter = netdev->priv;
3229 int this_cpu = get_cpu();
3230
3231 poll_dev = *per_cpu_ptr(adapter->cpu_netdev, this_cpu);
3232 if (poll_dev == NULL) {
3233 put_cpu();
3234 return;
3235 }
3236
3237 if (likely(netif_rx_schedule_prep(poll_dev)))
3238 __netif_rx_schedule(poll_dev);
3239 else
3240 e1000_irq_enable(adapter);
3241
3242 put_cpu();
3243 }
3244 #endif
3245
3246 /**
3247 * e1000_intr - Interrupt Handler
3248 * @irq: interrupt number
3249 * @data: pointer to a network interface device structure
3250 * @pt_regs: CPU registers structure
3251 **/
3252
3253 static irqreturn_t
3254 e1000_intr(int irq, void *data, struct pt_regs *regs)
3255 {
3256 struct net_device *netdev = data;
3257 struct e1000_adapter *adapter = netdev_priv(netdev);
3258 struct e1000_hw *hw = &adapter->hw;
3259 uint32_t icr = E1000_READ_REG(hw, ICR);
3260 #ifndef CONFIG_E1000_NAPI
3261 int i;
3262 #else
3263 /* Interrupt Auto-Mask...upon reading ICR,
3264 * interrupts are masked. No need for the
3265 * IMC write, but it does mean we should
3266 * account for it ASAP. */
3267 if (likely(hw->mac_type >= e1000_82571))
3268 atomic_inc(&adapter->irq_sem);
3269 #endif
3270
3271 if (unlikely(!icr)) {
3272 #ifdef CONFIG_E1000_NAPI
3273 if (hw->mac_type >= e1000_82571)
3274 e1000_irq_enable(adapter);
3275 #endif
3276 return IRQ_NONE; /* Not our interrupt */
3277 }
3278
3279 if(unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
3280 hw->get_link_status = 1;
3281 mod_timer(&adapter->watchdog_timer, jiffies);
3282 }
3283
3284 #ifdef CONFIG_E1000_NAPI
3285 if (unlikely(hw->mac_type < e1000_82571)) {
3286 atomic_inc(&adapter->irq_sem);
3287 E1000_WRITE_REG(hw, IMC, ~0);
3288 E1000_WRITE_FLUSH(hw);
3289 }
3290 #ifdef CONFIG_E1000_MQ
3291 if (atomic_read(&adapter->rx_sched_call_data.count) == 0) {
3292 /* We must setup the cpumask once count == 0 since
3293 * each cpu bit is cleared when the work is done. */
3294 adapter->rx_sched_call_data.cpumask = adapter->cpumask;
3295 atomic_add(adapter->num_rx_queues - 1, &adapter->irq_sem);
3296 atomic_set(&adapter->rx_sched_call_data.count,
3297 adapter->num_rx_queues);
3298 smp_call_async_mask(&adapter->rx_sched_call_data);
3299 } else {
3300 printk("call_data.count == %u\n", atomic_read(&adapter->rx_sched_call_data.count));
3301 }
3302 #else /* if !CONFIG_E1000_MQ */
3303 if (likely(netif_rx_schedule_prep(&adapter->polling_netdev[0])))
3304 __netif_rx_schedule(&adapter->polling_netdev[0]);
3305 else
3306 e1000_irq_enable(adapter);
3307 #endif /* CONFIG_E1000_MQ */
3308
3309 #else /* if !CONFIG_E1000_NAPI */
3310 /* Writing IMC and IMS is needed for 82547.
3311 Due to Hub Link bus being occupied, an interrupt
3312 de-assertion message is not able to be sent.
3313 When an interrupt assertion message is generated later,
3314 two messages are re-ordered and sent out.
3315 That causes APIC to think 82547 is in de-assertion
3316 state, while 82547 is in assertion state, resulting
3317 in dead lock. Writing IMC forces 82547 into
3318 de-assertion state.
3319 */
3320 if(hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2){
3321 atomic_inc(&adapter->irq_sem);
3322 E1000_WRITE_REG(hw, IMC, ~0);
3323 }
3324
3325 for(i = 0; i < E1000_MAX_INTR; i++)
3326 if(unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
3327 !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
3328 break;
3329
3330 if(hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
3331 e1000_irq_enable(adapter);
3332
3333 #endif /* CONFIG_E1000_NAPI */
3334
3335 return IRQ_HANDLED;
3336 }
3337
3338 #ifdef CONFIG_E1000_NAPI
3339 /**
3340 * e1000_clean - NAPI Rx polling callback
3341 * @adapter: board private structure
3342 **/
3343
3344 static int
3345 e1000_clean(struct net_device *poll_dev, int *budget)
3346 {
3347 struct e1000_adapter *adapter;
3348 int work_to_do = min(*budget, poll_dev->quota);
3349 int tx_cleaned, i = 0, work_done = 0;
3350
3351 /* Must NOT use netdev_priv macro here. */
3352 adapter = poll_dev->priv;
3353
3354 /* Keep link state information with original netdev */
3355 if (!netif_carrier_ok(adapter->netdev))
3356 goto quit_polling;
3357
3358 while (poll_dev != &adapter->polling_netdev[i]) {
3359 i++;
3360 if (unlikely(i == adapter->num_rx_queues))
3361 BUG();
3362 }
3363
3364 tx_cleaned = e1000_clean_tx_irq(adapter, &adapter->tx_ring[i]);
3365 adapter->clean_rx(adapter, &adapter->rx_ring[i],
3366 &work_done, work_to_do);
3367
3368 *budget -= work_done;
3369 poll_dev->quota -= work_done;
3370
3371 /* If no Tx and not enough Rx work done, exit the polling mode */
3372 if((!tx_cleaned && (work_done == 0)) ||
3373 !netif_running(adapter->netdev)) {
3374 quit_polling:
3375 netif_rx_complete(poll_dev);
3376 e1000_irq_enable(adapter);
3377 return 0;
3378 }
3379
3380 return 1;
3381 }
3382
3383 #endif
3384 /**
3385 * e1000_clean_tx_irq - Reclaim resources after transmit completes
3386 * @adapter: board private structure
3387 **/
3388
3389 static boolean_t
3390 e1000_clean_tx_irq(struct e1000_adapter *adapter,
3391 struct e1000_tx_ring *tx_ring)
3392 {
3393 struct net_device *netdev = adapter->netdev;
3394 struct e1000_tx_desc *tx_desc, *eop_desc;
3395 struct e1000_buffer *buffer_info;
3396 unsigned int i, eop;
3397 boolean_t cleaned = FALSE;
3398
3399 i = tx_ring->next_to_clean;
3400 eop = tx_ring->buffer_info[i].next_to_watch;
3401 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3402
3403 while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
3404 for(cleaned = FALSE; !cleaned; ) {
3405 tx_desc = E1000_TX_DESC(*tx_ring, i);
3406 buffer_info = &tx_ring->buffer_info[i];
3407 cleaned = (i == eop);
3408
3409 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
3410
3411 tx_desc->buffer_addr = 0;
3412 tx_desc->lower.data = 0;
3413 tx_desc->upper.data = 0;
3414
3415 if(unlikely(++i == tx_ring->count)) i = 0;
3416 }
3417
3418 #ifdef CONFIG_E1000_MQ
3419 tx_ring->tx_stats.packets++;
3420 #endif
3421
3422 eop = tx_ring->buffer_info[i].next_to_watch;
3423 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3424 }
3425
3426 tx_ring->next_to_clean = i;
3427
3428 spin_lock(&tx_ring->tx_lock);
3429
3430 if(unlikely(cleaned && netif_queue_stopped(netdev) &&
3431 netif_carrier_ok(netdev)))
3432 netif_wake_queue(netdev);
3433
3434 spin_unlock(&tx_ring->tx_lock);
3435
3436 if (adapter->detect_tx_hung) {
3437 /* Detect a transmit hang in hardware, this serializes the
3438 * check with the clearing of time_stamp and movement of i */
3439 adapter->detect_tx_hung = FALSE;
3440 if (tx_ring->buffer_info[eop].dma &&
3441 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
3442 adapter->tx_timeout_factor * HZ)
3443 && !(E1000_READ_REG(&adapter->hw, STATUS) &
3444 E1000_STATUS_TXOFF)) {
3445
3446 /* detected Tx unit hang */
3447 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
3448 " Tx Queue <%lu>\n"
3449 " TDH <%x>\n"
3450 " TDT <%x>\n"
3451 " next_to_use <%x>\n"
3452 " next_to_clean <%x>\n"
3453 "buffer_info[next_to_clean]\n"
3454 " time_stamp <%lx>\n"
3455 " next_to_watch <%x>\n"
3456 " jiffies <%lx>\n"
3457 " next_to_watch.status <%x>\n",
3458 (unsigned long)((tx_ring - adapter->tx_ring) /
3459 sizeof(struct e1000_tx_ring)),
3460 readl(adapter->hw.hw_addr + tx_ring->tdh),
3461 readl(adapter->hw.hw_addr + tx_ring->tdt),
3462 tx_ring->next_to_use,
3463 tx_ring->next_to_clean,
3464 tx_ring->buffer_info[eop].time_stamp,
3465 eop,
3466 jiffies,
3467 eop_desc->upper.fields.status);
3468 netif_stop_queue(netdev);
3469 }
3470 }
3471 return cleaned;
3472 }
3473
3474 /**
3475 * e1000_rx_checksum - Receive Checksum Offload for 82543
3476 * @adapter: board private structure
3477 * @status_err: receive descriptor status and error fields
3478 * @csum: receive descriptor csum field
3479 * @sk_buff: socket buffer with received data
3480 **/
3481
3482 static inline void
3483 e1000_rx_checksum(struct e1000_adapter *adapter,
3484 uint32_t status_err, uint32_t csum,
3485 struct sk_buff *skb)
3486 {
3487 uint16_t status = (uint16_t)status_err;
3488 uint8_t errors = (uint8_t)(status_err >> 24);
3489 skb->ip_summed = CHECKSUM_NONE;
3490
3491 /* 82543 or newer only */
3492 if(unlikely(adapter->hw.mac_type < e1000_82543)) return;
3493 /* Ignore Checksum bit is set */
3494 if(unlikely(status & E1000_RXD_STAT_IXSM)) return;
3495 /* TCP/UDP checksum error bit is set */
3496 if(unlikely(errors & E1000_RXD_ERR_TCPE)) {
3497 /* let the stack verify checksum errors */
3498 adapter->hw_csum_err++;
3499 return;
3500 }
3501 /* TCP/UDP Checksum has not been calculated */
3502 if(adapter->hw.mac_type <= e1000_82547_rev_2) {
3503 if(!(status & E1000_RXD_STAT_TCPCS))
3504 return;
3505 } else {
3506 if(!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
3507 return;
3508 }
3509 /* It must be a TCP or UDP packet with a valid checksum */
3510 if (likely(status & E1000_RXD_STAT_TCPCS)) {
3511 /* TCP checksum is good */
3512 skb->ip_summed = CHECKSUM_UNNECESSARY;
3513 } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
3514 /* IP fragment with UDP payload */
3515 /* Hardware complements the payload checksum, so we undo it
3516 * and then put the value in host order for further stack use.
3517 */
3518 csum = ntohl(csum ^ 0xFFFF);
3519 skb->csum = csum;
3520 skb->ip_summed = CHECKSUM_HW;
3521 }
3522 adapter->hw_csum_good++;
3523 }
3524
3525 /**
3526 * e1000_clean_rx_irq - Send received data up the network stack; legacy
3527 * @adapter: board private structure
3528 **/
3529
3530 static boolean_t
3531 #ifdef CONFIG_E1000_NAPI
3532 e1000_clean_rx_irq(struct e1000_adapter *adapter,
3533 struct e1000_rx_ring *rx_ring,
3534 int *work_done, int work_to_do)
3535 #else
3536 e1000_clean_rx_irq(struct e1000_adapter *adapter,
3537 struct e1000_rx_ring *rx_ring)
3538 #endif
3539 {
3540 struct net_device *netdev = adapter->netdev;
3541 struct pci_dev *pdev = adapter->pdev;
3542 struct e1000_rx_desc *rx_desc;
3543 struct e1000_buffer *buffer_info;
3544 struct sk_buff *skb;
3545 unsigned long flags;
3546 uint32_t length;
3547 uint8_t last_byte;
3548 unsigned int i;
3549 boolean_t cleaned = FALSE;
3550 int cleaned_count = 0;
3551
3552 i = rx_ring->next_to_clean;
3553 rx_desc = E1000_RX_DESC(*rx_ring, i);
3554
3555 while(rx_desc->status & E1000_RXD_STAT_DD) {
3556 buffer_info = &rx_ring->buffer_info[i];
3557 #ifdef CONFIG_E1000_NAPI
3558 if(*work_done >= work_to_do)
3559 break;
3560 (*work_done)++;
3561 #endif
3562
3563 cleaned = TRUE;
3564 cleaned_count++;
3565 pci_unmap_single(pdev, buffer_info->dma, buffer_info->length,
3566 PCI_DMA_FROMDEVICE);
3567
3568 skb = buffer_info->skb;
3569 length = le16_to_cpu(rx_desc->length);
3570
3571 if(unlikely(!(rx_desc->status & E1000_RXD_STAT_EOP))) {
3572 /* All receives must fit into a single buffer */
3573 E1000_DBG("%s: Receive packet consumed multiple"
3574 " buffers\n", netdev->name);
3575 dev_kfree_skb_irq(skb);
3576 goto next_desc;
3577 }
3578
3579 if(unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
3580 last_byte = *(skb->data + length - 1);
3581 if(TBI_ACCEPT(&adapter->hw, rx_desc->status,
3582 rx_desc->errors, length, last_byte)) {
3583 spin_lock_irqsave(&adapter->stats_lock, flags);
3584 e1000_tbi_adjust_stats(&adapter->hw, &adapter->stats,
3585 length, skb->data);
3586 spin_unlock_irqrestore(&adapter->stats_lock,
3587 flags);
3588 length--;
3589 } else {
3590 dev_kfree_skb_irq(skb);
3591 goto next_desc;
3592 }
3593 }
3594
3595 /* Good Receive */
3596 skb_put(skb, length - ETHERNET_FCS_SIZE);
3597
3598 /* Receive Checksum Offload */
3599 e1000_rx_checksum(adapter, (uint32_t)(rx_desc->status) |
3600 ((uint32_t)(rx_desc->errors) << 24),
3601 rx_desc->csum, skb);
3602 skb->protocol = eth_type_trans(skb, netdev);
3603 #ifdef CONFIG_E1000_NAPI
3604 if(unlikely(adapter->vlgrp &&
3605 (rx_desc->status & E1000_RXD_STAT_VP))) {
3606 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
3607 le16_to_cpu(rx_desc->special) &
3608 E1000_RXD_SPC_VLAN_MASK);
3609 } else {
3610 netif_receive_skb(skb);
3611 }
3612 #else /* CONFIG_E1000_NAPI */
3613 if(unlikely(adapter->vlgrp &&
3614 (rx_desc->status & E1000_RXD_STAT_VP))) {
3615 vlan_hwaccel_rx(skb, adapter->vlgrp,
3616 le16_to_cpu(rx_desc->special) &
3617 E1000_RXD_SPC_VLAN_MASK);
3618 } else {
3619 netif_rx(skb);
3620 }
3621 #endif /* CONFIG_E1000_NAPI */
3622 netdev->last_rx = jiffies;
3623 #ifdef CONFIG_E1000_MQ
3624 rx_ring->rx_stats.packets++;
3625 rx_ring->rx_stats.bytes += length;
3626 #endif
3627
3628 next_desc:
3629 rx_desc->status = 0;
3630
3631 /* return some buffers to hardware, one at a time is too slow */
3632 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
3633 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3634 cleaned_count = 0;
3635 }
3636
3637 }
3638 rx_ring->next_to_clean = i;
3639
3640 cleaned_count = E1000_DESC_UNUSED(rx_ring);
3641 if (cleaned_count)
3642 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3643
3644 return cleaned;
3645 }
3646
3647 /**
3648 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
3649 * @adapter: board private structure
3650 **/
3651
3652 static boolean_t
3653 #ifdef CONFIG_E1000_NAPI
3654 e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
3655 struct e1000_rx_ring *rx_ring,
3656 int *work_done, int work_to_do)
3657 #else
3658 e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
3659 struct e1000_rx_ring *rx_ring)
3660 #endif
3661 {
3662 union e1000_rx_desc_packet_split *rx_desc;
3663 struct net_device *netdev = adapter->netdev;
3664 struct pci_dev *pdev = adapter->pdev;
3665 struct e1000_buffer *buffer_info;
3666 struct e1000_ps_page *ps_page;
3667 struct e1000_ps_page_dma *ps_page_dma;
3668 struct sk_buff *skb;
3669 unsigned int i, j;
3670 uint32_t length, staterr;
3671 int cleaned_count = 0;
3672 boolean_t cleaned = FALSE;
3673
3674 i = rx_ring->next_to_clean;
3675 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
3676 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
3677
3678 while(staterr & E1000_RXD_STAT_DD) {
3679 buffer_info = &rx_ring->buffer_info[i];
3680 ps_page = &rx_ring->ps_page[i];
3681 ps_page_dma = &rx_ring->ps_page_dma[i];
3682 #ifdef CONFIG_E1000_NAPI
3683 if(unlikely(*work_done >= work_to_do))
3684 break;
3685 (*work_done)++;
3686 #endif
3687 cleaned = TRUE;
3688 cleaned_count++;
3689 pci_unmap_single(pdev, buffer_info->dma,
3690 buffer_info->length,
3691 PCI_DMA_FROMDEVICE);
3692
3693 skb = buffer_info->skb;
3694
3695 if(unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
3696 E1000_DBG("%s: Packet Split buffers didn't pick up"
3697 " the full packet\n", netdev->name);
3698 dev_kfree_skb_irq(skb);
3699 goto next_desc;
3700 }
3701
3702 if(unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
3703 dev_kfree_skb_irq(skb);
3704 goto next_desc;
3705 }
3706
3707 length = le16_to_cpu(rx_desc->wb.middle.length0);
3708
3709 if(unlikely(!length)) {
3710 E1000_DBG("%s: Last part of the packet spanning"
3711 " multiple descriptors\n", netdev->name);
3712 dev_kfree_skb_irq(skb);
3713 goto next_desc;
3714 }
3715
3716 /* Good Receive */
3717 skb_put(skb, length);
3718
3719 for(j = 0; j < adapter->rx_ps_pages; j++) {
3720 if(!(length = le16_to_cpu(rx_desc->wb.upper.length[j])))
3721 break;
3722
3723 pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
3724 PAGE_SIZE, PCI_DMA_FROMDEVICE);
3725 ps_page_dma->ps_page_dma[j] = 0;
3726 skb_shinfo(skb)->frags[j].page =
3727 ps_page->ps_page[j];
3728 ps_page->ps_page[j] = NULL;
3729 skb_shinfo(skb)->frags[j].page_offset = 0;
3730 skb_shinfo(skb)->frags[j].size = length;
3731 skb_shinfo(skb)->nr_frags++;
3732 skb->len += length;
3733 skb->data_len += length;
3734 }
3735
3736 e1000_rx_checksum(adapter, staterr,
3737 rx_desc->wb.lower.hi_dword.csum_ip.csum, skb);
3738 skb->protocol = eth_type_trans(skb, netdev);
3739
3740 if(likely(rx_desc->wb.upper.header_status &
3741 E1000_RXDPS_HDRSTAT_HDRSP)) {
3742 adapter->rx_hdr_split++;
3743 #ifdef HAVE_RX_ZERO_COPY
3744 skb_shinfo(skb)->zero_copy = TRUE;
3745 #endif
3746 }
3747 #ifdef CONFIG_E1000_NAPI
3748 if(unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
3749 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
3750 le16_to_cpu(rx_desc->wb.middle.vlan) &
3751 E1000_RXD_SPC_VLAN_MASK);
3752 } else {
3753 netif_receive_skb(skb);
3754 }
3755 #else /* CONFIG_E1000_NAPI */
3756 if(unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
3757 vlan_hwaccel_rx(skb, adapter->vlgrp,
3758 le16_to_cpu(rx_desc->wb.middle.vlan) &
3759 E1000_RXD_SPC_VLAN_MASK);
3760 } else {
3761 netif_rx(skb);
3762 }
3763 #endif /* CONFIG_E1000_NAPI */
3764 netdev->last_rx = jiffies;
3765 #ifdef CONFIG_E1000_MQ
3766 rx_ring->rx_stats.packets++;
3767 rx_ring->rx_stats.bytes += length;
3768 #endif
3769
3770 next_desc:
3771 rx_desc->wb.middle.status_error &= ~0xFF;
3772 buffer_info->skb = NULL;
3773
3774 /* return some buffers to hardware, one at a time is too slow */
3775 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
3776 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3777 cleaned_count = 0;
3778 }
3779
3780 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
3781 }
3782 rx_ring->next_to_clean = i;
3783
3784 cleaned_count = E1000_DESC_UNUSED(rx_ring);
3785 if (cleaned_count)
3786 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3787
3788 return cleaned;
3789 }
3790
3791 /**
3792 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
3793 * @adapter: address of board private structure
3794 **/
3795
3796 static void
3797 e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
3798 struct e1000_rx_ring *rx_ring,
3799 int cleaned_count)
3800 {
3801 struct net_device *netdev = adapter->netdev;
3802 struct pci_dev *pdev = adapter->pdev;
3803 struct e1000_rx_desc *rx_desc;
3804 struct e1000_buffer *buffer_info;
3805 struct sk_buff *skb;
3806 unsigned int i;
3807 unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
3808
3809 i = rx_ring->next_to_use;
3810 buffer_info = &rx_ring->buffer_info[i];
3811
3812 while(!buffer_info->skb) {
3813 skb = dev_alloc_skb(bufsz);
3814
3815 if(unlikely(!skb)) {
3816 /* Better luck next round */
3817 adapter->alloc_rx_buff_failed++;
3818 break;
3819 }
3820
3821 /* Fix for errata 23, can't cross 64kB boundary */
3822 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
3823 struct sk_buff *oldskb = skb;
3824 DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
3825 "at %p\n", bufsz, skb->data);
3826 /* Try again, without freeing the previous */
3827 skb = dev_alloc_skb(bufsz);
3828 /* Failed allocation, critical failure */
3829 if (!skb) {
3830 dev_kfree_skb(oldskb);
3831 break;
3832 }
3833
3834 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
3835 /* give up */
3836 dev_kfree_skb(skb);
3837 dev_kfree_skb(oldskb);
3838 break; /* while !buffer_info->skb */
3839 } else {
3840 /* Use new allocation */
3841 dev_kfree_skb(oldskb);
3842 }
3843 }
3844 /* Make buffer alignment 2 beyond a 16 byte boundary
3845 * this will result in a 16 byte aligned IP header after
3846 * the 14 byte MAC header is removed
3847 */
3848 skb_reserve(skb, NET_IP_ALIGN);
3849
3850 skb->dev = netdev;
3851
3852 buffer_info->skb = skb;
3853 buffer_info->length = adapter->rx_buffer_len;
3854 buffer_info->dma = pci_map_single(pdev,
3855 skb->data,
3856 adapter->rx_buffer_len,
3857 PCI_DMA_FROMDEVICE);
3858
3859 /* Fix for errata 23, can't cross 64kB boundary */
3860 if (!e1000_check_64k_bound(adapter,
3861 (void *)(unsigned long)buffer_info->dma,
3862 adapter->rx_buffer_len)) {
3863 DPRINTK(RX_ERR, ERR,
3864 "dma align check failed: %u bytes at %p\n",
3865 adapter->rx_buffer_len,
3866 (void *)(unsigned long)buffer_info->dma);
3867 dev_kfree_skb(skb);
3868 buffer_info->skb = NULL;
3869
3870 pci_unmap_single(pdev, buffer_info->dma,
3871 adapter->rx_buffer_len,
3872 PCI_DMA_FROMDEVICE);
3873
3874 break; /* while !buffer_info->skb */
3875 }
3876 rx_desc = E1000_RX_DESC(*rx_ring, i);
3877 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
3878
3879 if(unlikely((i & ~(E1000_RX_BUFFER_WRITE - 1)) == i)) {
3880 /* Force memory writes to complete before letting h/w
3881 * know there are new descriptors to fetch. (Only
3882 * applicable for weak-ordered memory model archs,
3883 * such as IA-64). */
3884 wmb();
3885 writel(i, adapter->hw.hw_addr + rx_ring->rdt);
3886 }
3887
3888 if(unlikely(++i == rx_ring->count)) i = 0;
3889 buffer_info = &rx_ring->buffer_info[i];
3890 }
3891
3892 rx_ring->next_to_use = i;
3893 }
3894
3895 /**
3896 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
3897 * @adapter: address of board private structure
3898 **/
3899
3900 static void
3901 e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
3902 struct e1000_rx_ring *rx_ring,
3903 int cleaned_count)
3904 {
3905 struct net_device *netdev = adapter->netdev;
3906 struct pci_dev *pdev = adapter->pdev;
3907 union e1000_rx_desc_packet_split *rx_desc;
3908 struct e1000_buffer *buffer_info;
3909 struct e1000_ps_page *ps_page;
3910 struct e1000_ps_page_dma *ps_page_dma;
3911 struct sk_buff *skb;
3912 unsigned int i, j;
3913
3914 i = rx_ring->next_to_use;
3915 buffer_info = &rx_ring->buffer_info[i];
3916 ps_page = &rx_ring->ps_page[i];
3917 ps_page_dma = &rx_ring->ps_page_dma[i];
3918
3919 while (cleaned_count--) {
3920 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
3921
3922 for(j = 0; j < PS_PAGE_BUFFERS; j++) {
3923 if (j < adapter->rx_ps_pages) {
3924 if (likely(!ps_page->ps_page[j])) {
3925 ps_page->ps_page[j] =
3926 alloc_page(GFP_ATOMIC);
3927 if (unlikely(!ps_page->ps_page[j]))
3928 goto no_buffers;
3929 ps_page_dma->ps_page_dma[j] =
3930 pci_map_page(pdev,
3931 ps_page->ps_page[j],
3932 0, PAGE_SIZE,
3933 PCI_DMA_FROMDEVICE);
3934 }
3935 /* Refresh the desc even if buffer_addrs didn't
3936 * change because each write-back erases
3937 * this info.
3938 */
3939 rx_desc->read.buffer_addr[j+1] =
3940 cpu_to_le64(ps_page_dma->ps_page_dma[j]);
3941 } else
3942 rx_desc->read.buffer_addr[j+1] = ~0;
3943 }
3944
3945 skb = dev_alloc_skb(adapter->rx_ps_bsize0 + NET_IP_ALIGN);
3946
3947 if(unlikely(!skb))
3948 break;
3949
3950 /* Make buffer alignment 2 beyond a 16 byte boundary
3951 * this will result in a 16 byte aligned IP header after
3952 * the 14 byte MAC header is removed
3953 */
3954 skb_reserve(skb, NET_IP_ALIGN);
3955
3956 skb->dev = netdev;
3957
3958 buffer_info->skb = skb;
3959 buffer_info->length = adapter->rx_ps_bsize0;
3960 buffer_info->dma = pci_map_single(pdev, skb->data,
3961 adapter->rx_ps_bsize0,
3962 PCI_DMA_FROMDEVICE);
3963
3964 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
3965
3966 if(unlikely((i & ~(E1000_RX_BUFFER_WRITE - 1)) == i)) {
3967 /* Force memory writes to complete before letting h/w
3968 * know there are new descriptors to fetch. (Only
3969 * applicable for weak-ordered memory model archs,
3970 * such as IA-64). */
3971 wmb();
3972 /* Hardware increments by 16 bytes, but packet split
3973 * descriptors are 32 bytes...so we increment tail
3974 * twice as much.
3975 */
3976 writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
3977 }
3978
3979 if(unlikely(++i == rx_ring->count)) i = 0;
3980 buffer_info = &rx_ring->buffer_info[i];
3981 ps_page = &rx_ring->ps_page[i];
3982 ps_page_dma = &rx_ring->ps_page_dma[i];
3983 }
3984
3985 no_buffers:
3986 rx_ring->next_to_use = i;
3987 }
3988
3989 /**
3990 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
3991 * @adapter:
3992 **/
3993
3994 static void
3995 e1000_smartspeed(struct e1000_adapter *adapter)
3996 {
3997 uint16_t phy_status;
3998 uint16_t phy_ctrl;
3999
4000 if((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
4001 !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
4002 return;
4003
4004 if(adapter->smartspeed == 0) {
4005 /* If Master/Slave config fault is asserted twice,
4006 * we assume back-to-back */
4007 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
4008 if(!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
4009 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
4010 if(!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
4011 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
4012 if(phy_ctrl & CR_1000T_MS_ENABLE) {
4013 phy_ctrl &= ~CR_1000T_MS_ENABLE;
4014 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
4015 phy_ctrl);
4016 adapter->smartspeed++;
4017 if(!e1000_phy_setup_autoneg(&adapter->hw) &&
4018 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
4019 &phy_ctrl)) {
4020 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4021 MII_CR_RESTART_AUTO_NEG);
4022 e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
4023 phy_ctrl);
4024 }
4025 }
4026 return;
4027 } else if(adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
4028 /* If still no link, perhaps using 2/3 pair cable */
4029 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
4030 phy_ctrl |= CR_1000T_MS_ENABLE;
4031 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
4032 if(!e1000_phy_setup_autoneg(&adapter->hw) &&
4033 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
4034 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4035 MII_CR_RESTART_AUTO_NEG);
4036 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
4037 }
4038 }
4039 /* Restart process after E1000_SMARTSPEED_MAX iterations */
4040 if(adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
4041 adapter->smartspeed = 0;
4042 }
4043
4044 /**
4045 * e1000_ioctl -
4046 * @netdev:
4047 * @ifreq:
4048 * @cmd:
4049 **/
4050
4051 static int
4052 e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4053 {
4054 switch (cmd) {
4055 case SIOCGMIIPHY:
4056 case SIOCGMIIREG:
4057 case SIOCSMIIREG:
4058 return e1000_mii_ioctl(netdev, ifr, cmd);
4059 default:
4060 return -EOPNOTSUPP;
4061 }
4062 }
4063
4064 /**
4065 * e1000_mii_ioctl -
4066 * @netdev:
4067 * @ifreq:
4068 * @cmd:
4069 **/
4070
4071 static int
4072 e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4073 {
4074 struct e1000_adapter *adapter = netdev_priv(netdev);
4075 struct mii_ioctl_data *data = if_mii(ifr);
4076 int retval;
4077 uint16_t mii_reg;
4078 uint16_t spddplx;
4079 unsigned long flags;
4080
4081 if(adapter->hw.media_type != e1000_media_type_copper)
4082 return -EOPNOTSUPP;
4083
4084 switch (cmd) {
4085 case SIOCGMIIPHY:
4086 data->phy_id = adapter->hw.phy_addr;
4087 break;
4088 case SIOCGMIIREG:
4089 if(!capable(CAP_NET_ADMIN))
4090 return -EPERM;
4091 spin_lock_irqsave(&adapter->stats_lock, flags);
4092 if(e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
4093 &data->val_out)) {
4094 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4095 return -EIO;
4096 }
4097 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4098 break;
4099 case SIOCSMIIREG:
4100 if(!capable(CAP_NET_ADMIN))
4101 return -EPERM;
4102 if(data->reg_num & ~(0x1F))
4103 return -EFAULT;
4104 mii_reg = data->val_in;
4105 spin_lock_irqsave(&adapter->stats_lock, flags);
4106 if(e1000_write_phy_reg(&adapter->hw, data->reg_num,
4107 mii_reg)) {
4108 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4109 return -EIO;
4110 }
4111 if(adapter->hw.phy_type == e1000_phy_m88) {
4112 switch (data->reg_num) {
4113 case PHY_CTRL:
4114 if(mii_reg & MII_CR_POWER_DOWN)
4115 break;
4116 if(mii_reg & MII_CR_AUTO_NEG_EN) {
4117 adapter->hw.autoneg = 1;
4118 adapter->hw.autoneg_advertised = 0x2F;
4119 } else {
4120 if (mii_reg & 0x40)
4121 spddplx = SPEED_1000;
4122 else if (mii_reg & 0x2000)
4123 spddplx = SPEED_100;
4124 else
4125 spddplx = SPEED_10;
4126 spddplx += (mii_reg & 0x100)
4127 ? FULL_DUPLEX :
4128 HALF_DUPLEX;
4129 retval = e1000_set_spd_dplx(adapter,
4130 spddplx);
4131 if(retval) {
4132 spin_unlock_irqrestore(
4133 &adapter->stats_lock,
4134 flags);
4135 return retval;
4136 }
4137 }
4138 if(netif_running(adapter->netdev)) {
4139 e1000_down(adapter);
4140 e1000_up(adapter);
4141 } else
4142 e1000_reset(adapter);
4143 break;
4144 case M88E1000_PHY_SPEC_CTRL:
4145 case M88E1000_EXT_PHY_SPEC_CTRL:
4146 if(e1000_phy_reset(&adapter->hw)) {
4147 spin_unlock_irqrestore(
4148 &adapter->stats_lock, flags);
4149 return -EIO;
4150 }
4151 break;
4152 }
4153 } else {
4154 switch (data->reg_num) {
4155 case PHY_CTRL:
4156 if(mii_reg & MII_CR_POWER_DOWN)
4157 break;
4158 if(netif_running(adapter->netdev)) {
4159 e1000_down(adapter);
4160 e1000_up(adapter);
4161 } else
4162 e1000_reset(adapter);
4163 break;
4164 }
4165 }
4166 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4167 break;
4168 default:
4169 return -EOPNOTSUPP;
4170 }
4171 return E1000_SUCCESS;
4172 }
4173
4174 void
4175 e1000_pci_set_mwi(struct e1000_hw *hw)
4176 {
4177 struct e1000_adapter *adapter = hw->back;
4178 int ret_val = pci_set_mwi(adapter->pdev);
4179
4180 if(ret_val)
4181 DPRINTK(PROBE, ERR, "Error in setting MWI\n");
4182 }
4183
4184 void
4185 e1000_pci_clear_mwi(struct e1000_hw *hw)
4186 {
4187 struct e1000_adapter *adapter = hw->back;
4188
4189 pci_clear_mwi(adapter->pdev);
4190 }
4191
4192 void
4193 e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4194 {
4195 struct e1000_adapter *adapter = hw->back;
4196
4197 pci_read_config_word(adapter->pdev, reg, value);
4198 }
4199
4200 void
4201 e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4202 {
4203 struct e1000_adapter *adapter = hw->back;
4204
4205 pci_write_config_word(adapter->pdev, reg, *value);
4206 }
4207
4208 uint32_t
4209 e1000_io_read(struct e1000_hw *hw, unsigned long port)
4210 {
4211 return inl(port);
4212 }
4213
4214 void
4215 e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
4216 {
4217 outl(value, port);
4218 }
4219
4220 static void
4221 e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
4222 {
4223 struct e1000_adapter *adapter = netdev_priv(netdev);
4224 uint32_t ctrl, rctl;
4225
4226 e1000_irq_disable(adapter);
4227 adapter->vlgrp = grp;
4228
4229 if(grp) {
4230 /* enable VLAN tag insert/strip */
4231 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4232 ctrl |= E1000_CTRL_VME;
4233 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4234
4235 /* enable VLAN receive filtering */
4236 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4237 rctl |= E1000_RCTL_VFE;
4238 rctl &= ~E1000_RCTL_CFIEN;
4239 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4240 e1000_update_mng_vlan(adapter);
4241 } else {
4242 /* disable VLAN tag insert/strip */
4243 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4244 ctrl &= ~E1000_CTRL_VME;
4245 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4246
4247 /* disable VLAN filtering */
4248 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4249 rctl &= ~E1000_RCTL_VFE;
4250 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4251 if(adapter->mng_vlan_id != (uint16_t)E1000_MNG_VLAN_NONE) {
4252 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
4253 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4254 }
4255 }
4256
4257 e1000_irq_enable(adapter);
4258 }
4259
4260 static void
4261 e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
4262 {
4263 struct e1000_adapter *adapter = netdev_priv(netdev);
4264 uint32_t vfta, index;
4265 if((adapter->hw.mng_cookie.status &
4266 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4267 (vid == adapter->mng_vlan_id))
4268 return;
4269 /* add VID to filter table */
4270 index = (vid >> 5) & 0x7F;
4271 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4272 vfta |= (1 << (vid & 0x1F));
4273 e1000_write_vfta(&adapter->hw, index, vfta);
4274 }
4275
4276 static void
4277 e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
4278 {
4279 struct e1000_adapter *adapter = netdev_priv(netdev);
4280 uint32_t vfta, index;
4281
4282 e1000_irq_disable(adapter);
4283
4284 if(adapter->vlgrp)
4285 adapter->vlgrp->vlan_devices[vid] = NULL;
4286
4287 e1000_irq_enable(adapter);
4288
4289 if((adapter->hw.mng_cookie.status &
4290 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4291 (vid == adapter->mng_vlan_id)) {
4292 /* release control to f/w */
4293 e1000_release_hw_control(adapter);
4294 return;
4295 }
4296
4297 /* remove VID from filter table */
4298 index = (vid >> 5) & 0x7F;
4299 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4300 vfta &= ~(1 << (vid & 0x1F));
4301 e1000_write_vfta(&adapter->hw, index, vfta);
4302 }
4303
4304 static void
4305 e1000_restore_vlan(struct e1000_adapter *adapter)
4306 {
4307 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
4308
4309 if(adapter->vlgrp) {
4310 uint16_t vid;
4311 for(vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
4312 if(!adapter->vlgrp->vlan_devices[vid])
4313 continue;
4314 e1000_vlan_rx_add_vid(adapter->netdev, vid);
4315 }
4316 }
4317 }
4318
4319 int
4320 e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
4321 {
4322 adapter->hw.autoneg = 0;
4323
4324 /* Fiber NICs only allow 1000 gbps Full duplex */
4325 if((adapter->hw.media_type == e1000_media_type_fiber) &&
4326 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
4327 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
4328 return -EINVAL;
4329 }
4330
4331 switch(spddplx) {
4332 case SPEED_10 + DUPLEX_HALF:
4333 adapter->hw.forced_speed_duplex = e1000_10_half;
4334 break;
4335 case SPEED_10 + DUPLEX_FULL:
4336 adapter->hw.forced_speed_duplex = e1000_10_full;
4337 break;
4338 case SPEED_100 + DUPLEX_HALF:
4339 adapter->hw.forced_speed_duplex = e1000_100_half;
4340 break;
4341 case SPEED_100 + DUPLEX_FULL:
4342 adapter->hw.forced_speed_duplex = e1000_100_full;
4343 break;
4344 case SPEED_1000 + DUPLEX_FULL:
4345 adapter->hw.autoneg = 1;
4346 adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
4347 break;
4348 case SPEED_1000 + DUPLEX_HALF: /* not supported */
4349 default:
4350 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
4351 return -EINVAL;
4352 }
4353 return 0;
4354 }
4355
4356 #ifdef CONFIG_PM
4357 static int
4358 e1000_suspend(struct pci_dev *pdev, pm_message_t state)
4359 {
4360 struct net_device *netdev = pci_get_drvdata(pdev);
4361 struct e1000_adapter *adapter = netdev_priv(netdev);
4362 uint32_t ctrl, ctrl_ext, rctl, manc, status;
4363 uint32_t wufc = adapter->wol;
4364
4365 netif_device_detach(netdev);
4366
4367 if(netif_running(netdev))
4368 e1000_down(adapter);
4369
4370 status = E1000_READ_REG(&adapter->hw, STATUS);
4371 if(status & E1000_STATUS_LU)
4372 wufc &= ~E1000_WUFC_LNKC;
4373
4374 if(wufc) {
4375 e1000_setup_rctl(adapter);
4376 e1000_set_multi(netdev);
4377
4378 /* turn on all-multi mode if wake on multicast is enabled */
4379 if(adapter->wol & E1000_WUFC_MC) {
4380 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4381 rctl |= E1000_RCTL_MPE;
4382 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4383 }
4384
4385 if(adapter->hw.mac_type >= e1000_82540) {
4386 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4387 /* advertise wake from D3Cold */
4388 #define E1000_CTRL_ADVD3WUC 0x00100000
4389 /* phy power management enable */
4390 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
4391 ctrl |= E1000_CTRL_ADVD3WUC |
4392 E1000_CTRL_EN_PHY_PWR_MGMT;
4393 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4394 }
4395
4396 if(adapter->hw.media_type == e1000_media_type_fiber ||
4397 adapter->hw.media_type == e1000_media_type_internal_serdes) {
4398 /* keep the laser running in D3 */
4399 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
4400 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
4401 E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
4402 }
4403
4404 /* Allow time for pending master requests to run */
4405 e1000_disable_pciex_master(&adapter->hw);
4406
4407 E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
4408 E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
4409 pci_enable_wake(pdev, 3, 1);
4410 pci_enable_wake(pdev, 4, 1); /* 4 == D3 cold */
4411 } else {
4412 E1000_WRITE_REG(&adapter->hw, WUC, 0);
4413 E1000_WRITE_REG(&adapter->hw, WUFC, 0);
4414 pci_enable_wake(pdev, 3, 0);
4415 pci_enable_wake(pdev, 4, 0); /* 4 == D3 cold */
4416 }
4417
4418 pci_save_state(pdev);
4419
4420 if(adapter->hw.mac_type >= e1000_82540 &&
4421 adapter->hw.media_type == e1000_media_type_copper) {
4422 manc = E1000_READ_REG(&adapter->hw, MANC);
4423 if(manc & E1000_MANC_SMBUS_EN) {
4424 manc |= E1000_MANC_ARP_EN;
4425 E1000_WRITE_REG(&adapter->hw, MANC, manc);
4426 pci_enable_wake(pdev, 3, 1);
4427 pci_enable_wake(pdev, 4, 1); /* 4 == D3 cold */
4428 }
4429 }
4430
4431 /* Release control of h/w to f/w. If f/w is AMT enabled, this
4432 * would have already happened in close and is redundant. */
4433 e1000_release_hw_control(adapter);
4434
4435 pci_disable_device(pdev);
4436 pci_set_power_state(pdev, pci_choose_state(pdev, state));
4437
4438 return 0;
4439 }
4440
4441 static int
4442 e1000_resume(struct pci_dev *pdev)
4443 {
4444 struct net_device *netdev = pci_get_drvdata(pdev);
4445 struct e1000_adapter *adapter = netdev_priv(netdev);
4446 uint32_t manc, ret_val;
4447
4448 pci_set_power_state(pdev, PCI_D0);
4449 pci_restore_state(pdev);
4450 ret_val = pci_enable_device(pdev);
4451 pci_set_master(pdev);
4452
4453 pci_enable_wake(pdev, PCI_D3hot, 0);
4454 pci_enable_wake(pdev, PCI_D3cold, 0);
4455
4456 e1000_reset(adapter);
4457 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
4458
4459 if(netif_running(netdev))
4460 e1000_up(adapter);
4461
4462 netif_device_attach(netdev);
4463
4464 if(adapter->hw.mac_type >= e1000_82540 &&
4465 adapter->hw.media_type == e1000_media_type_copper) {
4466 manc = E1000_READ_REG(&adapter->hw, MANC);
4467 manc &= ~(E1000_MANC_ARP_EN);
4468 E1000_WRITE_REG(&adapter->hw, MANC, manc);
4469 }
4470
4471 /* If the controller is 82573 and f/w is AMT, do not set
4472 * DRV_LOAD until the interface is up. For all other cases,
4473 * let the f/w know that the h/w is now under the control
4474 * of the driver. */
4475 if (adapter->hw.mac_type != e1000_82573 ||
4476 !e1000_check_mng_mode(&adapter->hw))
4477 e1000_get_hw_control(adapter);
4478
4479 return 0;
4480 }
4481 #endif
4482 #ifdef CONFIG_NET_POLL_CONTROLLER
4483 /*
4484 * Polling 'interrupt' - used by things like netconsole to send skbs
4485 * without having to re-enable interrupts. It's not called while
4486 * the interrupt routine is executing.
4487 */
4488 static void
4489 e1000_netpoll(struct net_device *netdev)
4490 {
4491 struct e1000_adapter *adapter = netdev_priv(netdev);
4492 disable_irq(adapter->pdev->irq);
4493 e1000_intr(adapter->pdev->irq, netdev, NULL);
4494 e1000_clean_tx_irq(adapter, adapter->tx_ring);
4495 #ifndef CONFIG_E1000_NAPI
4496 adapter->clean_rx(adapter, adapter->rx_ring);
4497 #endif
4498 enable_irq(adapter->pdev->irq);
4499 }
4500 #endif
4501
4502 /* e1000_main.c */
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