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1 /*******************************************************************************
2
3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27 *******************************************************************************/
28
29 #include "e1000.h"
30 #include <net/ip6_checksum.h>
31
32 char e1000_driver_name[] = "e1000";
33 static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
34 #define DRV_VERSION "7.3.21-k3-NAPI"
35 const char e1000_driver_version[] = DRV_VERSION;
36 static const char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
37
38 /* e1000_pci_tbl - PCI Device ID Table
39 *
40 * Last entry must be all 0s
41 *
42 * Macro expands to...
43 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
44 */
45 static struct pci_device_id e1000_pci_tbl[] = {
46 INTEL_E1000_ETHERNET_DEVICE(0x1000),
47 INTEL_E1000_ETHERNET_DEVICE(0x1001),
48 INTEL_E1000_ETHERNET_DEVICE(0x1004),
49 INTEL_E1000_ETHERNET_DEVICE(0x1008),
50 INTEL_E1000_ETHERNET_DEVICE(0x1009),
51 INTEL_E1000_ETHERNET_DEVICE(0x100C),
52 INTEL_E1000_ETHERNET_DEVICE(0x100D),
53 INTEL_E1000_ETHERNET_DEVICE(0x100E),
54 INTEL_E1000_ETHERNET_DEVICE(0x100F),
55 INTEL_E1000_ETHERNET_DEVICE(0x1010),
56 INTEL_E1000_ETHERNET_DEVICE(0x1011),
57 INTEL_E1000_ETHERNET_DEVICE(0x1012),
58 INTEL_E1000_ETHERNET_DEVICE(0x1013),
59 INTEL_E1000_ETHERNET_DEVICE(0x1014),
60 INTEL_E1000_ETHERNET_DEVICE(0x1015),
61 INTEL_E1000_ETHERNET_DEVICE(0x1016),
62 INTEL_E1000_ETHERNET_DEVICE(0x1017),
63 INTEL_E1000_ETHERNET_DEVICE(0x1018),
64 INTEL_E1000_ETHERNET_DEVICE(0x1019),
65 INTEL_E1000_ETHERNET_DEVICE(0x101A),
66 INTEL_E1000_ETHERNET_DEVICE(0x101D),
67 INTEL_E1000_ETHERNET_DEVICE(0x101E),
68 INTEL_E1000_ETHERNET_DEVICE(0x1026),
69 INTEL_E1000_ETHERNET_DEVICE(0x1027),
70 INTEL_E1000_ETHERNET_DEVICE(0x1028),
71 INTEL_E1000_ETHERNET_DEVICE(0x1075),
72 INTEL_E1000_ETHERNET_DEVICE(0x1076),
73 INTEL_E1000_ETHERNET_DEVICE(0x1077),
74 INTEL_E1000_ETHERNET_DEVICE(0x1078),
75 INTEL_E1000_ETHERNET_DEVICE(0x1079),
76 INTEL_E1000_ETHERNET_DEVICE(0x107A),
77 INTEL_E1000_ETHERNET_DEVICE(0x107B),
78 INTEL_E1000_ETHERNET_DEVICE(0x107C),
79 INTEL_E1000_ETHERNET_DEVICE(0x108A),
80 INTEL_E1000_ETHERNET_DEVICE(0x1099),
81 INTEL_E1000_ETHERNET_DEVICE(0x10B5),
82 /* required last entry */
83 {0,}
84 };
85
86 MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
87
88 int e1000_up(struct e1000_adapter *adapter);
89 void e1000_down(struct e1000_adapter *adapter);
90 void e1000_reinit_locked(struct e1000_adapter *adapter);
91 void e1000_reset(struct e1000_adapter *adapter);
92 int e1000_set_spd_dplx(struct e1000_adapter *adapter, u16 spddplx);
93 int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
94 int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
95 void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
96 void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
97 static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
98 struct e1000_tx_ring *txdr);
99 static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
100 struct e1000_rx_ring *rxdr);
101 static void e1000_free_tx_resources(struct e1000_adapter *adapter,
102 struct e1000_tx_ring *tx_ring);
103 static void e1000_free_rx_resources(struct e1000_adapter *adapter,
104 struct e1000_rx_ring *rx_ring);
105 void e1000_update_stats(struct e1000_adapter *adapter);
106
107 static int e1000_init_module(void);
108 static void e1000_exit_module(void);
109 static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
110 static void __devexit e1000_remove(struct pci_dev *pdev);
111 static int e1000_alloc_queues(struct e1000_adapter *adapter);
112 static int e1000_sw_init(struct e1000_adapter *adapter);
113 static int e1000_open(struct net_device *netdev);
114 static int e1000_close(struct net_device *netdev);
115 static void e1000_configure_tx(struct e1000_adapter *adapter);
116 static void e1000_configure_rx(struct e1000_adapter *adapter);
117 static void e1000_setup_rctl(struct e1000_adapter *adapter);
118 static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
119 static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
120 static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
121 struct e1000_tx_ring *tx_ring);
122 static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
123 struct e1000_rx_ring *rx_ring);
124 static void e1000_set_rx_mode(struct net_device *netdev);
125 static void e1000_update_phy_info(unsigned long data);
126 static void e1000_watchdog(unsigned long data);
127 static void e1000_82547_tx_fifo_stall(unsigned long data);
128 static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
129 static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
130 static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
131 static int e1000_set_mac(struct net_device *netdev, void *p);
132 static irqreturn_t e1000_intr(int irq, void *data);
133 static irqreturn_t e1000_intr_msi(int irq, void *data);
134 static bool e1000_clean_tx_irq(struct e1000_adapter *adapter,
135 struct e1000_tx_ring *tx_ring);
136 static int e1000_clean(struct napi_struct *napi, int budget);
137 static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
138 struct e1000_rx_ring *rx_ring,
139 int *work_done, int work_to_do);
140 static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
141 struct e1000_rx_ring *rx_ring,
142 int cleaned_count);
143 static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
144 static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
145 int cmd);
146 static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
147 static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
148 static void e1000_tx_timeout(struct net_device *dev);
149 static void e1000_reset_task(struct work_struct *work);
150 static void e1000_smartspeed(struct e1000_adapter *adapter);
151 static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
152 struct sk_buff *skb);
153
154 static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
155 static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid);
156 static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid);
157 static void e1000_restore_vlan(struct e1000_adapter *adapter);
158
159 static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
160 #ifdef CONFIG_PM
161 static int e1000_resume(struct pci_dev *pdev);
162 #endif
163 static void e1000_shutdown(struct pci_dev *pdev);
164
165 #ifdef CONFIG_NET_POLL_CONTROLLER
166 /* for netdump / net console */
167 static void e1000_netpoll (struct net_device *netdev);
168 #endif
169
170 #define COPYBREAK_DEFAULT 256
171 static unsigned int copybreak __read_mostly = COPYBREAK_DEFAULT;
172 module_param(copybreak, uint, 0644);
173 MODULE_PARM_DESC(copybreak,
174 "Maximum size of packet that is copied to a new buffer on receive");
175
176 static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
177 pci_channel_state_t state);
178 static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev);
179 static void e1000_io_resume(struct pci_dev *pdev);
180
181 static struct pci_error_handlers e1000_err_handler = {
182 .error_detected = e1000_io_error_detected,
183 .slot_reset = e1000_io_slot_reset,
184 .resume = e1000_io_resume,
185 };
186
187 static struct pci_driver e1000_driver = {
188 .name = e1000_driver_name,
189 .id_table = e1000_pci_tbl,
190 .probe = e1000_probe,
191 .remove = __devexit_p(e1000_remove),
192 #ifdef CONFIG_PM
193 /* Power Managment Hooks */
194 .suspend = e1000_suspend,
195 .resume = e1000_resume,
196 #endif
197 .shutdown = e1000_shutdown,
198 .err_handler = &e1000_err_handler
199 };
200
201 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
202 MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
203 MODULE_LICENSE("GPL");
204 MODULE_VERSION(DRV_VERSION);
205
206 static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
207 module_param(debug, int, 0);
208 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
209
210 /**
211 * e1000_init_module - Driver Registration Routine
212 *
213 * e1000_init_module is the first routine called when the driver is
214 * loaded. All it does is register with the PCI subsystem.
215 **/
216
217 static int __init e1000_init_module(void)
218 {
219 int ret;
220 printk(KERN_INFO "%s - version %s\n",
221 e1000_driver_string, e1000_driver_version);
222
223 printk(KERN_INFO "%s\n", e1000_copyright);
224
225 ret = pci_register_driver(&e1000_driver);
226 if (copybreak != COPYBREAK_DEFAULT) {
227 if (copybreak == 0)
228 printk(KERN_INFO "e1000: copybreak disabled\n");
229 else
230 printk(KERN_INFO "e1000: copybreak enabled for "
231 "packets <= %u bytes\n", copybreak);
232 }
233 return ret;
234 }
235
236 module_init(e1000_init_module);
237
238 /**
239 * e1000_exit_module - Driver Exit Cleanup Routine
240 *
241 * e1000_exit_module is called just before the driver is removed
242 * from memory.
243 **/
244
245 static void __exit e1000_exit_module(void)
246 {
247 pci_unregister_driver(&e1000_driver);
248 }
249
250 module_exit(e1000_exit_module);
251
252 static int e1000_request_irq(struct e1000_adapter *adapter)
253 {
254 struct e1000_hw *hw = &adapter->hw;
255 struct net_device *netdev = adapter->netdev;
256 irq_handler_t handler = e1000_intr;
257 int irq_flags = IRQF_SHARED;
258 int err;
259
260 if (hw->mac_type >= e1000_82571) {
261 adapter->have_msi = !pci_enable_msi(adapter->pdev);
262 if (adapter->have_msi) {
263 handler = e1000_intr_msi;
264 irq_flags = 0;
265 }
266 }
267
268 err = request_irq(adapter->pdev->irq, handler, irq_flags, netdev->name,
269 netdev);
270 if (err) {
271 if (adapter->have_msi)
272 pci_disable_msi(adapter->pdev);
273 DPRINTK(PROBE, ERR,
274 "Unable to allocate interrupt Error: %d\n", err);
275 }
276
277 return err;
278 }
279
280 static void e1000_free_irq(struct e1000_adapter *adapter)
281 {
282 struct net_device *netdev = adapter->netdev;
283
284 free_irq(adapter->pdev->irq, netdev);
285
286 if (adapter->have_msi)
287 pci_disable_msi(adapter->pdev);
288 }
289
290 /**
291 * e1000_irq_disable - Mask off interrupt generation on the NIC
292 * @adapter: board private structure
293 **/
294
295 static void e1000_irq_disable(struct e1000_adapter *adapter)
296 {
297 struct e1000_hw *hw = &adapter->hw;
298
299 ew32(IMC, ~0);
300 E1000_WRITE_FLUSH();
301 synchronize_irq(adapter->pdev->irq);
302 }
303
304 /**
305 * e1000_irq_enable - Enable default interrupt generation settings
306 * @adapter: board private structure
307 **/
308
309 static void e1000_irq_enable(struct e1000_adapter *adapter)
310 {
311 struct e1000_hw *hw = &adapter->hw;
312
313 ew32(IMS, IMS_ENABLE_MASK);
314 E1000_WRITE_FLUSH();
315 }
316
317 static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
318 {
319 struct e1000_hw *hw = &adapter->hw;
320 struct net_device *netdev = adapter->netdev;
321 u16 vid = hw->mng_cookie.vlan_id;
322 u16 old_vid = adapter->mng_vlan_id;
323 if (adapter->vlgrp) {
324 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
325 if (hw->mng_cookie.status &
326 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
327 e1000_vlan_rx_add_vid(netdev, vid);
328 adapter->mng_vlan_id = vid;
329 } else
330 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
331
332 if ((old_vid != (u16)E1000_MNG_VLAN_NONE) &&
333 (vid != old_vid) &&
334 !vlan_group_get_device(adapter->vlgrp, old_vid))
335 e1000_vlan_rx_kill_vid(netdev, old_vid);
336 } else
337 adapter->mng_vlan_id = vid;
338 }
339 }
340
341 /**
342 * e1000_release_hw_control - release control of the h/w to f/w
343 * @adapter: address of board private structure
344 *
345 * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
346 * For ASF and Pass Through versions of f/w this means that the
347 * driver is no longer loaded. For AMT version (only with 82573) i
348 * of the f/w this means that the network i/f is closed.
349 *
350 **/
351
352 static void e1000_release_hw_control(struct e1000_adapter *adapter)
353 {
354 u32 ctrl_ext;
355 u32 swsm;
356 struct e1000_hw *hw = &adapter->hw;
357
358 /* Let firmware taken over control of h/w */
359 switch (hw->mac_type) {
360 case e1000_82573:
361 swsm = er32(SWSM);
362 ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD);
363 break;
364 case e1000_82571:
365 case e1000_82572:
366 case e1000_80003es2lan:
367 case e1000_ich8lan:
368 ctrl_ext = er32(CTRL_EXT);
369 ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
370 break;
371 default:
372 break;
373 }
374 }
375
376 /**
377 * e1000_get_hw_control - get control of the h/w from f/w
378 * @adapter: address of board private structure
379 *
380 * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
381 * For ASF and Pass Through versions of f/w this means that
382 * the driver is loaded. For AMT version (only with 82573)
383 * of the f/w this means that the network i/f is open.
384 *
385 **/
386
387 static void e1000_get_hw_control(struct e1000_adapter *adapter)
388 {
389 u32 ctrl_ext;
390 u32 swsm;
391 struct e1000_hw *hw = &adapter->hw;
392
393 /* Let firmware know the driver has taken over */
394 switch (hw->mac_type) {
395 case e1000_82573:
396 swsm = er32(SWSM);
397 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD);
398 break;
399 case e1000_82571:
400 case e1000_82572:
401 case e1000_80003es2lan:
402 case e1000_ich8lan:
403 ctrl_ext = er32(CTRL_EXT);
404 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
405 break;
406 default:
407 break;
408 }
409 }
410
411 static void e1000_init_manageability(struct e1000_adapter *adapter)
412 {
413 struct e1000_hw *hw = &adapter->hw;
414
415 if (adapter->en_mng_pt) {
416 u32 manc = er32(MANC);
417
418 /* disable hardware interception of ARP */
419 manc &= ~(E1000_MANC_ARP_EN);
420
421 /* enable receiving management packets to the host */
422 /* this will probably generate destination unreachable messages
423 * from the host OS, but the packets will be handled on SMBUS */
424 if (hw->has_manc2h) {
425 u32 manc2h = er32(MANC2H);
426
427 manc |= E1000_MANC_EN_MNG2HOST;
428 #define E1000_MNG2HOST_PORT_623 (1 << 5)
429 #define E1000_MNG2HOST_PORT_664 (1 << 6)
430 manc2h |= E1000_MNG2HOST_PORT_623;
431 manc2h |= E1000_MNG2HOST_PORT_664;
432 ew32(MANC2H, manc2h);
433 }
434
435 ew32(MANC, manc);
436 }
437 }
438
439 static void e1000_release_manageability(struct e1000_adapter *adapter)
440 {
441 struct e1000_hw *hw = &adapter->hw;
442
443 if (adapter->en_mng_pt) {
444 u32 manc = er32(MANC);
445
446 /* re-enable hardware interception of ARP */
447 manc |= E1000_MANC_ARP_EN;
448
449 if (hw->has_manc2h)
450 manc &= ~E1000_MANC_EN_MNG2HOST;
451
452 /* don't explicitly have to mess with MANC2H since
453 * MANC has an enable disable that gates MANC2H */
454
455 ew32(MANC, manc);
456 }
457 }
458
459 /**
460 * e1000_configure - configure the hardware for RX and TX
461 * @adapter = private board structure
462 **/
463 static void e1000_configure(struct e1000_adapter *adapter)
464 {
465 struct net_device *netdev = adapter->netdev;
466 int i;
467
468 e1000_set_rx_mode(netdev);
469
470 e1000_restore_vlan(adapter);
471 e1000_init_manageability(adapter);
472
473 e1000_configure_tx(adapter);
474 e1000_setup_rctl(adapter);
475 e1000_configure_rx(adapter);
476 /* call E1000_DESC_UNUSED which always leaves
477 * at least 1 descriptor unused to make sure
478 * next_to_use != next_to_clean */
479 for (i = 0; i < adapter->num_rx_queues; i++) {
480 struct e1000_rx_ring *ring = &adapter->rx_ring[i];
481 adapter->alloc_rx_buf(adapter, ring,
482 E1000_DESC_UNUSED(ring));
483 }
484
485 adapter->tx_queue_len = netdev->tx_queue_len;
486 }
487
488 int e1000_up(struct e1000_adapter *adapter)
489 {
490 struct e1000_hw *hw = &adapter->hw;
491
492 /* hardware has been reset, we need to reload some things */
493 e1000_configure(adapter);
494
495 clear_bit(__E1000_DOWN, &adapter->flags);
496
497 napi_enable(&adapter->napi);
498
499 e1000_irq_enable(adapter);
500
501 /* fire a link change interrupt to start the watchdog */
502 ew32(ICS, E1000_ICS_LSC);
503 return 0;
504 }
505
506 /**
507 * e1000_power_up_phy - restore link in case the phy was powered down
508 * @adapter: address of board private structure
509 *
510 * The phy may be powered down to save power and turn off link when the
511 * driver is unloaded and wake on lan is not enabled (among others)
512 * *** this routine MUST be followed by a call to e1000_reset ***
513 *
514 **/
515
516 void e1000_power_up_phy(struct e1000_adapter *adapter)
517 {
518 struct e1000_hw *hw = &adapter->hw;
519 u16 mii_reg = 0;
520
521 /* Just clear the power down bit to wake the phy back up */
522 if (hw->media_type == e1000_media_type_copper) {
523 /* according to the manual, the phy will retain its
524 * settings across a power-down/up cycle */
525 e1000_read_phy_reg(hw, PHY_CTRL, &mii_reg);
526 mii_reg &= ~MII_CR_POWER_DOWN;
527 e1000_write_phy_reg(hw, PHY_CTRL, mii_reg);
528 }
529 }
530
531 static void e1000_power_down_phy(struct e1000_adapter *adapter)
532 {
533 struct e1000_hw *hw = &adapter->hw;
534
535 /* Power down the PHY so no link is implied when interface is down *
536 * The PHY cannot be powered down if any of the following is true *
537 * (a) WoL is enabled
538 * (b) AMT is active
539 * (c) SoL/IDER session is active */
540 if (!adapter->wol && hw->mac_type >= e1000_82540 &&
541 hw->media_type == e1000_media_type_copper) {
542 u16 mii_reg = 0;
543
544 switch (hw->mac_type) {
545 case e1000_82540:
546 case e1000_82545:
547 case e1000_82545_rev_3:
548 case e1000_82546:
549 case e1000_82546_rev_3:
550 case e1000_82541:
551 case e1000_82541_rev_2:
552 case e1000_82547:
553 case e1000_82547_rev_2:
554 if (er32(MANC) & E1000_MANC_SMBUS_EN)
555 goto out;
556 break;
557 case e1000_82571:
558 case e1000_82572:
559 case e1000_82573:
560 case e1000_80003es2lan:
561 case e1000_ich8lan:
562 if (e1000_check_mng_mode(hw) ||
563 e1000_check_phy_reset_block(hw))
564 goto out;
565 break;
566 default:
567 goto out;
568 }
569 e1000_read_phy_reg(hw, PHY_CTRL, &mii_reg);
570 mii_reg |= MII_CR_POWER_DOWN;
571 e1000_write_phy_reg(hw, PHY_CTRL, mii_reg);
572 mdelay(1);
573 }
574 out:
575 return;
576 }
577
578 void e1000_down(struct e1000_adapter *adapter)
579 {
580 struct net_device *netdev = adapter->netdev;
581
582 /* signal that we're down so the interrupt handler does not
583 * reschedule our watchdog timer */
584 set_bit(__E1000_DOWN, &adapter->flags);
585
586 napi_disable(&adapter->napi);
587
588 e1000_irq_disable(adapter);
589
590 del_timer_sync(&adapter->tx_fifo_stall_timer);
591 del_timer_sync(&adapter->watchdog_timer);
592 del_timer_sync(&adapter->phy_info_timer);
593
594 netdev->tx_queue_len = adapter->tx_queue_len;
595 adapter->link_speed = 0;
596 adapter->link_duplex = 0;
597 netif_carrier_off(netdev);
598 netif_stop_queue(netdev);
599
600 e1000_reset(adapter);
601 e1000_clean_all_tx_rings(adapter);
602 e1000_clean_all_rx_rings(adapter);
603 }
604
605 void e1000_reinit_locked(struct e1000_adapter *adapter)
606 {
607 WARN_ON(in_interrupt());
608 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
609 msleep(1);
610 e1000_down(adapter);
611 e1000_up(adapter);
612 clear_bit(__E1000_RESETTING, &adapter->flags);
613 }
614
615 void e1000_reset(struct e1000_adapter *adapter)
616 {
617 struct e1000_hw *hw = &adapter->hw;
618 u32 pba = 0, tx_space, min_tx_space, min_rx_space;
619 u16 fc_high_water_mark = E1000_FC_HIGH_DIFF;
620 bool legacy_pba_adjust = false;
621
622 /* Repartition Pba for greater than 9k mtu
623 * To take effect CTRL.RST is required.
624 */
625
626 switch (hw->mac_type) {
627 case e1000_82542_rev2_0:
628 case e1000_82542_rev2_1:
629 case e1000_82543:
630 case e1000_82544:
631 case e1000_82540:
632 case e1000_82541:
633 case e1000_82541_rev_2:
634 legacy_pba_adjust = true;
635 pba = E1000_PBA_48K;
636 break;
637 case e1000_82545:
638 case e1000_82545_rev_3:
639 case e1000_82546:
640 case e1000_82546_rev_3:
641 pba = E1000_PBA_48K;
642 break;
643 case e1000_82547:
644 case e1000_82547_rev_2:
645 legacy_pba_adjust = true;
646 pba = E1000_PBA_30K;
647 break;
648 case e1000_82571:
649 case e1000_82572:
650 case e1000_80003es2lan:
651 pba = E1000_PBA_38K;
652 break;
653 case e1000_82573:
654 pba = E1000_PBA_20K;
655 break;
656 case e1000_ich8lan:
657 pba = E1000_PBA_8K;
658 case e1000_undefined:
659 case e1000_num_macs:
660 break;
661 }
662
663 if (legacy_pba_adjust) {
664 if (adapter->netdev->mtu > E1000_RXBUFFER_8192)
665 pba -= 8; /* allocate more FIFO for Tx */
666
667 if (hw->mac_type == e1000_82547) {
668 adapter->tx_fifo_head = 0;
669 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
670 adapter->tx_fifo_size =
671 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
672 atomic_set(&adapter->tx_fifo_stall, 0);
673 }
674 } else if (hw->max_frame_size > MAXIMUM_ETHERNET_FRAME_SIZE) {
675 /* adjust PBA for jumbo frames */
676 ew32(PBA, pba);
677
678 /* To maintain wire speed transmits, the Tx FIFO should be
679 * large enough to accomodate two full transmit packets,
680 * rounded up to the next 1KB and expressed in KB. Likewise,
681 * the Rx FIFO should be large enough to accomodate at least
682 * one full receive packet and is similarly rounded up and
683 * expressed in KB. */
684 pba = er32(PBA);
685 /* upper 16 bits has Tx packet buffer allocation size in KB */
686 tx_space = pba >> 16;
687 /* lower 16 bits has Rx packet buffer allocation size in KB */
688 pba &= 0xffff;
689 /* don't include ethernet FCS because hardware appends/strips */
690 min_rx_space = adapter->netdev->mtu + ENET_HEADER_SIZE +
691 VLAN_TAG_SIZE;
692 min_tx_space = min_rx_space;
693 min_tx_space *= 2;
694 min_tx_space = ALIGN(min_tx_space, 1024);
695 min_tx_space >>= 10;
696 min_rx_space = ALIGN(min_rx_space, 1024);
697 min_rx_space >>= 10;
698
699 /* If current Tx allocation is less than the min Tx FIFO size,
700 * and the min Tx FIFO size is less than the current Rx FIFO
701 * allocation, take space away from current Rx allocation */
702 if (tx_space < min_tx_space &&
703 ((min_tx_space - tx_space) < pba)) {
704 pba = pba - (min_tx_space - tx_space);
705
706 /* PCI/PCIx hardware has PBA alignment constraints */
707 switch (hw->mac_type) {
708 case e1000_82545 ... e1000_82546_rev_3:
709 pba &= ~(E1000_PBA_8K - 1);
710 break;
711 default:
712 break;
713 }
714
715 /* if short on rx space, rx wins and must trump tx
716 * adjustment or use Early Receive if available */
717 if (pba < min_rx_space) {
718 switch (hw->mac_type) {
719 case e1000_82573:
720 /* ERT enabled in e1000_configure_rx */
721 break;
722 default:
723 pba = min_rx_space;
724 break;
725 }
726 }
727 }
728 }
729
730 ew32(PBA, pba);
731
732 /* flow control settings */
733 /* Set the FC high water mark to 90% of the FIFO size.
734 * Required to clear last 3 LSB */
735 fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
736 /* We can't use 90% on small FIFOs because the remainder
737 * would be less than 1 full frame. In this case, we size
738 * it to allow at least a full frame above the high water
739 * mark. */
740 if (pba < E1000_PBA_16K)
741 fc_high_water_mark = (pba * 1024) - 1600;
742
743 hw->fc_high_water = fc_high_water_mark;
744 hw->fc_low_water = fc_high_water_mark - 8;
745 if (hw->mac_type == e1000_80003es2lan)
746 hw->fc_pause_time = 0xFFFF;
747 else
748 hw->fc_pause_time = E1000_FC_PAUSE_TIME;
749 hw->fc_send_xon = 1;
750 hw->fc = hw->original_fc;
751
752 /* Allow time for pending master requests to run */
753 e1000_reset_hw(hw);
754 if (hw->mac_type >= e1000_82544)
755 ew32(WUC, 0);
756
757 if (e1000_init_hw(hw))
758 DPRINTK(PROBE, ERR, "Hardware Error\n");
759 e1000_update_mng_vlan(adapter);
760
761 /* if (adapter->hwflags & HWFLAGS_PHY_PWR_BIT) { */
762 if (hw->mac_type >= e1000_82544 &&
763 hw->mac_type <= e1000_82547_rev_2 &&
764 hw->autoneg == 1 &&
765 hw->autoneg_advertised == ADVERTISE_1000_FULL) {
766 u32 ctrl = er32(CTRL);
767 /* clear phy power management bit if we are in gig only mode,
768 * which if enabled will attempt negotiation to 100Mb, which
769 * can cause a loss of link at power off or driver unload */
770 ctrl &= ~E1000_CTRL_SWDPIN3;
771 ew32(CTRL, ctrl);
772 }
773
774 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
775 ew32(VET, ETHERNET_IEEE_VLAN_TYPE);
776
777 e1000_reset_adaptive(hw);
778 e1000_phy_get_info(hw, &adapter->phy_info);
779
780 if (!adapter->smart_power_down &&
781 (hw->mac_type == e1000_82571 ||
782 hw->mac_type == e1000_82572)) {
783 u16 phy_data = 0;
784 /* speed up time to link by disabling smart power down, ignore
785 * the return value of this function because there is nothing
786 * different we would do if it failed */
787 e1000_read_phy_reg(hw, IGP02E1000_PHY_POWER_MGMT,
788 &phy_data);
789 phy_data &= ~IGP02E1000_PM_SPD;
790 e1000_write_phy_reg(hw, IGP02E1000_PHY_POWER_MGMT,
791 phy_data);
792 }
793
794 e1000_release_manageability(adapter);
795 }
796
797 /**
798 * Dump the eeprom for users having checksum issues
799 **/
800 static void e1000_dump_eeprom(struct e1000_adapter *adapter)
801 {
802 struct net_device *netdev = adapter->netdev;
803 struct ethtool_eeprom eeprom;
804 const struct ethtool_ops *ops = netdev->ethtool_ops;
805 u8 *data;
806 int i;
807 u16 csum_old, csum_new = 0;
808
809 eeprom.len = ops->get_eeprom_len(netdev);
810 eeprom.offset = 0;
811
812 data = kmalloc(eeprom.len, GFP_KERNEL);
813 if (!data) {
814 printk(KERN_ERR "Unable to allocate memory to dump EEPROM"
815 " data\n");
816 return;
817 }
818
819 ops->get_eeprom(netdev, &eeprom, data);
820
821 csum_old = (data[EEPROM_CHECKSUM_REG * 2]) +
822 (data[EEPROM_CHECKSUM_REG * 2 + 1] << 8);
823 for (i = 0; i < EEPROM_CHECKSUM_REG * 2; i += 2)
824 csum_new += data[i] + (data[i + 1] << 8);
825 csum_new = EEPROM_SUM - csum_new;
826
827 printk(KERN_ERR "/*********************/\n");
828 printk(KERN_ERR "Current EEPROM Checksum : 0x%04x\n", csum_old);
829 printk(KERN_ERR "Calculated : 0x%04x\n", csum_new);
830
831 printk(KERN_ERR "Offset Values\n");
832 printk(KERN_ERR "======== ======\n");
833 print_hex_dump(KERN_ERR, "", DUMP_PREFIX_OFFSET, 16, 1, data, 128, 0);
834
835 printk(KERN_ERR "Include this output when contacting your support "
836 "provider.\n");
837 printk(KERN_ERR "This is not a software error! Something bad "
838 "happened to your hardware or\n");
839 printk(KERN_ERR "EEPROM image. Ignoring this "
840 "problem could result in further problems,\n");
841 printk(KERN_ERR "possibly loss of data, corruption or system hangs!\n");
842 printk(KERN_ERR "The MAC Address will be reset to 00:00:00:00:00:00, "
843 "which is invalid\n");
844 printk(KERN_ERR "and requires you to set the proper MAC "
845 "address manually before continuing\n");
846 printk(KERN_ERR "to enable this network device.\n");
847 printk(KERN_ERR "Please inspect the EEPROM dump and report the issue "
848 "to your hardware vendor\n");
849 printk(KERN_ERR "or Intel Customer Support.\n");
850 printk(KERN_ERR "/*********************/\n");
851
852 kfree(data);
853 }
854
855 /**
856 * e1000_is_need_ioport - determine if an adapter needs ioport resources or not
857 * @pdev: PCI device information struct
858 *
859 * Return true if an adapter needs ioport resources
860 **/
861 static int e1000_is_need_ioport(struct pci_dev *pdev)
862 {
863 switch (pdev->device) {
864 case E1000_DEV_ID_82540EM:
865 case E1000_DEV_ID_82540EM_LOM:
866 case E1000_DEV_ID_82540EP:
867 case E1000_DEV_ID_82540EP_LOM:
868 case E1000_DEV_ID_82540EP_LP:
869 case E1000_DEV_ID_82541EI:
870 case E1000_DEV_ID_82541EI_MOBILE:
871 case E1000_DEV_ID_82541ER:
872 case E1000_DEV_ID_82541ER_LOM:
873 case E1000_DEV_ID_82541GI:
874 case E1000_DEV_ID_82541GI_LF:
875 case E1000_DEV_ID_82541GI_MOBILE:
876 case E1000_DEV_ID_82544EI_COPPER:
877 case E1000_DEV_ID_82544EI_FIBER:
878 case E1000_DEV_ID_82544GC_COPPER:
879 case E1000_DEV_ID_82544GC_LOM:
880 case E1000_DEV_ID_82545EM_COPPER:
881 case E1000_DEV_ID_82545EM_FIBER:
882 case E1000_DEV_ID_82546EB_COPPER:
883 case E1000_DEV_ID_82546EB_FIBER:
884 case E1000_DEV_ID_82546EB_QUAD_COPPER:
885 return true;
886 default:
887 return false;
888 }
889 }
890
891 static const struct net_device_ops e1000_netdev_ops = {
892 .ndo_open = e1000_open,
893 .ndo_stop = e1000_close,
894 .ndo_start_xmit = e1000_xmit_frame,
895 .ndo_get_stats = e1000_get_stats,
896 .ndo_set_rx_mode = e1000_set_rx_mode,
897 .ndo_set_mac_address = e1000_set_mac,
898 .ndo_tx_timeout = e1000_tx_timeout,
899 .ndo_change_mtu = e1000_change_mtu,
900 .ndo_do_ioctl = e1000_ioctl,
901 .ndo_validate_addr = eth_validate_addr,
902
903 .ndo_vlan_rx_register = e1000_vlan_rx_register,
904 .ndo_vlan_rx_add_vid = e1000_vlan_rx_add_vid,
905 .ndo_vlan_rx_kill_vid = e1000_vlan_rx_kill_vid,
906 #ifdef CONFIG_NET_POLL_CONTROLLER
907 .ndo_poll_controller = e1000_netpoll,
908 #endif
909 };
910
911 /**
912 * e1000_probe - Device Initialization Routine
913 * @pdev: PCI device information struct
914 * @ent: entry in e1000_pci_tbl
915 *
916 * Returns 0 on success, negative on failure
917 *
918 * e1000_probe initializes an adapter identified by a pci_dev structure.
919 * The OS initialization, configuring of the adapter private structure,
920 * and a hardware reset occur.
921 **/
922 static int __devinit e1000_probe(struct pci_dev *pdev,
923 const struct pci_device_id *ent)
924 {
925 struct net_device *netdev;
926 struct e1000_adapter *adapter;
927 struct e1000_hw *hw;
928
929 static int cards_found = 0;
930 static int global_quad_port_a = 0; /* global ksp3 port a indication */
931 int i, err, pci_using_dac;
932 u16 eeprom_data = 0;
933 u16 eeprom_apme_mask = E1000_EEPROM_APME;
934 int bars, need_ioport;
935
936 /* do not allocate ioport bars when not needed */
937 need_ioport = e1000_is_need_ioport(pdev);
938 if (need_ioport) {
939 bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
940 err = pci_enable_device(pdev);
941 } else {
942 bars = pci_select_bars(pdev, IORESOURCE_MEM);
943 err = pci_enable_device_mem(pdev);
944 }
945 if (err)
946 return err;
947
948 if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK) &&
949 !pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK)) {
950 pci_using_dac = 1;
951 } else {
952 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
953 if (err) {
954 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
955 if (err) {
956 E1000_ERR("No usable DMA configuration, "
957 "aborting\n");
958 goto err_dma;
959 }
960 }
961 pci_using_dac = 0;
962 }
963
964 err = pci_request_selected_regions(pdev, bars, e1000_driver_name);
965 if (err)
966 goto err_pci_reg;
967
968 pci_set_master(pdev);
969
970 err = -ENOMEM;
971 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
972 if (!netdev)
973 goto err_alloc_etherdev;
974
975 SET_NETDEV_DEV(netdev, &pdev->dev);
976
977 pci_set_drvdata(pdev, netdev);
978 adapter = netdev_priv(netdev);
979 adapter->netdev = netdev;
980 adapter->pdev = pdev;
981 adapter->msg_enable = (1 << debug) - 1;
982 adapter->bars = bars;
983 adapter->need_ioport = need_ioport;
984
985 hw = &adapter->hw;
986 hw->back = adapter;
987
988 err = -EIO;
989 hw->hw_addr = pci_ioremap_bar(pdev, BAR_0);
990 if (!hw->hw_addr)
991 goto err_ioremap;
992
993 if (adapter->need_ioport) {
994 for (i = BAR_1; i <= BAR_5; i++) {
995 if (pci_resource_len(pdev, i) == 0)
996 continue;
997 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
998 hw->io_base = pci_resource_start(pdev, i);
999 break;
1000 }
1001 }
1002 }
1003
1004 netdev->netdev_ops = &e1000_netdev_ops;
1005 e1000_set_ethtool_ops(netdev);
1006 netdev->watchdog_timeo = 5 * HZ;
1007 netif_napi_add(netdev, &adapter->napi, e1000_clean, 64);
1008
1009 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
1010
1011 adapter->bd_number = cards_found;
1012
1013 /* setup the private structure */
1014
1015 err = e1000_sw_init(adapter);
1016 if (err)
1017 goto err_sw_init;
1018
1019 err = -EIO;
1020 /* Flash BAR mapping must happen after e1000_sw_init
1021 * because it depends on mac_type */
1022 if ((hw->mac_type == e1000_ich8lan) &&
1023 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
1024 hw->flash_address = pci_ioremap_bar(pdev, 1);
1025 if (!hw->flash_address)
1026 goto err_flashmap;
1027 }
1028
1029 if (e1000_check_phy_reset_block(hw))
1030 DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
1031
1032 if (hw->mac_type >= e1000_82543) {
1033 netdev->features = NETIF_F_SG |
1034 NETIF_F_HW_CSUM |
1035 NETIF_F_HW_VLAN_TX |
1036 NETIF_F_HW_VLAN_RX |
1037 NETIF_F_HW_VLAN_FILTER;
1038 if (hw->mac_type == e1000_ich8lan)
1039 netdev->features &= ~NETIF_F_HW_VLAN_FILTER;
1040 }
1041
1042 if ((hw->mac_type >= e1000_82544) &&
1043 (hw->mac_type != e1000_82547))
1044 netdev->features |= NETIF_F_TSO;
1045
1046 if (hw->mac_type > e1000_82547_rev_2)
1047 netdev->features |= NETIF_F_TSO6;
1048 if (pci_using_dac)
1049 netdev->features |= NETIF_F_HIGHDMA;
1050
1051 netdev->vlan_features |= NETIF_F_TSO;
1052 netdev->vlan_features |= NETIF_F_TSO6;
1053 netdev->vlan_features |= NETIF_F_HW_CSUM;
1054 netdev->vlan_features |= NETIF_F_SG;
1055
1056 adapter->en_mng_pt = e1000_enable_mng_pass_thru(hw);
1057
1058 /* initialize eeprom parameters */
1059 if (e1000_init_eeprom_params(hw)) {
1060 E1000_ERR("EEPROM initialization failed\n");
1061 goto err_eeprom;
1062 }
1063
1064 /* before reading the EEPROM, reset the controller to
1065 * put the device in a known good starting state */
1066
1067 e1000_reset_hw(hw);
1068
1069 /* make sure the EEPROM is good */
1070 if (e1000_validate_eeprom_checksum(hw) < 0) {
1071 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
1072 e1000_dump_eeprom(adapter);
1073 /*
1074 * set MAC address to all zeroes to invalidate and temporary
1075 * disable this device for the user. This blocks regular
1076 * traffic while still permitting ethtool ioctls from reaching
1077 * the hardware as well as allowing the user to run the
1078 * interface after manually setting a hw addr using
1079 * `ip set address`
1080 */
1081 memset(hw->mac_addr, 0, netdev->addr_len);
1082 } else {
1083 /* copy the MAC address out of the EEPROM */
1084 if (e1000_read_mac_addr(hw))
1085 DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
1086 }
1087 /* don't block initalization here due to bad MAC address */
1088 memcpy(netdev->dev_addr, hw->mac_addr, netdev->addr_len);
1089 memcpy(netdev->perm_addr, hw->mac_addr, netdev->addr_len);
1090
1091 if (!is_valid_ether_addr(netdev->perm_addr))
1092 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
1093
1094 e1000_get_bus_info(hw);
1095
1096 init_timer(&adapter->tx_fifo_stall_timer);
1097 adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
1098 adapter->tx_fifo_stall_timer.data = (unsigned long)adapter;
1099
1100 init_timer(&adapter->watchdog_timer);
1101 adapter->watchdog_timer.function = &e1000_watchdog;
1102 adapter->watchdog_timer.data = (unsigned long) adapter;
1103
1104 init_timer(&adapter->phy_info_timer);
1105 adapter->phy_info_timer.function = &e1000_update_phy_info;
1106 adapter->phy_info_timer.data = (unsigned long)adapter;
1107
1108 INIT_WORK(&adapter->reset_task, e1000_reset_task);
1109
1110 e1000_check_options(adapter);
1111
1112 /* Initial Wake on LAN setting
1113 * If APM wake is enabled in the EEPROM,
1114 * enable the ACPI Magic Packet filter
1115 */
1116
1117 switch (hw->mac_type) {
1118 case e1000_82542_rev2_0:
1119 case e1000_82542_rev2_1:
1120 case e1000_82543:
1121 break;
1122 case e1000_82544:
1123 e1000_read_eeprom(hw,
1124 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
1125 eeprom_apme_mask = E1000_EEPROM_82544_APM;
1126 break;
1127 case e1000_ich8lan:
1128 e1000_read_eeprom(hw,
1129 EEPROM_INIT_CONTROL1_REG, 1, &eeprom_data);
1130 eeprom_apme_mask = E1000_EEPROM_ICH8_APME;
1131 break;
1132 case e1000_82546:
1133 case e1000_82546_rev_3:
1134 case e1000_82571:
1135 case e1000_80003es2lan:
1136 if (er32(STATUS) & E1000_STATUS_FUNC_1){
1137 e1000_read_eeprom(hw,
1138 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
1139 break;
1140 }
1141 /* Fall Through */
1142 default:
1143 e1000_read_eeprom(hw,
1144 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
1145 break;
1146 }
1147 if (eeprom_data & eeprom_apme_mask)
1148 adapter->eeprom_wol |= E1000_WUFC_MAG;
1149
1150 /* now that we have the eeprom settings, apply the special cases
1151 * where the eeprom may be wrong or the board simply won't support
1152 * wake on lan on a particular port */
1153 switch (pdev->device) {
1154 case E1000_DEV_ID_82546GB_PCIE:
1155 adapter->eeprom_wol = 0;
1156 break;
1157 case E1000_DEV_ID_82546EB_FIBER:
1158 case E1000_DEV_ID_82546GB_FIBER:
1159 case E1000_DEV_ID_82571EB_FIBER:
1160 /* Wake events only supported on port A for dual fiber
1161 * regardless of eeprom setting */
1162 if (er32(STATUS) & E1000_STATUS_FUNC_1)
1163 adapter->eeprom_wol = 0;
1164 break;
1165 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
1166 case E1000_DEV_ID_82571EB_QUAD_COPPER:
1167 case E1000_DEV_ID_82571EB_QUAD_FIBER:
1168 case E1000_DEV_ID_82571EB_QUAD_COPPER_LOWPROFILE:
1169 case E1000_DEV_ID_82571PT_QUAD_COPPER:
1170 /* if quad port adapter, disable WoL on all but port A */
1171 if (global_quad_port_a != 0)
1172 adapter->eeprom_wol = 0;
1173 else
1174 adapter->quad_port_a = 1;
1175 /* Reset for multiple quad port adapters */
1176 if (++global_quad_port_a == 4)
1177 global_quad_port_a = 0;
1178 break;
1179 }
1180
1181 /* initialize the wol settings based on the eeprom settings */
1182 adapter->wol = adapter->eeprom_wol;
1183 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
1184
1185 /* print bus type/speed/width info */
1186 DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
1187 ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
1188 (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
1189 ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
1190 (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
1191 (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
1192 (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
1193 (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
1194 ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
1195 (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
1196 (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
1197 "32-bit"));
1198
1199 printk("%pM\n", netdev->dev_addr);
1200
1201 if (hw->bus_type == e1000_bus_type_pci_express) {
1202 DPRINTK(PROBE, WARNING, "This device (id %04x:%04x) will no "
1203 "longer be supported by this driver in the future.\n",
1204 pdev->vendor, pdev->device);
1205 DPRINTK(PROBE, WARNING, "please use the \"e1000e\" "
1206 "driver instead.\n");
1207 }
1208
1209 /* reset the hardware with the new settings */
1210 e1000_reset(adapter);
1211
1212 /* If the controller is 82573 and f/w is AMT, do not set
1213 * DRV_LOAD until the interface is up. For all other cases,
1214 * let the f/w know that the h/w is now under the control
1215 * of the driver. */
1216 if (hw->mac_type != e1000_82573 ||
1217 !e1000_check_mng_mode(hw))
1218 e1000_get_hw_control(adapter);
1219
1220 /* tell the stack to leave us alone until e1000_open() is called */
1221 netif_carrier_off(netdev);
1222 netif_stop_queue(netdev);
1223
1224 strcpy(netdev->name, "eth%d");
1225 err = register_netdev(netdev);
1226 if (err)
1227 goto err_register;
1228
1229 DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
1230
1231 cards_found++;
1232 return 0;
1233
1234 err_register:
1235 e1000_release_hw_control(adapter);
1236 err_eeprom:
1237 if (!e1000_check_phy_reset_block(hw))
1238 e1000_phy_hw_reset(hw);
1239
1240 if (hw->flash_address)
1241 iounmap(hw->flash_address);
1242 err_flashmap:
1243 kfree(adapter->tx_ring);
1244 kfree(adapter->rx_ring);
1245 err_sw_init:
1246 iounmap(hw->hw_addr);
1247 err_ioremap:
1248 free_netdev(netdev);
1249 err_alloc_etherdev:
1250 pci_release_selected_regions(pdev, bars);
1251 err_pci_reg:
1252 err_dma:
1253 pci_disable_device(pdev);
1254 return err;
1255 }
1256
1257 /**
1258 * e1000_remove - Device Removal Routine
1259 * @pdev: PCI device information struct
1260 *
1261 * e1000_remove is called by the PCI subsystem to alert the driver
1262 * that it should release a PCI device. The could be caused by a
1263 * Hot-Plug event, or because the driver is going to be removed from
1264 * memory.
1265 **/
1266
1267 static void __devexit e1000_remove(struct pci_dev *pdev)
1268 {
1269 struct net_device *netdev = pci_get_drvdata(pdev);
1270 struct e1000_adapter *adapter = netdev_priv(netdev);
1271 struct e1000_hw *hw = &adapter->hw;
1272
1273 cancel_work_sync(&adapter->reset_task);
1274
1275 e1000_release_manageability(adapter);
1276
1277 /* Release control of h/w to f/w. If f/w is AMT enabled, this
1278 * would have already happened in close and is redundant. */
1279 e1000_release_hw_control(adapter);
1280
1281 unregister_netdev(netdev);
1282
1283 if (!e1000_check_phy_reset_block(hw))
1284 e1000_phy_hw_reset(hw);
1285
1286 kfree(adapter->tx_ring);
1287 kfree(adapter->rx_ring);
1288
1289 iounmap(hw->hw_addr);
1290 if (hw->flash_address)
1291 iounmap(hw->flash_address);
1292 pci_release_selected_regions(pdev, adapter->bars);
1293
1294 free_netdev(netdev);
1295
1296 pci_disable_device(pdev);
1297 }
1298
1299 /**
1300 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
1301 * @adapter: board private structure to initialize
1302 *
1303 * e1000_sw_init initializes the Adapter private data structure.
1304 * Fields are initialized based on PCI device information and
1305 * OS network device settings (MTU size).
1306 **/
1307
1308 static int __devinit e1000_sw_init(struct e1000_adapter *adapter)
1309 {
1310 struct e1000_hw *hw = &adapter->hw;
1311 struct net_device *netdev = adapter->netdev;
1312 struct pci_dev *pdev = adapter->pdev;
1313
1314 /* PCI config space info */
1315
1316 hw->vendor_id = pdev->vendor;
1317 hw->device_id = pdev->device;
1318 hw->subsystem_vendor_id = pdev->subsystem_vendor;
1319 hw->subsystem_id = pdev->subsystem_device;
1320 hw->revision_id = pdev->revision;
1321
1322 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
1323
1324 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1325 hw->max_frame_size = netdev->mtu +
1326 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
1327 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
1328
1329 /* identify the MAC */
1330
1331 if (e1000_set_mac_type(hw)) {
1332 DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
1333 return -EIO;
1334 }
1335
1336 switch (hw->mac_type) {
1337 default:
1338 break;
1339 case e1000_82541:
1340 case e1000_82547:
1341 case e1000_82541_rev_2:
1342 case e1000_82547_rev_2:
1343 hw->phy_init_script = 1;
1344 break;
1345 }
1346
1347 e1000_set_media_type(hw);
1348
1349 hw->wait_autoneg_complete = false;
1350 hw->tbi_compatibility_en = true;
1351 hw->adaptive_ifs = true;
1352
1353 /* Copper options */
1354
1355 if (hw->media_type == e1000_media_type_copper) {
1356 hw->mdix = AUTO_ALL_MODES;
1357 hw->disable_polarity_correction = false;
1358 hw->master_slave = E1000_MASTER_SLAVE;
1359 }
1360
1361 adapter->num_tx_queues = 1;
1362 adapter->num_rx_queues = 1;
1363
1364 if (e1000_alloc_queues(adapter)) {
1365 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
1366 return -ENOMEM;
1367 }
1368
1369 /* Explicitly disable IRQ since the NIC can be in any state. */
1370 e1000_irq_disable(adapter);
1371
1372 spin_lock_init(&adapter->stats_lock);
1373
1374 set_bit(__E1000_DOWN, &adapter->flags);
1375
1376 return 0;
1377 }
1378
1379 /**
1380 * e1000_alloc_queues - Allocate memory for all rings
1381 * @adapter: board private structure to initialize
1382 *
1383 * We allocate one ring per queue at run-time since we don't know the
1384 * number of queues at compile-time.
1385 **/
1386
1387 static int __devinit e1000_alloc_queues(struct e1000_adapter *adapter)
1388 {
1389 adapter->tx_ring = kcalloc(adapter->num_tx_queues,
1390 sizeof(struct e1000_tx_ring), GFP_KERNEL);
1391 if (!adapter->tx_ring)
1392 return -ENOMEM;
1393
1394 adapter->rx_ring = kcalloc(adapter->num_rx_queues,
1395 sizeof(struct e1000_rx_ring), GFP_KERNEL);
1396 if (!adapter->rx_ring) {
1397 kfree(adapter->tx_ring);
1398 return -ENOMEM;
1399 }
1400
1401 return E1000_SUCCESS;
1402 }
1403
1404 /**
1405 * e1000_open - Called when a network interface is made active
1406 * @netdev: network interface device structure
1407 *
1408 * Returns 0 on success, negative value on failure
1409 *
1410 * The open entry point is called when a network interface is made
1411 * active by the system (IFF_UP). At this point all resources needed
1412 * for transmit and receive operations are allocated, the interrupt
1413 * handler is registered with the OS, the watchdog timer is started,
1414 * and the stack is notified that the interface is ready.
1415 **/
1416
1417 static int e1000_open(struct net_device *netdev)
1418 {
1419 struct e1000_adapter *adapter = netdev_priv(netdev);
1420 struct e1000_hw *hw = &adapter->hw;
1421 int err;
1422
1423 /* disallow open during test */
1424 if (test_bit(__E1000_TESTING, &adapter->flags))
1425 return -EBUSY;
1426
1427 /* allocate transmit descriptors */
1428 err = e1000_setup_all_tx_resources(adapter);
1429 if (err)
1430 goto err_setup_tx;
1431
1432 /* allocate receive descriptors */
1433 err = e1000_setup_all_rx_resources(adapter);
1434 if (err)
1435 goto err_setup_rx;
1436
1437 e1000_power_up_phy(adapter);
1438
1439 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
1440 if ((hw->mng_cookie.status &
1441 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1442 e1000_update_mng_vlan(adapter);
1443 }
1444
1445 /* If AMT is enabled, let the firmware know that the network
1446 * interface is now open */
1447 if (hw->mac_type == e1000_82573 &&
1448 e1000_check_mng_mode(hw))
1449 e1000_get_hw_control(adapter);
1450
1451 /* before we allocate an interrupt, we must be ready to handle it.
1452 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
1453 * as soon as we call pci_request_irq, so we have to setup our
1454 * clean_rx handler before we do so. */
1455 e1000_configure(adapter);
1456
1457 err = e1000_request_irq(adapter);
1458 if (err)
1459 goto err_req_irq;
1460
1461 /* From here on the code is the same as e1000_up() */
1462 clear_bit(__E1000_DOWN, &adapter->flags);
1463
1464 napi_enable(&adapter->napi);
1465
1466 e1000_irq_enable(adapter);
1467
1468 netif_start_queue(netdev);
1469
1470 /* fire a link status change interrupt to start the watchdog */
1471 ew32(ICS, E1000_ICS_LSC);
1472
1473 return E1000_SUCCESS;
1474
1475 err_req_irq:
1476 e1000_release_hw_control(adapter);
1477 e1000_power_down_phy(adapter);
1478 e1000_free_all_rx_resources(adapter);
1479 err_setup_rx:
1480 e1000_free_all_tx_resources(adapter);
1481 err_setup_tx:
1482 e1000_reset(adapter);
1483
1484 return err;
1485 }
1486
1487 /**
1488 * e1000_close - Disables a network interface
1489 * @netdev: network interface device structure
1490 *
1491 * Returns 0, this is not allowed to fail
1492 *
1493 * The close entry point is called when an interface is de-activated
1494 * by the OS. The hardware is still under the drivers control, but
1495 * needs to be disabled. A global MAC reset is issued to stop the
1496 * hardware, and all transmit and receive resources are freed.
1497 **/
1498
1499 static int e1000_close(struct net_device *netdev)
1500 {
1501 struct e1000_adapter *adapter = netdev_priv(netdev);
1502 struct e1000_hw *hw = &adapter->hw;
1503
1504 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1505 e1000_down(adapter);
1506 e1000_power_down_phy(adapter);
1507 e1000_free_irq(adapter);
1508
1509 e1000_free_all_tx_resources(adapter);
1510 e1000_free_all_rx_resources(adapter);
1511
1512 /* kill manageability vlan ID if supported, but not if a vlan with
1513 * the same ID is registered on the host OS (let 8021q kill it) */
1514 if ((hw->mng_cookie.status &
1515 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
1516 !(adapter->vlgrp &&
1517 vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id))) {
1518 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1519 }
1520
1521 /* If AMT is enabled, let the firmware know that the network
1522 * interface is now closed */
1523 if (hw->mac_type == e1000_82573 &&
1524 e1000_check_mng_mode(hw))
1525 e1000_release_hw_control(adapter);
1526
1527 return 0;
1528 }
1529
1530 /**
1531 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1532 * @adapter: address of board private structure
1533 * @start: address of beginning of memory
1534 * @len: length of memory
1535 **/
1536 static bool e1000_check_64k_bound(struct e1000_adapter *adapter, void *start,
1537 unsigned long len)
1538 {
1539 struct e1000_hw *hw = &adapter->hw;
1540 unsigned long begin = (unsigned long)start;
1541 unsigned long end = begin + len;
1542
1543 /* First rev 82545 and 82546 need to not allow any memory
1544 * write location to cross 64k boundary due to errata 23 */
1545 if (hw->mac_type == e1000_82545 ||
1546 hw->mac_type == e1000_82546) {
1547 return ((begin ^ (end - 1)) >> 16) != 0 ? false : true;
1548 }
1549
1550 return true;
1551 }
1552
1553 /**
1554 * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1555 * @adapter: board private structure
1556 * @txdr: tx descriptor ring (for a specific queue) to setup
1557 *
1558 * Return 0 on success, negative on failure
1559 **/
1560
1561 static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
1562 struct e1000_tx_ring *txdr)
1563 {
1564 struct pci_dev *pdev = adapter->pdev;
1565 int size;
1566
1567 size = sizeof(struct e1000_buffer) * txdr->count;
1568 txdr->buffer_info = vmalloc(size);
1569 if (!txdr->buffer_info) {
1570 DPRINTK(PROBE, ERR,
1571 "Unable to allocate memory for the transmit descriptor ring\n");
1572 return -ENOMEM;
1573 }
1574 memset(txdr->buffer_info, 0, size);
1575
1576 /* round up to nearest 4K */
1577
1578 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
1579 txdr->size = ALIGN(txdr->size, 4096);
1580
1581 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
1582 if (!txdr->desc) {
1583 setup_tx_desc_die:
1584 vfree(txdr->buffer_info);
1585 DPRINTK(PROBE, ERR,
1586 "Unable to allocate memory for the transmit descriptor ring\n");
1587 return -ENOMEM;
1588 }
1589
1590 /* Fix for errata 23, can't cross 64kB boundary */
1591 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1592 void *olddesc = txdr->desc;
1593 dma_addr_t olddma = txdr->dma;
1594 DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
1595 "at %p\n", txdr->size, txdr->desc);
1596 /* Try again, without freeing the previous */
1597 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
1598 /* Failed allocation, critical failure */
1599 if (!txdr->desc) {
1600 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1601 goto setup_tx_desc_die;
1602 }
1603
1604 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1605 /* give up */
1606 pci_free_consistent(pdev, txdr->size, txdr->desc,
1607 txdr->dma);
1608 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1609 DPRINTK(PROBE, ERR,
1610 "Unable to allocate aligned memory "
1611 "for the transmit descriptor ring\n");
1612 vfree(txdr->buffer_info);
1613 return -ENOMEM;
1614 } else {
1615 /* Free old allocation, new allocation was successful */
1616 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1617 }
1618 }
1619 memset(txdr->desc, 0, txdr->size);
1620
1621 txdr->next_to_use = 0;
1622 txdr->next_to_clean = 0;
1623
1624 return 0;
1625 }
1626
1627 /**
1628 * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1629 * (Descriptors) for all queues
1630 * @adapter: board private structure
1631 *
1632 * Return 0 on success, negative on failure
1633 **/
1634
1635 int e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
1636 {
1637 int i, err = 0;
1638
1639 for (i = 0; i < adapter->num_tx_queues; i++) {
1640 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1641 if (err) {
1642 DPRINTK(PROBE, ERR,
1643 "Allocation for Tx Queue %u failed\n", i);
1644 for (i-- ; i >= 0; i--)
1645 e1000_free_tx_resources(adapter,
1646 &adapter->tx_ring[i]);
1647 break;
1648 }
1649 }
1650
1651 return err;
1652 }
1653
1654 /**
1655 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1656 * @adapter: board private structure
1657 *
1658 * Configure the Tx unit of the MAC after a reset.
1659 **/
1660
1661 static void e1000_configure_tx(struct e1000_adapter *adapter)
1662 {
1663 u64 tdba;
1664 struct e1000_hw *hw = &adapter->hw;
1665 u32 tdlen, tctl, tipg, tarc;
1666 u32 ipgr1, ipgr2;
1667
1668 /* Setup the HW Tx Head and Tail descriptor pointers */
1669
1670 switch (adapter->num_tx_queues) {
1671 case 1:
1672 default:
1673 tdba = adapter->tx_ring[0].dma;
1674 tdlen = adapter->tx_ring[0].count *
1675 sizeof(struct e1000_tx_desc);
1676 ew32(TDLEN, tdlen);
1677 ew32(TDBAH, (tdba >> 32));
1678 ew32(TDBAL, (tdba & 0x00000000ffffffffULL));
1679 ew32(TDT, 0);
1680 ew32(TDH, 0);
1681 adapter->tx_ring[0].tdh = ((hw->mac_type >= e1000_82543) ? E1000_TDH : E1000_82542_TDH);
1682 adapter->tx_ring[0].tdt = ((hw->mac_type >= e1000_82543) ? E1000_TDT : E1000_82542_TDT);
1683 break;
1684 }
1685
1686 /* Set the default values for the Tx Inter Packet Gap timer */
1687 if (hw->mac_type <= e1000_82547_rev_2 &&
1688 (hw->media_type == e1000_media_type_fiber ||
1689 hw->media_type == e1000_media_type_internal_serdes))
1690 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1691 else
1692 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1693
1694 switch (hw->mac_type) {
1695 case e1000_82542_rev2_0:
1696 case e1000_82542_rev2_1:
1697 tipg = DEFAULT_82542_TIPG_IPGT;
1698 ipgr1 = DEFAULT_82542_TIPG_IPGR1;
1699 ipgr2 = DEFAULT_82542_TIPG_IPGR2;
1700 break;
1701 case e1000_80003es2lan:
1702 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1703 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2;
1704 break;
1705 default:
1706 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1707 ipgr2 = DEFAULT_82543_TIPG_IPGR2;
1708 break;
1709 }
1710 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
1711 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
1712 ew32(TIPG, tipg);
1713
1714 /* Set the Tx Interrupt Delay register */
1715
1716 ew32(TIDV, adapter->tx_int_delay);
1717 if (hw->mac_type >= e1000_82540)
1718 ew32(TADV, adapter->tx_abs_int_delay);
1719
1720 /* Program the Transmit Control Register */
1721
1722 tctl = er32(TCTL);
1723 tctl &= ~E1000_TCTL_CT;
1724 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1725 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1726
1727 if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
1728 tarc = er32(TARC0);
1729 /* set the speed mode bit, we'll clear it if we're not at
1730 * gigabit link later */
1731 tarc |= (1 << 21);
1732 ew32(TARC0, tarc);
1733 } else if (hw->mac_type == e1000_80003es2lan) {
1734 tarc = er32(TARC0);
1735 tarc |= 1;
1736 ew32(TARC0, tarc);
1737 tarc = er32(TARC1);
1738 tarc |= 1;
1739 ew32(TARC1, tarc);
1740 }
1741
1742 e1000_config_collision_dist(hw);
1743
1744 /* Setup Transmit Descriptor Settings for eop descriptor */
1745 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
1746
1747 /* only set IDE if we are delaying interrupts using the timers */
1748 if (adapter->tx_int_delay)
1749 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
1750
1751 if (hw->mac_type < e1000_82543)
1752 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1753 else
1754 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1755
1756 /* Cache if we're 82544 running in PCI-X because we'll
1757 * need this to apply a workaround later in the send path. */
1758 if (hw->mac_type == e1000_82544 &&
1759 hw->bus_type == e1000_bus_type_pcix)
1760 adapter->pcix_82544 = 1;
1761
1762 ew32(TCTL, tctl);
1763
1764 }
1765
1766 /**
1767 * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1768 * @adapter: board private structure
1769 * @rxdr: rx descriptor ring (for a specific queue) to setup
1770 *
1771 * Returns 0 on success, negative on failure
1772 **/
1773
1774 static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
1775 struct e1000_rx_ring *rxdr)
1776 {
1777 struct e1000_hw *hw = &adapter->hw;
1778 struct pci_dev *pdev = adapter->pdev;
1779 int size, desc_len;
1780
1781 size = sizeof(struct e1000_buffer) * rxdr->count;
1782 rxdr->buffer_info = vmalloc(size);
1783 if (!rxdr->buffer_info) {
1784 DPRINTK(PROBE, ERR,
1785 "Unable to allocate memory for the receive descriptor ring\n");
1786 return -ENOMEM;
1787 }
1788 memset(rxdr->buffer_info, 0, size);
1789
1790 if (hw->mac_type <= e1000_82547_rev_2)
1791 desc_len = sizeof(struct e1000_rx_desc);
1792 else
1793 desc_len = sizeof(union e1000_rx_desc_packet_split);
1794
1795 /* Round up to nearest 4K */
1796
1797 rxdr->size = rxdr->count * desc_len;
1798 rxdr->size = ALIGN(rxdr->size, 4096);
1799
1800 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1801
1802 if (!rxdr->desc) {
1803 DPRINTK(PROBE, ERR,
1804 "Unable to allocate memory for the receive descriptor ring\n");
1805 setup_rx_desc_die:
1806 vfree(rxdr->buffer_info);
1807 return -ENOMEM;
1808 }
1809
1810 /* Fix for errata 23, can't cross 64kB boundary */
1811 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1812 void *olddesc = rxdr->desc;
1813 dma_addr_t olddma = rxdr->dma;
1814 DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
1815 "at %p\n", rxdr->size, rxdr->desc);
1816 /* Try again, without freeing the previous */
1817 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1818 /* Failed allocation, critical failure */
1819 if (!rxdr->desc) {
1820 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1821 DPRINTK(PROBE, ERR,
1822 "Unable to allocate memory "
1823 "for the receive descriptor ring\n");
1824 goto setup_rx_desc_die;
1825 }
1826
1827 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1828 /* give up */
1829 pci_free_consistent(pdev, rxdr->size, rxdr->desc,
1830 rxdr->dma);
1831 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1832 DPRINTK(PROBE, ERR,
1833 "Unable to allocate aligned memory "
1834 "for the receive descriptor ring\n");
1835 goto setup_rx_desc_die;
1836 } else {
1837 /* Free old allocation, new allocation was successful */
1838 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1839 }
1840 }
1841 memset(rxdr->desc, 0, rxdr->size);
1842
1843 rxdr->next_to_clean = 0;
1844 rxdr->next_to_use = 0;
1845
1846 return 0;
1847 }
1848
1849 /**
1850 * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1851 * (Descriptors) for all queues
1852 * @adapter: board private structure
1853 *
1854 * Return 0 on success, negative on failure
1855 **/
1856
1857 int e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
1858 {
1859 int i, err = 0;
1860
1861 for (i = 0; i < adapter->num_rx_queues; i++) {
1862 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1863 if (err) {
1864 DPRINTK(PROBE, ERR,
1865 "Allocation for Rx Queue %u failed\n", i);
1866 for (i-- ; i >= 0; i--)
1867 e1000_free_rx_resources(adapter,
1868 &adapter->rx_ring[i]);
1869 break;
1870 }
1871 }
1872
1873 return err;
1874 }
1875
1876 /**
1877 * e1000_setup_rctl - configure the receive control registers
1878 * @adapter: Board private structure
1879 **/
1880 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1881 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
1882 static void e1000_setup_rctl(struct e1000_adapter *adapter)
1883 {
1884 struct e1000_hw *hw = &adapter->hw;
1885 u32 rctl;
1886
1887 rctl = er32(RCTL);
1888
1889 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1890
1891 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1892 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1893 (hw->mc_filter_type << E1000_RCTL_MO_SHIFT);
1894
1895 if (hw->tbi_compatibility_on == 1)
1896 rctl |= E1000_RCTL_SBP;
1897 else
1898 rctl &= ~E1000_RCTL_SBP;
1899
1900 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1901 rctl &= ~E1000_RCTL_LPE;
1902 else
1903 rctl |= E1000_RCTL_LPE;
1904
1905 /* Setup buffer sizes */
1906 rctl &= ~E1000_RCTL_SZ_4096;
1907 rctl |= E1000_RCTL_BSEX;
1908 switch (adapter->rx_buffer_len) {
1909 case E1000_RXBUFFER_256:
1910 rctl |= E1000_RCTL_SZ_256;
1911 rctl &= ~E1000_RCTL_BSEX;
1912 break;
1913 case E1000_RXBUFFER_512:
1914 rctl |= E1000_RCTL_SZ_512;
1915 rctl &= ~E1000_RCTL_BSEX;
1916 break;
1917 case E1000_RXBUFFER_1024:
1918 rctl |= E1000_RCTL_SZ_1024;
1919 rctl &= ~E1000_RCTL_BSEX;
1920 break;
1921 case E1000_RXBUFFER_2048:
1922 default:
1923 rctl |= E1000_RCTL_SZ_2048;
1924 rctl &= ~E1000_RCTL_BSEX;
1925 break;
1926 case E1000_RXBUFFER_4096:
1927 rctl |= E1000_RCTL_SZ_4096;
1928 break;
1929 case E1000_RXBUFFER_8192:
1930 rctl |= E1000_RCTL_SZ_8192;
1931 break;
1932 case E1000_RXBUFFER_16384:
1933 rctl |= E1000_RCTL_SZ_16384;
1934 break;
1935 }
1936
1937 ew32(RCTL, rctl);
1938 }
1939
1940 /**
1941 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
1942 * @adapter: board private structure
1943 *
1944 * Configure the Rx unit of the MAC after a reset.
1945 **/
1946
1947 static void e1000_configure_rx(struct e1000_adapter *adapter)
1948 {
1949 u64 rdba;
1950 struct e1000_hw *hw = &adapter->hw;
1951 u32 rdlen, rctl, rxcsum, ctrl_ext;
1952
1953 rdlen = adapter->rx_ring[0].count *
1954 sizeof(struct e1000_rx_desc);
1955 adapter->clean_rx = e1000_clean_rx_irq;
1956 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
1957
1958 /* disable receives while setting up the descriptors */
1959 rctl = er32(RCTL);
1960 ew32(RCTL, rctl & ~E1000_RCTL_EN);
1961
1962 /* set the Receive Delay Timer Register */
1963 ew32(RDTR, adapter->rx_int_delay);
1964
1965 if (hw->mac_type >= e1000_82540) {
1966 ew32(RADV, adapter->rx_abs_int_delay);
1967 if (adapter->itr_setting != 0)
1968 ew32(ITR, 1000000000 / (adapter->itr * 256));
1969 }
1970
1971 if (hw->mac_type >= e1000_82571) {
1972 ctrl_ext = er32(CTRL_EXT);
1973 /* Reset delay timers after every interrupt */
1974 ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR;
1975 /* Auto-Mask interrupts upon ICR access */
1976 ctrl_ext |= E1000_CTRL_EXT_IAME;
1977 ew32(IAM, 0xffffffff);
1978 ew32(CTRL_EXT, ctrl_ext);
1979 E1000_WRITE_FLUSH();
1980 }
1981
1982 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1983 * the Base and Length of the Rx Descriptor Ring */
1984 switch (adapter->num_rx_queues) {
1985 case 1:
1986 default:
1987 rdba = adapter->rx_ring[0].dma;
1988 ew32(RDLEN, rdlen);
1989 ew32(RDBAH, (rdba >> 32));
1990 ew32(RDBAL, (rdba & 0x00000000ffffffffULL));
1991 ew32(RDT, 0);
1992 ew32(RDH, 0);
1993 adapter->rx_ring[0].rdh = ((hw->mac_type >= e1000_82543) ? E1000_RDH : E1000_82542_RDH);
1994 adapter->rx_ring[0].rdt = ((hw->mac_type >= e1000_82543) ? E1000_RDT : E1000_82542_RDT);
1995 break;
1996 }
1997
1998 /* Enable 82543 Receive Checksum Offload for TCP and UDP */
1999 if (hw->mac_type >= e1000_82543) {
2000 rxcsum = er32(RXCSUM);
2001 if (adapter->rx_csum)
2002 rxcsum |= E1000_RXCSUM_TUOFL;
2003 else
2004 /* don't need to clear IPPCSE as it defaults to 0 */
2005 rxcsum &= ~E1000_RXCSUM_TUOFL;
2006 ew32(RXCSUM, rxcsum);
2007 }
2008
2009 /* Enable Receives */
2010 ew32(RCTL, rctl);
2011 }
2012
2013 /**
2014 * e1000_free_tx_resources - Free Tx Resources per Queue
2015 * @adapter: board private structure
2016 * @tx_ring: Tx descriptor ring for a specific queue
2017 *
2018 * Free all transmit software resources
2019 **/
2020
2021 static void e1000_free_tx_resources(struct e1000_adapter *adapter,
2022 struct e1000_tx_ring *tx_ring)
2023 {
2024 struct pci_dev *pdev = adapter->pdev;
2025
2026 e1000_clean_tx_ring(adapter, tx_ring);
2027
2028 vfree(tx_ring->buffer_info);
2029 tx_ring->buffer_info = NULL;
2030
2031 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
2032
2033 tx_ring->desc = NULL;
2034 }
2035
2036 /**
2037 * e1000_free_all_tx_resources - Free Tx Resources for All Queues
2038 * @adapter: board private structure
2039 *
2040 * Free all transmit software resources
2041 **/
2042
2043 void e1000_free_all_tx_resources(struct e1000_adapter *adapter)
2044 {
2045 int i;
2046
2047 for (i = 0; i < adapter->num_tx_queues; i++)
2048 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
2049 }
2050
2051 static void e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
2052 struct e1000_buffer *buffer_info)
2053 {
2054 if (buffer_info->dma) {
2055 pci_unmap_page(adapter->pdev,
2056 buffer_info->dma,
2057 buffer_info->length,
2058 PCI_DMA_TODEVICE);
2059 buffer_info->dma = 0;
2060 }
2061 if (buffer_info->skb) {
2062 dev_kfree_skb_any(buffer_info->skb);
2063 buffer_info->skb = NULL;
2064 }
2065 /* buffer_info must be completely set up in the transmit path */
2066 }
2067
2068 /**
2069 * e1000_clean_tx_ring - Free Tx Buffers
2070 * @adapter: board private structure
2071 * @tx_ring: ring to be cleaned
2072 **/
2073
2074 static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
2075 struct e1000_tx_ring *tx_ring)
2076 {
2077 struct e1000_hw *hw = &adapter->hw;
2078 struct e1000_buffer *buffer_info;
2079 unsigned long size;
2080 unsigned int i;
2081
2082 /* Free all the Tx ring sk_buffs */
2083
2084 for (i = 0; i < tx_ring->count; i++) {
2085 buffer_info = &tx_ring->buffer_info[i];
2086 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
2087 }
2088
2089 size = sizeof(struct e1000_buffer) * tx_ring->count;
2090 memset(tx_ring->buffer_info, 0, size);
2091
2092 /* Zero out the descriptor ring */
2093
2094 memset(tx_ring->desc, 0, tx_ring->size);
2095
2096 tx_ring->next_to_use = 0;
2097 tx_ring->next_to_clean = 0;
2098 tx_ring->last_tx_tso = 0;
2099
2100 writel(0, hw->hw_addr + tx_ring->tdh);
2101 writel(0, hw->hw_addr + tx_ring->tdt);
2102 }
2103
2104 /**
2105 * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
2106 * @adapter: board private structure
2107 **/
2108
2109 static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
2110 {
2111 int i;
2112
2113 for (i = 0; i < adapter->num_tx_queues; i++)
2114 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
2115 }
2116
2117 /**
2118 * e1000_free_rx_resources - Free Rx Resources
2119 * @adapter: board private structure
2120 * @rx_ring: ring to clean the resources from
2121 *
2122 * Free all receive software resources
2123 **/
2124
2125 static void e1000_free_rx_resources(struct e1000_adapter *adapter,
2126 struct e1000_rx_ring *rx_ring)
2127 {
2128 struct pci_dev *pdev = adapter->pdev;
2129
2130 e1000_clean_rx_ring(adapter, rx_ring);
2131
2132 vfree(rx_ring->buffer_info);
2133 rx_ring->buffer_info = NULL;
2134
2135 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
2136
2137 rx_ring->desc = NULL;
2138 }
2139
2140 /**
2141 * e1000_free_all_rx_resources - Free Rx Resources for All Queues
2142 * @adapter: board private structure
2143 *
2144 * Free all receive software resources
2145 **/
2146
2147 void e1000_free_all_rx_resources(struct e1000_adapter *adapter)
2148 {
2149 int i;
2150
2151 for (i = 0; i < adapter->num_rx_queues; i++)
2152 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
2153 }
2154
2155 /**
2156 * e1000_clean_rx_ring - Free Rx Buffers per Queue
2157 * @adapter: board private structure
2158 * @rx_ring: ring to free buffers from
2159 **/
2160
2161 static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
2162 struct e1000_rx_ring *rx_ring)
2163 {
2164 struct e1000_hw *hw = &adapter->hw;
2165 struct e1000_buffer *buffer_info;
2166 struct pci_dev *pdev = adapter->pdev;
2167 unsigned long size;
2168 unsigned int i;
2169
2170 /* Free all the Rx ring sk_buffs */
2171 for (i = 0; i < rx_ring->count; i++) {
2172 buffer_info = &rx_ring->buffer_info[i];
2173 if (buffer_info->skb) {
2174 pci_unmap_single(pdev,
2175 buffer_info->dma,
2176 buffer_info->length,
2177 PCI_DMA_FROMDEVICE);
2178
2179 dev_kfree_skb(buffer_info->skb);
2180 buffer_info->skb = NULL;
2181 }
2182 }
2183
2184 size = sizeof(struct e1000_buffer) * rx_ring->count;
2185 memset(rx_ring->buffer_info, 0, size);
2186
2187 /* Zero out the descriptor ring */
2188
2189 memset(rx_ring->desc, 0, rx_ring->size);
2190
2191 rx_ring->next_to_clean = 0;
2192 rx_ring->next_to_use = 0;
2193
2194 writel(0, hw->hw_addr + rx_ring->rdh);
2195 writel(0, hw->hw_addr + rx_ring->rdt);
2196 }
2197
2198 /**
2199 * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
2200 * @adapter: board private structure
2201 **/
2202
2203 static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
2204 {
2205 int i;
2206
2207 for (i = 0; i < adapter->num_rx_queues; i++)
2208 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
2209 }
2210
2211 /* The 82542 2.0 (revision 2) needs to have the receive unit in reset
2212 * and memory write and invalidate disabled for certain operations
2213 */
2214 static void e1000_enter_82542_rst(struct e1000_adapter *adapter)
2215 {
2216 struct e1000_hw *hw = &adapter->hw;
2217 struct net_device *netdev = adapter->netdev;
2218 u32 rctl;
2219
2220 e1000_pci_clear_mwi(hw);
2221
2222 rctl = er32(RCTL);
2223 rctl |= E1000_RCTL_RST;
2224 ew32(RCTL, rctl);
2225 E1000_WRITE_FLUSH();
2226 mdelay(5);
2227
2228 if (netif_running(netdev))
2229 e1000_clean_all_rx_rings(adapter);
2230 }
2231
2232 static void e1000_leave_82542_rst(struct e1000_adapter *adapter)
2233 {
2234 struct e1000_hw *hw = &adapter->hw;
2235 struct net_device *netdev = adapter->netdev;
2236 u32 rctl;
2237
2238 rctl = er32(RCTL);
2239 rctl &= ~E1000_RCTL_RST;
2240 ew32(RCTL, rctl);
2241 E1000_WRITE_FLUSH();
2242 mdelay(5);
2243
2244 if (hw->pci_cmd_word & PCI_COMMAND_INVALIDATE)
2245 e1000_pci_set_mwi(hw);
2246
2247 if (netif_running(netdev)) {
2248 /* No need to loop, because 82542 supports only 1 queue */
2249 struct e1000_rx_ring *ring = &adapter->rx_ring[0];
2250 e1000_configure_rx(adapter);
2251 adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
2252 }
2253 }
2254
2255 /**
2256 * e1000_set_mac - Change the Ethernet Address of the NIC
2257 * @netdev: network interface device structure
2258 * @p: pointer to an address structure
2259 *
2260 * Returns 0 on success, negative on failure
2261 **/
2262
2263 static int e1000_set_mac(struct net_device *netdev, void *p)
2264 {
2265 struct e1000_adapter *adapter = netdev_priv(netdev);
2266 struct e1000_hw *hw = &adapter->hw;
2267 struct sockaddr *addr = p;
2268
2269 if (!is_valid_ether_addr(addr->sa_data))
2270 return -EADDRNOTAVAIL;
2271
2272 /* 82542 2.0 needs to be in reset to write receive address registers */
2273
2274 if (hw->mac_type == e1000_82542_rev2_0)
2275 e1000_enter_82542_rst(adapter);
2276
2277 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2278 memcpy(hw->mac_addr, addr->sa_data, netdev->addr_len);
2279
2280 e1000_rar_set(hw, hw->mac_addr, 0);
2281
2282 /* With 82571 controllers, LAA may be overwritten (with the default)
2283 * due to controller reset from the other port. */
2284 if (hw->mac_type == e1000_82571) {
2285 /* activate the work around */
2286 hw->laa_is_present = 1;
2287
2288 /* Hold a copy of the LAA in RAR[14] This is done so that
2289 * between the time RAR[0] gets clobbered and the time it
2290 * gets fixed (in e1000_watchdog), the actual LAA is in one
2291 * of the RARs and no incoming packets directed to this port
2292 * are dropped. Eventaully the LAA will be in RAR[0] and
2293 * RAR[14] */
2294 e1000_rar_set(hw, hw->mac_addr,
2295 E1000_RAR_ENTRIES - 1);
2296 }
2297
2298 if (hw->mac_type == e1000_82542_rev2_0)
2299 e1000_leave_82542_rst(adapter);
2300
2301 return 0;
2302 }
2303
2304 /**
2305 * e1000_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
2306 * @netdev: network interface device structure
2307 *
2308 * The set_rx_mode entry point is called whenever the unicast or multicast
2309 * address lists or the network interface flags are updated. This routine is
2310 * responsible for configuring the hardware for proper unicast, multicast,
2311 * promiscuous mode, and all-multi behavior.
2312 **/
2313
2314 static void e1000_set_rx_mode(struct net_device *netdev)
2315 {
2316 struct e1000_adapter *adapter = netdev_priv(netdev);
2317 struct e1000_hw *hw = &adapter->hw;
2318 struct dev_addr_list *uc_ptr;
2319 struct dev_addr_list *mc_ptr;
2320 u32 rctl;
2321 u32 hash_value;
2322 int i, rar_entries = E1000_RAR_ENTRIES;
2323 int mta_reg_count = (hw->mac_type == e1000_ich8lan) ?
2324 E1000_NUM_MTA_REGISTERS_ICH8LAN :
2325 E1000_NUM_MTA_REGISTERS;
2326
2327 if (hw->mac_type == e1000_ich8lan)
2328 rar_entries = E1000_RAR_ENTRIES_ICH8LAN;
2329
2330 /* reserve RAR[14] for LAA over-write work-around */
2331 if (hw->mac_type == e1000_82571)
2332 rar_entries--;
2333
2334 /* Check for Promiscuous and All Multicast modes */
2335
2336 rctl = er32(RCTL);
2337
2338 if (netdev->flags & IFF_PROMISC) {
2339 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
2340 rctl &= ~E1000_RCTL_VFE;
2341 } else {
2342 if (netdev->flags & IFF_ALLMULTI) {
2343 rctl |= E1000_RCTL_MPE;
2344 } else {
2345 rctl &= ~E1000_RCTL_MPE;
2346 }
2347 if (adapter->hw.mac_type != e1000_ich8lan)
2348 rctl |= E1000_RCTL_VFE;
2349 }
2350
2351 uc_ptr = NULL;
2352 if (netdev->uc_count > rar_entries - 1) {
2353 rctl |= E1000_RCTL_UPE;
2354 } else if (!(netdev->flags & IFF_PROMISC)) {
2355 rctl &= ~E1000_RCTL_UPE;
2356 uc_ptr = netdev->uc_list;
2357 }
2358
2359 ew32(RCTL, rctl);
2360
2361 /* 82542 2.0 needs to be in reset to write receive address registers */
2362
2363 if (hw->mac_type == e1000_82542_rev2_0)
2364 e1000_enter_82542_rst(adapter);
2365
2366 /* load the first 14 addresses into the exact filters 1-14. Unicast
2367 * addresses take precedence to avoid disabling unicast filtering
2368 * when possible.
2369 *
2370 * RAR 0 is used for the station MAC adddress
2371 * if there are not 14 addresses, go ahead and clear the filters
2372 * -- with 82571 controllers only 0-13 entries are filled here
2373 */
2374 mc_ptr = netdev->mc_list;
2375
2376 for (i = 1; i < rar_entries; i++) {
2377 if (uc_ptr) {
2378 e1000_rar_set(hw, uc_ptr->da_addr, i);
2379 uc_ptr = uc_ptr->next;
2380 } else if (mc_ptr) {
2381 e1000_rar_set(hw, mc_ptr->da_addr, i);
2382 mc_ptr = mc_ptr->next;
2383 } else {
2384 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
2385 E1000_WRITE_FLUSH();
2386 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
2387 E1000_WRITE_FLUSH();
2388 }
2389 }
2390 WARN_ON(uc_ptr != NULL);
2391
2392 /* clear the old settings from the multicast hash table */
2393
2394 for (i = 0; i < mta_reg_count; i++) {
2395 E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
2396 E1000_WRITE_FLUSH();
2397 }
2398
2399 /* load any remaining addresses into the hash table */
2400
2401 for (; mc_ptr; mc_ptr = mc_ptr->next) {
2402 hash_value = e1000_hash_mc_addr(hw, mc_ptr->da_addr);
2403 e1000_mta_set(hw, hash_value);
2404 }
2405
2406 if (hw->mac_type == e1000_82542_rev2_0)
2407 e1000_leave_82542_rst(adapter);
2408 }
2409
2410 /* Need to wait a few seconds after link up to get diagnostic information from
2411 * the phy */
2412
2413 static void e1000_update_phy_info(unsigned long data)
2414 {
2415 struct e1000_adapter *adapter = (struct e1000_adapter *)data;
2416 struct e1000_hw *hw = &adapter->hw;
2417 e1000_phy_get_info(hw, &adapter->phy_info);
2418 }
2419
2420 /**
2421 * e1000_82547_tx_fifo_stall - Timer Call-back
2422 * @data: pointer to adapter cast into an unsigned long
2423 **/
2424
2425 static void e1000_82547_tx_fifo_stall(unsigned long data)
2426 {
2427 struct e1000_adapter *adapter = (struct e1000_adapter *)data;
2428 struct e1000_hw *hw = &adapter->hw;
2429 struct net_device *netdev = adapter->netdev;
2430 u32 tctl;
2431
2432 if (atomic_read(&adapter->tx_fifo_stall)) {
2433 if ((er32(TDT) == er32(TDH)) &&
2434 (er32(TDFT) == er32(TDFH)) &&
2435 (er32(TDFTS) == er32(TDFHS))) {
2436 tctl = er32(TCTL);
2437 ew32(TCTL, tctl & ~E1000_TCTL_EN);
2438 ew32(TDFT, adapter->tx_head_addr);
2439 ew32(TDFH, adapter->tx_head_addr);
2440 ew32(TDFTS, adapter->tx_head_addr);
2441 ew32(TDFHS, adapter->tx_head_addr);
2442 ew32(TCTL, tctl);
2443 E1000_WRITE_FLUSH();
2444
2445 adapter->tx_fifo_head = 0;
2446 atomic_set(&adapter->tx_fifo_stall, 0);
2447 netif_wake_queue(netdev);
2448 } else {
2449 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
2450 }
2451 }
2452 }
2453
2454 /**
2455 * e1000_watchdog - Timer Call-back
2456 * @data: pointer to adapter cast into an unsigned long
2457 **/
2458 static void e1000_watchdog(unsigned long data)
2459 {
2460 struct e1000_adapter *adapter = (struct e1000_adapter *)data;
2461 struct e1000_hw *hw = &adapter->hw;
2462 struct net_device *netdev = adapter->netdev;
2463 struct e1000_tx_ring *txdr = adapter->tx_ring;
2464 u32 link, tctl;
2465 s32 ret_val;
2466
2467 ret_val = e1000_check_for_link(hw);
2468 if ((ret_val == E1000_ERR_PHY) &&
2469 (hw->phy_type == e1000_phy_igp_3) &&
2470 (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
2471 /* See e1000_kumeran_lock_loss_workaround() */
2472 DPRINTK(LINK, INFO,
2473 "Gigabit has been disabled, downgrading speed\n");
2474 }
2475
2476 if (hw->mac_type == e1000_82573) {
2477 e1000_enable_tx_pkt_filtering(hw);
2478 if (adapter->mng_vlan_id != hw->mng_cookie.vlan_id)
2479 e1000_update_mng_vlan(adapter);
2480 }
2481
2482 if ((hw->media_type == e1000_media_type_internal_serdes) &&
2483 !(er32(TXCW) & E1000_TXCW_ANE))
2484 link = !hw->serdes_link_down;
2485 else
2486 link = er32(STATUS) & E1000_STATUS_LU;
2487
2488 if (link) {
2489 if (!netif_carrier_ok(netdev)) {
2490 u32 ctrl;
2491 bool txb2b = true;
2492 e1000_get_speed_and_duplex(hw,
2493 &adapter->link_speed,
2494 &adapter->link_duplex);
2495
2496 ctrl = er32(CTRL);
2497 printk(KERN_INFO "e1000: %s NIC Link is Up %d Mbps %s, "
2498 "Flow Control: %s\n",
2499 netdev->name,
2500 adapter->link_speed,
2501 adapter->link_duplex == FULL_DUPLEX ?
2502 "Full Duplex" : "Half Duplex",
2503 ((ctrl & E1000_CTRL_TFCE) && (ctrl &
2504 E1000_CTRL_RFCE)) ? "RX/TX" : ((ctrl &
2505 E1000_CTRL_RFCE) ? "RX" : ((ctrl &
2506 E1000_CTRL_TFCE) ? "TX" : "None" )));
2507
2508 /* tweak tx_queue_len according to speed/duplex
2509 * and adjust the timeout factor */
2510 netdev->tx_queue_len = adapter->tx_queue_len;
2511 adapter->tx_timeout_factor = 1;
2512 switch (adapter->link_speed) {
2513 case SPEED_10:
2514 txb2b = false;
2515 netdev->tx_queue_len = 10;
2516 adapter->tx_timeout_factor = 8;
2517 break;
2518 case SPEED_100:
2519 txb2b = false;
2520 netdev->tx_queue_len = 100;
2521 /* maybe add some timeout factor ? */
2522 break;
2523 }
2524
2525 if ((hw->mac_type == e1000_82571 ||
2526 hw->mac_type == e1000_82572) &&
2527 !txb2b) {
2528 u32 tarc0;
2529 tarc0 = er32(TARC0);
2530 tarc0 &= ~(1 << 21);
2531 ew32(TARC0, tarc0);
2532 }
2533
2534 /* disable TSO for pcie and 10/100 speeds, to avoid
2535 * some hardware issues */
2536 if (!adapter->tso_force &&
2537 hw->bus_type == e1000_bus_type_pci_express){
2538 switch (adapter->link_speed) {
2539 case SPEED_10:
2540 case SPEED_100:
2541 DPRINTK(PROBE,INFO,
2542 "10/100 speed: disabling TSO\n");
2543 netdev->features &= ~NETIF_F_TSO;
2544 netdev->features &= ~NETIF_F_TSO6;
2545 break;
2546 case SPEED_1000:
2547 netdev->features |= NETIF_F_TSO;
2548 netdev->features |= NETIF_F_TSO6;
2549 break;
2550 default:
2551 /* oops */
2552 break;
2553 }
2554 }
2555
2556 /* enable transmits in the hardware, need to do this
2557 * after setting TARC0 */
2558 tctl = er32(TCTL);
2559 tctl |= E1000_TCTL_EN;
2560 ew32(TCTL, tctl);
2561
2562 netif_carrier_on(netdev);
2563 netif_wake_queue(netdev);
2564 mod_timer(&adapter->phy_info_timer, round_jiffies(jiffies + 2 * HZ));
2565 adapter->smartspeed = 0;
2566 } else {
2567 /* make sure the receive unit is started */
2568 if (hw->rx_needs_kicking) {
2569 u32 rctl = er32(RCTL);
2570 ew32(RCTL, rctl | E1000_RCTL_EN);
2571 }
2572 }
2573 } else {
2574 if (netif_carrier_ok(netdev)) {
2575 adapter->link_speed = 0;
2576 adapter->link_duplex = 0;
2577 printk(KERN_INFO "e1000: %s NIC Link is Down\n",
2578 netdev->name);
2579 netif_carrier_off(netdev);
2580 netif_stop_queue(netdev);
2581 mod_timer(&adapter->phy_info_timer, round_jiffies(jiffies + 2 * HZ));
2582
2583 /* 80003ES2LAN workaround--
2584 * For packet buffer work-around on link down event;
2585 * disable receives in the ISR and
2586 * reset device here in the watchdog
2587 */
2588 if (hw->mac_type == e1000_80003es2lan)
2589 /* reset device */
2590 schedule_work(&adapter->reset_task);
2591 }
2592
2593 e1000_smartspeed(adapter);
2594 }
2595
2596 e1000_update_stats(adapter);
2597
2598 hw->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
2599 adapter->tpt_old = adapter->stats.tpt;
2600 hw->collision_delta = adapter->stats.colc - adapter->colc_old;
2601 adapter->colc_old = adapter->stats.colc;
2602
2603 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2604 adapter->gorcl_old = adapter->stats.gorcl;
2605 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2606 adapter->gotcl_old = adapter->stats.gotcl;
2607
2608 e1000_update_adaptive(hw);
2609
2610 if (!netif_carrier_ok(netdev)) {
2611 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
2612 /* We've lost link, so the controller stops DMA,
2613 * but we've got queued Tx work that's never going
2614 * to get done, so reset controller to flush Tx.
2615 * (Do the reset outside of interrupt context). */
2616 adapter->tx_timeout_count++;
2617 schedule_work(&adapter->reset_task);
2618 }
2619 }
2620
2621 /* Cause software interrupt to ensure rx ring is cleaned */
2622 ew32(ICS, E1000_ICS_RXDMT0);
2623
2624 /* Force detection of hung controller every watchdog period */
2625 adapter->detect_tx_hung = true;
2626
2627 /* With 82571 controllers, LAA may be overwritten due to controller
2628 * reset from the other port. Set the appropriate LAA in RAR[0] */
2629 if (hw->mac_type == e1000_82571 && hw->laa_is_present)
2630 e1000_rar_set(hw, hw->mac_addr, 0);
2631
2632 /* Reset the timer */
2633 mod_timer(&adapter->watchdog_timer, round_jiffies(jiffies + 2 * HZ));
2634 }
2635
2636 enum latency_range {
2637 lowest_latency = 0,
2638 low_latency = 1,
2639 bulk_latency = 2,
2640 latency_invalid = 255
2641 };
2642
2643 /**
2644 * e1000_update_itr - update the dynamic ITR value based on statistics
2645 * Stores a new ITR value based on packets and byte
2646 * counts during the last interrupt. The advantage of per interrupt
2647 * computation is faster updates and more accurate ITR for the current
2648 * traffic pattern. Constants in this function were computed
2649 * based on theoretical maximum wire speed and thresholds were set based
2650 * on testing data as well as attempting to minimize response time
2651 * while increasing bulk throughput.
2652 * this functionality is controlled by the InterruptThrottleRate module
2653 * parameter (see e1000_param.c)
2654 * @adapter: pointer to adapter
2655 * @itr_setting: current adapter->itr
2656 * @packets: the number of packets during this measurement interval
2657 * @bytes: the number of bytes during this measurement interval
2658 **/
2659 static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
2660 u16 itr_setting, int packets, int bytes)
2661 {
2662 unsigned int retval = itr_setting;
2663 struct e1000_hw *hw = &adapter->hw;
2664
2665 if (unlikely(hw->mac_type < e1000_82540))
2666 goto update_itr_done;
2667
2668 if (packets == 0)
2669 goto update_itr_done;
2670
2671 switch (itr_setting) {
2672 case lowest_latency:
2673 /* jumbo frames get bulk treatment*/
2674 if (bytes/packets > 8000)
2675 retval = bulk_latency;
2676 else if ((packets < 5) && (bytes > 512))
2677 retval = low_latency;
2678 break;
2679 case low_latency: /* 50 usec aka 20000 ints/s */
2680 if (bytes > 10000) {
2681 /* jumbo frames need bulk latency setting */
2682 if (bytes/packets > 8000)
2683 retval = bulk_latency;
2684 else if ((packets < 10) || ((bytes/packets) > 1200))
2685 retval = bulk_latency;
2686 else if ((packets > 35))
2687 retval = lowest_latency;
2688 } else if (bytes/packets > 2000)
2689 retval = bulk_latency;
2690 else if (packets <= 2 && bytes < 512)
2691 retval = lowest_latency;
2692 break;
2693 case bulk_latency: /* 250 usec aka 4000 ints/s */
2694 if (bytes > 25000) {
2695 if (packets > 35)
2696 retval = low_latency;
2697 } else if (bytes < 6000) {
2698 retval = low_latency;
2699 }
2700 break;
2701 }
2702
2703 update_itr_done:
2704 return retval;
2705 }
2706
2707 static void e1000_set_itr(struct e1000_adapter *adapter)
2708 {
2709 struct e1000_hw *hw = &adapter->hw;
2710 u16 current_itr;
2711 u32 new_itr = adapter->itr;
2712
2713 if (unlikely(hw->mac_type < e1000_82540))
2714 return;
2715
2716 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2717 if (unlikely(adapter->link_speed != SPEED_1000)) {
2718 current_itr = 0;
2719 new_itr = 4000;
2720 goto set_itr_now;
2721 }
2722
2723 adapter->tx_itr = e1000_update_itr(adapter,
2724 adapter->tx_itr,
2725 adapter->total_tx_packets,
2726 adapter->total_tx_bytes);
2727 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2728 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2729 adapter->tx_itr = low_latency;
2730
2731 adapter->rx_itr = e1000_update_itr(adapter,
2732 adapter->rx_itr,
2733 adapter->total_rx_packets,
2734 adapter->total_rx_bytes);
2735 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2736 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2737 adapter->rx_itr = low_latency;
2738
2739 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2740
2741 switch (current_itr) {
2742 /* counts and packets in update_itr are dependent on these numbers */
2743 case lowest_latency:
2744 new_itr = 70000;
2745 break;
2746 case low_latency:
2747 new_itr = 20000; /* aka hwitr = ~200 */
2748 break;
2749 case bulk_latency:
2750 new_itr = 4000;
2751 break;
2752 default:
2753 break;
2754 }
2755
2756 set_itr_now:
2757 if (new_itr != adapter->itr) {
2758 /* this attempts to bias the interrupt rate towards Bulk
2759 * by adding intermediate steps when interrupt rate is
2760 * increasing */
2761 new_itr = new_itr > adapter->itr ?
2762 min(adapter->itr + (new_itr >> 2), new_itr) :
2763 new_itr;
2764 adapter->itr = new_itr;
2765 ew32(ITR, 1000000000 / (new_itr * 256));
2766 }
2767
2768 return;
2769 }
2770
2771 #define E1000_TX_FLAGS_CSUM 0x00000001
2772 #define E1000_TX_FLAGS_VLAN 0x00000002
2773 #define E1000_TX_FLAGS_TSO 0x00000004
2774 #define E1000_TX_FLAGS_IPV4 0x00000008
2775 #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
2776 #define E1000_TX_FLAGS_VLAN_SHIFT 16
2777
2778 static int e1000_tso(struct e1000_adapter *adapter,
2779 struct e1000_tx_ring *tx_ring, struct sk_buff *skb)
2780 {
2781 struct e1000_context_desc *context_desc;
2782 struct e1000_buffer *buffer_info;
2783 unsigned int i;
2784 u32 cmd_length = 0;
2785 u16 ipcse = 0, tucse, mss;
2786 u8 ipcss, ipcso, tucss, tucso, hdr_len;
2787 int err;
2788
2789 if (skb_is_gso(skb)) {
2790 if (skb_header_cloned(skb)) {
2791 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2792 if (err)
2793 return err;
2794 }
2795
2796 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
2797 mss = skb_shinfo(skb)->gso_size;
2798 if (skb->protocol == htons(ETH_P_IP)) {
2799 struct iphdr *iph = ip_hdr(skb);
2800 iph->tot_len = 0;
2801 iph->check = 0;
2802 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2803 iph->daddr, 0,
2804 IPPROTO_TCP,
2805 0);
2806 cmd_length = E1000_TXD_CMD_IP;
2807 ipcse = skb_transport_offset(skb) - 1;
2808 } else if (skb->protocol == htons(ETH_P_IPV6)) {
2809 ipv6_hdr(skb)->payload_len = 0;
2810 tcp_hdr(skb)->check =
2811 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2812 &ipv6_hdr(skb)->daddr,
2813 0, IPPROTO_TCP, 0);
2814 ipcse = 0;
2815 }
2816 ipcss = skb_network_offset(skb);
2817 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
2818 tucss = skb_transport_offset(skb);
2819 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
2820 tucse = 0;
2821
2822 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
2823 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
2824
2825 i = tx_ring->next_to_use;
2826 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
2827 buffer_info = &tx_ring->buffer_info[i];
2828
2829 context_desc->lower_setup.ip_fields.ipcss = ipcss;
2830 context_desc->lower_setup.ip_fields.ipcso = ipcso;
2831 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
2832 context_desc->upper_setup.tcp_fields.tucss = tucss;
2833 context_desc->upper_setup.tcp_fields.tucso = tucso;
2834 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
2835 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
2836 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
2837 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
2838
2839 buffer_info->time_stamp = jiffies;
2840 buffer_info->next_to_watch = i;
2841
2842 if (++i == tx_ring->count) i = 0;
2843 tx_ring->next_to_use = i;
2844
2845 return true;
2846 }
2847 return false;
2848 }
2849
2850 static bool e1000_tx_csum(struct e1000_adapter *adapter,
2851 struct e1000_tx_ring *tx_ring, struct sk_buff *skb)
2852 {
2853 struct e1000_context_desc *context_desc;
2854 struct e1000_buffer *buffer_info;
2855 unsigned int i;
2856 u8 css;
2857 u32 cmd_len = E1000_TXD_CMD_DEXT;
2858
2859 if (skb->ip_summed != CHECKSUM_PARTIAL)
2860 return false;
2861
2862 switch (skb->protocol) {
2863 case cpu_to_be16(ETH_P_IP):
2864 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
2865 cmd_len |= E1000_TXD_CMD_TCP;
2866 break;
2867 case cpu_to_be16(ETH_P_IPV6):
2868 /* XXX not handling all IPV6 headers */
2869 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
2870 cmd_len |= E1000_TXD_CMD_TCP;
2871 break;
2872 default:
2873 if (unlikely(net_ratelimit()))
2874 DPRINTK(DRV, WARNING,
2875 "checksum_partial proto=%x!\n", skb->protocol);
2876 break;
2877 }
2878
2879 css = skb_transport_offset(skb);
2880
2881 i = tx_ring->next_to_use;
2882 buffer_info = &tx_ring->buffer_info[i];
2883 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
2884
2885 context_desc->lower_setup.ip_config = 0;
2886 context_desc->upper_setup.tcp_fields.tucss = css;
2887 context_desc->upper_setup.tcp_fields.tucso =
2888 css + skb->csum_offset;
2889 context_desc->upper_setup.tcp_fields.tucse = 0;
2890 context_desc->tcp_seg_setup.data = 0;
2891 context_desc->cmd_and_length = cpu_to_le32(cmd_len);
2892
2893 buffer_info->time_stamp = jiffies;
2894 buffer_info->next_to_watch = i;
2895
2896 if (unlikely(++i == tx_ring->count)) i = 0;
2897 tx_ring->next_to_use = i;
2898
2899 return true;
2900 }
2901
2902 #define E1000_MAX_TXD_PWR 12
2903 #define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
2904
2905 static int e1000_tx_map(struct e1000_adapter *adapter,
2906 struct e1000_tx_ring *tx_ring,
2907 struct sk_buff *skb, unsigned int first,
2908 unsigned int max_per_txd, unsigned int nr_frags,
2909 unsigned int mss)
2910 {
2911 struct e1000_hw *hw = &adapter->hw;
2912 struct e1000_buffer *buffer_info;
2913 unsigned int len = skb->len;
2914 unsigned int offset = 0, size, count = 0, i;
2915 unsigned int f;
2916 len -= skb->data_len;
2917
2918 i = tx_ring->next_to_use;
2919
2920 while (len) {
2921 buffer_info = &tx_ring->buffer_info[i];
2922 size = min(len, max_per_txd);
2923 /* Workaround for Controller erratum --
2924 * descriptor for non-tso packet in a linear SKB that follows a
2925 * tso gets written back prematurely before the data is fully
2926 * DMA'd to the controller */
2927 if (!skb->data_len && tx_ring->last_tx_tso &&
2928 !skb_is_gso(skb)) {
2929 tx_ring->last_tx_tso = 0;
2930 size -= 4;
2931 }
2932
2933 /* Workaround for premature desc write-backs
2934 * in TSO mode. Append 4-byte sentinel desc */
2935 if (unlikely(mss && !nr_frags && size == len && size > 8))
2936 size -= 4;
2937 /* work-around for errata 10 and it applies
2938 * to all controllers in PCI-X mode
2939 * The fix is to make sure that the first descriptor of a
2940 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
2941 */
2942 if (unlikely((hw->bus_type == e1000_bus_type_pcix) &&
2943 (size > 2015) && count == 0))
2944 size = 2015;
2945
2946 /* Workaround for potential 82544 hang in PCI-X. Avoid
2947 * terminating buffers within evenly-aligned dwords. */
2948 if (unlikely(adapter->pcix_82544 &&
2949 !((unsigned long)(skb->data + offset + size - 1) & 4) &&
2950 size > 4))
2951 size -= 4;
2952
2953 buffer_info->length = size;
2954 buffer_info->dma =
2955 pci_map_single(adapter->pdev,
2956 skb->data + offset,
2957 size,
2958 PCI_DMA_TODEVICE);
2959 buffer_info->time_stamp = jiffies;
2960 buffer_info->next_to_watch = i;
2961
2962 len -= size;
2963 offset += size;
2964 count++;
2965 if (unlikely(++i == tx_ring->count)) i = 0;
2966 }
2967
2968 for (f = 0; f < nr_frags; f++) {
2969 struct skb_frag_struct *frag;
2970
2971 frag = &skb_shinfo(skb)->frags[f];
2972 len = frag->size;
2973 offset = frag->page_offset;
2974
2975 while (len) {
2976 buffer_info = &tx_ring->buffer_info[i];
2977 size = min(len, max_per_txd);
2978 /* Workaround for premature desc write-backs
2979 * in TSO mode. Append 4-byte sentinel desc */
2980 if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
2981 size -= 4;
2982 /* Workaround for potential 82544 hang in PCI-X.
2983 * Avoid terminating buffers within evenly-aligned
2984 * dwords. */
2985 if (unlikely(adapter->pcix_82544 &&
2986 !((unsigned long)(frag->page+offset+size-1) & 4) &&
2987 size > 4))
2988 size -= 4;
2989
2990 buffer_info->length = size;
2991 buffer_info->dma =
2992 pci_map_page(adapter->pdev,
2993 frag->page,
2994 offset,
2995 size,
2996 PCI_DMA_TODEVICE);
2997 buffer_info->time_stamp = jiffies;
2998 buffer_info->next_to_watch = i;
2999
3000 len -= size;
3001 offset += size;
3002 count++;
3003 if (unlikely(++i == tx_ring->count)) i = 0;
3004 }
3005 }
3006
3007 i = (i == 0) ? tx_ring->count - 1 : i - 1;
3008 tx_ring->buffer_info[i].skb = skb;
3009 tx_ring->buffer_info[first].next_to_watch = i;
3010
3011 return count;
3012 }
3013
3014 static void e1000_tx_queue(struct e1000_adapter *adapter,
3015 struct e1000_tx_ring *tx_ring, int tx_flags,
3016 int count)
3017 {
3018 struct e1000_hw *hw = &adapter->hw;
3019 struct e1000_tx_desc *tx_desc = NULL;
3020 struct e1000_buffer *buffer_info;
3021 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
3022 unsigned int i;
3023
3024 if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
3025 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
3026 E1000_TXD_CMD_TSE;
3027 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3028
3029 if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
3030 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
3031 }
3032
3033 if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
3034 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
3035 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3036 }
3037
3038 if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
3039 txd_lower |= E1000_TXD_CMD_VLE;
3040 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
3041 }
3042
3043 i = tx_ring->next_to_use;
3044
3045 while (count--) {
3046 buffer_info = &tx_ring->buffer_info[i];
3047 tx_desc = E1000_TX_DESC(*tx_ring, i);
3048 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
3049 tx_desc->lower.data =
3050 cpu_to_le32(txd_lower | buffer_info->length);
3051 tx_desc->upper.data = cpu_to_le32(txd_upper);
3052 if (unlikely(++i == tx_ring->count)) i = 0;
3053 }
3054
3055 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
3056
3057 /* Force memory writes to complete before letting h/w
3058 * know there are new descriptors to fetch. (Only
3059 * applicable for weak-ordered memory model archs,
3060 * such as IA-64). */
3061 wmb();
3062
3063 tx_ring->next_to_use = i;
3064 writel(i, hw->hw_addr + tx_ring->tdt);
3065 /* we need this if more than one processor can write to our tail
3066 * at a time, it syncronizes IO on IA64/Altix systems */
3067 mmiowb();
3068 }
3069
3070 /**
3071 * 82547 workaround to avoid controller hang in half-duplex environment.
3072 * The workaround is to avoid queuing a large packet that would span
3073 * the internal Tx FIFO ring boundary by notifying the stack to resend
3074 * the packet at a later time. This gives the Tx FIFO an opportunity to
3075 * flush all packets. When that occurs, we reset the Tx FIFO pointers
3076 * to the beginning of the Tx FIFO.
3077 **/
3078
3079 #define E1000_FIFO_HDR 0x10
3080 #define E1000_82547_PAD_LEN 0x3E0
3081
3082 static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
3083 struct sk_buff *skb)
3084 {
3085 u32 fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
3086 u32 skb_fifo_len = skb->len + E1000_FIFO_HDR;
3087
3088 skb_fifo_len = ALIGN(skb_fifo_len, E1000_FIFO_HDR);
3089
3090 if (adapter->link_duplex != HALF_DUPLEX)
3091 goto no_fifo_stall_required;
3092
3093 if (atomic_read(&adapter->tx_fifo_stall))
3094 return 1;
3095
3096 if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
3097 atomic_set(&adapter->tx_fifo_stall, 1);
3098 return 1;
3099 }
3100
3101 no_fifo_stall_required:
3102 adapter->tx_fifo_head += skb_fifo_len;
3103 if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
3104 adapter->tx_fifo_head -= adapter->tx_fifo_size;
3105 return 0;
3106 }
3107
3108 #define MINIMUM_DHCP_PACKET_SIZE 282
3109 static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter,
3110 struct sk_buff *skb)
3111 {
3112 struct e1000_hw *hw = &adapter->hw;
3113 u16 length, offset;
3114 if (vlan_tx_tag_present(skb)) {
3115 if (!((vlan_tx_tag_get(skb) == hw->mng_cookie.vlan_id) &&
3116 ( hw->mng_cookie.status &
3117 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
3118 return 0;
3119 }
3120 if (skb->len > MINIMUM_DHCP_PACKET_SIZE) {
3121 struct ethhdr *eth = (struct ethhdr *)skb->data;
3122 if ((htons(ETH_P_IP) == eth->h_proto)) {
3123 const struct iphdr *ip =
3124 (struct iphdr *)((u8 *)skb->data+14);
3125 if (IPPROTO_UDP == ip->protocol) {
3126 struct udphdr *udp =
3127 (struct udphdr *)((u8 *)ip +
3128 (ip->ihl << 2));
3129 if (ntohs(udp->dest) == 67) {
3130 offset = (u8 *)udp + 8 - skb->data;
3131 length = skb->len - offset;
3132
3133 return e1000_mng_write_dhcp_info(hw,
3134 (u8 *)udp + 8,
3135 length);
3136 }
3137 }
3138 }
3139 }
3140 return 0;
3141 }
3142
3143 static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
3144 {
3145 struct e1000_adapter *adapter = netdev_priv(netdev);
3146 struct e1000_tx_ring *tx_ring = adapter->tx_ring;
3147
3148 netif_stop_queue(netdev);
3149 /* Herbert's original patch had:
3150 * smp_mb__after_netif_stop_queue();
3151 * but since that doesn't exist yet, just open code it. */
3152 smp_mb();
3153
3154 /* We need to check again in a case another CPU has just
3155 * made room available. */
3156 if (likely(E1000_DESC_UNUSED(tx_ring) < size))
3157 return -EBUSY;
3158
3159 /* A reprieve! */
3160 netif_start_queue(netdev);
3161 ++adapter->restart_queue;
3162 return 0;
3163 }
3164
3165 static int e1000_maybe_stop_tx(struct net_device *netdev,
3166 struct e1000_tx_ring *tx_ring, int size)
3167 {
3168 if (likely(E1000_DESC_UNUSED(tx_ring) >= size))
3169 return 0;
3170 return __e1000_maybe_stop_tx(netdev, size);
3171 }
3172
3173 #define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
3174 static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
3175 {
3176 struct e1000_adapter *adapter = netdev_priv(netdev);
3177 struct e1000_hw *hw = &adapter->hw;
3178 struct e1000_tx_ring *tx_ring;
3179 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
3180 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
3181 unsigned int tx_flags = 0;
3182 unsigned int len = skb->len - skb->data_len;
3183 unsigned int nr_frags;
3184 unsigned int mss;
3185 int count = 0;
3186 int tso;
3187 unsigned int f;
3188
3189 /* This goes back to the question of how to logically map a tx queue
3190 * to a flow. Right now, performance is impacted slightly negatively
3191 * if using multiple tx queues. If the stack breaks away from a
3192 * single qdisc implementation, we can look at this again. */
3193 tx_ring = adapter->tx_ring;
3194
3195 if (unlikely(skb->len <= 0)) {
3196 dev_kfree_skb_any(skb);
3197 return NETDEV_TX_OK;
3198 }
3199
3200 /* 82571 and newer doesn't need the workaround that limited descriptor
3201 * length to 4kB */
3202 if (hw->mac_type >= e1000_82571)
3203 max_per_txd = 8192;
3204
3205 mss = skb_shinfo(skb)->gso_size;
3206 /* The controller does a simple calculation to
3207 * make sure there is enough room in the FIFO before
3208 * initiating the DMA for each buffer. The calc is:
3209 * 4 = ceil(buffer len/mss). To make sure we don't
3210 * overrun the FIFO, adjust the max buffer len if mss
3211 * drops. */
3212 if (mss) {
3213 u8 hdr_len;
3214 max_per_txd = min(mss << 2, max_per_txd);
3215 max_txd_pwr = fls(max_per_txd) - 1;
3216
3217 /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
3218 * points to just header, pull a few bytes of payload from
3219 * frags into skb->data */
3220 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
3221 if (skb->data_len && hdr_len == len) {
3222 switch (hw->mac_type) {
3223 unsigned int pull_size;
3224 case e1000_82544:
3225 /* Make sure we have room to chop off 4 bytes,
3226 * and that the end alignment will work out to
3227 * this hardware's requirements
3228 * NOTE: this is a TSO only workaround
3229 * if end byte alignment not correct move us
3230 * into the next dword */
3231 if ((unsigned long)(skb_tail_pointer(skb) - 1) & 4)
3232 break;
3233 /* fall through */
3234 case e1000_82571:
3235 case e1000_82572:
3236 case e1000_82573:
3237 case e1000_ich8lan:
3238 pull_size = min((unsigned int)4, skb->data_len);
3239 if (!__pskb_pull_tail(skb, pull_size)) {
3240 DPRINTK(DRV, ERR,
3241 "__pskb_pull_tail failed.\n");
3242 dev_kfree_skb_any(skb);
3243 return NETDEV_TX_OK;
3244 }
3245 len = skb->len - skb->data_len;
3246 break;
3247 default:
3248 /* do nothing */
3249 break;
3250 }
3251 }
3252 }
3253
3254 /* reserve a descriptor for the offload context */
3255 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
3256 count++;
3257 count++;
3258
3259 /* Controller Erratum workaround */
3260 if (!skb->data_len && tx_ring->last_tx_tso && !skb_is_gso(skb))
3261 count++;
3262
3263 count += TXD_USE_COUNT(len, max_txd_pwr);
3264
3265 if (adapter->pcix_82544)
3266 count++;
3267
3268 /* work-around for errata 10 and it applies to all controllers
3269 * in PCI-X mode, so add one more descriptor to the count
3270 */
3271 if (unlikely((hw->bus_type == e1000_bus_type_pcix) &&
3272 (len > 2015)))
3273 count++;
3274
3275 nr_frags = skb_shinfo(skb)->nr_frags;
3276 for (f = 0; f < nr_frags; f++)
3277 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
3278 max_txd_pwr);
3279 if (adapter->pcix_82544)
3280 count += nr_frags;
3281
3282
3283 if (hw->tx_pkt_filtering &&
3284 (hw->mac_type == e1000_82573))
3285 e1000_transfer_dhcp_info(adapter, skb);
3286
3287 /* need: count + 2 desc gap to keep tail from touching
3288 * head, otherwise try next time */
3289 if (unlikely(e1000_maybe_stop_tx(netdev, tx_ring, count + 2)))
3290 return NETDEV_TX_BUSY;
3291
3292 if (unlikely(hw->mac_type == e1000_82547)) {
3293 if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
3294 netif_stop_queue(netdev);
3295 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
3296 return NETDEV_TX_BUSY;
3297 }
3298 }
3299
3300 if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
3301 tx_flags |= E1000_TX_FLAGS_VLAN;
3302 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
3303 }
3304
3305 first = tx_ring->next_to_use;
3306
3307 tso = e1000_tso(adapter, tx_ring, skb);
3308 if (tso < 0) {
3309 dev_kfree_skb_any(skb);
3310 return NETDEV_TX_OK;
3311 }
3312
3313 if (likely(tso)) {
3314 tx_ring->last_tx_tso = 1;
3315 tx_flags |= E1000_TX_FLAGS_TSO;
3316 } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
3317 tx_flags |= E1000_TX_FLAGS_CSUM;
3318
3319 /* Old method was to assume IPv4 packet by default if TSO was enabled.
3320 * 82571 hardware supports TSO capabilities for IPv6 as well...
3321 * no longer assume, we must. */
3322 if (likely(skb->protocol == htons(ETH_P_IP)))
3323 tx_flags |= E1000_TX_FLAGS_IPV4;
3324
3325 e1000_tx_queue(adapter, tx_ring, tx_flags,
3326 e1000_tx_map(adapter, tx_ring, skb, first,
3327 max_per_txd, nr_frags, mss));
3328
3329 netdev->trans_start = jiffies;
3330
3331 /* Make sure there is space in the ring for the next send. */
3332 e1000_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 2);
3333
3334 return NETDEV_TX_OK;
3335 }
3336
3337 /**
3338 * e1000_tx_timeout - Respond to a Tx Hang
3339 * @netdev: network interface device structure
3340 **/
3341
3342 static void e1000_tx_timeout(struct net_device *netdev)
3343 {
3344 struct e1000_adapter *adapter = netdev_priv(netdev);
3345
3346 /* Do the reset outside of interrupt context */
3347 adapter->tx_timeout_count++;
3348 schedule_work(&adapter->reset_task);
3349 }
3350
3351 static void e1000_reset_task(struct work_struct *work)
3352 {
3353 struct e1000_adapter *adapter =
3354 container_of(work, struct e1000_adapter, reset_task);
3355
3356 e1000_reinit_locked(adapter);
3357 }
3358
3359 /**
3360 * e1000_get_stats - Get System Network Statistics
3361 * @netdev: network interface device structure
3362 *
3363 * Returns the address of the device statistics structure.
3364 * The statistics are actually updated from the timer callback.
3365 **/
3366
3367 static struct net_device_stats *e1000_get_stats(struct net_device *netdev)
3368 {
3369 struct e1000_adapter *adapter = netdev_priv(netdev);
3370
3371 /* only return the current stats */
3372 return &adapter->net_stats;
3373 }
3374
3375 /**
3376 * e1000_change_mtu - Change the Maximum Transfer Unit
3377 * @netdev: network interface device structure
3378 * @new_mtu: new value for maximum frame size
3379 *
3380 * Returns 0 on success, negative on failure
3381 **/
3382
3383 static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
3384 {
3385 struct e1000_adapter *adapter = netdev_priv(netdev);
3386 struct e1000_hw *hw = &adapter->hw;
3387 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
3388 u16 eeprom_data = 0;
3389
3390 if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
3391 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
3392 DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
3393 return -EINVAL;
3394 }
3395
3396 /* Adapter-specific max frame size limits. */
3397 switch (hw->mac_type) {
3398 case e1000_undefined ... e1000_82542_rev2_1:
3399 case e1000_ich8lan:
3400 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3401 DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
3402 return -EINVAL;
3403 }
3404 break;
3405 case e1000_82573:
3406 /* Jumbo Frames not supported if:
3407 * - this is not an 82573L device
3408 * - ASPM is enabled in any way (0x1A bits 3:2) */
3409 e1000_read_eeprom(hw, EEPROM_INIT_3GIO_3, 1,
3410 &eeprom_data);
3411 if ((hw->device_id != E1000_DEV_ID_82573L) ||
3412 (eeprom_data & EEPROM_WORD1A_ASPM_MASK)) {
3413 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3414 DPRINTK(PROBE, ERR,
3415 "Jumbo Frames not supported.\n");
3416 return -EINVAL;
3417 }
3418 break;
3419 }
3420 /* ERT will be enabled later to enable wire speed receives */
3421
3422 /* fall through to get support */
3423 case e1000_82571:
3424 case e1000_82572:
3425 case e1000_80003es2lan:
3426 #define MAX_STD_JUMBO_FRAME_SIZE 9234
3427 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
3428 DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
3429 return -EINVAL;
3430 }
3431 break;
3432 default:
3433 /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
3434 break;
3435 }
3436
3437 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
3438 * means we reserve 2 more, this pushes us to allocate from the next
3439 * larger slab size
3440 * i.e. RXBUFFER_2048 --> size-4096 slab */
3441
3442 if (max_frame <= E1000_RXBUFFER_256)
3443 adapter->rx_buffer_len = E1000_RXBUFFER_256;
3444 else if (max_frame <= E1000_RXBUFFER_512)
3445 adapter->rx_buffer_len = E1000_RXBUFFER_512;
3446 else if (max_frame <= E1000_RXBUFFER_1024)
3447 adapter->rx_buffer_len = E1000_RXBUFFER_1024;
3448 else if (max_frame <= E1000_RXBUFFER_2048)
3449 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
3450 else if (max_frame <= E1000_RXBUFFER_4096)
3451 adapter->rx_buffer_len = E1000_RXBUFFER_4096;
3452 else if (max_frame <= E1000_RXBUFFER_8192)
3453 adapter->rx_buffer_len = E1000_RXBUFFER_8192;
3454 else if (max_frame <= E1000_RXBUFFER_16384)
3455 adapter->rx_buffer_len = E1000_RXBUFFER_16384;
3456
3457 /* adjust allocation if LPE protects us, and we aren't using SBP */
3458 if (!hw->tbi_compatibility_on &&
3459 ((max_frame == MAXIMUM_ETHERNET_FRAME_SIZE) ||
3460 (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
3461 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
3462
3463 netdev->mtu = new_mtu;
3464 hw->max_frame_size = max_frame;
3465
3466 if (netif_running(netdev))
3467 e1000_reinit_locked(adapter);
3468
3469 return 0;
3470 }
3471
3472 /**
3473 * e1000_update_stats - Update the board statistics counters
3474 * @adapter: board private structure
3475 **/
3476
3477 void e1000_update_stats(struct e1000_adapter *adapter)
3478 {
3479 struct e1000_hw *hw = &adapter->hw;
3480 struct pci_dev *pdev = adapter->pdev;
3481 unsigned long flags;
3482 u16 phy_tmp;
3483
3484 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3485
3486 /*
3487 * Prevent stats update while adapter is being reset, or if the pci
3488 * connection is down.
3489 */
3490 if (adapter->link_speed == 0)
3491 return;
3492 if (pci_channel_offline(pdev))
3493 return;
3494
3495 spin_lock_irqsave(&adapter->stats_lock, flags);
3496
3497 /* these counters are modified from e1000_tbi_adjust_stats,
3498 * called from the interrupt context, so they must only
3499 * be written while holding adapter->stats_lock
3500 */
3501
3502 adapter->stats.crcerrs += er32(CRCERRS);
3503 adapter->stats.gprc += er32(GPRC);
3504 adapter->stats.gorcl += er32(GORCL);
3505 adapter->stats.gorch += er32(GORCH);
3506 adapter->stats.bprc += er32(BPRC);
3507 adapter->stats.mprc += er32(MPRC);
3508 adapter->stats.roc += er32(ROC);
3509
3510 if (hw->mac_type != e1000_ich8lan) {
3511 adapter->stats.prc64 += er32(PRC64);
3512 adapter->stats.prc127 += er32(PRC127);
3513 adapter->stats.prc255 += er32(PRC255);
3514 adapter->stats.prc511 += er32(PRC511);
3515 adapter->stats.prc1023 += er32(PRC1023);
3516 adapter->stats.prc1522 += er32(PRC1522);
3517 }
3518
3519 adapter->stats.symerrs += er32(SYMERRS);
3520 adapter->stats.mpc += er32(MPC);
3521 adapter->stats.scc += er32(SCC);
3522 adapter->stats.ecol += er32(ECOL);
3523 adapter->stats.mcc += er32(MCC);
3524 adapter->stats.latecol += er32(LATECOL);
3525 adapter->stats.dc += er32(DC);
3526 adapter->stats.sec += er32(SEC);
3527 adapter->stats.rlec += er32(RLEC);
3528 adapter->stats.xonrxc += er32(XONRXC);
3529 adapter->stats.xontxc += er32(XONTXC);
3530 adapter->stats.xoffrxc += er32(XOFFRXC);
3531 adapter->stats.xofftxc += er32(XOFFTXC);
3532 adapter->stats.fcruc += er32(FCRUC);
3533 adapter->stats.gptc += er32(GPTC);
3534 adapter->stats.gotcl += er32(GOTCL);
3535 adapter->stats.gotch += er32(GOTCH);
3536 adapter->stats.rnbc += er32(RNBC);
3537 adapter->stats.ruc += er32(RUC);
3538 adapter->stats.rfc += er32(RFC);
3539 adapter->stats.rjc += er32(RJC);
3540 adapter->stats.torl += er32(TORL);
3541 adapter->stats.torh += er32(TORH);
3542 adapter->stats.totl += er32(TOTL);
3543 adapter->stats.toth += er32(TOTH);
3544 adapter->stats.tpr += er32(TPR);
3545
3546 if (hw->mac_type != e1000_ich8lan) {
3547 adapter->stats.ptc64 += er32(PTC64);
3548 adapter->stats.ptc127 += er32(PTC127);
3549 adapter->stats.ptc255 += er32(PTC255);
3550 adapter->stats.ptc511 += er32(PTC511);
3551 adapter->stats.ptc1023 += er32(PTC1023);
3552 adapter->stats.ptc1522 += er32(PTC1522);
3553 }
3554
3555 adapter->stats.mptc += er32(MPTC);
3556 adapter->stats.bptc += er32(BPTC);
3557
3558 /* used for adaptive IFS */
3559
3560 hw->tx_packet_delta = er32(TPT);
3561 adapter->stats.tpt += hw->tx_packet_delta;
3562 hw->collision_delta = er32(COLC);
3563 adapter->stats.colc += hw->collision_delta;
3564
3565 if (hw->mac_type >= e1000_82543) {
3566 adapter->stats.algnerrc += er32(ALGNERRC);
3567 adapter->stats.rxerrc += er32(RXERRC);
3568 adapter->stats.tncrs += er32(TNCRS);
3569 adapter->stats.cexterr += er32(CEXTERR);
3570 adapter->stats.tsctc += er32(TSCTC);
3571 adapter->stats.tsctfc += er32(TSCTFC);
3572 }
3573 if (hw->mac_type > e1000_82547_rev_2) {
3574 adapter->stats.iac += er32(IAC);
3575 adapter->stats.icrxoc += er32(ICRXOC);
3576
3577 if (hw->mac_type != e1000_ich8lan) {
3578 adapter->stats.icrxptc += er32(ICRXPTC);
3579 adapter->stats.icrxatc += er32(ICRXATC);
3580 adapter->stats.ictxptc += er32(ICTXPTC);
3581 adapter->stats.ictxatc += er32(ICTXATC);
3582 adapter->stats.ictxqec += er32(ICTXQEC);
3583 adapter->stats.ictxqmtc += er32(ICTXQMTC);
3584 adapter->stats.icrxdmtc += er32(ICRXDMTC);
3585 }
3586 }
3587
3588 /* Fill out the OS statistics structure */
3589 adapter->net_stats.multicast = adapter->stats.mprc;
3590 adapter->net_stats.collisions = adapter->stats.colc;
3591
3592 /* Rx Errors */
3593
3594 /* RLEC on some newer hardware can be incorrect so build
3595 * our own version based on RUC and ROC */
3596 adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3597 adapter->stats.crcerrs + adapter->stats.algnerrc +
3598 adapter->stats.ruc + adapter->stats.roc +
3599 adapter->stats.cexterr;
3600 adapter->stats.rlerrc = adapter->stats.ruc + adapter->stats.roc;
3601 adapter->net_stats.rx_length_errors = adapter->stats.rlerrc;
3602 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3603 adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
3604 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3605
3606 /* Tx Errors */
3607 adapter->stats.txerrc = adapter->stats.ecol + adapter->stats.latecol;
3608 adapter->net_stats.tx_errors = adapter->stats.txerrc;
3609 adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3610 adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3611 adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
3612 if (hw->bad_tx_carr_stats_fd &&
3613 adapter->link_duplex == FULL_DUPLEX) {
3614 adapter->net_stats.tx_carrier_errors = 0;
3615 adapter->stats.tncrs = 0;
3616 }
3617
3618 /* Tx Dropped needs to be maintained elsewhere */
3619
3620 /* Phy Stats */
3621 if (hw->media_type == e1000_media_type_copper) {
3622 if ((adapter->link_speed == SPEED_1000) &&
3623 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
3624 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3625 adapter->phy_stats.idle_errors += phy_tmp;
3626 }
3627
3628 if ((hw->mac_type <= e1000_82546) &&
3629 (hw->phy_type == e1000_phy_m88) &&
3630 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
3631 adapter->phy_stats.receive_errors += phy_tmp;
3632 }
3633
3634 /* Management Stats */
3635 if (hw->has_smbus) {
3636 adapter->stats.mgptc += er32(MGTPTC);
3637 adapter->stats.mgprc += er32(MGTPRC);
3638 adapter->stats.mgpdc += er32(MGTPDC);
3639 }
3640
3641 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3642 }
3643
3644 /**
3645 * e1000_intr_msi - Interrupt Handler
3646 * @irq: interrupt number
3647 * @data: pointer to a network interface device structure
3648 **/
3649
3650 static irqreturn_t e1000_intr_msi(int irq, void *data)
3651 {
3652 struct net_device *netdev = data;
3653 struct e1000_adapter *adapter = netdev_priv(netdev);
3654 struct e1000_hw *hw = &adapter->hw;
3655 u32 icr = er32(ICR);
3656
3657 /* in NAPI mode read ICR disables interrupts using IAM */
3658
3659 if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
3660 hw->get_link_status = 1;
3661 /* 80003ES2LAN workaround-- For packet buffer work-around on
3662 * link down event; disable receives here in the ISR and reset
3663 * adapter in watchdog */
3664 if (netif_carrier_ok(netdev) &&
3665 (hw->mac_type == e1000_80003es2lan)) {
3666 /* disable receives */
3667 u32 rctl = er32(RCTL);
3668 ew32(RCTL, rctl & ~E1000_RCTL_EN);
3669 }
3670 /* guard against interrupt when we're going down */
3671 if (!test_bit(__E1000_DOWN, &adapter->flags))
3672 mod_timer(&adapter->watchdog_timer, jiffies + 1);
3673 }
3674
3675 if (likely(napi_schedule_prep(&adapter->napi))) {
3676 adapter->total_tx_bytes = 0;
3677 adapter->total_tx_packets = 0;
3678 adapter->total_rx_bytes = 0;
3679 adapter->total_rx_packets = 0;
3680 __napi_schedule(&adapter->napi);
3681 } else
3682 e1000_irq_enable(adapter);
3683
3684 return IRQ_HANDLED;
3685 }
3686
3687 /**
3688 * e1000_intr - Interrupt Handler
3689 * @irq: interrupt number
3690 * @data: pointer to a network interface device structure
3691 **/
3692
3693 static irqreturn_t e1000_intr(int irq, void *data)
3694 {
3695 struct net_device *netdev = data;
3696 struct e1000_adapter *adapter = netdev_priv(netdev);
3697 struct e1000_hw *hw = &adapter->hw;
3698 u32 rctl, icr = er32(ICR);
3699
3700 if (unlikely((!icr) || test_bit(__E1000_RESETTING, &adapter->flags)))
3701 return IRQ_NONE; /* Not our interrupt */
3702
3703 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
3704 * not set, then the adapter didn't send an interrupt */
3705 if (unlikely(hw->mac_type >= e1000_82571 &&
3706 !(icr & E1000_ICR_INT_ASSERTED)))
3707 return IRQ_NONE;
3708
3709 /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked. No
3710 * need for the IMC write */
3711
3712 if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
3713 hw->get_link_status = 1;
3714 /* 80003ES2LAN workaround--
3715 * For packet buffer work-around on link down event;
3716 * disable receives here in the ISR and
3717 * reset adapter in watchdog
3718 */
3719 if (netif_carrier_ok(netdev) &&
3720 (hw->mac_type == e1000_80003es2lan)) {
3721 /* disable receives */
3722 rctl = er32(RCTL);
3723 ew32(RCTL, rctl & ~E1000_RCTL_EN);
3724 }
3725 /* guard against interrupt when we're going down */
3726 if (!test_bit(__E1000_DOWN, &adapter->flags))
3727 mod_timer(&adapter->watchdog_timer, jiffies + 1);
3728 }
3729
3730 if (unlikely(hw->mac_type < e1000_82571)) {
3731 /* disable interrupts, without the synchronize_irq bit */
3732 ew32(IMC, ~0);
3733 E1000_WRITE_FLUSH();
3734 }
3735 if (likely(napi_schedule_prep(&adapter->napi))) {
3736 adapter->total_tx_bytes = 0;
3737 adapter->total_tx_packets = 0;
3738 adapter->total_rx_bytes = 0;
3739 adapter->total_rx_packets = 0;
3740 __napi_schedule(&adapter->napi);
3741 } else
3742 /* this really should not happen! if it does it is basically a
3743 * bug, but not a hard error, so enable ints and continue */
3744 e1000_irq_enable(adapter);
3745
3746 return IRQ_HANDLED;
3747 }
3748
3749 /**
3750 * e1000_clean - NAPI Rx polling callback
3751 * @adapter: board private structure
3752 **/
3753 static int e1000_clean(struct napi_struct *napi, int budget)
3754 {
3755 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, napi);
3756 struct net_device *poll_dev = adapter->netdev;
3757 int tx_cleaned = 0, work_done = 0;
3758
3759 adapter = netdev_priv(poll_dev);
3760
3761 tx_cleaned = e1000_clean_tx_irq(adapter, &adapter->tx_ring[0]);
3762
3763 adapter->clean_rx(adapter, &adapter->rx_ring[0],
3764 &work_done, budget);
3765
3766 if (tx_cleaned)
3767 work_done = budget;
3768
3769 /* If budget not fully consumed, exit the polling mode */
3770 if (work_done < budget) {
3771 if (likely(adapter->itr_setting & 3))
3772 e1000_set_itr(adapter);
3773 napi_complete(napi);
3774 e1000_irq_enable(adapter);
3775 }
3776
3777 return work_done;
3778 }
3779
3780 /**
3781 * e1000_clean_tx_irq - Reclaim resources after transmit completes
3782 * @adapter: board private structure
3783 **/
3784 static bool e1000_clean_tx_irq(struct e1000_adapter *adapter,
3785 struct e1000_tx_ring *tx_ring)
3786 {
3787 struct e1000_hw *hw = &adapter->hw;
3788 struct net_device *netdev = adapter->netdev;
3789 struct e1000_tx_desc *tx_desc, *eop_desc;
3790 struct e1000_buffer *buffer_info;
3791 unsigned int i, eop;
3792 unsigned int count = 0;
3793 bool cleaned = false;
3794 unsigned int total_tx_bytes=0, total_tx_packets=0;
3795
3796 i = tx_ring->next_to_clean;
3797 eop = tx_ring->buffer_info[i].next_to_watch;
3798 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3799
3800 while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
3801 for (cleaned = false; !cleaned; ) {
3802 tx_desc = E1000_TX_DESC(*tx_ring, i);
3803 buffer_info = &tx_ring->buffer_info[i];
3804 cleaned = (i == eop);
3805
3806 if (cleaned) {
3807 struct sk_buff *skb = buffer_info->skb;
3808 unsigned int segs, bytecount;
3809 segs = skb_shinfo(skb)->gso_segs ?: 1;
3810 /* multiply data chunks by size of headers */
3811 bytecount = ((segs - 1) * skb_headlen(skb)) +
3812 skb->len;
3813 total_tx_packets += segs;
3814 total_tx_bytes += bytecount;
3815 }
3816 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
3817 tx_desc->upper.data = 0;
3818
3819 if (unlikely(++i == tx_ring->count)) i = 0;
3820 }
3821
3822 eop = tx_ring->buffer_info[i].next_to_watch;
3823 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3824 #define E1000_TX_WEIGHT 64
3825 /* weight of a sort for tx, to avoid endless transmit cleanup */
3826 if (count++ == E1000_TX_WEIGHT)
3827 break;
3828 }
3829
3830 tx_ring->next_to_clean = i;
3831
3832 #define TX_WAKE_THRESHOLD 32
3833 if (unlikely(cleaned && netif_carrier_ok(netdev) &&
3834 E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) {
3835 /* Make sure that anybody stopping the queue after this
3836 * sees the new next_to_clean.
3837 */
3838 smp_mb();
3839 if (netif_queue_stopped(netdev)) {
3840 netif_wake_queue(netdev);
3841 ++adapter->restart_queue;
3842 }
3843 }
3844
3845 if (adapter->detect_tx_hung) {
3846 /* Detect a transmit hang in hardware, this serializes the
3847 * check with the clearing of time_stamp and movement of i */
3848 adapter->detect_tx_hung = false;
3849 if (tx_ring->buffer_info[eop].dma &&
3850 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
3851 (adapter->tx_timeout_factor * HZ))
3852 && !(er32(STATUS) & E1000_STATUS_TXOFF)) {
3853
3854 /* detected Tx unit hang */
3855 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
3856 " Tx Queue <%lu>\n"
3857 " TDH <%x>\n"
3858 " TDT <%x>\n"
3859 " next_to_use <%x>\n"
3860 " next_to_clean <%x>\n"
3861 "buffer_info[next_to_clean]\n"
3862 " time_stamp <%lx>\n"
3863 " next_to_watch <%x>\n"
3864 " jiffies <%lx>\n"
3865 " next_to_watch.status <%x>\n",
3866 (unsigned long)((tx_ring - adapter->tx_ring) /
3867 sizeof(struct e1000_tx_ring)),
3868 readl(hw->hw_addr + tx_ring->tdh),
3869 readl(hw->hw_addr + tx_ring->tdt),
3870 tx_ring->next_to_use,
3871 tx_ring->next_to_clean,
3872 tx_ring->buffer_info[eop].time_stamp,
3873 eop,
3874 jiffies,
3875 eop_desc->upper.fields.status);
3876 netif_stop_queue(netdev);
3877 }
3878 }
3879 adapter->total_tx_bytes += total_tx_bytes;
3880 adapter->total_tx_packets += total_tx_packets;
3881 adapter->net_stats.tx_bytes += total_tx_bytes;
3882 adapter->net_stats.tx_packets += total_tx_packets;
3883 return cleaned;
3884 }
3885
3886 /**
3887 * e1000_rx_checksum - Receive Checksum Offload for 82543
3888 * @adapter: board private structure
3889 * @status_err: receive descriptor status and error fields
3890 * @csum: receive descriptor csum field
3891 * @sk_buff: socket buffer with received data
3892 **/
3893
3894 static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
3895 u32 csum, struct sk_buff *skb)
3896 {
3897 struct e1000_hw *hw = &adapter->hw;
3898 u16 status = (u16)status_err;
3899 u8 errors = (u8)(status_err >> 24);
3900 skb->ip_summed = CHECKSUM_NONE;
3901
3902 /* 82543 or newer only */
3903 if (unlikely(hw->mac_type < e1000_82543)) return;
3904 /* Ignore Checksum bit is set */
3905 if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
3906 /* TCP/UDP checksum error bit is set */
3907 if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
3908 /* let the stack verify checksum errors */
3909 adapter->hw_csum_err++;
3910 return;
3911 }
3912 /* TCP/UDP Checksum has not been calculated */
3913 if (hw->mac_type <= e1000_82547_rev_2) {
3914 if (!(status & E1000_RXD_STAT_TCPCS))
3915 return;
3916 } else {
3917 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
3918 return;
3919 }
3920 /* It must be a TCP or UDP packet with a valid checksum */
3921 if (likely(status & E1000_RXD_STAT_TCPCS)) {
3922 /* TCP checksum is good */
3923 skb->ip_summed = CHECKSUM_UNNECESSARY;
3924 } else if (hw->mac_type > e1000_82547_rev_2) {
3925 /* IP fragment with UDP payload */
3926 /* Hardware complements the payload checksum, so we undo it
3927 * and then put the value in host order for further stack use.
3928 */
3929 __sum16 sum = (__force __sum16)htons(csum);
3930 skb->csum = csum_unfold(~sum);
3931 skb->ip_summed = CHECKSUM_COMPLETE;
3932 }
3933 adapter->hw_csum_good++;
3934 }
3935
3936 /**
3937 * e1000_clean_rx_irq - Send received data up the network stack; legacy
3938 * @adapter: board private structure
3939 **/
3940 static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
3941 struct e1000_rx_ring *rx_ring,
3942 int *work_done, int work_to_do)
3943 {
3944 struct e1000_hw *hw = &adapter->hw;
3945 struct net_device *netdev = adapter->netdev;
3946 struct pci_dev *pdev = adapter->pdev;
3947 struct e1000_rx_desc *rx_desc, *next_rxd;
3948 struct e1000_buffer *buffer_info, *next_buffer;
3949 unsigned long flags;
3950 u32 length;
3951 u8 last_byte;
3952 unsigned int i;
3953 int cleaned_count = 0;
3954 bool cleaned = false;
3955 unsigned int total_rx_bytes=0, total_rx_packets=0;
3956
3957 i = rx_ring->next_to_clean;
3958 rx_desc = E1000_RX_DESC(*rx_ring, i);
3959 buffer_info = &rx_ring->buffer_info[i];
3960
3961 while (rx_desc->status & E1000_RXD_STAT_DD) {
3962 struct sk_buff *skb;
3963 u8 status;
3964
3965 if (*work_done >= work_to_do)
3966 break;
3967 (*work_done)++;
3968
3969 status = rx_desc->status;
3970 skb = buffer_info->skb;
3971 buffer_info->skb = NULL;
3972
3973 prefetch(skb->data - NET_IP_ALIGN);
3974
3975 if (++i == rx_ring->count) i = 0;
3976 next_rxd = E1000_RX_DESC(*rx_ring, i);
3977 prefetch(next_rxd);
3978
3979 next_buffer = &rx_ring->buffer_info[i];
3980
3981 cleaned = true;
3982 cleaned_count++;
3983 pci_unmap_single(pdev,
3984 buffer_info->dma,
3985 buffer_info->length,
3986 PCI_DMA_FROMDEVICE);
3987
3988 length = le16_to_cpu(rx_desc->length);
3989
3990 if (unlikely(!(status & E1000_RXD_STAT_EOP))) {
3991 /* All receives must fit into a single buffer */
3992 E1000_DBG("%s: Receive packet consumed multiple"
3993 " buffers\n", netdev->name);
3994 /* recycle */
3995 buffer_info->skb = skb;
3996 goto next_desc;
3997 }
3998
3999 if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
4000 last_byte = *(skb->data + length - 1);
4001 if (TBI_ACCEPT(hw, status, rx_desc->errors, length,
4002 last_byte)) {
4003 spin_lock_irqsave(&adapter->stats_lock, flags);
4004 e1000_tbi_adjust_stats(hw, &adapter->stats,
4005 length, skb->data);
4006 spin_unlock_irqrestore(&adapter->stats_lock,
4007 flags);
4008 length--;
4009 } else {
4010 /* recycle */
4011 buffer_info->skb = skb;
4012 goto next_desc;
4013 }
4014 }
4015
4016 /* adjust length to remove Ethernet CRC, this must be
4017 * done after the TBI_ACCEPT workaround above */
4018 length -= 4;
4019
4020 /* probably a little skewed due to removing CRC */
4021 total_rx_bytes += length;
4022 total_rx_packets++;
4023
4024 /* code added for copybreak, this should improve
4025 * performance for small packets with large amounts
4026 * of reassembly being done in the stack */
4027 if (length < copybreak) {
4028 struct sk_buff *new_skb =
4029 netdev_alloc_skb(netdev, length + NET_IP_ALIGN);
4030 if (new_skb) {
4031 skb_reserve(new_skb, NET_IP_ALIGN);
4032 skb_copy_to_linear_data_offset(new_skb,
4033 -NET_IP_ALIGN,
4034 (skb->data -
4035 NET_IP_ALIGN),
4036 (length +
4037 NET_IP_ALIGN));
4038 /* save the skb in buffer_info as good */
4039 buffer_info->skb = skb;
4040 skb = new_skb;
4041 }
4042 /* else just continue with the old one */
4043 }
4044 /* end copybreak code */
4045 skb_put(skb, length);
4046
4047 /* Receive Checksum Offload */
4048 e1000_rx_checksum(adapter,
4049 (u32)(status) |
4050 ((u32)(rx_desc->errors) << 24),
4051 le16_to_cpu(rx_desc->csum), skb);
4052
4053 skb->protocol = eth_type_trans(skb, netdev);
4054
4055 if (unlikely(adapter->vlgrp &&
4056 (status & E1000_RXD_STAT_VP))) {
4057 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
4058 le16_to_cpu(rx_desc->special));
4059 } else {
4060 netif_receive_skb(skb);
4061 }
4062
4063 next_desc:
4064 rx_desc->status = 0;
4065
4066 /* return some buffers to hardware, one at a time is too slow */
4067 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
4068 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4069 cleaned_count = 0;
4070 }
4071
4072 /* use prefetched values */
4073 rx_desc = next_rxd;
4074 buffer_info = next_buffer;
4075 }
4076 rx_ring->next_to_clean = i;
4077
4078 cleaned_count = E1000_DESC_UNUSED(rx_ring);
4079 if (cleaned_count)
4080 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4081
4082 adapter->total_rx_packets += total_rx_packets;
4083 adapter->total_rx_bytes += total_rx_bytes;
4084 adapter->net_stats.rx_bytes += total_rx_bytes;
4085 adapter->net_stats.rx_packets += total_rx_packets;
4086 return cleaned;
4087 }
4088
4089 /**
4090 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
4091 * @adapter: address of board private structure
4092 **/
4093
4094 static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
4095 struct e1000_rx_ring *rx_ring,
4096 int cleaned_count)
4097 {
4098 struct e1000_hw *hw = &adapter->hw;
4099 struct net_device *netdev = adapter->netdev;
4100 struct pci_dev *pdev = adapter->pdev;
4101 struct e1000_rx_desc *rx_desc;
4102 struct e1000_buffer *buffer_info;
4103 struct sk_buff *skb;
4104 unsigned int i;
4105 unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
4106
4107 i = rx_ring->next_to_use;
4108 buffer_info = &rx_ring->buffer_info[i];
4109
4110 while (cleaned_count--) {
4111 skb = buffer_info->skb;
4112 if (skb) {
4113 skb_trim(skb, 0);
4114 goto map_skb;
4115 }
4116
4117 skb = netdev_alloc_skb(netdev, bufsz);
4118 if (unlikely(!skb)) {
4119 /* Better luck next round */
4120 adapter->alloc_rx_buff_failed++;
4121 break;
4122 }
4123
4124 /* Fix for errata 23, can't cross 64kB boundary */
4125 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4126 struct sk_buff *oldskb = skb;
4127 DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
4128 "at %p\n", bufsz, skb->data);
4129 /* Try again, without freeing the previous */
4130 skb = netdev_alloc_skb(netdev, bufsz);
4131 /* Failed allocation, critical failure */
4132 if (!skb) {
4133 dev_kfree_skb(oldskb);
4134 break;
4135 }
4136
4137 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4138 /* give up */
4139 dev_kfree_skb(skb);
4140 dev_kfree_skb(oldskb);
4141 break; /* while !buffer_info->skb */
4142 }
4143
4144 /* Use new allocation */
4145 dev_kfree_skb(oldskb);
4146 }
4147 /* Make buffer alignment 2 beyond a 16 byte boundary
4148 * this will result in a 16 byte aligned IP header after
4149 * the 14 byte MAC header is removed
4150 */
4151 skb_reserve(skb, NET_IP_ALIGN);
4152
4153 buffer_info->skb = skb;
4154 buffer_info->length = adapter->rx_buffer_len;
4155 map_skb:
4156 buffer_info->dma = pci_map_single(pdev,
4157 skb->data,
4158 adapter->rx_buffer_len,
4159 PCI_DMA_FROMDEVICE);
4160
4161 /* Fix for errata 23, can't cross 64kB boundary */
4162 if (!e1000_check_64k_bound(adapter,
4163 (void *)(unsigned long)buffer_info->dma,
4164 adapter->rx_buffer_len)) {
4165 DPRINTK(RX_ERR, ERR,
4166 "dma align check failed: %u bytes at %p\n",
4167 adapter->rx_buffer_len,
4168 (void *)(unsigned long)buffer_info->dma);
4169 dev_kfree_skb(skb);
4170 buffer_info->skb = NULL;
4171
4172 pci_unmap_single(pdev, buffer_info->dma,
4173 adapter->rx_buffer_len,
4174 PCI_DMA_FROMDEVICE);
4175
4176 break; /* while !buffer_info->skb */
4177 }
4178 rx_desc = E1000_RX_DESC(*rx_ring, i);
4179 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4180
4181 if (unlikely(++i == rx_ring->count))
4182 i = 0;
4183 buffer_info = &rx_ring->buffer_info[i];
4184 }
4185
4186 if (likely(rx_ring->next_to_use != i)) {
4187 rx_ring->next_to_use = i;
4188 if (unlikely(i-- == 0))
4189 i = (rx_ring->count - 1);
4190
4191 /* Force memory writes to complete before letting h/w
4192 * know there are new descriptors to fetch. (Only
4193 * applicable for weak-ordered memory model archs,
4194 * such as IA-64). */
4195 wmb();
4196 writel(i, hw->hw_addr + rx_ring->rdt);
4197 }
4198 }
4199
4200 /**
4201 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
4202 * @adapter:
4203 **/
4204
4205 static void e1000_smartspeed(struct e1000_adapter *adapter)
4206 {
4207 struct e1000_hw *hw = &adapter->hw;
4208 u16 phy_status;
4209 u16 phy_ctrl;
4210
4211 if ((hw->phy_type != e1000_phy_igp) || !hw->autoneg ||
4212 !(hw->autoneg_advertised & ADVERTISE_1000_FULL))
4213 return;
4214
4215 if (adapter->smartspeed == 0) {
4216 /* If Master/Slave config fault is asserted twice,
4217 * we assume back-to-back */
4218 e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_status);
4219 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
4220 e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_status);
4221 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
4222 e1000_read_phy_reg(hw, PHY_1000T_CTRL, &phy_ctrl);
4223 if (phy_ctrl & CR_1000T_MS_ENABLE) {
4224 phy_ctrl &= ~CR_1000T_MS_ENABLE;
4225 e1000_write_phy_reg(hw, PHY_1000T_CTRL,
4226 phy_ctrl);
4227 adapter->smartspeed++;
4228 if (!e1000_phy_setup_autoneg(hw) &&
4229 !e1000_read_phy_reg(hw, PHY_CTRL,
4230 &phy_ctrl)) {
4231 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4232 MII_CR_RESTART_AUTO_NEG);
4233 e1000_write_phy_reg(hw, PHY_CTRL,
4234 phy_ctrl);
4235 }
4236 }
4237 return;
4238 } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
4239 /* If still no link, perhaps using 2/3 pair cable */
4240 e1000_read_phy_reg(hw, PHY_1000T_CTRL, &phy_ctrl);
4241 phy_ctrl |= CR_1000T_MS_ENABLE;
4242 e1000_write_phy_reg(hw, PHY_1000T_CTRL, phy_ctrl);
4243 if (!e1000_phy_setup_autoneg(hw) &&
4244 !e1000_read_phy_reg(hw, PHY_CTRL, &phy_ctrl)) {
4245 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4246 MII_CR_RESTART_AUTO_NEG);
4247 e1000_write_phy_reg(hw, PHY_CTRL, phy_ctrl);
4248 }
4249 }
4250 /* Restart process after E1000_SMARTSPEED_MAX iterations */
4251 if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
4252 adapter->smartspeed = 0;
4253 }
4254
4255 /**
4256 * e1000_ioctl -
4257 * @netdev:
4258 * @ifreq:
4259 * @cmd:
4260 **/
4261
4262 static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4263 {
4264 switch (cmd) {
4265 case SIOCGMIIPHY:
4266 case SIOCGMIIREG:
4267 case SIOCSMIIREG:
4268 return e1000_mii_ioctl(netdev, ifr, cmd);
4269 default:
4270 return -EOPNOTSUPP;
4271 }
4272 }
4273
4274 /**
4275 * e1000_mii_ioctl -
4276 * @netdev:
4277 * @ifreq:
4278 * @cmd:
4279 **/
4280
4281 static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
4282 int cmd)
4283 {
4284 struct e1000_adapter *adapter = netdev_priv(netdev);
4285 struct e1000_hw *hw = &adapter->hw;
4286 struct mii_ioctl_data *data = if_mii(ifr);
4287 int retval;
4288 u16 mii_reg;
4289 u16 spddplx;
4290 unsigned long flags;
4291
4292 if (hw->media_type != e1000_media_type_copper)
4293 return -EOPNOTSUPP;
4294
4295 switch (cmd) {
4296 case SIOCGMIIPHY:
4297 data->phy_id = hw->phy_addr;
4298 break;
4299 case SIOCGMIIREG:
4300 if (!capable(CAP_NET_ADMIN))
4301 return -EPERM;
4302 spin_lock_irqsave(&adapter->stats_lock, flags);
4303 if (e1000_read_phy_reg(hw, data->reg_num & 0x1F,
4304 &data->val_out)) {
4305 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4306 return -EIO;
4307 }
4308 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4309 break;
4310 case SIOCSMIIREG:
4311 if (!capable(CAP_NET_ADMIN))
4312 return -EPERM;
4313 if (data->reg_num & ~(0x1F))
4314 return -EFAULT;
4315 mii_reg = data->val_in;
4316 spin_lock_irqsave(&adapter->stats_lock, flags);
4317 if (e1000_write_phy_reg(hw, data->reg_num,
4318 mii_reg)) {
4319 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4320 return -EIO;
4321 }
4322 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4323 if (hw->media_type == e1000_media_type_copper) {
4324 switch (data->reg_num) {
4325 case PHY_CTRL:
4326 if (mii_reg & MII_CR_POWER_DOWN)
4327 break;
4328 if (mii_reg & MII_CR_AUTO_NEG_EN) {
4329 hw->autoneg = 1;
4330 hw->autoneg_advertised = 0x2F;
4331 } else {
4332 if (mii_reg & 0x40)
4333 spddplx = SPEED_1000;
4334 else if (mii_reg & 0x2000)
4335 spddplx = SPEED_100;
4336 else
4337 spddplx = SPEED_10;
4338 spddplx += (mii_reg & 0x100)
4339 ? DUPLEX_FULL :
4340 DUPLEX_HALF;
4341 retval = e1000_set_spd_dplx(adapter,
4342 spddplx);
4343 if (retval)
4344 return retval;
4345 }
4346 if (netif_running(adapter->netdev))
4347 e1000_reinit_locked(adapter);
4348 else
4349 e1000_reset(adapter);
4350 break;
4351 case M88E1000_PHY_SPEC_CTRL:
4352 case M88E1000_EXT_PHY_SPEC_CTRL:
4353 if (e1000_phy_reset(hw))
4354 return -EIO;
4355 break;
4356 }
4357 } else {
4358 switch (data->reg_num) {
4359 case PHY_CTRL:
4360 if (mii_reg & MII_CR_POWER_DOWN)
4361 break;
4362 if (netif_running(adapter->netdev))
4363 e1000_reinit_locked(adapter);
4364 else
4365 e1000_reset(adapter);
4366 break;
4367 }
4368 }
4369 break;
4370 default:
4371 return -EOPNOTSUPP;
4372 }
4373 return E1000_SUCCESS;
4374 }
4375
4376 void e1000_pci_set_mwi(struct e1000_hw *hw)
4377 {
4378 struct e1000_adapter *adapter = hw->back;
4379 int ret_val = pci_set_mwi(adapter->pdev);
4380
4381 if (ret_val)
4382 DPRINTK(PROBE, ERR, "Error in setting MWI\n");
4383 }
4384
4385 void e1000_pci_clear_mwi(struct e1000_hw *hw)
4386 {
4387 struct e1000_adapter *adapter = hw->back;
4388
4389 pci_clear_mwi(adapter->pdev);
4390 }
4391
4392 int e1000_pcix_get_mmrbc(struct e1000_hw *hw)
4393 {
4394 struct e1000_adapter *adapter = hw->back;
4395 return pcix_get_mmrbc(adapter->pdev);
4396 }
4397
4398 void e1000_pcix_set_mmrbc(struct e1000_hw *hw, int mmrbc)
4399 {
4400 struct e1000_adapter *adapter = hw->back;
4401 pcix_set_mmrbc(adapter->pdev, mmrbc);
4402 }
4403
4404 s32 e1000_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
4405 {
4406 struct e1000_adapter *adapter = hw->back;
4407 u16 cap_offset;
4408
4409 cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP);
4410 if (!cap_offset)
4411 return -E1000_ERR_CONFIG;
4412
4413 pci_read_config_word(adapter->pdev, cap_offset + reg, value);
4414
4415 return E1000_SUCCESS;
4416 }
4417
4418 void e1000_io_write(struct e1000_hw *hw, unsigned long port, u32 value)
4419 {
4420 outl(value, port);
4421 }
4422
4423 static void e1000_vlan_rx_register(struct net_device *netdev,
4424 struct vlan_group *grp)
4425 {
4426 struct e1000_adapter *adapter = netdev_priv(netdev);
4427 struct e1000_hw *hw = &adapter->hw;
4428 u32 ctrl, rctl;
4429
4430 if (!test_bit(__E1000_DOWN, &adapter->flags))
4431 e1000_irq_disable(adapter);
4432 adapter->vlgrp = grp;
4433
4434 if (grp) {
4435 /* enable VLAN tag insert/strip */
4436 ctrl = er32(CTRL);
4437 ctrl |= E1000_CTRL_VME;
4438 ew32(CTRL, ctrl);
4439
4440 if (adapter->hw.mac_type != e1000_ich8lan) {
4441 /* enable VLAN receive filtering */
4442 rctl = er32(RCTL);
4443 rctl &= ~E1000_RCTL_CFIEN;
4444 ew32(RCTL, rctl);
4445 e1000_update_mng_vlan(adapter);
4446 }
4447 } else {
4448 /* disable VLAN tag insert/strip */
4449 ctrl = er32(CTRL);
4450 ctrl &= ~E1000_CTRL_VME;
4451 ew32(CTRL, ctrl);
4452
4453 if (adapter->hw.mac_type != e1000_ich8lan) {
4454 if (adapter->mng_vlan_id !=
4455 (u16)E1000_MNG_VLAN_NONE) {
4456 e1000_vlan_rx_kill_vid(netdev,
4457 adapter->mng_vlan_id);
4458 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4459 }
4460 }
4461 }
4462
4463 if (!test_bit(__E1000_DOWN, &adapter->flags))
4464 e1000_irq_enable(adapter);
4465 }
4466
4467 static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
4468 {
4469 struct e1000_adapter *adapter = netdev_priv(netdev);
4470 struct e1000_hw *hw = &adapter->hw;
4471 u32 vfta, index;
4472
4473 if ((hw->mng_cookie.status &
4474 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4475 (vid == adapter->mng_vlan_id))
4476 return;
4477 /* add VID to filter table */
4478 index = (vid >> 5) & 0x7F;
4479 vfta = E1000_READ_REG_ARRAY(hw, VFTA, index);
4480 vfta |= (1 << (vid & 0x1F));
4481 e1000_write_vfta(hw, index, vfta);
4482 }
4483
4484 static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
4485 {
4486 struct e1000_adapter *adapter = netdev_priv(netdev);
4487 struct e1000_hw *hw = &adapter->hw;
4488 u32 vfta, index;
4489
4490 if (!test_bit(__E1000_DOWN, &adapter->flags))
4491 e1000_irq_disable(adapter);
4492 vlan_group_set_device(adapter->vlgrp, vid, NULL);
4493 if (!test_bit(__E1000_DOWN, &adapter->flags))
4494 e1000_irq_enable(adapter);
4495
4496 if ((hw->mng_cookie.status &
4497 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4498 (vid == adapter->mng_vlan_id)) {
4499 /* release control to f/w */
4500 e1000_release_hw_control(adapter);
4501 return;
4502 }
4503
4504 /* remove VID from filter table */
4505 index = (vid >> 5) & 0x7F;
4506 vfta = E1000_READ_REG_ARRAY(hw, VFTA, index);
4507 vfta &= ~(1 << (vid & 0x1F));
4508 e1000_write_vfta(hw, index, vfta);
4509 }
4510
4511 static void e1000_restore_vlan(struct e1000_adapter *adapter)
4512 {
4513 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
4514
4515 if (adapter->vlgrp) {
4516 u16 vid;
4517 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
4518 if (!vlan_group_get_device(adapter->vlgrp, vid))
4519 continue;
4520 e1000_vlan_rx_add_vid(adapter->netdev, vid);
4521 }
4522 }
4523 }
4524
4525 int e1000_set_spd_dplx(struct e1000_adapter *adapter, u16 spddplx)
4526 {
4527 struct e1000_hw *hw = &adapter->hw;
4528
4529 hw->autoneg = 0;
4530
4531 /* Fiber NICs only allow 1000 gbps Full duplex */
4532 if ((hw->media_type == e1000_media_type_fiber) &&
4533 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
4534 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
4535 return -EINVAL;
4536 }
4537
4538 switch (spddplx) {
4539 case SPEED_10 + DUPLEX_HALF:
4540 hw->forced_speed_duplex = e1000_10_half;
4541 break;
4542 case SPEED_10 + DUPLEX_FULL:
4543 hw->forced_speed_duplex = e1000_10_full;
4544 break;
4545 case SPEED_100 + DUPLEX_HALF:
4546 hw->forced_speed_duplex = e1000_100_half;
4547 break;
4548 case SPEED_100 + DUPLEX_FULL:
4549 hw->forced_speed_duplex = e1000_100_full;
4550 break;
4551 case SPEED_1000 + DUPLEX_FULL:
4552 hw->autoneg = 1;
4553 hw->autoneg_advertised = ADVERTISE_1000_FULL;
4554 break;
4555 case SPEED_1000 + DUPLEX_HALF: /* not supported */
4556 default:
4557 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
4558 return -EINVAL;
4559 }
4560 return 0;
4561 }
4562
4563 static int e1000_suspend(struct pci_dev *pdev, pm_message_t state)
4564 {
4565 struct net_device *netdev = pci_get_drvdata(pdev);
4566 struct e1000_adapter *adapter = netdev_priv(netdev);
4567 struct e1000_hw *hw = &adapter->hw;
4568 u32 ctrl, ctrl_ext, rctl, status;
4569 u32 wufc = adapter->wol;
4570 #ifdef CONFIG_PM
4571 int retval = 0;
4572 #endif
4573
4574 netif_device_detach(netdev);
4575
4576 if (netif_running(netdev)) {
4577 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
4578 e1000_down(adapter);
4579 }
4580
4581 #ifdef CONFIG_PM
4582 retval = pci_save_state(pdev);
4583 if (retval)
4584 return retval;
4585 #endif
4586
4587 status = er32(STATUS);
4588 if (status & E1000_STATUS_LU)
4589 wufc &= ~E1000_WUFC_LNKC;
4590
4591 if (wufc) {
4592 e1000_setup_rctl(adapter);
4593 e1000_set_rx_mode(netdev);
4594
4595 /* turn on all-multi mode if wake on multicast is enabled */
4596 if (wufc & E1000_WUFC_MC) {
4597 rctl = er32(RCTL);
4598 rctl |= E1000_RCTL_MPE;
4599 ew32(RCTL, rctl);
4600 }
4601
4602 if (hw->mac_type >= e1000_82540) {
4603 ctrl = er32(CTRL);
4604 /* advertise wake from D3Cold */
4605 #define E1000_CTRL_ADVD3WUC 0x00100000
4606 /* phy power management enable */
4607 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
4608 ctrl |= E1000_CTRL_ADVD3WUC |
4609 E1000_CTRL_EN_PHY_PWR_MGMT;
4610 ew32(CTRL, ctrl);
4611 }
4612
4613 if (hw->media_type == e1000_media_type_fiber ||
4614 hw->media_type == e1000_media_type_internal_serdes) {
4615 /* keep the laser running in D3 */
4616 ctrl_ext = er32(CTRL_EXT);
4617 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
4618 ew32(CTRL_EXT, ctrl_ext);
4619 }
4620
4621 /* Allow time for pending master requests to run */
4622 e1000_disable_pciex_master(hw);
4623
4624 ew32(WUC, E1000_WUC_PME_EN);
4625 ew32(WUFC, wufc);
4626 pci_enable_wake(pdev, PCI_D3hot, 1);
4627 pci_enable_wake(pdev, PCI_D3cold, 1);
4628 } else {
4629 ew32(WUC, 0);
4630 ew32(WUFC, 0);
4631 pci_enable_wake(pdev, PCI_D3hot, 0);
4632 pci_enable_wake(pdev, PCI_D3cold, 0);
4633 }
4634
4635 e1000_release_manageability(adapter);
4636
4637 /* make sure adapter isn't asleep if manageability is enabled */
4638 if (adapter->en_mng_pt) {
4639 pci_enable_wake(pdev, PCI_D3hot, 1);
4640 pci_enable_wake(pdev, PCI_D3cold, 1);
4641 }
4642
4643 if (hw->phy_type == e1000_phy_igp_3)
4644 e1000_phy_powerdown_workaround(hw);
4645
4646 if (netif_running(netdev))
4647 e1000_free_irq(adapter);
4648
4649 /* Release control of h/w to f/w. If f/w is AMT enabled, this
4650 * would have already happened in close and is redundant. */
4651 e1000_release_hw_control(adapter);
4652
4653 pci_disable_device(pdev);
4654
4655 pci_set_power_state(pdev, pci_choose_state(pdev, state));
4656
4657 return 0;
4658 }
4659
4660 #ifdef CONFIG_PM
4661 static int e1000_resume(struct pci_dev *pdev)
4662 {
4663 struct net_device *netdev = pci_get_drvdata(pdev);
4664 struct e1000_adapter *adapter = netdev_priv(netdev);
4665 struct e1000_hw *hw = &adapter->hw;
4666 u32 err;
4667
4668 pci_set_power_state(pdev, PCI_D0);
4669 pci_restore_state(pdev);
4670
4671 if (adapter->need_ioport)
4672 err = pci_enable_device(pdev);
4673 else
4674 err = pci_enable_device_mem(pdev);
4675 if (err) {
4676 printk(KERN_ERR "e1000: Cannot enable PCI device from suspend\n");
4677 return err;
4678 }
4679 pci_set_master(pdev);
4680
4681 pci_enable_wake(pdev, PCI_D3hot, 0);
4682 pci_enable_wake(pdev, PCI_D3cold, 0);
4683
4684 if (netif_running(netdev)) {
4685 err = e1000_request_irq(adapter);
4686 if (err)
4687 return err;
4688 }
4689
4690 e1000_power_up_phy(adapter);
4691 e1000_reset(adapter);
4692 ew32(WUS, ~0);
4693
4694 e1000_init_manageability(adapter);
4695
4696 if (netif_running(netdev))
4697 e1000_up(adapter);
4698
4699 netif_device_attach(netdev);
4700
4701 /* If the controller is 82573 and f/w is AMT, do not set
4702 * DRV_LOAD until the interface is up. For all other cases,
4703 * let the f/w know that the h/w is now under the control
4704 * of the driver. */
4705 if (hw->mac_type != e1000_82573 ||
4706 !e1000_check_mng_mode(hw))
4707 e1000_get_hw_control(adapter);
4708
4709 return 0;
4710 }
4711 #endif
4712
4713 static void e1000_shutdown(struct pci_dev *pdev)
4714 {
4715 e1000_suspend(pdev, PMSG_SUSPEND);
4716 }
4717
4718 #ifdef CONFIG_NET_POLL_CONTROLLER
4719 /*
4720 * Polling 'interrupt' - used by things like netconsole to send skbs
4721 * without having to re-enable interrupts. It's not called while
4722 * the interrupt routine is executing.
4723 */
4724 static void e1000_netpoll(struct net_device *netdev)
4725 {
4726 struct e1000_adapter *adapter = netdev_priv(netdev);
4727
4728 disable_irq(adapter->pdev->irq);
4729 e1000_intr(adapter->pdev->irq, netdev);
4730 enable_irq(adapter->pdev->irq);
4731 }
4732 #endif
4733
4734 /**
4735 * e1000_io_error_detected - called when PCI error is detected
4736 * @pdev: Pointer to PCI device
4737 * @state: The current pci conneection state
4738 *
4739 * This function is called after a PCI bus error affecting
4740 * this device has been detected.
4741 */
4742 static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
4743 pci_channel_state_t state)
4744 {
4745 struct net_device *netdev = pci_get_drvdata(pdev);
4746 struct e1000_adapter *adapter = netdev_priv(netdev);
4747
4748 netif_device_detach(netdev);
4749
4750 if (netif_running(netdev))
4751 e1000_down(adapter);
4752 pci_disable_device(pdev);
4753
4754 /* Request a slot slot reset. */
4755 return PCI_ERS_RESULT_NEED_RESET;
4756 }
4757
4758 /**
4759 * e1000_io_slot_reset - called after the pci bus has been reset.
4760 * @pdev: Pointer to PCI device
4761 *
4762 * Restart the card from scratch, as if from a cold-boot. Implementation
4763 * resembles the first-half of the e1000_resume routine.
4764 */
4765 static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
4766 {
4767 struct net_device *netdev = pci_get_drvdata(pdev);
4768 struct e1000_adapter *adapter = netdev_priv(netdev);
4769 struct e1000_hw *hw = &adapter->hw;
4770 int err;
4771
4772 if (adapter->need_ioport)
4773 err = pci_enable_device(pdev);
4774 else
4775 err = pci_enable_device_mem(pdev);
4776 if (err) {
4777 printk(KERN_ERR "e1000: Cannot re-enable PCI device after reset.\n");
4778 return PCI_ERS_RESULT_DISCONNECT;
4779 }
4780 pci_set_master(pdev);
4781
4782 pci_enable_wake(pdev, PCI_D3hot, 0);
4783 pci_enable_wake(pdev, PCI_D3cold, 0);
4784
4785 e1000_reset(adapter);
4786 ew32(WUS, ~0);
4787
4788 return PCI_ERS_RESULT_RECOVERED;
4789 }
4790
4791 /**
4792 * e1000_io_resume - called when traffic can start flowing again.
4793 * @pdev: Pointer to PCI device
4794 *
4795 * This callback is called when the error recovery driver tells us that
4796 * its OK to resume normal operation. Implementation resembles the
4797 * second-half of the e1000_resume routine.
4798 */
4799 static void e1000_io_resume(struct pci_dev *pdev)
4800 {
4801 struct net_device *netdev = pci_get_drvdata(pdev);
4802 struct e1000_adapter *adapter = netdev_priv(netdev);
4803 struct e1000_hw *hw = &adapter->hw;
4804
4805 e1000_init_manageability(adapter);
4806
4807 if (netif_running(netdev)) {
4808 if (e1000_up(adapter)) {
4809 printk("e1000: can't bring device back up after reset\n");
4810 return;
4811 }
4812 }
4813
4814 netif_device_attach(netdev);
4815
4816 /* If the controller is 82573 and f/w is AMT, do not set
4817 * DRV_LOAD until the interface is up. For all other cases,
4818 * let the f/w know that the h/w is now under the control
4819 * of the driver. */
4820 if (hw->mac_type != e1000_82573 ||
4821 !e1000_check_mng_mode(hw))
4822 e1000_get_hw_control(adapter);
4823
4824 }
4825
4826 /* e1000_main.c */
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