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e1000: increase version to 7.1.9-k2
[mirror_ubuntu-bionic-kernel.git] / drivers / net / e1000 / e1000_main.c
1 /*******************************************************************************
2
3
4 Copyright(c) 1999 - 2006 Intel Corporation. All rights reserved.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 2 of the License, or (at your option)
9 any later version.
10
11 This program is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 more details.
15
16 You should have received a copy of the GNU General Public License along with
17 this program; if not, write to the Free Software Foundation, Inc., 59
18 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19
20 The full GNU General Public License is included in this distribution in the
21 file called LICENSE.
22
23 Contact Information:
24 Linux NICS <linux.nics@intel.com>
25 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
26 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27
28 *******************************************************************************/
29
30 #include "e1000.h"
31
32 char e1000_driver_name[] = "e1000";
33 static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
34 #ifndef CONFIG_E1000_NAPI
35 #define DRIVERNAPI
36 #else
37 #define DRIVERNAPI "-NAPI"
38 #endif
39 #define DRV_VERSION "7.1.9-k2"DRIVERNAPI
40 char e1000_driver_version[] = DRV_VERSION;
41 static char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
42
43 /* e1000_pci_tbl - PCI Device ID Table
44 *
45 * Last entry must be all 0s
46 *
47 * Macro expands to...
48 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
49 */
50 static struct pci_device_id e1000_pci_tbl[] = {
51 INTEL_E1000_ETHERNET_DEVICE(0x1000),
52 INTEL_E1000_ETHERNET_DEVICE(0x1001),
53 INTEL_E1000_ETHERNET_DEVICE(0x1004),
54 INTEL_E1000_ETHERNET_DEVICE(0x1008),
55 INTEL_E1000_ETHERNET_DEVICE(0x1009),
56 INTEL_E1000_ETHERNET_DEVICE(0x100C),
57 INTEL_E1000_ETHERNET_DEVICE(0x100D),
58 INTEL_E1000_ETHERNET_DEVICE(0x100E),
59 INTEL_E1000_ETHERNET_DEVICE(0x100F),
60 INTEL_E1000_ETHERNET_DEVICE(0x1010),
61 INTEL_E1000_ETHERNET_DEVICE(0x1011),
62 INTEL_E1000_ETHERNET_DEVICE(0x1012),
63 INTEL_E1000_ETHERNET_DEVICE(0x1013),
64 INTEL_E1000_ETHERNET_DEVICE(0x1014),
65 INTEL_E1000_ETHERNET_DEVICE(0x1015),
66 INTEL_E1000_ETHERNET_DEVICE(0x1016),
67 INTEL_E1000_ETHERNET_DEVICE(0x1017),
68 INTEL_E1000_ETHERNET_DEVICE(0x1018),
69 INTEL_E1000_ETHERNET_DEVICE(0x1019),
70 INTEL_E1000_ETHERNET_DEVICE(0x101A),
71 INTEL_E1000_ETHERNET_DEVICE(0x101D),
72 INTEL_E1000_ETHERNET_DEVICE(0x101E),
73 INTEL_E1000_ETHERNET_DEVICE(0x1026),
74 INTEL_E1000_ETHERNET_DEVICE(0x1027),
75 INTEL_E1000_ETHERNET_DEVICE(0x1028),
76 INTEL_E1000_ETHERNET_DEVICE(0x1049),
77 INTEL_E1000_ETHERNET_DEVICE(0x104A),
78 INTEL_E1000_ETHERNET_DEVICE(0x104B),
79 INTEL_E1000_ETHERNET_DEVICE(0x104C),
80 INTEL_E1000_ETHERNET_DEVICE(0x104D),
81 INTEL_E1000_ETHERNET_DEVICE(0x105E),
82 INTEL_E1000_ETHERNET_DEVICE(0x105F),
83 INTEL_E1000_ETHERNET_DEVICE(0x1060),
84 INTEL_E1000_ETHERNET_DEVICE(0x1075),
85 INTEL_E1000_ETHERNET_DEVICE(0x1076),
86 INTEL_E1000_ETHERNET_DEVICE(0x1077),
87 INTEL_E1000_ETHERNET_DEVICE(0x1078),
88 INTEL_E1000_ETHERNET_DEVICE(0x1079),
89 INTEL_E1000_ETHERNET_DEVICE(0x107A),
90 INTEL_E1000_ETHERNET_DEVICE(0x107B),
91 INTEL_E1000_ETHERNET_DEVICE(0x107C),
92 INTEL_E1000_ETHERNET_DEVICE(0x107D),
93 INTEL_E1000_ETHERNET_DEVICE(0x107E),
94 INTEL_E1000_ETHERNET_DEVICE(0x107F),
95 INTEL_E1000_ETHERNET_DEVICE(0x108A),
96 INTEL_E1000_ETHERNET_DEVICE(0x108B),
97 INTEL_E1000_ETHERNET_DEVICE(0x108C),
98 INTEL_E1000_ETHERNET_DEVICE(0x1096),
99 INTEL_E1000_ETHERNET_DEVICE(0x1098),
100 INTEL_E1000_ETHERNET_DEVICE(0x1099),
101 INTEL_E1000_ETHERNET_DEVICE(0x109A),
102 INTEL_E1000_ETHERNET_DEVICE(0x10B5),
103 INTEL_E1000_ETHERNET_DEVICE(0x10B9),
104 INTEL_E1000_ETHERNET_DEVICE(0x10BA),
105 INTEL_E1000_ETHERNET_DEVICE(0x10BB),
106 /* required last entry */
107 {0,}
108 };
109
110 MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
111
112 static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
113 struct e1000_tx_ring *txdr);
114 static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
115 struct e1000_rx_ring *rxdr);
116 static void e1000_free_tx_resources(struct e1000_adapter *adapter,
117 struct e1000_tx_ring *tx_ring);
118 static void e1000_free_rx_resources(struct e1000_adapter *adapter,
119 struct e1000_rx_ring *rx_ring);
120
121 /* Local Function Prototypes */
122
123 static int e1000_init_module(void);
124 static void e1000_exit_module(void);
125 static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
126 static void __devexit e1000_remove(struct pci_dev *pdev);
127 static int e1000_alloc_queues(struct e1000_adapter *adapter);
128 static int e1000_sw_init(struct e1000_adapter *adapter);
129 static int e1000_open(struct net_device *netdev);
130 static int e1000_close(struct net_device *netdev);
131 static void e1000_configure_tx(struct e1000_adapter *adapter);
132 static void e1000_configure_rx(struct e1000_adapter *adapter);
133 static void e1000_setup_rctl(struct e1000_adapter *adapter);
134 static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
135 static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
136 static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
137 struct e1000_tx_ring *tx_ring);
138 static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
139 struct e1000_rx_ring *rx_ring);
140 static void e1000_set_multi(struct net_device *netdev);
141 static void e1000_update_phy_info(unsigned long data);
142 static void e1000_watchdog(unsigned long data);
143 static void e1000_82547_tx_fifo_stall(unsigned long data);
144 static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
145 static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
146 static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
147 static int e1000_set_mac(struct net_device *netdev, void *p);
148 static irqreturn_t e1000_intr(int irq, void *data, struct pt_regs *regs);
149 static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter,
150 struct e1000_tx_ring *tx_ring);
151 #ifdef CONFIG_E1000_NAPI
152 static int e1000_clean(struct net_device *poll_dev, int *budget);
153 static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
154 struct e1000_rx_ring *rx_ring,
155 int *work_done, int work_to_do);
156 static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
157 struct e1000_rx_ring *rx_ring,
158 int *work_done, int work_to_do);
159 #else
160 static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
161 struct e1000_rx_ring *rx_ring);
162 static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
163 struct e1000_rx_ring *rx_ring);
164 #endif
165 static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
166 struct e1000_rx_ring *rx_ring,
167 int cleaned_count);
168 static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
169 struct e1000_rx_ring *rx_ring,
170 int cleaned_count);
171 static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
172 static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
173 int cmd);
174 static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
175 static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
176 static void e1000_tx_timeout(struct net_device *dev);
177 static void e1000_reset_task(struct net_device *dev);
178 static void e1000_smartspeed(struct e1000_adapter *adapter);
179 static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
180 struct sk_buff *skb);
181
182 static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
183 static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
184 static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
185 static void e1000_restore_vlan(struct e1000_adapter *adapter);
186
187 static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
188 #ifdef CONFIG_PM
189 static int e1000_resume(struct pci_dev *pdev);
190 #endif
191 static void e1000_shutdown(struct pci_dev *pdev);
192
193 #ifdef CONFIG_NET_POLL_CONTROLLER
194 /* for netdump / net console */
195 static void e1000_netpoll (struct net_device *netdev);
196 #endif
197
198 static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
199 pci_channel_state_t state);
200 static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev);
201 static void e1000_io_resume(struct pci_dev *pdev);
202
203 static struct pci_error_handlers e1000_err_handler = {
204 .error_detected = e1000_io_error_detected,
205 .slot_reset = e1000_io_slot_reset,
206 .resume = e1000_io_resume,
207 };
208
209 static struct pci_driver e1000_driver = {
210 .name = e1000_driver_name,
211 .id_table = e1000_pci_tbl,
212 .probe = e1000_probe,
213 .remove = __devexit_p(e1000_remove),
214 /* Power Managment Hooks */
215 .suspend = e1000_suspend,
216 #ifdef CONFIG_PM
217 .resume = e1000_resume,
218 #endif
219 .shutdown = e1000_shutdown,
220 .err_handler = &e1000_err_handler
221 };
222
223 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
224 MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
225 MODULE_LICENSE("GPL");
226 MODULE_VERSION(DRV_VERSION);
227
228 static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
229 module_param(debug, int, 0);
230 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
231
232 /**
233 * e1000_init_module - Driver Registration Routine
234 *
235 * e1000_init_module is the first routine called when the driver is
236 * loaded. All it does is register with the PCI subsystem.
237 **/
238
239 static int __init
240 e1000_init_module(void)
241 {
242 int ret;
243 printk(KERN_INFO "%s - version %s\n",
244 e1000_driver_string, e1000_driver_version);
245
246 printk(KERN_INFO "%s\n", e1000_copyright);
247
248 ret = pci_module_init(&e1000_driver);
249
250 return ret;
251 }
252
253 module_init(e1000_init_module);
254
255 /**
256 * e1000_exit_module - Driver Exit Cleanup Routine
257 *
258 * e1000_exit_module is called just before the driver is removed
259 * from memory.
260 **/
261
262 static void __exit
263 e1000_exit_module(void)
264 {
265 pci_unregister_driver(&e1000_driver);
266 }
267
268 module_exit(e1000_exit_module);
269
270 static int e1000_request_irq(struct e1000_adapter *adapter)
271 {
272 struct net_device *netdev = adapter->netdev;
273 int flags, err = 0;
274
275 flags = SA_SHIRQ | SA_SAMPLE_RANDOM;
276 #ifdef CONFIG_PCI_MSI
277 if (adapter->hw.mac_type > e1000_82547_rev_2) {
278 adapter->have_msi = TRUE;
279 if ((err = pci_enable_msi(adapter->pdev))) {
280 DPRINTK(PROBE, ERR,
281 "Unable to allocate MSI interrupt Error: %d\n", err);
282 adapter->have_msi = FALSE;
283 }
284 }
285 if (adapter->have_msi)
286 flags &= ~SA_SHIRQ;
287 #endif
288 if ((err = request_irq(adapter->pdev->irq, &e1000_intr, flags,
289 netdev->name, netdev)))
290 DPRINTK(PROBE, ERR,
291 "Unable to allocate interrupt Error: %d\n", err);
292
293 return err;
294 }
295
296 static void e1000_free_irq(struct e1000_adapter *adapter)
297 {
298 struct net_device *netdev = adapter->netdev;
299
300 free_irq(adapter->pdev->irq, netdev);
301
302 #ifdef CONFIG_PCI_MSI
303 if (adapter->have_msi)
304 pci_disable_msi(adapter->pdev);
305 #endif
306 }
307
308 /**
309 * e1000_irq_disable - Mask off interrupt generation on the NIC
310 * @adapter: board private structure
311 **/
312
313 static void
314 e1000_irq_disable(struct e1000_adapter *adapter)
315 {
316 atomic_inc(&adapter->irq_sem);
317 E1000_WRITE_REG(&adapter->hw, IMC, ~0);
318 E1000_WRITE_FLUSH(&adapter->hw);
319 synchronize_irq(adapter->pdev->irq);
320 }
321
322 /**
323 * e1000_irq_enable - Enable default interrupt generation settings
324 * @adapter: board private structure
325 **/
326
327 static void
328 e1000_irq_enable(struct e1000_adapter *adapter)
329 {
330 if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
331 E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
332 E1000_WRITE_FLUSH(&adapter->hw);
333 }
334 }
335
336 static void
337 e1000_update_mng_vlan(struct e1000_adapter *adapter)
338 {
339 struct net_device *netdev = adapter->netdev;
340 uint16_t vid = adapter->hw.mng_cookie.vlan_id;
341 uint16_t old_vid = adapter->mng_vlan_id;
342 if (adapter->vlgrp) {
343 if (!adapter->vlgrp->vlan_devices[vid]) {
344 if (adapter->hw.mng_cookie.status &
345 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
346 e1000_vlan_rx_add_vid(netdev, vid);
347 adapter->mng_vlan_id = vid;
348 } else
349 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
350
351 if ((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
352 (vid != old_vid) &&
353 !adapter->vlgrp->vlan_devices[old_vid])
354 e1000_vlan_rx_kill_vid(netdev, old_vid);
355 } else
356 adapter->mng_vlan_id = vid;
357 }
358 }
359
360 /**
361 * e1000_release_hw_control - release control of the h/w to f/w
362 * @adapter: address of board private structure
363 *
364 * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
365 * For ASF and Pass Through versions of f/w this means that the
366 * driver is no longer loaded. For AMT version (only with 82573) i
367 * of the f/w this means that the netowrk i/f is closed.
368 *
369 **/
370
371 static void
372 e1000_release_hw_control(struct e1000_adapter *adapter)
373 {
374 uint32_t ctrl_ext;
375 uint32_t swsm;
376 uint32_t extcnf;
377
378 /* Let firmware taken over control of h/w */
379 switch (adapter->hw.mac_type) {
380 case e1000_82571:
381 case e1000_82572:
382 case e1000_80003es2lan:
383 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
384 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
385 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
386 break;
387 case e1000_82573:
388 swsm = E1000_READ_REG(&adapter->hw, SWSM);
389 E1000_WRITE_REG(&adapter->hw, SWSM,
390 swsm & ~E1000_SWSM_DRV_LOAD);
391 case e1000_ich8lan:
392 extcnf = E1000_READ_REG(&adapter->hw, CTRL_EXT);
393 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
394 extcnf & ~E1000_CTRL_EXT_DRV_LOAD);
395 break;
396 default:
397 break;
398 }
399 }
400
401 /**
402 * e1000_get_hw_control - get control of the h/w from f/w
403 * @adapter: address of board private structure
404 *
405 * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
406 * For ASF and Pass Through versions of f/w this means that
407 * the driver is loaded. For AMT version (only with 82573)
408 * of the f/w this means that the netowrk i/f is open.
409 *
410 **/
411
412 static void
413 e1000_get_hw_control(struct e1000_adapter *adapter)
414 {
415 uint32_t ctrl_ext;
416 uint32_t swsm;
417 uint32_t extcnf;
418 /* Let firmware know the driver has taken over */
419 switch (adapter->hw.mac_type) {
420 case e1000_82571:
421 case e1000_82572:
422 case e1000_80003es2lan:
423 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
424 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
425 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
426 break;
427 case e1000_82573:
428 swsm = E1000_READ_REG(&adapter->hw, SWSM);
429 E1000_WRITE_REG(&adapter->hw, SWSM,
430 swsm | E1000_SWSM_DRV_LOAD);
431 break;
432 case e1000_ich8lan:
433 extcnf = E1000_READ_REG(&adapter->hw, EXTCNF_CTRL);
434 E1000_WRITE_REG(&adapter->hw, EXTCNF_CTRL,
435 extcnf | E1000_EXTCNF_CTRL_SWFLAG);
436 break;
437 default:
438 break;
439 }
440 }
441
442 int
443 e1000_up(struct e1000_adapter *adapter)
444 {
445 struct net_device *netdev = adapter->netdev;
446 int i;
447
448 /* hardware has been reset, we need to reload some things */
449
450 e1000_set_multi(netdev);
451
452 e1000_restore_vlan(adapter);
453
454 e1000_configure_tx(adapter);
455 e1000_setup_rctl(adapter);
456 e1000_configure_rx(adapter);
457 /* call E1000_DESC_UNUSED which always leaves
458 * at least 1 descriptor unused to make sure
459 * next_to_use != next_to_clean */
460 for (i = 0; i < adapter->num_rx_queues; i++) {
461 struct e1000_rx_ring *ring = &adapter->rx_ring[i];
462 adapter->alloc_rx_buf(adapter, ring,
463 E1000_DESC_UNUSED(ring));
464 }
465
466 adapter->tx_queue_len = netdev->tx_queue_len;
467
468 mod_timer(&adapter->watchdog_timer, jiffies);
469
470 #ifdef CONFIG_E1000_NAPI
471 netif_poll_enable(netdev);
472 #endif
473 e1000_irq_enable(adapter);
474
475 return 0;
476 }
477
478 /**
479 * e1000_power_up_phy - restore link in case the phy was powered down
480 * @adapter: address of board private structure
481 *
482 * The phy may be powered down to save power and turn off link when the
483 * driver is unloaded and wake on lan is not enabled (among others)
484 * *** this routine MUST be followed by a call to e1000_reset ***
485 *
486 **/
487
488 static void e1000_power_up_phy(struct e1000_adapter *adapter)
489 {
490 uint16_t mii_reg = 0;
491
492 /* Just clear the power down bit to wake the phy back up */
493 if (adapter->hw.media_type == e1000_media_type_copper) {
494 /* according to the manual, the phy will retain its
495 * settings across a power-down/up cycle */
496 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
497 mii_reg &= ~MII_CR_POWER_DOWN;
498 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
499 }
500 }
501
502 static void e1000_power_down_phy(struct e1000_adapter *adapter)
503 {
504 boolean_t mng_mode_enabled = (adapter->hw.mac_type >= e1000_82571) &&
505 e1000_check_mng_mode(&adapter->hw);
506 /* Power down the PHY so no link is implied when interface is down
507 * The PHY cannot be powered down if any of the following is TRUE
508 * (a) WoL is enabled
509 * (b) AMT is active
510 * (c) SoL/IDER session is active */
511 if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
512 adapter->hw.mac_type != e1000_ich8lan &&
513 adapter->hw.media_type == e1000_media_type_copper &&
514 !(E1000_READ_REG(&adapter->hw, MANC) & E1000_MANC_SMBUS_EN) &&
515 !mng_mode_enabled &&
516 !e1000_check_phy_reset_block(&adapter->hw)) {
517 uint16_t mii_reg = 0;
518 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
519 mii_reg |= MII_CR_POWER_DOWN;
520 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
521 mdelay(1);
522 }
523 }
524
525 void
526 e1000_down(struct e1000_adapter *adapter)
527 {
528 struct net_device *netdev = adapter->netdev;
529
530 e1000_irq_disable(adapter);
531
532 del_timer_sync(&adapter->tx_fifo_stall_timer);
533 del_timer_sync(&adapter->watchdog_timer);
534 del_timer_sync(&adapter->phy_info_timer);
535
536 #ifdef CONFIG_E1000_NAPI
537 netif_poll_disable(netdev);
538 #endif
539 netdev->tx_queue_len = adapter->tx_queue_len;
540 adapter->link_speed = 0;
541 adapter->link_duplex = 0;
542 netif_carrier_off(netdev);
543 netif_stop_queue(netdev);
544
545 e1000_reset(adapter);
546 e1000_clean_all_tx_rings(adapter);
547 e1000_clean_all_rx_rings(adapter);
548 }
549
550 void
551 e1000_reinit_locked(struct e1000_adapter *adapter)
552 {
553 WARN_ON(in_interrupt());
554 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
555 msleep(1);
556 e1000_down(adapter);
557 e1000_up(adapter);
558 clear_bit(__E1000_RESETTING, &adapter->flags);
559 }
560
561 void
562 e1000_reset(struct e1000_adapter *adapter)
563 {
564 uint32_t pba, manc;
565 uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
566
567 /* Repartition Pba for greater than 9k mtu
568 * To take effect CTRL.RST is required.
569 */
570
571 switch (adapter->hw.mac_type) {
572 case e1000_82547:
573 case e1000_82547_rev_2:
574 pba = E1000_PBA_30K;
575 break;
576 case e1000_82571:
577 case e1000_82572:
578 case e1000_80003es2lan:
579 pba = E1000_PBA_38K;
580 break;
581 case e1000_82573:
582 pba = E1000_PBA_12K;
583 break;
584 case e1000_ich8lan:
585 pba = E1000_PBA_8K;
586 break;
587 default:
588 pba = E1000_PBA_48K;
589 break;
590 }
591
592 if ((adapter->hw.mac_type != e1000_82573) &&
593 (adapter->netdev->mtu > E1000_RXBUFFER_8192))
594 pba -= 8; /* allocate more FIFO for Tx */
595
596
597 if (adapter->hw.mac_type == e1000_82547) {
598 adapter->tx_fifo_head = 0;
599 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
600 adapter->tx_fifo_size =
601 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
602 atomic_set(&adapter->tx_fifo_stall, 0);
603 }
604
605 E1000_WRITE_REG(&adapter->hw, PBA, pba);
606
607 /* flow control settings */
608 /* Set the FC high water mark to 90% of the FIFO size.
609 * Required to clear last 3 LSB */
610 fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
611 /* We can't use 90% on small FIFOs because the remainder
612 * would be less than 1 full frame. In this case, we size
613 * it to allow at least a full frame above the high water
614 * mark. */
615 if (pba < E1000_PBA_16K)
616 fc_high_water_mark = (pba * 1024) - 1600;
617
618 adapter->hw.fc_high_water = fc_high_water_mark;
619 adapter->hw.fc_low_water = fc_high_water_mark - 8;
620 if (adapter->hw.mac_type == e1000_80003es2lan)
621 adapter->hw.fc_pause_time = 0xFFFF;
622 else
623 adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
624 adapter->hw.fc_send_xon = 1;
625 adapter->hw.fc = adapter->hw.original_fc;
626
627 /* Allow time for pending master requests to run */
628 e1000_reset_hw(&adapter->hw);
629 if (adapter->hw.mac_type >= e1000_82544)
630 E1000_WRITE_REG(&adapter->hw, WUC, 0);
631 if (e1000_init_hw(&adapter->hw))
632 DPRINTK(PROBE, ERR, "Hardware Error\n");
633 e1000_update_mng_vlan(adapter);
634 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
635 E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
636
637 e1000_reset_adaptive(&adapter->hw);
638 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
639
640 if (!adapter->smart_power_down &&
641 (adapter->hw.mac_type == e1000_82571 ||
642 adapter->hw.mac_type == e1000_82572)) {
643 uint16_t phy_data = 0;
644 /* speed up time to link by disabling smart power down, ignore
645 * the return value of this function because there is nothing
646 * different we would do if it failed */
647 e1000_read_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
648 &phy_data);
649 phy_data &= ~IGP02E1000_PM_SPD;
650 e1000_write_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
651 phy_data);
652 }
653
654 if (adapter->hw.mac_type < e1000_ich8lan)
655 /* FIXME: this code is duplicate and wrong for PCI Express */
656 if (adapter->en_mng_pt) {
657 manc = E1000_READ_REG(&adapter->hw, MANC);
658 manc |= (E1000_MANC_ARP_EN | E1000_MANC_EN_MNG2HOST);
659 E1000_WRITE_REG(&adapter->hw, MANC, manc);
660 }
661 }
662
663 /**
664 * e1000_probe - Device Initialization Routine
665 * @pdev: PCI device information struct
666 * @ent: entry in e1000_pci_tbl
667 *
668 * Returns 0 on success, negative on failure
669 *
670 * e1000_probe initializes an adapter identified by a pci_dev structure.
671 * The OS initialization, configuring of the adapter private structure,
672 * and a hardware reset occur.
673 **/
674
675 static int __devinit
676 e1000_probe(struct pci_dev *pdev,
677 const struct pci_device_id *ent)
678 {
679 struct net_device *netdev;
680 struct e1000_adapter *adapter;
681 unsigned long mmio_start, mmio_len;
682 unsigned long flash_start, flash_len;
683
684 static int cards_found = 0;
685 static int e1000_ksp3_port_a = 0; /* global ksp3 port a indication */
686 int i, err, pci_using_dac;
687 uint16_t eeprom_data;
688 uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
689 if ((err = pci_enable_device(pdev)))
690 return err;
691
692 if (!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK)) &&
693 !(err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))) {
694 pci_using_dac = 1;
695 } else {
696 if ((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK)) &&
697 (err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))) {
698 E1000_ERR("No usable DMA configuration, aborting\n");
699 return err;
700 }
701 pci_using_dac = 0;
702 }
703
704 if ((err = pci_request_regions(pdev, e1000_driver_name)))
705 return err;
706
707 pci_set_master(pdev);
708
709 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
710 if (!netdev) {
711 err = -ENOMEM;
712 goto err_alloc_etherdev;
713 }
714
715 SET_MODULE_OWNER(netdev);
716 SET_NETDEV_DEV(netdev, &pdev->dev);
717
718 pci_set_drvdata(pdev, netdev);
719 adapter = netdev_priv(netdev);
720 adapter->netdev = netdev;
721 adapter->pdev = pdev;
722 adapter->hw.back = adapter;
723 adapter->msg_enable = (1 << debug) - 1;
724
725 mmio_start = pci_resource_start(pdev, BAR_0);
726 mmio_len = pci_resource_len(pdev, BAR_0);
727
728 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
729 if (!adapter->hw.hw_addr) {
730 err = -EIO;
731 goto err_ioremap;
732 }
733
734 for (i = BAR_1; i <= BAR_5; i++) {
735 if (pci_resource_len(pdev, i) == 0)
736 continue;
737 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
738 adapter->hw.io_base = pci_resource_start(pdev, i);
739 break;
740 }
741 }
742
743 netdev->open = &e1000_open;
744 netdev->stop = &e1000_close;
745 netdev->hard_start_xmit = &e1000_xmit_frame;
746 netdev->get_stats = &e1000_get_stats;
747 netdev->set_multicast_list = &e1000_set_multi;
748 netdev->set_mac_address = &e1000_set_mac;
749 netdev->change_mtu = &e1000_change_mtu;
750 netdev->do_ioctl = &e1000_ioctl;
751 e1000_set_ethtool_ops(netdev);
752 netdev->tx_timeout = &e1000_tx_timeout;
753 netdev->watchdog_timeo = 5 * HZ;
754 #ifdef CONFIG_E1000_NAPI
755 netdev->poll = &e1000_clean;
756 netdev->weight = 64;
757 #endif
758 netdev->vlan_rx_register = e1000_vlan_rx_register;
759 netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
760 netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
761 #ifdef CONFIG_NET_POLL_CONTROLLER
762 netdev->poll_controller = e1000_netpoll;
763 #endif
764 strcpy(netdev->name, pci_name(pdev));
765
766 netdev->mem_start = mmio_start;
767 netdev->mem_end = mmio_start + mmio_len;
768 netdev->base_addr = adapter->hw.io_base;
769
770 adapter->bd_number = cards_found;
771
772 /* setup the private structure */
773
774 if ((err = e1000_sw_init(adapter)))
775 goto err_sw_init;
776
777 /* Flash BAR mapping must happen after e1000_sw_init
778 * because it depends on mac_type */
779 if ((adapter->hw.mac_type == e1000_ich8lan) &&
780 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
781 flash_start = pci_resource_start(pdev, 1);
782 flash_len = pci_resource_len(pdev, 1);
783 adapter->hw.flash_address = ioremap(flash_start, flash_len);
784 if (!adapter->hw.flash_address) {
785 err = -EIO;
786 goto err_flashmap;
787 }
788 }
789
790 if ((err = e1000_check_phy_reset_block(&adapter->hw)))
791 DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
792
793 /* if ksp3, indicate if it's port a being setup */
794 if (pdev->device == E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3 &&
795 e1000_ksp3_port_a == 0)
796 adapter->ksp3_port_a = 1;
797 e1000_ksp3_port_a++;
798 /* Reset for multiple KP3 adapters */
799 if (e1000_ksp3_port_a == 4)
800 e1000_ksp3_port_a = 0;
801
802 if (adapter->hw.mac_type >= e1000_82543) {
803 netdev->features = NETIF_F_SG |
804 NETIF_F_HW_CSUM |
805 NETIF_F_HW_VLAN_TX |
806 NETIF_F_HW_VLAN_RX |
807 NETIF_F_HW_VLAN_FILTER;
808 if (adapter->hw.mac_type == e1000_ich8lan)
809 netdev->features &= ~NETIF_F_HW_VLAN_FILTER;
810 }
811
812 #ifdef NETIF_F_TSO
813 if ((adapter->hw.mac_type >= e1000_82544) &&
814 (adapter->hw.mac_type != e1000_82547))
815 netdev->features |= NETIF_F_TSO;
816
817 #ifdef NETIF_F_TSO_IPV6
818 if (adapter->hw.mac_type > e1000_82547_rev_2)
819 netdev->features |= NETIF_F_TSO_IPV6;
820 #endif
821 #endif
822 if (pci_using_dac)
823 netdev->features |= NETIF_F_HIGHDMA;
824
825 netdev->features |= NETIF_F_LLTX;
826
827 adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
828
829 /* initialize eeprom parameters */
830
831 if (e1000_init_eeprom_params(&adapter->hw)) {
832 E1000_ERR("EEPROM initialization failed\n");
833 return -EIO;
834 }
835
836 /* before reading the EEPROM, reset the controller to
837 * put the device in a known good starting state */
838
839 e1000_reset_hw(&adapter->hw);
840
841 /* make sure the EEPROM is good */
842
843 if (e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
844 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
845 err = -EIO;
846 goto err_eeprom;
847 }
848
849 /* copy the MAC address out of the EEPROM */
850
851 if (e1000_read_mac_addr(&adapter->hw))
852 DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
853 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
854 memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
855
856 if (!is_valid_ether_addr(netdev->perm_addr)) {
857 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
858 err = -EIO;
859 goto err_eeprom;
860 }
861
862 e1000_read_part_num(&adapter->hw, &(adapter->part_num));
863
864 e1000_get_bus_info(&adapter->hw);
865
866 init_timer(&adapter->tx_fifo_stall_timer);
867 adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
868 adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
869
870 init_timer(&adapter->watchdog_timer);
871 adapter->watchdog_timer.function = &e1000_watchdog;
872 adapter->watchdog_timer.data = (unsigned long) adapter;
873
874 init_timer(&adapter->phy_info_timer);
875 adapter->phy_info_timer.function = &e1000_update_phy_info;
876 adapter->phy_info_timer.data = (unsigned long) adapter;
877
878 INIT_WORK(&adapter->reset_task,
879 (void (*)(void *))e1000_reset_task, netdev);
880
881 /* we're going to reset, so assume we have no link for now */
882
883 netif_carrier_off(netdev);
884 netif_stop_queue(netdev);
885
886 e1000_check_options(adapter);
887
888 /* Initial Wake on LAN setting
889 * If APM wake is enabled in the EEPROM,
890 * enable the ACPI Magic Packet filter
891 */
892
893 switch (adapter->hw.mac_type) {
894 case e1000_82542_rev2_0:
895 case e1000_82542_rev2_1:
896 case e1000_82543:
897 break;
898 case e1000_82544:
899 e1000_read_eeprom(&adapter->hw,
900 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
901 eeprom_apme_mask = E1000_EEPROM_82544_APM;
902 break;
903 case e1000_ich8lan:
904 e1000_read_eeprom(&adapter->hw,
905 EEPROM_INIT_CONTROL1_REG, 1, &eeprom_data);
906 eeprom_apme_mask = E1000_EEPROM_ICH8_APME;
907 break;
908 case e1000_82546:
909 case e1000_82546_rev_3:
910 case e1000_82571:
911 case e1000_80003es2lan:
912 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1){
913 e1000_read_eeprom(&adapter->hw,
914 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
915 break;
916 }
917 /* Fall Through */
918 default:
919 e1000_read_eeprom(&adapter->hw,
920 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
921 break;
922 }
923 if (eeprom_data & eeprom_apme_mask)
924 adapter->wol |= E1000_WUFC_MAG;
925
926 /* print bus type/speed/width info */
927 {
928 struct e1000_hw *hw = &adapter->hw;
929 DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
930 ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
931 (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
932 ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
933 (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
934 (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
935 (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
936 (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
937 ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
938 (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
939 (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
940 "32-bit"));
941 }
942
943 for (i = 0; i < 6; i++)
944 printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
945
946 /* reset the hardware with the new settings */
947 e1000_reset(adapter);
948
949 /* If the controller is 82573 and f/w is AMT, do not set
950 * DRV_LOAD until the interface is up. For all other cases,
951 * let the f/w know that the h/w is now under the control
952 * of the driver. */
953 if (adapter->hw.mac_type != e1000_82573 ||
954 !e1000_check_mng_mode(&adapter->hw))
955 e1000_get_hw_control(adapter);
956
957 strcpy(netdev->name, "eth%d");
958 if ((err = register_netdev(netdev)))
959 goto err_register;
960
961 DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
962
963 cards_found++;
964 return 0;
965
966 err_register:
967 if (adapter->hw.flash_address)
968 iounmap(adapter->hw.flash_address);
969 err_flashmap:
970 err_sw_init:
971 err_eeprom:
972 iounmap(adapter->hw.hw_addr);
973 err_ioremap:
974 free_netdev(netdev);
975 err_alloc_etherdev:
976 pci_release_regions(pdev);
977 return err;
978 }
979
980 /**
981 * e1000_remove - Device Removal Routine
982 * @pdev: PCI device information struct
983 *
984 * e1000_remove is called by the PCI subsystem to alert the driver
985 * that it should release a PCI device. The could be caused by a
986 * Hot-Plug event, or because the driver is going to be removed from
987 * memory.
988 **/
989
990 static void __devexit
991 e1000_remove(struct pci_dev *pdev)
992 {
993 struct net_device *netdev = pci_get_drvdata(pdev);
994 struct e1000_adapter *adapter = netdev_priv(netdev);
995 uint32_t manc;
996 #ifdef CONFIG_E1000_NAPI
997 int i;
998 #endif
999
1000 flush_scheduled_work();
1001
1002 if (adapter->hw.mac_type >= e1000_82540 &&
1003 adapter->hw.mac_type != e1000_ich8lan &&
1004 adapter->hw.media_type == e1000_media_type_copper) {
1005 manc = E1000_READ_REG(&adapter->hw, MANC);
1006 if (manc & E1000_MANC_SMBUS_EN) {
1007 manc |= E1000_MANC_ARP_EN;
1008 E1000_WRITE_REG(&adapter->hw, MANC, manc);
1009 }
1010 }
1011
1012 /* Release control of h/w to f/w. If f/w is AMT enabled, this
1013 * would have already happened in close and is redundant. */
1014 e1000_release_hw_control(adapter);
1015
1016 unregister_netdev(netdev);
1017 #ifdef CONFIG_E1000_NAPI
1018 for (i = 0; i < adapter->num_rx_queues; i++)
1019 dev_put(&adapter->polling_netdev[i]);
1020 #endif
1021
1022 if (!e1000_check_phy_reset_block(&adapter->hw))
1023 e1000_phy_hw_reset(&adapter->hw);
1024
1025 kfree(adapter->tx_ring);
1026 kfree(adapter->rx_ring);
1027 #ifdef CONFIG_E1000_NAPI
1028 kfree(adapter->polling_netdev);
1029 #endif
1030
1031 iounmap(adapter->hw.hw_addr);
1032 if (adapter->hw.flash_address)
1033 iounmap(adapter->hw.flash_address);
1034 pci_release_regions(pdev);
1035
1036 free_netdev(netdev);
1037
1038 pci_disable_device(pdev);
1039 }
1040
1041 /**
1042 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
1043 * @adapter: board private structure to initialize
1044 *
1045 * e1000_sw_init initializes the Adapter private data structure.
1046 * Fields are initialized based on PCI device information and
1047 * OS network device settings (MTU size).
1048 **/
1049
1050 static int __devinit
1051 e1000_sw_init(struct e1000_adapter *adapter)
1052 {
1053 struct e1000_hw *hw = &adapter->hw;
1054 struct net_device *netdev = adapter->netdev;
1055 struct pci_dev *pdev = adapter->pdev;
1056 #ifdef CONFIG_E1000_NAPI
1057 int i;
1058 #endif
1059
1060 /* PCI config space info */
1061
1062 hw->vendor_id = pdev->vendor;
1063 hw->device_id = pdev->device;
1064 hw->subsystem_vendor_id = pdev->subsystem_vendor;
1065 hw->subsystem_id = pdev->subsystem_device;
1066
1067 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
1068
1069 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
1070
1071 adapter->rx_buffer_len = MAXIMUM_ETHERNET_FRAME_SIZE;
1072 adapter->rx_ps_bsize0 = E1000_RXBUFFER_128;
1073 hw->max_frame_size = netdev->mtu +
1074 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
1075 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
1076
1077 /* identify the MAC */
1078
1079 if (e1000_set_mac_type(hw)) {
1080 DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
1081 return -EIO;
1082 }
1083
1084 switch (hw->mac_type) {
1085 default:
1086 break;
1087 case e1000_82541:
1088 case e1000_82547:
1089 case e1000_82541_rev_2:
1090 case e1000_82547_rev_2:
1091 hw->phy_init_script = 1;
1092 break;
1093 }
1094
1095 e1000_set_media_type(hw);
1096
1097 hw->wait_autoneg_complete = FALSE;
1098 hw->tbi_compatibility_en = TRUE;
1099 hw->adaptive_ifs = TRUE;
1100
1101 /* Copper options */
1102
1103 if (hw->media_type == e1000_media_type_copper) {
1104 hw->mdix = AUTO_ALL_MODES;
1105 hw->disable_polarity_correction = FALSE;
1106 hw->master_slave = E1000_MASTER_SLAVE;
1107 }
1108
1109 adapter->num_tx_queues = 1;
1110 adapter->num_rx_queues = 1;
1111
1112 if (e1000_alloc_queues(adapter)) {
1113 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
1114 return -ENOMEM;
1115 }
1116
1117 #ifdef CONFIG_E1000_NAPI
1118 for (i = 0; i < adapter->num_rx_queues; i++) {
1119 adapter->polling_netdev[i].priv = adapter;
1120 adapter->polling_netdev[i].poll = &e1000_clean;
1121 adapter->polling_netdev[i].weight = 64;
1122 dev_hold(&adapter->polling_netdev[i]);
1123 set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
1124 }
1125 spin_lock_init(&adapter->tx_queue_lock);
1126 #endif
1127
1128 atomic_set(&adapter->irq_sem, 1);
1129 spin_lock_init(&adapter->stats_lock);
1130
1131 return 0;
1132 }
1133
1134 /**
1135 * e1000_alloc_queues - Allocate memory for all rings
1136 * @adapter: board private structure to initialize
1137 *
1138 * We allocate one ring per queue at run-time since we don't know the
1139 * number of queues at compile-time. The polling_netdev array is
1140 * intended for Multiqueue, but should work fine with a single queue.
1141 **/
1142
1143 static int __devinit
1144 e1000_alloc_queues(struct e1000_adapter *adapter)
1145 {
1146 int size;
1147
1148 size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues;
1149 adapter->tx_ring = kmalloc(size, GFP_KERNEL);
1150 if (!adapter->tx_ring)
1151 return -ENOMEM;
1152 memset(adapter->tx_ring, 0, size);
1153
1154 size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues;
1155 adapter->rx_ring = kmalloc(size, GFP_KERNEL);
1156 if (!adapter->rx_ring) {
1157 kfree(adapter->tx_ring);
1158 return -ENOMEM;
1159 }
1160 memset(adapter->rx_ring, 0, size);
1161
1162 #ifdef CONFIG_E1000_NAPI
1163 size = sizeof(struct net_device) * adapter->num_rx_queues;
1164 adapter->polling_netdev = kmalloc(size, GFP_KERNEL);
1165 if (!adapter->polling_netdev) {
1166 kfree(adapter->tx_ring);
1167 kfree(adapter->rx_ring);
1168 return -ENOMEM;
1169 }
1170 memset(adapter->polling_netdev, 0, size);
1171 #endif
1172
1173 return E1000_SUCCESS;
1174 }
1175
1176 /**
1177 * e1000_open - Called when a network interface is made active
1178 * @netdev: network interface device structure
1179 *
1180 * Returns 0 on success, negative value on failure
1181 *
1182 * The open entry point is called when a network interface is made
1183 * active by the system (IFF_UP). At this point all resources needed
1184 * for transmit and receive operations are allocated, the interrupt
1185 * handler is registered with the OS, the watchdog timer is started,
1186 * and the stack is notified that the interface is ready.
1187 **/
1188
1189 static int
1190 e1000_open(struct net_device *netdev)
1191 {
1192 struct e1000_adapter *adapter = netdev_priv(netdev);
1193 int err;
1194
1195 /* disallow open during test */
1196 if (test_bit(__E1000_DRIVER_TESTING, &adapter->flags))
1197 return -EBUSY;
1198
1199 /* allocate transmit descriptors */
1200
1201 if ((err = e1000_setup_all_tx_resources(adapter)))
1202 goto err_setup_tx;
1203
1204 /* allocate receive descriptors */
1205
1206 if ((err = e1000_setup_all_rx_resources(adapter)))
1207 goto err_setup_rx;
1208
1209 err = e1000_request_irq(adapter);
1210 if (err)
1211 goto err_up;
1212
1213 e1000_power_up_phy(adapter);
1214
1215 if ((err = e1000_up(adapter)))
1216 goto err_up;
1217 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
1218 if ((adapter->hw.mng_cookie.status &
1219 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1220 e1000_update_mng_vlan(adapter);
1221 }
1222
1223 /* If AMT is enabled, let the firmware know that the network
1224 * interface is now open */
1225 if (adapter->hw.mac_type == e1000_82573 &&
1226 e1000_check_mng_mode(&adapter->hw))
1227 e1000_get_hw_control(adapter);
1228
1229 return E1000_SUCCESS;
1230
1231 err_up:
1232 e1000_free_all_rx_resources(adapter);
1233 err_setup_rx:
1234 e1000_free_all_tx_resources(adapter);
1235 err_setup_tx:
1236 e1000_reset(adapter);
1237
1238 return err;
1239 }
1240
1241 /**
1242 * e1000_close - Disables a network interface
1243 * @netdev: network interface device structure
1244 *
1245 * Returns 0, this is not allowed to fail
1246 *
1247 * The close entry point is called when an interface is de-activated
1248 * by the OS. The hardware is still under the drivers control, but
1249 * needs to be disabled. A global MAC reset is issued to stop the
1250 * hardware, and all transmit and receive resources are freed.
1251 **/
1252
1253 static int
1254 e1000_close(struct net_device *netdev)
1255 {
1256 struct e1000_adapter *adapter = netdev_priv(netdev);
1257
1258 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1259 e1000_down(adapter);
1260 e1000_power_down_phy(adapter);
1261 e1000_free_irq(adapter);
1262
1263 e1000_free_all_tx_resources(adapter);
1264 e1000_free_all_rx_resources(adapter);
1265
1266 if ((adapter->hw.mng_cookie.status &
1267 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1268 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1269 }
1270
1271 /* If AMT is enabled, let the firmware know that the network
1272 * interface is now closed */
1273 if (adapter->hw.mac_type == e1000_82573 &&
1274 e1000_check_mng_mode(&adapter->hw))
1275 e1000_release_hw_control(adapter);
1276
1277 return 0;
1278 }
1279
1280 /**
1281 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1282 * @adapter: address of board private structure
1283 * @start: address of beginning of memory
1284 * @len: length of memory
1285 **/
1286 static boolean_t
1287 e1000_check_64k_bound(struct e1000_adapter *adapter,
1288 void *start, unsigned long len)
1289 {
1290 unsigned long begin = (unsigned long) start;
1291 unsigned long end = begin + len;
1292
1293 /* First rev 82545 and 82546 need to not allow any memory
1294 * write location to cross 64k boundary due to errata 23 */
1295 if (adapter->hw.mac_type == e1000_82545 ||
1296 adapter->hw.mac_type == e1000_82546) {
1297 return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
1298 }
1299
1300 return TRUE;
1301 }
1302
1303 /**
1304 * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1305 * @adapter: board private structure
1306 * @txdr: tx descriptor ring (for a specific queue) to setup
1307 *
1308 * Return 0 on success, negative on failure
1309 **/
1310
1311 static int
1312 e1000_setup_tx_resources(struct e1000_adapter *adapter,
1313 struct e1000_tx_ring *txdr)
1314 {
1315 struct pci_dev *pdev = adapter->pdev;
1316 int size;
1317
1318 size = sizeof(struct e1000_buffer) * txdr->count;
1319 txdr->buffer_info = vmalloc(size);
1320 if (!txdr->buffer_info) {
1321 DPRINTK(PROBE, ERR,
1322 "Unable to allocate memory for the transmit descriptor ring\n");
1323 return -ENOMEM;
1324 }
1325 memset(txdr->buffer_info, 0, size);
1326
1327 /* round up to nearest 4K */
1328
1329 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
1330 E1000_ROUNDUP(txdr->size, 4096);
1331
1332 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
1333 if (!txdr->desc) {
1334 setup_tx_desc_die:
1335 vfree(txdr->buffer_info);
1336 DPRINTK(PROBE, ERR,
1337 "Unable to allocate memory for the transmit descriptor ring\n");
1338 return -ENOMEM;
1339 }
1340
1341 /* Fix for errata 23, can't cross 64kB boundary */
1342 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1343 void *olddesc = txdr->desc;
1344 dma_addr_t olddma = txdr->dma;
1345 DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
1346 "at %p\n", txdr->size, txdr->desc);
1347 /* Try again, without freeing the previous */
1348 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
1349 /* Failed allocation, critical failure */
1350 if (!txdr->desc) {
1351 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1352 goto setup_tx_desc_die;
1353 }
1354
1355 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1356 /* give up */
1357 pci_free_consistent(pdev, txdr->size, txdr->desc,
1358 txdr->dma);
1359 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1360 DPRINTK(PROBE, ERR,
1361 "Unable to allocate aligned memory "
1362 "for the transmit descriptor ring\n");
1363 vfree(txdr->buffer_info);
1364 return -ENOMEM;
1365 } else {
1366 /* Free old allocation, new allocation was successful */
1367 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1368 }
1369 }
1370 memset(txdr->desc, 0, txdr->size);
1371
1372 txdr->next_to_use = 0;
1373 txdr->next_to_clean = 0;
1374 spin_lock_init(&txdr->tx_lock);
1375
1376 return 0;
1377 }
1378
1379 /**
1380 * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1381 * (Descriptors) for all queues
1382 * @adapter: board private structure
1383 *
1384 * If this function returns with an error, then it's possible one or
1385 * more of the rings is populated (while the rest are not). It is the
1386 * callers duty to clean those orphaned rings.
1387 *
1388 * Return 0 on success, negative on failure
1389 **/
1390
1391 int
1392 e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
1393 {
1394 int i, err = 0;
1395
1396 for (i = 0; i < adapter->num_tx_queues; i++) {
1397 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1398 if (err) {
1399 DPRINTK(PROBE, ERR,
1400 "Allocation for Tx Queue %u failed\n", i);
1401 break;
1402 }
1403 }
1404
1405 return err;
1406 }
1407
1408 /**
1409 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1410 * @adapter: board private structure
1411 *
1412 * Configure the Tx unit of the MAC after a reset.
1413 **/
1414
1415 static void
1416 e1000_configure_tx(struct e1000_adapter *adapter)
1417 {
1418 uint64_t tdba;
1419 struct e1000_hw *hw = &adapter->hw;
1420 uint32_t tdlen, tctl, tipg, tarc;
1421 uint32_t ipgr1, ipgr2;
1422
1423 /* Setup the HW Tx Head and Tail descriptor pointers */
1424
1425 switch (adapter->num_tx_queues) {
1426 case 1:
1427 default:
1428 tdba = adapter->tx_ring[0].dma;
1429 tdlen = adapter->tx_ring[0].count *
1430 sizeof(struct e1000_tx_desc);
1431 E1000_WRITE_REG(hw, TDLEN, tdlen);
1432 E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
1433 E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
1434 E1000_WRITE_REG(hw, TDT, 0);
1435 E1000_WRITE_REG(hw, TDH, 0);
1436 adapter->tx_ring[0].tdh = E1000_TDH;
1437 adapter->tx_ring[0].tdt = E1000_TDT;
1438 break;
1439 }
1440
1441 /* Set the default values for the Tx Inter Packet Gap timer */
1442
1443 if (hw->media_type == e1000_media_type_fiber ||
1444 hw->media_type == e1000_media_type_internal_serdes)
1445 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1446 else
1447 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1448
1449 switch (hw->mac_type) {
1450 case e1000_82542_rev2_0:
1451 case e1000_82542_rev2_1:
1452 tipg = DEFAULT_82542_TIPG_IPGT;
1453 ipgr1 = DEFAULT_82542_TIPG_IPGR1;
1454 ipgr2 = DEFAULT_82542_TIPG_IPGR2;
1455 break;
1456 case e1000_80003es2lan:
1457 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1458 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2;
1459 break;
1460 default:
1461 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1462 ipgr2 = DEFAULT_82543_TIPG_IPGR2;
1463 break;
1464 }
1465 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
1466 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
1467 E1000_WRITE_REG(hw, TIPG, tipg);
1468
1469 /* Set the Tx Interrupt Delay register */
1470
1471 E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
1472 if (hw->mac_type >= e1000_82540)
1473 E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
1474
1475 /* Program the Transmit Control Register */
1476
1477 tctl = E1000_READ_REG(hw, TCTL);
1478
1479 tctl &= ~E1000_TCTL_CT;
1480 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1481 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1482
1483 #ifdef DISABLE_MULR
1484 /* disable Multiple Reads for debugging */
1485 tctl &= ~E1000_TCTL_MULR;
1486 #endif
1487
1488 if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
1489 tarc = E1000_READ_REG(hw, TARC0);
1490 tarc |= ((1 << 25) | (1 << 21));
1491 E1000_WRITE_REG(hw, TARC0, tarc);
1492 tarc = E1000_READ_REG(hw, TARC1);
1493 tarc |= (1 << 25);
1494 if (tctl & E1000_TCTL_MULR)
1495 tarc &= ~(1 << 28);
1496 else
1497 tarc |= (1 << 28);
1498 E1000_WRITE_REG(hw, TARC1, tarc);
1499 } else if (hw->mac_type == e1000_80003es2lan) {
1500 tarc = E1000_READ_REG(hw, TARC0);
1501 tarc |= 1;
1502 if (hw->media_type == e1000_media_type_internal_serdes)
1503 tarc |= (1 << 20);
1504 E1000_WRITE_REG(hw, TARC0, tarc);
1505 tarc = E1000_READ_REG(hw, TARC1);
1506 tarc |= 1;
1507 E1000_WRITE_REG(hw, TARC1, tarc);
1508 }
1509
1510 e1000_config_collision_dist(hw);
1511
1512 /* Setup Transmit Descriptor Settings for eop descriptor */
1513 adapter->txd_cmd = E1000_TXD_CMD_IDE | E1000_TXD_CMD_EOP |
1514 E1000_TXD_CMD_IFCS;
1515
1516 if (hw->mac_type < e1000_82543)
1517 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1518 else
1519 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1520
1521 /* Cache if we're 82544 running in PCI-X because we'll
1522 * need this to apply a workaround later in the send path. */
1523 if (hw->mac_type == e1000_82544 &&
1524 hw->bus_type == e1000_bus_type_pcix)
1525 adapter->pcix_82544 = 1;
1526
1527 E1000_WRITE_REG(hw, TCTL, tctl);
1528
1529 }
1530
1531 /**
1532 * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1533 * @adapter: board private structure
1534 * @rxdr: rx descriptor ring (for a specific queue) to setup
1535 *
1536 * Returns 0 on success, negative on failure
1537 **/
1538
1539 static int
1540 e1000_setup_rx_resources(struct e1000_adapter *adapter,
1541 struct e1000_rx_ring *rxdr)
1542 {
1543 struct pci_dev *pdev = adapter->pdev;
1544 int size, desc_len;
1545
1546 size = sizeof(struct e1000_buffer) * rxdr->count;
1547 rxdr->buffer_info = vmalloc(size);
1548 if (!rxdr->buffer_info) {
1549 DPRINTK(PROBE, ERR,
1550 "Unable to allocate memory for the receive descriptor ring\n");
1551 return -ENOMEM;
1552 }
1553 memset(rxdr->buffer_info, 0, size);
1554
1555 size = sizeof(struct e1000_ps_page) * rxdr->count;
1556 rxdr->ps_page = kmalloc(size, GFP_KERNEL);
1557 if (!rxdr->ps_page) {
1558 vfree(rxdr->buffer_info);
1559 DPRINTK(PROBE, ERR,
1560 "Unable to allocate memory for the receive descriptor ring\n");
1561 return -ENOMEM;
1562 }
1563 memset(rxdr->ps_page, 0, size);
1564
1565 size = sizeof(struct e1000_ps_page_dma) * rxdr->count;
1566 rxdr->ps_page_dma = kmalloc(size, GFP_KERNEL);
1567 if (!rxdr->ps_page_dma) {
1568 vfree(rxdr->buffer_info);
1569 kfree(rxdr->ps_page);
1570 DPRINTK(PROBE, ERR,
1571 "Unable to allocate memory for the receive descriptor ring\n");
1572 return -ENOMEM;
1573 }
1574 memset(rxdr->ps_page_dma, 0, size);
1575
1576 if (adapter->hw.mac_type <= e1000_82547_rev_2)
1577 desc_len = sizeof(struct e1000_rx_desc);
1578 else
1579 desc_len = sizeof(union e1000_rx_desc_packet_split);
1580
1581 /* Round up to nearest 4K */
1582
1583 rxdr->size = rxdr->count * desc_len;
1584 E1000_ROUNDUP(rxdr->size, 4096);
1585
1586 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1587
1588 if (!rxdr->desc) {
1589 DPRINTK(PROBE, ERR,
1590 "Unable to allocate memory for the receive descriptor ring\n");
1591 setup_rx_desc_die:
1592 vfree(rxdr->buffer_info);
1593 kfree(rxdr->ps_page);
1594 kfree(rxdr->ps_page_dma);
1595 return -ENOMEM;
1596 }
1597
1598 /* Fix for errata 23, can't cross 64kB boundary */
1599 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1600 void *olddesc = rxdr->desc;
1601 dma_addr_t olddma = rxdr->dma;
1602 DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
1603 "at %p\n", rxdr->size, rxdr->desc);
1604 /* Try again, without freeing the previous */
1605 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1606 /* Failed allocation, critical failure */
1607 if (!rxdr->desc) {
1608 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1609 DPRINTK(PROBE, ERR,
1610 "Unable to allocate memory "
1611 "for the receive descriptor ring\n");
1612 goto setup_rx_desc_die;
1613 }
1614
1615 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1616 /* give up */
1617 pci_free_consistent(pdev, rxdr->size, rxdr->desc,
1618 rxdr->dma);
1619 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1620 DPRINTK(PROBE, ERR,
1621 "Unable to allocate aligned memory "
1622 "for the receive descriptor ring\n");
1623 goto setup_rx_desc_die;
1624 } else {
1625 /* Free old allocation, new allocation was successful */
1626 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1627 }
1628 }
1629 memset(rxdr->desc, 0, rxdr->size);
1630
1631 rxdr->next_to_clean = 0;
1632 rxdr->next_to_use = 0;
1633
1634 return 0;
1635 }
1636
1637 /**
1638 * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1639 * (Descriptors) for all queues
1640 * @adapter: board private structure
1641 *
1642 * If this function returns with an error, then it's possible one or
1643 * more of the rings is populated (while the rest are not). It is the
1644 * callers duty to clean those orphaned rings.
1645 *
1646 * Return 0 on success, negative on failure
1647 **/
1648
1649 int
1650 e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
1651 {
1652 int i, err = 0;
1653
1654 for (i = 0; i < adapter->num_rx_queues; i++) {
1655 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1656 if (err) {
1657 DPRINTK(PROBE, ERR,
1658 "Allocation for Rx Queue %u failed\n", i);
1659 break;
1660 }
1661 }
1662
1663 return err;
1664 }
1665
1666 /**
1667 * e1000_setup_rctl - configure the receive control registers
1668 * @adapter: Board private structure
1669 **/
1670 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1671 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
1672 static void
1673 e1000_setup_rctl(struct e1000_adapter *adapter)
1674 {
1675 uint32_t rctl, rfctl;
1676 uint32_t psrctl = 0;
1677 #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
1678 uint32_t pages = 0;
1679 #endif
1680
1681 rctl = E1000_READ_REG(&adapter->hw, RCTL);
1682
1683 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1684
1685 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1686 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1687 (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
1688
1689 if (adapter->hw.tbi_compatibility_on == 1)
1690 rctl |= E1000_RCTL_SBP;
1691 else
1692 rctl &= ~E1000_RCTL_SBP;
1693
1694 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1695 rctl &= ~E1000_RCTL_LPE;
1696 else
1697 rctl |= E1000_RCTL_LPE;
1698
1699 /* Setup buffer sizes */
1700 rctl &= ~E1000_RCTL_SZ_4096;
1701 rctl |= E1000_RCTL_BSEX;
1702 switch (adapter->rx_buffer_len) {
1703 case E1000_RXBUFFER_256:
1704 rctl |= E1000_RCTL_SZ_256;
1705 rctl &= ~E1000_RCTL_BSEX;
1706 break;
1707 case E1000_RXBUFFER_512:
1708 rctl |= E1000_RCTL_SZ_512;
1709 rctl &= ~E1000_RCTL_BSEX;
1710 break;
1711 case E1000_RXBUFFER_1024:
1712 rctl |= E1000_RCTL_SZ_1024;
1713 rctl &= ~E1000_RCTL_BSEX;
1714 break;
1715 case E1000_RXBUFFER_2048:
1716 default:
1717 rctl |= E1000_RCTL_SZ_2048;
1718 rctl &= ~E1000_RCTL_BSEX;
1719 break;
1720 case E1000_RXBUFFER_4096:
1721 rctl |= E1000_RCTL_SZ_4096;
1722 break;
1723 case E1000_RXBUFFER_8192:
1724 rctl |= E1000_RCTL_SZ_8192;
1725 break;
1726 case E1000_RXBUFFER_16384:
1727 rctl |= E1000_RCTL_SZ_16384;
1728 break;
1729 }
1730
1731 #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
1732 /* 82571 and greater support packet-split where the protocol
1733 * header is placed in skb->data and the packet data is
1734 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
1735 * In the case of a non-split, skb->data is linearly filled,
1736 * followed by the page buffers. Therefore, skb->data is
1737 * sized to hold the largest protocol header.
1738 */
1739 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
1740 if ((adapter->hw.mac_type > e1000_82547_rev_2) && (pages <= 3) &&
1741 PAGE_SIZE <= 16384)
1742 adapter->rx_ps_pages = pages;
1743 else
1744 adapter->rx_ps_pages = 0;
1745 #endif
1746 if (adapter->rx_ps_pages) {
1747 /* Configure extra packet-split registers */
1748 rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
1749 rfctl |= E1000_RFCTL_EXTEN;
1750 /* disable IPv6 packet split support */
1751 rfctl |= E1000_RFCTL_IPV6_DIS;
1752 E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
1753
1754 rctl |= E1000_RCTL_DTYP_PS;
1755
1756 psrctl |= adapter->rx_ps_bsize0 >>
1757 E1000_PSRCTL_BSIZE0_SHIFT;
1758
1759 switch (adapter->rx_ps_pages) {
1760 case 3:
1761 psrctl |= PAGE_SIZE <<
1762 E1000_PSRCTL_BSIZE3_SHIFT;
1763 case 2:
1764 psrctl |= PAGE_SIZE <<
1765 E1000_PSRCTL_BSIZE2_SHIFT;
1766 case 1:
1767 psrctl |= PAGE_SIZE >>
1768 E1000_PSRCTL_BSIZE1_SHIFT;
1769 break;
1770 }
1771
1772 E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
1773 }
1774
1775 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
1776 }
1777
1778 /**
1779 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
1780 * @adapter: board private structure
1781 *
1782 * Configure the Rx unit of the MAC after a reset.
1783 **/
1784
1785 static void
1786 e1000_configure_rx(struct e1000_adapter *adapter)
1787 {
1788 uint64_t rdba;
1789 struct e1000_hw *hw = &adapter->hw;
1790 uint32_t rdlen, rctl, rxcsum, ctrl_ext;
1791
1792 if (adapter->rx_ps_pages) {
1793 /* this is a 32 byte descriptor */
1794 rdlen = adapter->rx_ring[0].count *
1795 sizeof(union e1000_rx_desc_packet_split);
1796 adapter->clean_rx = e1000_clean_rx_irq_ps;
1797 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
1798 } else {
1799 rdlen = adapter->rx_ring[0].count *
1800 sizeof(struct e1000_rx_desc);
1801 adapter->clean_rx = e1000_clean_rx_irq;
1802 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
1803 }
1804
1805 /* disable receives while setting up the descriptors */
1806 rctl = E1000_READ_REG(hw, RCTL);
1807 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
1808
1809 /* set the Receive Delay Timer Register */
1810 E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
1811
1812 if (hw->mac_type >= e1000_82540) {
1813 E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
1814 if (adapter->itr > 1)
1815 E1000_WRITE_REG(hw, ITR,
1816 1000000000 / (adapter->itr * 256));
1817 }
1818
1819 if (hw->mac_type >= e1000_82571) {
1820 ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
1821 /* Reset delay timers after every interrupt */
1822 ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR;
1823 #ifdef CONFIG_E1000_NAPI
1824 /* Auto-Mask interrupts upon ICR read. */
1825 ctrl_ext |= E1000_CTRL_EXT_IAME;
1826 #endif
1827 E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
1828 E1000_WRITE_REG(hw, IAM, ~0);
1829 E1000_WRITE_FLUSH(hw);
1830 }
1831
1832 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1833 * the Base and Length of the Rx Descriptor Ring */
1834 switch (adapter->num_rx_queues) {
1835 case 1:
1836 default:
1837 rdba = adapter->rx_ring[0].dma;
1838 E1000_WRITE_REG(hw, RDLEN, rdlen);
1839 E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
1840 E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
1841 E1000_WRITE_REG(hw, RDT, 0);
1842 E1000_WRITE_REG(hw, RDH, 0);
1843 adapter->rx_ring[0].rdh = E1000_RDH;
1844 adapter->rx_ring[0].rdt = E1000_RDT;
1845 break;
1846 }
1847
1848 /* Enable 82543 Receive Checksum Offload for TCP and UDP */
1849 if (hw->mac_type >= e1000_82543) {
1850 rxcsum = E1000_READ_REG(hw, RXCSUM);
1851 if (adapter->rx_csum == TRUE) {
1852 rxcsum |= E1000_RXCSUM_TUOFL;
1853
1854 /* Enable 82571 IPv4 payload checksum for UDP fragments
1855 * Must be used in conjunction with packet-split. */
1856 if ((hw->mac_type >= e1000_82571) &&
1857 (adapter->rx_ps_pages)) {
1858 rxcsum |= E1000_RXCSUM_IPPCSE;
1859 }
1860 } else {
1861 rxcsum &= ~E1000_RXCSUM_TUOFL;
1862 /* don't need to clear IPPCSE as it defaults to 0 */
1863 }
1864 E1000_WRITE_REG(hw, RXCSUM, rxcsum);
1865 }
1866
1867 /* Enable Receives */
1868 E1000_WRITE_REG(hw, RCTL, rctl);
1869 }
1870
1871 /**
1872 * e1000_free_tx_resources - Free Tx Resources per Queue
1873 * @adapter: board private structure
1874 * @tx_ring: Tx descriptor ring for a specific queue
1875 *
1876 * Free all transmit software resources
1877 **/
1878
1879 static void
1880 e1000_free_tx_resources(struct e1000_adapter *adapter,
1881 struct e1000_tx_ring *tx_ring)
1882 {
1883 struct pci_dev *pdev = adapter->pdev;
1884
1885 e1000_clean_tx_ring(adapter, tx_ring);
1886
1887 vfree(tx_ring->buffer_info);
1888 tx_ring->buffer_info = NULL;
1889
1890 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
1891
1892 tx_ring->desc = NULL;
1893 }
1894
1895 /**
1896 * e1000_free_all_tx_resources - Free Tx Resources for All Queues
1897 * @adapter: board private structure
1898 *
1899 * Free all transmit software resources
1900 **/
1901
1902 void
1903 e1000_free_all_tx_resources(struct e1000_adapter *adapter)
1904 {
1905 int i;
1906
1907 for (i = 0; i < adapter->num_tx_queues; i++)
1908 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
1909 }
1910
1911 static void
1912 e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
1913 struct e1000_buffer *buffer_info)
1914 {
1915 if (buffer_info->dma) {
1916 pci_unmap_page(adapter->pdev,
1917 buffer_info->dma,
1918 buffer_info->length,
1919 PCI_DMA_TODEVICE);
1920 }
1921 if (buffer_info->skb)
1922 dev_kfree_skb_any(buffer_info->skb);
1923 memset(buffer_info, 0, sizeof(struct e1000_buffer));
1924 }
1925
1926 /**
1927 * e1000_clean_tx_ring - Free Tx Buffers
1928 * @adapter: board private structure
1929 * @tx_ring: ring to be cleaned
1930 **/
1931
1932 static void
1933 e1000_clean_tx_ring(struct e1000_adapter *adapter,
1934 struct e1000_tx_ring *tx_ring)
1935 {
1936 struct e1000_buffer *buffer_info;
1937 unsigned long size;
1938 unsigned int i;
1939
1940 /* Free all the Tx ring sk_buffs */
1941
1942 for (i = 0; i < tx_ring->count; i++) {
1943 buffer_info = &tx_ring->buffer_info[i];
1944 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
1945 }
1946
1947 size = sizeof(struct e1000_buffer) * tx_ring->count;
1948 memset(tx_ring->buffer_info, 0, size);
1949
1950 /* Zero out the descriptor ring */
1951
1952 memset(tx_ring->desc, 0, tx_ring->size);
1953
1954 tx_ring->next_to_use = 0;
1955 tx_ring->next_to_clean = 0;
1956 tx_ring->last_tx_tso = 0;
1957
1958 writel(0, adapter->hw.hw_addr + tx_ring->tdh);
1959 writel(0, adapter->hw.hw_addr + tx_ring->tdt);
1960 }
1961
1962 /**
1963 * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
1964 * @adapter: board private structure
1965 **/
1966
1967 static void
1968 e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
1969 {
1970 int i;
1971
1972 for (i = 0; i < adapter->num_tx_queues; i++)
1973 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1974 }
1975
1976 /**
1977 * e1000_free_rx_resources - Free Rx Resources
1978 * @adapter: board private structure
1979 * @rx_ring: ring to clean the resources from
1980 *
1981 * Free all receive software resources
1982 **/
1983
1984 static void
1985 e1000_free_rx_resources(struct e1000_adapter *adapter,
1986 struct e1000_rx_ring *rx_ring)
1987 {
1988 struct pci_dev *pdev = adapter->pdev;
1989
1990 e1000_clean_rx_ring(adapter, rx_ring);
1991
1992 vfree(rx_ring->buffer_info);
1993 rx_ring->buffer_info = NULL;
1994 kfree(rx_ring->ps_page);
1995 rx_ring->ps_page = NULL;
1996 kfree(rx_ring->ps_page_dma);
1997 rx_ring->ps_page_dma = NULL;
1998
1999 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
2000
2001 rx_ring->desc = NULL;
2002 }
2003
2004 /**
2005 * e1000_free_all_rx_resources - Free Rx Resources for All Queues
2006 * @adapter: board private structure
2007 *
2008 * Free all receive software resources
2009 **/
2010
2011 void
2012 e1000_free_all_rx_resources(struct e1000_adapter *adapter)
2013 {
2014 int i;
2015
2016 for (i = 0; i < adapter->num_rx_queues; i++)
2017 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
2018 }
2019
2020 /**
2021 * e1000_clean_rx_ring - Free Rx Buffers per Queue
2022 * @adapter: board private structure
2023 * @rx_ring: ring to free buffers from
2024 **/
2025
2026 static void
2027 e1000_clean_rx_ring(struct e1000_adapter *adapter,
2028 struct e1000_rx_ring *rx_ring)
2029 {
2030 struct e1000_buffer *buffer_info;
2031 struct e1000_ps_page *ps_page;
2032 struct e1000_ps_page_dma *ps_page_dma;
2033 struct pci_dev *pdev = adapter->pdev;
2034 unsigned long size;
2035 unsigned int i, j;
2036
2037 /* Free all the Rx ring sk_buffs */
2038 for (i = 0; i < rx_ring->count; i++) {
2039 buffer_info = &rx_ring->buffer_info[i];
2040 if (buffer_info->skb) {
2041 pci_unmap_single(pdev,
2042 buffer_info->dma,
2043 buffer_info->length,
2044 PCI_DMA_FROMDEVICE);
2045
2046 dev_kfree_skb(buffer_info->skb);
2047 buffer_info->skb = NULL;
2048 }
2049 ps_page = &rx_ring->ps_page[i];
2050 ps_page_dma = &rx_ring->ps_page_dma[i];
2051 for (j = 0; j < adapter->rx_ps_pages; j++) {
2052 if (!ps_page->ps_page[j]) break;
2053 pci_unmap_page(pdev,
2054 ps_page_dma->ps_page_dma[j],
2055 PAGE_SIZE, PCI_DMA_FROMDEVICE);
2056 ps_page_dma->ps_page_dma[j] = 0;
2057 put_page(ps_page->ps_page[j]);
2058 ps_page->ps_page[j] = NULL;
2059 }
2060 }
2061
2062 size = sizeof(struct e1000_buffer) * rx_ring->count;
2063 memset(rx_ring->buffer_info, 0, size);
2064 size = sizeof(struct e1000_ps_page) * rx_ring->count;
2065 memset(rx_ring->ps_page, 0, size);
2066 size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
2067 memset(rx_ring->ps_page_dma, 0, size);
2068
2069 /* Zero out the descriptor ring */
2070
2071 memset(rx_ring->desc, 0, rx_ring->size);
2072
2073 rx_ring->next_to_clean = 0;
2074 rx_ring->next_to_use = 0;
2075
2076 writel(0, adapter->hw.hw_addr + rx_ring->rdh);
2077 writel(0, adapter->hw.hw_addr + rx_ring->rdt);
2078 }
2079
2080 /**
2081 * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
2082 * @adapter: board private structure
2083 **/
2084
2085 static void
2086 e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
2087 {
2088 int i;
2089
2090 for (i = 0; i < adapter->num_rx_queues; i++)
2091 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
2092 }
2093
2094 /* The 82542 2.0 (revision 2) needs to have the receive unit in reset
2095 * and memory write and invalidate disabled for certain operations
2096 */
2097 static void
2098 e1000_enter_82542_rst(struct e1000_adapter *adapter)
2099 {
2100 struct net_device *netdev = adapter->netdev;
2101 uint32_t rctl;
2102
2103 e1000_pci_clear_mwi(&adapter->hw);
2104
2105 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2106 rctl |= E1000_RCTL_RST;
2107 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2108 E1000_WRITE_FLUSH(&adapter->hw);
2109 mdelay(5);
2110
2111 if (netif_running(netdev))
2112 e1000_clean_all_rx_rings(adapter);
2113 }
2114
2115 static void
2116 e1000_leave_82542_rst(struct e1000_adapter *adapter)
2117 {
2118 struct net_device *netdev = adapter->netdev;
2119 uint32_t rctl;
2120
2121 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2122 rctl &= ~E1000_RCTL_RST;
2123 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2124 E1000_WRITE_FLUSH(&adapter->hw);
2125 mdelay(5);
2126
2127 if (adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
2128 e1000_pci_set_mwi(&adapter->hw);
2129
2130 if (netif_running(netdev)) {
2131 /* No need to loop, because 82542 supports only 1 queue */
2132 struct e1000_rx_ring *ring = &adapter->rx_ring[0];
2133 e1000_configure_rx(adapter);
2134 adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
2135 }
2136 }
2137
2138 /**
2139 * e1000_set_mac - Change the Ethernet Address of the NIC
2140 * @netdev: network interface device structure
2141 * @p: pointer to an address structure
2142 *
2143 * Returns 0 on success, negative on failure
2144 **/
2145
2146 static int
2147 e1000_set_mac(struct net_device *netdev, void *p)
2148 {
2149 struct e1000_adapter *adapter = netdev_priv(netdev);
2150 struct sockaddr *addr = p;
2151
2152 if (!is_valid_ether_addr(addr->sa_data))
2153 return -EADDRNOTAVAIL;
2154
2155 /* 82542 2.0 needs to be in reset to write receive address registers */
2156
2157 if (adapter->hw.mac_type == e1000_82542_rev2_0)
2158 e1000_enter_82542_rst(adapter);
2159
2160 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2161 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
2162
2163 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2164
2165 /* With 82571 controllers, LAA may be overwritten (with the default)
2166 * due to controller reset from the other port. */
2167 if (adapter->hw.mac_type == e1000_82571) {
2168 /* activate the work around */
2169 adapter->hw.laa_is_present = 1;
2170
2171 /* Hold a copy of the LAA in RAR[14] This is done so that
2172 * between the time RAR[0] gets clobbered and the time it
2173 * gets fixed (in e1000_watchdog), the actual LAA is in one
2174 * of the RARs and no incoming packets directed to this port
2175 * are dropped. Eventaully the LAA will be in RAR[0] and
2176 * RAR[14] */
2177 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
2178 E1000_RAR_ENTRIES - 1);
2179 }
2180
2181 if (adapter->hw.mac_type == e1000_82542_rev2_0)
2182 e1000_leave_82542_rst(adapter);
2183
2184 return 0;
2185 }
2186
2187 /**
2188 * e1000_set_multi - Multicast and Promiscuous mode set
2189 * @netdev: network interface device structure
2190 *
2191 * The set_multi entry point is called whenever the multicast address
2192 * list or the network interface flags are updated. This routine is
2193 * responsible for configuring the hardware for proper multicast,
2194 * promiscuous mode, and all-multi behavior.
2195 **/
2196
2197 static void
2198 e1000_set_multi(struct net_device *netdev)
2199 {
2200 struct e1000_adapter *adapter = netdev_priv(netdev);
2201 struct e1000_hw *hw = &adapter->hw;
2202 struct dev_mc_list *mc_ptr;
2203 uint32_t rctl;
2204 uint32_t hash_value;
2205 int i, rar_entries = E1000_RAR_ENTRIES;
2206 int mta_reg_count = (hw->mac_type == e1000_ich8lan) ?
2207 E1000_NUM_MTA_REGISTERS_ICH8LAN :
2208 E1000_NUM_MTA_REGISTERS;
2209
2210 if (adapter->hw.mac_type == e1000_ich8lan)
2211 rar_entries = E1000_RAR_ENTRIES_ICH8LAN;
2212
2213 /* reserve RAR[14] for LAA over-write work-around */
2214 if (adapter->hw.mac_type == e1000_82571)
2215 rar_entries--;
2216
2217 /* Check for Promiscuous and All Multicast modes */
2218
2219 rctl = E1000_READ_REG(hw, RCTL);
2220
2221 if (netdev->flags & IFF_PROMISC) {
2222 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
2223 } else if (netdev->flags & IFF_ALLMULTI) {
2224 rctl |= E1000_RCTL_MPE;
2225 rctl &= ~E1000_RCTL_UPE;
2226 } else {
2227 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2228 }
2229
2230 E1000_WRITE_REG(hw, RCTL, rctl);
2231
2232 /* 82542 2.0 needs to be in reset to write receive address registers */
2233
2234 if (hw->mac_type == e1000_82542_rev2_0)
2235 e1000_enter_82542_rst(adapter);
2236
2237 /* load the first 14 multicast address into the exact filters 1-14
2238 * RAR 0 is used for the station MAC adddress
2239 * if there are not 14 addresses, go ahead and clear the filters
2240 * -- with 82571 controllers only 0-13 entries are filled here
2241 */
2242 mc_ptr = netdev->mc_list;
2243
2244 for (i = 1; i < rar_entries; i++) {
2245 if (mc_ptr) {
2246 e1000_rar_set(hw, mc_ptr->dmi_addr, i);
2247 mc_ptr = mc_ptr->next;
2248 } else {
2249 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
2250 E1000_WRITE_FLUSH(hw);
2251 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
2252 E1000_WRITE_FLUSH(hw);
2253 }
2254 }
2255
2256 /* clear the old settings from the multicast hash table */
2257
2258 for (i = 0; i < mta_reg_count; i++) {
2259 E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
2260 E1000_WRITE_FLUSH(hw);
2261 }
2262
2263 /* load any remaining addresses into the hash table */
2264
2265 for (; mc_ptr; mc_ptr = mc_ptr->next) {
2266 hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr);
2267 e1000_mta_set(hw, hash_value);
2268 }
2269
2270 if (hw->mac_type == e1000_82542_rev2_0)
2271 e1000_leave_82542_rst(adapter);
2272 }
2273
2274 /* Need to wait a few seconds after link up to get diagnostic information from
2275 * the phy */
2276
2277 static void
2278 e1000_update_phy_info(unsigned long data)
2279 {
2280 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2281 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
2282 }
2283
2284 /**
2285 * e1000_82547_tx_fifo_stall - Timer Call-back
2286 * @data: pointer to adapter cast into an unsigned long
2287 **/
2288
2289 static void
2290 e1000_82547_tx_fifo_stall(unsigned long data)
2291 {
2292 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2293 struct net_device *netdev = adapter->netdev;
2294 uint32_t tctl;
2295
2296 if (atomic_read(&adapter->tx_fifo_stall)) {
2297 if ((E1000_READ_REG(&adapter->hw, TDT) ==
2298 E1000_READ_REG(&adapter->hw, TDH)) &&
2299 (E1000_READ_REG(&adapter->hw, TDFT) ==
2300 E1000_READ_REG(&adapter->hw, TDFH)) &&
2301 (E1000_READ_REG(&adapter->hw, TDFTS) ==
2302 E1000_READ_REG(&adapter->hw, TDFHS))) {
2303 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2304 E1000_WRITE_REG(&adapter->hw, TCTL,
2305 tctl & ~E1000_TCTL_EN);
2306 E1000_WRITE_REG(&adapter->hw, TDFT,
2307 adapter->tx_head_addr);
2308 E1000_WRITE_REG(&adapter->hw, TDFH,
2309 adapter->tx_head_addr);
2310 E1000_WRITE_REG(&adapter->hw, TDFTS,
2311 adapter->tx_head_addr);
2312 E1000_WRITE_REG(&adapter->hw, TDFHS,
2313 adapter->tx_head_addr);
2314 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
2315 E1000_WRITE_FLUSH(&adapter->hw);
2316
2317 adapter->tx_fifo_head = 0;
2318 atomic_set(&adapter->tx_fifo_stall, 0);
2319 netif_wake_queue(netdev);
2320 } else {
2321 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
2322 }
2323 }
2324 }
2325
2326 /**
2327 * e1000_watchdog - Timer Call-back
2328 * @data: pointer to adapter cast into an unsigned long
2329 **/
2330 static void
2331 e1000_watchdog(unsigned long data)
2332 {
2333 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2334 struct net_device *netdev = adapter->netdev;
2335 struct e1000_tx_ring *txdr = adapter->tx_ring;
2336 uint32_t link, tctl;
2337 int32_t ret_val;
2338
2339 ret_val = e1000_check_for_link(&adapter->hw);
2340 if ((ret_val == E1000_ERR_PHY) &&
2341 (adapter->hw.phy_type == e1000_phy_igp_3) &&
2342 (E1000_READ_REG(&adapter->hw, CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
2343 /* See e1000_kumeran_lock_loss_workaround() */
2344 DPRINTK(LINK, INFO,
2345 "Gigabit has been disabled, downgrading speed\n");
2346 }
2347 if (adapter->hw.mac_type == e1000_82573) {
2348 e1000_enable_tx_pkt_filtering(&adapter->hw);
2349 if (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
2350 e1000_update_mng_vlan(adapter);
2351 }
2352
2353 if ((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
2354 !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
2355 link = !adapter->hw.serdes_link_down;
2356 else
2357 link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
2358
2359 if (link) {
2360 if (!netif_carrier_ok(netdev)) {
2361 boolean_t txb2b = 1;
2362 e1000_get_speed_and_duplex(&adapter->hw,
2363 &adapter->link_speed,
2364 &adapter->link_duplex);
2365
2366 DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s\n",
2367 adapter->link_speed,
2368 adapter->link_duplex == FULL_DUPLEX ?
2369 "Full Duplex" : "Half Duplex");
2370
2371 /* tweak tx_queue_len according to speed/duplex
2372 * and adjust the timeout factor */
2373 netdev->tx_queue_len = adapter->tx_queue_len;
2374 adapter->tx_timeout_factor = 1;
2375 switch (adapter->link_speed) {
2376 case SPEED_10:
2377 txb2b = 0;
2378 netdev->tx_queue_len = 10;
2379 adapter->tx_timeout_factor = 8;
2380 break;
2381 case SPEED_100:
2382 txb2b = 0;
2383 netdev->tx_queue_len = 100;
2384 /* maybe add some timeout factor ? */
2385 break;
2386 }
2387
2388 if ((adapter->hw.mac_type == e1000_82571 ||
2389 adapter->hw.mac_type == e1000_82572) &&
2390 txb2b == 0) {
2391 #define SPEED_MODE_BIT (1 << 21)
2392 uint32_t tarc0;
2393 tarc0 = E1000_READ_REG(&adapter->hw, TARC0);
2394 tarc0 &= ~SPEED_MODE_BIT;
2395 E1000_WRITE_REG(&adapter->hw, TARC0, tarc0);
2396 }
2397
2398 #ifdef NETIF_F_TSO
2399 /* disable TSO for pcie and 10/100 speeds, to avoid
2400 * some hardware issues */
2401 if (!adapter->tso_force &&
2402 adapter->hw.bus_type == e1000_bus_type_pci_express){
2403 switch (adapter->link_speed) {
2404 case SPEED_10:
2405 case SPEED_100:
2406 DPRINTK(PROBE,INFO,
2407 "10/100 speed: disabling TSO\n");
2408 netdev->features &= ~NETIF_F_TSO;
2409 break;
2410 case SPEED_1000:
2411 netdev->features |= NETIF_F_TSO;
2412 break;
2413 default:
2414 /* oops */
2415 break;
2416 }
2417 }
2418 #endif
2419
2420 /* enable transmits in the hardware, need to do this
2421 * after setting TARC0 */
2422 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2423 tctl |= E1000_TCTL_EN;
2424 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
2425
2426 netif_carrier_on(netdev);
2427 netif_wake_queue(netdev);
2428 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
2429 adapter->smartspeed = 0;
2430 }
2431 } else {
2432 if (netif_carrier_ok(netdev)) {
2433 adapter->link_speed = 0;
2434 adapter->link_duplex = 0;
2435 DPRINTK(LINK, INFO, "NIC Link is Down\n");
2436 netif_carrier_off(netdev);
2437 netif_stop_queue(netdev);
2438 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
2439
2440 /* 80003ES2LAN workaround--
2441 * For packet buffer work-around on link down event;
2442 * disable receives in the ISR and
2443 * reset device here in the watchdog
2444 */
2445 if (adapter->hw.mac_type == e1000_80003es2lan) {
2446 /* reset device */
2447 schedule_work(&adapter->reset_task);
2448 }
2449 }
2450
2451 e1000_smartspeed(adapter);
2452 }
2453
2454 e1000_update_stats(adapter);
2455
2456 adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
2457 adapter->tpt_old = adapter->stats.tpt;
2458 adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
2459 adapter->colc_old = adapter->stats.colc;
2460
2461 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2462 adapter->gorcl_old = adapter->stats.gorcl;
2463 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2464 adapter->gotcl_old = adapter->stats.gotcl;
2465
2466 e1000_update_adaptive(&adapter->hw);
2467
2468 if (!netif_carrier_ok(netdev)) {
2469 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
2470 /* We've lost link, so the controller stops DMA,
2471 * but we've got queued Tx work that's never going
2472 * to get done, so reset controller to flush Tx.
2473 * (Do the reset outside of interrupt context). */
2474 adapter->tx_timeout_count++;
2475 schedule_work(&adapter->reset_task);
2476 }
2477 }
2478
2479 /* Dynamic mode for Interrupt Throttle Rate (ITR) */
2480 if (adapter->hw.mac_type >= e1000_82540 && adapter->itr == 1) {
2481 /* Symmetric Tx/Rx gets a reduced ITR=2000; Total
2482 * asymmetrical Tx or Rx gets ITR=8000; everyone
2483 * else is between 2000-8000. */
2484 uint32_t goc = (adapter->gotcl + adapter->gorcl) / 10000;
2485 uint32_t dif = (adapter->gotcl > adapter->gorcl ?
2486 adapter->gotcl - adapter->gorcl :
2487 adapter->gorcl - adapter->gotcl) / 10000;
2488 uint32_t itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
2489 E1000_WRITE_REG(&adapter->hw, ITR, 1000000000 / (itr * 256));
2490 }
2491
2492 /* Cause software interrupt to ensure rx ring is cleaned */
2493 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
2494
2495 /* Force detection of hung controller every watchdog period */
2496 adapter->detect_tx_hung = TRUE;
2497
2498 /* With 82571 controllers, LAA may be overwritten due to controller
2499 * reset from the other port. Set the appropriate LAA in RAR[0] */
2500 if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
2501 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2502
2503 /* Reset the timer */
2504 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
2505 }
2506
2507 #define E1000_TX_FLAGS_CSUM 0x00000001
2508 #define E1000_TX_FLAGS_VLAN 0x00000002
2509 #define E1000_TX_FLAGS_TSO 0x00000004
2510 #define E1000_TX_FLAGS_IPV4 0x00000008
2511 #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
2512 #define E1000_TX_FLAGS_VLAN_SHIFT 16
2513
2514 static int
2515 e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2516 struct sk_buff *skb)
2517 {
2518 #ifdef NETIF_F_TSO
2519 struct e1000_context_desc *context_desc;
2520 struct e1000_buffer *buffer_info;
2521 unsigned int i;
2522 uint32_t cmd_length = 0;
2523 uint16_t ipcse = 0, tucse, mss;
2524 uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
2525 int err;
2526
2527 if (skb_shinfo(skb)->tso_size) {
2528 if (skb_header_cloned(skb)) {
2529 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2530 if (err)
2531 return err;
2532 }
2533
2534 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
2535 mss = skb_shinfo(skb)->tso_size;
2536 if (skb->protocol == htons(ETH_P_IP)) {
2537 skb->nh.iph->tot_len = 0;
2538 skb->nh.iph->check = 0;
2539 skb->h.th->check =
2540 ~csum_tcpudp_magic(skb->nh.iph->saddr,
2541 skb->nh.iph->daddr,
2542 0,
2543 IPPROTO_TCP,
2544 0);
2545 cmd_length = E1000_TXD_CMD_IP;
2546 ipcse = skb->h.raw - skb->data - 1;
2547 #ifdef NETIF_F_TSO_IPV6
2548 } else if (skb->protocol == ntohs(ETH_P_IPV6)) {
2549 skb->nh.ipv6h->payload_len = 0;
2550 skb->h.th->check =
2551 ~csum_ipv6_magic(&skb->nh.ipv6h->saddr,
2552 &skb->nh.ipv6h->daddr,
2553 0,
2554 IPPROTO_TCP,
2555 0);
2556 ipcse = 0;
2557 #endif
2558 }
2559 ipcss = skb->nh.raw - skb->data;
2560 ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
2561 tucss = skb->h.raw - skb->data;
2562 tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
2563 tucse = 0;
2564
2565 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
2566 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
2567
2568 i = tx_ring->next_to_use;
2569 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
2570 buffer_info = &tx_ring->buffer_info[i];
2571
2572 context_desc->lower_setup.ip_fields.ipcss = ipcss;
2573 context_desc->lower_setup.ip_fields.ipcso = ipcso;
2574 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
2575 context_desc->upper_setup.tcp_fields.tucss = tucss;
2576 context_desc->upper_setup.tcp_fields.tucso = tucso;
2577 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
2578 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
2579 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
2580 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
2581
2582 buffer_info->time_stamp = jiffies;
2583
2584 if (++i == tx_ring->count) i = 0;
2585 tx_ring->next_to_use = i;
2586
2587 return TRUE;
2588 }
2589 #endif
2590
2591 return FALSE;
2592 }
2593
2594 static boolean_t
2595 e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2596 struct sk_buff *skb)
2597 {
2598 struct e1000_context_desc *context_desc;
2599 struct e1000_buffer *buffer_info;
2600 unsigned int i;
2601 uint8_t css;
2602
2603 if (likely(skb->ip_summed == CHECKSUM_HW)) {
2604 css = skb->h.raw - skb->data;
2605
2606 i = tx_ring->next_to_use;
2607 buffer_info = &tx_ring->buffer_info[i];
2608 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
2609
2610 context_desc->upper_setup.tcp_fields.tucss = css;
2611 context_desc->upper_setup.tcp_fields.tucso = css + skb->csum;
2612 context_desc->upper_setup.tcp_fields.tucse = 0;
2613 context_desc->tcp_seg_setup.data = 0;
2614 context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
2615
2616 buffer_info->time_stamp = jiffies;
2617
2618 if (unlikely(++i == tx_ring->count)) i = 0;
2619 tx_ring->next_to_use = i;
2620
2621 return TRUE;
2622 }
2623
2624 return FALSE;
2625 }
2626
2627 #define E1000_MAX_TXD_PWR 12
2628 #define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
2629
2630 static int
2631 e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2632 struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
2633 unsigned int nr_frags, unsigned int mss)
2634 {
2635 struct e1000_buffer *buffer_info;
2636 unsigned int len = skb->len;
2637 unsigned int offset = 0, size, count = 0, i;
2638 unsigned int f;
2639 len -= skb->data_len;
2640
2641 i = tx_ring->next_to_use;
2642
2643 while (len) {
2644 buffer_info = &tx_ring->buffer_info[i];
2645 size = min(len, max_per_txd);
2646 #ifdef NETIF_F_TSO
2647 /* Workaround for Controller erratum --
2648 * descriptor for non-tso packet in a linear SKB that follows a
2649 * tso gets written back prematurely before the data is fully
2650 * DMA'd to the controller */
2651 if (!skb->data_len && tx_ring->last_tx_tso &&
2652 !skb_shinfo(skb)->tso_size) {
2653 tx_ring->last_tx_tso = 0;
2654 size -= 4;
2655 }
2656
2657 /* Workaround for premature desc write-backs
2658 * in TSO mode. Append 4-byte sentinel desc */
2659 if (unlikely(mss && !nr_frags && size == len && size > 8))
2660 size -= 4;
2661 #endif
2662 /* work-around for errata 10 and it applies
2663 * to all controllers in PCI-X mode
2664 * The fix is to make sure that the first descriptor of a
2665 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
2666 */
2667 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
2668 (size > 2015) && count == 0))
2669 size = 2015;
2670
2671 /* Workaround for potential 82544 hang in PCI-X. Avoid
2672 * terminating buffers within evenly-aligned dwords. */
2673 if (unlikely(adapter->pcix_82544 &&
2674 !((unsigned long)(skb->data + offset + size - 1) & 4) &&
2675 size > 4))
2676 size -= 4;
2677
2678 buffer_info->length = size;
2679 buffer_info->dma =
2680 pci_map_single(adapter->pdev,
2681 skb->data + offset,
2682 size,
2683 PCI_DMA_TODEVICE);
2684 buffer_info->time_stamp = jiffies;
2685
2686 len -= size;
2687 offset += size;
2688 count++;
2689 if (unlikely(++i == tx_ring->count)) i = 0;
2690 }
2691
2692 for (f = 0; f < nr_frags; f++) {
2693 struct skb_frag_struct *frag;
2694
2695 frag = &skb_shinfo(skb)->frags[f];
2696 len = frag->size;
2697 offset = frag->page_offset;
2698
2699 while (len) {
2700 buffer_info = &tx_ring->buffer_info[i];
2701 size = min(len, max_per_txd);
2702 #ifdef NETIF_F_TSO
2703 /* Workaround for premature desc write-backs
2704 * in TSO mode. Append 4-byte sentinel desc */
2705 if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
2706 size -= 4;
2707 #endif
2708 /* Workaround for potential 82544 hang in PCI-X.
2709 * Avoid terminating buffers within evenly-aligned
2710 * dwords. */
2711 if (unlikely(adapter->pcix_82544 &&
2712 !((unsigned long)(frag->page+offset+size-1) & 4) &&
2713 size > 4))
2714 size -= 4;
2715
2716 buffer_info->length = size;
2717 buffer_info->dma =
2718 pci_map_page(adapter->pdev,
2719 frag->page,
2720 offset,
2721 size,
2722 PCI_DMA_TODEVICE);
2723 buffer_info->time_stamp = jiffies;
2724
2725 len -= size;
2726 offset += size;
2727 count++;
2728 if (unlikely(++i == tx_ring->count)) i = 0;
2729 }
2730 }
2731
2732 i = (i == 0) ? tx_ring->count - 1 : i - 1;
2733 tx_ring->buffer_info[i].skb = skb;
2734 tx_ring->buffer_info[first].next_to_watch = i;
2735
2736 return count;
2737 }
2738
2739 static void
2740 e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2741 int tx_flags, int count)
2742 {
2743 struct e1000_tx_desc *tx_desc = NULL;
2744 struct e1000_buffer *buffer_info;
2745 uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
2746 unsigned int i;
2747
2748 if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
2749 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
2750 E1000_TXD_CMD_TSE;
2751 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2752
2753 if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
2754 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
2755 }
2756
2757 if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
2758 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
2759 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2760 }
2761
2762 if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
2763 txd_lower |= E1000_TXD_CMD_VLE;
2764 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
2765 }
2766
2767 i = tx_ring->next_to_use;
2768
2769 while (count--) {
2770 buffer_info = &tx_ring->buffer_info[i];
2771 tx_desc = E1000_TX_DESC(*tx_ring, i);
2772 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
2773 tx_desc->lower.data =
2774 cpu_to_le32(txd_lower | buffer_info->length);
2775 tx_desc->upper.data = cpu_to_le32(txd_upper);
2776 if (unlikely(++i == tx_ring->count)) i = 0;
2777 }
2778
2779 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
2780
2781 /* Force memory writes to complete before letting h/w
2782 * know there are new descriptors to fetch. (Only
2783 * applicable for weak-ordered memory model archs,
2784 * such as IA-64). */
2785 wmb();
2786
2787 tx_ring->next_to_use = i;
2788 writel(i, adapter->hw.hw_addr + tx_ring->tdt);
2789 }
2790
2791 /**
2792 * 82547 workaround to avoid controller hang in half-duplex environment.
2793 * The workaround is to avoid queuing a large packet that would span
2794 * the internal Tx FIFO ring boundary by notifying the stack to resend
2795 * the packet at a later time. This gives the Tx FIFO an opportunity to
2796 * flush all packets. When that occurs, we reset the Tx FIFO pointers
2797 * to the beginning of the Tx FIFO.
2798 **/
2799
2800 #define E1000_FIFO_HDR 0x10
2801 #define E1000_82547_PAD_LEN 0x3E0
2802
2803 static int
2804 e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
2805 {
2806 uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
2807 uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
2808
2809 E1000_ROUNDUP(skb_fifo_len, E1000_FIFO_HDR);
2810
2811 if (adapter->link_duplex != HALF_DUPLEX)
2812 goto no_fifo_stall_required;
2813
2814 if (atomic_read(&adapter->tx_fifo_stall))
2815 return 1;
2816
2817 if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
2818 atomic_set(&adapter->tx_fifo_stall, 1);
2819 return 1;
2820 }
2821
2822 no_fifo_stall_required:
2823 adapter->tx_fifo_head += skb_fifo_len;
2824 if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
2825 adapter->tx_fifo_head -= adapter->tx_fifo_size;
2826 return 0;
2827 }
2828
2829 #define MINIMUM_DHCP_PACKET_SIZE 282
2830 static int
2831 e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
2832 {
2833 struct e1000_hw *hw = &adapter->hw;
2834 uint16_t length, offset;
2835 if (vlan_tx_tag_present(skb)) {
2836 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
2837 ( adapter->hw.mng_cookie.status &
2838 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
2839 return 0;
2840 }
2841 if (skb->len > MINIMUM_DHCP_PACKET_SIZE) {
2842 struct ethhdr *eth = (struct ethhdr *) skb->data;
2843 if ((htons(ETH_P_IP) == eth->h_proto)) {
2844 const struct iphdr *ip =
2845 (struct iphdr *)((uint8_t *)skb->data+14);
2846 if (IPPROTO_UDP == ip->protocol) {
2847 struct udphdr *udp =
2848 (struct udphdr *)((uint8_t *)ip +
2849 (ip->ihl << 2));
2850 if (ntohs(udp->dest) == 67) {
2851 offset = (uint8_t *)udp + 8 - skb->data;
2852 length = skb->len - offset;
2853
2854 return e1000_mng_write_dhcp_info(hw,
2855 (uint8_t *)udp + 8,
2856 length);
2857 }
2858 }
2859 }
2860 }
2861 return 0;
2862 }
2863
2864 #define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
2865 static int
2866 e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
2867 {
2868 struct e1000_adapter *adapter = netdev_priv(netdev);
2869 struct e1000_tx_ring *tx_ring;
2870 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
2871 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
2872 unsigned int tx_flags = 0;
2873 unsigned int len = skb->len;
2874 unsigned long flags;
2875 unsigned int nr_frags = 0;
2876 unsigned int mss = 0;
2877 int count = 0;
2878 int tso;
2879 unsigned int f;
2880 len -= skb->data_len;
2881
2882 tx_ring = adapter->tx_ring;
2883
2884 if (unlikely(skb->len <= 0)) {
2885 dev_kfree_skb_any(skb);
2886 return NETDEV_TX_OK;
2887 }
2888
2889 #ifdef NETIF_F_TSO
2890 mss = skb_shinfo(skb)->tso_size;
2891 /* The controller does a simple calculation to
2892 * make sure there is enough room in the FIFO before
2893 * initiating the DMA for each buffer. The calc is:
2894 * 4 = ceil(buffer len/mss). To make sure we don't
2895 * overrun the FIFO, adjust the max buffer len if mss
2896 * drops. */
2897 if (mss) {
2898 uint8_t hdr_len;
2899 max_per_txd = min(mss << 2, max_per_txd);
2900 max_txd_pwr = fls(max_per_txd) - 1;
2901
2902 /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
2903 * points to just header, pull a few bytes of payload from
2904 * frags into skb->data */
2905 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
2906 if (skb->data_len && (hdr_len == (skb->len - skb->data_len))) {
2907 switch (adapter->hw.mac_type) {
2908 unsigned int pull_size;
2909 case e1000_82571:
2910 case e1000_82572:
2911 case e1000_82573:
2912 case e1000_ich8lan:
2913 pull_size = min((unsigned int)4, skb->data_len);
2914 if (!__pskb_pull_tail(skb, pull_size)) {
2915 DPRINTK(DRV, ERR,
2916 "__pskb_pull_tail failed.\n");
2917 dev_kfree_skb_any(skb);
2918 return NETDEV_TX_OK;
2919 }
2920 len = skb->len - skb->data_len;
2921 break;
2922 default:
2923 /* do nothing */
2924 break;
2925 }
2926 }
2927 }
2928
2929 /* reserve a descriptor for the offload context */
2930 if ((mss) || (skb->ip_summed == CHECKSUM_HW))
2931 count++;
2932 count++;
2933 #else
2934 if (skb->ip_summed == CHECKSUM_HW)
2935 count++;
2936 #endif
2937
2938 #ifdef NETIF_F_TSO
2939 /* Controller Erratum workaround */
2940 if (!skb->data_len && tx_ring->last_tx_tso &&
2941 !skb_shinfo(skb)->tso_size)
2942 count++;
2943 #endif
2944
2945 count += TXD_USE_COUNT(len, max_txd_pwr);
2946
2947 if (adapter->pcix_82544)
2948 count++;
2949
2950 /* work-around for errata 10 and it applies to all controllers
2951 * in PCI-X mode, so add one more descriptor to the count
2952 */
2953 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
2954 (len > 2015)))
2955 count++;
2956
2957 nr_frags = skb_shinfo(skb)->nr_frags;
2958 for (f = 0; f < nr_frags; f++)
2959 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
2960 max_txd_pwr);
2961 if (adapter->pcix_82544)
2962 count += nr_frags;
2963
2964
2965 if (adapter->hw.tx_pkt_filtering &&
2966 (adapter->hw.mac_type == e1000_82573))
2967 e1000_transfer_dhcp_info(adapter, skb);
2968
2969 local_irq_save(flags);
2970 if (!spin_trylock(&tx_ring->tx_lock)) {
2971 /* Collision - tell upper layer to requeue */
2972 local_irq_restore(flags);
2973 return NETDEV_TX_LOCKED;
2974 }
2975
2976 /* need: count + 2 desc gap to keep tail from touching
2977 * head, otherwise try next time */
2978 if (unlikely(E1000_DESC_UNUSED(tx_ring) < count + 2)) {
2979 netif_stop_queue(netdev);
2980 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
2981 return NETDEV_TX_BUSY;
2982 }
2983
2984 if (unlikely(adapter->hw.mac_type == e1000_82547)) {
2985 if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
2986 netif_stop_queue(netdev);
2987 mod_timer(&adapter->tx_fifo_stall_timer, jiffies);
2988 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
2989 return NETDEV_TX_BUSY;
2990 }
2991 }
2992
2993 if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
2994 tx_flags |= E1000_TX_FLAGS_VLAN;
2995 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
2996 }
2997
2998 first = tx_ring->next_to_use;
2999
3000 tso = e1000_tso(adapter, tx_ring, skb);
3001 if (tso < 0) {
3002 dev_kfree_skb_any(skb);
3003 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3004 return NETDEV_TX_OK;
3005 }
3006
3007 if (likely(tso)) {
3008 tx_ring->last_tx_tso = 1;
3009 tx_flags |= E1000_TX_FLAGS_TSO;
3010 } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
3011 tx_flags |= E1000_TX_FLAGS_CSUM;
3012
3013 /* Old method was to assume IPv4 packet by default if TSO was enabled.
3014 * 82571 hardware supports TSO capabilities for IPv6 as well...
3015 * no longer assume, we must. */
3016 if (likely(skb->protocol == htons(ETH_P_IP)))
3017 tx_flags |= E1000_TX_FLAGS_IPV4;
3018
3019 e1000_tx_queue(adapter, tx_ring, tx_flags,
3020 e1000_tx_map(adapter, tx_ring, skb, first,
3021 max_per_txd, nr_frags, mss));
3022
3023 netdev->trans_start = jiffies;
3024
3025 /* Make sure there is space in the ring for the next send. */
3026 if (unlikely(E1000_DESC_UNUSED(tx_ring) < MAX_SKB_FRAGS + 2))
3027 netif_stop_queue(netdev);
3028
3029 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3030 return NETDEV_TX_OK;
3031 }
3032
3033 /**
3034 * e1000_tx_timeout - Respond to a Tx Hang
3035 * @netdev: network interface device structure
3036 **/
3037
3038 static void
3039 e1000_tx_timeout(struct net_device *netdev)
3040 {
3041 struct e1000_adapter *adapter = netdev_priv(netdev);
3042
3043 /* Do the reset outside of interrupt context */
3044 adapter->tx_timeout_count++;
3045 schedule_work(&adapter->reset_task);
3046 }
3047
3048 static void
3049 e1000_reset_task(struct net_device *netdev)
3050 {
3051 struct e1000_adapter *adapter = netdev_priv(netdev);
3052
3053 e1000_reinit_locked(adapter);
3054 }
3055
3056 /**
3057 * e1000_get_stats - Get System Network Statistics
3058 * @netdev: network interface device structure
3059 *
3060 * Returns the address of the device statistics structure.
3061 * The statistics are actually updated from the timer callback.
3062 **/
3063
3064 static struct net_device_stats *
3065 e1000_get_stats(struct net_device *netdev)
3066 {
3067 struct e1000_adapter *adapter = netdev_priv(netdev);
3068
3069 /* only return the current stats */
3070 return &adapter->net_stats;
3071 }
3072
3073 /**
3074 * e1000_change_mtu - Change the Maximum Transfer Unit
3075 * @netdev: network interface device structure
3076 * @new_mtu: new value for maximum frame size
3077 *
3078 * Returns 0 on success, negative on failure
3079 **/
3080
3081 static int
3082 e1000_change_mtu(struct net_device *netdev, int new_mtu)
3083 {
3084 struct e1000_adapter *adapter = netdev_priv(netdev);
3085 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
3086 uint16_t eeprom_data = 0;
3087
3088 if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
3089 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
3090 DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
3091 return -EINVAL;
3092 }
3093
3094 /* Adapter-specific max frame size limits. */
3095 switch (adapter->hw.mac_type) {
3096 case e1000_undefined ... e1000_82542_rev2_1:
3097 case e1000_ich8lan:
3098 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3099 DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
3100 return -EINVAL;
3101 }
3102 break;
3103 case e1000_82573:
3104 /* only enable jumbo frames if ASPM is disabled completely
3105 * this means both bits must be zero in 0x1A bits 3:2 */
3106 e1000_read_eeprom(&adapter->hw, EEPROM_INIT_3GIO_3, 1,
3107 &eeprom_data);
3108 if (eeprom_data & EEPROM_WORD1A_ASPM_MASK) {
3109 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3110 DPRINTK(PROBE, ERR,
3111 "Jumbo Frames not supported.\n");
3112 return -EINVAL;
3113 }
3114 break;
3115 }
3116 /* fall through to get support */
3117 case e1000_82571:
3118 case e1000_82572:
3119 case e1000_80003es2lan:
3120 #define MAX_STD_JUMBO_FRAME_SIZE 9234
3121 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
3122 DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
3123 return -EINVAL;
3124 }
3125 break;
3126 default:
3127 /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
3128 break;
3129 }
3130
3131 /* NOTE: dev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
3132 * means we reserve 2 more, this pushes us to allocate from the next
3133 * larger slab size
3134 * i.e. RXBUFFER_2048 --> size-4096 slab */
3135
3136 if (max_frame <= E1000_RXBUFFER_256)
3137 adapter->rx_buffer_len = E1000_RXBUFFER_256;
3138 else if (max_frame <= E1000_RXBUFFER_512)
3139 adapter->rx_buffer_len = E1000_RXBUFFER_512;
3140 else if (max_frame <= E1000_RXBUFFER_1024)
3141 adapter->rx_buffer_len = E1000_RXBUFFER_1024;
3142 else if (max_frame <= E1000_RXBUFFER_2048)
3143 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
3144 else if (max_frame <= E1000_RXBUFFER_4096)
3145 adapter->rx_buffer_len = E1000_RXBUFFER_4096;
3146 else if (max_frame <= E1000_RXBUFFER_8192)
3147 adapter->rx_buffer_len = E1000_RXBUFFER_8192;
3148 else if (max_frame <= E1000_RXBUFFER_16384)
3149 adapter->rx_buffer_len = E1000_RXBUFFER_16384;
3150
3151 /* adjust allocation if LPE protects us, and we aren't using SBP */
3152 #define MAXIMUM_ETHERNET_VLAN_SIZE 1522
3153 if (!adapter->hw.tbi_compatibility_on &&
3154 ((max_frame == MAXIMUM_ETHERNET_FRAME_SIZE) ||
3155 (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
3156 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
3157
3158 netdev->mtu = new_mtu;
3159
3160 if (netif_running(netdev))
3161 e1000_reinit_locked(adapter);
3162
3163 adapter->hw.max_frame_size = max_frame;
3164
3165 return 0;
3166 }
3167
3168 /**
3169 * e1000_update_stats - Update the board statistics counters
3170 * @adapter: board private structure
3171 **/
3172
3173 void
3174 e1000_update_stats(struct e1000_adapter *adapter)
3175 {
3176 struct e1000_hw *hw = &adapter->hw;
3177 struct pci_dev *pdev = adapter->pdev;
3178 unsigned long flags;
3179 uint16_t phy_tmp;
3180
3181 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3182
3183 /*
3184 * Prevent stats update while adapter is being reset, or if the pci
3185 * connection is down.
3186 */
3187 if (adapter->link_speed == 0)
3188 return;
3189 if (pdev->error_state && pdev->error_state != pci_channel_io_normal)
3190 return;
3191
3192 spin_lock_irqsave(&adapter->stats_lock, flags);
3193
3194 /* these counters are modified from e1000_adjust_tbi_stats,
3195 * called from the interrupt context, so they must only
3196 * be written while holding adapter->stats_lock
3197 */
3198
3199 adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
3200 adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
3201 adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
3202 adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
3203 adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
3204 adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
3205 adapter->stats.roc += E1000_READ_REG(hw, ROC);
3206
3207 if (adapter->hw.mac_type != e1000_ich8lan) {
3208 adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
3209 adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
3210 adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
3211 adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
3212 adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
3213 adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
3214 }
3215
3216 adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
3217 adapter->stats.mpc += E1000_READ_REG(hw, MPC);
3218 adapter->stats.scc += E1000_READ_REG(hw, SCC);
3219 adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
3220 adapter->stats.mcc += E1000_READ_REG(hw, MCC);
3221 adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
3222 adapter->stats.dc += E1000_READ_REG(hw, DC);
3223 adapter->stats.sec += E1000_READ_REG(hw, SEC);
3224 adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
3225 adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
3226 adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
3227 adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
3228 adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
3229 adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
3230 adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
3231 adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
3232 adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
3233 adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
3234 adapter->stats.ruc += E1000_READ_REG(hw, RUC);
3235 adapter->stats.rfc += E1000_READ_REG(hw, RFC);
3236 adapter->stats.rjc += E1000_READ_REG(hw, RJC);
3237 adapter->stats.torl += E1000_READ_REG(hw, TORL);
3238 adapter->stats.torh += E1000_READ_REG(hw, TORH);
3239 adapter->stats.totl += E1000_READ_REG(hw, TOTL);
3240 adapter->stats.toth += E1000_READ_REG(hw, TOTH);
3241 adapter->stats.tpr += E1000_READ_REG(hw, TPR);
3242
3243 if (adapter->hw.mac_type != e1000_ich8lan) {
3244 adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
3245 adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
3246 adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
3247 adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
3248 adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
3249 adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
3250 }
3251
3252 adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
3253 adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
3254
3255 /* used for adaptive IFS */
3256
3257 hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
3258 adapter->stats.tpt += hw->tx_packet_delta;
3259 hw->collision_delta = E1000_READ_REG(hw, COLC);
3260 adapter->stats.colc += hw->collision_delta;
3261
3262 if (hw->mac_type >= e1000_82543) {
3263 adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
3264 adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
3265 adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
3266 adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
3267 adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
3268 adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
3269 }
3270 if (hw->mac_type > e1000_82547_rev_2) {
3271 adapter->stats.iac += E1000_READ_REG(hw, IAC);
3272 adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
3273
3274 if (adapter->hw.mac_type != e1000_ich8lan) {
3275 adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
3276 adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
3277 adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
3278 adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
3279 adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
3280 adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
3281 adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
3282 }
3283 }
3284
3285 /* Fill out the OS statistics structure */
3286
3287 adapter->net_stats.rx_packets = adapter->stats.gprc;
3288 adapter->net_stats.tx_packets = adapter->stats.gptc;
3289 adapter->net_stats.rx_bytes = adapter->stats.gorcl;
3290 adapter->net_stats.tx_bytes = adapter->stats.gotcl;
3291 adapter->net_stats.multicast = adapter->stats.mprc;
3292 adapter->net_stats.collisions = adapter->stats.colc;
3293
3294 /* Rx Errors */
3295
3296 /* RLEC on some newer hardware can be incorrect so build
3297 * our own version based on RUC and ROC */
3298 adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3299 adapter->stats.crcerrs + adapter->stats.algnerrc +
3300 adapter->stats.ruc + adapter->stats.roc +
3301 adapter->stats.cexterr;
3302 adapter->net_stats.rx_length_errors = adapter->stats.ruc +
3303 adapter->stats.roc;
3304 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3305 adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
3306 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3307
3308 /* Tx Errors */
3309
3310 adapter->net_stats.tx_errors = adapter->stats.ecol +
3311 adapter->stats.latecol;
3312 adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3313 adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3314 adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
3315
3316 /* Tx Dropped needs to be maintained elsewhere */
3317
3318 /* Phy Stats */
3319
3320 if (hw->media_type == e1000_media_type_copper) {
3321 if ((adapter->link_speed == SPEED_1000) &&
3322 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
3323 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3324 adapter->phy_stats.idle_errors += phy_tmp;
3325 }
3326
3327 if ((hw->mac_type <= e1000_82546) &&
3328 (hw->phy_type == e1000_phy_m88) &&
3329 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
3330 adapter->phy_stats.receive_errors += phy_tmp;
3331 }
3332
3333 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3334 }
3335
3336 /**
3337 * e1000_intr - Interrupt Handler
3338 * @irq: interrupt number
3339 * @data: pointer to a network interface device structure
3340 * @pt_regs: CPU registers structure
3341 **/
3342
3343 static irqreturn_t
3344 e1000_intr(int irq, void *data, struct pt_regs *regs)
3345 {
3346 struct net_device *netdev = data;
3347 struct e1000_adapter *adapter = netdev_priv(netdev);
3348 struct e1000_hw *hw = &adapter->hw;
3349 uint32_t rctl, icr = E1000_READ_REG(hw, ICR);
3350 #ifndef CONFIG_E1000_NAPI
3351 int i;
3352 #else
3353 /* Interrupt Auto-Mask...upon reading ICR,
3354 * interrupts are masked. No need for the
3355 * IMC write, but it does mean we should
3356 * account for it ASAP. */
3357 if (likely(hw->mac_type >= e1000_82571))
3358 atomic_inc(&adapter->irq_sem);
3359 #endif
3360
3361 if (unlikely(!icr)) {
3362 #ifdef CONFIG_E1000_NAPI
3363 if (hw->mac_type >= e1000_82571)
3364 e1000_irq_enable(adapter);
3365 #endif
3366 return IRQ_NONE; /* Not our interrupt */
3367 }
3368
3369 if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
3370 hw->get_link_status = 1;
3371 /* 80003ES2LAN workaround--
3372 * For packet buffer work-around on link down event;
3373 * disable receives here in the ISR and
3374 * reset adapter in watchdog
3375 */
3376 if (netif_carrier_ok(netdev) &&
3377 (adapter->hw.mac_type == e1000_80003es2lan)) {
3378 /* disable receives */
3379 rctl = E1000_READ_REG(hw, RCTL);
3380 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
3381 }
3382 mod_timer(&adapter->watchdog_timer, jiffies);
3383 }
3384
3385 #ifdef CONFIG_E1000_NAPI
3386 if (unlikely(hw->mac_type < e1000_82571)) {
3387 atomic_inc(&adapter->irq_sem);
3388 E1000_WRITE_REG(hw, IMC, ~0);
3389 E1000_WRITE_FLUSH(hw);
3390 }
3391 if (likely(netif_rx_schedule_prep(&adapter->polling_netdev[0])))
3392 __netif_rx_schedule(&adapter->polling_netdev[0]);
3393 else
3394 e1000_irq_enable(adapter);
3395 #else
3396 /* Writing IMC and IMS is needed for 82547.
3397 * Due to Hub Link bus being occupied, an interrupt
3398 * de-assertion message is not able to be sent.
3399 * When an interrupt assertion message is generated later,
3400 * two messages are re-ordered and sent out.
3401 * That causes APIC to think 82547 is in de-assertion
3402 * state, while 82547 is in assertion state, resulting
3403 * in dead lock. Writing IMC forces 82547 into
3404 * de-assertion state.
3405 */
3406 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) {
3407 atomic_inc(&adapter->irq_sem);
3408 E1000_WRITE_REG(hw, IMC, ~0);
3409 }
3410
3411 for (i = 0; i < E1000_MAX_INTR; i++)
3412 if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
3413 !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
3414 break;
3415
3416 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
3417 e1000_irq_enable(adapter);
3418
3419 #endif
3420
3421 return IRQ_HANDLED;
3422 }
3423
3424 #ifdef CONFIG_E1000_NAPI
3425 /**
3426 * e1000_clean - NAPI Rx polling callback
3427 * @adapter: board private structure
3428 **/
3429
3430 static int
3431 e1000_clean(struct net_device *poll_dev, int *budget)
3432 {
3433 struct e1000_adapter *adapter;
3434 int work_to_do = min(*budget, poll_dev->quota);
3435 int tx_cleaned = 0, i = 0, work_done = 0;
3436
3437 /* Must NOT use netdev_priv macro here. */
3438 adapter = poll_dev->priv;
3439
3440 /* Keep link state information with original netdev */
3441 if (!netif_carrier_ok(adapter->netdev))
3442 goto quit_polling;
3443
3444 while (poll_dev != &adapter->polling_netdev[i]) {
3445 i++;
3446 BUG_ON(i == adapter->num_rx_queues);
3447 }
3448
3449 if (likely(adapter->num_tx_queues == 1)) {
3450 /* e1000_clean is called per-cpu. This lock protects
3451 * tx_ring[0] from being cleaned by multiple cpus
3452 * simultaneously. A failure obtaining the lock means
3453 * tx_ring[0] is currently being cleaned anyway. */
3454 if (spin_trylock(&adapter->tx_queue_lock)) {
3455 tx_cleaned = e1000_clean_tx_irq(adapter,
3456 &adapter->tx_ring[0]);
3457 spin_unlock(&adapter->tx_queue_lock);
3458 }
3459 } else
3460 tx_cleaned = e1000_clean_tx_irq(adapter, &adapter->tx_ring[i]);
3461
3462 adapter->clean_rx(adapter, &adapter->rx_ring[i],
3463 &work_done, work_to_do);
3464
3465 *budget -= work_done;
3466 poll_dev->quota -= work_done;
3467
3468 /* If no Tx and not enough Rx work done, exit the polling mode */
3469 if ((!tx_cleaned && (work_done == 0)) ||
3470 !netif_running(adapter->netdev)) {
3471 quit_polling:
3472 netif_rx_complete(poll_dev);
3473 e1000_irq_enable(adapter);
3474 return 0;
3475 }
3476
3477 return 1;
3478 }
3479
3480 #endif
3481 /**
3482 * e1000_clean_tx_irq - Reclaim resources after transmit completes
3483 * @adapter: board private structure
3484 **/
3485
3486 static boolean_t
3487 e1000_clean_tx_irq(struct e1000_adapter *adapter,
3488 struct e1000_tx_ring *tx_ring)
3489 {
3490 struct net_device *netdev = adapter->netdev;
3491 struct e1000_tx_desc *tx_desc, *eop_desc;
3492 struct e1000_buffer *buffer_info;
3493 unsigned int i, eop;
3494 #ifdef CONFIG_E1000_NAPI
3495 unsigned int count = 0;
3496 #endif
3497 boolean_t cleaned = FALSE;
3498
3499 i = tx_ring->next_to_clean;
3500 eop = tx_ring->buffer_info[i].next_to_watch;
3501 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3502
3503 while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
3504 for (cleaned = FALSE; !cleaned; ) {
3505 tx_desc = E1000_TX_DESC(*tx_ring, i);
3506 buffer_info = &tx_ring->buffer_info[i];
3507 cleaned = (i == eop);
3508
3509 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
3510 memset(tx_desc, 0, sizeof(struct e1000_tx_desc));
3511
3512 if (unlikely(++i == tx_ring->count)) i = 0;
3513 }
3514
3515
3516 eop = tx_ring->buffer_info[i].next_to_watch;
3517 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3518 #ifdef CONFIG_E1000_NAPI
3519 #define E1000_TX_WEIGHT 64
3520 /* weight of a sort for tx, to avoid endless transmit cleanup */
3521 if (count++ == E1000_TX_WEIGHT) break;
3522 #endif
3523 }
3524
3525 tx_ring->next_to_clean = i;
3526
3527 #define TX_WAKE_THRESHOLD 32
3528 if (unlikely(cleaned && netif_queue_stopped(netdev) &&
3529 netif_carrier_ok(netdev))) {
3530 spin_lock(&tx_ring->tx_lock);
3531 if (netif_queue_stopped(netdev) &&
3532 (E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD))
3533 netif_wake_queue(netdev);
3534 spin_unlock(&tx_ring->tx_lock);
3535 }
3536
3537 if (adapter->detect_tx_hung) {
3538 /* Detect a transmit hang in hardware, this serializes the
3539 * check with the clearing of time_stamp and movement of i */
3540 adapter->detect_tx_hung = FALSE;
3541 if (tx_ring->buffer_info[eop].dma &&
3542 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
3543 (adapter->tx_timeout_factor * HZ))
3544 && !(E1000_READ_REG(&adapter->hw, STATUS) &
3545 E1000_STATUS_TXOFF)) {
3546
3547 /* detected Tx unit hang */
3548 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
3549 " Tx Queue <%lu>\n"
3550 " TDH <%x>\n"
3551 " TDT <%x>\n"
3552 " next_to_use <%x>\n"
3553 " next_to_clean <%x>\n"
3554 "buffer_info[next_to_clean]\n"
3555 " time_stamp <%lx>\n"
3556 " next_to_watch <%x>\n"
3557 " jiffies <%lx>\n"
3558 " next_to_watch.status <%x>\n",
3559 (unsigned long)((tx_ring - adapter->tx_ring) /
3560 sizeof(struct e1000_tx_ring)),
3561 readl(adapter->hw.hw_addr + tx_ring->tdh),
3562 readl(adapter->hw.hw_addr + tx_ring->tdt),
3563 tx_ring->next_to_use,
3564 tx_ring->next_to_clean,
3565 tx_ring->buffer_info[eop].time_stamp,
3566 eop,
3567 jiffies,
3568 eop_desc->upper.fields.status);
3569 netif_stop_queue(netdev);
3570 }
3571 }
3572 return cleaned;
3573 }
3574
3575 /**
3576 * e1000_rx_checksum - Receive Checksum Offload for 82543
3577 * @adapter: board private structure
3578 * @status_err: receive descriptor status and error fields
3579 * @csum: receive descriptor csum field
3580 * @sk_buff: socket buffer with received data
3581 **/
3582
3583 static void
3584 e1000_rx_checksum(struct e1000_adapter *adapter,
3585 uint32_t status_err, uint32_t csum,
3586 struct sk_buff *skb)
3587 {
3588 uint16_t status = (uint16_t)status_err;
3589 uint8_t errors = (uint8_t)(status_err >> 24);
3590 skb->ip_summed = CHECKSUM_NONE;
3591
3592 /* 82543 or newer only */
3593 if (unlikely(adapter->hw.mac_type < e1000_82543)) return;
3594 /* Ignore Checksum bit is set */
3595 if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
3596 /* TCP/UDP checksum error bit is set */
3597 if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
3598 /* let the stack verify checksum errors */
3599 adapter->hw_csum_err++;
3600 return;
3601 }
3602 /* TCP/UDP Checksum has not been calculated */
3603 if (adapter->hw.mac_type <= e1000_82547_rev_2) {
3604 if (!(status & E1000_RXD_STAT_TCPCS))
3605 return;
3606 } else {
3607 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
3608 return;
3609 }
3610 /* It must be a TCP or UDP packet with a valid checksum */
3611 if (likely(status & E1000_RXD_STAT_TCPCS)) {
3612 /* TCP checksum is good */
3613 skb->ip_summed = CHECKSUM_UNNECESSARY;
3614 } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
3615 /* IP fragment with UDP payload */
3616 /* Hardware complements the payload checksum, so we undo it
3617 * and then put the value in host order for further stack use.
3618 */
3619 csum = ntohl(csum ^ 0xFFFF);
3620 skb->csum = csum;
3621 skb->ip_summed = CHECKSUM_HW;
3622 }
3623 adapter->hw_csum_good++;
3624 }
3625
3626 /**
3627 * e1000_clean_rx_irq - Send received data up the network stack; legacy
3628 * @adapter: board private structure
3629 **/
3630
3631 static boolean_t
3632 #ifdef CONFIG_E1000_NAPI
3633 e1000_clean_rx_irq(struct e1000_adapter *adapter,
3634 struct e1000_rx_ring *rx_ring,
3635 int *work_done, int work_to_do)
3636 #else
3637 e1000_clean_rx_irq(struct e1000_adapter *adapter,
3638 struct e1000_rx_ring *rx_ring)
3639 #endif
3640 {
3641 struct net_device *netdev = adapter->netdev;
3642 struct pci_dev *pdev = adapter->pdev;
3643 struct e1000_rx_desc *rx_desc, *next_rxd;
3644 struct e1000_buffer *buffer_info, *next_buffer;
3645 unsigned long flags;
3646 uint32_t length;
3647 uint8_t last_byte;
3648 unsigned int i;
3649 int cleaned_count = 0;
3650 boolean_t cleaned = FALSE;
3651
3652 i = rx_ring->next_to_clean;
3653 rx_desc = E1000_RX_DESC(*rx_ring, i);
3654 buffer_info = &rx_ring->buffer_info[i];
3655
3656 while (rx_desc->status & E1000_RXD_STAT_DD) {
3657 struct sk_buff *skb;
3658 u8 status;
3659 #ifdef CONFIG_E1000_NAPI
3660 if (*work_done >= work_to_do)
3661 break;
3662 (*work_done)++;
3663 #endif
3664 status = rx_desc->status;
3665 skb = buffer_info->skb;
3666 buffer_info->skb = NULL;
3667
3668 prefetch(skb->data - NET_IP_ALIGN);
3669
3670 if (++i == rx_ring->count) i = 0;
3671 next_rxd = E1000_RX_DESC(*rx_ring, i);
3672 prefetch(next_rxd);
3673
3674 next_buffer = &rx_ring->buffer_info[i];
3675
3676 cleaned = TRUE;
3677 cleaned_count++;
3678 pci_unmap_single(pdev,
3679 buffer_info->dma,
3680 buffer_info->length,
3681 PCI_DMA_FROMDEVICE);
3682
3683 length = le16_to_cpu(rx_desc->length);
3684
3685 if (unlikely(!(status & E1000_RXD_STAT_EOP))) {
3686 /* All receives must fit into a single buffer */
3687 E1000_DBG("%s: Receive packet consumed multiple"
3688 " buffers\n", netdev->name);
3689 /* recycle */
3690 buffer_info-> skb = skb;
3691 goto next_desc;
3692 }
3693
3694 if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
3695 last_byte = *(skb->data + length - 1);
3696 if (TBI_ACCEPT(&adapter->hw, status,
3697 rx_desc->errors, length, last_byte)) {
3698 spin_lock_irqsave(&adapter->stats_lock, flags);
3699 e1000_tbi_adjust_stats(&adapter->hw,
3700 &adapter->stats,
3701 length, skb->data);
3702 spin_unlock_irqrestore(&adapter->stats_lock,
3703 flags);
3704 length--;
3705 } else {
3706 /* recycle */
3707 buffer_info->skb = skb;
3708 goto next_desc;
3709 }
3710 }
3711
3712 /* code added for copybreak, this should improve
3713 * performance for small packets with large amounts
3714 * of reassembly being done in the stack */
3715 #define E1000_CB_LENGTH 256
3716 if (length < E1000_CB_LENGTH) {
3717 struct sk_buff *new_skb =
3718 dev_alloc_skb(length + NET_IP_ALIGN);
3719 if (new_skb) {
3720 skb_reserve(new_skb, NET_IP_ALIGN);
3721 new_skb->dev = netdev;
3722 memcpy(new_skb->data - NET_IP_ALIGN,
3723 skb->data - NET_IP_ALIGN,
3724 length + NET_IP_ALIGN);
3725 /* save the skb in buffer_info as good */
3726 buffer_info->skb = skb;
3727 skb = new_skb;
3728 skb_put(skb, length);
3729 }
3730 } else
3731 skb_put(skb, length);
3732
3733 /* end copybreak code */
3734
3735 /* Receive Checksum Offload */
3736 e1000_rx_checksum(adapter,
3737 (uint32_t)(status) |
3738 ((uint32_t)(rx_desc->errors) << 24),
3739 le16_to_cpu(rx_desc->csum), skb);
3740
3741 skb->protocol = eth_type_trans(skb, netdev);
3742 #ifdef CONFIG_E1000_NAPI
3743 if (unlikely(adapter->vlgrp &&
3744 (status & E1000_RXD_STAT_VP))) {
3745 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
3746 le16_to_cpu(rx_desc->special) &
3747 E1000_RXD_SPC_VLAN_MASK);
3748 } else {
3749 netif_receive_skb(skb);
3750 }
3751 #else /* CONFIG_E1000_NAPI */
3752 if (unlikely(adapter->vlgrp &&
3753 (status & E1000_RXD_STAT_VP))) {
3754 vlan_hwaccel_rx(skb, adapter->vlgrp,
3755 le16_to_cpu(rx_desc->special) &
3756 E1000_RXD_SPC_VLAN_MASK);
3757 } else {
3758 netif_rx(skb);
3759 }
3760 #endif /* CONFIG_E1000_NAPI */
3761 netdev->last_rx = jiffies;
3762
3763 next_desc:
3764 rx_desc->status = 0;
3765
3766 /* return some buffers to hardware, one at a time is too slow */
3767 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
3768 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3769 cleaned_count = 0;
3770 }
3771
3772 /* use prefetched values */
3773 rx_desc = next_rxd;
3774 buffer_info = next_buffer;
3775 }
3776 rx_ring->next_to_clean = i;
3777
3778 cleaned_count = E1000_DESC_UNUSED(rx_ring);
3779 if (cleaned_count)
3780 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3781
3782 return cleaned;
3783 }
3784
3785 /**
3786 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
3787 * @adapter: board private structure
3788 **/
3789
3790 static boolean_t
3791 #ifdef CONFIG_E1000_NAPI
3792 e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
3793 struct e1000_rx_ring *rx_ring,
3794 int *work_done, int work_to_do)
3795 #else
3796 e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
3797 struct e1000_rx_ring *rx_ring)
3798 #endif
3799 {
3800 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
3801 struct net_device *netdev = adapter->netdev;
3802 struct pci_dev *pdev = adapter->pdev;
3803 struct e1000_buffer *buffer_info, *next_buffer;
3804 struct e1000_ps_page *ps_page;
3805 struct e1000_ps_page_dma *ps_page_dma;
3806 struct sk_buff *skb;
3807 unsigned int i, j;
3808 uint32_t length, staterr;
3809 int cleaned_count = 0;
3810 boolean_t cleaned = FALSE;
3811
3812 i = rx_ring->next_to_clean;
3813 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
3814 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
3815 buffer_info = &rx_ring->buffer_info[i];
3816
3817 while (staterr & E1000_RXD_STAT_DD) {
3818 ps_page = &rx_ring->ps_page[i];
3819 ps_page_dma = &rx_ring->ps_page_dma[i];
3820 #ifdef CONFIG_E1000_NAPI
3821 if (unlikely(*work_done >= work_to_do))
3822 break;
3823 (*work_done)++;
3824 #endif
3825 skb = buffer_info->skb;
3826
3827 /* in the packet split case this is header only */
3828 prefetch(skb->data - NET_IP_ALIGN);
3829
3830 if (++i == rx_ring->count) i = 0;
3831 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
3832 prefetch(next_rxd);
3833
3834 next_buffer = &rx_ring->buffer_info[i];
3835
3836 cleaned = TRUE;
3837 cleaned_count++;
3838 pci_unmap_single(pdev, buffer_info->dma,
3839 buffer_info->length,
3840 PCI_DMA_FROMDEVICE);
3841
3842 if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
3843 E1000_DBG("%s: Packet Split buffers didn't pick up"
3844 " the full packet\n", netdev->name);
3845 dev_kfree_skb_irq(skb);
3846 goto next_desc;
3847 }
3848
3849 if (unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
3850 dev_kfree_skb_irq(skb);
3851 goto next_desc;
3852 }
3853
3854 length = le16_to_cpu(rx_desc->wb.middle.length0);
3855
3856 if (unlikely(!length)) {
3857 E1000_DBG("%s: Last part of the packet spanning"
3858 " multiple descriptors\n", netdev->name);
3859 dev_kfree_skb_irq(skb);
3860 goto next_desc;
3861 }
3862
3863 /* Good Receive */
3864 skb_put(skb, length);
3865
3866 {
3867 /* this looks ugly, but it seems compiler issues make it
3868 more efficient than reusing j */
3869 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
3870
3871 /* page alloc/put takes too long and effects small packet
3872 * throughput, so unsplit small packets and save the alloc/put*/
3873 if (l1 && ((length + l1) <= adapter->rx_ps_bsize0)) {
3874 u8 *vaddr;
3875 /* there is no documentation about how to call
3876 * kmap_atomic, so we can't hold the mapping
3877 * very long */
3878 pci_dma_sync_single_for_cpu(pdev,
3879 ps_page_dma->ps_page_dma[0],
3880 PAGE_SIZE,
3881 PCI_DMA_FROMDEVICE);
3882 vaddr = kmap_atomic(ps_page->ps_page[0],
3883 KM_SKB_DATA_SOFTIRQ);
3884 memcpy(skb->tail, vaddr, l1);
3885 kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
3886 pci_dma_sync_single_for_device(pdev,
3887 ps_page_dma->ps_page_dma[0],
3888 PAGE_SIZE, PCI_DMA_FROMDEVICE);
3889 skb_put(skb, l1);
3890 length += l1;
3891 goto copydone;
3892 } /* if */
3893 }
3894
3895 for (j = 0; j < adapter->rx_ps_pages; j++) {
3896 if (!(length= le16_to_cpu(rx_desc->wb.upper.length[j])))
3897 break;
3898 pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
3899 PAGE_SIZE, PCI_DMA_FROMDEVICE);
3900 ps_page_dma->ps_page_dma[j] = 0;
3901 skb_fill_page_desc(skb, j, ps_page->ps_page[j], 0,
3902 length);
3903 ps_page->ps_page[j] = NULL;
3904 skb->len += length;
3905 skb->data_len += length;
3906 skb->truesize += length;
3907 }
3908
3909 copydone:
3910 e1000_rx_checksum(adapter, staterr,
3911 le16_to_cpu(rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
3912 skb->protocol = eth_type_trans(skb, netdev);
3913
3914 if (likely(rx_desc->wb.upper.header_status &
3915 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP)))
3916 adapter->rx_hdr_split++;
3917 #ifdef CONFIG_E1000_NAPI
3918 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
3919 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
3920 le16_to_cpu(rx_desc->wb.middle.vlan) &
3921 E1000_RXD_SPC_VLAN_MASK);
3922 } else {
3923 netif_receive_skb(skb);
3924 }
3925 #else /* CONFIG_E1000_NAPI */
3926 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
3927 vlan_hwaccel_rx(skb, adapter->vlgrp,
3928 le16_to_cpu(rx_desc->wb.middle.vlan) &
3929 E1000_RXD_SPC_VLAN_MASK);
3930 } else {
3931 netif_rx(skb);
3932 }
3933 #endif /* CONFIG_E1000_NAPI */
3934 netdev->last_rx = jiffies;
3935
3936 next_desc:
3937 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
3938 buffer_info->skb = NULL;
3939
3940 /* return some buffers to hardware, one at a time is too slow */
3941 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
3942 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3943 cleaned_count = 0;
3944 }
3945
3946 /* use prefetched values */
3947 rx_desc = next_rxd;
3948 buffer_info = next_buffer;
3949
3950 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
3951 }
3952 rx_ring->next_to_clean = i;
3953
3954 cleaned_count = E1000_DESC_UNUSED(rx_ring);
3955 if (cleaned_count)
3956 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3957
3958 return cleaned;
3959 }
3960
3961 /**
3962 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
3963 * @adapter: address of board private structure
3964 **/
3965
3966 static void
3967 e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
3968 struct e1000_rx_ring *rx_ring,
3969 int cleaned_count)
3970 {
3971 struct net_device *netdev = adapter->netdev;
3972 struct pci_dev *pdev = adapter->pdev;
3973 struct e1000_rx_desc *rx_desc;
3974 struct e1000_buffer *buffer_info;
3975 struct sk_buff *skb;
3976 unsigned int i;
3977 unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
3978
3979 i = rx_ring->next_to_use;
3980 buffer_info = &rx_ring->buffer_info[i];
3981
3982 while (cleaned_count--) {
3983 if (!(skb = buffer_info->skb))
3984 skb = dev_alloc_skb(bufsz);
3985 else {
3986 skb_trim(skb, 0);
3987 goto map_skb;
3988 }
3989
3990 if (unlikely(!skb)) {
3991 /* Better luck next round */
3992 adapter->alloc_rx_buff_failed++;
3993 break;
3994 }
3995
3996 /* Fix for errata 23, can't cross 64kB boundary */
3997 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
3998 struct sk_buff *oldskb = skb;
3999 DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
4000 "at %p\n", bufsz, skb->data);
4001 /* Try again, without freeing the previous */
4002 skb = dev_alloc_skb(bufsz);
4003 /* Failed allocation, critical failure */
4004 if (!skb) {
4005 dev_kfree_skb(oldskb);
4006 break;
4007 }
4008
4009 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4010 /* give up */
4011 dev_kfree_skb(skb);
4012 dev_kfree_skb(oldskb);
4013 break; /* while !buffer_info->skb */
4014 } else {
4015 /* Use new allocation */
4016 dev_kfree_skb(oldskb);
4017 }
4018 }
4019 /* Make buffer alignment 2 beyond a 16 byte boundary
4020 * this will result in a 16 byte aligned IP header after
4021 * the 14 byte MAC header is removed
4022 */
4023 skb_reserve(skb, NET_IP_ALIGN);
4024
4025 skb->dev = netdev;
4026
4027 buffer_info->skb = skb;
4028 buffer_info->length = adapter->rx_buffer_len;
4029 map_skb:
4030 buffer_info->dma = pci_map_single(pdev,
4031 skb->data,
4032 adapter->rx_buffer_len,
4033 PCI_DMA_FROMDEVICE);
4034
4035 /* Fix for errata 23, can't cross 64kB boundary */
4036 if (!e1000_check_64k_bound(adapter,
4037 (void *)(unsigned long)buffer_info->dma,
4038 adapter->rx_buffer_len)) {
4039 DPRINTK(RX_ERR, ERR,
4040 "dma align check failed: %u bytes at %p\n",
4041 adapter->rx_buffer_len,
4042 (void *)(unsigned long)buffer_info->dma);
4043 dev_kfree_skb(skb);
4044 buffer_info->skb = NULL;
4045
4046 pci_unmap_single(pdev, buffer_info->dma,
4047 adapter->rx_buffer_len,
4048 PCI_DMA_FROMDEVICE);
4049
4050 break; /* while !buffer_info->skb */
4051 }
4052 rx_desc = E1000_RX_DESC(*rx_ring, i);
4053 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4054
4055 if (unlikely(++i == rx_ring->count))
4056 i = 0;
4057 buffer_info = &rx_ring->buffer_info[i];
4058 }
4059
4060 if (likely(rx_ring->next_to_use != i)) {
4061 rx_ring->next_to_use = i;
4062 if (unlikely(i-- == 0))
4063 i = (rx_ring->count - 1);
4064
4065 /* Force memory writes to complete before letting h/w
4066 * know there are new descriptors to fetch. (Only
4067 * applicable for weak-ordered memory model archs,
4068 * such as IA-64). */
4069 wmb();
4070 writel(i, adapter->hw.hw_addr + rx_ring->rdt);
4071 }
4072 }
4073
4074 /**
4075 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
4076 * @adapter: address of board private structure
4077 **/
4078
4079 static void
4080 e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
4081 struct e1000_rx_ring *rx_ring,
4082 int cleaned_count)
4083 {
4084 struct net_device *netdev = adapter->netdev;
4085 struct pci_dev *pdev = adapter->pdev;
4086 union e1000_rx_desc_packet_split *rx_desc;
4087 struct e1000_buffer *buffer_info;
4088 struct e1000_ps_page *ps_page;
4089 struct e1000_ps_page_dma *ps_page_dma;
4090 struct sk_buff *skb;
4091 unsigned int i, j;
4092
4093 i = rx_ring->next_to_use;
4094 buffer_info = &rx_ring->buffer_info[i];
4095 ps_page = &rx_ring->ps_page[i];
4096 ps_page_dma = &rx_ring->ps_page_dma[i];
4097
4098 while (cleaned_count--) {
4099 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
4100
4101 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
4102 if (j < adapter->rx_ps_pages) {
4103 if (likely(!ps_page->ps_page[j])) {
4104 ps_page->ps_page[j] =
4105 alloc_page(GFP_ATOMIC);
4106 if (unlikely(!ps_page->ps_page[j])) {
4107 adapter->alloc_rx_buff_failed++;
4108 goto no_buffers;
4109 }
4110 ps_page_dma->ps_page_dma[j] =
4111 pci_map_page(pdev,
4112 ps_page->ps_page[j],
4113 0, PAGE_SIZE,
4114 PCI_DMA_FROMDEVICE);
4115 }
4116 /* Refresh the desc even if buffer_addrs didn't
4117 * change because each write-back erases
4118 * this info.
4119 */
4120 rx_desc->read.buffer_addr[j+1] =
4121 cpu_to_le64(ps_page_dma->ps_page_dma[j]);
4122 } else
4123 rx_desc->read.buffer_addr[j+1] = ~0;
4124 }
4125
4126 skb = dev_alloc_skb(adapter->rx_ps_bsize0 + NET_IP_ALIGN);
4127
4128 if (unlikely(!skb)) {
4129 adapter->alloc_rx_buff_failed++;
4130 break;
4131 }
4132
4133 /* Make buffer alignment 2 beyond a 16 byte boundary
4134 * this will result in a 16 byte aligned IP header after
4135 * the 14 byte MAC header is removed
4136 */
4137 skb_reserve(skb, NET_IP_ALIGN);
4138
4139 skb->dev = netdev;
4140
4141 buffer_info->skb = skb;
4142 buffer_info->length = adapter->rx_ps_bsize0;
4143 buffer_info->dma = pci_map_single(pdev, skb->data,
4144 adapter->rx_ps_bsize0,
4145 PCI_DMA_FROMDEVICE);
4146
4147 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
4148
4149 if (unlikely(++i == rx_ring->count)) i = 0;
4150 buffer_info = &rx_ring->buffer_info[i];
4151 ps_page = &rx_ring->ps_page[i];
4152 ps_page_dma = &rx_ring->ps_page_dma[i];
4153 }
4154
4155 no_buffers:
4156 if (likely(rx_ring->next_to_use != i)) {
4157 rx_ring->next_to_use = i;
4158 if (unlikely(i-- == 0)) i = (rx_ring->count - 1);
4159
4160 /* Force memory writes to complete before letting h/w
4161 * know there are new descriptors to fetch. (Only
4162 * applicable for weak-ordered memory model archs,
4163 * such as IA-64). */
4164 wmb();
4165 /* Hardware increments by 16 bytes, but packet split
4166 * descriptors are 32 bytes...so we increment tail
4167 * twice as much.
4168 */
4169 writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
4170 }
4171 }
4172
4173 /**
4174 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
4175 * @adapter:
4176 **/
4177
4178 static void
4179 e1000_smartspeed(struct e1000_adapter *adapter)
4180 {
4181 uint16_t phy_status;
4182 uint16_t phy_ctrl;
4183
4184 if ((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
4185 !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
4186 return;
4187
4188 if (adapter->smartspeed == 0) {
4189 /* If Master/Slave config fault is asserted twice,
4190 * we assume back-to-back */
4191 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
4192 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
4193 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
4194 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
4195 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
4196 if (phy_ctrl & CR_1000T_MS_ENABLE) {
4197 phy_ctrl &= ~CR_1000T_MS_ENABLE;
4198 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
4199 phy_ctrl);
4200 adapter->smartspeed++;
4201 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
4202 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
4203 &phy_ctrl)) {
4204 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4205 MII_CR_RESTART_AUTO_NEG);
4206 e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
4207 phy_ctrl);
4208 }
4209 }
4210 return;
4211 } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
4212 /* If still no link, perhaps using 2/3 pair cable */
4213 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
4214 phy_ctrl |= CR_1000T_MS_ENABLE;
4215 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
4216 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
4217 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
4218 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4219 MII_CR_RESTART_AUTO_NEG);
4220 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
4221 }
4222 }
4223 /* Restart process after E1000_SMARTSPEED_MAX iterations */
4224 if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
4225 adapter->smartspeed = 0;
4226 }
4227
4228 /**
4229 * e1000_ioctl -
4230 * @netdev:
4231 * @ifreq:
4232 * @cmd:
4233 **/
4234
4235 static int
4236 e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4237 {
4238 switch (cmd) {
4239 case SIOCGMIIPHY:
4240 case SIOCGMIIREG:
4241 case SIOCSMIIREG:
4242 return e1000_mii_ioctl(netdev, ifr, cmd);
4243 default:
4244 return -EOPNOTSUPP;
4245 }
4246 }
4247
4248 /**
4249 * e1000_mii_ioctl -
4250 * @netdev:
4251 * @ifreq:
4252 * @cmd:
4253 **/
4254
4255 static int
4256 e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4257 {
4258 struct e1000_adapter *adapter = netdev_priv(netdev);
4259 struct mii_ioctl_data *data = if_mii(ifr);
4260 int retval;
4261 uint16_t mii_reg;
4262 uint16_t spddplx;
4263 unsigned long flags;
4264
4265 if (adapter->hw.media_type != e1000_media_type_copper)
4266 return -EOPNOTSUPP;
4267
4268 switch (cmd) {
4269 case SIOCGMIIPHY:
4270 data->phy_id = adapter->hw.phy_addr;
4271 break;
4272 case SIOCGMIIREG:
4273 if (!capable(CAP_NET_ADMIN))
4274 return -EPERM;
4275 spin_lock_irqsave(&adapter->stats_lock, flags);
4276 if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
4277 &data->val_out)) {
4278 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4279 return -EIO;
4280 }
4281 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4282 break;
4283 case SIOCSMIIREG:
4284 if (!capable(CAP_NET_ADMIN))
4285 return -EPERM;
4286 if (data->reg_num & ~(0x1F))
4287 return -EFAULT;
4288 mii_reg = data->val_in;
4289 spin_lock_irqsave(&adapter->stats_lock, flags);
4290 if (e1000_write_phy_reg(&adapter->hw, data->reg_num,
4291 mii_reg)) {
4292 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4293 return -EIO;
4294 }
4295 if (adapter->hw.media_type == e1000_media_type_copper) {
4296 switch (data->reg_num) {
4297 case PHY_CTRL:
4298 if (mii_reg & MII_CR_POWER_DOWN)
4299 break;
4300 if (mii_reg & MII_CR_AUTO_NEG_EN) {
4301 adapter->hw.autoneg = 1;
4302 adapter->hw.autoneg_advertised = 0x2F;
4303 } else {
4304 if (mii_reg & 0x40)
4305 spddplx = SPEED_1000;
4306 else if (mii_reg & 0x2000)
4307 spddplx = SPEED_100;
4308 else
4309 spddplx = SPEED_10;
4310 spddplx += (mii_reg & 0x100)
4311 ? DUPLEX_FULL :
4312 DUPLEX_HALF;
4313 retval = e1000_set_spd_dplx(adapter,
4314 spddplx);
4315 if (retval) {
4316 spin_unlock_irqrestore(
4317 &adapter->stats_lock,
4318 flags);
4319 return retval;
4320 }
4321 }
4322 if (netif_running(adapter->netdev))
4323 e1000_reinit_locked(adapter);
4324 else
4325 e1000_reset(adapter);
4326 break;
4327 case M88E1000_PHY_SPEC_CTRL:
4328 case M88E1000_EXT_PHY_SPEC_CTRL:
4329 if (e1000_phy_reset(&adapter->hw)) {
4330 spin_unlock_irqrestore(
4331 &adapter->stats_lock, flags);
4332 return -EIO;
4333 }
4334 break;
4335 }
4336 } else {
4337 switch (data->reg_num) {
4338 case PHY_CTRL:
4339 if (mii_reg & MII_CR_POWER_DOWN)
4340 break;
4341 if (netif_running(adapter->netdev))
4342 e1000_reinit_locked(adapter);
4343 else
4344 e1000_reset(adapter);
4345 break;
4346 }
4347 }
4348 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4349 break;
4350 default:
4351 return -EOPNOTSUPP;
4352 }
4353 return E1000_SUCCESS;
4354 }
4355
4356 void
4357 e1000_pci_set_mwi(struct e1000_hw *hw)
4358 {
4359 struct e1000_adapter *adapter = hw->back;
4360 int ret_val = pci_set_mwi(adapter->pdev);
4361
4362 if (ret_val)
4363 DPRINTK(PROBE, ERR, "Error in setting MWI\n");
4364 }
4365
4366 void
4367 e1000_pci_clear_mwi(struct e1000_hw *hw)
4368 {
4369 struct e1000_adapter *adapter = hw->back;
4370
4371 pci_clear_mwi(adapter->pdev);
4372 }
4373
4374 void
4375 e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4376 {
4377 struct e1000_adapter *adapter = hw->back;
4378
4379 pci_read_config_word(adapter->pdev, reg, value);
4380 }
4381
4382 void
4383 e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4384 {
4385 struct e1000_adapter *adapter = hw->back;
4386
4387 pci_write_config_word(adapter->pdev, reg, *value);
4388 }
4389
4390 uint32_t
4391 e1000_io_read(struct e1000_hw *hw, unsigned long port)
4392 {
4393 return inl(port);
4394 }
4395
4396 void
4397 e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
4398 {
4399 outl(value, port);
4400 }
4401
4402 static void
4403 e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
4404 {
4405 struct e1000_adapter *adapter = netdev_priv(netdev);
4406 uint32_t ctrl, rctl;
4407
4408 e1000_irq_disable(adapter);
4409 adapter->vlgrp = grp;
4410
4411 if (grp) {
4412 /* enable VLAN tag insert/strip */
4413 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4414 ctrl |= E1000_CTRL_VME;
4415 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4416
4417 if (adapter->hw.mac_type != e1000_ich8lan) {
4418 /* enable VLAN receive filtering */
4419 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4420 rctl |= E1000_RCTL_VFE;
4421 rctl &= ~E1000_RCTL_CFIEN;
4422 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4423 e1000_update_mng_vlan(adapter);
4424 }
4425 } else {
4426 /* disable VLAN tag insert/strip */
4427 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4428 ctrl &= ~E1000_CTRL_VME;
4429 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4430
4431 if (adapter->hw.mac_type != e1000_ich8lan) {
4432 /* disable VLAN filtering */
4433 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4434 rctl &= ~E1000_RCTL_VFE;
4435 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4436 if (adapter->mng_vlan_id != (uint16_t)E1000_MNG_VLAN_NONE) {
4437 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
4438 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4439 }
4440 }
4441 }
4442
4443 e1000_irq_enable(adapter);
4444 }
4445
4446 static void
4447 e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
4448 {
4449 struct e1000_adapter *adapter = netdev_priv(netdev);
4450 uint32_t vfta, index;
4451
4452 if ((adapter->hw.mng_cookie.status &
4453 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4454 (vid == adapter->mng_vlan_id))
4455 return;
4456 /* add VID to filter table */
4457 index = (vid >> 5) & 0x7F;
4458 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4459 vfta |= (1 << (vid & 0x1F));
4460 e1000_write_vfta(&adapter->hw, index, vfta);
4461 }
4462
4463 static void
4464 e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
4465 {
4466 struct e1000_adapter *adapter = netdev_priv(netdev);
4467 uint32_t vfta, index;
4468
4469 e1000_irq_disable(adapter);
4470
4471 if (adapter->vlgrp)
4472 adapter->vlgrp->vlan_devices[vid] = NULL;
4473
4474 e1000_irq_enable(adapter);
4475
4476 if ((adapter->hw.mng_cookie.status &
4477 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4478 (vid == adapter->mng_vlan_id)) {
4479 /* release control to f/w */
4480 e1000_release_hw_control(adapter);
4481 return;
4482 }
4483
4484 /* remove VID from filter table */
4485 index = (vid >> 5) & 0x7F;
4486 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4487 vfta &= ~(1 << (vid & 0x1F));
4488 e1000_write_vfta(&adapter->hw, index, vfta);
4489 }
4490
4491 static void
4492 e1000_restore_vlan(struct e1000_adapter *adapter)
4493 {
4494 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
4495
4496 if (adapter->vlgrp) {
4497 uint16_t vid;
4498 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
4499 if (!adapter->vlgrp->vlan_devices[vid])
4500 continue;
4501 e1000_vlan_rx_add_vid(adapter->netdev, vid);
4502 }
4503 }
4504 }
4505
4506 int
4507 e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
4508 {
4509 adapter->hw.autoneg = 0;
4510
4511 /* Fiber NICs only allow 1000 gbps Full duplex */
4512 if ((adapter->hw.media_type == e1000_media_type_fiber) &&
4513 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
4514 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
4515 return -EINVAL;
4516 }
4517
4518 switch (spddplx) {
4519 case SPEED_10 + DUPLEX_HALF:
4520 adapter->hw.forced_speed_duplex = e1000_10_half;
4521 break;
4522 case SPEED_10 + DUPLEX_FULL:
4523 adapter->hw.forced_speed_duplex = e1000_10_full;
4524 break;
4525 case SPEED_100 + DUPLEX_HALF:
4526 adapter->hw.forced_speed_duplex = e1000_100_half;
4527 break;
4528 case SPEED_100 + DUPLEX_FULL:
4529 adapter->hw.forced_speed_duplex = e1000_100_full;
4530 break;
4531 case SPEED_1000 + DUPLEX_FULL:
4532 adapter->hw.autoneg = 1;
4533 adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
4534 break;
4535 case SPEED_1000 + DUPLEX_HALF: /* not supported */
4536 default:
4537 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
4538 return -EINVAL;
4539 }
4540 return 0;
4541 }
4542
4543 #ifdef CONFIG_PM
4544 /* Save/restore 16 or 64 dwords of PCI config space depending on which
4545 * bus we're on (PCI(X) vs. PCI-E)
4546 */
4547 #define PCIE_CONFIG_SPACE_LEN 256
4548 #define PCI_CONFIG_SPACE_LEN 64
4549 static int
4550 e1000_pci_save_state(struct e1000_adapter *adapter)
4551 {
4552 struct pci_dev *dev = adapter->pdev;
4553 int size;
4554 int i;
4555
4556 if (adapter->hw.mac_type >= e1000_82571)
4557 size = PCIE_CONFIG_SPACE_LEN;
4558 else
4559 size = PCI_CONFIG_SPACE_LEN;
4560
4561 WARN_ON(adapter->config_space != NULL);
4562
4563 adapter->config_space = kmalloc(size, GFP_KERNEL);
4564 if (!adapter->config_space) {
4565 DPRINTK(PROBE, ERR, "unable to allocate %d bytes\n", size);
4566 return -ENOMEM;
4567 }
4568 for (i = 0; i < (size / 4); i++)
4569 pci_read_config_dword(dev, i * 4, &adapter->config_space[i]);
4570 return 0;
4571 }
4572
4573 static void
4574 e1000_pci_restore_state(struct e1000_adapter *adapter)
4575 {
4576 struct pci_dev *dev = adapter->pdev;
4577 int size;
4578 int i;
4579
4580 if (adapter->config_space == NULL)
4581 return;
4582
4583 if (adapter->hw.mac_type >= e1000_82571)
4584 size = PCIE_CONFIG_SPACE_LEN;
4585 else
4586 size = PCI_CONFIG_SPACE_LEN;
4587 for (i = 0; i < (size / 4); i++)
4588 pci_write_config_dword(dev, i * 4, adapter->config_space[i]);
4589 kfree(adapter->config_space);
4590 adapter->config_space = NULL;
4591 return;
4592 }
4593 #endif /* CONFIG_PM */
4594
4595 static int
4596 e1000_suspend(struct pci_dev *pdev, pm_message_t state)
4597 {
4598 struct net_device *netdev = pci_get_drvdata(pdev);
4599 struct e1000_adapter *adapter = netdev_priv(netdev);
4600 uint32_t ctrl, ctrl_ext, rctl, manc, status;
4601 uint32_t wufc = adapter->wol;
4602 #ifdef CONFIG_PM
4603 int retval = 0;
4604 #endif
4605
4606 netif_device_detach(netdev);
4607
4608 if (netif_running(netdev)) {
4609 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
4610 e1000_down(adapter);
4611 }
4612
4613 #ifdef CONFIG_PM
4614 /* Implement our own version of pci_save_state(pdev) because pci-
4615 * express adapters have 256-byte config spaces. */
4616 retval = e1000_pci_save_state(adapter);
4617 if (retval)
4618 return retval;
4619 #endif
4620
4621 status = E1000_READ_REG(&adapter->hw, STATUS);
4622 if (status & E1000_STATUS_LU)
4623 wufc &= ~E1000_WUFC_LNKC;
4624
4625 if (wufc) {
4626 e1000_setup_rctl(adapter);
4627 e1000_set_multi(netdev);
4628
4629 /* turn on all-multi mode if wake on multicast is enabled */
4630 if (adapter->wol & E1000_WUFC_MC) {
4631 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4632 rctl |= E1000_RCTL_MPE;
4633 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4634 }
4635
4636 if (adapter->hw.mac_type >= e1000_82540) {
4637 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4638 /* advertise wake from D3Cold */
4639 #define E1000_CTRL_ADVD3WUC 0x00100000
4640 /* phy power management enable */
4641 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
4642 ctrl |= E1000_CTRL_ADVD3WUC |
4643 E1000_CTRL_EN_PHY_PWR_MGMT;
4644 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4645 }
4646
4647 if (adapter->hw.media_type == e1000_media_type_fiber ||
4648 adapter->hw.media_type == e1000_media_type_internal_serdes) {
4649 /* keep the laser running in D3 */
4650 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
4651 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
4652 E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
4653 }
4654
4655 /* Allow time for pending master requests to run */
4656 e1000_disable_pciex_master(&adapter->hw);
4657
4658 E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
4659 E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
4660 pci_enable_wake(pdev, PCI_D3hot, 1);
4661 pci_enable_wake(pdev, PCI_D3cold, 1);
4662 } else {
4663 E1000_WRITE_REG(&adapter->hw, WUC, 0);
4664 E1000_WRITE_REG(&adapter->hw, WUFC, 0);
4665 pci_enable_wake(pdev, PCI_D3hot, 0);
4666 pci_enable_wake(pdev, PCI_D3cold, 0);
4667 }
4668
4669 /* FIXME: this code is incorrect for PCI Express */
4670 if (adapter->hw.mac_type >= e1000_82540 &&
4671 adapter->hw.mac_type != e1000_ich8lan &&
4672 adapter->hw.media_type == e1000_media_type_copper) {
4673 manc = E1000_READ_REG(&adapter->hw, MANC);
4674 if (manc & E1000_MANC_SMBUS_EN) {
4675 manc |= E1000_MANC_ARP_EN;
4676 E1000_WRITE_REG(&adapter->hw, MANC, manc);
4677 pci_enable_wake(pdev, PCI_D3hot, 1);
4678 pci_enable_wake(pdev, PCI_D3cold, 1);
4679 }
4680 }
4681
4682 if (adapter->hw.phy_type == e1000_phy_igp_3)
4683 e1000_phy_powerdown_workaround(&adapter->hw);
4684
4685 /* Release control of h/w to f/w. If f/w is AMT enabled, this
4686 * would have already happened in close and is redundant. */
4687 e1000_release_hw_control(adapter);
4688
4689 pci_disable_device(pdev);
4690
4691 pci_set_power_state(pdev, pci_choose_state(pdev, state));
4692
4693 return 0;
4694 }
4695
4696 #ifdef CONFIG_PM
4697 static int
4698 e1000_resume(struct pci_dev *pdev)
4699 {
4700 struct net_device *netdev = pci_get_drvdata(pdev);
4701 struct e1000_adapter *adapter = netdev_priv(netdev);
4702 uint32_t manc, ret_val;
4703
4704 pci_set_power_state(pdev, PCI_D0);
4705 e1000_pci_restore_state(adapter);
4706 ret_val = pci_enable_device(pdev);
4707 pci_set_master(pdev);
4708
4709 pci_enable_wake(pdev, PCI_D3hot, 0);
4710 pci_enable_wake(pdev, PCI_D3cold, 0);
4711
4712 e1000_reset(adapter);
4713 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
4714
4715 if (netif_running(netdev))
4716 e1000_up(adapter);
4717
4718 netif_device_attach(netdev);
4719
4720 /* FIXME: this code is incorrect for PCI Express */
4721 if (adapter->hw.mac_type >= e1000_82540 &&
4722 adapter->hw.mac_type != e1000_ich8lan &&
4723 adapter->hw.media_type == e1000_media_type_copper) {
4724 manc = E1000_READ_REG(&adapter->hw, MANC);
4725 manc &= ~(E1000_MANC_ARP_EN);
4726 E1000_WRITE_REG(&adapter->hw, MANC, manc);
4727 }
4728
4729 /* If the controller is 82573 and f/w is AMT, do not set
4730 * DRV_LOAD until the interface is up. For all other cases,
4731 * let the f/w know that the h/w is now under the control
4732 * of the driver. */
4733 if (adapter->hw.mac_type != e1000_82573 ||
4734 !e1000_check_mng_mode(&adapter->hw))
4735 e1000_get_hw_control(adapter);
4736
4737 return 0;
4738 }
4739 #endif
4740
4741 static void e1000_shutdown(struct pci_dev *pdev)
4742 {
4743 e1000_suspend(pdev, PMSG_SUSPEND);
4744 }
4745
4746 #ifdef CONFIG_NET_POLL_CONTROLLER
4747 /*
4748 * Polling 'interrupt' - used by things like netconsole to send skbs
4749 * without having to re-enable interrupts. It's not called while
4750 * the interrupt routine is executing.
4751 */
4752 static void
4753 e1000_netpoll(struct net_device *netdev)
4754 {
4755 struct e1000_adapter *adapter = netdev_priv(netdev);
4756 disable_irq(adapter->pdev->irq);
4757 e1000_intr(adapter->pdev->irq, netdev, NULL);
4758 e1000_clean_tx_irq(adapter, adapter->tx_ring);
4759 #ifndef CONFIG_E1000_NAPI
4760 adapter->clean_rx(adapter, adapter->rx_ring);
4761 #endif
4762 enable_irq(adapter->pdev->irq);
4763 }
4764 #endif
4765
4766 /**
4767 * e1000_io_error_detected - called when PCI error is detected
4768 * @pdev: Pointer to PCI device
4769 * @state: The current pci conneection state
4770 *
4771 * This function is called after a PCI bus error affecting
4772 * this device has been detected.
4773 */
4774 static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
4775 {
4776 struct net_device *netdev = pci_get_drvdata(pdev);
4777 struct e1000_adapter *adapter = netdev->priv;
4778
4779 netif_device_detach(netdev);
4780
4781 if (netif_running(netdev))
4782 e1000_down(adapter);
4783
4784 /* Request a slot slot reset. */
4785 return PCI_ERS_RESULT_NEED_RESET;
4786 }
4787
4788 /**
4789 * e1000_io_slot_reset - called after the pci bus has been reset.
4790 * @pdev: Pointer to PCI device
4791 *
4792 * Restart the card from scratch, as if from a cold-boot. Implementation
4793 * resembles the first-half of the e1000_resume routine.
4794 */
4795 static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
4796 {
4797 struct net_device *netdev = pci_get_drvdata(pdev);
4798 struct e1000_adapter *adapter = netdev->priv;
4799
4800 if (pci_enable_device(pdev)) {
4801 printk(KERN_ERR "e1000: Cannot re-enable PCI device after reset.\n");
4802 return PCI_ERS_RESULT_DISCONNECT;
4803 }
4804 pci_set_master(pdev);
4805
4806 pci_enable_wake(pdev, 3, 0);
4807 pci_enable_wake(pdev, 4, 0); /* 4 == D3 cold */
4808
4809 /* Perform card reset only on one instance of the card */
4810 if (PCI_FUNC (pdev->devfn) != 0)
4811 return PCI_ERS_RESULT_RECOVERED;
4812
4813 e1000_reset(adapter);
4814 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
4815
4816 return PCI_ERS_RESULT_RECOVERED;
4817 }
4818
4819 /**
4820 * e1000_io_resume - called when traffic can start flowing again.
4821 * @pdev: Pointer to PCI device
4822 *
4823 * This callback is called when the error recovery driver tells us that
4824 * its OK to resume normal operation. Implementation resembles the
4825 * second-half of the e1000_resume routine.
4826 */
4827 static void e1000_io_resume(struct pci_dev *pdev)
4828 {
4829 struct net_device *netdev = pci_get_drvdata(pdev);
4830 struct e1000_adapter *adapter = netdev->priv;
4831 uint32_t manc, swsm;
4832
4833 if (netif_running(netdev)) {
4834 if (e1000_up(adapter)) {
4835 printk("e1000: can't bring device back up after reset\n");
4836 return;
4837 }
4838 }
4839
4840 netif_device_attach(netdev);
4841
4842 if (adapter->hw.mac_type >= e1000_82540 &&
4843 adapter->hw.media_type == e1000_media_type_copper) {
4844 manc = E1000_READ_REG(&adapter->hw, MANC);
4845 manc &= ~(E1000_MANC_ARP_EN);
4846 E1000_WRITE_REG(&adapter->hw, MANC, manc);
4847 }
4848
4849 switch (adapter->hw.mac_type) {
4850 case e1000_82573:
4851 swsm = E1000_READ_REG(&adapter->hw, SWSM);
4852 E1000_WRITE_REG(&adapter->hw, SWSM,
4853 swsm | E1000_SWSM_DRV_LOAD);
4854 break;
4855 default:
4856 break;
4857 }
4858
4859 if (netif_running(netdev))
4860 mod_timer(&adapter->watchdog_timer, jiffies);
4861 }
4862
4863 /* e1000_main.c */
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