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Merge branch 'r6040' of git://git.kernel.org/pub/scm/linux/kernel/git/romieu/netdev...
[mirror_ubuntu-zesty-kernel.git] / drivers / net / e1000 / e1000_main.c
1 /*******************************************************************************
2
3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27 *******************************************************************************/
28
29 #include "e1000.h"
30 #include <net/ip6_checksum.h>
31
32 char e1000_driver_name[] = "e1000";
33 static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
34 #ifndef CONFIG_E1000_NAPI
35 #define DRIVERNAPI
36 #else
37 #define DRIVERNAPI "-NAPI"
38 #endif
39 #define DRV_VERSION "7.3.20-k2"DRIVERNAPI
40 const char e1000_driver_version[] = DRV_VERSION;
41 static const char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
42
43 /* e1000_pci_tbl - PCI Device ID Table
44 *
45 * Last entry must be all 0s
46 *
47 * Macro expands to...
48 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
49 */
50 #ifdef CONFIG_E1000E_ENABLED
51 #define PCIE(x)
52 #else
53 #define PCIE(x) x,
54 #endif
55
56 static struct pci_device_id e1000_pci_tbl[] = {
57 INTEL_E1000_ETHERNET_DEVICE(0x1000),
58 INTEL_E1000_ETHERNET_DEVICE(0x1001),
59 INTEL_E1000_ETHERNET_DEVICE(0x1004),
60 INTEL_E1000_ETHERNET_DEVICE(0x1008),
61 INTEL_E1000_ETHERNET_DEVICE(0x1009),
62 INTEL_E1000_ETHERNET_DEVICE(0x100C),
63 INTEL_E1000_ETHERNET_DEVICE(0x100D),
64 INTEL_E1000_ETHERNET_DEVICE(0x100E),
65 INTEL_E1000_ETHERNET_DEVICE(0x100F),
66 INTEL_E1000_ETHERNET_DEVICE(0x1010),
67 INTEL_E1000_ETHERNET_DEVICE(0x1011),
68 INTEL_E1000_ETHERNET_DEVICE(0x1012),
69 INTEL_E1000_ETHERNET_DEVICE(0x1013),
70 INTEL_E1000_ETHERNET_DEVICE(0x1014),
71 INTEL_E1000_ETHERNET_DEVICE(0x1015),
72 INTEL_E1000_ETHERNET_DEVICE(0x1016),
73 INTEL_E1000_ETHERNET_DEVICE(0x1017),
74 INTEL_E1000_ETHERNET_DEVICE(0x1018),
75 INTEL_E1000_ETHERNET_DEVICE(0x1019),
76 INTEL_E1000_ETHERNET_DEVICE(0x101A),
77 INTEL_E1000_ETHERNET_DEVICE(0x101D),
78 INTEL_E1000_ETHERNET_DEVICE(0x101E),
79 INTEL_E1000_ETHERNET_DEVICE(0x1026),
80 INTEL_E1000_ETHERNET_DEVICE(0x1027),
81 INTEL_E1000_ETHERNET_DEVICE(0x1028),
82 PCIE( INTEL_E1000_ETHERNET_DEVICE(0x1049))
83 PCIE( INTEL_E1000_ETHERNET_DEVICE(0x104A))
84 PCIE( INTEL_E1000_ETHERNET_DEVICE(0x104B))
85 PCIE( INTEL_E1000_ETHERNET_DEVICE(0x104C))
86 PCIE( INTEL_E1000_ETHERNET_DEVICE(0x104D))
87 PCIE( INTEL_E1000_ETHERNET_DEVICE(0x105E))
88 PCIE( INTEL_E1000_ETHERNET_DEVICE(0x105F))
89 PCIE( INTEL_E1000_ETHERNET_DEVICE(0x1060))
90 INTEL_E1000_ETHERNET_DEVICE(0x1075),
91 INTEL_E1000_ETHERNET_DEVICE(0x1076),
92 INTEL_E1000_ETHERNET_DEVICE(0x1077),
93 INTEL_E1000_ETHERNET_DEVICE(0x1078),
94 INTEL_E1000_ETHERNET_DEVICE(0x1079),
95 INTEL_E1000_ETHERNET_DEVICE(0x107A),
96 INTEL_E1000_ETHERNET_DEVICE(0x107B),
97 INTEL_E1000_ETHERNET_DEVICE(0x107C),
98 PCIE( INTEL_E1000_ETHERNET_DEVICE(0x107D))
99 PCIE( INTEL_E1000_ETHERNET_DEVICE(0x107E))
100 PCIE( INTEL_E1000_ETHERNET_DEVICE(0x107F))
101 INTEL_E1000_ETHERNET_DEVICE(0x108A),
102 PCIE( INTEL_E1000_ETHERNET_DEVICE(0x108B))
103 PCIE( INTEL_E1000_ETHERNET_DEVICE(0x108C))
104 PCIE( INTEL_E1000_ETHERNET_DEVICE(0x1096))
105 PCIE( INTEL_E1000_ETHERNET_DEVICE(0x1098))
106 INTEL_E1000_ETHERNET_DEVICE(0x1099),
107 PCIE( INTEL_E1000_ETHERNET_DEVICE(0x109A))
108 PCIE( INTEL_E1000_ETHERNET_DEVICE(0x10A4))
109 PCIE( INTEL_E1000_ETHERNET_DEVICE(0x10A5))
110 INTEL_E1000_ETHERNET_DEVICE(0x10B5),
111 PCIE( INTEL_E1000_ETHERNET_DEVICE(0x10B9))
112 PCIE( INTEL_E1000_ETHERNET_DEVICE(0x10BA))
113 PCIE( INTEL_E1000_ETHERNET_DEVICE(0x10BB))
114 PCIE( INTEL_E1000_ETHERNET_DEVICE(0x10BC))
115 PCIE( INTEL_E1000_ETHERNET_DEVICE(0x10C4))
116 PCIE( INTEL_E1000_ETHERNET_DEVICE(0x10C5))
117 PCIE( INTEL_E1000_ETHERNET_DEVICE(0x10D5))
118 PCIE( INTEL_E1000_ETHERNET_DEVICE(0x10D9))
119 PCIE( INTEL_E1000_ETHERNET_DEVICE(0x10DA))
120 /* required last entry */
121 {0,}
122 };
123
124 MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
125
126 int e1000_up(struct e1000_adapter *adapter);
127 void e1000_down(struct e1000_adapter *adapter);
128 void e1000_reinit_locked(struct e1000_adapter *adapter);
129 void e1000_reset(struct e1000_adapter *adapter);
130 int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
131 int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
132 int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
133 void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
134 void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
135 static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
136 struct e1000_tx_ring *txdr);
137 static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
138 struct e1000_rx_ring *rxdr);
139 static void e1000_free_tx_resources(struct e1000_adapter *adapter,
140 struct e1000_tx_ring *tx_ring);
141 static void e1000_free_rx_resources(struct e1000_adapter *adapter,
142 struct e1000_rx_ring *rx_ring);
143 void e1000_update_stats(struct e1000_adapter *adapter);
144
145 static int e1000_init_module(void);
146 static void e1000_exit_module(void);
147 static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
148 static void __devexit e1000_remove(struct pci_dev *pdev);
149 static int e1000_alloc_queues(struct e1000_adapter *adapter);
150 static int e1000_sw_init(struct e1000_adapter *adapter);
151 static int e1000_open(struct net_device *netdev);
152 static int e1000_close(struct net_device *netdev);
153 static void e1000_configure_tx(struct e1000_adapter *adapter);
154 static void e1000_configure_rx(struct e1000_adapter *adapter);
155 static void e1000_setup_rctl(struct e1000_adapter *adapter);
156 static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
157 static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
158 static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
159 struct e1000_tx_ring *tx_ring);
160 static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
161 struct e1000_rx_ring *rx_ring);
162 static void e1000_set_rx_mode(struct net_device *netdev);
163 static void e1000_update_phy_info(unsigned long data);
164 static void e1000_watchdog(unsigned long data);
165 static void e1000_82547_tx_fifo_stall(unsigned long data);
166 static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
167 static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
168 static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
169 static int e1000_set_mac(struct net_device *netdev, void *p);
170 static irqreturn_t e1000_intr(int irq, void *data);
171 static irqreturn_t e1000_intr_msi(int irq, void *data);
172 static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter,
173 struct e1000_tx_ring *tx_ring);
174 #ifdef CONFIG_E1000_NAPI
175 static int e1000_clean(struct napi_struct *napi, int budget);
176 static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
177 struct e1000_rx_ring *rx_ring,
178 int *work_done, int work_to_do);
179 static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
180 struct e1000_rx_ring *rx_ring,
181 int *work_done, int work_to_do);
182 #else
183 static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
184 struct e1000_rx_ring *rx_ring);
185 static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
186 struct e1000_rx_ring *rx_ring);
187 #endif
188 static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
189 struct e1000_rx_ring *rx_ring,
190 int cleaned_count);
191 static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
192 struct e1000_rx_ring *rx_ring,
193 int cleaned_count);
194 static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
195 static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
196 int cmd);
197 static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
198 static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
199 static void e1000_tx_timeout(struct net_device *dev);
200 static void e1000_reset_task(struct work_struct *work);
201 static void e1000_smartspeed(struct e1000_adapter *adapter);
202 static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
203 struct sk_buff *skb);
204
205 static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
206 static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
207 static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
208 static void e1000_restore_vlan(struct e1000_adapter *adapter);
209
210 static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
211 #ifdef CONFIG_PM
212 static int e1000_resume(struct pci_dev *pdev);
213 #endif
214 static void e1000_shutdown(struct pci_dev *pdev);
215
216 #ifdef CONFIG_NET_POLL_CONTROLLER
217 /* for netdump / net console */
218 static void e1000_netpoll (struct net_device *netdev);
219 #endif
220
221 #define COPYBREAK_DEFAULT 256
222 static unsigned int copybreak __read_mostly = COPYBREAK_DEFAULT;
223 module_param(copybreak, uint, 0644);
224 MODULE_PARM_DESC(copybreak,
225 "Maximum size of packet that is copied to a new buffer on receive");
226
227 static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
228 pci_channel_state_t state);
229 static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev);
230 static void e1000_io_resume(struct pci_dev *pdev);
231
232 static struct pci_error_handlers e1000_err_handler = {
233 .error_detected = e1000_io_error_detected,
234 .slot_reset = e1000_io_slot_reset,
235 .resume = e1000_io_resume,
236 };
237
238 static struct pci_driver e1000_driver = {
239 .name = e1000_driver_name,
240 .id_table = e1000_pci_tbl,
241 .probe = e1000_probe,
242 .remove = __devexit_p(e1000_remove),
243 #ifdef CONFIG_PM
244 /* Power Managment Hooks */
245 .suspend = e1000_suspend,
246 .resume = e1000_resume,
247 #endif
248 .shutdown = e1000_shutdown,
249 .err_handler = &e1000_err_handler
250 };
251
252 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
253 MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
254 MODULE_LICENSE("GPL");
255 MODULE_VERSION(DRV_VERSION);
256
257 static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
258 module_param(debug, int, 0);
259 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
260
261 /**
262 * e1000_init_module - Driver Registration Routine
263 *
264 * e1000_init_module is the first routine called when the driver is
265 * loaded. All it does is register with the PCI subsystem.
266 **/
267
268 static int __init
269 e1000_init_module(void)
270 {
271 int ret;
272 printk(KERN_INFO "%s - version %s\n",
273 e1000_driver_string, e1000_driver_version);
274
275 printk(KERN_INFO "%s\n", e1000_copyright);
276
277 ret = pci_register_driver(&e1000_driver);
278 if (copybreak != COPYBREAK_DEFAULT) {
279 if (copybreak == 0)
280 printk(KERN_INFO "e1000: copybreak disabled\n");
281 else
282 printk(KERN_INFO "e1000: copybreak enabled for "
283 "packets <= %u bytes\n", copybreak);
284 }
285 return ret;
286 }
287
288 module_init(e1000_init_module);
289
290 /**
291 * e1000_exit_module - Driver Exit Cleanup Routine
292 *
293 * e1000_exit_module is called just before the driver is removed
294 * from memory.
295 **/
296
297 static void __exit
298 e1000_exit_module(void)
299 {
300 pci_unregister_driver(&e1000_driver);
301 }
302
303 module_exit(e1000_exit_module);
304
305 static int e1000_request_irq(struct e1000_adapter *adapter)
306 {
307 struct net_device *netdev = adapter->netdev;
308 irq_handler_t handler = e1000_intr;
309 int irq_flags = IRQF_SHARED;
310 int err;
311
312 if (adapter->hw.mac_type >= e1000_82571) {
313 adapter->have_msi = !pci_enable_msi(adapter->pdev);
314 if (adapter->have_msi) {
315 handler = e1000_intr_msi;
316 irq_flags = 0;
317 }
318 }
319
320 err = request_irq(adapter->pdev->irq, handler, irq_flags, netdev->name,
321 netdev);
322 if (err) {
323 if (adapter->have_msi)
324 pci_disable_msi(adapter->pdev);
325 DPRINTK(PROBE, ERR,
326 "Unable to allocate interrupt Error: %d\n", err);
327 }
328
329 return err;
330 }
331
332 static void e1000_free_irq(struct e1000_adapter *adapter)
333 {
334 struct net_device *netdev = adapter->netdev;
335
336 free_irq(adapter->pdev->irq, netdev);
337
338 if (adapter->have_msi)
339 pci_disable_msi(adapter->pdev);
340 }
341
342 /**
343 * e1000_irq_disable - Mask off interrupt generation on the NIC
344 * @adapter: board private structure
345 **/
346
347 static void
348 e1000_irq_disable(struct e1000_adapter *adapter)
349 {
350 atomic_inc(&adapter->irq_sem);
351 E1000_WRITE_REG(&adapter->hw, IMC, ~0);
352 E1000_WRITE_FLUSH(&adapter->hw);
353 synchronize_irq(adapter->pdev->irq);
354 }
355
356 /**
357 * e1000_irq_enable - Enable default interrupt generation settings
358 * @adapter: board private structure
359 **/
360
361 static void
362 e1000_irq_enable(struct e1000_adapter *adapter)
363 {
364 if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
365 E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
366 E1000_WRITE_FLUSH(&adapter->hw);
367 }
368 }
369
370 static void
371 e1000_update_mng_vlan(struct e1000_adapter *adapter)
372 {
373 struct net_device *netdev = adapter->netdev;
374 uint16_t vid = adapter->hw.mng_cookie.vlan_id;
375 uint16_t old_vid = adapter->mng_vlan_id;
376 if (adapter->vlgrp) {
377 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
378 if (adapter->hw.mng_cookie.status &
379 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
380 e1000_vlan_rx_add_vid(netdev, vid);
381 adapter->mng_vlan_id = vid;
382 } else
383 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
384
385 if ((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
386 (vid != old_vid) &&
387 !vlan_group_get_device(adapter->vlgrp, old_vid))
388 e1000_vlan_rx_kill_vid(netdev, old_vid);
389 } else
390 adapter->mng_vlan_id = vid;
391 }
392 }
393
394 /**
395 * e1000_release_hw_control - release control of the h/w to f/w
396 * @adapter: address of board private structure
397 *
398 * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
399 * For ASF and Pass Through versions of f/w this means that the
400 * driver is no longer loaded. For AMT version (only with 82573) i
401 * of the f/w this means that the network i/f is closed.
402 *
403 **/
404
405 static void
406 e1000_release_hw_control(struct e1000_adapter *adapter)
407 {
408 uint32_t ctrl_ext;
409 uint32_t swsm;
410
411 /* Let firmware taken over control of h/w */
412 switch (adapter->hw.mac_type) {
413 case e1000_82573:
414 swsm = E1000_READ_REG(&adapter->hw, SWSM);
415 E1000_WRITE_REG(&adapter->hw, SWSM,
416 swsm & ~E1000_SWSM_DRV_LOAD);
417 break;
418 case e1000_82571:
419 case e1000_82572:
420 case e1000_80003es2lan:
421 case e1000_ich8lan:
422 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
423 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
424 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
425 break;
426 default:
427 break;
428 }
429 }
430
431 /**
432 * e1000_get_hw_control - get control of the h/w from f/w
433 * @adapter: address of board private structure
434 *
435 * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
436 * For ASF and Pass Through versions of f/w this means that
437 * the driver is loaded. For AMT version (only with 82573)
438 * of the f/w this means that the network i/f is open.
439 *
440 **/
441
442 static void
443 e1000_get_hw_control(struct e1000_adapter *adapter)
444 {
445 uint32_t ctrl_ext;
446 uint32_t swsm;
447
448 /* Let firmware know the driver has taken over */
449 switch (adapter->hw.mac_type) {
450 case e1000_82573:
451 swsm = E1000_READ_REG(&adapter->hw, SWSM);
452 E1000_WRITE_REG(&adapter->hw, SWSM,
453 swsm | E1000_SWSM_DRV_LOAD);
454 break;
455 case e1000_82571:
456 case e1000_82572:
457 case e1000_80003es2lan:
458 case e1000_ich8lan:
459 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
460 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
461 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
462 break;
463 default:
464 break;
465 }
466 }
467
468 static void
469 e1000_init_manageability(struct e1000_adapter *adapter)
470 {
471 if (adapter->en_mng_pt) {
472 uint32_t manc = E1000_READ_REG(&adapter->hw, MANC);
473
474 /* disable hardware interception of ARP */
475 manc &= ~(E1000_MANC_ARP_EN);
476
477 /* enable receiving management packets to the host */
478 /* this will probably generate destination unreachable messages
479 * from the host OS, but the packets will be handled on SMBUS */
480 if (adapter->hw.has_manc2h) {
481 uint32_t manc2h = E1000_READ_REG(&adapter->hw, MANC2H);
482
483 manc |= E1000_MANC_EN_MNG2HOST;
484 #define E1000_MNG2HOST_PORT_623 (1 << 5)
485 #define E1000_MNG2HOST_PORT_664 (1 << 6)
486 manc2h |= E1000_MNG2HOST_PORT_623;
487 manc2h |= E1000_MNG2HOST_PORT_664;
488 E1000_WRITE_REG(&adapter->hw, MANC2H, manc2h);
489 }
490
491 E1000_WRITE_REG(&adapter->hw, MANC, manc);
492 }
493 }
494
495 static void
496 e1000_release_manageability(struct e1000_adapter *adapter)
497 {
498 if (adapter->en_mng_pt) {
499 uint32_t manc = E1000_READ_REG(&adapter->hw, MANC);
500
501 /* re-enable hardware interception of ARP */
502 manc |= E1000_MANC_ARP_EN;
503
504 if (adapter->hw.has_manc2h)
505 manc &= ~E1000_MANC_EN_MNG2HOST;
506
507 /* don't explicitly have to mess with MANC2H since
508 * MANC has an enable disable that gates MANC2H */
509
510 E1000_WRITE_REG(&adapter->hw, MANC, manc);
511 }
512 }
513
514 /**
515 * e1000_configure - configure the hardware for RX and TX
516 * @adapter = private board structure
517 **/
518 static void e1000_configure(struct e1000_adapter *adapter)
519 {
520 struct net_device *netdev = adapter->netdev;
521 int i;
522
523 e1000_set_rx_mode(netdev);
524
525 e1000_restore_vlan(adapter);
526 e1000_init_manageability(adapter);
527
528 e1000_configure_tx(adapter);
529 e1000_setup_rctl(adapter);
530 e1000_configure_rx(adapter);
531 /* call E1000_DESC_UNUSED which always leaves
532 * at least 1 descriptor unused to make sure
533 * next_to_use != next_to_clean */
534 for (i = 0; i < adapter->num_rx_queues; i++) {
535 struct e1000_rx_ring *ring = &adapter->rx_ring[i];
536 adapter->alloc_rx_buf(adapter, ring,
537 E1000_DESC_UNUSED(ring));
538 }
539
540 adapter->tx_queue_len = netdev->tx_queue_len;
541 }
542
543 int e1000_up(struct e1000_adapter *adapter)
544 {
545 /* hardware has been reset, we need to reload some things */
546 e1000_configure(adapter);
547
548 clear_bit(__E1000_DOWN, &adapter->flags);
549
550 #ifdef CONFIG_E1000_NAPI
551 napi_enable(&adapter->napi);
552 #endif
553 e1000_irq_enable(adapter);
554
555 /* fire a link change interrupt to start the watchdog */
556 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_LSC);
557 return 0;
558 }
559
560 /**
561 * e1000_power_up_phy - restore link in case the phy was powered down
562 * @adapter: address of board private structure
563 *
564 * The phy may be powered down to save power and turn off link when the
565 * driver is unloaded and wake on lan is not enabled (among others)
566 * *** this routine MUST be followed by a call to e1000_reset ***
567 *
568 **/
569
570 void e1000_power_up_phy(struct e1000_adapter *adapter)
571 {
572 uint16_t mii_reg = 0;
573
574 /* Just clear the power down bit to wake the phy back up */
575 if (adapter->hw.media_type == e1000_media_type_copper) {
576 /* according to the manual, the phy will retain its
577 * settings across a power-down/up cycle */
578 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
579 mii_reg &= ~MII_CR_POWER_DOWN;
580 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
581 }
582 }
583
584 static void e1000_power_down_phy(struct e1000_adapter *adapter)
585 {
586 /* Power down the PHY so no link is implied when interface is down *
587 * The PHY cannot be powered down if any of the following is TRUE *
588 * (a) WoL is enabled
589 * (b) AMT is active
590 * (c) SoL/IDER session is active */
591 if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
592 adapter->hw.media_type == e1000_media_type_copper) {
593 uint16_t mii_reg = 0;
594
595 switch (adapter->hw.mac_type) {
596 case e1000_82540:
597 case e1000_82545:
598 case e1000_82545_rev_3:
599 case e1000_82546:
600 case e1000_82546_rev_3:
601 case e1000_82541:
602 case e1000_82541_rev_2:
603 case e1000_82547:
604 case e1000_82547_rev_2:
605 if (E1000_READ_REG(&adapter->hw, MANC) &
606 E1000_MANC_SMBUS_EN)
607 goto out;
608 break;
609 case e1000_82571:
610 case e1000_82572:
611 case e1000_82573:
612 case e1000_80003es2lan:
613 case e1000_ich8lan:
614 if (e1000_check_mng_mode(&adapter->hw) ||
615 e1000_check_phy_reset_block(&adapter->hw))
616 goto out;
617 break;
618 default:
619 goto out;
620 }
621 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
622 mii_reg |= MII_CR_POWER_DOWN;
623 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
624 mdelay(1);
625 }
626 out:
627 return;
628 }
629
630 void
631 e1000_down(struct e1000_adapter *adapter)
632 {
633 struct net_device *netdev = adapter->netdev;
634
635 /* signal that we're down so the interrupt handler does not
636 * reschedule our watchdog timer */
637 set_bit(__E1000_DOWN, &adapter->flags);
638
639 #ifdef CONFIG_E1000_NAPI
640 napi_disable(&adapter->napi);
641 atomic_set(&adapter->irq_sem, 0);
642 #endif
643 e1000_irq_disable(adapter);
644
645 del_timer_sync(&adapter->tx_fifo_stall_timer);
646 del_timer_sync(&adapter->watchdog_timer);
647 del_timer_sync(&adapter->phy_info_timer);
648
649 netdev->tx_queue_len = adapter->tx_queue_len;
650 adapter->link_speed = 0;
651 adapter->link_duplex = 0;
652 netif_carrier_off(netdev);
653 netif_stop_queue(netdev);
654
655 e1000_reset(adapter);
656 e1000_clean_all_tx_rings(adapter);
657 e1000_clean_all_rx_rings(adapter);
658 }
659
660 void
661 e1000_reinit_locked(struct e1000_adapter *adapter)
662 {
663 WARN_ON(in_interrupt());
664 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
665 msleep(1);
666 e1000_down(adapter);
667 e1000_up(adapter);
668 clear_bit(__E1000_RESETTING, &adapter->flags);
669 }
670
671 void
672 e1000_reset(struct e1000_adapter *adapter)
673 {
674 uint32_t pba = 0, tx_space, min_tx_space, min_rx_space;
675 uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
676 boolean_t legacy_pba_adjust = FALSE;
677
678 /* Repartition Pba for greater than 9k mtu
679 * To take effect CTRL.RST is required.
680 */
681
682 switch (adapter->hw.mac_type) {
683 case e1000_82542_rev2_0:
684 case e1000_82542_rev2_1:
685 case e1000_82543:
686 case e1000_82544:
687 case e1000_82540:
688 case e1000_82541:
689 case e1000_82541_rev_2:
690 legacy_pba_adjust = TRUE;
691 pba = E1000_PBA_48K;
692 break;
693 case e1000_82545:
694 case e1000_82545_rev_3:
695 case e1000_82546:
696 case e1000_82546_rev_3:
697 pba = E1000_PBA_48K;
698 break;
699 case e1000_82547:
700 case e1000_82547_rev_2:
701 legacy_pba_adjust = TRUE;
702 pba = E1000_PBA_30K;
703 break;
704 case e1000_82571:
705 case e1000_82572:
706 case e1000_80003es2lan:
707 pba = E1000_PBA_38K;
708 break;
709 case e1000_82573:
710 pba = E1000_PBA_20K;
711 break;
712 case e1000_ich8lan:
713 pba = E1000_PBA_8K;
714 case e1000_undefined:
715 case e1000_num_macs:
716 break;
717 }
718
719 if (legacy_pba_adjust == TRUE) {
720 if (adapter->netdev->mtu > E1000_RXBUFFER_8192)
721 pba -= 8; /* allocate more FIFO for Tx */
722
723 if (adapter->hw.mac_type == e1000_82547) {
724 adapter->tx_fifo_head = 0;
725 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
726 adapter->tx_fifo_size =
727 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
728 atomic_set(&adapter->tx_fifo_stall, 0);
729 }
730 } else if (adapter->hw.max_frame_size > MAXIMUM_ETHERNET_FRAME_SIZE) {
731 /* adjust PBA for jumbo frames */
732 E1000_WRITE_REG(&adapter->hw, PBA, pba);
733
734 /* To maintain wire speed transmits, the Tx FIFO should be
735 * large enough to accomodate two full transmit packets,
736 * rounded up to the next 1KB and expressed in KB. Likewise,
737 * the Rx FIFO should be large enough to accomodate at least
738 * one full receive packet and is similarly rounded up and
739 * expressed in KB. */
740 pba = E1000_READ_REG(&adapter->hw, PBA);
741 /* upper 16 bits has Tx packet buffer allocation size in KB */
742 tx_space = pba >> 16;
743 /* lower 16 bits has Rx packet buffer allocation size in KB */
744 pba &= 0xffff;
745 /* don't include ethernet FCS because hardware appends/strips */
746 min_rx_space = adapter->netdev->mtu + ENET_HEADER_SIZE +
747 VLAN_TAG_SIZE;
748 min_tx_space = min_rx_space;
749 min_tx_space *= 2;
750 min_tx_space = ALIGN(min_tx_space, 1024);
751 min_tx_space >>= 10;
752 min_rx_space = ALIGN(min_rx_space, 1024);
753 min_rx_space >>= 10;
754
755 /* If current Tx allocation is less than the min Tx FIFO size,
756 * and the min Tx FIFO size is less than the current Rx FIFO
757 * allocation, take space away from current Rx allocation */
758 if (tx_space < min_tx_space &&
759 ((min_tx_space - tx_space) < pba)) {
760 pba = pba - (min_tx_space - tx_space);
761
762 /* PCI/PCIx hardware has PBA alignment constraints */
763 switch (adapter->hw.mac_type) {
764 case e1000_82545 ... e1000_82546_rev_3:
765 pba &= ~(E1000_PBA_8K - 1);
766 break;
767 default:
768 break;
769 }
770
771 /* if short on rx space, rx wins and must trump tx
772 * adjustment or use Early Receive if available */
773 if (pba < min_rx_space) {
774 switch (adapter->hw.mac_type) {
775 case e1000_82573:
776 /* ERT enabled in e1000_configure_rx */
777 break;
778 default:
779 pba = min_rx_space;
780 break;
781 }
782 }
783 }
784 }
785
786 E1000_WRITE_REG(&adapter->hw, PBA, pba);
787
788 /* flow control settings */
789 /* Set the FC high water mark to 90% of the FIFO size.
790 * Required to clear last 3 LSB */
791 fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
792 /* We can't use 90% on small FIFOs because the remainder
793 * would be less than 1 full frame. In this case, we size
794 * it to allow at least a full frame above the high water
795 * mark. */
796 if (pba < E1000_PBA_16K)
797 fc_high_water_mark = (pba * 1024) - 1600;
798
799 adapter->hw.fc_high_water = fc_high_water_mark;
800 adapter->hw.fc_low_water = fc_high_water_mark - 8;
801 if (adapter->hw.mac_type == e1000_80003es2lan)
802 adapter->hw.fc_pause_time = 0xFFFF;
803 else
804 adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
805 adapter->hw.fc_send_xon = 1;
806 adapter->hw.fc = adapter->hw.original_fc;
807
808 /* Allow time for pending master requests to run */
809 e1000_reset_hw(&adapter->hw);
810 if (adapter->hw.mac_type >= e1000_82544)
811 E1000_WRITE_REG(&adapter->hw, WUC, 0);
812
813 if (e1000_init_hw(&adapter->hw))
814 DPRINTK(PROBE, ERR, "Hardware Error\n");
815 e1000_update_mng_vlan(adapter);
816
817 /* if (adapter->hwflags & HWFLAGS_PHY_PWR_BIT) { */
818 if (adapter->hw.mac_type >= e1000_82544 &&
819 adapter->hw.mac_type <= e1000_82547_rev_2 &&
820 adapter->hw.autoneg == 1 &&
821 adapter->hw.autoneg_advertised == ADVERTISE_1000_FULL) {
822 uint32_t ctrl = E1000_READ_REG(&adapter->hw, CTRL);
823 /* clear phy power management bit if we are in gig only mode,
824 * which if enabled will attempt negotiation to 100Mb, which
825 * can cause a loss of link at power off or driver unload */
826 ctrl &= ~E1000_CTRL_SWDPIN3;
827 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
828 }
829
830 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
831 E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
832
833 e1000_reset_adaptive(&adapter->hw);
834 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
835
836 if (!adapter->smart_power_down &&
837 (adapter->hw.mac_type == e1000_82571 ||
838 adapter->hw.mac_type == e1000_82572)) {
839 uint16_t phy_data = 0;
840 /* speed up time to link by disabling smart power down, ignore
841 * the return value of this function because there is nothing
842 * different we would do if it failed */
843 e1000_read_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
844 &phy_data);
845 phy_data &= ~IGP02E1000_PM_SPD;
846 e1000_write_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
847 phy_data);
848 }
849
850 e1000_release_manageability(adapter);
851 }
852
853 /**
854 * Dump the eeprom for users having checksum issues
855 **/
856 static void e1000_dump_eeprom(struct e1000_adapter *adapter)
857 {
858 struct net_device *netdev = adapter->netdev;
859 struct ethtool_eeprom eeprom;
860 const struct ethtool_ops *ops = netdev->ethtool_ops;
861 u8 *data;
862 int i;
863 u16 csum_old, csum_new = 0;
864
865 eeprom.len = ops->get_eeprom_len(netdev);
866 eeprom.offset = 0;
867
868 data = kmalloc(eeprom.len, GFP_KERNEL);
869 if (!data) {
870 printk(KERN_ERR "Unable to allocate memory to dump EEPROM"
871 " data\n");
872 return;
873 }
874
875 ops->get_eeprom(netdev, &eeprom, data);
876
877 csum_old = (data[EEPROM_CHECKSUM_REG * 2]) +
878 (data[EEPROM_CHECKSUM_REG * 2 + 1] << 8);
879 for (i = 0; i < EEPROM_CHECKSUM_REG * 2; i += 2)
880 csum_new += data[i] + (data[i + 1] << 8);
881 csum_new = EEPROM_SUM - csum_new;
882
883 printk(KERN_ERR "/*********************/\n");
884 printk(KERN_ERR "Current EEPROM Checksum : 0x%04x\n", csum_old);
885 printk(KERN_ERR "Calculated : 0x%04x\n", csum_new);
886
887 printk(KERN_ERR "Offset Values\n");
888 printk(KERN_ERR "======== ======\n");
889 print_hex_dump(KERN_ERR, "", DUMP_PREFIX_OFFSET, 16, 1, data, 128, 0);
890
891 printk(KERN_ERR "Include this output when contacting your support "
892 "provider.\n");
893 printk(KERN_ERR "This is not a software error! Something bad "
894 "happened to your hardware or\n");
895 printk(KERN_ERR "EEPROM image. Ignoring this "
896 "problem could result in further problems,\n");
897 printk(KERN_ERR "possibly loss of data, corruption or system hangs!\n");
898 printk(KERN_ERR "The MAC Address will be reset to 00:00:00:00:00:00, "
899 "which is invalid\n");
900 printk(KERN_ERR "and requires you to set the proper MAC "
901 "address manually before continuing\n");
902 printk(KERN_ERR "to enable this network device.\n");
903 printk(KERN_ERR "Please inspect the EEPROM dump and report the issue "
904 "to your hardware vendor\n");
905 printk(KERN_ERR "or Intel Customer Support: linux-nics@intel.com\n");
906 printk(KERN_ERR "/*********************/\n");
907
908 kfree(data);
909 }
910
911 /**
912 * e1000_probe - Device Initialization Routine
913 * @pdev: PCI device information struct
914 * @ent: entry in e1000_pci_tbl
915 *
916 * Returns 0 on success, negative on failure
917 *
918 * e1000_probe initializes an adapter identified by a pci_dev structure.
919 * The OS initialization, configuring of the adapter private structure,
920 * and a hardware reset occur.
921 **/
922
923 static int __devinit
924 e1000_probe(struct pci_dev *pdev,
925 const struct pci_device_id *ent)
926 {
927 struct net_device *netdev;
928 struct e1000_adapter *adapter;
929
930 static int cards_found = 0;
931 static int global_quad_port_a = 0; /* global ksp3 port a indication */
932 int i, err, pci_using_dac;
933 uint16_t eeprom_data = 0;
934 uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
935 DECLARE_MAC_BUF(mac);
936
937 if ((err = pci_enable_device(pdev)))
938 return err;
939
940 if (!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK)) &&
941 !(err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))) {
942 pci_using_dac = 1;
943 } else {
944 if ((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK)) &&
945 (err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))) {
946 E1000_ERR("No usable DMA configuration, aborting\n");
947 goto err_dma;
948 }
949 pci_using_dac = 0;
950 }
951
952 if ((err = pci_request_regions(pdev, e1000_driver_name)))
953 goto err_pci_reg;
954
955 pci_set_master(pdev);
956
957 err = -ENOMEM;
958 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
959 if (!netdev)
960 goto err_alloc_etherdev;
961
962 SET_NETDEV_DEV(netdev, &pdev->dev);
963
964 pci_set_drvdata(pdev, netdev);
965 adapter = netdev_priv(netdev);
966 adapter->netdev = netdev;
967 adapter->pdev = pdev;
968 adapter->hw.back = adapter;
969 adapter->msg_enable = (1 << debug) - 1;
970
971 err = -EIO;
972 adapter->hw.hw_addr = ioremap(pci_resource_start(pdev, BAR_0),
973 pci_resource_len(pdev, BAR_0));
974 if (!adapter->hw.hw_addr)
975 goto err_ioremap;
976
977 for (i = BAR_1; i <= BAR_5; i++) {
978 if (pci_resource_len(pdev, i) == 0)
979 continue;
980 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
981 adapter->hw.io_base = pci_resource_start(pdev, i);
982 break;
983 }
984 }
985
986 netdev->open = &e1000_open;
987 netdev->stop = &e1000_close;
988 netdev->hard_start_xmit = &e1000_xmit_frame;
989 netdev->get_stats = &e1000_get_stats;
990 netdev->set_rx_mode = &e1000_set_rx_mode;
991 netdev->set_mac_address = &e1000_set_mac;
992 netdev->change_mtu = &e1000_change_mtu;
993 netdev->do_ioctl = &e1000_ioctl;
994 e1000_set_ethtool_ops(netdev);
995 netdev->tx_timeout = &e1000_tx_timeout;
996 netdev->watchdog_timeo = 5 * HZ;
997 #ifdef CONFIG_E1000_NAPI
998 netif_napi_add(netdev, &adapter->napi, e1000_clean, 64);
999 #endif
1000 netdev->vlan_rx_register = e1000_vlan_rx_register;
1001 netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
1002 netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
1003 #ifdef CONFIG_NET_POLL_CONTROLLER
1004 netdev->poll_controller = e1000_netpoll;
1005 #endif
1006 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
1007
1008 adapter->bd_number = cards_found;
1009
1010 /* setup the private structure */
1011
1012 if ((err = e1000_sw_init(adapter)))
1013 goto err_sw_init;
1014
1015 err = -EIO;
1016 /* Flash BAR mapping must happen after e1000_sw_init
1017 * because it depends on mac_type */
1018 if ((adapter->hw.mac_type == e1000_ich8lan) &&
1019 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
1020 adapter->hw.flash_address =
1021 ioremap(pci_resource_start(pdev, 1),
1022 pci_resource_len(pdev, 1));
1023 if (!adapter->hw.flash_address)
1024 goto err_flashmap;
1025 }
1026
1027 if (e1000_check_phy_reset_block(&adapter->hw))
1028 DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
1029
1030 if (adapter->hw.mac_type >= e1000_82543) {
1031 netdev->features = NETIF_F_SG |
1032 NETIF_F_HW_CSUM |
1033 NETIF_F_HW_VLAN_TX |
1034 NETIF_F_HW_VLAN_RX |
1035 NETIF_F_HW_VLAN_FILTER;
1036 if (adapter->hw.mac_type == e1000_ich8lan)
1037 netdev->features &= ~NETIF_F_HW_VLAN_FILTER;
1038 }
1039
1040 if ((adapter->hw.mac_type >= e1000_82544) &&
1041 (adapter->hw.mac_type != e1000_82547))
1042 netdev->features |= NETIF_F_TSO;
1043
1044 if (adapter->hw.mac_type > e1000_82547_rev_2)
1045 netdev->features |= NETIF_F_TSO6;
1046 if (pci_using_dac)
1047 netdev->features |= NETIF_F_HIGHDMA;
1048
1049 netdev->features |= NETIF_F_LLTX;
1050
1051 adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
1052
1053 /* initialize eeprom parameters */
1054 if (e1000_init_eeprom_params(&adapter->hw)) {
1055 E1000_ERR("EEPROM initialization failed\n");
1056 goto err_eeprom;
1057 }
1058
1059 /* before reading the EEPROM, reset the controller to
1060 * put the device in a known good starting state */
1061
1062 e1000_reset_hw(&adapter->hw);
1063
1064 /* make sure the EEPROM is good */
1065 if (e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
1066 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
1067 e1000_dump_eeprom(adapter);
1068 /*
1069 * set MAC address to all zeroes to invalidate and temporary
1070 * disable this device for the user. This blocks regular
1071 * traffic while still permitting ethtool ioctls from reaching
1072 * the hardware as well as allowing the user to run the
1073 * interface after manually setting a hw addr using
1074 * `ip set address`
1075 */
1076 memset(adapter->hw.mac_addr, 0, netdev->addr_len);
1077 } else {
1078 /* copy the MAC address out of the EEPROM */
1079 if (e1000_read_mac_addr(&adapter->hw))
1080 DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
1081 }
1082 /* don't block initalization here due to bad MAC address */
1083 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
1084 memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
1085
1086 if (!is_valid_ether_addr(netdev->perm_addr))
1087 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
1088
1089 e1000_get_bus_info(&adapter->hw);
1090
1091 init_timer(&adapter->tx_fifo_stall_timer);
1092 adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
1093 adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
1094
1095 init_timer(&adapter->watchdog_timer);
1096 adapter->watchdog_timer.function = &e1000_watchdog;
1097 adapter->watchdog_timer.data = (unsigned long) adapter;
1098
1099 init_timer(&adapter->phy_info_timer);
1100 adapter->phy_info_timer.function = &e1000_update_phy_info;
1101 adapter->phy_info_timer.data = (unsigned long) adapter;
1102
1103 INIT_WORK(&adapter->reset_task, e1000_reset_task);
1104
1105 e1000_check_options(adapter);
1106
1107 /* Initial Wake on LAN setting
1108 * If APM wake is enabled in the EEPROM,
1109 * enable the ACPI Magic Packet filter
1110 */
1111
1112 switch (adapter->hw.mac_type) {
1113 case e1000_82542_rev2_0:
1114 case e1000_82542_rev2_1:
1115 case e1000_82543:
1116 break;
1117 case e1000_82544:
1118 e1000_read_eeprom(&adapter->hw,
1119 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
1120 eeprom_apme_mask = E1000_EEPROM_82544_APM;
1121 break;
1122 case e1000_ich8lan:
1123 e1000_read_eeprom(&adapter->hw,
1124 EEPROM_INIT_CONTROL1_REG, 1, &eeprom_data);
1125 eeprom_apme_mask = E1000_EEPROM_ICH8_APME;
1126 break;
1127 case e1000_82546:
1128 case e1000_82546_rev_3:
1129 case e1000_82571:
1130 case e1000_80003es2lan:
1131 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1){
1132 e1000_read_eeprom(&adapter->hw,
1133 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
1134 break;
1135 }
1136 /* Fall Through */
1137 default:
1138 e1000_read_eeprom(&adapter->hw,
1139 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
1140 break;
1141 }
1142 if (eeprom_data & eeprom_apme_mask)
1143 adapter->eeprom_wol |= E1000_WUFC_MAG;
1144
1145 /* now that we have the eeprom settings, apply the special cases
1146 * where the eeprom may be wrong or the board simply won't support
1147 * wake on lan on a particular port */
1148 switch (pdev->device) {
1149 case E1000_DEV_ID_82546GB_PCIE:
1150 adapter->eeprom_wol = 0;
1151 break;
1152 case E1000_DEV_ID_82546EB_FIBER:
1153 case E1000_DEV_ID_82546GB_FIBER:
1154 case E1000_DEV_ID_82571EB_FIBER:
1155 /* Wake events only supported on port A for dual fiber
1156 * regardless of eeprom setting */
1157 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1)
1158 adapter->eeprom_wol = 0;
1159 break;
1160 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
1161 case E1000_DEV_ID_82571EB_QUAD_COPPER:
1162 case E1000_DEV_ID_82571EB_QUAD_FIBER:
1163 case E1000_DEV_ID_82571EB_QUAD_COPPER_LOWPROFILE:
1164 case E1000_DEV_ID_82571PT_QUAD_COPPER:
1165 /* if quad port adapter, disable WoL on all but port A */
1166 if (global_quad_port_a != 0)
1167 adapter->eeprom_wol = 0;
1168 else
1169 adapter->quad_port_a = 1;
1170 /* Reset for multiple quad port adapters */
1171 if (++global_quad_port_a == 4)
1172 global_quad_port_a = 0;
1173 break;
1174 }
1175
1176 /* initialize the wol settings based on the eeprom settings */
1177 adapter->wol = adapter->eeprom_wol;
1178
1179 /* print bus type/speed/width info */
1180 {
1181 struct e1000_hw *hw = &adapter->hw;
1182 DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
1183 ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
1184 (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
1185 ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
1186 (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
1187 (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
1188 (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
1189 (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
1190 ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
1191 (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
1192 (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
1193 "32-bit"));
1194 }
1195
1196 printk("%s\n", print_mac(mac, netdev->dev_addr));
1197
1198 /* reset the hardware with the new settings */
1199 e1000_reset(adapter);
1200
1201 /* If the controller is 82573 and f/w is AMT, do not set
1202 * DRV_LOAD until the interface is up. For all other cases,
1203 * let the f/w know that the h/w is now under the control
1204 * of the driver. */
1205 if (adapter->hw.mac_type != e1000_82573 ||
1206 !e1000_check_mng_mode(&adapter->hw))
1207 e1000_get_hw_control(adapter);
1208
1209 /* tell the stack to leave us alone until e1000_open() is called */
1210 netif_carrier_off(netdev);
1211 netif_stop_queue(netdev);
1212
1213 strcpy(netdev->name, "eth%d");
1214 if ((err = register_netdev(netdev)))
1215 goto err_register;
1216
1217 DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
1218
1219 cards_found++;
1220 return 0;
1221
1222 err_register:
1223 e1000_release_hw_control(adapter);
1224 err_eeprom:
1225 if (!e1000_check_phy_reset_block(&adapter->hw))
1226 e1000_phy_hw_reset(&adapter->hw);
1227
1228 if (adapter->hw.flash_address)
1229 iounmap(adapter->hw.flash_address);
1230 err_flashmap:
1231 #ifdef CONFIG_E1000_NAPI
1232 for (i = 0; i < adapter->num_rx_queues; i++)
1233 dev_put(&adapter->polling_netdev[i]);
1234 #endif
1235
1236 kfree(adapter->tx_ring);
1237 kfree(adapter->rx_ring);
1238 #ifdef CONFIG_E1000_NAPI
1239 kfree(adapter->polling_netdev);
1240 #endif
1241 err_sw_init:
1242 iounmap(adapter->hw.hw_addr);
1243 err_ioremap:
1244 free_netdev(netdev);
1245 err_alloc_etherdev:
1246 pci_release_regions(pdev);
1247 err_pci_reg:
1248 err_dma:
1249 pci_disable_device(pdev);
1250 return err;
1251 }
1252
1253 /**
1254 * e1000_remove - Device Removal Routine
1255 * @pdev: PCI device information struct
1256 *
1257 * e1000_remove is called by the PCI subsystem to alert the driver
1258 * that it should release a PCI device. The could be caused by a
1259 * Hot-Plug event, or because the driver is going to be removed from
1260 * memory.
1261 **/
1262
1263 static void __devexit
1264 e1000_remove(struct pci_dev *pdev)
1265 {
1266 struct net_device *netdev = pci_get_drvdata(pdev);
1267 struct e1000_adapter *adapter = netdev_priv(netdev);
1268 #ifdef CONFIG_E1000_NAPI
1269 int i;
1270 #endif
1271
1272 cancel_work_sync(&adapter->reset_task);
1273
1274 e1000_release_manageability(adapter);
1275
1276 /* Release control of h/w to f/w. If f/w is AMT enabled, this
1277 * would have already happened in close and is redundant. */
1278 e1000_release_hw_control(adapter);
1279
1280 #ifdef CONFIG_E1000_NAPI
1281 for (i = 0; i < adapter->num_rx_queues; i++)
1282 dev_put(&adapter->polling_netdev[i]);
1283 #endif
1284
1285 unregister_netdev(netdev);
1286
1287 if (!e1000_check_phy_reset_block(&adapter->hw))
1288 e1000_phy_hw_reset(&adapter->hw);
1289
1290 kfree(adapter->tx_ring);
1291 kfree(adapter->rx_ring);
1292 #ifdef CONFIG_E1000_NAPI
1293 kfree(adapter->polling_netdev);
1294 #endif
1295
1296 iounmap(adapter->hw.hw_addr);
1297 if (adapter->hw.flash_address)
1298 iounmap(adapter->hw.flash_address);
1299 pci_release_regions(pdev);
1300
1301 free_netdev(netdev);
1302
1303 pci_disable_device(pdev);
1304 }
1305
1306 /**
1307 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
1308 * @adapter: board private structure to initialize
1309 *
1310 * e1000_sw_init initializes the Adapter private data structure.
1311 * Fields are initialized based on PCI device information and
1312 * OS network device settings (MTU size).
1313 **/
1314
1315 static int __devinit
1316 e1000_sw_init(struct e1000_adapter *adapter)
1317 {
1318 struct e1000_hw *hw = &adapter->hw;
1319 struct net_device *netdev = adapter->netdev;
1320 struct pci_dev *pdev = adapter->pdev;
1321 #ifdef CONFIG_E1000_NAPI
1322 int i;
1323 #endif
1324
1325 /* PCI config space info */
1326
1327 hw->vendor_id = pdev->vendor;
1328 hw->device_id = pdev->device;
1329 hw->subsystem_vendor_id = pdev->subsystem_vendor;
1330 hw->subsystem_id = pdev->subsystem_device;
1331 hw->revision_id = pdev->revision;
1332
1333 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
1334
1335 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1336 adapter->rx_ps_bsize0 = E1000_RXBUFFER_128;
1337 hw->max_frame_size = netdev->mtu +
1338 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
1339 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
1340
1341 /* identify the MAC */
1342
1343 if (e1000_set_mac_type(hw)) {
1344 DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
1345 return -EIO;
1346 }
1347
1348 switch (hw->mac_type) {
1349 default:
1350 break;
1351 case e1000_82541:
1352 case e1000_82547:
1353 case e1000_82541_rev_2:
1354 case e1000_82547_rev_2:
1355 hw->phy_init_script = 1;
1356 break;
1357 }
1358
1359 e1000_set_media_type(hw);
1360
1361 hw->wait_autoneg_complete = FALSE;
1362 hw->tbi_compatibility_en = TRUE;
1363 hw->adaptive_ifs = TRUE;
1364
1365 /* Copper options */
1366
1367 if (hw->media_type == e1000_media_type_copper) {
1368 hw->mdix = AUTO_ALL_MODES;
1369 hw->disable_polarity_correction = FALSE;
1370 hw->master_slave = E1000_MASTER_SLAVE;
1371 }
1372
1373 adapter->num_tx_queues = 1;
1374 adapter->num_rx_queues = 1;
1375
1376 if (e1000_alloc_queues(adapter)) {
1377 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
1378 return -ENOMEM;
1379 }
1380
1381 #ifdef CONFIG_E1000_NAPI
1382 for (i = 0; i < adapter->num_rx_queues; i++) {
1383 adapter->polling_netdev[i].priv = adapter;
1384 dev_hold(&adapter->polling_netdev[i]);
1385 set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
1386 }
1387 spin_lock_init(&adapter->tx_queue_lock);
1388 #endif
1389
1390 /* Explicitly disable IRQ since the NIC can be in any state. */
1391 atomic_set(&adapter->irq_sem, 0);
1392 e1000_irq_disable(adapter);
1393
1394 spin_lock_init(&adapter->stats_lock);
1395
1396 set_bit(__E1000_DOWN, &adapter->flags);
1397
1398 return 0;
1399 }
1400
1401 /**
1402 * e1000_alloc_queues - Allocate memory for all rings
1403 * @adapter: board private structure to initialize
1404 *
1405 * We allocate one ring per queue at run-time since we don't know the
1406 * number of queues at compile-time. The polling_netdev array is
1407 * intended for Multiqueue, but should work fine with a single queue.
1408 **/
1409
1410 static int __devinit
1411 e1000_alloc_queues(struct e1000_adapter *adapter)
1412 {
1413 adapter->tx_ring = kcalloc(adapter->num_tx_queues,
1414 sizeof(struct e1000_tx_ring), GFP_KERNEL);
1415 if (!adapter->tx_ring)
1416 return -ENOMEM;
1417
1418 adapter->rx_ring = kcalloc(adapter->num_rx_queues,
1419 sizeof(struct e1000_rx_ring), GFP_KERNEL);
1420 if (!adapter->rx_ring) {
1421 kfree(adapter->tx_ring);
1422 return -ENOMEM;
1423 }
1424
1425 #ifdef CONFIG_E1000_NAPI
1426 adapter->polling_netdev = kcalloc(adapter->num_rx_queues,
1427 sizeof(struct net_device),
1428 GFP_KERNEL);
1429 if (!adapter->polling_netdev) {
1430 kfree(adapter->tx_ring);
1431 kfree(adapter->rx_ring);
1432 return -ENOMEM;
1433 }
1434 #endif
1435
1436 return E1000_SUCCESS;
1437 }
1438
1439 /**
1440 * e1000_open - Called when a network interface is made active
1441 * @netdev: network interface device structure
1442 *
1443 * Returns 0 on success, negative value on failure
1444 *
1445 * The open entry point is called when a network interface is made
1446 * active by the system (IFF_UP). At this point all resources needed
1447 * for transmit and receive operations are allocated, the interrupt
1448 * handler is registered with the OS, the watchdog timer is started,
1449 * and the stack is notified that the interface is ready.
1450 **/
1451
1452 static int
1453 e1000_open(struct net_device *netdev)
1454 {
1455 struct e1000_adapter *adapter = netdev_priv(netdev);
1456 int err;
1457
1458 /* disallow open during test */
1459 if (test_bit(__E1000_TESTING, &adapter->flags))
1460 return -EBUSY;
1461
1462 /* allocate transmit descriptors */
1463 err = e1000_setup_all_tx_resources(adapter);
1464 if (err)
1465 goto err_setup_tx;
1466
1467 /* allocate receive descriptors */
1468 err = e1000_setup_all_rx_resources(adapter);
1469 if (err)
1470 goto err_setup_rx;
1471
1472 e1000_power_up_phy(adapter);
1473
1474 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
1475 if ((adapter->hw.mng_cookie.status &
1476 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1477 e1000_update_mng_vlan(adapter);
1478 }
1479
1480 /* If AMT is enabled, let the firmware know that the network
1481 * interface is now open */
1482 if (adapter->hw.mac_type == e1000_82573 &&
1483 e1000_check_mng_mode(&adapter->hw))
1484 e1000_get_hw_control(adapter);
1485
1486 /* before we allocate an interrupt, we must be ready to handle it.
1487 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
1488 * as soon as we call pci_request_irq, so we have to setup our
1489 * clean_rx handler before we do so. */
1490 e1000_configure(adapter);
1491
1492 err = e1000_request_irq(adapter);
1493 if (err)
1494 goto err_req_irq;
1495
1496 /* From here on the code is the same as e1000_up() */
1497 clear_bit(__E1000_DOWN, &adapter->flags);
1498
1499 #ifdef CONFIG_E1000_NAPI
1500 napi_enable(&adapter->napi);
1501 #endif
1502
1503 e1000_irq_enable(adapter);
1504
1505 /* fire a link status change interrupt to start the watchdog */
1506 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_LSC);
1507
1508 return E1000_SUCCESS;
1509
1510 err_req_irq:
1511 e1000_release_hw_control(adapter);
1512 e1000_power_down_phy(adapter);
1513 e1000_free_all_rx_resources(adapter);
1514 err_setup_rx:
1515 e1000_free_all_tx_resources(adapter);
1516 err_setup_tx:
1517 e1000_reset(adapter);
1518
1519 return err;
1520 }
1521
1522 /**
1523 * e1000_close - Disables a network interface
1524 * @netdev: network interface device structure
1525 *
1526 * Returns 0, this is not allowed to fail
1527 *
1528 * The close entry point is called when an interface is de-activated
1529 * by the OS. The hardware is still under the drivers control, but
1530 * needs to be disabled. A global MAC reset is issued to stop the
1531 * hardware, and all transmit and receive resources are freed.
1532 **/
1533
1534 static int
1535 e1000_close(struct net_device *netdev)
1536 {
1537 struct e1000_adapter *adapter = netdev_priv(netdev);
1538
1539 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1540 e1000_down(adapter);
1541 e1000_power_down_phy(adapter);
1542 e1000_free_irq(adapter);
1543
1544 e1000_free_all_tx_resources(adapter);
1545 e1000_free_all_rx_resources(adapter);
1546
1547 /* kill manageability vlan ID if supported, but not if a vlan with
1548 * the same ID is registered on the host OS (let 8021q kill it) */
1549 if ((adapter->hw.mng_cookie.status &
1550 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
1551 !(adapter->vlgrp &&
1552 vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id))) {
1553 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1554 }
1555
1556 /* If AMT is enabled, let the firmware know that the network
1557 * interface is now closed */
1558 if (adapter->hw.mac_type == e1000_82573 &&
1559 e1000_check_mng_mode(&adapter->hw))
1560 e1000_release_hw_control(adapter);
1561
1562 return 0;
1563 }
1564
1565 /**
1566 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1567 * @adapter: address of board private structure
1568 * @start: address of beginning of memory
1569 * @len: length of memory
1570 **/
1571 static boolean_t
1572 e1000_check_64k_bound(struct e1000_adapter *adapter,
1573 void *start, unsigned long len)
1574 {
1575 unsigned long begin = (unsigned long) start;
1576 unsigned long end = begin + len;
1577
1578 /* First rev 82545 and 82546 need to not allow any memory
1579 * write location to cross 64k boundary due to errata 23 */
1580 if (adapter->hw.mac_type == e1000_82545 ||
1581 adapter->hw.mac_type == e1000_82546) {
1582 return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
1583 }
1584
1585 return TRUE;
1586 }
1587
1588 /**
1589 * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1590 * @adapter: board private structure
1591 * @txdr: tx descriptor ring (for a specific queue) to setup
1592 *
1593 * Return 0 on success, negative on failure
1594 **/
1595
1596 static int
1597 e1000_setup_tx_resources(struct e1000_adapter *adapter,
1598 struct e1000_tx_ring *txdr)
1599 {
1600 struct pci_dev *pdev = adapter->pdev;
1601 int size;
1602
1603 size = sizeof(struct e1000_buffer) * txdr->count;
1604 txdr->buffer_info = vmalloc(size);
1605 if (!txdr->buffer_info) {
1606 DPRINTK(PROBE, ERR,
1607 "Unable to allocate memory for the transmit descriptor ring\n");
1608 return -ENOMEM;
1609 }
1610 memset(txdr->buffer_info, 0, size);
1611
1612 /* round up to nearest 4K */
1613
1614 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
1615 txdr->size = ALIGN(txdr->size, 4096);
1616
1617 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
1618 if (!txdr->desc) {
1619 setup_tx_desc_die:
1620 vfree(txdr->buffer_info);
1621 DPRINTK(PROBE, ERR,
1622 "Unable to allocate memory for the transmit descriptor ring\n");
1623 return -ENOMEM;
1624 }
1625
1626 /* Fix for errata 23, can't cross 64kB boundary */
1627 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1628 void *olddesc = txdr->desc;
1629 dma_addr_t olddma = txdr->dma;
1630 DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
1631 "at %p\n", txdr->size, txdr->desc);
1632 /* Try again, without freeing the previous */
1633 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
1634 /* Failed allocation, critical failure */
1635 if (!txdr->desc) {
1636 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1637 goto setup_tx_desc_die;
1638 }
1639
1640 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1641 /* give up */
1642 pci_free_consistent(pdev, txdr->size, txdr->desc,
1643 txdr->dma);
1644 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1645 DPRINTK(PROBE, ERR,
1646 "Unable to allocate aligned memory "
1647 "for the transmit descriptor ring\n");
1648 vfree(txdr->buffer_info);
1649 return -ENOMEM;
1650 } else {
1651 /* Free old allocation, new allocation was successful */
1652 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1653 }
1654 }
1655 memset(txdr->desc, 0, txdr->size);
1656
1657 txdr->next_to_use = 0;
1658 txdr->next_to_clean = 0;
1659 spin_lock_init(&txdr->tx_lock);
1660
1661 return 0;
1662 }
1663
1664 /**
1665 * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1666 * (Descriptors) for all queues
1667 * @adapter: board private structure
1668 *
1669 * Return 0 on success, negative on failure
1670 **/
1671
1672 int
1673 e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
1674 {
1675 int i, err = 0;
1676
1677 for (i = 0; i < adapter->num_tx_queues; i++) {
1678 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1679 if (err) {
1680 DPRINTK(PROBE, ERR,
1681 "Allocation for Tx Queue %u failed\n", i);
1682 for (i-- ; i >= 0; i--)
1683 e1000_free_tx_resources(adapter,
1684 &adapter->tx_ring[i]);
1685 break;
1686 }
1687 }
1688
1689 return err;
1690 }
1691
1692 /**
1693 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1694 * @adapter: board private structure
1695 *
1696 * Configure the Tx unit of the MAC after a reset.
1697 **/
1698
1699 static void
1700 e1000_configure_tx(struct e1000_adapter *adapter)
1701 {
1702 uint64_t tdba;
1703 struct e1000_hw *hw = &adapter->hw;
1704 uint32_t tdlen, tctl, tipg, tarc;
1705 uint32_t ipgr1, ipgr2;
1706
1707 /* Setup the HW Tx Head and Tail descriptor pointers */
1708
1709 switch (adapter->num_tx_queues) {
1710 case 1:
1711 default:
1712 tdba = adapter->tx_ring[0].dma;
1713 tdlen = adapter->tx_ring[0].count *
1714 sizeof(struct e1000_tx_desc);
1715 E1000_WRITE_REG(hw, TDLEN, tdlen);
1716 E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
1717 E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
1718 E1000_WRITE_REG(hw, TDT, 0);
1719 E1000_WRITE_REG(hw, TDH, 0);
1720 adapter->tx_ring[0].tdh = ((hw->mac_type >= e1000_82543) ? E1000_TDH : E1000_82542_TDH);
1721 adapter->tx_ring[0].tdt = ((hw->mac_type >= e1000_82543) ? E1000_TDT : E1000_82542_TDT);
1722 break;
1723 }
1724
1725 /* Set the default values for the Tx Inter Packet Gap timer */
1726 if (adapter->hw.mac_type <= e1000_82547_rev_2 &&
1727 (hw->media_type == e1000_media_type_fiber ||
1728 hw->media_type == e1000_media_type_internal_serdes))
1729 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1730 else
1731 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1732
1733 switch (hw->mac_type) {
1734 case e1000_82542_rev2_0:
1735 case e1000_82542_rev2_1:
1736 tipg = DEFAULT_82542_TIPG_IPGT;
1737 ipgr1 = DEFAULT_82542_TIPG_IPGR1;
1738 ipgr2 = DEFAULT_82542_TIPG_IPGR2;
1739 break;
1740 case e1000_80003es2lan:
1741 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1742 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2;
1743 break;
1744 default:
1745 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1746 ipgr2 = DEFAULT_82543_TIPG_IPGR2;
1747 break;
1748 }
1749 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
1750 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
1751 E1000_WRITE_REG(hw, TIPG, tipg);
1752
1753 /* Set the Tx Interrupt Delay register */
1754
1755 E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
1756 if (hw->mac_type >= e1000_82540)
1757 E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
1758
1759 /* Program the Transmit Control Register */
1760
1761 tctl = E1000_READ_REG(hw, TCTL);
1762 tctl &= ~E1000_TCTL_CT;
1763 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1764 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1765
1766 if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
1767 tarc = E1000_READ_REG(hw, TARC0);
1768 /* set the speed mode bit, we'll clear it if we're not at
1769 * gigabit link later */
1770 tarc |= (1 << 21);
1771 E1000_WRITE_REG(hw, TARC0, tarc);
1772 } else if (hw->mac_type == e1000_80003es2lan) {
1773 tarc = E1000_READ_REG(hw, TARC0);
1774 tarc |= 1;
1775 E1000_WRITE_REG(hw, TARC0, tarc);
1776 tarc = E1000_READ_REG(hw, TARC1);
1777 tarc |= 1;
1778 E1000_WRITE_REG(hw, TARC1, tarc);
1779 }
1780
1781 e1000_config_collision_dist(hw);
1782
1783 /* Setup Transmit Descriptor Settings for eop descriptor */
1784 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
1785
1786 /* only set IDE if we are delaying interrupts using the timers */
1787 if (adapter->tx_int_delay)
1788 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
1789
1790 if (hw->mac_type < e1000_82543)
1791 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1792 else
1793 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1794
1795 /* Cache if we're 82544 running in PCI-X because we'll
1796 * need this to apply a workaround later in the send path. */
1797 if (hw->mac_type == e1000_82544 &&
1798 hw->bus_type == e1000_bus_type_pcix)
1799 adapter->pcix_82544 = 1;
1800
1801 E1000_WRITE_REG(hw, TCTL, tctl);
1802
1803 }
1804
1805 /**
1806 * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1807 * @adapter: board private structure
1808 * @rxdr: rx descriptor ring (for a specific queue) to setup
1809 *
1810 * Returns 0 on success, negative on failure
1811 **/
1812
1813 static int
1814 e1000_setup_rx_resources(struct e1000_adapter *adapter,
1815 struct e1000_rx_ring *rxdr)
1816 {
1817 struct pci_dev *pdev = adapter->pdev;
1818 int size, desc_len;
1819
1820 size = sizeof(struct e1000_buffer) * rxdr->count;
1821 rxdr->buffer_info = vmalloc(size);
1822 if (!rxdr->buffer_info) {
1823 DPRINTK(PROBE, ERR,
1824 "Unable to allocate memory for the receive descriptor ring\n");
1825 return -ENOMEM;
1826 }
1827 memset(rxdr->buffer_info, 0, size);
1828
1829 rxdr->ps_page = kcalloc(rxdr->count, sizeof(struct e1000_ps_page),
1830 GFP_KERNEL);
1831 if (!rxdr->ps_page) {
1832 vfree(rxdr->buffer_info);
1833 DPRINTK(PROBE, ERR,
1834 "Unable to allocate memory for the receive descriptor ring\n");
1835 return -ENOMEM;
1836 }
1837
1838 rxdr->ps_page_dma = kcalloc(rxdr->count,
1839 sizeof(struct e1000_ps_page_dma),
1840 GFP_KERNEL);
1841 if (!rxdr->ps_page_dma) {
1842 vfree(rxdr->buffer_info);
1843 kfree(rxdr->ps_page);
1844 DPRINTK(PROBE, ERR,
1845 "Unable to allocate memory for the receive descriptor ring\n");
1846 return -ENOMEM;
1847 }
1848
1849 if (adapter->hw.mac_type <= e1000_82547_rev_2)
1850 desc_len = sizeof(struct e1000_rx_desc);
1851 else
1852 desc_len = sizeof(union e1000_rx_desc_packet_split);
1853
1854 /* Round up to nearest 4K */
1855
1856 rxdr->size = rxdr->count * desc_len;
1857 rxdr->size = ALIGN(rxdr->size, 4096);
1858
1859 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1860
1861 if (!rxdr->desc) {
1862 DPRINTK(PROBE, ERR,
1863 "Unable to allocate memory for the receive descriptor ring\n");
1864 setup_rx_desc_die:
1865 vfree(rxdr->buffer_info);
1866 kfree(rxdr->ps_page);
1867 kfree(rxdr->ps_page_dma);
1868 return -ENOMEM;
1869 }
1870
1871 /* Fix for errata 23, can't cross 64kB boundary */
1872 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1873 void *olddesc = rxdr->desc;
1874 dma_addr_t olddma = rxdr->dma;
1875 DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
1876 "at %p\n", rxdr->size, rxdr->desc);
1877 /* Try again, without freeing the previous */
1878 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1879 /* Failed allocation, critical failure */
1880 if (!rxdr->desc) {
1881 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1882 DPRINTK(PROBE, ERR,
1883 "Unable to allocate memory "
1884 "for the receive descriptor ring\n");
1885 goto setup_rx_desc_die;
1886 }
1887
1888 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1889 /* give up */
1890 pci_free_consistent(pdev, rxdr->size, rxdr->desc,
1891 rxdr->dma);
1892 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1893 DPRINTK(PROBE, ERR,
1894 "Unable to allocate aligned memory "
1895 "for the receive descriptor ring\n");
1896 goto setup_rx_desc_die;
1897 } else {
1898 /* Free old allocation, new allocation was successful */
1899 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1900 }
1901 }
1902 memset(rxdr->desc, 0, rxdr->size);
1903
1904 rxdr->next_to_clean = 0;
1905 rxdr->next_to_use = 0;
1906
1907 return 0;
1908 }
1909
1910 /**
1911 * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1912 * (Descriptors) for all queues
1913 * @adapter: board private structure
1914 *
1915 * Return 0 on success, negative on failure
1916 **/
1917
1918 int
1919 e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
1920 {
1921 int i, err = 0;
1922
1923 for (i = 0; i < adapter->num_rx_queues; i++) {
1924 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1925 if (err) {
1926 DPRINTK(PROBE, ERR,
1927 "Allocation for Rx Queue %u failed\n", i);
1928 for (i-- ; i >= 0; i--)
1929 e1000_free_rx_resources(adapter,
1930 &adapter->rx_ring[i]);
1931 break;
1932 }
1933 }
1934
1935 return err;
1936 }
1937
1938 /**
1939 * e1000_setup_rctl - configure the receive control registers
1940 * @adapter: Board private structure
1941 **/
1942 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1943 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
1944 static void
1945 e1000_setup_rctl(struct e1000_adapter *adapter)
1946 {
1947 uint32_t rctl, rfctl;
1948 uint32_t psrctl = 0;
1949 #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
1950 uint32_t pages = 0;
1951 #endif
1952
1953 rctl = E1000_READ_REG(&adapter->hw, RCTL);
1954
1955 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1956
1957 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1958 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1959 (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
1960
1961 if (adapter->hw.tbi_compatibility_on == 1)
1962 rctl |= E1000_RCTL_SBP;
1963 else
1964 rctl &= ~E1000_RCTL_SBP;
1965
1966 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1967 rctl &= ~E1000_RCTL_LPE;
1968 else
1969 rctl |= E1000_RCTL_LPE;
1970
1971 /* Setup buffer sizes */
1972 rctl &= ~E1000_RCTL_SZ_4096;
1973 rctl |= E1000_RCTL_BSEX;
1974 switch (adapter->rx_buffer_len) {
1975 case E1000_RXBUFFER_256:
1976 rctl |= E1000_RCTL_SZ_256;
1977 rctl &= ~E1000_RCTL_BSEX;
1978 break;
1979 case E1000_RXBUFFER_512:
1980 rctl |= E1000_RCTL_SZ_512;
1981 rctl &= ~E1000_RCTL_BSEX;
1982 break;
1983 case E1000_RXBUFFER_1024:
1984 rctl |= E1000_RCTL_SZ_1024;
1985 rctl &= ~E1000_RCTL_BSEX;
1986 break;
1987 case E1000_RXBUFFER_2048:
1988 default:
1989 rctl |= E1000_RCTL_SZ_2048;
1990 rctl &= ~E1000_RCTL_BSEX;
1991 break;
1992 case E1000_RXBUFFER_4096:
1993 rctl |= E1000_RCTL_SZ_4096;
1994 break;
1995 case E1000_RXBUFFER_8192:
1996 rctl |= E1000_RCTL_SZ_8192;
1997 break;
1998 case E1000_RXBUFFER_16384:
1999 rctl |= E1000_RCTL_SZ_16384;
2000 break;
2001 }
2002
2003 #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
2004 /* 82571 and greater support packet-split where the protocol
2005 * header is placed in skb->data and the packet data is
2006 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
2007 * In the case of a non-split, skb->data is linearly filled,
2008 * followed by the page buffers. Therefore, skb->data is
2009 * sized to hold the largest protocol header.
2010 */
2011 /* allocations using alloc_page take too long for regular MTU
2012 * so only enable packet split for jumbo frames */
2013 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
2014 if ((adapter->hw.mac_type >= e1000_82571) && (pages <= 3) &&
2015 PAGE_SIZE <= 16384 && (rctl & E1000_RCTL_LPE))
2016 adapter->rx_ps_pages = pages;
2017 else
2018 adapter->rx_ps_pages = 0;
2019 #endif
2020 if (adapter->rx_ps_pages) {
2021 /* Configure extra packet-split registers */
2022 rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
2023 rfctl |= E1000_RFCTL_EXTEN;
2024 /* disable packet split support for IPv6 extension headers,
2025 * because some malformed IPv6 headers can hang the RX */
2026 rfctl |= (E1000_RFCTL_IPV6_EX_DIS |
2027 E1000_RFCTL_NEW_IPV6_EXT_DIS);
2028
2029 E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
2030
2031 rctl |= E1000_RCTL_DTYP_PS;
2032
2033 psrctl |= adapter->rx_ps_bsize0 >>
2034 E1000_PSRCTL_BSIZE0_SHIFT;
2035
2036 switch (adapter->rx_ps_pages) {
2037 case 3:
2038 psrctl |= PAGE_SIZE <<
2039 E1000_PSRCTL_BSIZE3_SHIFT;
2040 case 2:
2041 psrctl |= PAGE_SIZE <<
2042 E1000_PSRCTL_BSIZE2_SHIFT;
2043 case 1:
2044 psrctl |= PAGE_SIZE >>
2045 E1000_PSRCTL_BSIZE1_SHIFT;
2046 break;
2047 }
2048
2049 E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
2050 }
2051
2052 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2053 }
2054
2055 /**
2056 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
2057 * @adapter: board private structure
2058 *
2059 * Configure the Rx unit of the MAC after a reset.
2060 **/
2061
2062 static void
2063 e1000_configure_rx(struct e1000_adapter *adapter)
2064 {
2065 uint64_t rdba;
2066 struct e1000_hw *hw = &adapter->hw;
2067 uint32_t rdlen, rctl, rxcsum, ctrl_ext;
2068
2069 if (adapter->rx_ps_pages) {
2070 /* this is a 32 byte descriptor */
2071 rdlen = adapter->rx_ring[0].count *
2072 sizeof(union e1000_rx_desc_packet_split);
2073 adapter->clean_rx = e1000_clean_rx_irq_ps;
2074 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
2075 } else {
2076 rdlen = adapter->rx_ring[0].count *
2077 sizeof(struct e1000_rx_desc);
2078 adapter->clean_rx = e1000_clean_rx_irq;
2079 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
2080 }
2081
2082 /* disable receives while setting up the descriptors */
2083 rctl = E1000_READ_REG(hw, RCTL);
2084 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
2085
2086 /* set the Receive Delay Timer Register */
2087 E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
2088
2089 if (hw->mac_type >= e1000_82540) {
2090 E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
2091 if (adapter->itr_setting != 0)
2092 E1000_WRITE_REG(hw, ITR,
2093 1000000000 / (adapter->itr * 256));
2094 }
2095
2096 if (hw->mac_type >= e1000_82571) {
2097 ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
2098 /* Reset delay timers after every interrupt */
2099 ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR;
2100 #ifdef CONFIG_E1000_NAPI
2101 /* Auto-Mask interrupts upon ICR access */
2102 ctrl_ext |= E1000_CTRL_EXT_IAME;
2103 E1000_WRITE_REG(hw, IAM, 0xffffffff);
2104 #endif
2105 E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
2106 E1000_WRITE_FLUSH(hw);
2107 }
2108
2109 /* Setup the HW Rx Head and Tail Descriptor Pointers and
2110 * the Base and Length of the Rx Descriptor Ring */
2111 switch (adapter->num_rx_queues) {
2112 case 1:
2113 default:
2114 rdba = adapter->rx_ring[0].dma;
2115 E1000_WRITE_REG(hw, RDLEN, rdlen);
2116 E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
2117 E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
2118 E1000_WRITE_REG(hw, RDT, 0);
2119 E1000_WRITE_REG(hw, RDH, 0);
2120 adapter->rx_ring[0].rdh = ((hw->mac_type >= e1000_82543) ? E1000_RDH : E1000_82542_RDH);
2121 adapter->rx_ring[0].rdt = ((hw->mac_type >= e1000_82543) ? E1000_RDT : E1000_82542_RDT);
2122 break;
2123 }
2124
2125 /* Enable 82543 Receive Checksum Offload for TCP and UDP */
2126 if (hw->mac_type >= e1000_82543) {
2127 rxcsum = E1000_READ_REG(hw, RXCSUM);
2128 if (adapter->rx_csum == TRUE) {
2129 rxcsum |= E1000_RXCSUM_TUOFL;
2130
2131 /* Enable 82571 IPv4 payload checksum for UDP fragments
2132 * Must be used in conjunction with packet-split. */
2133 if ((hw->mac_type >= e1000_82571) &&
2134 (adapter->rx_ps_pages)) {
2135 rxcsum |= E1000_RXCSUM_IPPCSE;
2136 }
2137 } else {
2138 rxcsum &= ~E1000_RXCSUM_TUOFL;
2139 /* don't need to clear IPPCSE as it defaults to 0 */
2140 }
2141 E1000_WRITE_REG(hw, RXCSUM, rxcsum);
2142 }
2143
2144 /* enable early receives on 82573, only takes effect if using > 2048
2145 * byte total frame size. for example only for jumbo frames */
2146 #define E1000_ERT_2048 0x100
2147 if (hw->mac_type == e1000_82573)
2148 E1000_WRITE_REG(hw, ERT, E1000_ERT_2048);
2149
2150 /* Enable Receives */
2151 E1000_WRITE_REG(hw, RCTL, rctl);
2152 }
2153
2154 /**
2155 * e1000_free_tx_resources - Free Tx Resources per Queue
2156 * @adapter: board private structure
2157 * @tx_ring: Tx descriptor ring for a specific queue
2158 *
2159 * Free all transmit software resources
2160 **/
2161
2162 static void
2163 e1000_free_tx_resources(struct e1000_adapter *adapter,
2164 struct e1000_tx_ring *tx_ring)
2165 {
2166 struct pci_dev *pdev = adapter->pdev;
2167
2168 e1000_clean_tx_ring(adapter, tx_ring);
2169
2170 vfree(tx_ring->buffer_info);
2171 tx_ring->buffer_info = NULL;
2172
2173 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
2174
2175 tx_ring->desc = NULL;
2176 }
2177
2178 /**
2179 * e1000_free_all_tx_resources - Free Tx Resources for All Queues
2180 * @adapter: board private structure
2181 *
2182 * Free all transmit software resources
2183 **/
2184
2185 void
2186 e1000_free_all_tx_resources(struct e1000_adapter *adapter)
2187 {
2188 int i;
2189
2190 for (i = 0; i < adapter->num_tx_queues; i++)
2191 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
2192 }
2193
2194 static void
2195 e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
2196 struct e1000_buffer *buffer_info)
2197 {
2198 if (buffer_info->dma) {
2199 pci_unmap_page(adapter->pdev,
2200 buffer_info->dma,
2201 buffer_info->length,
2202 PCI_DMA_TODEVICE);
2203 buffer_info->dma = 0;
2204 }
2205 if (buffer_info->skb) {
2206 dev_kfree_skb_any(buffer_info->skb);
2207 buffer_info->skb = NULL;
2208 }
2209 /* buffer_info must be completely set up in the transmit path */
2210 }
2211
2212 /**
2213 * e1000_clean_tx_ring - Free Tx Buffers
2214 * @adapter: board private structure
2215 * @tx_ring: ring to be cleaned
2216 **/
2217
2218 static void
2219 e1000_clean_tx_ring(struct e1000_adapter *adapter,
2220 struct e1000_tx_ring *tx_ring)
2221 {
2222 struct e1000_buffer *buffer_info;
2223 unsigned long size;
2224 unsigned int i;
2225
2226 /* Free all the Tx ring sk_buffs */
2227
2228 for (i = 0; i < tx_ring->count; i++) {
2229 buffer_info = &tx_ring->buffer_info[i];
2230 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
2231 }
2232
2233 size = sizeof(struct e1000_buffer) * tx_ring->count;
2234 memset(tx_ring->buffer_info, 0, size);
2235
2236 /* Zero out the descriptor ring */
2237
2238 memset(tx_ring->desc, 0, tx_ring->size);
2239
2240 tx_ring->next_to_use = 0;
2241 tx_ring->next_to_clean = 0;
2242 tx_ring->last_tx_tso = 0;
2243
2244 writel(0, adapter->hw.hw_addr + tx_ring->tdh);
2245 writel(0, adapter->hw.hw_addr + tx_ring->tdt);
2246 }
2247
2248 /**
2249 * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
2250 * @adapter: board private structure
2251 **/
2252
2253 static void
2254 e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
2255 {
2256 int i;
2257
2258 for (i = 0; i < adapter->num_tx_queues; i++)
2259 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
2260 }
2261
2262 /**
2263 * e1000_free_rx_resources - Free Rx Resources
2264 * @adapter: board private structure
2265 * @rx_ring: ring to clean the resources from
2266 *
2267 * Free all receive software resources
2268 **/
2269
2270 static void
2271 e1000_free_rx_resources(struct e1000_adapter *adapter,
2272 struct e1000_rx_ring *rx_ring)
2273 {
2274 struct pci_dev *pdev = adapter->pdev;
2275
2276 e1000_clean_rx_ring(adapter, rx_ring);
2277
2278 vfree(rx_ring->buffer_info);
2279 rx_ring->buffer_info = NULL;
2280 kfree(rx_ring->ps_page);
2281 rx_ring->ps_page = NULL;
2282 kfree(rx_ring->ps_page_dma);
2283 rx_ring->ps_page_dma = NULL;
2284
2285 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
2286
2287 rx_ring->desc = NULL;
2288 }
2289
2290 /**
2291 * e1000_free_all_rx_resources - Free Rx Resources for All Queues
2292 * @adapter: board private structure
2293 *
2294 * Free all receive software resources
2295 **/
2296
2297 void
2298 e1000_free_all_rx_resources(struct e1000_adapter *adapter)
2299 {
2300 int i;
2301
2302 for (i = 0; i < adapter->num_rx_queues; i++)
2303 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
2304 }
2305
2306 /**
2307 * e1000_clean_rx_ring - Free Rx Buffers per Queue
2308 * @adapter: board private structure
2309 * @rx_ring: ring to free buffers from
2310 **/
2311
2312 static void
2313 e1000_clean_rx_ring(struct e1000_adapter *adapter,
2314 struct e1000_rx_ring *rx_ring)
2315 {
2316 struct e1000_buffer *buffer_info;
2317 struct e1000_ps_page *ps_page;
2318 struct e1000_ps_page_dma *ps_page_dma;
2319 struct pci_dev *pdev = adapter->pdev;
2320 unsigned long size;
2321 unsigned int i, j;
2322
2323 /* Free all the Rx ring sk_buffs */
2324 for (i = 0; i < rx_ring->count; i++) {
2325 buffer_info = &rx_ring->buffer_info[i];
2326 if (buffer_info->skb) {
2327 pci_unmap_single(pdev,
2328 buffer_info->dma,
2329 buffer_info->length,
2330 PCI_DMA_FROMDEVICE);
2331
2332 dev_kfree_skb(buffer_info->skb);
2333 buffer_info->skb = NULL;
2334 }
2335 ps_page = &rx_ring->ps_page[i];
2336 ps_page_dma = &rx_ring->ps_page_dma[i];
2337 for (j = 0; j < adapter->rx_ps_pages; j++) {
2338 if (!ps_page->ps_page[j]) break;
2339 pci_unmap_page(pdev,
2340 ps_page_dma->ps_page_dma[j],
2341 PAGE_SIZE, PCI_DMA_FROMDEVICE);
2342 ps_page_dma->ps_page_dma[j] = 0;
2343 put_page(ps_page->ps_page[j]);
2344 ps_page->ps_page[j] = NULL;
2345 }
2346 }
2347
2348 size = sizeof(struct e1000_buffer) * rx_ring->count;
2349 memset(rx_ring->buffer_info, 0, size);
2350 size = sizeof(struct e1000_ps_page) * rx_ring->count;
2351 memset(rx_ring->ps_page, 0, size);
2352 size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
2353 memset(rx_ring->ps_page_dma, 0, size);
2354
2355 /* Zero out the descriptor ring */
2356
2357 memset(rx_ring->desc, 0, rx_ring->size);
2358
2359 rx_ring->next_to_clean = 0;
2360 rx_ring->next_to_use = 0;
2361
2362 writel(0, adapter->hw.hw_addr + rx_ring->rdh);
2363 writel(0, adapter->hw.hw_addr + rx_ring->rdt);
2364 }
2365
2366 /**
2367 * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
2368 * @adapter: board private structure
2369 **/
2370
2371 static void
2372 e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
2373 {
2374 int i;
2375
2376 for (i = 0; i < adapter->num_rx_queues; i++)
2377 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
2378 }
2379
2380 /* The 82542 2.0 (revision 2) needs to have the receive unit in reset
2381 * and memory write and invalidate disabled for certain operations
2382 */
2383 static void
2384 e1000_enter_82542_rst(struct e1000_adapter *adapter)
2385 {
2386 struct net_device *netdev = adapter->netdev;
2387 uint32_t rctl;
2388
2389 e1000_pci_clear_mwi(&adapter->hw);
2390
2391 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2392 rctl |= E1000_RCTL_RST;
2393 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2394 E1000_WRITE_FLUSH(&adapter->hw);
2395 mdelay(5);
2396
2397 if (netif_running(netdev))
2398 e1000_clean_all_rx_rings(adapter);
2399 }
2400
2401 static void
2402 e1000_leave_82542_rst(struct e1000_adapter *adapter)
2403 {
2404 struct net_device *netdev = adapter->netdev;
2405 uint32_t rctl;
2406
2407 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2408 rctl &= ~E1000_RCTL_RST;
2409 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2410 E1000_WRITE_FLUSH(&adapter->hw);
2411 mdelay(5);
2412
2413 if (adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
2414 e1000_pci_set_mwi(&adapter->hw);
2415
2416 if (netif_running(netdev)) {
2417 /* No need to loop, because 82542 supports only 1 queue */
2418 struct e1000_rx_ring *ring = &adapter->rx_ring[0];
2419 e1000_configure_rx(adapter);
2420 adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
2421 }
2422 }
2423
2424 /**
2425 * e1000_set_mac - Change the Ethernet Address of the NIC
2426 * @netdev: network interface device structure
2427 * @p: pointer to an address structure
2428 *
2429 * Returns 0 on success, negative on failure
2430 **/
2431
2432 static int
2433 e1000_set_mac(struct net_device *netdev, void *p)
2434 {
2435 struct e1000_adapter *adapter = netdev_priv(netdev);
2436 struct sockaddr *addr = p;
2437
2438 if (!is_valid_ether_addr(addr->sa_data))
2439 return -EADDRNOTAVAIL;
2440
2441 /* 82542 2.0 needs to be in reset to write receive address registers */
2442
2443 if (adapter->hw.mac_type == e1000_82542_rev2_0)
2444 e1000_enter_82542_rst(adapter);
2445
2446 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2447 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
2448
2449 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2450
2451 /* With 82571 controllers, LAA may be overwritten (with the default)
2452 * due to controller reset from the other port. */
2453 if (adapter->hw.mac_type == e1000_82571) {
2454 /* activate the work around */
2455 adapter->hw.laa_is_present = 1;
2456
2457 /* Hold a copy of the LAA in RAR[14] This is done so that
2458 * between the time RAR[0] gets clobbered and the time it
2459 * gets fixed (in e1000_watchdog), the actual LAA is in one
2460 * of the RARs and no incoming packets directed to this port
2461 * are dropped. Eventaully the LAA will be in RAR[0] and
2462 * RAR[14] */
2463 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
2464 E1000_RAR_ENTRIES - 1);
2465 }
2466
2467 if (adapter->hw.mac_type == e1000_82542_rev2_0)
2468 e1000_leave_82542_rst(adapter);
2469
2470 return 0;
2471 }
2472
2473 /**
2474 * e1000_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
2475 * @netdev: network interface device structure
2476 *
2477 * The set_rx_mode entry point is called whenever the unicast or multicast
2478 * address lists or the network interface flags are updated. This routine is
2479 * responsible for configuring the hardware for proper unicast, multicast,
2480 * promiscuous mode, and all-multi behavior.
2481 **/
2482
2483 static void
2484 e1000_set_rx_mode(struct net_device *netdev)
2485 {
2486 struct e1000_adapter *adapter = netdev_priv(netdev);
2487 struct e1000_hw *hw = &adapter->hw;
2488 struct dev_addr_list *uc_ptr;
2489 struct dev_addr_list *mc_ptr;
2490 uint32_t rctl;
2491 uint32_t hash_value;
2492 int i, rar_entries = E1000_RAR_ENTRIES;
2493 int mta_reg_count = (hw->mac_type == e1000_ich8lan) ?
2494 E1000_NUM_MTA_REGISTERS_ICH8LAN :
2495 E1000_NUM_MTA_REGISTERS;
2496
2497 if (adapter->hw.mac_type == e1000_ich8lan)
2498 rar_entries = E1000_RAR_ENTRIES_ICH8LAN;
2499
2500 /* reserve RAR[14] for LAA over-write work-around */
2501 if (adapter->hw.mac_type == e1000_82571)
2502 rar_entries--;
2503
2504 /* Check for Promiscuous and All Multicast modes */
2505
2506 rctl = E1000_READ_REG(hw, RCTL);
2507
2508 if (netdev->flags & IFF_PROMISC) {
2509 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
2510 } else if (netdev->flags & IFF_ALLMULTI) {
2511 rctl |= E1000_RCTL_MPE;
2512 } else {
2513 rctl &= ~E1000_RCTL_MPE;
2514 }
2515
2516 uc_ptr = NULL;
2517 if (netdev->uc_count > rar_entries - 1) {
2518 rctl |= E1000_RCTL_UPE;
2519 } else if (!(netdev->flags & IFF_PROMISC)) {
2520 rctl &= ~E1000_RCTL_UPE;
2521 uc_ptr = netdev->uc_list;
2522 }
2523
2524 E1000_WRITE_REG(hw, RCTL, rctl);
2525
2526 /* 82542 2.0 needs to be in reset to write receive address registers */
2527
2528 if (hw->mac_type == e1000_82542_rev2_0)
2529 e1000_enter_82542_rst(adapter);
2530
2531 /* load the first 14 addresses into the exact filters 1-14. Unicast
2532 * addresses take precedence to avoid disabling unicast filtering
2533 * when possible.
2534 *
2535 * RAR 0 is used for the station MAC adddress
2536 * if there are not 14 addresses, go ahead and clear the filters
2537 * -- with 82571 controllers only 0-13 entries are filled here
2538 */
2539 mc_ptr = netdev->mc_list;
2540
2541 for (i = 1; i < rar_entries; i++) {
2542 if (uc_ptr) {
2543 e1000_rar_set(hw, uc_ptr->da_addr, i);
2544 uc_ptr = uc_ptr->next;
2545 } else if (mc_ptr) {
2546 e1000_rar_set(hw, mc_ptr->da_addr, i);
2547 mc_ptr = mc_ptr->next;
2548 } else {
2549 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
2550 E1000_WRITE_FLUSH(hw);
2551 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
2552 E1000_WRITE_FLUSH(hw);
2553 }
2554 }
2555 WARN_ON(uc_ptr != NULL);
2556
2557 /* clear the old settings from the multicast hash table */
2558
2559 for (i = 0; i < mta_reg_count; i++) {
2560 E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
2561 E1000_WRITE_FLUSH(hw);
2562 }
2563
2564 /* load any remaining addresses into the hash table */
2565
2566 for (; mc_ptr; mc_ptr = mc_ptr->next) {
2567 hash_value = e1000_hash_mc_addr(hw, mc_ptr->da_addr);
2568 e1000_mta_set(hw, hash_value);
2569 }
2570
2571 if (hw->mac_type == e1000_82542_rev2_0)
2572 e1000_leave_82542_rst(adapter);
2573 }
2574
2575 /* Need to wait a few seconds after link up to get diagnostic information from
2576 * the phy */
2577
2578 static void
2579 e1000_update_phy_info(unsigned long data)
2580 {
2581 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2582 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
2583 }
2584
2585 /**
2586 * e1000_82547_tx_fifo_stall - Timer Call-back
2587 * @data: pointer to adapter cast into an unsigned long
2588 **/
2589
2590 static void
2591 e1000_82547_tx_fifo_stall(unsigned long data)
2592 {
2593 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2594 struct net_device *netdev = adapter->netdev;
2595 uint32_t tctl;
2596
2597 if (atomic_read(&adapter->tx_fifo_stall)) {
2598 if ((E1000_READ_REG(&adapter->hw, TDT) ==
2599 E1000_READ_REG(&adapter->hw, TDH)) &&
2600 (E1000_READ_REG(&adapter->hw, TDFT) ==
2601 E1000_READ_REG(&adapter->hw, TDFH)) &&
2602 (E1000_READ_REG(&adapter->hw, TDFTS) ==
2603 E1000_READ_REG(&adapter->hw, TDFHS))) {
2604 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2605 E1000_WRITE_REG(&adapter->hw, TCTL,
2606 tctl & ~E1000_TCTL_EN);
2607 E1000_WRITE_REG(&adapter->hw, TDFT,
2608 adapter->tx_head_addr);
2609 E1000_WRITE_REG(&adapter->hw, TDFH,
2610 adapter->tx_head_addr);
2611 E1000_WRITE_REG(&adapter->hw, TDFTS,
2612 adapter->tx_head_addr);
2613 E1000_WRITE_REG(&adapter->hw, TDFHS,
2614 adapter->tx_head_addr);
2615 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
2616 E1000_WRITE_FLUSH(&adapter->hw);
2617
2618 adapter->tx_fifo_head = 0;
2619 atomic_set(&adapter->tx_fifo_stall, 0);
2620 netif_wake_queue(netdev);
2621 } else {
2622 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
2623 }
2624 }
2625 }
2626
2627 /**
2628 * e1000_watchdog - Timer Call-back
2629 * @data: pointer to adapter cast into an unsigned long
2630 **/
2631 static void
2632 e1000_watchdog(unsigned long data)
2633 {
2634 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2635 struct net_device *netdev = adapter->netdev;
2636 struct e1000_tx_ring *txdr = adapter->tx_ring;
2637 uint32_t link, tctl;
2638 int32_t ret_val;
2639
2640 ret_val = e1000_check_for_link(&adapter->hw);
2641 if ((ret_val == E1000_ERR_PHY) &&
2642 (adapter->hw.phy_type == e1000_phy_igp_3) &&
2643 (E1000_READ_REG(&adapter->hw, CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
2644 /* See e1000_kumeran_lock_loss_workaround() */
2645 DPRINTK(LINK, INFO,
2646 "Gigabit has been disabled, downgrading speed\n");
2647 }
2648
2649 if (adapter->hw.mac_type == e1000_82573) {
2650 e1000_enable_tx_pkt_filtering(&adapter->hw);
2651 if (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
2652 e1000_update_mng_vlan(adapter);
2653 }
2654
2655 if ((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
2656 !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
2657 link = !adapter->hw.serdes_link_down;
2658 else
2659 link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
2660
2661 if (link) {
2662 if (!netif_carrier_ok(netdev)) {
2663 uint32_t ctrl;
2664 boolean_t txb2b = 1;
2665 e1000_get_speed_and_duplex(&adapter->hw,
2666 &adapter->link_speed,
2667 &adapter->link_duplex);
2668
2669 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
2670 DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s, "
2671 "Flow Control: %s\n",
2672 adapter->link_speed,
2673 adapter->link_duplex == FULL_DUPLEX ?
2674 "Full Duplex" : "Half Duplex",
2675 ((ctrl & E1000_CTRL_TFCE) && (ctrl &
2676 E1000_CTRL_RFCE)) ? "RX/TX" : ((ctrl &
2677 E1000_CTRL_RFCE) ? "RX" : ((ctrl &
2678 E1000_CTRL_TFCE) ? "TX" : "None" )));
2679
2680 /* tweak tx_queue_len according to speed/duplex
2681 * and adjust the timeout factor */
2682 netdev->tx_queue_len = adapter->tx_queue_len;
2683 adapter->tx_timeout_factor = 1;
2684 switch (adapter->link_speed) {
2685 case SPEED_10:
2686 txb2b = 0;
2687 netdev->tx_queue_len = 10;
2688 adapter->tx_timeout_factor = 8;
2689 break;
2690 case SPEED_100:
2691 txb2b = 0;
2692 netdev->tx_queue_len = 100;
2693 /* maybe add some timeout factor ? */
2694 break;
2695 }
2696
2697 if ((adapter->hw.mac_type == e1000_82571 ||
2698 adapter->hw.mac_type == e1000_82572) &&
2699 txb2b == 0) {
2700 uint32_t tarc0;
2701 tarc0 = E1000_READ_REG(&adapter->hw, TARC0);
2702 tarc0 &= ~(1 << 21);
2703 E1000_WRITE_REG(&adapter->hw, TARC0, tarc0);
2704 }
2705
2706 /* disable TSO for pcie and 10/100 speeds, to avoid
2707 * some hardware issues */
2708 if (!adapter->tso_force &&
2709 adapter->hw.bus_type == e1000_bus_type_pci_express){
2710 switch (adapter->link_speed) {
2711 case SPEED_10:
2712 case SPEED_100:
2713 DPRINTK(PROBE,INFO,
2714 "10/100 speed: disabling TSO\n");
2715 netdev->features &= ~NETIF_F_TSO;
2716 netdev->features &= ~NETIF_F_TSO6;
2717 break;
2718 case SPEED_1000:
2719 netdev->features |= NETIF_F_TSO;
2720 netdev->features |= NETIF_F_TSO6;
2721 break;
2722 default:
2723 /* oops */
2724 break;
2725 }
2726 }
2727
2728 /* enable transmits in the hardware, need to do this
2729 * after setting TARC0 */
2730 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2731 tctl |= E1000_TCTL_EN;
2732 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
2733
2734 netif_carrier_on(netdev);
2735 netif_wake_queue(netdev);
2736 mod_timer(&adapter->phy_info_timer, round_jiffies(jiffies + 2 * HZ));
2737 adapter->smartspeed = 0;
2738 } else {
2739 /* make sure the receive unit is started */
2740 if (adapter->hw.rx_needs_kicking) {
2741 struct e1000_hw *hw = &adapter->hw;
2742 uint32_t rctl = E1000_READ_REG(hw, RCTL);
2743 E1000_WRITE_REG(hw, RCTL, rctl | E1000_RCTL_EN);
2744 }
2745 }
2746 } else {
2747 if (netif_carrier_ok(netdev)) {
2748 adapter->link_speed = 0;
2749 adapter->link_duplex = 0;
2750 DPRINTK(LINK, INFO, "NIC Link is Down\n");
2751 netif_carrier_off(netdev);
2752 netif_stop_queue(netdev);
2753 mod_timer(&adapter->phy_info_timer, round_jiffies(jiffies + 2 * HZ));
2754
2755 /* 80003ES2LAN workaround--
2756 * For packet buffer work-around on link down event;
2757 * disable receives in the ISR and
2758 * reset device here in the watchdog
2759 */
2760 if (adapter->hw.mac_type == e1000_80003es2lan)
2761 /* reset device */
2762 schedule_work(&adapter->reset_task);
2763 }
2764
2765 e1000_smartspeed(adapter);
2766 }
2767
2768 e1000_update_stats(adapter);
2769
2770 adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
2771 adapter->tpt_old = adapter->stats.tpt;
2772 adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
2773 adapter->colc_old = adapter->stats.colc;
2774
2775 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2776 adapter->gorcl_old = adapter->stats.gorcl;
2777 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2778 adapter->gotcl_old = adapter->stats.gotcl;
2779
2780 e1000_update_adaptive(&adapter->hw);
2781
2782 if (!netif_carrier_ok(netdev)) {
2783 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
2784 /* We've lost link, so the controller stops DMA,
2785 * but we've got queued Tx work that's never going
2786 * to get done, so reset controller to flush Tx.
2787 * (Do the reset outside of interrupt context). */
2788 adapter->tx_timeout_count++;
2789 schedule_work(&adapter->reset_task);
2790 }
2791 }
2792
2793 /* Cause software interrupt to ensure rx ring is cleaned */
2794 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
2795
2796 /* Force detection of hung controller every watchdog period */
2797 adapter->detect_tx_hung = TRUE;
2798
2799 /* With 82571 controllers, LAA may be overwritten due to controller
2800 * reset from the other port. Set the appropriate LAA in RAR[0] */
2801 if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
2802 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2803
2804 /* Reset the timer */
2805 mod_timer(&adapter->watchdog_timer, round_jiffies(jiffies + 2 * HZ));
2806 }
2807
2808 enum latency_range {
2809 lowest_latency = 0,
2810 low_latency = 1,
2811 bulk_latency = 2,
2812 latency_invalid = 255
2813 };
2814
2815 /**
2816 * e1000_update_itr - update the dynamic ITR value based on statistics
2817 * Stores a new ITR value based on packets and byte
2818 * counts during the last interrupt. The advantage of per interrupt
2819 * computation is faster updates and more accurate ITR for the current
2820 * traffic pattern. Constants in this function were computed
2821 * based on theoretical maximum wire speed and thresholds were set based
2822 * on testing data as well as attempting to minimize response time
2823 * while increasing bulk throughput.
2824 * this functionality is controlled by the InterruptThrottleRate module
2825 * parameter (see e1000_param.c)
2826 * @adapter: pointer to adapter
2827 * @itr_setting: current adapter->itr
2828 * @packets: the number of packets during this measurement interval
2829 * @bytes: the number of bytes during this measurement interval
2830 **/
2831 static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
2832 uint16_t itr_setting,
2833 int packets,
2834 int bytes)
2835 {
2836 unsigned int retval = itr_setting;
2837 struct e1000_hw *hw = &adapter->hw;
2838
2839 if (unlikely(hw->mac_type < e1000_82540))
2840 goto update_itr_done;
2841
2842 if (packets == 0)
2843 goto update_itr_done;
2844
2845 switch (itr_setting) {
2846 case lowest_latency:
2847 /* jumbo frames get bulk treatment*/
2848 if (bytes/packets > 8000)
2849 retval = bulk_latency;
2850 else if ((packets < 5) && (bytes > 512))
2851 retval = low_latency;
2852 break;
2853 case low_latency: /* 50 usec aka 20000 ints/s */
2854 if (bytes > 10000) {
2855 /* jumbo frames need bulk latency setting */
2856 if (bytes/packets > 8000)
2857 retval = bulk_latency;
2858 else if ((packets < 10) || ((bytes/packets) > 1200))
2859 retval = bulk_latency;
2860 else if ((packets > 35))
2861 retval = lowest_latency;
2862 } else if (bytes/packets > 2000)
2863 retval = bulk_latency;
2864 else if (packets <= 2 && bytes < 512)
2865 retval = lowest_latency;
2866 break;
2867 case bulk_latency: /* 250 usec aka 4000 ints/s */
2868 if (bytes > 25000) {
2869 if (packets > 35)
2870 retval = low_latency;
2871 } else if (bytes < 6000) {
2872 retval = low_latency;
2873 }
2874 break;
2875 }
2876
2877 update_itr_done:
2878 return retval;
2879 }
2880
2881 static void e1000_set_itr(struct e1000_adapter *adapter)
2882 {
2883 struct e1000_hw *hw = &adapter->hw;
2884 uint16_t current_itr;
2885 uint32_t new_itr = adapter->itr;
2886
2887 if (unlikely(hw->mac_type < e1000_82540))
2888 return;
2889
2890 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2891 if (unlikely(adapter->link_speed != SPEED_1000)) {
2892 current_itr = 0;
2893 new_itr = 4000;
2894 goto set_itr_now;
2895 }
2896
2897 adapter->tx_itr = e1000_update_itr(adapter,
2898 adapter->tx_itr,
2899 adapter->total_tx_packets,
2900 adapter->total_tx_bytes);
2901 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2902 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2903 adapter->tx_itr = low_latency;
2904
2905 adapter->rx_itr = e1000_update_itr(adapter,
2906 adapter->rx_itr,
2907 adapter->total_rx_packets,
2908 adapter->total_rx_bytes);
2909 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2910 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2911 adapter->rx_itr = low_latency;
2912
2913 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2914
2915 switch (current_itr) {
2916 /* counts and packets in update_itr are dependent on these numbers */
2917 case lowest_latency:
2918 new_itr = 70000;
2919 break;
2920 case low_latency:
2921 new_itr = 20000; /* aka hwitr = ~200 */
2922 break;
2923 case bulk_latency:
2924 new_itr = 4000;
2925 break;
2926 default:
2927 break;
2928 }
2929
2930 set_itr_now:
2931 if (new_itr != adapter->itr) {
2932 /* this attempts to bias the interrupt rate towards Bulk
2933 * by adding intermediate steps when interrupt rate is
2934 * increasing */
2935 new_itr = new_itr > adapter->itr ?
2936 min(adapter->itr + (new_itr >> 2), new_itr) :
2937 new_itr;
2938 adapter->itr = new_itr;
2939 E1000_WRITE_REG(hw, ITR, 1000000000 / (new_itr * 256));
2940 }
2941
2942 return;
2943 }
2944
2945 #define E1000_TX_FLAGS_CSUM 0x00000001
2946 #define E1000_TX_FLAGS_VLAN 0x00000002
2947 #define E1000_TX_FLAGS_TSO 0x00000004
2948 #define E1000_TX_FLAGS_IPV4 0x00000008
2949 #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
2950 #define E1000_TX_FLAGS_VLAN_SHIFT 16
2951
2952 static int
2953 e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2954 struct sk_buff *skb)
2955 {
2956 struct e1000_context_desc *context_desc;
2957 struct e1000_buffer *buffer_info;
2958 unsigned int i;
2959 uint32_t cmd_length = 0;
2960 uint16_t ipcse = 0, tucse, mss;
2961 uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
2962 int err;
2963
2964 if (skb_is_gso(skb)) {
2965 if (skb_header_cloned(skb)) {
2966 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2967 if (err)
2968 return err;
2969 }
2970
2971 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
2972 mss = skb_shinfo(skb)->gso_size;
2973 if (skb->protocol == htons(ETH_P_IP)) {
2974 struct iphdr *iph = ip_hdr(skb);
2975 iph->tot_len = 0;
2976 iph->check = 0;
2977 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2978 iph->daddr, 0,
2979 IPPROTO_TCP,
2980 0);
2981 cmd_length = E1000_TXD_CMD_IP;
2982 ipcse = skb_transport_offset(skb) - 1;
2983 } else if (skb->protocol == htons(ETH_P_IPV6)) {
2984 ipv6_hdr(skb)->payload_len = 0;
2985 tcp_hdr(skb)->check =
2986 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2987 &ipv6_hdr(skb)->daddr,
2988 0, IPPROTO_TCP, 0);
2989 ipcse = 0;
2990 }
2991 ipcss = skb_network_offset(skb);
2992 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
2993 tucss = skb_transport_offset(skb);
2994 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
2995 tucse = 0;
2996
2997 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
2998 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
2999
3000 i = tx_ring->next_to_use;
3001 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
3002 buffer_info = &tx_ring->buffer_info[i];
3003
3004 context_desc->lower_setup.ip_fields.ipcss = ipcss;
3005 context_desc->lower_setup.ip_fields.ipcso = ipcso;
3006 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
3007 context_desc->upper_setup.tcp_fields.tucss = tucss;
3008 context_desc->upper_setup.tcp_fields.tucso = tucso;
3009 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
3010 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
3011 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
3012 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
3013
3014 buffer_info->time_stamp = jiffies;
3015 buffer_info->next_to_watch = i;
3016
3017 if (++i == tx_ring->count) i = 0;
3018 tx_ring->next_to_use = i;
3019
3020 return TRUE;
3021 }
3022 return FALSE;
3023 }
3024
3025 static boolean_t
3026 e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
3027 struct sk_buff *skb)
3028 {
3029 struct e1000_context_desc *context_desc;
3030 struct e1000_buffer *buffer_info;
3031 unsigned int i;
3032 uint8_t css;
3033
3034 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
3035 css = skb_transport_offset(skb);
3036
3037 i = tx_ring->next_to_use;
3038 buffer_info = &tx_ring->buffer_info[i];
3039 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
3040
3041 context_desc->lower_setup.ip_config = 0;
3042 context_desc->upper_setup.tcp_fields.tucss = css;
3043 context_desc->upper_setup.tcp_fields.tucso =
3044 css + skb->csum_offset;
3045 context_desc->upper_setup.tcp_fields.tucse = 0;
3046 context_desc->tcp_seg_setup.data = 0;
3047 context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
3048
3049 buffer_info->time_stamp = jiffies;
3050 buffer_info->next_to_watch = i;
3051
3052 if (unlikely(++i == tx_ring->count)) i = 0;
3053 tx_ring->next_to_use = i;
3054
3055 return TRUE;
3056 }
3057
3058 return FALSE;
3059 }
3060
3061 #define E1000_MAX_TXD_PWR 12
3062 #define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
3063
3064 static int
3065 e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
3066 struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
3067 unsigned int nr_frags, unsigned int mss)
3068 {
3069 struct e1000_buffer *buffer_info;
3070 unsigned int len = skb->len;
3071 unsigned int offset = 0, size, count = 0, i;
3072 unsigned int f;
3073 len -= skb->data_len;
3074
3075 i = tx_ring->next_to_use;
3076
3077 while (len) {
3078 buffer_info = &tx_ring->buffer_info[i];
3079 size = min(len, max_per_txd);
3080 /* Workaround for Controller erratum --
3081 * descriptor for non-tso packet in a linear SKB that follows a
3082 * tso gets written back prematurely before the data is fully
3083 * DMA'd to the controller */
3084 if (!skb->data_len && tx_ring->last_tx_tso &&
3085 !skb_is_gso(skb)) {
3086 tx_ring->last_tx_tso = 0;
3087 size -= 4;
3088 }
3089
3090 /* Workaround for premature desc write-backs
3091 * in TSO mode. Append 4-byte sentinel desc */
3092 if (unlikely(mss && !nr_frags && size == len && size > 8))
3093 size -= 4;
3094 /* work-around for errata 10 and it applies
3095 * to all controllers in PCI-X mode
3096 * The fix is to make sure that the first descriptor of a
3097 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
3098 */
3099 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
3100 (size > 2015) && count == 0))
3101 size = 2015;
3102
3103 /* Workaround for potential 82544 hang in PCI-X. Avoid
3104 * terminating buffers within evenly-aligned dwords. */
3105 if (unlikely(adapter->pcix_82544 &&
3106 !((unsigned long)(skb->data + offset + size - 1) & 4) &&
3107 size > 4))
3108 size -= 4;
3109
3110 buffer_info->length = size;
3111 buffer_info->dma =
3112 pci_map_single(adapter->pdev,
3113 skb->data + offset,
3114 size,
3115 PCI_DMA_TODEVICE);
3116 buffer_info->time_stamp = jiffies;
3117 buffer_info->next_to_watch = i;
3118
3119 len -= size;
3120 offset += size;
3121 count++;
3122 if (unlikely(++i == tx_ring->count)) i = 0;
3123 }
3124
3125 for (f = 0; f < nr_frags; f++) {
3126 struct skb_frag_struct *frag;
3127
3128 frag = &skb_shinfo(skb)->frags[f];
3129 len = frag->size;
3130 offset = frag->page_offset;
3131
3132 while (len) {
3133 buffer_info = &tx_ring->buffer_info[i];
3134 size = min(len, max_per_txd);
3135 /* Workaround for premature desc write-backs
3136 * in TSO mode. Append 4-byte sentinel desc */
3137 if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
3138 size -= 4;
3139 /* Workaround for potential 82544 hang in PCI-X.
3140 * Avoid terminating buffers within evenly-aligned
3141 * dwords. */
3142 if (unlikely(adapter->pcix_82544 &&
3143 !((unsigned long)(frag->page+offset+size-1) & 4) &&
3144 size > 4))
3145 size -= 4;
3146
3147 buffer_info->length = size;
3148 buffer_info->dma =
3149 pci_map_page(adapter->pdev,
3150 frag->page,
3151 offset,
3152 size,
3153 PCI_DMA_TODEVICE);
3154 buffer_info->time_stamp = jiffies;
3155 buffer_info->next_to_watch = i;
3156
3157 len -= size;
3158 offset += size;
3159 count++;
3160 if (unlikely(++i == tx_ring->count)) i = 0;
3161 }
3162 }
3163
3164 i = (i == 0) ? tx_ring->count - 1 : i - 1;
3165 tx_ring->buffer_info[i].skb = skb;
3166 tx_ring->buffer_info[first].next_to_watch = i;
3167
3168 return count;
3169 }
3170
3171 static void
3172 e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
3173 int tx_flags, int count)
3174 {
3175 struct e1000_tx_desc *tx_desc = NULL;
3176 struct e1000_buffer *buffer_info;
3177 uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
3178 unsigned int i;
3179
3180 if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
3181 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
3182 E1000_TXD_CMD_TSE;
3183 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3184
3185 if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
3186 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
3187 }
3188
3189 if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
3190 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
3191 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3192 }
3193
3194 if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
3195 txd_lower |= E1000_TXD_CMD_VLE;
3196 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
3197 }
3198
3199 i = tx_ring->next_to_use;
3200
3201 while (count--) {
3202 buffer_info = &tx_ring->buffer_info[i];
3203 tx_desc = E1000_TX_DESC(*tx_ring, i);
3204 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
3205 tx_desc->lower.data =
3206 cpu_to_le32(txd_lower | buffer_info->length);
3207 tx_desc->upper.data = cpu_to_le32(txd_upper);
3208 if (unlikely(++i == tx_ring->count)) i = 0;
3209 }
3210
3211 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
3212
3213 /* Force memory writes to complete before letting h/w
3214 * know there are new descriptors to fetch. (Only
3215 * applicable for weak-ordered memory model archs,
3216 * such as IA-64). */
3217 wmb();
3218
3219 tx_ring->next_to_use = i;
3220 writel(i, adapter->hw.hw_addr + tx_ring->tdt);
3221 /* we need this if more than one processor can write to our tail
3222 * at a time, it syncronizes IO on IA64/Altix systems */
3223 mmiowb();
3224 }
3225
3226 /**
3227 * 82547 workaround to avoid controller hang in half-duplex environment.
3228 * The workaround is to avoid queuing a large packet that would span
3229 * the internal Tx FIFO ring boundary by notifying the stack to resend
3230 * the packet at a later time. This gives the Tx FIFO an opportunity to
3231 * flush all packets. When that occurs, we reset the Tx FIFO pointers
3232 * to the beginning of the Tx FIFO.
3233 **/
3234
3235 #define E1000_FIFO_HDR 0x10
3236 #define E1000_82547_PAD_LEN 0x3E0
3237
3238 static int
3239 e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
3240 {
3241 uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
3242 uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
3243
3244 skb_fifo_len = ALIGN(skb_fifo_len, E1000_FIFO_HDR);
3245
3246 if (adapter->link_duplex != HALF_DUPLEX)
3247 goto no_fifo_stall_required;
3248
3249 if (atomic_read(&adapter->tx_fifo_stall))
3250 return 1;
3251
3252 if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
3253 atomic_set(&adapter->tx_fifo_stall, 1);
3254 return 1;
3255 }
3256
3257 no_fifo_stall_required:
3258 adapter->tx_fifo_head += skb_fifo_len;
3259 if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
3260 adapter->tx_fifo_head -= adapter->tx_fifo_size;
3261 return 0;
3262 }
3263
3264 #define MINIMUM_DHCP_PACKET_SIZE 282
3265 static int
3266 e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
3267 {
3268 struct e1000_hw *hw = &adapter->hw;
3269 uint16_t length, offset;
3270 if (vlan_tx_tag_present(skb)) {
3271 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
3272 ( adapter->hw.mng_cookie.status &
3273 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
3274 return 0;
3275 }
3276 if (skb->len > MINIMUM_DHCP_PACKET_SIZE) {
3277 struct ethhdr *eth = (struct ethhdr *) skb->data;
3278 if ((htons(ETH_P_IP) == eth->h_proto)) {
3279 const struct iphdr *ip =
3280 (struct iphdr *)((uint8_t *)skb->data+14);
3281 if (IPPROTO_UDP == ip->protocol) {
3282 struct udphdr *udp =
3283 (struct udphdr *)((uint8_t *)ip +
3284 (ip->ihl << 2));
3285 if (ntohs(udp->dest) == 67) {
3286 offset = (uint8_t *)udp + 8 - skb->data;
3287 length = skb->len - offset;
3288
3289 return e1000_mng_write_dhcp_info(hw,
3290 (uint8_t *)udp + 8,
3291 length);
3292 }
3293 }
3294 }
3295 }
3296 return 0;
3297 }
3298
3299 static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
3300 {
3301 struct e1000_adapter *adapter = netdev_priv(netdev);
3302 struct e1000_tx_ring *tx_ring = adapter->tx_ring;
3303
3304 netif_stop_queue(netdev);
3305 /* Herbert's original patch had:
3306 * smp_mb__after_netif_stop_queue();
3307 * but since that doesn't exist yet, just open code it. */
3308 smp_mb();
3309
3310 /* We need to check again in a case another CPU has just
3311 * made room available. */
3312 if (likely(E1000_DESC_UNUSED(tx_ring) < size))
3313 return -EBUSY;
3314
3315 /* A reprieve! */
3316 netif_start_queue(netdev);
3317 ++adapter->restart_queue;
3318 return 0;
3319 }
3320
3321 static int e1000_maybe_stop_tx(struct net_device *netdev,
3322 struct e1000_tx_ring *tx_ring, int size)
3323 {
3324 if (likely(E1000_DESC_UNUSED(tx_ring) >= size))
3325 return 0;
3326 return __e1000_maybe_stop_tx(netdev, size);
3327 }
3328
3329 #define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
3330 static int
3331 e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
3332 {
3333 struct e1000_adapter *adapter = netdev_priv(netdev);
3334 struct e1000_tx_ring *tx_ring;
3335 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
3336 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
3337 unsigned int tx_flags = 0;
3338 unsigned int len = skb->len - skb->data_len;
3339 unsigned long flags;
3340 unsigned int nr_frags;
3341 unsigned int mss;
3342 int count = 0;
3343 int tso;
3344 unsigned int f;
3345
3346 /* This goes back to the question of how to logically map a tx queue
3347 * to a flow. Right now, performance is impacted slightly negatively
3348 * if using multiple tx queues. If the stack breaks away from a
3349 * single qdisc implementation, we can look at this again. */
3350 tx_ring = adapter->tx_ring;
3351
3352 if (unlikely(skb->len <= 0)) {
3353 dev_kfree_skb_any(skb);
3354 return NETDEV_TX_OK;
3355 }
3356
3357 /* 82571 and newer doesn't need the workaround that limited descriptor
3358 * length to 4kB */
3359 if (adapter->hw.mac_type >= e1000_82571)
3360 max_per_txd = 8192;
3361
3362 mss = skb_shinfo(skb)->gso_size;
3363 /* The controller does a simple calculation to
3364 * make sure there is enough room in the FIFO before
3365 * initiating the DMA for each buffer. The calc is:
3366 * 4 = ceil(buffer len/mss). To make sure we don't
3367 * overrun the FIFO, adjust the max buffer len if mss
3368 * drops. */
3369 if (mss) {
3370 uint8_t hdr_len;
3371 max_per_txd = min(mss << 2, max_per_txd);
3372 max_txd_pwr = fls(max_per_txd) - 1;
3373
3374 /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
3375 * points to just header, pull a few bytes of payload from
3376 * frags into skb->data */
3377 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
3378 if (skb->data_len && hdr_len == len) {
3379 switch (adapter->hw.mac_type) {
3380 unsigned int pull_size;
3381 case e1000_82544:
3382 /* Make sure we have room to chop off 4 bytes,
3383 * and that the end alignment will work out to
3384 * this hardware's requirements
3385 * NOTE: this is a TSO only workaround
3386 * if end byte alignment not correct move us
3387 * into the next dword */
3388 if ((unsigned long)(skb_tail_pointer(skb) - 1) & 4)
3389 break;
3390 /* fall through */
3391 case e1000_82571:
3392 case e1000_82572:
3393 case e1000_82573:
3394 case e1000_ich8lan:
3395 pull_size = min((unsigned int)4, skb->data_len);
3396 if (!__pskb_pull_tail(skb, pull_size)) {
3397 DPRINTK(DRV, ERR,
3398 "__pskb_pull_tail failed.\n");
3399 dev_kfree_skb_any(skb);
3400 return NETDEV_TX_OK;
3401 }
3402 len = skb->len - skb->data_len;
3403 break;
3404 default:
3405 /* do nothing */
3406 break;
3407 }
3408 }
3409 }
3410
3411 /* reserve a descriptor for the offload context */
3412 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
3413 count++;
3414 count++;
3415
3416 /* Controller Erratum workaround */
3417 if (!skb->data_len && tx_ring->last_tx_tso && !skb_is_gso(skb))
3418 count++;
3419
3420 count += TXD_USE_COUNT(len, max_txd_pwr);
3421
3422 if (adapter->pcix_82544)
3423 count++;
3424
3425 /* work-around for errata 10 and it applies to all controllers
3426 * in PCI-X mode, so add one more descriptor to the count
3427 */
3428 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
3429 (len > 2015)))
3430 count++;
3431
3432 nr_frags = skb_shinfo(skb)->nr_frags;
3433 for (f = 0; f < nr_frags; f++)
3434 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
3435 max_txd_pwr);
3436 if (adapter->pcix_82544)
3437 count += nr_frags;
3438
3439
3440 if (adapter->hw.tx_pkt_filtering &&
3441 (adapter->hw.mac_type == e1000_82573))
3442 e1000_transfer_dhcp_info(adapter, skb);
3443
3444 if (!spin_trylock_irqsave(&tx_ring->tx_lock, flags))
3445 /* Collision - tell upper layer to requeue */
3446 return NETDEV_TX_LOCKED;
3447
3448 /* need: count + 2 desc gap to keep tail from touching
3449 * head, otherwise try next time */
3450 if (unlikely(e1000_maybe_stop_tx(netdev, tx_ring, count + 2))) {
3451 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3452 return NETDEV_TX_BUSY;
3453 }
3454
3455 if (unlikely(adapter->hw.mac_type == e1000_82547)) {
3456 if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
3457 netif_stop_queue(netdev);
3458 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
3459 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3460 return NETDEV_TX_BUSY;
3461 }
3462 }
3463
3464 if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
3465 tx_flags |= E1000_TX_FLAGS_VLAN;
3466 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
3467 }
3468
3469 first = tx_ring->next_to_use;
3470
3471 tso = e1000_tso(adapter, tx_ring, skb);
3472 if (tso < 0) {
3473 dev_kfree_skb_any(skb);
3474 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3475 return NETDEV_TX_OK;
3476 }
3477
3478 if (likely(tso)) {
3479 tx_ring->last_tx_tso = 1;
3480 tx_flags |= E1000_TX_FLAGS_TSO;
3481 } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
3482 tx_flags |= E1000_TX_FLAGS_CSUM;
3483
3484 /* Old method was to assume IPv4 packet by default if TSO was enabled.
3485 * 82571 hardware supports TSO capabilities for IPv6 as well...
3486 * no longer assume, we must. */
3487 if (likely(skb->protocol == htons(ETH_P_IP)))
3488 tx_flags |= E1000_TX_FLAGS_IPV4;
3489
3490 e1000_tx_queue(adapter, tx_ring, tx_flags,
3491 e1000_tx_map(adapter, tx_ring, skb, first,
3492 max_per_txd, nr_frags, mss));
3493
3494 netdev->trans_start = jiffies;
3495
3496 /* Make sure there is space in the ring for the next send. */
3497 e1000_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 2);
3498
3499 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3500 return NETDEV_TX_OK;
3501 }
3502
3503 /**
3504 * e1000_tx_timeout - Respond to a Tx Hang
3505 * @netdev: network interface device structure
3506 **/
3507
3508 static void
3509 e1000_tx_timeout(struct net_device *netdev)
3510 {
3511 struct e1000_adapter *adapter = netdev_priv(netdev);
3512
3513 /* Do the reset outside of interrupt context */
3514 adapter->tx_timeout_count++;
3515 schedule_work(&adapter->reset_task);
3516 }
3517
3518 static void
3519 e1000_reset_task(struct work_struct *work)
3520 {
3521 struct e1000_adapter *adapter =
3522 container_of(work, struct e1000_adapter, reset_task);
3523
3524 e1000_reinit_locked(adapter);
3525 }
3526
3527 /**
3528 * e1000_get_stats - Get System Network Statistics
3529 * @netdev: network interface device structure
3530 *
3531 * Returns the address of the device statistics structure.
3532 * The statistics are actually updated from the timer callback.
3533 **/
3534
3535 static struct net_device_stats *
3536 e1000_get_stats(struct net_device *netdev)
3537 {
3538 struct e1000_adapter *adapter = netdev_priv(netdev);
3539
3540 /* only return the current stats */
3541 return &adapter->net_stats;
3542 }
3543
3544 /**
3545 * e1000_change_mtu - Change the Maximum Transfer Unit
3546 * @netdev: network interface device structure
3547 * @new_mtu: new value for maximum frame size
3548 *
3549 * Returns 0 on success, negative on failure
3550 **/
3551
3552 static int
3553 e1000_change_mtu(struct net_device *netdev, int new_mtu)
3554 {
3555 struct e1000_adapter *adapter = netdev_priv(netdev);
3556 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
3557 uint16_t eeprom_data = 0;
3558
3559 if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
3560 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
3561 DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
3562 return -EINVAL;
3563 }
3564
3565 /* Adapter-specific max frame size limits. */
3566 switch (adapter->hw.mac_type) {
3567 case e1000_undefined ... e1000_82542_rev2_1:
3568 case e1000_ich8lan:
3569 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3570 DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
3571 return -EINVAL;
3572 }
3573 break;
3574 case e1000_82573:
3575 /* Jumbo Frames not supported if:
3576 * - this is not an 82573L device
3577 * - ASPM is enabled in any way (0x1A bits 3:2) */
3578 e1000_read_eeprom(&adapter->hw, EEPROM_INIT_3GIO_3, 1,
3579 &eeprom_data);
3580 if ((adapter->hw.device_id != E1000_DEV_ID_82573L) ||
3581 (eeprom_data & EEPROM_WORD1A_ASPM_MASK)) {
3582 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3583 DPRINTK(PROBE, ERR,
3584 "Jumbo Frames not supported.\n");
3585 return -EINVAL;
3586 }
3587 break;
3588 }
3589 /* ERT will be enabled later to enable wire speed receives */
3590
3591 /* fall through to get support */
3592 case e1000_82571:
3593 case e1000_82572:
3594 case e1000_80003es2lan:
3595 #define MAX_STD_JUMBO_FRAME_SIZE 9234
3596 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
3597 DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
3598 return -EINVAL;
3599 }
3600 break;
3601 default:
3602 /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
3603 break;
3604 }
3605
3606 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
3607 * means we reserve 2 more, this pushes us to allocate from the next
3608 * larger slab size
3609 * i.e. RXBUFFER_2048 --> size-4096 slab */
3610
3611 if (max_frame <= E1000_RXBUFFER_256)
3612 adapter->rx_buffer_len = E1000_RXBUFFER_256;
3613 else if (max_frame <= E1000_RXBUFFER_512)
3614 adapter->rx_buffer_len = E1000_RXBUFFER_512;
3615 else if (max_frame <= E1000_RXBUFFER_1024)
3616 adapter->rx_buffer_len = E1000_RXBUFFER_1024;
3617 else if (max_frame <= E1000_RXBUFFER_2048)
3618 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
3619 else if (max_frame <= E1000_RXBUFFER_4096)
3620 adapter->rx_buffer_len = E1000_RXBUFFER_4096;
3621 else if (max_frame <= E1000_RXBUFFER_8192)
3622 adapter->rx_buffer_len = E1000_RXBUFFER_8192;
3623 else if (max_frame <= E1000_RXBUFFER_16384)
3624 adapter->rx_buffer_len = E1000_RXBUFFER_16384;
3625
3626 /* adjust allocation if LPE protects us, and we aren't using SBP */
3627 if (!adapter->hw.tbi_compatibility_on &&
3628 ((max_frame == MAXIMUM_ETHERNET_FRAME_SIZE) ||
3629 (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
3630 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
3631
3632 netdev->mtu = new_mtu;
3633 adapter->hw.max_frame_size = max_frame;
3634
3635 if (netif_running(netdev))
3636 e1000_reinit_locked(adapter);
3637
3638 return 0;
3639 }
3640
3641 /**
3642 * e1000_update_stats - Update the board statistics counters
3643 * @adapter: board private structure
3644 **/
3645
3646 void
3647 e1000_update_stats(struct e1000_adapter *adapter)
3648 {
3649 struct e1000_hw *hw = &adapter->hw;
3650 struct pci_dev *pdev = adapter->pdev;
3651 unsigned long flags;
3652 uint16_t phy_tmp;
3653
3654 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3655
3656 /*
3657 * Prevent stats update while adapter is being reset, or if the pci
3658 * connection is down.
3659 */
3660 if (adapter->link_speed == 0)
3661 return;
3662 if (pci_channel_offline(pdev))
3663 return;
3664
3665 spin_lock_irqsave(&adapter->stats_lock, flags);
3666
3667 /* these counters are modified from e1000_tbi_adjust_stats,
3668 * called from the interrupt context, so they must only
3669 * be written while holding adapter->stats_lock
3670 */
3671
3672 adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
3673 adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
3674 adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
3675 adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
3676 adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
3677 adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
3678 adapter->stats.roc += E1000_READ_REG(hw, ROC);
3679
3680 if (adapter->hw.mac_type != e1000_ich8lan) {
3681 adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
3682 adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
3683 adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
3684 adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
3685 adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
3686 adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
3687 }
3688
3689 adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
3690 adapter->stats.mpc += E1000_READ_REG(hw, MPC);
3691 adapter->stats.scc += E1000_READ_REG(hw, SCC);
3692 adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
3693 adapter->stats.mcc += E1000_READ_REG(hw, MCC);
3694 adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
3695 adapter->stats.dc += E1000_READ_REG(hw, DC);
3696 adapter->stats.sec += E1000_READ_REG(hw, SEC);
3697 adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
3698 adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
3699 adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
3700 adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
3701 adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
3702 adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
3703 adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
3704 adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
3705 adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
3706 adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
3707 adapter->stats.ruc += E1000_READ_REG(hw, RUC);
3708 adapter->stats.rfc += E1000_READ_REG(hw, RFC);
3709 adapter->stats.rjc += E1000_READ_REG(hw, RJC);
3710 adapter->stats.torl += E1000_READ_REG(hw, TORL);
3711 adapter->stats.torh += E1000_READ_REG(hw, TORH);
3712 adapter->stats.totl += E1000_READ_REG(hw, TOTL);
3713 adapter->stats.toth += E1000_READ_REG(hw, TOTH);
3714 adapter->stats.tpr += E1000_READ_REG(hw, TPR);
3715
3716 if (adapter->hw.mac_type != e1000_ich8lan) {
3717 adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
3718 adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
3719 adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
3720 adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
3721 adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
3722 adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
3723 }
3724
3725 adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
3726 adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
3727
3728 /* used for adaptive IFS */
3729
3730 hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
3731 adapter->stats.tpt += hw->tx_packet_delta;
3732 hw->collision_delta = E1000_READ_REG(hw, COLC);
3733 adapter->stats.colc += hw->collision_delta;
3734
3735 if (hw->mac_type >= e1000_82543) {
3736 adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
3737 adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
3738 adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
3739 adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
3740 adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
3741 adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
3742 }
3743 if (hw->mac_type > e1000_82547_rev_2) {
3744 adapter->stats.iac += E1000_READ_REG(hw, IAC);
3745 adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
3746
3747 if (adapter->hw.mac_type != e1000_ich8lan) {
3748 adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
3749 adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
3750 adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
3751 adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
3752 adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
3753 adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
3754 adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
3755 }
3756 }
3757
3758 /* Fill out the OS statistics structure */
3759 adapter->net_stats.multicast = adapter->stats.mprc;
3760 adapter->net_stats.collisions = adapter->stats.colc;
3761
3762 /* Rx Errors */
3763
3764 /* RLEC on some newer hardware can be incorrect so build
3765 * our own version based on RUC and ROC */
3766 adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3767 adapter->stats.crcerrs + adapter->stats.algnerrc +
3768 adapter->stats.ruc + adapter->stats.roc +
3769 adapter->stats.cexterr;
3770 adapter->stats.rlerrc = adapter->stats.ruc + adapter->stats.roc;
3771 adapter->net_stats.rx_length_errors = adapter->stats.rlerrc;
3772 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3773 adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
3774 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3775
3776 /* Tx Errors */
3777 adapter->stats.txerrc = adapter->stats.ecol + adapter->stats.latecol;
3778 adapter->net_stats.tx_errors = adapter->stats.txerrc;
3779 adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3780 adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3781 adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
3782 if (adapter->hw.bad_tx_carr_stats_fd &&
3783 adapter->link_duplex == FULL_DUPLEX) {
3784 adapter->net_stats.tx_carrier_errors = 0;
3785 adapter->stats.tncrs = 0;
3786 }
3787
3788 /* Tx Dropped needs to be maintained elsewhere */
3789
3790 /* Phy Stats */
3791 if (hw->media_type == e1000_media_type_copper) {
3792 if ((adapter->link_speed == SPEED_1000) &&
3793 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
3794 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3795 adapter->phy_stats.idle_errors += phy_tmp;
3796 }
3797
3798 if ((hw->mac_type <= e1000_82546) &&
3799 (hw->phy_type == e1000_phy_m88) &&
3800 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
3801 adapter->phy_stats.receive_errors += phy_tmp;
3802 }
3803
3804 /* Management Stats */
3805 if (adapter->hw.has_smbus) {
3806 adapter->stats.mgptc += E1000_READ_REG(hw, MGTPTC);
3807 adapter->stats.mgprc += E1000_READ_REG(hw, MGTPRC);
3808 adapter->stats.mgpdc += E1000_READ_REG(hw, MGTPDC);
3809 }
3810
3811 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3812 }
3813
3814 /**
3815 * e1000_intr_msi - Interrupt Handler
3816 * @irq: interrupt number
3817 * @data: pointer to a network interface device structure
3818 **/
3819
3820 static irqreturn_t
3821 e1000_intr_msi(int irq, void *data)
3822 {
3823 struct net_device *netdev = data;
3824 struct e1000_adapter *adapter = netdev_priv(netdev);
3825 struct e1000_hw *hw = &adapter->hw;
3826 #ifndef CONFIG_E1000_NAPI
3827 int i;
3828 #endif
3829 uint32_t icr = E1000_READ_REG(hw, ICR);
3830
3831 #ifdef CONFIG_E1000_NAPI
3832 /* read ICR disables interrupts using IAM, so keep up with our
3833 * enable/disable accounting */
3834 atomic_inc(&adapter->irq_sem);
3835 #endif
3836 if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
3837 hw->get_link_status = 1;
3838 /* 80003ES2LAN workaround-- For packet buffer work-around on
3839 * link down event; disable receives here in the ISR and reset
3840 * adapter in watchdog */
3841 if (netif_carrier_ok(netdev) &&
3842 (adapter->hw.mac_type == e1000_80003es2lan)) {
3843 /* disable receives */
3844 uint32_t rctl = E1000_READ_REG(hw, RCTL);
3845 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
3846 }
3847 /* guard against interrupt when we're going down */
3848 if (!test_bit(__E1000_DOWN, &adapter->flags))
3849 mod_timer(&adapter->watchdog_timer, jiffies + 1);
3850 }
3851
3852 #ifdef CONFIG_E1000_NAPI
3853 if (likely(netif_rx_schedule_prep(netdev, &adapter->napi))) {
3854 adapter->total_tx_bytes = 0;
3855 adapter->total_tx_packets = 0;
3856 adapter->total_rx_bytes = 0;
3857 adapter->total_rx_packets = 0;
3858 __netif_rx_schedule(netdev, &adapter->napi);
3859 } else
3860 e1000_irq_enable(adapter);
3861 #else
3862 adapter->total_tx_bytes = 0;
3863 adapter->total_rx_bytes = 0;
3864 adapter->total_tx_packets = 0;
3865 adapter->total_rx_packets = 0;
3866
3867 for (i = 0; i < E1000_MAX_INTR; i++)
3868 if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
3869 !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
3870 break;
3871
3872 if (likely(adapter->itr_setting & 3))
3873 e1000_set_itr(adapter);
3874 #endif
3875
3876 return IRQ_HANDLED;
3877 }
3878
3879 /**
3880 * e1000_intr - Interrupt Handler
3881 * @irq: interrupt number
3882 * @data: pointer to a network interface device structure
3883 **/
3884
3885 static irqreturn_t
3886 e1000_intr(int irq, void *data)
3887 {
3888 struct net_device *netdev = data;
3889 struct e1000_adapter *adapter = netdev_priv(netdev);
3890 struct e1000_hw *hw = &adapter->hw;
3891 uint32_t rctl, icr = E1000_READ_REG(hw, ICR);
3892 #ifndef CONFIG_E1000_NAPI
3893 int i;
3894 #endif
3895 if (unlikely(!icr))
3896 return IRQ_NONE; /* Not our interrupt */
3897
3898 #ifdef CONFIG_E1000_NAPI
3899 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
3900 * not set, then the adapter didn't send an interrupt */
3901 if (unlikely(hw->mac_type >= e1000_82571 &&
3902 !(icr & E1000_ICR_INT_ASSERTED)))
3903 return IRQ_NONE;
3904
3905 /* Interrupt Auto-Mask...upon reading ICR,
3906 * interrupts are masked. No need for the
3907 * IMC write, but it does mean we should
3908 * account for it ASAP. */
3909 if (likely(hw->mac_type >= e1000_82571))
3910 atomic_inc(&adapter->irq_sem);
3911 #endif
3912
3913 if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
3914 hw->get_link_status = 1;
3915 /* 80003ES2LAN workaround--
3916 * For packet buffer work-around on link down event;
3917 * disable receives here in the ISR and
3918 * reset adapter in watchdog
3919 */
3920 if (netif_carrier_ok(netdev) &&
3921 (adapter->hw.mac_type == e1000_80003es2lan)) {
3922 /* disable receives */
3923 rctl = E1000_READ_REG(hw, RCTL);
3924 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
3925 }
3926 /* guard against interrupt when we're going down */
3927 if (!test_bit(__E1000_DOWN, &adapter->flags))
3928 mod_timer(&adapter->watchdog_timer, jiffies + 1);
3929 }
3930
3931 #ifdef CONFIG_E1000_NAPI
3932 if (unlikely(hw->mac_type < e1000_82571)) {
3933 /* disable interrupts, without the synchronize_irq bit */
3934 atomic_inc(&adapter->irq_sem);
3935 E1000_WRITE_REG(hw, IMC, ~0);
3936 E1000_WRITE_FLUSH(hw);
3937 }
3938 if (likely(netif_rx_schedule_prep(netdev, &adapter->napi))) {
3939 adapter->total_tx_bytes = 0;
3940 adapter->total_tx_packets = 0;
3941 adapter->total_rx_bytes = 0;
3942 adapter->total_rx_packets = 0;
3943 __netif_rx_schedule(netdev, &adapter->napi);
3944 } else
3945 /* this really should not happen! if it does it is basically a
3946 * bug, but not a hard error, so enable ints and continue */
3947 e1000_irq_enable(adapter);
3948 #else
3949 /* Writing IMC and IMS is needed for 82547.
3950 * Due to Hub Link bus being occupied, an interrupt
3951 * de-assertion message is not able to be sent.
3952 * When an interrupt assertion message is generated later,
3953 * two messages are re-ordered and sent out.
3954 * That causes APIC to think 82547 is in de-assertion
3955 * state, while 82547 is in assertion state, resulting
3956 * in dead lock. Writing IMC forces 82547 into
3957 * de-assertion state.
3958 */
3959 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) {
3960 atomic_inc(&adapter->irq_sem);
3961 E1000_WRITE_REG(hw, IMC, ~0);
3962 }
3963
3964 adapter->total_tx_bytes = 0;
3965 adapter->total_rx_bytes = 0;
3966 adapter->total_tx_packets = 0;
3967 adapter->total_rx_packets = 0;
3968
3969 for (i = 0; i < E1000_MAX_INTR; i++)
3970 if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
3971 !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
3972 break;
3973
3974 if (likely(adapter->itr_setting & 3))
3975 e1000_set_itr(adapter);
3976
3977 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
3978 e1000_irq_enable(adapter);
3979
3980 #endif
3981 return IRQ_HANDLED;
3982 }
3983
3984 #ifdef CONFIG_E1000_NAPI
3985 /**
3986 * e1000_clean - NAPI Rx polling callback
3987 * @adapter: board private structure
3988 **/
3989
3990 static int
3991 e1000_clean(struct napi_struct *napi, int budget)
3992 {
3993 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, napi);
3994 struct net_device *poll_dev = adapter->netdev;
3995 int tx_cleaned = 0, work_done = 0;
3996
3997 /* Must NOT use netdev_priv macro here. */
3998 adapter = poll_dev->priv;
3999
4000 /* e1000_clean is called per-cpu. This lock protects
4001 * tx_ring[0] from being cleaned by multiple cpus
4002 * simultaneously. A failure obtaining the lock means
4003 * tx_ring[0] is currently being cleaned anyway. */
4004 if (spin_trylock(&adapter->tx_queue_lock)) {
4005 tx_cleaned = e1000_clean_tx_irq(adapter,
4006 &adapter->tx_ring[0]);
4007 spin_unlock(&adapter->tx_queue_lock);
4008 }
4009
4010 adapter->clean_rx(adapter, &adapter->rx_ring[0],
4011 &work_done, budget);
4012
4013 if (tx_cleaned)
4014 work_done = budget;
4015
4016 /* If budget not fully consumed, exit the polling mode */
4017 if (work_done < budget) {
4018 if (likely(adapter->itr_setting & 3))
4019 e1000_set_itr(adapter);
4020 netif_rx_complete(poll_dev, napi);
4021 e1000_irq_enable(adapter);
4022 }
4023
4024 return work_done;
4025 }
4026
4027 #endif
4028 /**
4029 * e1000_clean_tx_irq - Reclaim resources after transmit completes
4030 * @adapter: board private structure
4031 **/
4032
4033 static boolean_t
4034 e1000_clean_tx_irq(struct e1000_adapter *adapter,
4035 struct e1000_tx_ring *tx_ring)
4036 {
4037 struct net_device *netdev = adapter->netdev;
4038 struct e1000_tx_desc *tx_desc, *eop_desc;
4039 struct e1000_buffer *buffer_info;
4040 unsigned int i, eop;
4041 #ifdef CONFIG_E1000_NAPI
4042 unsigned int count = 0;
4043 #endif
4044 boolean_t cleaned = FALSE;
4045 unsigned int total_tx_bytes=0, total_tx_packets=0;
4046
4047 i = tx_ring->next_to_clean;
4048 eop = tx_ring->buffer_info[i].next_to_watch;
4049 eop_desc = E1000_TX_DESC(*tx_ring, eop);
4050
4051 while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
4052 for (cleaned = FALSE; !cleaned; ) {
4053 tx_desc = E1000_TX_DESC(*tx_ring, i);
4054 buffer_info = &tx_ring->buffer_info[i];
4055 cleaned = (i == eop);
4056
4057 if (cleaned) {
4058 struct sk_buff *skb = buffer_info->skb;
4059 unsigned int segs, bytecount;
4060 segs = skb_shinfo(skb)->gso_segs ?: 1;
4061 /* multiply data chunks by size of headers */
4062 bytecount = ((segs - 1) * skb_headlen(skb)) +
4063 skb->len;
4064 total_tx_packets += segs;
4065 total_tx_bytes += bytecount;
4066 }
4067 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
4068 tx_desc->upper.data = 0;
4069
4070 if (unlikely(++i == tx_ring->count)) i = 0;
4071 }
4072
4073 eop = tx_ring->buffer_info[i].next_to_watch;
4074 eop_desc = E1000_TX_DESC(*tx_ring, eop);
4075 #ifdef CONFIG_E1000_NAPI
4076 #define E1000_TX_WEIGHT 64
4077 /* weight of a sort for tx, to avoid endless transmit cleanup */
4078 if (count++ == E1000_TX_WEIGHT) break;
4079 #endif
4080 }
4081
4082 tx_ring->next_to_clean = i;
4083
4084 #define TX_WAKE_THRESHOLD 32
4085 if (unlikely(cleaned && netif_carrier_ok(netdev) &&
4086 E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) {
4087 /* Make sure that anybody stopping the queue after this
4088 * sees the new next_to_clean.
4089 */
4090 smp_mb();
4091 if (netif_queue_stopped(netdev)) {
4092 netif_wake_queue(netdev);
4093 ++adapter->restart_queue;
4094 }
4095 }
4096
4097 if (adapter->detect_tx_hung) {
4098 /* Detect a transmit hang in hardware, this serializes the
4099 * check with the clearing of time_stamp and movement of i */
4100 adapter->detect_tx_hung = FALSE;
4101 if (tx_ring->buffer_info[eop].dma &&
4102 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
4103 (adapter->tx_timeout_factor * HZ))
4104 && !(E1000_READ_REG(&adapter->hw, STATUS) &
4105 E1000_STATUS_TXOFF)) {
4106
4107 /* detected Tx unit hang */
4108 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
4109 " Tx Queue <%lu>\n"
4110 " TDH <%x>\n"
4111 " TDT <%x>\n"
4112 " next_to_use <%x>\n"
4113 " next_to_clean <%x>\n"
4114 "buffer_info[next_to_clean]\n"
4115 " time_stamp <%lx>\n"
4116 " next_to_watch <%x>\n"
4117 " jiffies <%lx>\n"
4118 " next_to_watch.status <%x>\n",
4119 (unsigned long)((tx_ring - adapter->tx_ring) /
4120 sizeof(struct e1000_tx_ring)),
4121 readl(adapter->hw.hw_addr + tx_ring->tdh),
4122 readl(adapter->hw.hw_addr + tx_ring->tdt),
4123 tx_ring->next_to_use,
4124 tx_ring->next_to_clean,
4125 tx_ring->buffer_info[eop].time_stamp,
4126 eop,
4127 jiffies,
4128 eop_desc->upper.fields.status);
4129 netif_stop_queue(netdev);
4130 }
4131 }
4132 adapter->total_tx_bytes += total_tx_bytes;
4133 adapter->total_tx_packets += total_tx_packets;
4134 adapter->net_stats.tx_bytes += total_tx_bytes;
4135 adapter->net_stats.tx_packets += total_tx_packets;
4136 return cleaned;
4137 }
4138
4139 /**
4140 * e1000_rx_checksum - Receive Checksum Offload for 82543
4141 * @adapter: board private structure
4142 * @status_err: receive descriptor status and error fields
4143 * @csum: receive descriptor csum field
4144 * @sk_buff: socket buffer with received data
4145 **/
4146
4147 static void
4148 e1000_rx_checksum(struct e1000_adapter *adapter,
4149 uint32_t status_err, uint32_t csum,
4150 struct sk_buff *skb)
4151 {
4152 uint16_t status = (uint16_t)status_err;
4153 uint8_t errors = (uint8_t)(status_err >> 24);
4154 skb->ip_summed = CHECKSUM_NONE;
4155
4156 /* 82543 or newer only */
4157 if (unlikely(adapter->hw.mac_type < e1000_82543)) return;
4158 /* Ignore Checksum bit is set */
4159 if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
4160 /* TCP/UDP checksum error bit is set */
4161 if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
4162 /* let the stack verify checksum errors */
4163 adapter->hw_csum_err++;
4164 return;
4165 }
4166 /* TCP/UDP Checksum has not been calculated */
4167 if (adapter->hw.mac_type <= e1000_82547_rev_2) {
4168 if (!(status & E1000_RXD_STAT_TCPCS))
4169 return;
4170 } else {
4171 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
4172 return;
4173 }
4174 /* It must be a TCP or UDP packet with a valid checksum */
4175 if (likely(status & E1000_RXD_STAT_TCPCS)) {
4176 /* TCP checksum is good */
4177 skb->ip_summed = CHECKSUM_UNNECESSARY;
4178 } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
4179 /* IP fragment with UDP payload */
4180 /* Hardware complements the payload checksum, so we undo it
4181 * and then put the value in host order for further stack use.
4182 */
4183 __sum16 sum = (__force __sum16)htons(csum);
4184 skb->csum = csum_unfold(~sum);
4185 skb->ip_summed = CHECKSUM_COMPLETE;
4186 }
4187 adapter->hw_csum_good++;
4188 }
4189
4190 /**
4191 * e1000_clean_rx_irq - Send received data up the network stack; legacy
4192 * @adapter: board private structure
4193 **/
4194
4195 static boolean_t
4196 #ifdef CONFIG_E1000_NAPI
4197 e1000_clean_rx_irq(struct e1000_adapter *adapter,
4198 struct e1000_rx_ring *rx_ring,
4199 int *work_done, int work_to_do)
4200 #else
4201 e1000_clean_rx_irq(struct e1000_adapter *adapter,
4202 struct e1000_rx_ring *rx_ring)
4203 #endif
4204 {
4205 struct net_device *netdev = adapter->netdev;
4206 struct pci_dev *pdev = adapter->pdev;
4207 struct e1000_rx_desc *rx_desc, *next_rxd;
4208 struct e1000_buffer *buffer_info, *next_buffer;
4209 unsigned long flags;
4210 uint32_t length;
4211 uint8_t last_byte;
4212 unsigned int i;
4213 int cleaned_count = 0;
4214 boolean_t cleaned = FALSE;
4215 unsigned int total_rx_bytes=0, total_rx_packets=0;
4216
4217 i = rx_ring->next_to_clean;
4218 rx_desc = E1000_RX_DESC(*rx_ring, i);
4219 buffer_info = &rx_ring->buffer_info[i];
4220
4221 while (rx_desc->status & E1000_RXD_STAT_DD) {
4222 struct sk_buff *skb;
4223 u8 status;
4224
4225 #ifdef CONFIG_E1000_NAPI
4226 if (*work_done >= work_to_do)
4227 break;
4228 (*work_done)++;
4229 #endif
4230 status = rx_desc->status;
4231 skb = buffer_info->skb;
4232 buffer_info->skb = NULL;
4233
4234 prefetch(skb->data - NET_IP_ALIGN);
4235
4236 if (++i == rx_ring->count) i = 0;
4237 next_rxd = E1000_RX_DESC(*rx_ring, i);
4238 prefetch(next_rxd);
4239
4240 next_buffer = &rx_ring->buffer_info[i];
4241
4242 cleaned = TRUE;
4243 cleaned_count++;
4244 pci_unmap_single(pdev,
4245 buffer_info->dma,
4246 buffer_info->length,
4247 PCI_DMA_FROMDEVICE);
4248
4249 length = le16_to_cpu(rx_desc->length);
4250
4251 if (unlikely(!(status & E1000_RXD_STAT_EOP))) {
4252 /* All receives must fit into a single buffer */
4253 E1000_DBG("%s: Receive packet consumed multiple"
4254 " buffers\n", netdev->name);
4255 /* recycle */
4256 buffer_info->skb = skb;
4257 goto next_desc;
4258 }
4259
4260 if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
4261 last_byte = *(skb->data + length - 1);
4262 if (TBI_ACCEPT(&adapter->hw, status,
4263 rx_desc->errors, length, last_byte)) {
4264 spin_lock_irqsave(&adapter->stats_lock, flags);
4265 e1000_tbi_adjust_stats(&adapter->hw,
4266 &adapter->stats,
4267 length, skb->data);
4268 spin_unlock_irqrestore(&adapter->stats_lock,
4269 flags);
4270 length--;
4271 } else {
4272 /* recycle */
4273 buffer_info->skb = skb;
4274 goto next_desc;
4275 }
4276 }
4277
4278 /* adjust length to remove Ethernet CRC, this must be
4279 * done after the TBI_ACCEPT workaround above */
4280 length -= 4;
4281
4282 /* probably a little skewed due to removing CRC */
4283 total_rx_bytes += length;
4284 total_rx_packets++;
4285
4286 /* code added for copybreak, this should improve
4287 * performance for small packets with large amounts
4288 * of reassembly being done in the stack */
4289 if (length < copybreak) {
4290 struct sk_buff *new_skb =
4291 netdev_alloc_skb(netdev, length + NET_IP_ALIGN);
4292 if (new_skb) {
4293 skb_reserve(new_skb, NET_IP_ALIGN);
4294 skb_copy_to_linear_data_offset(new_skb,
4295 -NET_IP_ALIGN,
4296 (skb->data -
4297 NET_IP_ALIGN),
4298 (length +
4299 NET_IP_ALIGN));
4300 /* save the skb in buffer_info as good */
4301 buffer_info->skb = skb;
4302 skb = new_skb;
4303 }
4304 /* else just continue with the old one */
4305 }
4306 /* end copybreak code */
4307 skb_put(skb, length);
4308
4309 /* Receive Checksum Offload */
4310 e1000_rx_checksum(adapter,
4311 (uint32_t)(status) |
4312 ((uint32_t)(rx_desc->errors) << 24),
4313 le16_to_cpu(rx_desc->csum), skb);
4314
4315 skb->protocol = eth_type_trans(skb, netdev);
4316 #ifdef CONFIG_E1000_NAPI
4317 if (unlikely(adapter->vlgrp &&
4318 (status & E1000_RXD_STAT_VP))) {
4319 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
4320 le16_to_cpu(rx_desc->special) &
4321 E1000_RXD_SPC_VLAN_MASK);
4322 } else {
4323 netif_receive_skb(skb);
4324 }
4325 #else /* CONFIG_E1000_NAPI */
4326 if (unlikely(adapter->vlgrp &&
4327 (status & E1000_RXD_STAT_VP))) {
4328 vlan_hwaccel_rx(skb, adapter->vlgrp,
4329 le16_to_cpu(rx_desc->special) &
4330 E1000_RXD_SPC_VLAN_MASK);
4331 } else {
4332 netif_rx(skb);
4333 }
4334 #endif /* CONFIG_E1000_NAPI */
4335 netdev->last_rx = jiffies;
4336
4337 next_desc:
4338 rx_desc->status = 0;
4339
4340 /* return some buffers to hardware, one at a time is too slow */
4341 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
4342 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4343 cleaned_count = 0;
4344 }
4345
4346 /* use prefetched values */
4347 rx_desc = next_rxd;
4348 buffer_info = next_buffer;
4349 }
4350 rx_ring->next_to_clean = i;
4351
4352 cleaned_count = E1000_DESC_UNUSED(rx_ring);
4353 if (cleaned_count)
4354 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4355
4356 adapter->total_rx_packets += total_rx_packets;
4357 adapter->total_rx_bytes += total_rx_bytes;
4358 adapter->net_stats.rx_bytes += total_rx_bytes;
4359 adapter->net_stats.rx_packets += total_rx_packets;
4360 return cleaned;
4361 }
4362
4363 /**
4364 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
4365 * @adapter: board private structure
4366 **/
4367
4368 static boolean_t
4369 #ifdef CONFIG_E1000_NAPI
4370 e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
4371 struct e1000_rx_ring *rx_ring,
4372 int *work_done, int work_to_do)
4373 #else
4374 e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
4375 struct e1000_rx_ring *rx_ring)
4376 #endif
4377 {
4378 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
4379 struct net_device *netdev = adapter->netdev;
4380 struct pci_dev *pdev = adapter->pdev;
4381 struct e1000_buffer *buffer_info, *next_buffer;
4382 struct e1000_ps_page *ps_page;
4383 struct e1000_ps_page_dma *ps_page_dma;
4384 struct sk_buff *skb;
4385 unsigned int i, j;
4386 uint32_t length, staterr;
4387 int cleaned_count = 0;
4388 boolean_t cleaned = FALSE;
4389 unsigned int total_rx_bytes=0, total_rx_packets=0;
4390
4391 i = rx_ring->next_to_clean;
4392 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
4393 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
4394 buffer_info = &rx_ring->buffer_info[i];
4395
4396 while (staterr & E1000_RXD_STAT_DD) {
4397 ps_page = &rx_ring->ps_page[i];
4398 ps_page_dma = &rx_ring->ps_page_dma[i];
4399 #ifdef CONFIG_E1000_NAPI
4400 if (unlikely(*work_done >= work_to_do))
4401 break;
4402 (*work_done)++;
4403 #endif
4404 skb = buffer_info->skb;
4405
4406 /* in the packet split case this is header only */
4407 prefetch(skb->data - NET_IP_ALIGN);
4408
4409 if (++i == rx_ring->count) i = 0;
4410 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
4411 prefetch(next_rxd);
4412
4413 next_buffer = &rx_ring->buffer_info[i];
4414
4415 cleaned = TRUE;
4416 cleaned_count++;
4417 pci_unmap_single(pdev, buffer_info->dma,
4418 buffer_info->length,
4419 PCI_DMA_FROMDEVICE);
4420
4421 if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
4422 E1000_DBG("%s: Packet Split buffers didn't pick up"
4423 " the full packet\n", netdev->name);
4424 dev_kfree_skb_irq(skb);
4425 goto next_desc;
4426 }
4427
4428 if (unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
4429 dev_kfree_skb_irq(skb);
4430 goto next_desc;
4431 }
4432
4433 length = le16_to_cpu(rx_desc->wb.middle.length0);
4434
4435 if (unlikely(!length)) {
4436 E1000_DBG("%s: Last part of the packet spanning"
4437 " multiple descriptors\n", netdev->name);
4438 dev_kfree_skb_irq(skb);
4439 goto next_desc;
4440 }
4441
4442 /* Good Receive */
4443 skb_put(skb, length);
4444
4445 {
4446 /* this looks ugly, but it seems compiler issues make it
4447 more efficient than reusing j */
4448 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
4449
4450 /* page alloc/put takes too long and effects small packet
4451 * throughput, so unsplit small packets and save the alloc/put*/
4452 if (l1 && (l1 <= copybreak) && ((length + l1) <= adapter->rx_ps_bsize0)) {
4453 u8 *vaddr;
4454 /* there is no documentation about how to call
4455 * kmap_atomic, so we can't hold the mapping
4456 * very long */
4457 pci_dma_sync_single_for_cpu(pdev,
4458 ps_page_dma->ps_page_dma[0],
4459 PAGE_SIZE,
4460 PCI_DMA_FROMDEVICE);
4461 vaddr = kmap_atomic(ps_page->ps_page[0],
4462 KM_SKB_DATA_SOFTIRQ);
4463 memcpy(skb_tail_pointer(skb), vaddr, l1);
4464 kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
4465 pci_dma_sync_single_for_device(pdev,
4466 ps_page_dma->ps_page_dma[0],
4467 PAGE_SIZE, PCI_DMA_FROMDEVICE);
4468 /* remove the CRC */
4469 l1 -= 4;
4470 skb_put(skb, l1);
4471 goto copydone;
4472 } /* if */
4473 }
4474
4475 for (j = 0; j < adapter->rx_ps_pages; j++) {
4476 if (!(length= le16_to_cpu(rx_desc->wb.upper.length[j])))
4477 break;
4478 pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
4479 PAGE_SIZE, PCI_DMA_FROMDEVICE);
4480 ps_page_dma->ps_page_dma[j] = 0;
4481 skb_fill_page_desc(skb, j, ps_page->ps_page[j], 0,
4482 length);
4483 ps_page->ps_page[j] = NULL;
4484 skb->len += length;
4485 skb->data_len += length;
4486 skb->truesize += length;
4487 }
4488
4489 /* strip the ethernet crc, problem is we're using pages now so
4490 * this whole operation can get a little cpu intensive */
4491 pskb_trim(skb, skb->len - 4);
4492
4493 copydone:
4494 total_rx_bytes += skb->len;
4495 total_rx_packets++;
4496
4497 e1000_rx_checksum(adapter, staterr,
4498 le16_to_cpu(rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
4499 skb->protocol = eth_type_trans(skb, netdev);
4500
4501 if (likely(rx_desc->wb.upper.header_status &
4502 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP)))
4503 adapter->rx_hdr_split++;
4504 #ifdef CONFIG_E1000_NAPI
4505 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
4506 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
4507 le16_to_cpu(rx_desc->wb.middle.vlan) &
4508 E1000_RXD_SPC_VLAN_MASK);
4509 } else {
4510 netif_receive_skb(skb);
4511 }
4512 #else /* CONFIG_E1000_NAPI */
4513 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
4514 vlan_hwaccel_rx(skb, adapter->vlgrp,
4515 le16_to_cpu(rx_desc->wb.middle.vlan) &
4516 E1000_RXD_SPC_VLAN_MASK);
4517 } else {
4518 netif_rx(skb);
4519 }
4520 #endif /* CONFIG_E1000_NAPI */
4521 netdev->last_rx = jiffies;
4522
4523 next_desc:
4524 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
4525 buffer_info->skb = NULL;
4526
4527 /* return some buffers to hardware, one at a time is too slow */
4528 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
4529 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4530 cleaned_count = 0;
4531 }
4532
4533 /* use prefetched values */
4534 rx_desc = next_rxd;
4535 buffer_info = next_buffer;
4536
4537 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
4538 }
4539 rx_ring->next_to_clean = i;
4540
4541 cleaned_count = E1000_DESC_UNUSED(rx_ring);
4542 if (cleaned_count)
4543 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4544
4545 adapter->total_rx_packets += total_rx_packets;
4546 adapter->total_rx_bytes += total_rx_bytes;
4547 adapter->net_stats.rx_bytes += total_rx_bytes;
4548 adapter->net_stats.rx_packets += total_rx_packets;
4549 return cleaned;
4550 }
4551
4552 /**
4553 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
4554 * @adapter: address of board private structure
4555 **/
4556
4557 static void
4558 e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
4559 struct e1000_rx_ring *rx_ring,
4560 int cleaned_count)
4561 {
4562 struct net_device *netdev = adapter->netdev;
4563 struct pci_dev *pdev = adapter->pdev;
4564 struct e1000_rx_desc *rx_desc;
4565 struct e1000_buffer *buffer_info;
4566 struct sk_buff *skb;
4567 unsigned int i;
4568 unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
4569
4570 i = rx_ring->next_to_use;
4571 buffer_info = &rx_ring->buffer_info[i];
4572
4573 while (cleaned_count--) {
4574 skb = buffer_info->skb;
4575 if (skb) {
4576 skb_trim(skb, 0);
4577 goto map_skb;
4578 }
4579
4580 skb = netdev_alloc_skb(netdev, bufsz);
4581 if (unlikely(!skb)) {
4582 /* Better luck next round */
4583 adapter->alloc_rx_buff_failed++;
4584 break;
4585 }
4586
4587 /* Fix for errata 23, can't cross 64kB boundary */
4588 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4589 struct sk_buff *oldskb = skb;
4590 DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
4591 "at %p\n", bufsz, skb->data);
4592 /* Try again, without freeing the previous */
4593 skb = netdev_alloc_skb(netdev, bufsz);
4594 /* Failed allocation, critical failure */
4595 if (!skb) {
4596 dev_kfree_skb(oldskb);
4597 break;
4598 }
4599
4600 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4601 /* give up */
4602 dev_kfree_skb(skb);
4603 dev_kfree_skb(oldskb);
4604 break; /* while !buffer_info->skb */
4605 }
4606
4607 /* Use new allocation */
4608 dev_kfree_skb(oldskb);
4609 }
4610 /* Make buffer alignment 2 beyond a 16 byte boundary
4611 * this will result in a 16 byte aligned IP header after
4612 * the 14 byte MAC header is removed
4613 */
4614 skb_reserve(skb, NET_IP_ALIGN);
4615
4616 buffer_info->skb = skb;
4617 buffer_info->length = adapter->rx_buffer_len;
4618 map_skb:
4619 buffer_info->dma = pci_map_single(pdev,
4620 skb->data,
4621 adapter->rx_buffer_len,
4622 PCI_DMA_FROMDEVICE);
4623
4624 /* Fix for errata 23, can't cross 64kB boundary */
4625 if (!e1000_check_64k_bound(adapter,
4626 (void *)(unsigned long)buffer_info->dma,
4627 adapter->rx_buffer_len)) {
4628 DPRINTK(RX_ERR, ERR,
4629 "dma align check failed: %u bytes at %p\n",
4630 adapter->rx_buffer_len,
4631 (void *)(unsigned long)buffer_info->dma);
4632 dev_kfree_skb(skb);
4633 buffer_info->skb = NULL;
4634
4635 pci_unmap_single(pdev, buffer_info->dma,
4636 adapter->rx_buffer_len,
4637 PCI_DMA_FROMDEVICE);
4638
4639 break; /* while !buffer_info->skb */
4640 }
4641 rx_desc = E1000_RX_DESC(*rx_ring, i);
4642 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4643
4644 if (unlikely(++i == rx_ring->count))
4645 i = 0;
4646 buffer_info = &rx_ring->buffer_info[i];
4647 }
4648
4649 if (likely(rx_ring->next_to_use != i)) {
4650 rx_ring->next_to_use = i;
4651 if (unlikely(i-- == 0))
4652 i = (rx_ring->count - 1);
4653
4654 /* Force memory writes to complete before letting h/w
4655 * know there are new descriptors to fetch. (Only
4656 * applicable for weak-ordered memory model archs,
4657 * such as IA-64). */
4658 wmb();
4659 writel(i, adapter->hw.hw_addr + rx_ring->rdt);
4660 }
4661 }
4662
4663 /**
4664 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
4665 * @adapter: address of board private structure
4666 **/
4667
4668 static void
4669 e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
4670 struct e1000_rx_ring *rx_ring,
4671 int cleaned_count)
4672 {
4673 struct net_device *netdev = adapter->netdev;
4674 struct pci_dev *pdev = adapter->pdev;
4675 union e1000_rx_desc_packet_split *rx_desc;
4676 struct e1000_buffer *buffer_info;
4677 struct e1000_ps_page *ps_page;
4678 struct e1000_ps_page_dma *ps_page_dma;
4679 struct sk_buff *skb;
4680 unsigned int i, j;
4681
4682 i = rx_ring->next_to_use;
4683 buffer_info = &rx_ring->buffer_info[i];
4684 ps_page = &rx_ring->ps_page[i];
4685 ps_page_dma = &rx_ring->ps_page_dma[i];
4686
4687 while (cleaned_count--) {
4688 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
4689
4690 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
4691 if (j < adapter->rx_ps_pages) {
4692 if (likely(!ps_page->ps_page[j])) {
4693 ps_page->ps_page[j] =
4694 alloc_page(GFP_ATOMIC);
4695 if (unlikely(!ps_page->ps_page[j])) {
4696 adapter->alloc_rx_buff_failed++;
4697 goto no_buffers;
4698 }
4699 ps_page_dma->ps_page_dma[j] =
4700 pci_map_page(pdev,
4701 ps_page->ps_page[j],
4702 0, PAGE_SIZE,
4703 PCI_DMA_FROMDEVICE);
4704 }
4705 /* Refresh the desc even if buffer_addrs didn't
4706 * change because each write-back erases
4707 * this info.
4708 */
4709 rx_desc->read.buffer_addr[j+1] =
4710 cpu_to_le64(ps_page_dma->ps_page_dma[j]);
4711 } else
4712 rx_desc->read.buffer_addr[j+1] = ~cpu_to_le64(0);
4713 }
4714
4715 skb = netdev_alloc_skb(netdev,
4716 adapter->rx_ps_bsize0 + NET_IP_ALIGN);
4717
4718 if (unlikely(!skb)) {
4719 adapter->alloc_rx_buff_failed++;
4720 break;
4721 }
4722
4723 /* Make buffer alignment 2 beyond a 16 byte boundary
4724 * this will result in a 16 byte aligned IP header after
4725 * the 14 byte MAC header is removed
4726 */
4727 skb_reserve(skb, NET_IP_ALIGN);
4728
4729 buffer_info->skb = skb;
4730 buffer_info->length = adapter->rx_ps_bsize0;
4731 buffer_info->dma = pci_map_single(pdev, skb->data,
4732 adapter->rx_ps_bsize0,
4733 PCI_DMA_FROMDEVICE);
4734
4735 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
4736
4737 if (unlikely(++i == rx_ring->count)) i = 0;
4738 buffer_info = &rx_ring->buffer_info[i];
4739 ps_page = &rx_ring->ps_page[i];
4740 ps_page_dma = &rx_ring->ps_page_dma[i];
4741 }
4742
4743 no_buffers:
4744 if (likely(rx_ring->next_to_use != i)) {
4745 rx_ring->next_to_use = i;
4746 if (unlikely(i-- == 0)) i = (rx_ring->count - 1);
4747
4748 /* Force memory writes to complete before letting h/w
4749 * know there are new descriptors to fetch. (Only
4750 * applicable for weak-ordered memory model archs,
4751 * such as IA-64). */
4752 wmb();
4753 /* Hardware increments by 16 bytes, but packet split
4754 * descriptors are 32 bytes...so we increment tail
4755 * twice as much.
4756 */
4757 writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
4758 }
4759 }
4760
4761 /**
4762 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
4763 * @adapter:
4764 **/
4765
4766 static void
4767 e1000_smartspeed(struct e1000_adapter *adapter)
4768 {
4769 uint16_t phy_status;
4770 uint16_t phy_ctrl;
4771
4772 if ((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
4773 !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
4774 return;
4775
4776 if (adapter->smartspeed == 0) {
4777 /* If Master/Slave config fault is asserted twice,
4778 * we assume back-to-back */
4779 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
4780 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
4781 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
4782 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
4783 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
4784 if (phy_ctrl & CR_1000T_MS_ENABLE) {
4785 phy_ctrl &= ~CR_1000T_MS_ENABLE;
4786 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
4787 phy_ctrl);
4788 adapter->smartspeed++;
4789 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
4790 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
4791 &phy_ctrl)) {
4792 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4793 MII_CR_RESTART_AUTO_NEG);
4794 e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
4795 phy_ctrl);
4796 }
4797 }
4798 return;
4799 } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
4800 /* If still no link, perhaps using 2/3 pair cable */
4801 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
4802 phy_ctrl |= CR_1000T_MS_ENABLE;
4803 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
4804 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
4805 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
4806 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4807 MII_CR_RESTART_AUTO_NEG);
4808 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
4809 }
4810 }
4811 /* Restart process after E1000_SMARTSPEED_MAX iterations */
4812 if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
4813 adapter->smartspeed = 0;
4814 }
4815
4816 /**
4817 * e1000_ioctl -
4818 * @netdev:
4819 * @ifreq:
4820 * @cmd:
4821 **/
4822
4823 static int
4824 e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4825 {
4826 switch (cmd) {
4827 case SIOCGMIIPHY:
4828 case SIOCGMIIREG:
4829 case SIOCSMIIREG:
4830 return e1000_mii_ioctl(netdev, ifr, cmd);
4831 default:
4832 return -EOPNOTSUPP;
4833 }
4834 }
4835
4836 /**
4837 * e1000_mii_ioctl -
4838 * @netdev:
4839 * @ifreq:
4840 * @cmd:
4841 **/
4842
4843 static int
4844 e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4845 {
4846 struct e1000_adapter *adapter = netdev_priv(netdev);
4847 struct mii_ioctl_data *data = if_mii(ifr);
4848 int retval;
4849 uint16_t mii_reg;
4850 uint16_t spddplx;
4851 unsigned long flags;
4852
4853 if (adapter->hw.media_type != e1000_media_type_copper)
4854 return -EOPNOTSUPP;
4855
4856 switch (cmd) {
4857 case SIOCGMIIPHY:
4858 data->phy_id = adapter->hw.phy_addr;
4859 break;
4860 case SIOCGMIIREG:
4861 if (!capable(CAP_NET_ADMIN))
4862 return -EPERM;
4863 spin_lock_irqsave(&adapter->stats_lock, flags);
4864 if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
4865 &data->val_out)) {
4866 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4867 return -EIO;
4868 }
4869 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4870 break;
4871 case SIOCSMIIREG:
4872 if (!capable(CAP_NET_ADMIN))
4873 return -EPERM;
4874 if (data->reg_num & ~(0x1F))
4875 return -EFAULT;
4876 mii_reg = data->val_in;
4877 spin_lock_irqsave(&adapter->stats_lock, flags);
4878 if (e1000_write_phy_reg(&adapter->hw, data->reg_num,
4879 mii_reg)) {
4880 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4881 return -EIO;
4882 }
4883 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4884 if (adapter->hw.media_type == e1000_media_type_copper) {
4885 switch (data->reg_num) {
4886 case PHY_CTRL:
4887 if (mii_reg & MII_CR_POWER_DOWN)
4888 break;
4889 if (mii_reg & MII_CR_AUTO_NEG_EN) {
4890 adapter->hw.autoneg = 1;
4891 adapter->hw.autoneg_advertised = 0x2F;
4892 } else {
4893 if (mii_reg & 0x40)
4894 spddplx = SPEED_1000;
4895 else if (mii_reg & 0x2000)
4896 spddplx = SPEED_100;
4897 else
4898 spddplx = SPEED_10;
4899 spddplx += (mii_reg & 0x100)
4900 ? DUPLEX_FULL :
4901 DUPLEX_HALF;
4902 retval = e1000_set_spd_dplx(adapter,
4903 spddplx);
4904 if (retval)
4905 return retval;
4906 }
4907 if (netif_running(adapter->netdev))
4908 e1000_reinit_locked(adapter);
4909 else
4910 e1000_reset(adapter);
4911 break;
4912 case M88E1000_PHY_SPEC_CTRL:
4913 case M88E1000_EXT_PHY_SPEC_CTRL:
4914 if (e1000_phy_reset(&adapter->hw))
4915 return -EIO;
4916 break;
4917 }
4918 } else {
4919 switch (data->reg_num) {
4920 case PHY_CTRL:
4921 if (mii_reg & MII_CR_POWER_DOWN)
4922 break;
4923 if (netif_running(adapter->netdev))
4924 e1000_reinit_locked(adapter);
4925 else
4926 e1000_reset(adapter);
4927 break;
4928 }
4929 }
4930 break;
4931 default:
4932 return -EOPNOTSUPP;
4933 }
4934 return E1000_SUCCESS;
4935 }
4936
4937 void
4938 e1000_pci_set_mwi(struct e1000_hw *hw)
4939 {
4940 struct e1000_adapter *adapter = hw->back;
4941 int ret_val = pci_set_mwi(adapter->pdev);
4942
4943 if (ret_val)
4944 DPRINTK(PROBE, ERR, "Error in setting MWI\n");
4945 }
4946
4947 void
4948 e1000_pci_clear_mwi(struct e1000_hw *hw)
4949 {
4950 struct e1000_adapter *adapter = hw->back;
4951
4952 pci_clear_mwi(adapter->pdev);
4953 }
4954
4955 int
4956 e1000_pcix_get_mmrbc(struct e1000_hw *hw)
4957 {
4958 struct e1000_adapter *adapter = hw->back;
4959 return pcix_get_mmrbc(adapter->pdev);
4960 }
4961
4962 void
4963 e1000_pcix_set_mmrbc(struct e1000_hw *hw, int mmrbc)
4964 {
4965 struct e1000_adapter *adapter = hw->back;
4966 pcix_set_mmrbc(adapter->pdev, mmrbc);
4967 }
4968
4969 int32_t
4970 e1000_read_pcie_cap_reg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4971 {
4972 struct e1000_adapter *adapter = hw->back;
4973 uint16_t cap_offset;
4974
4975 cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP);
4976 if (!cap_offset)
4977 return -E1000_ERR_CONFIG;
4978
4979 pci_read_config_word(adapter->pdev, cap_offset + reg, value);
4980
4981 return E1000_SUCCESS;
4982 }
4983
4984 void
4985 e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
4986 {
4987 outl(value, port);
4988 }
4989
4990 static void
4991 e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
4992 {
4993 struct e1000_adapter *adapter = netdev_priv(netdev);
4994 uint32_t ctrl, rctl;
4995
4996 e1000_irq_disable(adapter);
4997 adapter->vlgrp = grp;
4998
4999 if (grp) {
5000 /* enable VLAN tag insert/strip */
5001 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
5002 ctrl |= E1000_CTRL_VME;
5003 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
5004
5005 if (adapter->hw.mac_type != e1000_ich8lan) {
5006 /* enable VLAN receive filtering */
5007 rctl = E1000_READ_REG(&adapter->hw, RCTL);
5008 rctl |= E1000_RCTL_VFE;
5009 rctl &= ~E1000_RCTL_CFIEN;
5010 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
5011 e1000_update_mng_vlan(adapter);
5012 }
5013 } else {
5014 /* disable VLAN tag insert/strip */
5015 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
5016 ctrl &= ~E1000_CTRL_VME;
5017 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
5018
5019 if (adapter->hw.mac_type != e1000_ich8lan) {
5020 /* disable VLAN filtering */
5021 rctl = E1000_READ_REG(&adapter->hw, RCTL);
5022 rctl &= ~E1000_RCTL_VFE;
5023 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
5024 if (adapter->mng_vlan_id !=
5025 (uint16_t)E1000_MNG_VLAN_NONE) {
5026 e1000_vlan_rx_kill_vid(netdev,
5027 adapter->mng_vlan_id);
5028 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
5029 }
5030 }
5031 }
5032
5033 e1000_irq_enable(adapter);
5034 }
5035
5036 static void
5037 e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
5038 {
5039 struct e1000_adapter *adapter = netdev_priv(netdev);
5040 uint32_t vfta, index;
5041
5042 if ((adapter->hw.mng_cookie.status &
5043 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
5044 (vid == adapter->mng_vlan_id))
5045 return;
5046 /* add VID to filter table */
5047 index = (vid >> 5) & 0x7F;
5048 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
5049 vfta |= (1 << (vid & 0x1F));
5050 e1000_write_vfta(&adapter->hw, index, vfta);
5051 }
5052
5053 static void
5054 e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
5055 {
5056 struct e1000_adapter *adapter = netdev_priv(netdev);
5057 uint32_t vfta, index;
5058
5059 e1000_irq_disable(adapter);
5060 vlan_group_set_device(adapter->vlgrp, vid, NULL);
5061 e1000_irq_enable(adapter);
5062
5063 if ((adapter->hw.mng_cookie.status &
5064 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
5065 (vid == adapter->mng_vlan_id)) {
5066 /* release control to f/w */
5067 e1000_release_hw_control(adapter);
5068 return;
5069 }
5070
5071 /* remove VID from filter table */
5072 index = (vid >> 5) & 0x7F;
5073 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
5074 vfta &= ~(1 << (vid & 0x1F));
5075 e1000_write_vfta(&adapter->hw, index, vfta);
5076 }
5077
5078 static void
5079 e1000_restore_vlan(struct e1000_adapter *adapter)
5080 {
5081 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
5082
5083 if (adapter->vlgrp) {
5084 uint16_t vid;
5085 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
5086 if (!vlan_group_get_device(adapter->vlgrp, vid))
5087 continue;
5088 e1000_vlan_rx_add_vid(adapter->netdev, vid);
5089 }
5090 }
5091 }
5092
5093 int
5094 e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
5095 {
5096 adapter->hw.autoneg = 0;
5097
5098 /* Fiber NICs only allow 1000 gbps Full duplex */
5099 if ((adapter->hw.media_type == e1000_media_type_fiber) &&
5100 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
5101 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
5102 return -EINVAL;
5103 }
5104
5105 switch (spddplx) {
5106 case SPEED_10 + DUPLEX_HALF:
5107 adapter->hw.forced_speed_duplex = e1000_10_half;
5108 break;
5109 case SPEED_10 + DUPLEX_FULL:
5110 adapter->hw.forced_speed_duplex = e1000_10_full;
5111 break;
5112 case SPEED_100 + DUPLEX_HALF:
5113 adapter->hw.forced_speed_duplex = e1000_100_half;
5114 break;
5115 case SPEED_100 + DUPLEX_FULL:
5116 adapter->hw.forced_speed_duplex = e1000_100_full;
5117 break;
5118 case SPEED_1000 + DUPLEX_FULL:
5119 adapter->hw.autoneg = 1;
5120 adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
5121 break;
5122 case SPEED_1000 + DUPLEX_HALF: /* not supported */
5123 default:
5124 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
5125 return -EINVAL;
5126 }
5127 return 0;
5128 }
5129
5130 static int
5131 e1000_suspend(struct pci_dev *pdev, pm_message_t state)
5132 {
5133 struct net_device *netdev = pci_get_drvdata(pdev);
5134 struct e1000_adapter *adapter = netdev_priv(netdev);
5135 uint32_t ctrl, ctrl_ext, rctl, status;
5136 uint32_t wufc = adapter->wol;
5137 #ifdef CONFIG_PM
5138 int retval = 0;
5139 #endif
5140
5141 netif_device_detach(netdev);
5142
5143 if (netif_running(netdev)) {
5144 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
5145 e1000_down(adapter);
5146 }
5147
5148 #ifdef CONFIG_PM
5149 retval = pci_save_state(pdev);
5150 if (retval)
5151 return retval;
5152 #endif
5153
5154 status = E1000_READ_REG(&adapter->hw, STATUS);
5155 if (status & E1000_STATUS_LU)
5156 wufc &= ~E1000_WUFC_LNKC;
5157
5158 if (wufc) {
5159 e1000_setup_rctl(adapter);
5160 e1000_set_rx_mode(netdev);
5161
5162 /* turn on all-multi mode if wake on multicast is enabled */
5163 if (wufc & E1000_WUFC_MC) {
5164 rctl = E1000_READ_REG(&adapter->hw, RCTL);
5165 rctl |= E1000_RCTL_MPE;
5166 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
5167 }
5168
5169 if (adapter->hw.mac_type >= e1000_82540) {
5170 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
5171 /* advertise wake from D3Cold */
5172 #define E1000_CTRL_ADVD3WUC 0x00100000
5173 /* phy power management enable */
5174 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
5175 ctrl |= E1000_CTRL_ADVD3WUC |
5176 E1000_CTRL_EN_PHY_PWR_MGMT;
5177 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
5178 }
5179
5180 if (adapter->hw.media_type == e1000_media_type_fiber ||
5181 adapter->hw.media_type == e1000_media_type_internal_serdes) {
5182 /* keep the laser running in D3 */
5183 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
5184 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
5185 E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
5186 }
5187
5188 /* Allow time for pending master requests to run */
5189 e1000_disable_pciex_master(&adapter->hw);
5190
5191 E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
5192 E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
5193 pci_enable_wake(pdev, PCI_D3hot, 1);
5194 pci_enable_wake(pdev, PCI_D3cold, 1);
5195 } else {
5196 E1000_WRITE_REG(&adapter->hw, WUC, 0);
5197 E1000_WRITE_REG(&adapter->hw, WUFC, 0);
5198 pci_enable_wake(pdev, PCI_D3hot, 0);
5199 pci_enable_wake(pdev, PCI_D3cold, 0);
5200 }
5201
5202 e1000_release_manageability(adapter);
5203
5204 /* make sure adapter isn't asleep if manageability is enabled */
5205 if (adapter->en_mng_pt) {
5206 pci_enable_wake(pdev, PCI_D3hot, 1);
5207 pci_enable_wake(pdev, PCI_D3cold, 1);
5208 }
5209
5210 if (adapter->hw.phy_type == e1000_phy_igp_3)
5211 e1000_phy_powerdown_workaround(&adapter->hw);
5212
5213 if (netif_running(netdev))
5214 e1000_free_irq(adapter);
5215
5216 /* Release control of h/w to f/w. If f/w is AMT enabled, this
5217 * would have already happened in close and is redundant. */
5218 e1000_release_hw_control(adapter);
5219
5220 pci_disable_device(pdev);
5221
5222 pci_set_power_state(pdev, pci_choose_state(pdev, state));
5223
5224 return 0;
5225 }
5226
5227 #ifdef CONFIG_PM
5228 static int
5229 e1000_resume(struct pci_dev *pdev)
5230 {
5231 struct net_device *netdev = pci_get_drvdata(pdev);
5232 struct e1000_adapter *adapter = netdev_priv(netdev);
5233 uint32_t err;
5234
5235 pci_set_power_state(pdev, PCI_D0);
5236 pci_restore_state(pdev);
5237 if ((err = pci_enable_device(pdev))) {
5238 printk(KERN_ERR "e1000: Cannot enable PCI device from suspend\n");
5239 return err;
5240 }
5241 pci_set_master(pdev);
5242
5243 pci_enable_wake(pdev, PCI_D3hot, 0);
5244 pci_enable_wake(pdev, PCI_D3cold, 0);
5245
5246 if (netif_running(netdev) && (err = e1000_request_irq(adapter)))
5247 return err;
5248
5249 e1000_power_up_phy(adapter);
5250 e1000_reset(adapter);
5251 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
5252
5253 e1000_init_manageability(adapter);
5254
5255 if (netif_running(netdev))
5256 e1000_up(adapter);
5257
5258 netif_device_attach(netdev);
5259
5260 /* If the controller is 82573 and f/w is AMT, do not set
5261 * DRV_LOAD until the interface is up. For all other cases,
5262 * let the f/w know that the h/w is now under the control
5263 * of the driver. */
5264 if (adapter->hw.mac_type != e1000_82573 ||
5265 !e1000_check_mng_mode(&adapter->hw))
5266 e1000_get_hw_control(adapter);
5267
5268 return 0;
5269 }
5270 #endif
5271
5272 static void e1000_shutdown(struct pci_dev *pdev)
5273 {
5274 e1000_suspend(pdev, PMSG_SUSPEND);
5275 }
5276
5277 #ifdef CONFIG_NET_POLL_CONTROLLER
5278 /*
5279 * Polling 'interrupt' - used by things like netconsole to send skbs
5280 * without having to re-enable interrupts. It's not called while
5281 * the interrupt routine is executing.
5282 */
5283 static void
5284 e1000_netpoll(struct net_device *netdev)
5285 {
5286 struct e1000_adapter *adapter = netdev_priv(netdev);
5287
5288 disable_irq(adapter->pdev->irq);
5289 e1000_intr(adapter->pdev->irq, netdev);
5290 e1000_clean_tx_irq(adapter, adapter->tx_ring);
5291 #ifndef CONFIG_E1000_NAPI
5292 adapter->clean_rx(adapter, adapter->rx_ring);
5293 #endif
5294 enable_irq(adapter->pdev->irq);
5295 }
5296 #endif
5297
5298 /**
5299 * e1000_io_error_detected - called when PCI error is detected
5300 * @pdev: Pointer to PCI device
5301 * @state: The current pci conneection state
5302 *
5303 * This function is called after a PCI bus error affecting
5304 * this device has been detected.
5305 */
5306 static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
5307 {
5308 struct net_device *netdev = pci_get_drvdata(pdev);
5309 struct e1000_adapter *adapter = netdev->priv;
5310
5311 netif_device_detach(netdev);
5312
5313 if (netif_running(netdev))
5314 e1000_down(adapter);
5315 pci_disable_device(pdev);
5316
5317 /* Request a slot slot reset. */
5318 return PCI_ERS_RESULT_NEED_RESET;
5319 }
5320
5321 /**
5322 * e1000_io_slot_reset - called after the pci bus has been reset.
5323 * @pdev: Pointer to PCI device
5324 *
5325 * Restart the card from scratch, as if from a cold-boot. Implementation
5326 * resembles the first-half of the e1000_resume routine.
5327 */
5328 static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
5329 {
5330 struct net_device *netdev = pci_get_drvdata(pdev);
5331 struct e1000_adapter *adapter = netdev->priv;
5332
5333 if (pci_enable_device(pdev)) {
5334 printk(KERN_ERR "e1000: Cannot re-enable PCI device after reset.\n");
5335 return PCI_ERS_RESULT_DISCONNECT;
5336 }
5337 pci_set_master(pdev);
5338
5339 pci_enable_wake(pdev, PCI_D3hot, 0);
5340 pci_enable_wake(pdev, PCI_D3cold, 0);
5341
5342 e1000_reset(adapter);
5343 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
5344
5345 return PCI_ERS_RESULT_RECOVERED;
5346 }
5347
5348 /**
5349 * e1000_io_resume - called when traffic can start flowing again.
5350 * @pdev: Pointer to PCI device
5351 *
5352 * This callback is called when the error recovery driver tells us that
5353 * its OK to resume normal operation. Implementation resembles the
5354 * second-half of the e1000_resume routine.
5355 */
5356 static void e1000_io_resume(struct pci_dev *pdev)
5357 {
5358 struct net_device *netdev = pci_get_drvdata(pdev);
5359 struct e1000_adapter *adapter = netdev->priv;
5360
5361 e1000_init_manageability(adapter);
5362
5363 if (netif_running(netdev)) {
5364 if (e1000_up(adapter)) {
5365 printk("e1000: can't bring device back up after reset\n");
5366 return;
5367 }
5368 }
5369
5370 netif_device_attach(netdev);
5371
5372 /* If the controller is 82573 and f/w is AMT, do not set
5373 * DRV_LOAD until the interface is up. For all other cases,
5374 * let the f/w know that the h/w is now under the control
5375 * of the driver. */
5376 if (adapter->hw.mac_type != e1000_82573 ||
5377 !e1000_check_mng_mode(&adapter->hw))
5378 e1000_get_hw_control(adapter);
5379
5380 }
5381
5382 /* e1000_main.c */
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