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1 /*******************************************************************************
2
3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27 *******************************************************************************/
28
29 #include "e1000.h"
30
31 char e1000_driver_name[] = "e1000";
32 static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
33 #ifndef CONFIG_E1000_NAPI
34 #define DRIVERNAPI
35 #else
36 #define DRIVERNAPI "-NAPI"
37 #endif
38 #define DRV_VERSION "7.2.9-k4"DRIVERNAPI
39 char e1000_driver_version[] = DRV_VERSION;
40 static char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
41
42 /* e1000_pci_tbl - PCI Device ID Table
43 *
44 * Last entry must be all 0s
45 *
46 * Macro expands to...
47 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
48 */
49 static struct pci_device_id e1000_pci_tbl[] = {
50 INTEL_E1000_ETHERNET_DEVICE(0x1000),
51 INTEL_E1000_ETHERNET_DEVICE(0x1001),
52 INTEL_E1000_ETHERNET_DEVICE(0x1004),
53 INTEL_E1000_ETHERNET_DEVICE(0x1008),
54 INTEL_E1000_ETHERNET_DEVICE(0x1009),
55 INTEL_E1000_ETHERNET_DEVICE(0x100C),
56 INTEL_E1000_ETHERNET_DEVICE(0x100D),
57 INTEL_E1000_ETHERNET_DEVICE(0x100E),
58 INTEL_E1000_ETHERNET_DEVICE(0x100F),
59 INTEL_E1000_ETHERNET_DEVICE(0x1010),
60 INTEL_E1000_ETHERNET_DEVICE(0x1011),
61 INTEL_E1000_ETHERNET_DEVICE(0x1012),
62 INTEL_E1000_ETHERNET_DEVICE(0x1013),
63 INTEL_E1000_ETHERNET_DEVICE(0x1014),
64 INTEL_E1000_ETHERNET_DEVICE(0x1015),
65 INTEL_E1000_ETHERNET_DEVICE(0x1016),
66 INTEL_E1000_ETHERNET_DEVICE(0x1017),
67 INTEL_E1000_ETHERNET_DEVICE(0x1018),
68 INTEL_E1000_ETHERNET_DEVICE(0x1019),
69 INTEL_E1000_ETHERNET_DEVICE(0x101A),
70 INTEL_E1000_ETHERNET_DEVICE(0x101D),
71 INTEL_E1000_ETHERNET_DEVICE(0x101E),
72 INTEL_E1000_ETHERNET_DEVICE(0x1026),
73 INTEL_E1000_ETHERNET_DEVICE(0x1027),
74 INTEL_E1000_ETHERNET_DEVICE(0x1028),
75 INTEL_E1000_ETHERNET_DEVICE(0x1049),
76 INTEL_E1000_ETHERNET_DEVICE(0x104A),
77 INTEL_E1000_ETHERNET_DEVICE(0x104B),
78 INTEL_E1000_ETHERNET_DEVICE(0x104C),
79 INTEL_E1000_ETHERNET_DEVICE(0x104D),
80 INTEL_E1000_ETHERNET_DEVICE(0x105E),
81 INTEL_E1000_ETHERNET_DEVICE(0x105F),
82 INTEL_E1000_ETHERNET_DEVICE(0x1060),
83 INTEL_E1000_ETHERNET_DEVICE(0x1075),
84 INTEL_E1000_ETHERNET_DEVICE(0x1076),
85 INTEL_E1000_ETHERNET_DEVICE(0x1077),
86 INTEL_E1000_ETHERNET_DEVICE(0x1078),
87 INTEL_E1000_ETHERNET_DEVICE(0x1079),
88 INTEL_E1000_ETHERNET_DEVICE(0x107A),
89 INTEL_E1000_ETHERNET_DEVICE(0x107B),
90 INTEL_E1000_ETHERNET_DEVICE(0x107C),
91 INTEL_E1000_ETHERNET_DEVICE(0x107D),
92 INTEL_E1000_ETHERNET_DEVICE(0x107E),
93 INTEL_E1000_ETHERNET_DEVICE(0x107F),
94 INTEL_E1000_ETHERNET_DEVICE(0x108A),
95 INTEL_E1000_ETHERNET_DEVICE(0x108B),
96 INTEL_E1000_ETHERNET_DEVICE(0x108C),
97 INTEL_E1000_ETHERNET_DEVICE(0x1096),
98 INTEL_E1000_ETHERNET_DEVICE(0x1098),
99 INTEL_E1000_ETHERNET_DEVICE(0x1099),
100 INTEL_E1000_ETHERNET_DEVICE(0x109A),
101 INTEL_E1000_ETHERNET_DEVICE(0x10A4),
102 INTEL_E1000_ETHERNET_DEVICE(0x10B5),
103 INTEL_E1000_ETHERNET_DEVICE(0x10B9),
104 INTEL_E1000_ETHERNET_DEVICE(0x10BA),
105 INTEL_E1000_ETHERNET_DEVICE(0x10BB),
106 /* required last entry */
107 {0,}
108 };
109
110 MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
111
112 int e1000_up(struct e1000_adapter *adapter);
113 void e1000_down(struct e1000_adapter *adapter);
114 void e1000_reinit_locked(struct e1000_adapter *adapter);
115 void e1000_reset(struct e1000_adapter *adapter);
116 int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
117 int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
118 int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
119 void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
120 void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
121 static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
122 struct e1000_tx_ring *txdr);
123 static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
124 struct e1000_rx_ring *rxdr);
125 static void e1000_free_tx_resources(struct e1000_adapter *adapter,
126 struct e1000_tx_ring *tx_ring);
127 static void e1000_free_rx_resources(struct e1000_adapter *adapter,
128 struct e1000_rx_ring *rx_ring);
129 void e1000_update_stats(struct e1000_adapter *adapter);
130
131 static int e1000_init_module(void);
132 static void e1000_exit_module(void);
133 static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
134 static void __devexit e1000_remove(struct pci_dev *pdev);
135 static int e1000_alloc_queues(struct e1000_adapter *adapter);
136 static int e1000_sw_init(struct e1000_adapter *adapter);
137 static int e1000_open(struct net_device *netdev);
138 static int e1000_close(struct net_device *netdev);
139 static void e1000_configure_tx(struct e1000_adapter *adapter);
140 static void e1000_configure_rx(struct e1000_adapter *adapter);
141 static void e1000_setup_rctl(struct e1000_adapter *adapter);
142 static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
143 static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
144 static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
145 struct e1000_tx_ring *tx_ring);
146 static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
147 struct e1000_rx_ring *rx_ring);
148 static void e1000_set_multi(struct net_device *netdev);
149 static void e1000_update_phy_info(unsigned long data);
150 static void e1000_watchdog(unsigned long data);
151 static void e1000_82547_tx_fifo_stall(unsigned long data);
152 static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
153 static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
154 static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
155 static int e1000_set_mac(struct net_device *netdev, void *p);
156 static irqreturn_t e1000_intr(int irq, void *data);
157 static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter,
158 struct e1000_tx_ring *tx_ring);
159 #ifdef CONFIG_E1000_NAPI
160 static int e1000_clean(struct net_device *poll_dev, int *budget);
161 static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
162 struct e1000_rx_ring *rx_ring,
163 int *work_done, int work_to_do);
164 static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
165 struct e1000_rx_ring *rx_ring,
166 int *work_done, int work_to_do);
167 #else
168 static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
169 struct e1000_rx_ring *rx_ring);
170 static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
171 struct e1000_rx_ring *rx_ring);
172 #endif
173 static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
174 struct e1000_rx_ring *rx_ring,
175 int cleaned_count);
176 static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
177 struct e1000_rx_ring *rx_ring,
178 int cleaned_count);
179 static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
180 static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
181 int cmd);
182 void e1000_set_ethtool_ops(struct net_device *netdev);
183 static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
184 static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
185 static void e1000_tx_timeout(struct net_device *dev);
186 static void e1000_reset_task(struct net_device *dev);
187 static void e1000_smartspeed(struct e1000_adapter *adapter);
188 static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
189 struct sk_buff *skb);
190
191 static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
192 static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
193 static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
194 static void e1000_restore_vlan(struct e1000_adapter *adapter);
195
196 static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
197 #ifdef CONFIG_PM
198 static int e1000_resume(struct pci_dev *pdev);
199 #endif
200 static void e1000_shutdown(struct pci_dev *pdev);
201
202 #ifdef CONFIG_NET_POLL_CONTROLLER
203 /* for netdump / net console */
204 static void e1000_netpoll (struct net_device *netdev);
205 #endif
206
207 extern void e1000_check_options(struct e1000_adapter *adapter);
208
209 static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
210 pci_channel_state_t state);
211 static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev);
212 static void e1000_io_resume(struct pci_dev *pdev);
213
214 static struct pci_error_handlers e1000_err_handler = {
215 .error_detected = e1000_io_error_detected,
216 .slot_reset = e1000_io_slot_reset,
217 .resume = e1000_io_resume,
218 };
219
220 static struct pci_driver e1000_driver = {
221 .name = e1000_driver_name,
222 .id_table = e1000_pci_tbl,
223 .probe = e1000_probe,
224 .remove = __devexit_p(e1000_remove),
225 #ifdef CONFIG_PM
226 /* Power Managment Hooks */
227 .suspend = e1000_suspend,
228 .resume = e1000_resume,
229 #endif
230 .shutdown = e1000_shutdown,
231 .err_handler = &e1000_err_handler
232 };
233
234 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
235 MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
236 MODULE_LICENSE("GPL");
237 MODULE_VERSION(DRV_VERSION);
238
239 static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
240 module_param(debug, int, 0);
241 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
242
243 /**
244 * e1000_init_module - Driver Registration Routine
245 *
246 * e1000_init_module is the first routine called when the driver is
247 * loaded. All it does is register with the PCI subsystem.
248 **/
249
250 static int __init
251 e1000_init_module(void)
252 {
253 int ret;
254 printk(KERN_INFO "%s - version %s\n",
255 e1000_driver_string, e1000_driver_version);
256
257 printk(KERN_INFO "%s\n", e1000_copyright);
258
259 ret = pci_register_driver(&e1000_driver);
260
261 return ret;
262 }
263
264 module_init(e1000_init_module);
265
266 /**
267 * e1000_exit_module - Driver Exit Cleanup Routine
268 *
269 * e1000_exit_module is called just before the driver is removed
270 * from memory.
271 **/
272
273 static void __exit
274 e1000_exit_module(void)
275 {
276 pci_unregister_driver(&e1000_driver);
277 }
278
279 module_exit(e1000_exit_module);
280
281 static int e1000_request_irq(struct e1000_adapter *adapter)
282 {
283 struct net_device *netdev = adapter->netdev;
284 int flags, err = 0;
285
286 flags = IRQF_SHARED;
287 #ifdef CONFIG_PCI_MSI
288 if (adapter->hw.mac_type > e1000_82547_rev_2) {
289 adapter->have_msi = TRUE;
290 if ((err = pci_enable_msi(adapter->pdev))) {
291 DPRINTK(PROBE, ERR,
292 "Unable to allocate MSI interrupt Error: %d\n", err);
293 adapter->have_msi = FALSE;
294 }
295 }
296 if (adapter->have_msi)
297 flags &= ~IRQF_SHARED;
298 #endif
299 if ((err = request_irq(adapter->pdev->irq, &e1000_intr, flags,
300 netdev->name, netdev)))
301 DPRINTK(PROBE, ERR,
302 "Unable to allocate interrupt Error: %d\n", err);
303
304 return err;
305 }
306
307 static void e1000_free_irq(struct e1000_adapter *adapter)
308 {
309 struct net_device *netdev = adapter->netdev;
310
311 free_irq(adapter->pdev->irq, netdev);
312
313 #ifdef CONFIG_PCI_MSI
314 if (adapter->have_msi)
315 pci_disable_msi(adapter->pdev);
316 #endif
317 }
318
319 /**
320 * e1000_irq_disable - Mask off interrupt generation on the NIC
321 * @adapter: board private structure
322 **/
323
324 static void
325 e1000_irq_disable(struct e1000_adapter *adapter)
326 {
327 atomic_inc(&adapter->irq_sem);
328 E1000_WRITE_REG(&adapter->hw, IMC, ~0);
329 E1000_WRITE_FLUSH(&adapter->hw);
330 synchronize_irq(adapter->pdev->irq);
331 }
332
333 /**
334 * e1000_irq_enable - Enable default interrupt generation settings
335 * @adapter: board private structure
336 **/
337
338 static void
339 e1000_irq_enable(struct e1000_adapter *adapter)
340 {
341 if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
342 E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
343 E1000_WRITE_FLUSH(&adapter->hw);
344 }
345 }
346
347 static void
348 e1000_update_mng_vlan(struct e1000_adapter *adapter)
349 {
350 struct net_device *netdev = adapter->netdev;
351 uint16_t vid = adapter->hw.mng_cookie.vlan_id;
352 uint16_t old_vid = adapter->mng_vlan_id;
353 if (adapter->vlgrp) {
354 if (!adapter->vlgrp->vlan_devices[vid]) {
355 if (adapter->hw.mng_cookie.status &
356 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
357 e1000_vlan_rx_add_vid(netdev, vid);
358 adapter->mng_vlan_id = vid;
359 } else
360 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
361
362 if ((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
363 (vid != old_vid) &&
364 !adapter->vlgrp->vlan_devices[old_vid])
365 e1000_vlan_rx_kill_vid(netdev, old_vid);
366 } else
367 adapter->mng_vlan_id = vid;
368 }
369 }
370
371 /**
372 * e1000_release_hw_control - release control of the h/w to f/w
373 * @adapter: address of board private structure
374 *
375 * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
376 * For ASF and Pass Through versions of f/w this means that the
377 * driver is no longer loaded. For AMT version (only with 82573) i
378 * of the f/w this means that the network i/f is closed.
379 *
380 **/
381
382 static void
383 e1000_release_hw_control(struct e1000_adapter *adapter)
384 {
385 uint32_t ctrl_ext;
386 uint32_t swsm;
387 uint32_t extcnf;
388
389 /* Let firmware taken over control of h/w */
390 switch (adapter->hw.mac_type) {
391 case e1000_82571:
392 case e1000_82572:
393 case e1000_80003es2lan:
394 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
395 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
396 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
397 break;
398 case e1000_82573:
399 swsm = E1000_READ_REG(&adapter->hw, SWSM);
400 E1000_WRITE_REG(&adapter->hw, SWSM,
401 swsm & ~E1000_SWSM_DRV_LOAD);
402 case e1000_ich8lan:
403 extcnf = E1000_READ_REG(&adapter->hw, CTRL_EXT);
404 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
405 extcnf & ~E1000_CTRL_EXT_DRV_LOAD);
406 break;
407 default:
408 break;
409 }
410 }
411
412 /**
413 * e1000_get_hw_control - get control of the h/w from f/w
414 * @adapter: address of board private structure
415 *
416 * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
417 * For ASF and Pass Through versions of f/w this means that
418 * the driver is loaded. For AMT version (only with 82573)
419 * of the f/w this means that the network i/f is open.
420 *
421 **/
422
423 static void
424 e1000_get_hw_control(struct e1000_adapter *adapter)
425 {
426 uint32_t ctrl_ext;
427 uint32_t swsm;
428 uint32_t extcnf;
429
430 /* Let firmware know the driver has taken over */
431 switch (adapter->hw.mac_type) {
432 case e1000_82571:
433 case e1000_82572:
434 case e1000_80003es2lan:
435 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
436 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
437 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
438 break;
439 case e1000_82573:
440 swsm = E1000_READ_REG(&adapter->hw, SWSM);
441 E1000_WRITE_REG(&adapter->hw, SWSM,
442 swsm | E1000_SWSM_DRV_LOAD);
443 break;
444 case e1000_ich8lan:
445 extcnf = E1000_READ_REG(&adapter->hw, EXTCNF_CTRL);
446 E1000_WRITE_REG(&adapter->hw, EXTCNF_CTRL,
447 extcnf | E1000_EXTCNF_CTRL_SWFLAG);
448 break;
449 default:
450 break;
451 }
452 }
453
454 int
455 e1000_up(struct e1000_adapter *adapter)
456 {
457 struct net_device *netdev = adapter->netdev;
458 int i;
459
460 /* hardware has been reset, we need to reload some things */
461
462 e1000_set_multi(netdev);
463
464 e1000_restore_vlan(adapter);
465
466 e1000_configure_tx(adapter);
467 e1000_setup_rctl(adapter);
468 e1000_configure_rx(adapter);
469 /* call E1000_DESC_UNUSED which always leaves
470 * at least 1 descriptor unused to make sure
471 * next_to_use != next_to_clean */
472 for (i = 0; i < adapter->num_rx_queues; i++) {
473 struct e1000_rx_ring *ring = &adapter->rx_ring[i];
474 adapter->alloc_rx_buf(adapter, ring,
475 E1000_DESC_UNUSED(ring));
476 }
477
478 adapter->tx_queue_len = netdev->tx_queue_len;
479
480 #ifdef CONFIG_E1000_NAPI
481 netif_poll_enable(netdev);
482 #endif
483 e1000_irq_enable(adapter);
484
485 clear_bit(__E1000_DOWN, &adapter->flags);
486
487 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
488 return 0;
489 }
490
491 /**
492 * e1000_power_up_phy - restore link in case the phy was powered down
493 * @adapter: address of board private structure
494 *
495 * The phy may be powered down to save power and turn off link when the
496 * driver is unloaded and wake on lan is not enabled (among others)
497 * *** this routine MUST be followed by a call to e1000_reset ***
498 *
499 **/
500
501 void e1000_power_up_phy(struct e1000_adapter *adapter)
502 {
503 uint16_t mii_reg = 0;
504
505 /* Just clear the power down bit to wake the phy back up */
506 if (adapter->hw.media_type == e1000_media_type_copper) {
507 /* according to the manual, the phy will retain its
508 * settings across a power-down/up cycle */
509 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
510 mii_reg &= ~MII_CR_POWER_DOWN;
511 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
512 }
513 }
514
515 static void e1000_power_down_phy(struct e1000_adapter *adapter)
516 {
517 /* Power down the PHY so no link is implied when interface is down *
518 * The PHY cannot be powered down if any of the following is TRUE *
519 * (a) WoL is enabled
520 * (b) AMT is active
521 * (c) SoL/IDER session is active */
522 if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
523 adapter->hw.media_type == e1000_media_type_copper) {
524 uint16_t mii_reg = 0;
525
526 switch (adapter->hw.mac_type) {
527 case e1000_82540:
528 case e1000_82545:
529 case e1000_82545_rev_3:
530 case e1000_82546:
531 case e1000_82546_rev_3:
532 case e1000_82541:
533 case e1000_82541_rev_2:
534 case e1000_82547:
535 case e1000_82547_rev_2:
536 if (E1000_READ_REG(&adapter->hw, MANC) &
537 E1000_MANC_SMBUS_EN)
538 goto out;
539 break;
540 case e1000_82571:
541 case e1000_82572:
542 case e1000_82573:
543 case e1000_80003es2lan:
544 case e1000_ich8lan:
545 if (e1000_check_mng_mode(&adapter->hw) ||
546 e1000_check_phy_reset_block(&adapter->hw))
547 goto out;
548 break;
549 default:
550 goto out;
551 }
552 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
553 mii_reg |= MII_CR_POWER_DOWN;
554 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
555 mdelay(1);
556 }
557 out:
558 return;
559 }
560
561 void
562 e1000_down(struct e1000_adapter *adapter)
563 {
564 struct net_device *netdev = adapter->netdev;
565
566 /* signal that we're down so the interrupt handler does not
567 * reschedule our watchdog timer */
568 set_bit(__E1000_DOWN, &adapter->flags);
569
570 e1000_irq_disable(adapter);
571
572 del_timer_sync(&adapter->tx_fifo_stall_timer);
573 del_timer_sync(&adapter->watchdog_timer);
574 del_timer_sync(&adapter->phy_info_timer);
575
576 #ifdef CONFIG_E1000_NAPI
577 netif_poll_disable(netdev);
578 #endif
579 netdev->tx_queue_len = adapter->tx_queue_len;
580 adapter->link_speed = 0;
581 adapter->link_duplex = 0;
582 netif_carrier_off(netdev);
583 netif_stop_queue(netdev);
584
585 e1000_reset(adapter);
586 e1000_clean_all_tx_rings(adapter);
587 e1000_clean_all_rx_rings(adapter);
588 }
589
590 void
591 e1000_reinit_locked(struct e1000_adapter *adapter)
592 {
593 WARN_ON(in_interrupt());
594 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
595 msleep(1);
596 e1000_down(adapter);
597 e1000_up(adapter);
598 clear_bit(__E1000_RESETTING, &adapter->flags);
599 }
600
601 void
602 e1000_reset(struct e1000_adapter *adapter)
603 {
604 uint32_t pba, manc;
605 uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
606
607 /* Repartition Pba for greater than 9k mtu
608 * To take effect CTRL.RST is required.
609 */
610
611 switch (adapter->hw.mac_type) {
612 case e1000_82547:
613 case e1000_82547_rev_2:
614 pba = E1000_PBA_30K;
615 break;
616 case e1000_82571:
617 case e1000_82572:
618 case e1000_80003es2lan:
619 pba = E1000_PBA_38K;
620 break;
621 case e1000_82573:
622 pba = E1000_PBA_12K;
623 break;
624 case e1000_ich8lan:
625 pba = E1000_PBA_8K;
626 break;
627 default:
628 pba = E1000_PBA_48K;
629 break;
630 }
631
632 if ((adapter->hw.mac_type != e1000_82573) &&
633 (adapter->netdev->mtu > E1000_RXBUFFER_8192))
634 pba -= 8; /* allocate more FIFO for Tx */
635
636
637 if (adapter->hw.mac_type == e1000_82547) {
638 adapter->tx_fifo_head = 0;
639 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
640 adapter->tx_fifo_size =
641 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
642 atomic_set(&adapter->tx_fifo_stall, 0);
643 }
644
645 E1000_WRITE_REG(&adapter->hw, PBA, pba);
646
647 /* flow control settings */
648 /* Set the FC high water mark to 90% of the FIFO size.
649 * Required to clear last 3 LSB */
650 fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
651 /* We can't use 90% on small FIFOs because the remainder
652 * would be less than 1 full frame. In this case, we size
653 * it to allow at least a full frame above the high water
654 * mark. */
655 if (pba < E1000_PBA_16K)
656 fc_high_water_mark = (pba * 1024) - 1600;
657
658 adapter->hw.fc_high_water = fc_high_water_mark;
659 adapter->hw.fc_low_water = fc_high_water_mark - 8;
660 if (adapter->hw.mac_type == e1000_80003es2lan)
661 adapter->hw.fc_pause_time = 0xFFFF;
662 else
663 adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
664 adapter->hw.fc_send_xon = 1;
665 adapter->hw.fc = adapter->hw.original_fc;
666
667 /* Allow time for pending master requests to run */
668 e1000_reset_hw(&adapter->hw);
669 if (adapter->hw.mac_type >= e1000_82544)
670 E1000_WRITE_REG(&adapter->hw, WUC, 0);
671
672 if (e1000_init_hw(&adapter->hw))
673 DPRINTK(PROBE, ERR, "Hardware Error\n");
674 e1000_update_mng_vlan(adapter);
675 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
676 E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
677
678 e1000_reset_adaptive(&adapter->hw);
679 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
680
681 if (!adapter->smart_power_down &&
682 (adapter->hw.mac_type == e1000_82571 ||
683 adapter->hw.mac_type == e1000_82572)) {
684 uint16_t phy_data = 0;
685 /* speed up time to link by disabling smart power down, ignore
686 * the return value of this function because there is nothing
687 * different we would do if it failed */
688 e1000_read_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
689 &phy_data);
690 phy_data &= ~IGP02E1000_PM_SPD;
691 e1000_write_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
692 phy_data);
693 }
694
695 if ((adapter->en_mng_pt) &&
696 (adapter->hw.mac_type >= e1000_82540) &&
697 (adapter->hw.mac_type < e1000_82571) &&
698 (adapter->hw.media_type == e1000_media_type_copper)) {
699 manc = E1000_READ_REG(&adapter->hw, MANC);
700 manc |= (E1000_MANC_ARP_EN | E1000_MANC_EN_MNG2HOST);
701 E1000_WRITE_REG(&adapter->hw, MANC, manc);
702 }
703 }
704
705 /**
706 * e1000_probe - Device Initialization Routine
707 * @pdev: PCI device information struct
708 * @ent: entry in e1000_pci_tbl
709 *
710 * Returns 0 on success, negative on failure
711 *
712 * e1000_probe initializes an adapter identified by a pci_dev structure.
713 * The OS initialization, configuring of the adapter private structure,
714 * and a hardware reset occur.
715 **/
716
717 static int __devinit
718 e1000_probe(struct pci_dev *pdev,
719 const struct pci_device_id *ent)
720 {
721 struct net_device *netdev;
722 struct e1000_adapter *adapter;
723 unsigned long mmio_start, mmio_len;
724 unsigned long flash_start, flash_len;
725
726 static int cards_found = 0;
727 static int global_quad_port_a = 0; /* global ksp3 port a indication */
728 int i, err, pci_using_dac;
729 uint16_t eeprom_data = 0;
730 uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
731 if ((err = pci_enable_device(pdev)))
732 return err;
733
734 if (!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK)) &&
735 !(err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))) {
736 pci_using_dac = 1;
737 } else {
738 if ((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK)) &&
739 (err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))) {
740 E1000_ERR("No usable DMA configuration, aborting\n");
741 goto err_dma;
742 }
743 pci_using_dac = 0;
744 }
745
746 if ((err = pci_request_regions(pdev, e1000_driver_name)))
747 goto err_pci_reg;
748
749 pci_set_master(pdev);
750
751 err = -ENOMEM;
752 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
753 if (!netdev)
754 goto err_alloc_etherdev;
755
756 SET_MODULE_OWNER(netdev);
757 SET_NETDEV_DEV(netdev, &pdev->dev);
758
759 pci_set_drvdata(pdev, netdev);
760 adapter = netdev_priv(netdev);
761 adapter->netdev = netdev;
762 adapter->pdev = pdev;
763 adapter->hw.back = adapter;
764 adapter->msg_enable = (1 << debug) - 1;
765
766 mmio_start = pci_resource_start(pdev, BAR_0);
767 mmio_len = pci_resource_len(pdev, BAR_0);
768
769 err = -EIO;
770 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
771 if (!adapter->hw.hw_addr)
772 goto err_ioremap;
773
774 for (i = BAR_1; i <= BAR_5; i++) {
775 if (pci_resource_len(pdev, i) == 0)
776 continue;
777 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
778 adapter->hw.io_base = pci_resource_start(pdev, i);
779 break;
780 }
781 }
782
783 netdev->open = &e1000_open;
784 netdev->stop = &e1000_close;
785 netdev->hard_start_xmit = &e1000_xmit_frame;
786 netdev->get_stats = &e1000_get_stats;
787 netdev->set_multicast_list = &e1000_set_multi;
788 netdev->set_mac_address = &e1000_set_mac;
789 netdev->change_mtu = &e1000_change_mtu;
790 netdev->do_ioctl = &e1000_ioctl;
791 e1000_set_ethtool_ops(netdev);
792 netdev->tx_timeout = &e1000_tx_timeout;
793 netdev->watchdog_timeo = 5 * HZ;
794 #ifdef CONFIG_E1000_NAPI
795 netdev->poll = &e1000_clean;
796 netdev->weight = 64;
797 #endif
798 netdev->vlan_rx_register = e1000_vlan_rx_register;
799 netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
800 netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
801 #ifdef CONFIG_NET_POLL_CONTROLLER
802 netdev->poll_controller = e1000_netpoll;
803 #endif
804 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
805
806 netdev->mem_start = mmio_start;
807 netdev->mem_end = mmio_start + mmio_len;
808 netdev->base_addr = adapter->hw.io_base;
809
810 adapter->bd_number = cards_found;
811
812 /* setup the private structure */
813
814 if ((err = e1000_sw_init(adapter)))
815 goto err_sw_init;
816
817 err = -EIO;
818 /* Flash BAR mapping must happen after e1000_sw_init
819 * because it depends on mac_type */
820 if ((adapter->hw.mac_type == e1000_ich8lan) &&
821 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
822 flash_start = pci_resource_start(pdev, 1);
823 flash_len = pci_resource_len(pdev, 1);
824 adapter->hw.flash_address = ioremap(flash_start, flash_len);
825 if (!adapter->hw.flash_address)
826 goto err_flashmap;
827 }
828
829 if (e1000_check_phy_reset_block(&adapter->hw))
830 DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
831
832 if (adapter->hw.mac_type >= e1000_82543) {
833 netdev->features = NETIF_F_SG |
834 NETIF_F_HW_CSUM |
835 NETIF_F_HW_VLAN_TX |
836 NETIF_F_HW_VLAN_RX |
837 NETIF_F_HW_VLAN_FILTER;
838 if (adapter->hw.mac_type == e1000_ich8lan)
839 netdev->features &= ~NETIF_F_HW_VLAN_FILTER;
840 }
841
842 #ifdef NETIF_F_TSO
843 if ((adapter->hw.mac_type >= e1000_82544) &&
844 (adapter->hw.mac_type != e1000_82547))
845 netdev->features |= NETIF_F_TSO;
846
847 #ifdef NETIF_F_TSO6
848 if (adapter->hw.mac_type > e1000_82547_rev_2)
849 netdev->features |= NETIF_F_TSO6;
850 #endif
851 #endif
852 if (pci_using_dac)
853 netdev->features |= NETIF_F_HIGHDMA;
854
855 netdev->features |= NETIF_F_LLTX;
856
857 adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
858
859 /* initialize eeprom parameters */
860
861 if (e1000_init_eeprom_params(&adapter->hw)) {
862 E1000_ERR("EEPROM initialization failed\n");
863 goto err_eeprom;
864 }
865
866 /* before reading the EEPROM, reset the controller to
867 * put the device in a known good starting state */
868
869 e1000_reset_hw(&adapter->hw);
870
871 /* make sure the EEPROM is good */
872
873 if (e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
874 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
875 goto err_eeprom;
876 }
877
878 /* copy the MAC address out of the EEPROM */
879
880 if (e1000_read_mac_addr(&adapter->hw))
881 DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
882 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
883 memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
884
885 if (!is_valid_ether_addr(netdev->perm_addr)) {
886 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
887 goto err_eeprom;
888 }
889
890 e1000_get_bus_info(&adapter->hw);
891
892 init_timer(&adapter->tx_fifo_stall_timer);
893 adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
894 adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
895
896 init_timer(&adapter->watchdog_timer);
897 adapter->watchdog_timer.function = &e1000_watchdog;
898 adapter->watchdog_timer.data = (unsigned long) adapter;
899
900 init_timer(&adapter->phy_info_timer);
901 adapter->phy_info_timer.function = &e1000_update_phy_info;
902 adapter->phy_info_timer.data = (unsigned long) adapter;
903
904 INIT_WORK(&adapter->reset_task,
905 (void (*)(void *))e1000_reset_task, netdev);
906
907 e1000_check_options(adapter);
908
909 /* Initial Wake on LAN setting
910 * If APM wake is enabled in the EEPROM,
911 * enable the ACPI Magic Packet filter
912 */
913
914 switch (adapter->hw.mac_type) {
915 case e1000_82542_rev2_0:
916 case e1000_82542_rev2_1:
917 case e1000_82543:
918 break;
919 case e1000_82544:
920 e1000_read_eeprom(&adapter->hw,
921 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
922 eeprom_apme_mask = E1000_EEPROM_82544_APM;
923 break;
924 case e1000_ich8lan:
925 e1000_read_eeprom(&adapter->hw,
926 EEPROM_INIT_CONTROL1_REG, 1, &eeprom_data);
927 eeprom_apme_mask = E1000_EEPROM_ICH8_APME;
928 break;
929 case e1000_82546:
930 case e1000_82546_rev_3:
931 case e1000_82571:
932 case e1000_80003es2lan:
933 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1){
934 e1000_read_eeprom(&adapter->hw,
935 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
936 break;
937 }
938 /* Fall Through */
939 default:
940 e1000_read_eeprom(&adapter->hw,
941 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
942 break;
943 }
944 if (eeprom_data & eeprom_apme_mask)
945 adapter->eeprom_wol |= E1000_WUFC_MAG;
946
947 /* now that we have the eeprom settings, apply the special cases
948 * where the eeprom may be wrong or the board simply won't support
949 * wake on lan on a particular port */
950 switch (pdev->device) {
951 case E1000_DEV_ID_82546GB_PCIE:
952 adapter->eeprom_wol = 0;
953 break;
954 case E1000_DEV_ID_82546EB_FIBER:
955 case E1000_DEV_ID_82546GB_FIBER:
956 case E1000_DEV_ID_82571EB_FIBER:
957 /* Wake events only supported on port A for dual fiber
958 * regardless of eeprom setting */
959 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1)
960 adapter->eeprom_wol = 0;
961 break;
962 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
963 case E1000_DEV_ID_82571EB_QUAD_COPPER:
964 /* if quad port adapter, disable WoL on all but port A */
965 if (global_quad_port_a != 0)
966 adapter->eeprom_wol = 0;
967 else
968 adapter->quad_port_a = 1;
969 /* Reset for multiple quad port adapters */
970 if (++global_quad_port_a == 4)
971 global_quad_port_a = 0;
972 break;
973 }
974
975 /* initialize the wol settings based on the eeprom settings */
976 adapter->wol = adapter->eeprom_wol;
977
978 /* print bus type/speed/width info */
979 {
980 struct e1000_hw *hw = &adapter->hw;
981 DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
982 ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
983 (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
984 ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
985 (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
986 (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
987 (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
988 (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
989 ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
990 (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
991 (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
992 "32-bit"));
993 }
994
995 for (i = 0; i < 6; i++)
996 printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
997
998 /* reset the hardware with the new settings */
999 e1000_reset(adapter);
1000
1001 /* If the controller is 82573 and f/w is AMT, do not set
1002 * DRV_LOAD until the interface is up. For all other cases,
1003 * let the f/w know that the h/w is now under the control
1004 * of the driver. */
1005 if (adapter->hw.mac_type != e1000_82573 ||
1006 !e1000_check_mng_mode(&adapter->hw))
1007 e1000_get_hw_control(adapter);
1008
1009 strcpy(netdev->name, "eth%d");
1010 if ((err = register_netdev(netdev)))
1011 goto err_register;
1012
1013 /* tell the stack to leave us alone until e1000_open() is called */
1014 netif_carrier_off(netdev);
1015 netif_stop_queue(netdev);
1016
1017 DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
1018
1019 cards_found++;
1020 return 0;
1021
1022 err_register:
1023 e1000_release_hw_control(adapter);
1024 err_eeprom:
1025 if (!e1000_check_phy_reset_block(&adapter->hw))
1026 e1000_phy_hw_reset(&adapter->hw);
1027
1028 if (adapter->hw.flash_address)
1029 iounmap(adapter->hw.flash_address);
1030 err_flashmap:
1031 #ifdef CONFIG_E1000_NAPI
1032 for (i = 0; i < adapter->num_rx_queues; i++)
1033 dev_put(&adapter->polling_netdev[i]);
1034 #endif
1035
1036 kfree(adapter->tx_ring);
1037 kfree(adapter->rx_ring);
1038 #ifdef CONFIG_E1000_NAPI
1039 kfree(adapter->polling_netdev);
1040 #endif
1041 err_sw_init:
1042 iounmap(adapter->hw.hw_addr);
1043 err_ioremap:
1044 free_netdev(netdev);
1045 err_alloc_etherdev:
1046 pci_release_regions(pdev);
1047 err_pci_reg:
1048 err_dma:
1049 pci_disable_device(pdev);
1050 return err;
1051 }
1052
1053 /**
1054 * e1000_remove - Device Removal Routine
1055 * @pdev: PCI device information struct
1056 *
1057 * e1000_remove is called by the PCI subsystem to alert the driver
1058 * that it should release a PCI device. The could be caused by a
1059 * Hot-Plug event, or because the driver is going to be removed from
1060 * memory.
1061 **/
1062
1063 static void __devexit
1064 e1000_remove(struct pci_dev *pdev)
1065 {
1066 struct net_device *netdev = pci_get_drvdata(pdev);
1067 struct e1000_adapter *adapter = netdev_priv(netdev);
1068 uint32_t manc;
1069 #ifdef CONFIG_E1000_NAPI
1070 int i;
1071 #endif
1072
1073 flush_scheduled_work();
1074
1075 if (adapter->hw.mac_type >= e1000_82540 &&
1076 adapter->hw.mac_type < e1000_82571 &&
1077 adapter->hw.media_type == e1000_media_type_copper) {
1078 manc = E1000_READ_REG(&adapter->hw, MANC);
1079 if (manc & E1000_MANC_SMBUS_EN) {
1080 manc |= E1000_MANC_ARP_EN;
1081 E1000_WRITE_REG(&adapter->hw, MANC, manc);
1082 }
1083 }
1084
1085 /* Release control of h/w to f/w. If f/w is AMT enabled, this
1086 * would have already happened in close and is redundant. */
1087 e1000_release_hw_control(adapter);
1088
1089 unregister_netdev(netdev);
1090 #ifdef CONFIG_E1000_NAPI
1091 for (i = 0; i < adapter->num_rx_queues; i++)
1092 dev_put(&adapter->polling_netdev[i]);
1093 #endif
1094
1095 if (!e1000_check_phy_reset_block(&adapter->hw))
1096 e1000_phy_hw_reset(&adapter->hw);
1097
1098 kfree(adapter->tx_ring);
1099 kfree(adapter->rx_ring);
1100 #ifdef CONFIG_E1000_NAPI
1101 kfree(adapter->polling_netdev);
1102 #endif
1103
1104 iounmap(adapter->hw.hw_addr);
1105 if (adapter->hw.flash_address)
1106 iounmap(adapter->hw.flash_address);
1107 pci_release_regions(pdev);
1108
1109 free_netdev(netdev);
1110
1111 pci_disable_device(pdev);
1112 }
1113
1114 /**
1115 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
1116 * @adapter: board private structure to initialize
1117 *
1118 * e1000_sw_init initializes the Adapter private data structure.
1119 * Fields are initialized based on PCI device information and
1120 * OS network device settings (MTU size).
1121 **/
1122
1123 static int __devinit
1124 e1000_sw_init(struct e1000_adapter *adapter)
1125 {
1126 struct e1000_hw *hw = &adapter->hw;
1127 struct net_device *netdev = adapter->netdev;
1128 struct pci_dev *pdev = adapter->pdev;
1129 #ifdef CONFIG_E1000_NAPI
1130 int i;
1131 #endif
1132
1133 /* PCI config space info */
1134
1135 hw->vendor_id = pdev->vendor;
1136 hw->device_id = pdev->device;
1137 hw->subsystem_vendor_id = pdev->subsystem_vendor;
1138 hw->subsystem_id = pdev->subsystem_device;
1139
1140 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
1141
1142 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
1143
1144 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1145 adapter->rx_ps_bsize0 = E1000_RXBUFFER_128;
1146 hw->max_frame_size = netdev->mtu +
1147 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
1148 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
1149
1150 /* identify the MAC */
1151
1152 if (e1000_set_mac_type(hw)) {
1153 DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
1154 return -EIO;
1155 }
1156
1157 switch (hw->mac_type) {
1158 default:
1159 break;
1160 case e1000_82541:
1161 case e1000_82547:
1162 case e1000_82541_rev_2:
1163 case e1000_82547_rev_2:
1164 hw->phy_init_script = 1;
1165 break;
1166 }
1167
1168 e1000_set_media_type(hw);
1169
1170 hw->wait_autoneg_complete = FALSE;
1171 hw->tbi_compatibility_en = TRUE;
1172 hw->adaptive_ifs = TRUE;
1173
1174 /* Copper options */
1175
1176 if (hw->media_type == e1000_media_type_copper) {
1177 hw->mdix = AUTO_ALL_MODES;
1178 hw->disable_polarity_correction = FALSE;
1179 hw->master_slave = E1000_MASTER_SLAVE;
1180 }
1181
1182 adapter->num_tx_queues = 1;
1183 adapter->num_rx_queues = 1;
1184
1185 if (e1000_alloc_queues(adapter)) {
1186 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
1187 return -ENOMEM;
1188 }
1189
1190 #ifdef CONFIG_E1000_NAPI
1191 for (i = 0; i < adapter->num_rx_queues; i++) {
1192 adapter->polling_netdev[i].priv = adapter;
1193 adapter->polling_netdev[i].poll = &e1000_clean;
1194 adapter->polling_netdev[i].weight = 64;
1195 dev_hold(&adapter->polling_netdev[i]);
1196 set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
1197 }
1198 spin_lock_init(&adapter->tx_queue_lock);
1199 #endif
1200
1201 atomic_set(&adapter->irq_sem, 1);
1202 spin_lock_init(&adapter->stats_lock);
1203
1204 set_bit(__E1000_DOWN, &adapter->flags);
1205
1206 return 0;
1207 }
1208
1209 /**
1210 * e1000_alloc_queues - Allocate memory for all rings
1211 * @adapter: board private structure to initialize
1212 *
1213 * We allocate one ring per queue at run-time since we don't know the
1214 * number of queues at compile-time. The polling_netdev array is
1215 * intended for Multiqueue, but should work fine with a single queue.
1216 **/
1217
1218 static int __devinit
1219 e1000_alloc_queues(struct e1000_adapter *adapter)
1220 {
1221 int size;
1222
1223 size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues;
1224 adapter->tx_ring = kmalloc(size, GFP_KERNEL);
1225 if (!adapter->tx_ring)
1226 return -ENOMEM;
1227 memset(adapter->tx_ring, 0, size);
1228
1229 size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues;
1230 adapter->rx_ring = kmalloc(size, GFP_KERNEL);
1231 if (!adapter->rx_ring) {
1232 kfree(adapter->tx_ring);
1233 return -ENOMEM;
1234 }
1235 memset(adapter->rx_ring, 0, size);
1236
1237 #ifdef CONFIG_E1000_NAPI
1238 size = sizeof(struct net_device) * adapter->num_rx_queues;
1239 adapter->polling_netdev = kmalloc(size, GFP_KERNEL);
1240 if (!adapter->polling_netdev) {
1241 kfree(adapter->tx_ring);
1242 kfree(adapter->rx_ring);
1243 return -ENOMEM;
1244 }
1245 memset(adapter->polling_netdev, 0, size);
1246 #endif
1247
1248 return E1000_SUCCESS;
1249 }
1250
1251 /**
1252 * e1000_open - Called when a network interface is made active
1253 * @netdev: network interface device structure
1254 *
1255 * Returns 0 on success, negative value on failure
1256 *
1257 * The open entry point is called when a network interface is made
1258 * active by the system (IFF_UP). At this point all resources needed
1259 * for transmit and receive operations are allocated, the interrupt
1260 * handler is registered with the OS, the watchdog timer is started,
1261 * and the stack is notified that the interface is ready.
1262 **/
1263
1264 static int
1265 e1000_open(struct net_device *netdev)
1266 {
1267 struct e1000_adapter *adapter = netdev_priv(netdev);
1268 int err;
1269
1270 /* disallow open during test */
1271 if (test_bit(__E1000_TESTING, &adapter->flags))
1272 return -EBUSY;
1273
1274 /* allocate transmit descriptors */
1275 if ((err = e1000_setup_all_tx_resources(adapter)))
1276 goto err_setup_tx;
1277
1278 /* allocate receive descriptors */
1279 if ((err = e1000_setup_all_rx_resources(adapter)))
1280 goto err_setup_rx;
1281
1282 err = e1000_request_irq(adapter);
1283 if (err)
1284 goto err_req_irq;
1285
1286 e1000_power_up_phy(adapter);
1287
1288 if ((err = e1000_up(adapter)))
1289 goto err_up;
1290 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
1291 if ((adapter->hw.mng_cookie.status &
1292 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1293 e1000_update_mng_vlan(adapter);
1294 }
1295
1296 /* If AMT is enabled, let the firmware know that the network
1297 * interface is now open */
1298 if (adapter->hw.mac_type == e1000_82573 &&
1299 e1000_check_mng_mode(&adapter->hw))
1300 e1000_get_hw_control(adapter);
1301
1302 return E1000_SUCCESS;
1303
1304 err_up:
1305 e1000_power_down_phy(adapter);
1306 e1000_free_irq(adapter);
1307 err_req_irq:
1308 e1000_free_all_rx_resources(adapter);
1309 err_setup_rx:
1310 e1000_free_all_tx_resources(adapter);
1311 err_setup_tx:
1312 e1000_reset(adapter);
1313
1314 return err;
1315 }
1316
1317 /**
1318 * e1000_close - Disables a network interface
1319 * @netdev: network interface device structure
1320 *
1321 * Returns 0, this is not allowed to fail
1322 *
1323 * The close entry point is called when an interface is de-activated
1324 * by the OS. The hardware is still under the drivers control, but
1325 * needs to be disabled. A global MAC reset is issued to stop the
1326 * hardware, and all transmit and receive resources are freed.
1327 **/
1328
1329 static int
1330 e1000_close(struct net_device *netdev)
1331 {
1332 struct e1000_adapter *adapter = netdev_priv(netdev);
1333
1334 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1335 e1000_down(adapter);
1336 e1000_power_down_phy(adapter);
1337 e1000_free_irq(adapter);
1338
1339 e1000_free_all_tx_resources(adapter);
1340 e1000_free_all_rx_resources(adapter);
1341
1342 /* kill manageability vlan ID if supported, but not if a vlan with
1343 * the same ID is registered on the host OS (let 8021q kill it) */
1344 if ((adapter->hw.mng_cookie.status &
1345 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
1346 !(adapter->vlgrp &&
1347 adapter->vlgrp->vlan_devices[adapter->mng_vlan_id])) {
1348 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1349 }
1350
1351 /* If AMT is enabled, let the firmware know that the network
1352 * interface is now closed */
1353 if (adapter->hw.mac_type == e1000_82573 &&
1354 e1000_check_mng_mode(&adapter->hw))
1355 e1000_release_hw_control(adapter);
1356
1357 return 0;
1358 }
1359
1360 /**
1361 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1362 * @adapter: address of board private structure
1363 * @start: address of beginning of memory
1364 * @len: length of memory
1365 **/
1366 static boolean_t
1367 e1000_check_64k_bound(struct e1000_adapter *adapter,
1368 void *start, unsigned long len)
1369 {
1370 unsigned long begin = (unsigned long) start;
1371 unsigned long end = begin + len;
1372
1373 /* First rev 82545 and 82546 need to not allow any memory
1374 * write location to cross 64k boundary due to errata 23 */
1375 if (adapter->hw.mac_type == e1000_82545 ||
1376 adapter->hw.mac_type == e1000_82546) {
1377 return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
1378 }
1379
1380 return TRUE;
1381 }
1382
1383 /**
1384 * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1385 * @adapter: board private structure
1386 * @txdr: tx descriptor ring (for a specific queue) to setup
1387 *
1388 * Return 0 on success, negative on failure
1389 **/
1390
1391 static int
1392 e1000_setup_tx_resources(struct e1000_adapter *adapter,
1393 struct e1000_tx_ring *txdr)
1394 {
1395 struct pci_dev *pdev = adapter->pdev;
1396 int size;
1397
1398 size = sizeof(struct e1000_buffer) * txdr->count;
1399 txdr->buffer_info = vmalloc(size);
1400 if (!txdr->buffer_info) {
1401 DPRINTK(PROBE, ERR,
1402 "Unable to allocate memory for the transmit descriptor ring\n");
1403 return -ENOMEM;
1404 }
1405 memset(txdr->buffer_info, 0, size);
1406
1407 /* round up to nearest 4K */
1408
1409 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
1410 E1000_ROUNDUP(txdr->size, 4096);
1411
1412 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
1413 if (!txdr->desc) {
1414 setup_tx_desc_die:
1415 vfree(txdr->buffer_info);
1416 DPRINTK(PROBE, ERR,
1417 "Unable to allocate memory for the transmit descriptor ring\n");
1418 return -ENOMEM;
1419 }
1420
1421 /* Fix for errata 23, can't cross 64kB boundary */
1422 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1423 void *olddesc = txdr->desc;
1424 dma_addr_t olddma = txdr->dma;
1425 DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
1426 "at %p\n", txdr->size, txdr->desc);
1427 /* Try again, without freeing the previous */
1428 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
1429 /* Failed allocation, critical failure */
1430 if (!txdr->desc) {
1431 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1432 goto setup_tx_desc_die;
1433 }
1434
1435 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1436 /* give up */
1437 pci_free_consistent(pdev, txdr->size, txdr->desc,
1438 txdr->dma);
1439 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1440 DPRINTK(PROBE, ERR,
1441 "Unable to allocate aligned memory "
1442 "for the transmit descriptor ring\n");
1443 vfree(txdr->buffer_info);
1444 return -ENOMEM;
1445 } else {
1446 /* Free old allocation, new allocation was successful */
1447 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1448 }
1449 }
1450 memset(txdr->desc, 0, txdr->size);
1451
1452 txdr->next_to_use = 0;
1453 txdr->next_to_clean = 0;
1454 spin_lock_init(&txdr->tx_lock);
1455
1456 return 0;
1457 }
1458
1459 /**
1460 * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1461 * (Descriptors) for all queues
1462 * @adapter: board private structure
1463 *
1464 * Return 0 on success, negative on failure
1465 **/
1466
1467 int
1468 e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
1469 {
1470 int i, err = 0;
1471
1472 for (i = 0; i < adapter->num_tx_queues; i++) {
1473 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1474 if (err) {
1475 DPRINTK(PROBE, ERR,
1476 "Allocation for Tx Queue %u failed\n", i);
1477 for (i-- ; i >= 0; i--)
1478 e1000_free_tx_resources(adapter,
1479 &adapter->tx_ring[i]);
1480 break;
1481 }
1482 }
1483
1484 return err;
1485 }
1486
1487 /**
1488 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1489 * @adapter: board private structure
1490 *
1491 * Configure the Tx unit of the MAC after a reset.
1492 **/
1493
1494 static void
1495 e1000_configure_tx(struct e1000_adapter *adapter)
1496 {
1497 uint64_t tdba;
1498 struct e1000_hw *hw = &adapter->hw;
1499 uint32_t tdlen, tctl, tipg, tarc;
1500 uint32_t ipgr1, ipgr2;
1501
1502 /* Setup the HW Tx Head and Tail descriptor pointers */
1503
1504 switch (adapter->num_tx_queues) {
1505 case 1:
1506 default:
1507 tdba = adapter->tx_ring[0].dma;
1508 tdlen = adapter->tx_ring[0].count *
1509 sizeof(struct e1000_tx_desc);
1510 E1000_WRITE_REG(hw, TDLEN, tdlen);
1511 E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
1512 E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
1513 E1000_WRITE_REG(hw, TDT, 0);
1514 E1000_WRITE_REG(hw, TDH, 0);
1515 adapter->tx_ring[0].tdh = ((hw->mac_type >= e1000_82543) ? E1000_TDH : E1000_82542_TDH);
1516 adapter->tx_ring[0].tdt = ((hw->mac_type >= e1000_82543) ? E1000_TDT : E1000_82542_TDT);
1517 break;
1518 }
1519
1520 /* Set the default values for the Tx Inter Packet Gap timer */
1521
1522 if (hw->media_type == e1000_media_type_fiber ||
1523 hw->media_type == e1000_media_type_internal_serdes)
1524 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1525 else
1526 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1527
1528 switch (hw->mac_type) {
1529 case e1000_82542_rev2_0:
1530 case e1000_82542_rev2_1:
1531 tipg = DEFAULT_82542_TIPG_IPGT;
1532 ipgr1 = DEFAULT_82542_TIPG_IPGR1;
1533 ipgr2 = DEFAULT_82542_TIPG_IPGR2;
1534 break;
1535 case e1000_80003es2lan:
1536 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1537 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2;
1538 break;
1539 default:
1540 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1541 ipgr2 = DEFAULT_82543_TIPG_IPGR2;
1542 break;
1543 }
1544 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
1545 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
1546 E1000_WRITE_REG(hw, TIPG, tipg);
1547
1548 /* Set the Tx Interrupt Delay register */
1549
1550 E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
1551 if (hw->mac_type >= e1000_82540)
1552 E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
1553
1554 /* Program the Transmit Control Register */
1555
1556 tctl = E1000_READ_REG(hw, TCTL);
1557 tctl &= ~E1000_TCTL_CT;
1558 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1559 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1560
1561 if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
1562 tarc = E1000_READ_REG(hw, TARC0);
1563 /* set the speed mode bit, we'll clear it if we're not at
1564 * gigabit link later */
1565 tarc |= (1 << 21);
1566 E1000_WRITE_REG(hw, TARC0, tarc);
1567 } else if (hw->mac_type == e1000_80003es2lan) {
1568 tarc = E1000_READ_REG(hw, TARC0);
1569 tarc |= 1;
1570 E1000_WRITE_REG(hw, TARC0, tarc);
1571 tarc = E1000_READ_REG(hw, TARC1);
1572 tarc |= 1;
1573 E1000_WRITE_REG(hw, TARC1, tarc);
1574 }
1575
1576 e1000_config_collision_dist(hw);
1577
1578 /* Setup Transmit Descriptor Settings for eop descriptor */
1579 adapter->txd_cmd = E1000_TXD_CMD_IDE | E1000_TXD_CMD_EOP |
1580 E1000_TXD_CMD_IFCS;
1581
1582 if (hw->mac_type < e1000_82543)
1583 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1584 else
1585 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1586
1587 /* Cache if we're 82544 running in PCI-X because we'll
1588 * need this to apply a workaround later in the send path. */
1589 if (hw->mac_type == e1000_82544 &&
1590 hw->bus_type == e1000_bus_type_pcix)
1591 adapter->pcix_82544 = 1;
1592
1593 E1000_WRITE_REG(hw, TCTL, tctl);
1594
1595 }
1596
1597 /**
1598 * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1599 * @adapter: board private structure
1600 * @rxdr: rx descriptor ring (for a specific queue) to setup
1601 *
1602 * Returns 0 on success, negative on failure
1603 **/
1604
1605 static int
1606 e1000_setup_rx_resources(struct e1000_adapter *adapter,
1607 struct e1000_rx_ring *rxdr)
1608 {
1609 struct pci_dev *pdev = adapter->pdev;
1610 int size, desc_len;
1611
1612 size = sizeof(struct e1000_buffer) * rxdr->count;
1613 rxdr->buffer_info = vmalloc(size);
1614 if (!rxdr->buffer_info) {
1615 DPRINTK(PROBE, ERR,
1616 "Unable to allocate memory for the receive descriptor ring\n");
1617 return -ENOMEM;
1618 }
1619 memset(rxdr->buffer_info, 0, size);
1620
1621 size = sizeof(struct e1000_ps_page) * rxdr->count;
1622 rxdr->ps_page = kmalloc(size, GFP_KERNEL);
1623 if (!rxdr->ps_page) {
1624 vfree(rxdr->buffer_info);
1625 DPRINTK(PROBE, ERR,
1626 "Unable to allocate memory for the receive descriptor ring\n");
1627 return -ENOMEM;
1628 }
1629 memset(rxdr->ps_page, 0, size);
1630
1631 size = sizeof(struct e1000_ps_page_dma) * rxdr->count;
1632 rxdr->ps_page_dma = kmalloc(size, GFP_KERNEL);
1633 if (!rxdr->ps_page_dma) {
1634 vfree(rxdr->buffer_info);
1635 kfree(rxdr->ps_page);
1636 DPRINTK(PROBE, ERR,
1637 "Unable to allocate memory for the receive descriptor ring\n");
1638 return -ENOMEM;
1639 }
1640 memset(rxdr->ps_page_dma, 0, size);
1641
1642 if (adapter->hw.mac_type <= e1000_82547_rev_2)
1643 desc_len = sizeof(struct e1000_rx_desc);
1644 else
1645 desc_len = sizeof(union e1000_rx_desc_packet_split);
1646
1647 /* Round up to nearest 4K */
1648
1649 rxdr->size = rxdr->count * desc_len;
1650 E1000_ROUNDUP(rxdr->size, 4096);
1651
1652 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1653
1654 if (!rxdr->desc) {
1655 DPRINTK(PROBE, ERR,
1656 "Unable to allocate memory for the receive descriptor ring\n");
1657 setup_rx_desc_die:
1658 vfree(rxdr->buffer_info);
1659 kfree(rxdr->ps_page);
1660 kfree(rxdr->ps_page_dma);
1661 return -ENOMEM;
1662 }
1663
1664 /* Fix for errata 23, can't cross 64kB boundary */
1665 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1666 void *olddesc = rxdr->desc;
1667 dma_addr_t olddma = rxdr->dma;
1668 DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
1669 "at %p\n", rxdr->size, rxdr->desc);
1670 /* Try again, without freeing the previous */
1671 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1672 /* Failed allocation, critical failure */
1673 if (!rxdr->desc) {
1674 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1675 DPRINTK(PROBE, ERR,
1676 "Unable to allocate memory "
1677 "for the receive descriptor ring\n");
1678 goto setup_rx_desc_die;
1679 }
1680
1681 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1682 /* give up */
1683 pci_free_consistent(pdev, rxdr->size, rxdr->desc,
1684 rxdr->dma);
1685 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1686 DPRINTK(PROBE, ERR,
1687 "Unable to allocate aligned memory "
1688 "for the receive descriptor ring\n");
1689 goto setup_rx_desc_die;
1690 } else {
1691 /* Free old allocation, new allocation was successful */
1692 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1693 }
1694 }
1695 memset(rxdr->desc, 0, rxdr->size);
1696
1697 rxdr->next_to_clean = 0;
1698 rxdr->next_to_use = 0;
1699
1700 return 0;
1701 }
1702
1703 /**
1704 * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1705 * (Descriptors) for all queues
1706 * @adapter: board private structure
1707 *
1708 * Return 0 on success, negative on failure
1709 **/
1710
1711 int
1712 e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
1713 {
1714 int i, err = 0;
1715
1716 for (i = 0; i < adapter->num_rx_queues; i++) {
1717 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1718 if (err) {
1719 DPRINTK(PROBE, ERR,
1720 "Allocation for Rx Queue %u failed\n", i);
1721 for (i-- ; i >= 0; i--)
1722 e1000_free_rx_resources(adapter,
1723 &adapter->rx_ring[i]);
1724 break;
1725 }
1726 }
1727
1728 return err;
1729 }
1730
1731 /**
1732 * e1000_setup_rctl - configure the receive control registers
1733 * @adapter: Board private structure
1734 **/
1735 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1736 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
1737 static void
1738 e1000_setup_rctl(struct e1000_adapter *adapter)
1739 {
1740 uint32_t rctl, rfctl;
1741 uint32_t psrctl = 0;
1742 #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
1743 uint32_t pages = 0;
1744 #endif
1745
1746 rctl = E1000_READ_REG(&adapter->hw, RCTL);
1747
1748 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1749
1750 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1751 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1752 (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
1753
1754 if (adapter->hw.tbi_compatibility_on == 1)
1755 rctl |= E1000_RCTL_SBP;
1756 else
1757 rctl &= ~E1000_RCTL_SBP;
1758
1759 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1760 rctl &= ~E1000_RCTL_LPE;
1761 else
1762 rctl |= E1000_RCTL_LPE;
1763
1764 /* Setup buffer sizes */
1765 rctl &= ~E1000_RCTL_SZ_4096;
1766 rctl |= E1000_RCTL_BSEX;
1767 switch (adapter->rx_buffer_len) {
1768 case E1000_RXBUFFER_256:
1769 rctl |= E1000_RCTL_SZ_256;
1770 rctl &= ~E1000_RCTL_BSEX;
1771 break;
1772 case E1000_RXBUFFER_512:
1773 rctl |= E1000_RCTL_SZ_512;
1774 rctl &= ~E1000_RCTL_BSEX;
1775 break;
1776 case E1000_RXBUFFER_1024:
1777 rctl |= E1000_RCTL_SZ_1024;
1778 rctl &= ~E1000_RCTL_BSEX;
1779 break;
1780 case E1000_RXBUFFER_2048:
1781 default:
1782 rctl |= E1000_RCTL_SZ_2048;
1783 rctl &= ~E1000_RCTL_BSEX;
1784 break;
1785 case E1000_RXBUFFER_4096:
1786 rctl |= E1000_RCTL_SZ_4096;
1787 break;
1788 case E1000_RXBUFFER_8192:
1789 rctl |= E1000_RCTL_SZ_8192;
1790 break;
1791 case E1000_RXBUFFER_16384:
1792 rctl |= E1000_RCTL_SZ_16384;
1793 break;
1794 }
1795
1796 #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
1797 /* 82571 and greater support packet-split where the protocol
1798 * header is placed in skb->data and the packet data is
1799 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
1800 * In the case of a non-split, skb->data is linearly filled,
1801 * followed by the page buffers. Therefore, skb->data is
1802 * sized to hold the largest protocol header.
1803 */
1804 /* allocations using alloc_page take too long for regular MTU
1805 * so only enable packet split for jumbo frames */
1806 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
1807 if ((adapter->hw.mac_type >= e1000_82571) && (pages <= 3) &&
1808 PAGE_SIZE <= 16384 && (rctl & E1000_RCTL_LPE))
1809 adapter->rx_ps_pages = pages;
1810 else
1811 adapter->rx_ps_pages = 0;
1812 #endif
1813 if (adapter->rx_ps_pages) {
1814 /* Configure extra packet-split registers */
1815 rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
1816 rfctl |= E1000_RFCTL_EXTEN;
1817 /* disable packet split support for IPv6 extension headers,
1818 * because some malformed IPv6 headers can hang the RX */
1819 rfctl |= (E1000_RFCTL_IPV6_EX_DIS |
1820 E1000_RFCTL_NEW_IPV6_EXT_DIS);
1821
1822 E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
1823
1824 rctl |= E1000_RCTL_DTYP_PS;
1825
1826 psrctl |= adapter->rx_ps_bsize0 >>
1827 E1000_PSRCTL_BSIZE0_SHIFT;
1828
1829 switch (adapter->rx_ps_pages) {
1830 case 3:
1831 psrctl |= PAGE_SIZE <<
1832 E1000_PSRCTL_BSIZE3_SHIFT;
1833 case 2:
1834 psrctl |= PAGE_SIZE <<
1835 E1000_PSRCTL_BSIZE2_SHIFT;
1836 case 1:
1837 psrctl |= PAGE_SIZE >>
1838 E1000_PSRCTL_BSIZE1_SHIFT;
1839 break;
1840 }
1841
1842 E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
1843 }
1844
1845 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
1846 }
1847
1848 /**
1849 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
1850 * @adapter: board private structure
1851 *
1852 * Configure the Rx unit of the MAC after a reset.
1853 **/
1854
1855 static void
1856 e1000_configure_rx(struct e1000_adapter *adapter)
1857 {
1858 uint64_t rdba;
1859 struct e1000_hw *hw = &adapter->hw;
1860 uint32_t rdlen, rctl, rxcsum, ctrl_ext;
1861
1862 if (adapter->rx_ps_pages) {
1863 /* this is a 32 byte descriptor */
1864 rdlen = adapter->rx_ring[0].count *
1865 sizeof(union e1000_rx_desc_packet_split);
1866 adapter->clean_rx = e1000_clean_rx_irq_ps;
1867 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
1868 } else {
1869 rdlen = adapter->rx_ring[0].count *
1870 sizeof(struct e1000_rx_desc);
1871 adapter->clean_rx = e1000_clean_rx_irq;
1872 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
1873 }
1874
1875 /* disable receives while setting up the descriptors */
1876 rctl = E1000_READ_REG(hw, RCTL);
1877 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
1878
1879 /* set the Receive Delay Timer Register */
1880 E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
1881
1882 if (hw->mac_type >= e1000_82540) {
1883 E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
1884 if (adapter->itr > 1)
1885 E1000_WRITE_REG(hw, ITR,
1886 1000000000 / (adapter->itr * 256));
1887 }
1888
1889 if (hw->mac_type >= e1000_82571) {
1890 ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
1891 /* Reset delay timers after every interrupt */
1892 ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR;
1893 #ifdef CONFIG_E1000_NAPI
1894 /* Auto-Mask interrupts upon ICR read. */
1895 ctrl_ext |= E1000_CTRL_EXT_IAME;
1896 #endif
1897 E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
1898 E1000_WRITE_REG(hw, IAM, ~0);
1899 E1000_WRITE_FLUSH(hw);
1900 }
1901
1902 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1903 * the Base and Length of the Rx Descriptor Ring */
1904 switch (adapter->num_rx_queues) {
1905 case 1:
1906 default:
1907 rdba = adapter->rx_ring[0].dma;
1908 E1000_WRITE_REG(hw, RDLEN, rdlen);
1909 E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
1910 E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
1911 E1000_WRITE_REG(hw, RDT, 0);
1912 E1000_WRITE_REG(hw, RDH, 0);
1913 adapter->rx_ring[0].rdh = ((hw->mac_type >= e1000_82543) ? E1000_RDH : E1000_82542_RDH);
1914 adapter->rx_ring[0].rdt = ((hw->mac_type >= e1000_82543) ? E1000_RDT : E1000_82542_RDT);
1915 break;
1916 }
1917
1918 /* Enable 82543 Receive Checksum Offload for TCP and UDP */
1919 if (hw->mac_type >= e1000_82543) {
1920 rxcsum = E1000_READ_REG(hw, RXCSUM);
1921 if (adapter->rx_csum == TRUE) {
1922 rxcsum |= E1000_RXCSUM_TUOFL;
1923
1924 /* Enable 82571 IPv4 payload checksum for UDP fragments
1925 * Must be used in conjunction with packet-split. */
1926 if ((hw->mac_type >= e1000_82571) &&
1927 (adapter->rx_ps_pages)) {
1928 rxcsum |= E1000_RXCSUM_IPPCSE;
1929 }
1930 } else {
1931 rxcsum &= ~E1000_RXCSUM_TUOFL;
1932 /* don't need to clear IPPCSE as it defaults to 0 */
1933 }
1934 E1000_WRITE_REG(hw, RXCSUM, rxcsum);
1935 }
1936
1937 /* enable early receives on 82573, only takes effect if using > 2048
1938 * byte total frame size. for example only for jumbo frames */
1939 #define E1000_ERT_2048 0x100
1940 if (hw->mac_type == e1000_82573)
1941 E1000_WRITE_REG(hw, ERT, E1000_ERT_2048);
1942
1943 /* Enable Receives */
1944 E1000_WRITE_REG(hw, RCTL, rctl);
1945 }
1946
1947 /**
1948 * e1000_free_tx_resources - Free Tx Resources per Queue
1949 * @adapter: board private structure
1950 * @tx_ring: Tx descriptor ring for a specific queue
1951 *
1952 * Free all transmit software resources
1953 **/
1954
1955 static void
1956 e1000_free_tx_resources(struct e1000_adapter *adapter,
1957 struct e1000_tx_ring *tx_ring)
1958 {
1959 struct pci_dev *pdev = adapter->pdev;
1960
1961 e1000_clean_tx_ring(adapter, tx_ring);
1962
1963 vfree(tx_ring->buffer_info);
1964 tx_ring->buffer_info = NULL;
1965
1966 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
1967
1968 tx_ring->desc = NULL;
1969 }
1970
1971 /**
1972 * e1000_free_all_tx_resources - Free Tx Resources for All Queues
1973 * @adapter: board private structure
1974 *
1975 * Free all transmit software resources
1976 **/
1977
1978 void
1979 e1000_free_all_tx_resources(struct e1000_adapter *adapter)
1980 {
1981 int i;
1982
1983 for (i = 0; i < adapter->num_tx_queues; i++)
1984 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
1985 }
1986
1987 static void
1988 e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
1989 struct e1000_buffer *buffer_info)
1990 {
1991 if (buffer_info->dma) {
1992 pci_unmap_page(adapter->pdev,
1993 buffer_info->dma,
1994 buffer_info->length,
1995 PCI_DMA_TODEVICE);
1996 buffer_info->dma = 0;
1997 }
1998 if (buffer_info->skb) {
1999 dev_kfree_skb_any(buffer_info->skb);
2000 buffer_info->skb = NULL;
2001 }
2002 /* buffer_info must be completely set up in the transmit path */
2003 }
2004
2005 /**
2006 * e1000_clean_tx_ring - Free Tx Buffers
2007 * @adapter: board private structure
2008 * @tx_ring: ring to be cleaned
2009 **/
2010
2011 static void
2012 e1000_clean_tx_ring(struct e1000_adapter *adapter,
2013 struct e1000_tx_ring *tx_ring)
2014 {
2015 struct e1000_buffer *buffer_info;
2016 unsigned long size;
2017 unsigned int i;
2018
2019 /* Free all the Tx ring sk_buffs */
2020
2021 for (i = 0; i < tx_ring->count; i++) {
2022 buffer_info = &tx_ring->buffer_info[i];
2023 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
2024 }
2025
2026 size = sizeof(struct e1000_buffer) * tx_ring->count;
2027 memset(tx_ring->buffer_info, 0, size);
2028
2029 /* Zero out the descriptor ring */
2030
2031 memset(tx_ring->desc, 0, tx_ring->size);
2032
2033 tx_ring->next_to_use = 0;
2034 tx_ring->next_to_clean = 0;
2035 tx_ring->last_tx_tso = 0;
2036
2037 writel(0, adapter->hw.hw_addr + tx_ring->tdh);
2038 writel(0, adapter->hw.hw_addr + tx_ring->tdt);
2039 }
2040
2041 /**
2042 * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
2043 * @adapter: board private structure
2044 **/
2045
2046 static void
2047 e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
2048 {
2049 int i;
2050
2051 for (i = 0; i < adapter->num_tx_queues; i++)
2052 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
2053 }
2054
2055 /**
2056 * e1000_free_rx_resources - Free Rx Resources
2057 * @adapter: board private structure
2058 * @rx_ring: ring to clean the resources from
2059 *
2060 * Free all receive software resources
2061 **/
2062
2063 static void
2064 e1000_free_rx_resources(struct e1000_adapter *adapter,
2065 struct e1000_rx_ring *rx_ring)
2066 {
2067 struct pci_dev *pdev = adapter->pdev;
2068
2069 e1000_clean_rx_ring(adapter, rx_ring);
2070
2071 vfree(rx_ring->buffer_info);
2072 rx_ring->buffer_info = NULL;
2073 kfree(rx_ring->ps_page);
2074 rx_ring->ps_page = NULL;
2075 kfree(rx_ring->ps_page_dma);
2076 rx_ring->ps_page_dma = NULL;
2077
2078 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
2079
2080 rx_ring->desc = NULL;
2081 }
2082
2083 /**
2084 * e1000_free_all_rx_resources - Free Rx Resources for All Queues
2085 * @adapter: board private structure
2086 *
2087 * Free all receive software resources
2088 **/
2089
2090 void
2091 e1000_free_all_rx_resources(struct e1000_adapter *adapter)
2092 {
2093 int i;
2094
2095 for (i = 0; i < adapter->num_rx_queues; i++)
2096 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
2097 }
2098
2099 /**
2100 * e1000_clean_rx_ring - Free Rx Buffers per Queue
2101 * @adapter: board private structure
2102 * @rx_ring: ring to free buffers from
2103 **/
2104
2105 static void
2106 e1000_clean_rx_ring(struct e1000_adapter *adapter,
2107 struct e1000_rx_ring *rx_ring)
2108 {
2109 struct e1000_buffer *buffer_info;
2110 struct e1000_ps_page *ps_page;
2111 struct e1000_ps_page_dma *ps_page_dma;
2112 struct pci_dev *pdev = adapter->pdev;
2113 unsigned long size;
2114 unsigned int i, j;
2115
2116 /* Free all the Rx ring sk_buffs */
2117 for (i = 0; i < rx_ring->count; i++) {
2118 buffer_info = &rx_ring->buffer_info[i];
2119 if (buffer_info->skb) {
2120 pci_unmap_single(pdev,
2121 buffer_info->dma,
2122 buffer_info->length,
2123 PCI_DMA_FROMDEVICE);
2124
2125 dev_kfree_skb(buffer_info->skb);
2126 buffer_info->skb = NULL;
2127 }
2128 ps_page = &rx_ring->ps_page[i];
2129 ps_page_dma = &rx_ring->ps_page_dma[i];
2130 for (j = 0; j < adapter->rx_ps_pages; j++) {
2131 if (!ps_page->ps_page[j]) break;
2132 pci_unmap_page(pdev,
2133 ps_page_dma->ps_page_dma[j],
2134 PAGE_SIZE, PCI_DMA_FROMDEVICE);
2135 ps_page_dma->ps_page_dma[j] = 0;
2136 put_page(ps_page->ps_page[j]);
2137 ps_page->ps_page[j] = NULL;
2138 }
2139 }
2140
2141 size = sizeof(struct e1000_buffer) * rx_ring->count;
2142 memset(rx_ring->buffer_info, 0, size);
2143 size = sizeof(struct e1000_ps_page) * rx_ring->count;
2144 memset(rx_ring->ps_page, 0, size);
2145 size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
2146 memset(rx_ring->ps_page_dma, 0, size);
2147
2148 /* Zero out the descriptor ring */
2149
2150 memset(rx_ring->desc, 0, rx_ring->size);
2151
2152 rx_ring->next_to_clean = 0;
2153 rx_ring->next_to_use = 0;
2154
2155 writel(0, adapter->hw.hw_addr + rx_ring->rdh);
2156 writel(0, adapter->hw.hw_addr + rx_ring->rdt);
2157 }
2158
2159 /**
2160 * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
2161 * @adapter: board private structure
2162 **/
2163
2164 static void
2165 e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
2166 {
2167 int i;
2168
2169 for (i = 0; i < adapter->num_rx_queues; i++)
2170 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
2171 }
2172
2173 /* The 82542 2.0 (revision 2) needs to have the receive unit in reset
2174 * and memory write and invalidate disabled for certain operations
2175 */
2176 static void
2177 e1000_enter_82542_rst(struct e1000_adapter *adapter)
2178 {
2179 struct net_device *netdev = adapter->netdev;
2180 uint32_t rctl;
2181
2182 e1000_pci_clear_mwi(&adapter->hw);
2183
2184 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2185 rctl |= E1000_RCTL_RST;
2186 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2187 E1000_WRITE_FLUSH(&adapter->hw);
2188 mdelay(5);
2189
2190 if (netif_running(netdev))
2191 e1000_clean_all_rx_rings(adapter);
2192 }
2193
2194 static void
2195 e1000_leave_82542_rst(struct e1000_adapter *adapter)
2196 {
2197 struct net_device *netdev = adapter->netdev;
2198 uint32_t rctl;
2199
2200 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2201 rctl &= ~E1000_RCTL_RST;
2202 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2203 E1000_WRITE_FLUSH(&adapter->hw);
2204 mdelay(5);
2205
2206 if (adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
2207 e1000_pci_set_mwi(&adapter->hw);
2208
2209 if (netif_running(netdev)) {
2210 /* No need to loop, because 82542 supports only 1 queue */
2211 struct e1000_rx_ring *ring = &adapter->rx_ring[0];
2212 e1000_configure_rx(adapter);
2213 adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
2214 }
2215 }
2216
2217 /**
2218 * e1000_set_mac - Change the Ethernet Address of the NIC
2219 * @netdev: network interface device structure
2220 * @p: pointer to an address structure
2221 *
2222 * Returns 0 on success, negative on failure
2223 **/
2224
2225 static int
2226 e1000_set_mac(struct net_device *netdev, void *p)
2227 {
2228 struct e1000_adapter *adapter = netdev_priv(netdev);
2229 struct sockaddr *addr = p;
2230
2231 if (!is_valid_ether_addr(addr->sa_data))
2232 return -EADDRNOTAVAIL;
2233
2234 /* 82542 2.0 needs to be in reset to write receive address registers */
2235
2236 if (adapter->hw.mac_type == e1000_82542_rev2_0)
2237 e1000_enter_82542_rst(adapter);
2238
2239 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2240 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
2241
2242 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2243
2244 /* With 82571 controllers, LAA may be overwritten (with the default)
2245 * due to controller reset from the other port. */
2246 if (adapter->hw.mac_type == e1000_82571) {
2247 /* activate the work around */
2248 adapter->hw.laa_is_present = 1;
2249
2250 /* Hold a copy of the LAA in RAR[14] This is done so that
2251 * between the time RAR[0] gets clobbered and the time it
2252 * gets fixed (in e1000_watchdog), the actual LAA is in one
2253 * of the RARs and no incoming packets directed to this port
2254 * are dropped. Eventaully the LAA will be in RAR[0] and
2255 * RAR[14] */
2256 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
2257 E1000_RAR_ENTRIES - 1);
2258 }
2259
2260 if (adapter->hw.mac_type == e1000_82542_rev2_0)
2261 e1000_leave_82542_rst(adapter);
2262
2263 return 0;
2264 }
2265
2266 /**
2267 * e1000_set_multi - Multicast and Promiscuous mode set
2268 * @netdev: network interface device structure
2269 *
2270 * The set_multi entry point is called whenever the multicast address
2271 * list or the network interface flags are updated. This routine is
2272 * responsible for configuring the hardware for proper multicast,
2273 * promiscuous mode, and all-multi behavior.
2274 **/
2275
2276 static void
2277 e1000_set_multi(struct net_device *netdev)
2278 {
2279 struct e1000_adapter *adapter = netdev_priv(netdev);
2280 struct e1000_hw *hw = &adapter->hw;
2281 struct dev_mc_list *mc_ptr;
2282 uint32_t rctl;
2283 uint32_t hash_value;
2284 int i, rar_entries = E1000_RAR_ENTRIES;
2285 int mta_reg_count = (hw->mac_type == e1000_ich8lan) ?
2286 E1000_NUM_MTA_REGISTERS_ICH8LAN :
2287 E1000_NUM_MTA_REGISTERS;
2288
2289 if (adapter->hw.mac_type == e1000_ich8lan)
2290 rar_entries = E1000_RAR_ENTRIES_ICH8LAN;
2291
2292 /* reserve RAR[14] for LAA over-write work-around */
2293 if (adapter->hw.mac_type == e1000_82571)
2294 rar_entries--;
2295
2296 /* Check for Promiscuous and All Multicast modes */
2297
2298 rctl = E1000_READ_REG(hw, RCTL);
2299
2300 if (netdev->flags & IFF_PROMISC) {
2301 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
2302 } else if (netdev->flags & IFF_ALLMULTI) {
2303 rctl |= E1000_RCTL_MPE;
2304 rctl &= ~E1000_RCTL_UPE;
2305 } else {
2306 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2307 }
2308
2309 E1000_WRITE_REG(hw, RCTL, rctl);
2310
2311 /* 82542 2.0 needs to be in reset to write receive address registers */
2312
2313 if (hw->mac_type == e1000_82542_rev2_0)
2314 e1000_enter_82542_rst(adapter);
2315
2316 /* load the first 14 multicast address into the exact filters 1-14
2317 * RAR 0 is used for the station MAC adddress
2318 * if there are not 14 addresses, go ahead and clear the filters
2319 * -- with 82571 controllers only 0-13 entries are filled here
2320 */
2321 mc_ptr = netdev->mc_list;
2322
2323 for (i = 1; i < rar_entries; i++) {
2324 if (mc_ptr) {
2325 e1000_rar_set(hw, mc_ptr->dmi_addr, i);
2326 mc_ptr = mc_ptr->next;
2327 } else {
2328 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
2329 E1000_WRITE_FLUSH(hw);
2330 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
2331 E1000_WRITE_FLUSH(hw);
2332 }
2333 }
2334
2335 /* clear the old settings from the multicast hash table */
2336
2337 for (i = 0; i < mta_reg_count; i++) {
2338 E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
2339 E1000_WRITE_FLUSH(hw);
2340 }
2341
2342 /* load any remaining addresses into the hash table */
2343
2344 for (; mc_ptr; mc_ptr = mc_ptr->next) {
2345 hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr);
2346 e1000_mta_set(hw, hash_value);
2347 }
2348
2349 if (hw->mac_type == e1000_82542_rev2_0)
2350 e1000_leave_82542_rst(adapter);
2351 }
2352
2353 /* Need to wait a few seconds after link up to get diagnostic information from
2354 * the phy */
2355
2356 static void
2357 e1000_update_phy_info(unsigned long data)
2358 {
2359 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2360 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
2361 }
2362
2363 /**
2364 * e1000_82547_tx_fifo_stall - Timer Call-back
2365 * @data: pointer to adapter cast into an unsigned long
2366 **/
2367
2368 static void
2369 e1000_82547_tx_fifo_stall(unsigned long data)
2370 {
2371 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2372 struct net_device *netdev = adapter->netdev;
2373 uint32_t tctl;
2374
2375 if (atomic_read(&adapter->tx_fifo_stall)) {
2376 if ((E1000_READ_REG(&adapter->hw, TDT) ==
2377 E1000_READ_REG(&adapter->hw, TDH)) &&
2378 (E1000_READ_REG(&adapter->hw, TDFT) ==
2379 E1000_READ_REG(&adapter->hw, TDFH)) &&
2380 (E1000_READ_REG(&adapter->hw, TDFTS) ==
2381 E1000_READ_REG(&adapter->hw, TDFHS))) {
2382 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2383 E1000_WRITE_REG(&adapter->hw, TCTL,
2384 tctl & ~E1000_TCTL_EN);
2385 E1000_WRITE_REG(&adapter->hw, TDFT,
2386 adapter->tx_head_addr);
2387 E1000_WRITE_REG(&adapter->hw, TDFH,
2388 adapter->tx_head_addr);
2389 E1000_WRITE_REG(&adapter->hw, TDFTS,
2390 adapter->tx_head_addr);
2391 E1000_WRITE_REG(&adapter->hw, TDFHS,
2392 adapter->tx_head_addr);
2393 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
2394 E1000_WRITE_FLUSH(&adapter->hw);
2395
2396 adapter->tx_fifo_head = 0;
2397 atomic_set(&adapter->tx_fifo_stall, 0);
2398 netif_wake_queue(netdev);
2399 } else {
2400 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
2401 }
2402 }
2403 }
2404
2405 /**
2406 * e1000_watchdog - Timer Call-back
2407 * @data: pointer to adapter cast into an unsigned long
2408 **/
2409 static void
2410 e1000_watchdog(unsigned long data)
2411 {
2412 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2413 struct net_device *netdev = adapter->netdev;
2414 struct e1000_tx_ring *txdr = adapter->tx_ring;
2415 uint32_t link, tctl;
2416 int32_t ret_val;
2417
2418 ret_val = e1000_check_for_link(&adapter->hw);
2419 if ((ret_val == E1000_ERR_PHY) &&
2420 (adapter->hw.phy_type == e1000_phy_igp_3) &&
2421 (E1000_READ_REG(&adapter->hw, CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
2422 /* See e1000_kumeran_lock_loss_workaround() */
2423 DPRINTK(LINK, INFO,
2424 "Gigabit has been disabled, downgrading speed\n");
2425 }
2426
2427 if (adapter->hw.mac_type == e1000_82573) {
2428 e1000_enable_tx_pkt_filtering(&adapter->hw);
2429 if (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
2430 e1000_update_mng_vlan(adapter);
2431 }
2432
2433 if ((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
2434 !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
2435 link = !adapter->hw.serdes_link_down;
2436 else
2437 link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
2438
2439 if (link) {
2440 if (!netif_carrier_ok(netdev)) {
2441 boolean_t txb2b = 1;
2442 e1000_get_speed_and_duplex(&adapter->hw,
2443 &adapter->link_speed,
2444 &adapter->link_duplex);
2445
2446 DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s\n",
2447 adapter->link_speed,
2448 adapter->link_duplex == FULL_DUPLEX ?
2449 "Full Duplex" : "Half Duplex");
2450
2451 /* tweak tx_queue_len according to speed/duplex
2452 * and adjust the timeout factor */
2453 netdev->tx_queue_len = adapter->tx_queue_len;
2454 adapter->tx_timeout_factor = 1;
2455 switch (adapter->link_speed) {
2456 case SPEED_10:
2457 txb2b = 0;
2458 netdev->tx_queue_len = 10;
2459 adapter->tx_timeout_factor = 8;
2460 break;
2461 case SPEED_100:
2462 txb2b = 0;
2463 netdev->tx_queue_len = 100;
2464 /* maybe add some timeout factor ? */
2465 break;
2466 }
2467
2468 if ((adapter->hw.mac_type == e1000_82571 ||
2469 adapter->hw.mac_type == e1000_82572) &&
2470 txb2b == 0) {
2471 uint32_t tarc0;
2472 tarc0 = E1000_READ_REG(&adapter->hw, TARC0);
2473 tarc0 &= ~(1 << 21);
2474 E1000_WRITE_REG(&adapter->hw, TARC0, tarc0);
2475 }
2476
2477 #ifdef NETIF_F_TSO
2478 /* disable TSO for pcie and 10/100 speeds, to avoid
2479 * some hardware issues */
2480 if (!adapter->tso_force &&
2481 adapter->hw.bus_type == e1000_bus_type_pci_express){
2482 switch (adapter->link_speed) {
2483 case SPEED_10:
2484 case SPEED_100:
2485 DPRINTK(PROBE,INFO,
2486 "10/100 speed: disabling TSO\n");
2487 netdev->features &= ~NETIF_F_TSO;
2488 #ifdef NETIF_F_TSO6
2489 netdev->features &= ~NETIF_F_TSO6;
2490 #endif
2491 break;
2492 case SPEED_1000:
2493 netdev->features |= NETIF_F_TSO;
2494 #ifdef NETIF_F_TSO6
2495 netdev->features |= NETIF_F_TSO6;
2496 #endif
2497 break;
2498 default:
2499 /* oops */
2500 break;
2501 }
2502 }
2503 #endif
2504
2505 /* enable transmits in the hardware, need to do this
2506 * after setting TARC0 */
2507 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2508 tctl |= E1000_TCTL_EN;
2509 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
2510
2511 netif_carrier_on(netdev);
2512 netif_wake_queue(netdev);
2513 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
2514 adapter->smartspeed = 0;
2515 }
2516 } else {
2517 if (netif_carrier_ok(netdev)) {
2518 adapter->link_speed = 0;
2519 adapter->link_duplex = 0;
2520 DPRINTK(LINK, INFO, "NIC Link is Down\n");
2521 netif_carrier_off(netdev);
2522 netif_stop_queue(netdev);
2523 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
2524
2525 /* 80003ES2LAN workaround--
2526 * For packet buffer work-around on link down event;
2527 * disable receives in the ISR and
2528 * reset device here in the watchdog
2529 */
2530 if (adapter->hw.mac_type == e1000_80003es2lan)
2531 /* reset device */
2532 schedule_work(&adapter->reset_task);
2533 }
2534
2535 e1000_smartspeed(adapter);
2536 }
2537
2538 e1000_update_stats(adapter);
2539
2540 adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
2541 adapter->tpt_old = adapter->stats.tpt;
2542 adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
2543 adapter->colc_old = adapter->stats.colc;
2544
2545 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2546 adapter->gorcl_old = adapter->stats.gorcl;
2547 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2548 adapter->gotcl_old = adapter->stats.gotcl;
2549
2550 e1000_update_adaptive(&adapter->hw);
2551
2552 if (!netif_carrier_ok(netdev)) {
2553 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
2554 /* We've lost link, so the controller stops DMA,
2555 * but we've got queued Tx work that's never going
2556 * to get done, so reset controller to flush Tx.
2557 * (Do the reset outside of interrupt context). */
2558 adapter->tx_timeout_count++;
2559 schedule_work(&adapter->reset_task);
2560 }
2561 }
2562
2563 /* Dynamic mode for Interrupt Throttle Rate (ITR) */
2564 if (adapter->hw.mac_type >= e1000_82540 && adapter->itr == 1) {
2565 /* Symmetric Tx/Rx gets a reduced ITR=2000; Total
2566 * asymmetrical Tx or Rx gets ITR=8000; everyone
2567 * else is between 2000-8000. */
2568 uint32_t goc = (adapter->gotcl + adapter->gorcl) / 10000;
2569 uint32_t dif = (adapter->gotcl > adapter->gorcl ?
2570 adapter->gotcl - adapter->gorcl :
2571 adapter->gorcl - adapter->gotcl) / 10000;
2572 uint32_t itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
2573 E1000_WRITE_REG(&adapter->hw, ITR, 1000000000 / (itr * 256));
2574 }
2575
2576 /* Cause software interrupt to ensure rx ring is cleaned */
2577 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
2578
2579 /* Force detection of hung controller every watchdog period */
2580 adapter->detect_tx_hung = TRUE;
2581
2582 /* With 82571 controllers, LAA may be overwritten due to controller
2583 * reset from the other port. Set the appropriate LAA in RAR[0] */
2584 if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
2585 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2586
2587 /* Reset the timer */
2588 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
2589 }
2590
2591 #define E1000_TX_FLAGS_CSUM 0x00000001
2592 #define E1000_TX_FLAGS_VLAN 0x00000002
2593 #define E1000_TX_FLAGS_TSO 0x00000004
2594 #define E1000_TX_FLAGS_IPV4 0x00000008
2595 #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
2596 #define E1000_TX_FLAGS_VLAN_SHIFT 16
2597
2598 static int
2599 e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2600 struct sk_buff *skb)
2601 {
2602 #ifdef NETIF_F_TSO
2603 struct e1000_context_desc *context_desc;
2604 struct e1000_buffer *buffer_info;
2605 unsigned int i;
2606 uint32_t cmd_length = 0;
2607 uint16_t ipcse = 0, tucse, mss;
2608 uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
2609 int err;
2610
2611 if (skb_is_gso(skb)) {
2612 if (skb_header_cloned(skb)) {
2613 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2614 if (err)
2615 return err;
2616 }
2617
2618 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
2619 mss = skb_shinfo(skb)->gso_size;
2620 if (skb->protocol == htons(ETH_P_IP)) {
2621 skb->nh.iph->tot_len = 0;
2622 skb->nh.iph->check = 0;
2623 skb->h.th->check =
2624 ~csum_tcpudp_magic(skb->nh.iph->saddr,
2625 skb->nh.iph->daddr,
2626 0,
2627 IPPROTO_TCP,
2628 0);
2629 cmd_length = E1000_TXD_CMD_IP;
2630 ipcse = skb->h.raw - skb->data - 1;
2631 #ifdef NETIF_F_TSO6
2632 } else if (skb->protocol == htons(ETH_P_IPV6)) {
2633 skb->nh.ipv6h->payload_len = 0;
2634 skb->h.th->check =
2635 ~csum_ipv6_magic(&skb->nh.ipv6h->saddr,
2636 &skb->nh.ipv6h->daddr,
2637 0,
2638 IPPROTO_TCP,
2639 0);
2640 ipcse = 0;
2641 #endif
2642 }
2643 ipcss = skb->nh.raw - skb->data;
2644 ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
2645 tucss = skb->h.raw - skb->data;
2646 tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
2647 tucse = 0;
2648
2649 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
2650 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
2651
2652 i = tx_ring->next_to_use;
2653 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
2654 buffer_info = &tx_ring->buffer_info[i];
2655
2656 context_desc->lower_setup.ip_fields.ipcss = ipcss;
2657 context_desc->lower_setup.ip_fields.ipcso = ipcso;
2658 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
2659 context_desc->upper_setup.tcp_fields.tucss = tucss;
2660 context_desc->upper_setup.tcp_fields.tucso = tucso;
2661 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
2662 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
2663 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
2664 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
2665
2666 buffer_info->time_stamp = jiffies;
2667 buffer_info->next_to_watch = i;
2668
2669 if (++i == tx_ring->count) i = 0;
2670 tx_ring->next_to_use = i;
2671
2672 return TRUE;
2673 }
2674 #endif
2675
2676 return FALSE;
2677 }
2678
2679 static boolean_t
2680 e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2681 struct sk_buff *skb)
2682 {
2683 struct e1000_context_desc *context_desc;
2684 struct e1000_buffer *buffer_info;
2685 unsigned int i;
2686 uint8_t css;
2687
2688 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
2689 css = skb->h.raw - skb->data;
2690
2691 i = tx_ring->next_to_use;
2692 buffer_info = &tx_ring->buffer_info[i];
2693 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
2694
2695 context_desc->upper_setup.tcp_fields.tucss = css;
2696 context_desc->upper_setup.tcp_fields.tucso = css + skb->csum;
2697 context_desc->upper_setup.tcp_fields.tucse = 0;
2698 context_desc->tcp_seg_setup.data = 0;
2699 context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
2700
2701 buffer_info->time_stamp = jiffies;
2702 buffer_info->next_to_watch = i;
2703
2704 if (unlikely(++i == tx_ring->count)) i = 0;
2705 tx_ring->next_to_use = i;
2706
2707 return TRUE;
2708 }
2709
2710 return FALSE;
2711 }
2712
2713 #define E1000_MAX_TXD_PWR 12
2714 #define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
2715
2716 static int
2717 e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2718 struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
2719 unsigned int nr_frags, unsigned int mss)
2720 {
2721 struct e1000_buffer *buffer_info;
2722 unsigned int len = skb->len;
2723 unsigned int offset = 0, size, count = 0, i;
2724 unsigned int f;
2725 len -= skb->data_len;
2726
2727 i = tx_ring->next_to_use;
2728
2729 while (len) {
2730 buffer_info = &tx_ring->buffer_info[i];
2731 size = min(len, max_per_txd);
2732 #ifdef NETIF_F_TSO
2733 /* Workaround for Controller erratum --
2734 * descriptor for non-tso packet in a linear SKB that follows a
2735 * tso gets written back prematurely before the data is fully
2736 * DMA'd to the controller */
2737 if (!skb->data_len && tx_ring->last_tx_tso &&
2738 !skb_is_gso(skb)) {
2739 tx_ring->last_tx_tso = 0;
2740 size -= 4;
2741 }
2742
2743 /* Workaround for premature desc write-backs
2744 * in TSO mode. Append 4-byte sentinel desc */
2745 if (unlikely(mss && !nr_frags && size == len && size > 8))
2746 size -= 4;
2747 #endif
2748 /* work-around for errata 10 and it applies
2749 * to all controllers in PCI-X mode
2750 * The fix is to make sure that the first descriptor of a
2751 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
2752 */
2753 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
2754 (size > 2015) && count == 0))
2755 size = 2015;
2756
2757 /* Workaround for potential 82544 hang in PCI-X. Avoid
2758 * terminating buffers within evenly-aligned dwords. */
2759 if (unlikely(adapter->pcix_82544 &&
2760 !((unsigned long)(skb->data + offset + size - 1) & 4) &&
2761 size > 4))
2762 size -= 4;
2763
2764 buffer_info->length = size;
2765 buffer_info->dma =
2766 pci_map_single(adapter->pdev,
2767 skb->data + offset,
2768 size,
2769 PCI_DMA_TODEVICE);
2770 buffer_info->time_stamp = jiffies;
2771 buffer_info->next_to_watch = i;
2772
2773 len -= size;
2774 offset += size;
2775 count++;
2776 if (unlikely(++i == tx_ring->count)) i = 0;
2777 }
2778
2779 for (f = 0; f < nr_frags; f++) {
2780 struct skb_frag_struct *frag;
2781
2782 frag = &skb_shinfo(skb)->frags[f];
2783 len = frag->size;
2784 offset = frag->page_offset;
2785
2786 while (len) {
2787 buffer_info = &tx_ring->buffer_info[i];
2788 size = min(len, max_per_txd);
2789 #ifdef NETIF_F_TSO
2790 /* Workaround for premature desc write-backs
2791 * in TSO mode. Append 4-byte sentinel desc */
2792 if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
2793 size -= 4;
2794 #endif
2795 /* Workaround for potential 82544 hang in PCI-X.
2796 * Avoid terminating buffers within evenly-aligned
2797 * dwords. */
2798 if (unlikely(adapter->pcix_82544 &&
2799 !((unsigned long)(frag->page+offset+size-1) & 4) &&
2800 size > 4))
2801 size -= 4;
2802
2803 buffer_info->length = size;
2804 buffer_info->dma =
2805 pci_map_page(adapter->pdev,
2806 frag->page,
2807 offset,
2808 size,
2809 PCI_DMA_TODEVICE);
2810 buffer_info->time_stamp = jiffies;
2811 buffer_info->next_to_watch = i;
2812
2813 len -= size;
2814 offset += size;
2815 count++;
2816 if (unlikely(++i == tx_ring->count)) i = 0;
2817 }
2818 }
2819
2820 i = (i == 0) ? tx_ring->count - 1 : i - 1;
2821 tx_ring->buffer_info[i].skb = skb;
2822 tx_ring->buffer_info[first].next_to_watch = i;
2823
2824 return count;
2825 }
2826
2827 static void
2828 e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2829 int tx_flags, int count)
2830 {
2831 struct e1000_tx_desc *tx_desc = NULL;
2832 struct e1000_buffer *buffer_info;
2833 uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
2834 unsigned int i;
2835
2836 if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
2837 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
2838 E1000_TXD_CMD_TSE;
2839 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2840
2841 if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
2842 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
2843 }
2844
2845 if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
2846 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
2847 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2848 }
2849
2850 if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
2851 txd_lower |= E1000_TXD_CMD_VLE;
2852 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
2853 }
2854
2855 i = tx_ring->next_to_use;
2856
2857 while (count--) {
2858 buffer_info = &tx_ring->buffer_info[i];
2859 tx_desc = E1000_TX_DESC(*tx_ring, i);
2860 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
2861 tx_desc->lower.data =
2862 cpu_to_le32(txd_lower | buffer_info->length);
2863 tx_desc->upper.data = cpu_to_le32(txd_upper);
2864 if (unlikely(++i == tx_ring->count)) i = 0;
2865 }
2866
2867 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
2868
2869 /* Force memory writes to complete before letting h/w
2870 * know there are new descriptors to fetch. (Only
2871 * applicable for weak-ordered memory model archs,
2872 * such as IA-64). */
2873 wmb();
2874
2875 tx_ring->next_to_use = i;
2876 writel(i, adapter->hw.hw_addr + tx_ring->tdt);
2877 /* we need this if more than one processor can write to our tail
2878 * at a time, it syncronizes IO on IA64/Altix systems */
2879 mmiowb();
2880 }
2881
2882 /**
2883 * 82547 workaround to avoid controller hang in half-duplex environment.
2884 * The workaround is to avoid queuing a large packet that would span
2885 * the internal Tx FIFO ring boundary by notifying the stack to resend
2886 * the packet at a later time. This gives the Tx FIFO an opportunity to
2887 * flush all packets. When that occurs, we reset the Tx FIFO pointers
2888 * to the beginning of the Tx FIFO.
2889 **/
2890
2891 #define E1000_FIFO_HDR 0x10
2892 #define E1000_82547_PAD_LEN 0x3E0
2893
2894 static int
2895 e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
2896 {
2897 uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
2898 uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
2899
2900 E1000_ROUNDUP(skb_fifo_len, E1000_FIFO_HDR);
2901
2902 if (adapter->link_duplex != HALF_DUPLEX)
2903 goto no_fifo_stall_required;
2904
2905 if (atomic_read(&adapter->tx_fifo_stall))
2906 return 1;
2907
2908 if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
2909 atomic_set(&adapter->tx_fifo_stall, 1);
2910 return 1;
2911 }
2912
2913 no_fifo_stall_required:
2914 adapter->tx_fifo_head += skb_fifo_len;
2915 if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
2916 adapter->tx_fifo_head -= adapter->tx_fifo_size;
2917 return 0;
2918 }
2919
2920 #define MINIMUM_DHCP_PACKET_SIZE 282
2921 static int
2922 e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
2923 {
2924 struct e1000_hw *hw = &adapter->hw;
2925 uint16_t length, offset;
2926 if (vlan_tx_tag_present(skb)) {
2927 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
2928 ( adapter->hw.mng_cookie.status &
2929 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
2930 return 0;
2931 }
2932 if (skb->len > MINIMUM_DHCP_PACKET_SIZE) {
2933 struct ethhdr *eth = (struct ethhdr *) skb->data;
2934 if ((htons(ETH_P_IP) == eth->h_proto)) {
2935 const struct iphdr *ip =
2936 (struct iphdr *)((uint8_t *)skb->data+14);
2937 if (IPPROTO_UDP == ip->protocol) {
2938 struct udphdr *udp =
2939 (struct udphdr *)((uint8_t *)ip +
2940 (ip->ihl << 2));
2941 if (ntohs(udp->dest) == 67) {
2942 offset = (uint8_t *)udp + 8 - skb->data;
2943 length = skb->len - offset;
2944
2945 return e1000_mng_write_dhcp_info(hw,
2946 (uint8_t *)udp + 8,
2947 length);
2948 }
2949 }
2950 }
2951 }
2952 return 0;
2953 }
2954
2955 static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
2956 {
2957 struct e1000_adapter *adapter = netdev_priv(netdev);
2958 struct e1000_tx_ring *tx_ring = adapter->tx_ring;
2959
2960 netif_stop_queue(netdev);
2961 /* Herbert's original patch had:
2962 * smp_mb__after_netif_stop_queue();
2963 * but since that doesn't exist yet, just open code it. */
2964 smp_mb();
2965
2966 /* We need to check again in a case another CPU has just
2967 * made room available. */
2968 if (likely(E1000_DESC_UNUSED(tx_ring) < size))
2969 return -EBUSY;
2970
2971 /* A reprieve! */
2972 netif_start_queue(netdev);
2973 return 0;
2974 }
2975
2976 static int e1000_maybe_stop_tx(struct net_device *netdev,
2977 struct e1000_tx_ring *tx_ring, int size)
2978 {
2979 if (likely(E1000_DESC_UNUSED(tx_ring) >= size))
2980 return 0;
2981 return __e1000_maybe_stop_tx(netdev, size);
2982 }
2983
2984 #define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
2985 static int
2986 e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
2987 {
2988 struct e1000_adapter *adapter = netdev_priv(netdev);
2989 struct e1000_tx_ring *tx_ring;
2990 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
2991 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
2992 unsigned int tx_flags = 0;
2993 unsigned int len = skb->len;
2994 unsigned long flags;
2995 unsigned int nr_frags = 0;
2996 unsigned int mss = 0;
2997 int count = 0;
2998 int tso;
2999 unsigned int f;
3000 len -= skb->data_len;
3001
3002 /* This goes back to the question of how to logically map a tx queue
3003 * to a flow. Right now, performance is impacted slightly negatively
3004 * if using multiple tx queues. If the stack breaks away from a
3005 * single qdisc implementation, we can look at this again. */
3006 tx_ring = adapter->tx_ring;
3007
3008 if (unlikely(skb->len <= 0)) {
3009 dev_kfree_skb_any(skb);
3010 return NETDEV_TX_OK;
3011 }
3012
3013 /* 82571 and newer doesn't need the workaround that limited descriptor
3014 * length to 4kB */
3015 if (adapter->hw.mac_type >= e1000_82571)
3016 max_per_txd = 8192;
3017
3018 #ifdef NETIF_F_TSO
3019 mss = skb_shinfo(skb)->gso_size;
3020 /* The controller does a simple calculation to
3021 * make sure there is enough room in the FIFO before
3022 * initiating the DMA for each buffer. The calc is:
3023 * 4 = ceil(buffer len/mss). To make sure we don't
3024 * overrun the FIFO, adjust the max buffer len if mss
3025 * drops. */
3026 if (mss) {
3027 uint8_t hdr_len;
3028 max_per_txd = min(mss << 2, max_per_txd);
3029 max_txd_pwr = fls(max_per_txd) - 1;
3030
3031 /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
3032 * points to just header, pull a few bytes of payload from
3033 * frags into skb->data */
3034 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
3035 if (skb->data_len && (hdr_len == (skb->len - skb->data_len))) {
3036 switch (adapter->hw.mac_type) {
3037 unsigned int pull_size;
3038 case e1000_82571:
3039 case e1000_82572:
3040 case e1000_82573:
3041 case e1000_ich8lan:
3042 pull_size = min((unsigned int)4, skb->data_len);
3043 if (!__pskb_pull_tail(skb, pull_size)) {
3044 DPRINTK(DRV, ERR,
3045 "__pskb_pull_tail failed.\n");
3046 dev_kfree_skb_any(skb);
3047 return NETDEV_TX_OK;
3048 }
3049 len = skb->len - skb->data_len;
3050 break;
3051 default:
3052 /* do nothing */
3053 break;
3054 }
3055 }
3056 }
3057
3058 /* reserve a descriptor for the offload context */
3059 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
3060 count++;
3061 count++;
3062 #else
3063 if (skb->ip_summed == CHECKSUM_PARTIAL)
3064 count++;
3065 #endif
3066
3067 #ifdef NETIF_F_TSO
3068 /* Controller Erratum workaround */
3069 if (!skb->data_len && tx_ring->last_tx_tso && !skb_is_gso(skb))
3070 count++;
3071 #endif
3072
3073 count += TXD_USE_COUNT(len, max_txd_pwr);
3074
3075 if (adapter->pcix_82544)
3076 count++;
3077
3078 /* work-around for errata 10 and it applies to all controllers
3079 * in PCI-X mode, so add one more descriptor to the count
3080 */
3081 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
3082 (len > 2015)))
3083 count++;
3084
3085 nr_frags = skb_shinfo(skb)->nr_frags;
3086 for (f = 0; f < nr_frags; f++)
3087 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
3088 max_txd_pwr);
3089 if (adapter->pcix_82544)
3090 count += nr_frags;
3091
3092
3093 if (adapter->hw.tx_pkt_filtering &&
3094 (adapter->hw.mac_type == e1000_82573))
3095 e1000_transfer_dhcp_info(adapter, skb);
3096
3097 local_irq_save(flags);
3098 if (!spin_trylock(&tx_ring->tx_lock)) {
3099 /* Collision - tell upper layer to requeue */
3100 local_irq_restore(flags);
3101 return NETDEV_TX_LOCKED;
3102 }
3103
3104 /* need: count + 2 desc gap to keep tail from touching
3105 * head, otherwise try next time */
3106 if (unlikely(e1000_maybe_stop_tx(netdev, tx_ring, count + 2))) {
3107 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3108 return NETDEV_TX_BUSY;
3109 }
3110
3111 if (unlikely(adapter->hw.mac_type == e1000_82547)) {
3112 if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
3113 netif_stop_queue(netdev);
3114 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
3115 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3116 return NETDEV_TX_BUSY;
3117 }
3118 }
3119
3120 if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
3121 tx_flags |= E1000_TX_FLAGS_VLAN;
3122 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
3123 }
3124
3125 first = tx_ring->next_to_use;
3126
3127 tso = e1000_tso(adapter, tx_ring, skb);
3128 if (tso < 0) {
3129 dev_kfree_skb_any(skb);
3130 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3131 return NETDEV_TX_OK;
3132 }
3133
3134 if (likely(tso)) {
3135 tx_ring->last_tx_tso = 1;
3136 tx_flags |= E1000_TX_FLAGS_TSO;
3137 } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
3138 tx_flags |= E1000_TX_FLAGS_CSUM;
3139
3140 /* Old method was to assume IPv4 packet by default if TSO was enabled.
3141 * 82571 hardware supports TSO capabilities for IPv6 as well...
3142 * no longer assume, we must. */
3143 if (likely(skb->protocol == htons(ETH_P_IP)))
3144 tx_flags |= E1000_TX_FLAGS_IPV4;
3145
3146 e1000_tx_queue(adapter, tx_ring, tx_flags,
3147 e1000_tx_map(adapter, tx_ring, skb, first,
3148 max_per_txd, nr_frags, mss));
3149
3150 netdev->trans_start = jiffies;
3151
3152 /* Make sure there is space in the ring for the next send. */
3153 e1000_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 2);
3154
3155 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3156 return NETDEV_TX_OK;
3157 }
3158
3159 /**
3160 * e1000_tx_timeout - Respond to a Tx Hang
3161 * @netdev: network interface device structure
3162 **/
3163
3164 static void
3165 e1000_tx_timeout(struct net_device *netdev)
3166 {
3167 struct e1000_adapter *adapter = netdev_priv(netdev);
3168
3169 /* Do the reset outside of interrupt context */
3170 adapter->tx_timeout_count++;
3171 schedule_work(&adapter->reset_task);
3172 }
3173
3174 static void
3175 e1000_reset_task(struct net_device *netdev)
3176 {
3177 struct e1000_adapter *adapter = netdev_priv(netdev);
3178
3179 e1000_reinit_locked(adapter);
3180 }
3181
3182 /**
3183 * e1000_get_stats - Get System Network Statistics
3184 * @netdev: network interface device structure
3185 *
3186 * Returns the address of the device statistics structure.
3187 * The statistics are actually updated from the timer callback.
3188 **/
3189
3190 static struct net_device_stats *
3191 e1000_get_stats(struct net_device *netdev)
3192 {
3193 struct e1000_adapter *adapter = netdev_priv(netdev);
3194
3195 /* only return the current stats */
3196 return &adapter->net_stats;
3197 }
3198
3199 /**
3200 * e1000_change_mtu - Change the Maximum Transfer Unit
3201 * @netdev: network interface device structure
3202 * @new_mtu: new value for maximum frame size
3203 *
3204 * Returns 0 on success, negative on failure
3205 **/
3206
3207 static int
3208 e1000_change_mtu(struct net_device *netdev, int new_mtu)
3209 {
3210 struct e1000_adapter *adapter = netdev_priv(netdev);
3211 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
3212 uint16_t eeprom_data = 0;
3213
3214 if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
3215 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
3216 DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
3217 return -EINVAL;
3218 }
3219
3220 /* Adapter-specific max frame size limits. */
3221 switch (adapter->hw.mac_type) {
3222 case e1000_undefined ... e1000_82542_rev2_1:
3223 case e1000_ich8lan:
3224 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3225 DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
3226 return -EINVAL;
3227 }
3228 break;
3229 case e1000_82573:
3230 /* Jumbo Frames not supported if:
3231 * - this is not an 82573L device
3232 * - ASPM is enabled in any way (0x1A bits 3:2) */
3233 e1000_read_eeprom(&adapter->hw, EEPROM_INIT_3GIO_3, 1,
3234 &eeprom_data);
3235 if ((adapter->hw.device_id != E1000_DEV_ID_82573L) ||
3236 (eeprom_data & EEPROM_WORD1A_ASPM_MASK)) {
3237 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3238 DPRINTK(PROBE, ERR,
3239 "Jumbo Frames not supported.\n");
3240 return -EINVAL;
3241 }
3242 break;
3243 }
3244 /* ERT will be enabled later to enable wire speed receives */
3245
3246 /* fall through to get support */
3247 case e1000_82571:
3248 case e1000_82572:
3249 case e1000_80003es2lan:
3250 #define MAX_STD_JUMBO_FRAME_SIZE 9234
3251 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
3252 DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
3253 return -EINVAL;
3254 }
3255 break;
3256 default:
3257 /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
3258 break;
3259 }
3260
3261 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
3262 * means we reserve 2 more, this pushes us to allocate from the next
3263 * larger slab size
3264 * i.e. RXBUFFER_2048 --> size-4096 slab */
3265
3266 if (max_frame <= E1000_RXBUFFER_256)
3267 adapter->rx_buffer_len = E1000_RXBUFFER_256;
3268 else if (max_frame <= E1000_RXBUFFER_512)
3269 adapter->rx_buffer_len = E1000_RXBUFFER_512;
3270 else if (max_frame <= E1000_RXBUFFER_1024)
3271 adapter->rx_buffer_len = E1000_RXBUFFER_1024;
3272 else if (max_frame <= E1000_RXBUFFER_2048)
3273 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
3274 else if (max_frame <= E1000_RXBUFFER_4096)
3275 adapter->rx_buffer_len = E1000_RXBUFFER_4096;
3276 else if (max_frame <= E1000_RXBUFFER_8192)
3277 adapter->rx_buffer_len = E1000_RXBUFFER_8192;
3278 else if (max_frame <= E1000_RXBUFFER_16384)
3279 adapter->rx_buffer_len = E1000_RXBUFFER_16384;
3280
3281 /* adjust allocation if LPE protects us, and we aren't using SBP */
3282 if (!adapter->hw.tbi_compatibility_on &&
3283 ((max_frame == MAXIMUM_ETHERNET_FRAME_SIZE) ||
3284 (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
3285 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
3286
3287 netdev->mtu = new_mtu;
3288
3289 if (netif_running(netdev))
3290 e1000_reinit_locked(adapter);
3291
3292 adapter->hw.max_frame_size = max_frame;
3293
3294 return 0;
3295 }
3296
3297 /**
3298 * e1000_update_stats - Update the board statistics counters
3299 * @adapter: board private structure
3300 **/
3301
3302 void
3303 e1000_update_stats(struct e1000_adapter *adapter)
3304 {
3305 struct e1000_hw *hw = &adapter->hw;
3306 struct pci_dev *pdev = adapter->pdev;
3307 unsigned long flags;
3308 uint16_t phy_tmp;
3309
3310 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3311
3312 /*
3313 * Prevent stats update while adapter is being reset, or if the pci
3314 * connection is down.
3315 */
3316 if (adapter->link_speed == 0)
3317 return;
3318 if (pdev->error_state && pdev->error_state != pci_channel_io_normal)
3319 return;
3320
3321 spin_lock_irqsave(&adapter->stats_lock, flags);
3322
3323 /* these counters are modified from e1000_adjust_tbi_stats,
3324 * called from the interrupt context, so they must only
3325 * be written while holding adapter->stats_lock
3326 */
3327
3328 adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
3329 adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
3330 adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
3331 adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
3332 adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
3333 adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
3334 adapter->stats.roc += E1000_READ_REG(hw, ROC);
3335
3336 if (adapter->hw.mac_type != e1000_ich8lan) {
3337 adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
3338 adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
3339 adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
3340 adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
3341 adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
3342 adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
3343 }
3344
3345 adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
3346 adapter->stats.mpc += E1000_READ_REG(hw, MPC);
3347 adapter->stats.scc += E1000_READ_REG(hw, SCC);
3348 adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
3349 adapter->stats.mcc += E1000_READ_REG(hw, MCC);
3350 adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
3351 adapter->stats.dc += E1000_READ_REG(hw, DC);
3352 adapter->stats.sec += E1000_READ_REG(hw, SEC);
3353 adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
3354 adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
3355 adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
3356 adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
3357 adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
3358 adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
3359 adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
3360 adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
3361 adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
3362 adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
3363 adapter->stats.ruc += E1000_READ_REG(hw, RUC);
3364 adapter->stats.rfc += E1000_READ_REG(hw, RFC);
3365 adapter->stats.rjc += E1000_READ_REG(hw, RJC);
3366 adapter->stats.torl += E1000_READ_REG(hw, TORL);
3367 adapter->stats.torh += E1000_READ_REG(hw, TORH);
3368 adapter->stats.totl += E1000_READ_REG(hw, TOTL);
3369 adapter->stats.toth += E1000_READ_REG(hw, TOTH);
3370 adapter->stats.tpr += E1000_READ_REG(hw, TPR);
3371
3372 if (adapter->hw.mac_type != e1000_ich8lan) {
3373 adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
3374 adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
3375 adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
3376 adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
3377 adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
3378 adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
3379 }
3380
3381 adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
3382 adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
3383
3384 /* used for adaptive IFS */
3385
3386 hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
3387 adapter->stats.tpt += hw->tx_packet_delta;
3388 hw->collision_delta = E1000_READ_REG(hw, COLC);
3389 adapter->stats.colc += hw->collision_delta;
3390
3391 if (hw->mac_type >= e1000_82543) {
3392 adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
3393 adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
3394 adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
3395 adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
3396 adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
3397 adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
3398 }
3399 if (hw->mac_type > e1000_82547_rev_2) {
3400 adapter->stats.iac += E1000_READ_REG(hw, IAC);
3401 adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
3402
3403 if (adapter->hw.mac_type != e1000_ich8lan) {
3404 adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
3405 adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
3406 adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
3407 adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
3408 adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
3409 adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
3410 adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
3411 }
3412 }
3413
3414 /* Fill out the OS statistics structure */
3415 adapter->net_stats.rx_packets = adapter->stats.gprc;
3416 adapter->net_stats.tx_packets = adapter->stats.gptc;
3417 adapter->net_stats.rx_bytes = adapter->stats.gorcl;
3418 adapter->net_stats.tx_bytes = adapter->stats.gotcl;
3419 adapter->net_stats.multicast = adapter->stats.mprc;
3420 adapter->net_stats.collisions = adapter->stats.colc;
3421
3422 /* Rx Errors */
3423
3424 /* RLEC on some newer hardware can be incorrect so build
3425 * our own version based on RUC and ROC */
3426 adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3427 adapter->stats.crcerrs + adapter->stats.algnerrc +
3428 adapter->stats.ruc + adapter->stats.roc +
3429 adapter->stats.cexterr;
3430 adapter->stats.rlerrc = adapter->stats.ruc + adapter->stats.roc;
3431 adapter->net_stats.rx_length_errors = adapter->stats.rlerrc;
3432 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3433 adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
3434 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3435
3436 /* Tx Errors */
3437 adapter->stats.txerrc = adapter->stats.ecol + adapter->stats.latecol;
3438 adapter->net_stats.tx_errors = adapter->stats.txerrc;
3439 adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3440 adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3441 adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
3442
3443 /* Tx Dropped needs to be maintained elsewhere */
3444
3445 /* Phy Stats */
3446 if (hw->media_type == e1000_media_type_copper) {
3447 if ((adapter->link_speed == SPEED_1000) &&
3448 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
3449 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3450 adapter->phy_stats.idle_errors += phy_tmp;
3451 }
3452
3453 if ((hw->mac_type <= e1000_82546) &&
3454 (hw->phy_type == e1000_phy_m88) &&
3455 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
3456 adapter->phy_stats.receive_errors += phy_tmp;
3457 }
3458
3459 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3460 }
3461
3462 /**
3463 * e1000_intr - Interrupt Handler
3464 * @irq: interrupt number
3465 * @data: pointer to a network interface device structure
3466 **/
3467
3468 static irqreturn_t
3469 e1000_intr(int irq, void *data)
3470 {
3471 struct net_device *netdev = data;
3472 struct e1000_adapter *adapter = netdev_priv(netdev);
3473 struct e1000_hw *hw = &adapter->hw;
3474 uint32_t rctl, icr = E1000_READ_REG(hw, ICR);
3475 #ifndef CONFIG_E1000_NAPI
3476 int i;
3477 #else
3478 /* Interrupt Auto-Mask...upon reading ICR,
3479 * interrupts are masked. No need for the
3480 * IMC write, but it does mean we should
3481 * account for it ASAP. */
3482 if (likely(hw->mac_type >= e1000_82571))
3483 atomic_inc(&adapter->irq_sem);
3484 #endif
3485
3486 if (unlikely(!icr)) {
3487 #ifdef CONFIG_E1000_NAPI
3488 if (hw->mac_type >= e1000_82571)
3489 e1000_irq_enable(adapter);
3490 #endif
3491 return IRQ_NONE; /* Not our interrupt */
3492 }
3493
3494 if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
3495 hw->get_link_status = 1;
3496 /* 80003ES2LAN workaround--
3497 * For packet buffer work-around on link down event;
3498 * disable receives here in the ISR and
3499 * reset adapter in watchdog
3500 */
3501 if (netif_carrier_ok(netdev) &&
3502 (adapter->hw.mac_type == e1000_80003es2lan)) {
3503 /* disable receives */
3504 rctl = E1000_READ_REG(hw, RCTL);
3505 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
3506 }
3507 /* guard against interrupt when we're going down */
3508 if (!test_bit(__E1000_DOWN, &adapter->flags))
3509 mod_timer(&adapter->watchdog_timer, jiffies + 1);
3510 }
3511
3512 #ifdef CONFIG_E1000_NAPI
3513 if (unlikely(hw->mac_type < e1000_82571)) {
3514 atomic_inc(&adapter->irq_sem);
3515 E1000_WRITE_REG(hw, IMC, ~0);
3516 E1000_WRITE_FLUSH(hw);
3517 }
3518 if (likely(netif_rx_schedule_prep(netdev)))
3519 __netif_rx_schedule(netdev);
3520 else
3521 /* this really should not happen! if it does it is basically a
3522 * bug, but not a hard error, so enable ints and continue */
3523 e1000_irq_enable(adapter);
3524 #else
3525 /* Writing IMC and IMS is needed for 82547.
3526 * Due to Hub Link bus being occupied, an interrupt
3527 * de-assertion message is not able to be sent.
3528 * When an interrupt assertion message is generated later,
3529 * two messages are re-ordered and sent out.
3530 * That causes APIC to think 82547 is in de-assertion
3531 * state, while 82547 is in assertion state, resulting
3532 * in dead lock. Writing IMC forces 82547 into
3533 * de-assertion state.
3534 */
3535 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) {
3536 atomic_inc(&adapter->irq_sem);
3537 E1000_WRITE_REG(hw, IMC, ~0);
3538 }
3539
3540 for (i = 0; i < E1000_MAX_INTR; i++)
3541 if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
3542 !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
3543 break;
3544
3545 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
3546 e1000_irq_enable(adapter);
3547
3548 #endif
3549 return IRQ_HANDLED;
3550 }
3551
3552 #ifdef CONFIG_E1000_NAPI
3553 /**
3554 * e1000_clean - NAPI Rx polling callback
3555 * @adapter: board private structure
3556 **/
3557
3558 static int
3559 e1000_clean(struct net_device *poll_dev, int *budget)
3560 {
3561 struct e1000_adapter *adapter;
3562 int work_to_do = min(*budget, poll_dev->quota);
3563 int tx_cleaned = 0, work_done = 0;
3564
3565 /* Must NOT use netdev_priv macro here. */
3566 adapter = poll_dev->priv;
3567
3568 /* Keep link state information with original netdev */
3569 if (!netif_carrier_ok(poll_dev))
3570 goto quit_polling;
3571
3572 /* e1000_clean is called per-cpu. This lock protects
3573 * tx_ring[0] from being cleaned by multiple cpus
3574 * simultaneously. A failure obtaining the lock means
3575 * tx_ring[0] is currently being cleaned anyway. */
3576 if (spin_trylock(&adapter->tx_queue_lock)) {
3577 tx_cleaned = e1000_clean_tx_irq(adapter,
3578 &adapter->tx_ring[0]);
3579 spin_unlock(&adapter->tx_queue_lock);
3580 }
3581
3582 adapter->clean_rx(adapter, &adapter->rx_ring[0],
3583 &work_done, work_to_do);
3584
3585 *budget -= work_done;
3586 poll_dev->quota -= work_done;
3587
3588 /* If no Tx and not enough Rx work done, exit the polling mode */
3589 if ((!tx_cleaned && (work_done == 0)) ||
3590 !netif_running(poll_dev)) {
3591 quit_polling:
3592 netif_rx_complete(poll_dev);
3593 e1000_irq_enable(adapter);
3594 return 0;
3595 }
3596
3597 return 1;
3598 }
3599
3600 #endif
3601 /**
3602 * e1000_clean_tx_irq - Reclaim resources after transmit completes
3603 * @adapter: board private structure
3604 **/
3605
3606 static boolean_t
3607 e1000_clean_tx_irq(struct e1000_adapter *adapter,
3608 struct e1000_tx_ring *tx_ring)
3609 {
3610 struct net_device *netdev = adapter->netdev;
3611 struct e1000_tx_desc *tx_desc, *eop_desc;
3612 struct e1000_buffer *buffer_info;
3613 unsigned int i, eop;
3614 #ifdef CONFIG_E1000_NAPI
3615 unsigned int count = 0;
3616 #endif
3617 boolean_t cleaned = FALSE;
3618
3619 i = tx_ring->next_to_clean;
3620 eop = tx_ring->buffer_info[i].next_to_watch;
3621 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3622
3623 while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
3624 for (cleaned = FALSE; !cleaned; ) {
3625 tx_desc = E1000_TX_DESC(*tx_ring, i);
3626 buffer_info = &tx_ring->buffer_info[i];
3627 cleaned = (i == eop);
3628
3629 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
3630 tx_desc->upper.data = 0;
3631
3632 if (unlikely(++i == tx_ring->count)) i = 0;
3633 }
3634
3635 eop = tx_ring->buffer_info[i].next_to_watch;
3636 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3637 #ifdef CONFIG_E1000_NAPI
3638 #define E1000_TX_WEIGHT 64
3639 /* weight of a sort for tx, to avoid endless transmit cleanup */
3640 if (count++ == E1000_TX_WEIGHT) break;
3641 #endif
3642 }
3643
3644 tx_ring->next_to_clean = i;
3645
3646 #define TX_WAKE_THRESHOLD 32
3647 if (unlikely(cleaned && netif_carrier_ok(netdev) &&
3648 E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) {
3649 /* Make sure that anybody stopping the queue after this
3650 * sees the new next_to_clean.
3651 */
3652 smp_mb();
3653 if (netif_queue_stopped(netdev))
3654 netif_wake_queue(netdev);
3655 }
3656
3657 if (adapter->detect_tx_hung) {
3658 /* Detect a transmit hang in hardware, this serializes the
3659 * check with the clearing of time_stamp and movement of i */
3660 adapter->detect_tx_hung = FALSE;
3661 if (tx_ring->buffer_info[eop].dma &&
3662 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
3663 (adapter->tx_timeout_factor * HZ))
3664 && !(E1000_READ_REG(&adapter->hw, STATUS) &
3665 E1000_STATUS_TXOFF)) {
3666
3667 /* detected Tx unit hang */
3668 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
3669 " Tx Queue <%lu>\n"
3670 " TDH <%x>\n"
3671 " TDT <%x>\n"
3672 " next_to_use <%x>\n"
3673 " next_to_clean <%x>\n"
3674 "buffer_info[next_to_clean]\n"
3675 " time_stamp <%lx>\n"
3676 " next_to_watch <%x>\n"
3677 " jiffies <%lx>\n"
3678 " next_to_watch.status <%x>\n",
3679 (unsigned long)((tx_ring - adapter->tx_ring) /
3680 sizeof(struct e1000_tx_ring)),
3681 readl(adapter->hw.hw_addr + tx_ring->tdh),
3682 readl(adapter->hw.hw_addr + tx_ring->tdt),
3683 tx_ring->next_to_use,
3684 tx_ring->next_to_clean,
3685 tx_ring->buffer_info[eop].time_stamp,
3686 eop,
3687 jiffies,
3688 eop_desc->upper.fields.status);
3689 netif_stop_queue(netdev);
3690 }
3691 }
3692 return cleaned;
3693 }
3694
3695 /**
3696 * e1000_rx_checksum - Receive Checksum Offload for 82543
3697 * @adapter: board private structure
3698 * @status_err: receive descriptor status and error fields
3699 * @csum: receive descriptor csum field
3700 * @sk_buff: socket buffer with received data
3701 **/
3702
3703 static void
3704 e1000_rx_checksum(struct e1000_adapter *adapter,
3705 uint32_t status_err, uint32_t csum,
3706 struct sk_buff *skb)
3707 {
3708 uint16_t status = (uint16_t)status_err;
3709 uint8_t errors = (uint8_t)(status_err >> 24);
3710 skb->ip_summed = CHECKSUM_NONE;
3711
3712 /* 82543 or newer only */
3713 if (unlikely(adapter->hw.mac_type < e1000_82543)) return;
3714 /* Ignore Checksum bit is set */
3715 if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
3716 /* TCP/UDP checksum error bit is set */
3717 if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
3718 /* let the stack verify checksum errors */
3719 adapter->hw_csum_err++;
3720 return;
3721 }
3722 /* TCP/UDP Checksum has not been calculated */
3723 if (adapter->hw.mac_type <= e1000_82547_rev_2) {
3724 if (!(status & E1000_RXD_STAT_TCPCS))
3725 return;
3726 } else {
3727 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
3728 return;
3729 }
3730 /* It must be a TCP or UDP packet with a valid checksum */
3731 if (likely(status & E1000_RXD_STAT_TCPCS)) {
3732 /* TCP checksum is good */
3733 skb->ip_summed = CHECKSUM_UNNECESSARY;
3734 } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
3735 /* IP fragment with UDP payload */
3736 /* Hardware complements the payload checksum, so we undo it
3737 * and then put the value in host order for further stack use.
3738 */
3739 csum = ntohl(csum ^ 0xFFFF);
3740 skb->csum = csum;
3741 skb->ip_summed = CHECKSUM_COMPLETE;
3742 }
3743 adapter->hw_csum_good++;
3744 }
3745
3746 /**
3747 * e1000_clean_rx_irq - Send received data up the network stack; legacy
3748 * @adapter: board private structure
3749 **/
3750
3751 static boolean_t
3752 #ifdef CONFIG_E1000_NAPI
3753 e1000_clean_rx_irq(struct e1000_adapter *adapter,
3754 struct e1000_rx_ring *rx_ring,
3755 int *work_done, int work_to_do)
3756 #else
3757 e1000_clean_rx_irq(struct e1000_adapter *adapter,
3758 struct e1000_rx_ring *rx_ring)
3759 #endif
3760 {
3761 struct net_device *netdev = adapter->netdev;
3762 struct pci_dev *pdev = adapter->pdev;
3763 struct e1000_rx_desc *rx_desc, *next_rxd;
3764 struct e1000_buffer *buffer_info, *next_buffer;
3765 unsigned long flags;
3766 uint32_t length;
3767 uint8_t last_byte;
3768 unsigned int i;
3769 int cleaned_count = 0;
3770 boolean_t cleaned = FALSE;
3771
3772 i = rx_ring->next_to_clean;
3773 rx_desc = E1000_RX_DESC(*rx_ring, i);
3774 buffer_info = &rx_ring->buffer_info[i];
3775
3776 while (rx_desc->status & E1000_RXD_STAT_DD) {
3777 struct sk_buff *skb;
3778 u8 status;
3779
3780 #ifdef CONFIG_E1000_NAPI
3781 if (*work_done >= work_to_do)
3782 break;
3783 (*work_done)++;
3784 #endif
3785 status = rx_desc->status;
3786 skb = buffer_info->skb;
3787 buffer_info->skb = NULL;
3788
3789 prefetch(skb->data - NET_IP_ALIGN);
3790
3791 if (++i == rx_ring->count) i = 0;
3792 next_rxd = E1000_RX_DESC(*rx_ring, i);
3793 prefetch(next_rxd);
3794
3795 next_buffer = &rx_ring->buffer_info[i];
3796
3797 cleaned = TRUE;
3798 cleaned_count++;
3799 pci_unmap_single(pdev,
3800 buffer_info->dma,
3801 buffer_info->length,
3802 PCI_DMA_FROMDEVICE);
3803
3804 length = le16_to_cpu(rx_desc->length);
3805
3806 if (unlikely(!(status & E1000_RXD_STAT_EOP))) {
3807 /* All receives must fit into a single buffer */
3808 E1000_DBG("%s: Receive packet consumed multiple"
3809 " buffers\n", netdev->name);
3810 /* recycle */
3811 buffer_info->skb = skb;
3812 goto next_desc;
3813 }
3814
3815 if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
3816 last_byte = *(skb->data + length - 1);
3817 if (TBI_ACCEPT(&adapter->hw, status,
3818 rx_desc->errors, length, last_byte)) {
3819 spin_lock_irqsave(&adapter->stats_lock, flags);
3820 e1000_tbi_adjust_stats(&adapter->hw,
3821 &adapter->stats,
3822 length, skb->data);
3823 spin_unlock_irqrestore(&adapter->stats_lock,
3824 flags);
3825 length--;
3826 } else {
3827 /* recycle */
3828 buffer_info->skb = skb;
3829 goto next_desc;
3830 }
3831 }
3832
3833 /* adjust length to remove Ethernet CRC, this must be
3834 * done after the TBI_ACCEPT workaround above */
3835 length -= 4;
3836
3837 /* code added for copybreak, this should improve
3838 * performance for small packets with large amounts
3839 * of reassembly being done in the stack */
3840 #define E1000_CB_LENGTH 256
3841 if (length < E1000_CB_LENGTH) {
3842 struct sk_buff *new_skb =
3843 netdev_alloc_skb(netdev, length + NET_IP_ALIGN);
3844 if (new_skb) {
3845 skb_reserve(new_skb, NET_IP_ALIGN);
3846 memcpy(new_skb->data - NET_IP_ALIGN,
3847 skb->data - NET_IP_ALIGN,
3848 length + NET_IP_ALIGN);
3849 /* save the skb in buffer_info as good */
3850 buffer_info->skb = skb;
3851 skb = new_skb;
3852 }
3853 /* else just continue with the old one */
3854 }
3855 /* end copybreak code */
3856 skb_put(skb, length);
3857
3858 /* Receive Checksum Offload */
3859 e1000_rx_checksum(adapter,
3860 (uint32_t)(status) |
3861 ((uint32_t)(rx_desc->errors) << 24),
3862 le16_to_cpu(rx_desc->csum), skb);
3863
3864 skb->protocol = eth_type_trans(skb, netdev);
3865 #ifdef CONFIG_E1000_NAPI
3866 if (unlikely(adapter->vlgrp &&
3867 (status & E1000_RXD_STAT_VP))) {
3868 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
3869 le16_to_cpu(rx_desc->special) &
3870 E1000_RXD_SPC_VLAN_MASK);
3871 } else {
3872 netif_receive_skb(skb);
3873 }
3874 #else /* CONFIG_E1000_NAPI */
3875 if (unlikely(adapter->vlgrp &&
3876 (status & E1000_RXD_STAT_VP))) {
3877 vlan_hwaccel_rx(skb, adapter->vlgrp,
3878 le16_to_cpu(rx_desc->special) &
3879 E1000_RXD_SPC_VLAN_MASK);
3880 } else {
3881 netif_rx(skb);
3882 }
3883 #endif /* CONFIG_E1000_NAPI */
3884 netdev->last_rx = jiffies;
3885
3886 next_desc:
3887 rx_desc->status = 0;
3888
3889 /* return some buffers to hardware, one at a time is too slow */
3890 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
3891 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3892 cleaned_count = 0;
3893 }
3894
3895 /* use prefetched values */
3896 rx_desc = next_rxd;
3897 buffer_info = next_buffer;
3898 }
3899 rx_ring->next_to_clean = i;
3900
3901 cleaned_count = E1000_DESC_UNUSED(rx_ring);
3902 if (cleaned_count)
3903 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3904
3905 return cleaned;
3906 }
3907
3908 /**
3909 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
3910 * @adapter: board private structure
3911 **/
3912
3913 static boolean_t
3914 #ifdef CONFIG_E1000_NAPI
3915 e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
3916 struct e1000_rx_ring *rx_ring,
3917 int *work_done, int work_to_do)
3918 #else
3919 e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
3920 struct e1000_rx_ring *rx_ring)
3921 #endif
3922 {
3923 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
3924 struct net_device *netdev = adapter->netdev;
3925 struct pci_dev *pdev = adapter->pdev;
3926 struct e1000_buffer *buffer_info, *next_buffer;
3927 struct e1000_ps_page *ps_page;
3928 struct e1000_ps_page_dma *ps_page_dma;
3929 struct sk_buff *skb;
3930 unsigned int i, j;
3931 uint32_t length, staterr;
3932 int cleaned_count = 0;
3933 boolean_t cleaned = FALSE;
3934
3935 i = rx_ring->next_to_clean;
3936 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
3937 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
3938 buffer_info = &rx_ring->buffer_info[i];
3939
3940 while (staterr & E1000_RXD_STAT_DD) {
3941 ps_page = &rx_ring->ps_page[i];
3942 ps_page_dma = &rx_ring->ps_page_dma[i];
3943 #ifdef CONFIG_E1000_NAPI
3944 if (unlikely(*work_done >= work_to_do))
3945 break;
3946 (*work_done)++;
3947 #endif
3948 skb = buffer_info->skb;
3949
3950 /* in the packet split case this is header only */
3951 prefetch(skb->data - NET_IP_ALIGN);
3952
3953 if (++i == rx_ring->count) i = 0;
3954 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
3955 prefetch(next_rxd);
3956
3957 next_buffer = &rx_ring->buffer_info[i];
3958
3959 cleaned = TRUE;
3960 cleaned_count++;
3961 pci_unmap_single(pdev, buffer_info->dma,
3962 buffer_info->length,
3963 PCI_DMA_FROMDEVICE);
3964
3965 if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
3966 E1000_DBG("%s: Packet Split buffers didn't pick up"
3967 " the full packet\n", netdev->name);
3968 dev_kfree_skb_irq(skb);
3969 goto next_desc;
3970 }
3971
3972 if (unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
3973 dev_kfree_skb_irq(skb);
3974 goto next_desc;
3975 }
3976
3977 length = le16_to_cpu(rx_desc->wb.middle.length0);
3978
3979 if (unlikely(!length)) {
3980 E1000_DBG("%s: Last part of the packet spanning"
3981 " multiple descriptors\n", netdev->name);
3982 dev_kfree_skb_irq(skb);
3983 goto next_desc;
3984 }
3985
3986 /* Good Receive */
3987 skb_put(skb, length);
3988
3989 {
3990 /* this looks ugly, but it seems compiler issues make it
3991 more efficient than reusing j */
3992 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
3993
3994 /* page alloc/put takes too long and effects small packet
3995 * throughput, so unsplit small packets and save the alloc/put*/
3996 if (l1 && ((length + l1) <= adapter->rx_ps_bsize0)) {
3997 u8 *vaddr;
3998 /* there is no documentation about how to call
3999 * kmap_atomic, so we can't hold the mapping
4000 * very long */
4001 pci_dma_sync_single_for_cpu(pdev,
4002 ps_page_dma->ps_page_dma[0],
4003 PAGE_SIZE,
4004 PCI_DMA_FROMDEVICE);
4005 vaddr = kmap_atomic(ps_page->ps_page[0],
4006 KM_SKB_DATA_SOFTIRQ);
4007 memcpy(skb->tail, vaddr, l1);
4008 kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
4009 pci_dma_sync_single_for_device(pdev,
4010 ps_page_dma->ps_page_dma[0],
4011 PAGE_SIZE, PCI_DMA_FROMDEVICE);
4012 /* remove the CRC */
4013 l1 -= 4;
4014 skb_put(skb, l1);
4015 goto copydone;
4016 } /* if */
4017 }
4018
4019 for (j = 0; j < adapter->rx_ps_pages; j++) {
4020 if (!(length= le16_to_cpu(rx_desc->wb.upper.length[j])))
4021 break;
4022 pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
4023 PAGE_SIZE, PCI_DMA_FROMDEVICE);
4024 ps_page_dma->ps_page_dma[j] = 0;
4025 skb_fill_page_desc(skb, j, ps_page->ps_page[j], 0,
4026 length);
4027 ps_page->ps_page[j] = NULL;
4028 skb->len += length;
4029 skb->data_len += length;
4030 skb->truesize += length;
4031 }
4032
4033 /* strip the ethernet crc, problem is we're using pages now so
4034 * this whole operation can get a little cpu intensive */
4035 pskb_trim(skb, skb->len - 4);
4036
4037 copydone:
4038 e1000_rx_checksum(adapter, staterr,
4039 le16_to_cpu(rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
4040 skb->protocol = eth_type_trans(skb, netdev);
4041
4042 if (likely(rx_desc->wb.upper.header_status &
4043 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP)))
4044 adapter->rx_hdr_split++;
4045 #ifdef CONFIG_E1000_NAPI
4046 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
4047 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
4048 le16_to_cpu(rx_desc->wb.middle.vlan) &
4049 E1000_RXD_SPC_VLAN_MASK);
4050 } else {
4051 netif_receive_skb(skb);
4052 }
4053 #else /* CONFIG_E1000_NAPI */
4054 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
4055 vlan_hwaccel_rx(skb, adapter->vlgrp,
4056 le16_to_cpu(rx_desc->wb.middle.vlan) &
4057 E1000_RXD_SPC_VLAN_MASK);
4058 } else {
4059 netif_rx(skb);
4060 }
4061 #endif /* CONFIG_E1000_NAPI */
4062 netdev->last_rx = jiffies;
4063
4064 next_desc:
4065 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
4066 buffer_info->skb = NULL;
4067
4068 /* return some buffers to hardware, one at a time is too slow */
4069 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
4070 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4071 cleaned_count = 0;
4072 }
4073
4074 /* use prefetched values */
4075 rx_desc = next_rxd;
4076 buffer_info = next_buffer;
4077
4078 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
4079 }
4080 rx_ring->next_to_clean = i;
4081
4082 cleaned_count = E1000_DESC_UNUSED(rx_ring);
4083 if (cleaned_count)
4084 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4085
4086 return cleaned;
4087 }
4088
4089 /**
4090 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
4091 * @adapter: address of board private structure
4092 **/
4093
4094 static void
4095 e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
4096 struct e1000_rx_ring *rx_ring,
4097 int cleaned_count)
4098 {
4099 struct net_device *netdev = adapter->netdev;
4100 struct pci_dev *pdev = adapter->pdev;
4101 struct e1000_rx_desc *rx_desc;
4102 struct e1000_buffer *buffer_info;
4103 struct sk_buff *skb;
4104 unsigned int i;
4105 unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
4106
4107 i = rx_ring->next_to_use;
4108 buffer_info = &rx_ring->buffer_info[i];
4109
4110 while (cleaned_count--) {
4111 skb = buffer_info->skb;
4112 if (skb) {
4113 skb_trim(skb, 0);
4114 goto map_skb;
4115 }
4116
4117 skb = netdev_alloc_skb(netdev, bufsz);
4118 if (unlikely(!skb)) {
4119 /* Better luck next round */
4120 adapter->alloc_rx_buff_failed++;
4121 break;
4122 }
4123
4124 /* Fix for errata 23, can't cross 64kB boundary */
4125 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4126 struct sk_buff *oldskb = skb;
4127 DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
4128 "at %p\n", bufsz, skb->data);
4129 /* Try again, without freeing the previous */
4130 skb = netdev_alloc_skb(netdev, bufsz);
4131 /* Failed allocation, critical failure */
4132 if (!skb) {
4133 dev_kfree_skb(oldskb);
4134 break;
4135 }
4136
4137 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4138 /* give up */
4139 dev_kfree_skb(skb);
4140 dev_kfree_skb(oldskb);
4141 break; /* while !buffer_info->skb */
4142 }
4143
4144 /* Use new allocation */
4145 dev_kfree_skb(oldskb);
4146 }
4147 /* Make buffer alignment 2 beyond a 16 byte boundary
4148 * this will result in a 16 byte aligned IP header after
4149 * the 14 byte MAC header is removed
4150 */
4151 skb_reserve(skb, NET_IP_ALIGN);
4152
4153 buffer_info->skb = skb;
4154 buffer_info->length = adapter->rx_buffer_len;
4155 map_skb:
4156 buffer_info->dma = pci_map_single(pdev,
4157 skb->data,
4158 adapter->rx_buffer_len,
4159 PCI_DMA_FROMDEVICE);
4160
4161 /* Fix for errata 23, can't cross 64kB boundary */
4162 if (!e1000_check_64k_bound(adapter,
4163 (void *)(unsigned long)buffer_info->dma,
4164 adapter->rx_buffer_len)) {
4165 DPRINTK(RX_ERR, ERR,
4166 "dma align check failed: %u bytes at %p\n",
4167 adapter->rx_buffer_len,
4168 (void *)(unsigned long)buffer_info->dma);
4169 dev_kfree_skb(skb);
4170 buffer_info->skb = NULL;
4171
4172 pci_unmap_single(pdev, buffer_info->dma,
4173 adapter->rx_buffer_len,
4174 PCI_DMA_FROMDEVICE);
4175
4176 break; /* while !buffer_info->skb */
4177 }
4178 rx_desc = E1000_RX_DESC(*rx_ring, i);
4179 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4180
4181 if (unlikely(++i == rx_ring->count))
4182 i = 0;
4183 buffer_info = &rx_ring->buffer_info[i];
4184 }
4185
4186 if (likely(rx_ring->next_to_use != i)) {
4187 rx_ring->next_to_use = i;
4188 if (unlikely(i-- == 0))
4189 i = (rx_ring->count - 1);
4190
4191 /* Force memory writes to complete before letting h/w
4192 * know there are new descriptors to fetch. (Only
4193 * applicable for weak-ordered memory model archs,
4194 * such as IA-64). */
4195 wmb();
4196 writel(i, adapter->hw.hw_addr + rx_ring->rdt);
4197 }
4198 }
4199
4200 /**
4201 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
4202 * @adapter: address of board private structure
4203 **/
4204
4205 static void
4206 e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
4207 struct e1000_rx_ring *rx_ring,
4208 int cleaned_count)
4209 {
4210 struct net_device *netdev = adapter->netdev;
4211 struct pci_dev *pdev = adapter->pdev;
4212 union e1000_rx_desc_packet_split *rx_desc;
4213 struct e1000_buffer *buffer_info;
4214 struct e1000_ps_page *ps_page;
4215 struct e1000_ps_page_dma *ps_page_dma;
4216 struct sk_buff *skb;
4217 unsigned int i, j;
4218
4219 i = rx_ring->next_to_use;
4220 buffer_info = &rx_ring->buffer_info[i];
4221 ps_page = &rx_ring->ps_page[i];
4222 ps_page_dma = &rx_ring->ps_page_dma[i];
4223
4224 while (cleaned_count--) {
4225 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
4226
4227 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
4228 if (j < adapter->rx_ps_pages) {
4229 if (likely(!ps_page->ps_page[j])) {
4230 ps_page->ps_page[j] =
4231 alloc_page(GFP_ATOMIC);
4232 if (unlikely(!ps_page->ps_page[j])) {
4233 adapter->alloc_rx_buff_failed++;
4234 goto no_buffers;
4235 }
4236 ps_page_dma->ps_page_dma[j] =
4237 pci_map_page(pdev,
4238 ps_page->ps_page[j],
4239 0, PAGE_SIZE,
4240 PCI_DMA_FROMDEVICE);
4241 }
4242 /* Refresh the desc even if buffer_addrs didn't
4243 * change because each write-back erases
4244 * this info.
4245 */
4246 rx_desc->read.buffer_addr[j+1] =
4247 cpu_to_le64(ps_page_dma->ps_page_dma[j]);
4248 } else
4249 rx_desc->read.buffer_addr[j+1] = ~0;
4250 }
4251
4252 skb = netdev_alloc_skb(netdev,
4253 adapter->rx_ps_bsize0 + NET_IP_ALIGN);
4254
4255 if (unlikely(!skb)) {
4256 adapter->alloc_rx_buff_failed++;
4257 break;
4258 }
4259
4260 /* Make buffer alignment 2 beyond a 16 byte boundary
4261 * this will result in a 16 byte aligned IP header after
4262 * the 14 byte MAC header is removed
4263 */
4264 skb_reserve(skb, NET_IP_ALIGN);
4265
4266 buffer_info->skb = skb;
4267 buffer_info->length = adapter->rx_ps_bsize0;
4268 buffer_info->dma = pci_map_single(pdev, skb->data,
4269 adapter->rx_ps_bsize0,
4270 PCI_DMA_FROMDEVICE);
4271
4272 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
4273
4274 if (unlikely(++i == rx_ring->count)) i = 0;
4275 buffer_info = &rx_ring->buffer_info[i];
4276 ps_page = &rx_ring->ps_page[i];
4277 ps_page_dma = &rx_ring->ps_page_dma[i];
4278 }
4279
4280 no_buffers:
4281 if (likely(rx_ring->next_to_use != i)) {
4282 rx_ring->next_to_use = i;
4283 if (unlikely(i-- == 0)) i = (rx_ring->count - 1);
4284
4285 /* Force memory writes to complete before letting h/w
4286 * know there are new descriptors to fetch. (Only
4287 * applicable for weak-ordered memory model archs,
4288 * such as IA-64). */
4289 wmb();
4290 /* Hardware increments by 16 bytes, but packet split
4291 * descriptors are 32 bytes...so we increment tail
4292 * twice as much.
4293 */
4294 writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
4295 }
4296 }
4297
4298 /**
4299 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
4300 * @adapter:
4301 **/
4302
4303 static void
4304 e1000_smartspeed(struct e1000_adapter *adapter)
4305 {
4306 uint16_t phy_status;
4307 uint16_t phy_ctrl;
4308
4309 if ((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
4310 !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
4311 return;
4312
4313 if (adapter->smartspeed == 0) {
4314 /* If Master/Slave config fault is asserted twice,
4315 * we assume back-to-back */
4316 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
4317 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
4318 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
4319 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
4320 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
4321 if (phy_ctrl & CR_1000T_MS_ENABLE) {
4322 phy_ctrl &= ~CR_1000T_MS_ENABLE;
4323 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
4324 phy_ctrl);
4325 adapter->smartspeed++;
4326 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
4327 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
4328 &phy_ctrl)) {
4329 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4330 MII_CR_RESTART_AUTO_NEG);
4331 e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
4332 phy_ctrl);
4333 }
4334 }
4335 return;
4336 } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
4337 /* If still no link, perhaps using 2/3 pair cable */
4338 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
4339 phy_ctrl |= CR_1000T_MS_ENABLE;
4340 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
4341 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
4342 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
4343 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4344 MII_CR_RESTART_AUTO_NEG);
4345 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
4346 }
4347 }
4348 /* Restart process after E1000_SMARTSPEED_MAX iterations */
4349 if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
4350 adapter->smartspeed = 0;
4351 }
4352
4353 /**
4354 * e1000_ioctl -
4355 * @netdev:
4356 * @ifreq:
4357 * @cmd:
4358 **/
4359
4360 static int
4361 e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4362 {
4363 switch (cmd) {
4364 case SIOCGMIIPHY:
4365 case SIOCGMIIREG:
4366 case SIOCSMIIREG:
4367 return e1000_mii_ioctl(netdev, ifr, cmd);
4368 default:
4369 return -EOPNOTSUPP;
4370 }
4371 }
4372
4373 /**
4374 * e1000_mii_ioctl -
4375 * @netdev:
4376 * @ifreq:
4377 * @cmd:
4378 **/
4379
4380 static int
4381 e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4382 {
4383 struct e1000_adapter *adapter = netdev_priv(netdev);
4384 struct mii_ioctl_data *data = if_mii(ifr);
4385 int retval;
4386 uint16_t mii_reg;
4387 uint16_t spddplx;
4388 unsigned long flags;
4389
4390 if (adapter->hw.media_type != e1000_media_type_copper)
4391 return -EOPNOTSUPP;
4392
4393 switch (cmd) {
4394 case SIOCGMIIPHY:
4395 data->phy_id = adapter->hw.phy_addr;
4396 break;
4397 case SIOCGMIIREG:
4398 if (!capable(CAP_NET_ADMIN))
4399 return -EPERM;
4400 spin_lock_irqsave(&adapter->stats_lock, flags);
4401 if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
4402 &data->val_out)) {
4403 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4404 return -EIO;
4405 }
4406 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4407 break;
4408 case SIOCSMIIREG:
4409 if (!capable(CAP_NET_ADMIN))
4410 return -EPERM;
4411 if (data->reg_num & ~(0x1F))
4412 return -EFAULT;
4413 mii_reg = data->val_in;
4414 spin_lock_irqsave(&adapter->stats_lock, flags);
4415 if (e1000_write_phy_reg(&adapter->hw, data->reg_num,
4416 mii_reg)) {
4417 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4418 return -EIO;
4419 }
4420 if (adapter->hw.media_type == e1000_media_type_copper) {
4421 switch (data->reg_num) {
4422 case PHY_CTRL:
4423 if (mii_reg & MII_CR_POWER_DOWN)
4424 break;
4425 if (mii_reg & MII_CR_AUTO_NEG_EN) {
4426 adapter->hw.autoneg = 1;
4427 adapter->hw.autoneg_advertised = 0x2F;
4428 } else {
4429 if (mii_reg & 0x40)
4430 spddplx = SPEED_1000;
4431 else if (mii_reg & 0x2000)
4432 spddplx = SPEED_100;
4433 else
4434 spddplx = SPEED_10;
4435 spddplx += (mii_reg & 0x100)
4436 ? DUPLEX_FULL :
4437 DUPLEX_HALF;
4438 retval = e1000_set_spd_dplx(adapter,
4439 spddplx);
4440 if (retval) {
4441 spin_unlock_irqrestore(
4442 &adapter->stats_lock,
4443 flags);
4444 return retval;
4445 }
4446 }
4447 if (netif_running(adapter->netdev))
4448 e1000_reinit_locked(adapter);
4449 else
4450 e1000_reset(adapter);
4451 break;
4452 case M88E1000_PHY_SPEC_CTRL:
4453 case M88E1000_EXT_PHY_SPEC_CTRL:
4454 if (e1000_phy_reset(&adapter->hw)) {
4455 spin_unlock_irqrestore(
4456 &adapter->stats_lock, flags);
4457 return -EIO;
4458 }
4459 break;
4460 }
4461 } else {
4462 switch (data->reg_num) {
4463 case PHY_CTRL:
4464 if (mii_reg & MII_CR_POWER_DOWN)
4465 break;
4466 if (netif_running(adapter->netdev))
4467 e1000_reinit_locked(adapter);
4468 else
4469 e1000_reset(adapter);
4470 break;
4471 }
4472 }
4473 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4474 break;
4475 default:
4476 return -EOPNOTSUPP;
4477 }
4478 return E1000_SUCCESS;
4479 }
4480
4481 void
4482 e1000_pci_set_mwi(struct e1000_hw *hw)
4483 {
4484 struct e1000_adapter *adapter = hw->back;
4485 int ret_val = pci_set_mwi(adapter->pdev);
4486
4487 if (ret_val)
4488 DPRINTK(PROBE, ERR, "Error in setting MWI\n");
4489 }
4490
4491 void
4492 e1000_pci_clear_mwi(struct e1000_hw *hw)
4493 {
4494 struct e1000_adapter *adapter = hw->back;
4495
4496 pci_clear_mwi(adapter->pdev);
4497 }
4498
4499 void
4500 e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4501 {
4502 struct e1000_adapter *adapter = hw->back;
4503
4504 pci_read_config_word(adapter->pdev, reg, value);
4505 }
4506
4507 void
4508 e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4509 {
4510 struct e1000_adapter *adapter = hw->back;
4511
4512 pci_write_config_word(adapter->pdev, reg, *value);
4513 }
4514
4515 int32_t
4516 e1000_read_pcie_cap_reg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4517 {
4518 struct e1000_adapter *adapter = hw->back;
4519 uint16_t cap_offset;
4520
4521 cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP);
4522 if (!cap_offset)
4523 return -E1000_ERR_CONFIG;
4524
4525 pci_read_config_word(adapter->pdev, cap_offset + reg, value);
4526
4527 return E1000_SUCCESS;
4528 }
4529
4530 void
4531 e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
4532 {
4533 outl(value, port);
4534 }
4535
4536 static void
4537 e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
4538 {
4539 struct e1000_adapter *adapter = netdev_priv(netdev);
4540 uint32_t ctrl, rctl;
4541
4542 e1000_irq_disable(adapter);
4543 adapter->vlgrp = grp;
4544
4545 if (grp) {
4546 /* enable VLAN tag insert/strip */
4547 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4548 ctrl |= E1000_CTRL_VME;
4549 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4550
4551 if (adapter->hw.mac_type != e1000_ich8lan) {
4552 /* enable VLAN receive filtering */
4553 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4554 rctl |= E1000_RCTL_VFE;
4555 rctl &= ~E1000_RCTL_CFIEN;
4556 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4557 e1000_update_mng_vlan(adapter);
4558 }
4559 } else {
4560 /* disable VLAN tag insert/strip */
4561 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4562 ctrl &= ~E1000_CTRL_VME;
4563 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4564
4565 if (adapter->hw.mac_type != e1000_ich8lan) {
4566 /* disable VLAN filtering */
4567 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4568 rctl &= ~E1000_RCTL_VFE;
4569 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4570 if (adapter->mng_vlan_id !=
4571 (uint16_t)E1000_MNG_VLAN_NONE) {
4572 e1000_vlan_rx_kill_vid(netdev,
4573 adapter->mng_vlan_id);
4574 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4575 }
4576 }
4577 }
4578
4579 e1000_irq_enable(adapter);
4580 }
4581
4582 static void
4583 e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
4584 {
4585 struct e1000_adapter *adapter = netdev_priv(netdev);
4586 uint32_t vfta, index;
4587
4588 if ((adapter->hw.mng_cookie.status &
4589 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4590 (vid == adapter->mng_vlan_id))
4591 return;
4592 /* add VID to filter table */
4593 index = (vid >> 5) & 0x7F;
4594 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4595 vfta |= (1 << (vid & 0x1F));
4596 e1000_write_vfta(&adapter->hw, index, vfta);
4597 }
4598
4599 static void
4600 e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
4601 {
4602 struct e1000_adapter *adapter = netdev_priv(netdev);
4603 uint32_t vfta, index;
4604
4605 e1000_irq_disable(adapter);
4606
4607 if (adapter->vlgrp)
4608 adapter->vlgrp->vlan_devices[vid] = NULL;
4609
4610 e1000_irq_enable(adapter);
4611
4612 if ((adapter->hw.mng_cookie.status &
4613 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4614 (vid == adapter->mng_vlan_id)) {
4615 /* release control to f/w */
4616 e1000_release_hw_control(adapter);
4617 return;
4618 }
4619
4620 /* remove VID from filter table */
4621 index = (vid >> 5) & 0x7F;
4622 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4623 vfta &= ~(1 << (vid & 0x1F));
4624 e1000_write_vfta(&adapter->hw, index, vfta);
4625 }
4626
4627 static void
4628 e1000_restore_vlan(struct e1000_adapter *adapter)
4629 {
4630 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
4631
4632 if (adapter->vlgrp) {
4633 uint16_t vid;
4634 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
4635 if (!adapter->vlgrp->vlan_devices[vid])
4636 continue;
4637 e1000_vlan_rx_add_vid(adapter->netdev, vid);
4638 }
4639 }
4640 }
4641
4642 int
4643 e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
4644 {
4645 adapter->hw.autoneg = 0;
4646
4647 /* Fiber NICs only allow 1000 gbps Full duplex */
4648 if ((adapter->hw.media_type == e1000_media_type_fiber) &&
4649 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
4650 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
4651 return -EINVAL;
4652 }
4653
4654 switch (spddplx) {
4655 case SPEED_10 + DUPLEX_HALF:
4656 adapter->hw.forced_speed_duplex = e1000_10_half;
4657 break;
4658 case SPEED_10 + DUPLEX_FULL:
4659 adapter->hw.forced_speed_duplex = e1000_10_full;
4660 break;
4661 case SPEED_100 + DUPLEX_HALF:
4662 adapter->hw.forced_speed_duplex = e1000_100_half;
4663 break;
4664 case SPEED_100 + DUPLEX_FULL:
4665 adapter->hw.forced_speed_duplex = e1000_100_full;
4666 break;
4667 case SPEED_1000 + DUPLEX_FULL:
4668 adapter->hw.autoneg = 1;
4669 adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
4670 break;
4671 case SPEED_1000 + DUPLEX_HALF: /* not supported */
4672 default:
4673 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
4674 return -EINVAL;
4675 }
4676 return 0;
4677 }
4678
4679 #ifdef CONFIG_PM
4680 /* Save/restore 16 or 64 dwords of PCI config space depending on which
4681 * bus we're on (PCI(X) vs. PCI-E)
4682 */
4683 #define PCIE_CONFIG_SPACE_LEN 256
4684 #define PCI_CONFIG_SPACE_LEN 64
4685 static int
4686 e1000_pci_save_state(struct e1000_adapter *adapter)
4687 {
4688 struct pci_dev *dev = adapter->pdev;
4689 int size;
4690 int i;
4691
4692 if (adapter->hw.mac_type >= e1000_82571)
4693 size = PCIE_CONFIG_SPACE_LEN;
4694 else
4695 size = PCI_CONFIG_SPACE_LEN;
4696
4697 WARN_ON(adapter->config_space != NULL);
4698
4699 adapter->config_space = kmalloc(size, GFP_KERNEL);
4700 if (!adapter->config_space) {
4701 DPRINTK(PROBE, ERR, "unable to allocate %d bytes\n", size);
4702 return -ENOMEM;
4703 }
4704 for (i = 0; i < (size / 4); i++)
4705 pci_read_config_dword(dev, i * 4, &adapter->config_space[i]);
4706 return 0;
4707 }
4708
4709 static void
4710 e1000_pci_restore_state(struct e1000_adapter *adapter)
4711 {
4712 struct pci_dev *dev = adapter->pdev;
4713 int size;
4714 int i;
4715
4716 if (adapter->config_space == NULL)
4717 return;
4718
4719 if (adapter->hw.mac_type >= e1000_82571)
4720 size = PCIE_CONFIG_SPACE_LEN;
4721 else
4722 size = PCI_CONFIG_SPACE_LEN;
4723 for (i = 0; i < (size / 4); i++)
4724 pci_write_config_dword(dev, i * 4, adapter->config_space[i]);
4725 kfree(adapter->config_space);
4726 adapter->config_space = NULL;
4727 return;
4728 }
4729 #endif /* CONFIG_PM */
4730
4731 static int
4732 e1000_suspend(struct pci_dev *pdev, pm_message_t state)
4733 {
4734 struct net_device *netdev = pci_get_drvdata(pdev);
4735 struct e1000_adapter *adapter = netdev_priv(netdev);
4736 uint32_t ctrl, ctrl_ext, rctl, manc, status;
4737 uint32_t wufc = adapter->wol;
4738 #ifdef CONFIG_PM
4739 int retval = 0;
4740 #endif
4741
4742 netif_device_detach(netdev);
4743
4744 if (netif_running(netdev)) {
4745 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
4746 e1000_down(adapter);
4747 }
4748
4749 #ifdef CONFIG_PM
4750 /* Implement our own version of pci_save_state(pdev) because pci-
4751 * express adapters have 256-byte config spaces. */
4752 retval = e1000_pci_save_state(adapter);
4753 if (retval)
4754 return retval;
4755 #endif
4756
4757 status = E1000_READ_REG(&adapter->hw, STATUS);
4758 if (status & E1000_STATUS_LU)
4759 wufc &= ~E1000_WUFC_LNKC;
4760
4761 if (wufc) {
4762 e1000_setup_rctl(adapter);
4763 e1000_set_multi(netdev);
4764
4765 /* turn on all-multi mode if wake on multicast is enabled */
4766 if (wufc & E1000_WUFC_MC) {
4767 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4768 rctl |= E1000_RCTL_MPE;
4769 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4770 }
4771
4772 if (adapter->hw.mac_type >= e1000_82540) {
4773 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4774 /* advertise wake from D3Cold */
4775 #define E1000_CTRL_ADVD3WUC 0x00100000
4776 /* phy power management enable */
4777 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
4778 ctrl |= E1000_CTRL_ADVD3WUC |
4779 E1000_CTRL_EN_PHY_PWR_MGMT;
4780 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4781 }
4782
4783 if (adapter->hw.media_type == e1000_media_type_fiber ||
4784 adapter->hw.media_type == e1000_media_type_internal_serdes) {
4785 /* keep the laser running in D3 */
4786 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
4787 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
4788 E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
4789 }
4790
4791 /* Allow time for pending master requests to run */
4792 e1000_disable_pciex_master(&adapter->hw);
4793
4794 E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
4795 E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
4796 pci_enable_wake(pdev, PCI_D3hot, 1);
4797 pci_enable_wake(pdev, PCI_D3cold, 1);
4798 } else {
4799 E1000_WRITE_REG(&adapter->hw, WUC, 0);
4800 E1000_WRITE_REG(&adapter->hw, WUFC, 0);
4801 pci_enable_wake(pdev, PCI_D3hot, 0);
4802 pci_enable_wake(pdev, PCI_D3cold, 0);
4803 }
4804
4805 if (adapter->hw.mac_type >= e1000_82540 &&
4806 adapter->hw.mac_type < e1000_82571 &&
4807 adapter->hw.media_type == e1000_media_type_copper) {
4808 manc = E1000_READ_REG(&adapter->hw, MANC);
4809 if (manc & E1000_MANC_SMBUS_EN) {
4810 manc |= E1000_MANC_ARP_EN;
4811 E1000_WRITE_REG(&adapter->hw, MANC, manc);
4812 pci_enable_wake(pdev, PCI_D3hot, 1);
4813 pci_enable_wake(pdev, PCI_D3cold, 1);
4814 }
4815 }
4816
4817 if (adapter->hw.phy_type == e1000_phy_igp_3)
4818 e1000_phy_powerdown_workaround(&adapter->hw);
4819
4820 if (netif_running(netdev))
4821 e1000_free_irq(adapter);
4822
4823 /* Release control of h/w to f/w. If f/w is AMT enabled, this
4824 * would have already happened in close and is redundant. */
4825 e1000_release_hw_control(adapter);
4826
4827 pci_disable_device(pdev);
4828
4829 pci_set_power_state(pdev, pci_choose_state(pdev, state));
4830
4831 return 0;
4832 }
4833
4834 #ifdef CONFIG_PM
4835 static int
4836 e1000_resume(struct pci_dev *pdev)
4837 {
4838 struct net_device *netdev = pci_get_drvdata(pdev);
4839 struct e1000_adapter *adapter = netdev_priv(netdev);
4840 uint32_t manc, err;
4841
4842 pci_set_power_state(pdev, PCI_D0);
4843 e1000_pci_restore_state(adapter);
4844 if ((err = pci_enable_device(pdev))) {
4845 printk(KERN_ERR "e1000: Cannot enable PCI device from suspend\n");
4846 return err;
4847 }
4848 pci_set_master(pdev);
4849
4850 pci_enable_wake(pdev, PCI_D3hot, 0);
4851 pci_enable_wake(pdev, PCI_D3cold, 0);
4852
4853 if (netif_running(netdev) && (err = e1000_request_irq(adapter)))
4854 return err;
4855
4856 e1000_power_up_phy(adapter);
4857 e1000_reset(adapter);
4858 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
4859
4860 if (netif_running(netdev))
4861 e1000_up(adapter);
4862
4863 netif_device_attach(netdev);
4864
4865 if (adapter->hw.mac_type >= e1000_82540 &&
4866 adapter->hw.mac_type < e1000_82571 &&
4867 adapter->hw.media_type == e1000_media_type_copper) {
4868 manc = E1000_READ_REG(&adapter->hw, MANC);
4869 manc &= ~(E1000_MANC_ARP_EN);
4870 E1000_WRITE_REG(&adapter->hw, MANC, manc);
4871 }
4872
4873 /* If the controller is 82573 and f/w is AMT, do not set
4874 * DRV_LOAD until the interface is up. For all other cases,
4875 * let the f/w know that the h/w is now under the control
4876 * of the driver. */
4877 if (adapter->hw.mac_type != e1000_82573 ||
4878 !e1000_check_mng_mode(&adapter->hw))
4879 e1000_get_hw_control(adapter);
4880
4881 return 0;
4882 }
4883 #endif
4884
4885 static void e1000_shutdown(struct pci_dev *pdev)
4886 {
4887 e1000_suspend(pdev, PMSG_SUSPEND);
4888 }
4889
4890 #ifdef CONFIG_NET_POLL_CONTROLLER
4891 /*
4892 * Polling 'interrupt' - used by things like netconsole to send skbs
4893 * without having to re-enable interrupts. It's not called while
4894 * the interrupt routine is executing.
4895 */
4896 static void
4897 e1000_netpoll(struct net_device *netdev)
4898 {
4899 struct e1000_adapter *adapter = netdev_priv(netdev);
4900
4901 disable_irq(adapter->pdev->irq);
4902 e1000_intr(adapter->pdev->irq, netdev);
4903 e1000_clean_tx_irq(adapter, adapter->tx_ring);
4904 #ifndef CONFIG_E1000_NAPI
4905 adapter->clean_rx(adapter, adapter->rx_ring);
4906 #endif
4907 enable_irq(adapter->pdev->irq);
4908 }
4909 #endif
4910
4911 /**
4912 * e1000_io_error_detected - called when PCI error is detected
4913 * @pdev: Pointer to PCI device
4914 * @state: The current pci conneection state
4915 *
4916 * This function is called after a PCI bus error affecting
4917 * this device has been detected.
4918 */
4919 static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
4920 {
4921 struct net_device *netdev = pci_get_drvdata(pdev);
4922 struct e1000_adapter *adapter = netdev->priv;
4923
4924 netif_device_detach(netdev);
4925
4926 if (netif_running(netdev))
4927 e1000_down(adapter);
4928 pci_disable_device(pdev);
4929
4930 /* Request a slot slot reset. */
4931 return PCI_ERS_RESULT_NEED_RESET;
4932 }
4933
4934 /**
4935 * e1000_io_slot_reset - called after the pci bus has been reset.
4936 * @pdev: Pointer to PCI device
4937 *
4938 * Restart the card from scratch, as if from a cold-boot. Implementation
4939 * resembles the first-half of the e1000_resume routine.
4940 */
4941 static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
4942 {
4943 struct net_device *netdev = pci_get_drvdata(pdev);
4944 struct e1000_adapter *adapter = netdev->priv;
4945
4946 if (pci_enable_device(pdev)) {
4947 printk(KERN_ERR "e1000: Cannot re-enable PCI device after reset.\n");
4948 return PCI_ERS_RESULT_DISCONNECT;
4949 }
4950 pci_set_master(pdev);
4951
4952 pci_enable_wake(pdev, PCI_D3hot, 0);
4953 pci_enable_wake(pdev, PCI_D3cold, 0);
4954
4955 e1000_reset(adapter);
4956 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
4957
4958 return PCI_ERS_RESULT_RECOVERED;
4959 }
4960
4961 /**
4962 * e1000_io_resume - called when traffic can start flowing again.
4963 * @pdev: Pointer to PCI device
4964 *
4965 * This callback is called when the error recovery driver tells us that
4966 * its OK to resume normal operation. Implementation resembles the
4967 * second-half of the e1000_resume routine.
4968 */
4969 static void e1000_io_resume(struct pci_dev *pdev)
4970 {
4971 struct net_device *netdev = pci_get_drvdata(pdev);
4972 struct e1000_adapter *adapter = netdev->priv;
4973 uint32_t manc, swsm;
4974
4975 if (netif_running(netdev)) {
4976 if (e1000_up(adapter)) {
4977 printk("e1000: can't bring device back up after reset\n");
4978 return;
4979 }
4980 }
4981
4982 netif_device_attach(netdev);
4983
4984 if (adapter->hw.mac_type >= e1000_82540 &&
4985 adapter->hw.mac_type < e1000_82571 &&
4986 adapter->hw.media_type == e1000_media_type_copper) {
4987 manc = E1000_READ_REG(&adapter->hw, MANC);
4988 manc &= ~(E1000_MANC_ARP_EN);
4989 E1000_WRITE_REG(&adapter->hw, MANC, manc);
4990 }
4991
4992 switch (adapter->hw.mac_type) {
4993 case e1000_82573:
4994 swsm = E1000_READ_REG(&adapter->hw, SWSM);
4995 E1000_WRITE_REG(&adapter->hw, SWSM,
4996 swsm | E1000_SWSM_DRV_LOAD);
4997 break;
4998 default:
4999 break;
5000 }
5001
5002 if (netif_running(netdev))
5003 mod_timer(&adapter->watchdog_timer, jiffies);
5004 }
5005
5006 /* e1000_main.c */
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