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1 /*******************************************************************************
2
3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27 *******************************************************************************/
28
29 #include "e1000.h"
30 #include <net/ip6_checksum.h>
31
32 char e1000_driver_name[] = "e1000";
33 static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
34 #ifndef CONFIG_E1000_NAPI
35 #define DRIVERNAPI
36 #else
37 #define DRIVERNAPI "-NAPI"
38 #endif
39 #define DRV_VERSION "7.3.15-k2"DRIVERNAPI
40 char e1000_driver_version[] = DRV_VERSION;
41 static char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
42
43 /* e1000_pci_tbl - PCI Device ID Table
44 *
45 * Last entry must be all 0s
46 *
47 * Macro expands to...
48 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
49 */
50 static struct pci_device_id e1000_pci_tbl[] = {
51 INTEL_E1000_ETHERNET_DEVICE(0x1000),
52 INTEL_E1000_ETHERNET_DEVICE(0x1001),
53 INTEL_E1000_ETHERNET_DEVICE(0x1004),
54 INTEL_E1000_ETHERNET_DEVICE(0x1008),
55 INTEL_E1000_ETHERNET_DEVICE(0x1009),
56 INTEL_E1000_ETHERNET_DEVICE(0x100C),
57 INTEL_E1000_ETHERNET_DEVICE(0x100D),
58 INTEL_E1000_ETHERNET_DEVICE(0x100E),
59 INTEL_E1000_ETHERNET_DEVICE(0x100F),
60 INTEL_E1000_ETHERNET_DEVICE(0x1010),
61 INTEL_E1000_ETHERNET_DEVICE(0x1011),
62 INTEL_E1000_ETHERNET_DEVICE(0x1012),
63 INTEL_E1000_ETHERNET_DEVICE(0x1013),
64 INTEL_E1000_ETHERNET_DEVICE(0x1014),
65 INTEL_E1000_ETHERNET_DEVICE(0x1015),
66 INTEL_E1000_ETHERNET_DEVICE(0x1016),
67 INTEL_E1000_ETHERNET_DEVICE(0x1017),
68 INTEL_E1000_ETHERNET_DEVICE(0x1018),
69 INTEL_E1000_ETHERNET_DEVICE(0x1019),
70 INTEL_E1000_ETHERNET_DEVICE(0x101A),
71 INTEL_E1000_ETHERNET_DEVICE(0x101D),
72 INTEL_E1000_ETHERNET_DEVICE(0x101E),
73 INTEL_E1000_ETHERNET_DEVICE(0x1026),
74 INTEL_E1000_ETHERNET_DEVICE(0x1027),
75 INTEL_E1000_ETHERNET_DEVICE(0x1028),
76 INTEL_E1000_ETHERNET_DEVICE(0x1049),
77 INTEL_E1000_ETHERNET_DEVICE(0x104A),
78 INTEL_E1000_ETHERNET_DEVICE(0x104B),
79 INTEL_E1000_ETHERNET_DEVICE(0x104C),
80 INTEL_E1000_ETHERNET_DEVICE(0x104D),
81 INTEL_E1000_ETHERNET_DEVICE(0x105E),
82 INTEL_E1000_ETHERNET_DEVICE(0x105F),
83 INTEL_E1000_ETHERNET_DEVICE(0x1060),
84 INTEL_E1000_ETHERNET_DEVICE(0x1075),
85 INTEL_E1000_ETHERNET_DEVICE(0x1076),
86 INTEL_E1000_ETHERNET_DEVICE(0x1077),
87 INTEL_E1000_ETHERNET_DEVICE(0x1078),
88 INTEL_E1000_ETHERNET_DEVICE(0x1079),
89 INTEL_E1000_ETHERNET_DEVICE(0x107A),
90 INTEL_E1000_ETHERNET_DEVICE(0x107B),
91 INTEL_E1000_ETHERNET_DEVICE(0x107C),
92 INTEL_E1000_ETHERNET_DEVICE(0x107D),
93 INTEL_E1000_ETHERNET_DEVICE(0x107E),
94 INTEL_E1000_ETHERNET_DEVICE(0x107F),
95 INTEL_E1000_ETHERNET_DEVICE(0x108A),
96 INTEL_E1000_ETHERNET_DEVICE(0x108B),
97 INTEL_E1000_ETHERNET_DEVICE(0x108C),
98 INTEL_E1000_ETHERNET_DEVICE(0x1096),
99 INTEL_E1000_ETHERNET_DEVICE(0x1098),
100 INTEL_E1000_ETHERNET_DEVICE(0x1099),
101 INTEL_E1000_ETHERNET_DEVICE(0x109A),
102 INTEL_E1000_ETHERNET_DEVICE(0x10A4),
103 INTEL_E1000_ETHERNET_DEVICE(0x10B5),
104 INTEL_E1000_ETHERNET_DEVICE(0x10B9),
105 INTEL_E1000_ETHERNET_DEVICE(0x10BA),
106 INTEL_E1000_ETHERNET_DEVICE(0x10BB),
107 INTEL_E1000_ETHERNET_DEVICE(0x10BC),
108 INTEL_E1000_ETHERNET_DEVICE(0x10C4),
109 INTEL_E1000_ETHERNET_DEVICE(0x10C5),
110 /* required last entry */
111 {0,}
112 };
113
114 MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
115
116 int e1000_up(struct e1000_adapter *adapter);
117 void e1000_down(struct e1000_adapter *adapter);
118 void e1000_reinit_locked(struct e1000_adapter *adapter);
119 void e1000_reset(struct e1000_adapter *adapter);
120 int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
121 int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
122 int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
123 void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
124 void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
125 static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
126 struct e1000_tx_ring *txdr);
127 static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
128 struct e1000_rx_ring *rxdr);
129 static void e1000_free_tx_resources(struct e1000_adapter *adapter,
130 struct e1000_tx_ring *tx_ring);
131 static void e1000_free_rx_resources(struct e1000_adapter *adapter,
132 struct e1000_rx_ring *rx_ring);
133 void e1000_update_stats(struct e1000_adapter *adapter);
134
135 static int e1000_init_module(void);
136 static void e1000_exit_module(void);
137 static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
138 static void __devexit e1000_remove(struct pci_dev *pdev);
139 static int e1000_alloc_queues(struct e1000_adapter *adapter);
140 static int e1000_sw_init(struct e1000_adapter *adapter);
141 static int e1000_open(struct net_device *netdev);
142 static int e1000_close(struct net_device *netdev);
143 static void e1000_configure_tx(struct e1000_adapter *adapter);
144 static void e1000_configure_rx(struct e1000_adapter *adapter);
145 static void e1000_setup_rctl(struct e1000_adapter *adapter);
146 static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
147 static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
148 static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
149 struct e1000_tx_ring *tx_ring);
150 static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
151 struct e1000_rx_ring *rx_ring);
152 static void e1000_set_multi(struct net_device *netdev);
153 static void e1000_update_phy_info(unsigned long data);
154 static void e1000_watchdog(unsigned long data);
155 static void e1000_82547_tx_fifo_stall(unsigned long data);
156 static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
157 static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
158 static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
159 static int e1000_set_mac(struct net_device *netdev, void *p);
160 static irqreturn_t e1000_intr(int irq, void *data);
161 #ifdef CONFIG_PCI_MSI
162 static irqreturn_t e1000_intr_msi(int irq, void *data);
163 #endif
164 static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter,
165 struct e1000_tx_ring *tx_ring);
166 #ifdef CONFIG_E1000_NAPI
167 static int e1000_clean(struct net_device *poll_dev, int *budget);
168 static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
169 struct e1000_rx_ring *rx_ring,
170 int *work_done, int work_to_do);
171 static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
172 struct e1000_rx_ring *rx_ring,
173 int *work_done, int work_to_do);
174 #else
175 static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
176 struct e1000_rx_ring *rx_ring);
177 static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
178 struct e1000_rx_ring *rx_ring);
179 #endif
180 static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
181 struct e1000_rx_ring *rx_ring,
182 int cleaned_count);
183 static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
184 struct e1000_rx_ring *rx_ring,
185 int cleaned_count);
186 static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
187 static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
188 int cmd);
189 void e1000_set_ethtool_ops(struct net_device *netdev);
190 static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
191 static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
192 static void e1000_tx_timeout(struct net_device *dev);
193 static void e1000_reset_task(struct net_device *dev);
194 static void e1000_smartspeed(struct e1000_adapter *adapter);
195 static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
196 struct sk_buff *skb);
197
198 static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
199 static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
200 static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
201 static void e1000_restore_vlan(struct e1000_adapter *adapter);
202
203 static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
204 #ifdef CONFIG_PM
205 static int e1000_resume(struct pci_dev *pdev);
206 #endif
207 static void e1000_shutdown(struct pci_dev *pdev);
208
209 #ifdef CONFIG_NET_POLL_CONTROLLER
210 /* for netdump / net console */
211 static void e1000_netpoll (struct net_device *netdev);
212 #endif
213
214 extern void e1000_check_options(struct e1000_adapter *adapter);
215
216 static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
217 pci_channel_state_t state);
218 static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev);
219 static void e1000_io_resume(struct pci_dev *pdev);
220
221 static struct pci_error_handlers e1000_err_handler = {
222 .error_detected = e1000_io_error_detected,
223 .slot_reset = e1000_io_slot_reset,
224 .resume = e1000_io_resume,
225 };
226
227 static struct pci_driver e1000_driver = {
228 .name = e1000_driver_name,
229 .id_table = e1000_pci_tbl,
230 .probe = e1000_probe,
231 .remove = __devexit_p(e1000_remove),
232 #ifdef CONFIG_PM
233 /* Power Managment Hooks */
234 .suspend = e1000_suspend,
235 .resume = e1000_resume,
236 #endif
237 .shutdown = e1000_shutdown,
238 .err_handler = &e1000_err_handler
239 };
240
241 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
242 MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
243 MODULE_LICENSE("GPL");
244 MODULE_VERSION(DRV_VERSION);
245
246 static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
247 module_param(debug, int, 0);
248 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
249
250 /**
251 * e1000_init_module - Driver Registration Routine
252 *
253 * e1000_init_module is the first routine called when the driver is
254 * loaded. All it does is register with the PCI subsystem.
255 **/
256
257 static int __init
258 e1000_init_module(void)
259 {
260 int ret;
261 printk(KERN_INFO "%s - version %s\n",
262 e1000_driver_string, e1000_driver_version);
263
264 printk(KERN_INFO "%s\n", e1000_copyright);
265
266 ret = pci_register_driver(&e1000_driver);
267
268 return ret;
269 }
270
271 module_init(e1000_init_module);
272
273 /**
274 * e1000_exit_module - Driver Exit Cleanup Routine
275 *
276 * e1000_exit_module is called just before the driver is removed
277 * from memory.
278 **/
279
280 static void __exit
281 e1000_exit_module(void)
282 {
283 pci_unregister_driver(&e1000_driver);
284 }
285
286 module_exit(e1000_exit_module);
287
288 static int e1000_request_irq(struct e1000_adapter *adapter)
289 {
290 struct net_device *netdev = adapter->netdev;
291 int flags, err = 0;
292
293 flags = IRQF_SHARED;
294 #ifdef CONFIG_PCI_MSI
295 if (adapter->hw.mac_type >= e1000_82571) {
296 adapter->have_msi = TRUE;
297 if ((err = pci_enable_msi(adapter->pdev))) {
298 DPRINTK(PROBE, ERR,
299 "Unable to allocate MSI interrupt Error: %d\n", err);
300 adapter->have_msi = FALSE;
301 }
302 }
303 if (adapter->have_msi) {
304 flags &= ~IRQF_SHARED;
305 err = request_irq(adapter->pdev->irq, &e1000_intr_msi, flags,
306 netdev->name, netdev);
307 if (err)
308 DPRINTK(PROBE, ERR,
309 "Unable to allocate interrupt Error: %d\n", err);
310 } else
311 #endif
312 if ((err = request_irq(adapter->pdev->irq, &e1000_intr, flags,
313 netdev->name, netdev)))
314 DPRINTK(PROBE, ERR,
315 "Unable to allocate interrupt Error: %d\n", err);
316
317 return err;
318 }
319
320 static void e1000_free_irq(struct e1000_adapter *adapter)
321 {
322 struct net_device *netdev = adapter->netdev;
323
324 free_irq(adapter->pdev->irq, netdev);
325
326 #ifdef CONFIG_PCI_MSI
327 if (adapter->have_msi)
328 pci_disable_msi(adapter->pdev);
329 #endif
330 }
331
332 /**
333 * e1000_irq_disable - Mask off interrupt generation on the NIC
334 * @adapter: board private structure
335 **/
336
337 static void
338 e1000_irq_disable(struct e1000_adapter *adapter)
339 {
340 atomic_inc(&adapter->irq_sem);
341 E1000_WRITE_REG(&adapter->hw, IMC, ~0);
342 E1000_WRITE_FLUSH(&adapter->hw);
343 synchronize_irq(adapter->pdev->irq);
344 }
345
346 /**
347 * e1000_irq_enable - Enable default interrupt generation settings
348 * @adapter: board private structure
349 **/
350
351 static void
352 e1000_irq_enable(struct e1000_adapter *adapter)
353 {
354 if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
355 E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
356 E1000_WRITE_FLUSH(&adapter->hw);
357 }
358 }
359
360 static void
361 e1000_update_mng_vlan(struct e1000_adapter *adapter)
362 {
363 struct net_device *netdev = adapter->netdev;
364 uint16_t vid = adapter->hw.mng_cookie.vlan_id;
365 uint16_t old_vid = adapter->mng_vlan_id;
366 if (adapter->vlgrp) {
367 if (!adapter->vlgrp->vlan_devices[vid]) {
368 if (adapter->hw.mng_cookie.status &
369 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
370 e1000_vlan_rx_add_vid(netdev, vid);
371 adapter->mng_vlan_id = vid;
372 } else
373 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
374
375 if ((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
376 (vid != old_vid) &&
377 !adapter->vlgrp->vlan_devices[old_vid])
378 e1000_vlan_rx_kill_vid(netdev, old_vid);
379 } else
380 adapter->mng_vlan_id = vid;
381 }
382 }
383
384 /**
385 * e1000_release_hw_control - release control of the h/w to f/w
386 * @adapter: address of board private structure
387 *
388 * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
389 * For ASF and Pass Through versions of f/w this means that the
390 * driver is no longer loaded. For AMT version (only with 82573) i
391 * of the f/w this means that the network i/f is closed.
392 *
393 **/
394
395 static void
396 e1000_release_hw_control(struct e1000_adapter *adapter)
397 {
398 uint32_t ctrl_ext;
399 uint32_t swsm;
400 uint32_t extcnf;
401
402 /* Let firmware taken over control of h/w */
403 switch (adapter->hw.mac_type) {
404 case e1000_82571:
405 case e1000_82572:
406 case e1000_80003es2lan:
407 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
408 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
409 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
410 break;
411 case e1000_82573:
412 swsm = E1000_READ_REG(&adapter->hw, SWSM);
413 E1000_WRITE_REG(&adapter->hw, SWSM,
414 swsm & ~E1000_SWSM_DRV_LOAD);
415 case e1000_ich8lan:
416 extcnf = E1000_READ_REG(&adapter->hw, CTRL_EXT);
417 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
418 extcnf & ~E1000_CTRL_EXT_DRV_LOAD);
419 break;
420 default:
421 break;
422 }
423 }
424
425 /**
426 * e1000_get_hw_control - get control of the h/w from f/w
427 * @adapter: address of board private structure
428 *
429 * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
430 * For ASF and Pass Through versions of f/w this means that
431 * the driver is loaded. For AMT version (only with 82573)
432 * of the f/w this means that the network i/f is open.
433 *
434 **/
435
436 static void
437 e1000_get_hw_control(struct e1000_adapter *adapter)
438 {
439 uint32_t ctrl_ext;
440 uint32_t swsm;
441 uint32_t extcnf;
442
443 /* Let firmware know the driver has taken over */
444 switch (adapter->hw.mac_type) {
445 case e1000_82571:
446 case e1000_82572:
447 case e1000_80003es2lan:
448 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
449 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
450 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
451 break;
452 case e1000_82573:
453 swsm = E1000_READ_REG(&adapter->hw, SWSM);
454 E1000_WRITE_REG(&adapter->hw, SWSM,
455 swsm | E1000_SWSM_DRV_LOAD);
456 break;
457 case e1000_ich8lan:
458 extcnf = E1000_READ_REG(&adapter->hw, EXTCNF_CTRL);
459 E1000_WRITE_REG(&adapter->hw, EXTCNF_CTRL,
460 extcnf | E1000_EXTCNF_CTRL_SWFLAG);
461 break;
462 default:
463 break;
464 }
465 }
466
467 int
468 e1000_up(struct e1000_adapter *adapter)
469 {
470 struct net_device *netdev = adapter->netdev;
471 int i;
472
473 /* hardware has been reset, we need to reload some things */
474
475 e1000_set_multi(netdev);
476
477 e1000_restore_vlan(adapter);
478
479 e1000_configure_tx(adapter);
480 e1000_setup_rctl(adapter);
481 e1000_configure_rx(adapter);
482 /* call E1000_DESC_UNUSED which always leaves
483 * at least 1 descriptor unused to make sure
484 * next_to_use != next_to_clean */
485 for (i = 0; i < adapter->num_rx_queues; i++) {
486 struct e1000_rx_ring *ring = &adapter->rx_ring[i];
487 adapter->alloc_rx_buf(adapter, ring,
488 E1000_DESC_UNUSED(ring));
489 }
490
491 adapter->tx_queue_len = netdev->tx_queue_len;
492
493 #ifdef CONFIG_E1000_NAPI
494 netif_poll_enable(netdev);
495 #endif
496 e1000_irq_enable(adapter);
497
498 clear_bit(__E1000_DOWN, &adapter->flags);
499
500 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
501 return 0;
502 }
503
504 /**
505 * e1000_power_up_phy - restore link in case the phy was powered down
506 * @adapter: address of board private structure
507 *
508 * The phy may be powered down to save power and turn off link when the
509 * driver is unloaded and wake on lan is not enabled (among others)
510 * *** this routine MUST be followed by a call to e1000_reset ***
511 *
512 **/
513
514 void e1000_power_up_phy(struct e1000_adapter *adapter)
515 {
516 uint16_t mii_reg = 0;
517
518 /* Just clear the power down bit to wake the phy back up */
519 if (adapter->hw.media_type == e1000_media_type_copper) {
520 /* according to the manual, the phy will retain its
521 * settings across a power-down/up cycle */
522 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
523 mii_reg &= ~MII_CR_POWER_DOWN;
524 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
525 }
526 }
527
528 static void e1000_power_down_phy(struct e1000_adapter *adapter)
529 {
530 /* Power down the PHY so no link is implied when interface is down *
531 * The PHY cannot be powered down if any of the following is TRUE *
532 * (a) WoL is enabled
533 * (b) AMT is active
534 * (c) SoL/IDER session is active */
535 if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
536 adapter->hw.media_type == e1000_media_type_copper) {
537 uint16_t mii_reg = 0;
538
539 switch (adapter->hw.mac_type) {
540 case e1000_82540:
541 case e1000_82545:
542 case e1000_82545_rev_3:
543 case e1000_82546:
544 case e1000_82546_rev_3:
545 case e1000_82541:
546 case e1000_82541_rev_2:
547 case e1000_82547:
548 case e1000_82547_rev_2:
549 if (E1000_READ_REG(&adapter->hw, MANC) &
550 E1000_MANC_SMBUS_EN)
551 goto out;
552 break;
553 case e1000_82571:
554 case e1000_82572:
555 case e1000_82573:
556 case e1000_80003es2lan:
557 case e1000_ich8lan:
558 if (e1000_check_mng_mode(&adapter->hw) ||
559 e1000_check_phy_reset_block(&adapter->hw))
560 goto out;
561 break;
562 default:
563 goto out;
564 }
565 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
566 mii_reg |= MII_CR_POWER_DOWN;
567 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
568 mdelay(1);
569 }
570 out:
571 return;
572 }
573
574 void
575 e1000_down(struct e1000_adapter *adapter)
576 {
577 struct net_device *netdev = adapter->netdev;
578
579 /* signal that we're down so the interrupt handler does not
580 * reschedule our watchdog timer */
581 set_bit(__E1000_DOWN, &adapter->flags);
582
583 e1000_irq_disable(adapter);
584
585 del_timer_sync(&adapter->tx_fifo_stall_timer);
586 del_timer_sync(&adapter->watchdog_timer);
587 del_timer_sync(&adapter->phy_info_timer);
588
589 #ifdef CONFIG_E1000_NAPI
590 netif_poll_disable(netdev);
591 #endif
592 netdev->tx_queue_len = adapter->tx_queue_len;
593 adapter->link_speed = 0;
594 adapter->link_duplex = 0;
595 netif_carrier_off(netdev);
596 netif_stop_queue(netdev);
597
598 e1000_reset(adapter);
599 e1000_clean_all_tx_rings(adapter);
600 e1000_clean_all_rx_rings(adapter);
601 }
602
603 void
604 e1000_reinit_locked(struct e1000_adapter *adapter)
605 {
606 WARN_ON(in_interrupt());
607 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
608 msleep(1);
609 e1000_down(adapter);
610 e1000_up(adapter);
611 clear_bit(__E1000_RESETTING, &adapter->flags);
612 }
613
614 void
615 e1000_reset(struct e1000_adapter *adapter)
616 {
617 uint32_t pba, manc;
618 uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
619
620 /* Repartition Pba for greater than 9k mtu
621 * To take effect CTRL.RST is required.
622 */
623
624 switch (adapter->hw.mac_type) {
625 case e1000_82547:
626 case e1000_82547_rev_2:
627 pba = E1000_PBA_30K;
628 break;
629 case e1000_82571:
630 case e1000_82572:
631 case e1000_80003es2lan:
632 pba = E1000_PBA_38K;
633 break;
634 case e1000_82573:
635 pba = E1000_PBA_12K;
636 break;
637 case e1000_ich8lan:
638 pba = E1000_PBA_8K;
639 break;
640 default:
641 pba = E1000_PBA_48K;
642 break;
643 }
644
645 if ((adapter->hw.mac_type != e1000_82573) &&
646 (adapter->netdev->mtu > E1000_RXBUFFER_8192))
647 pba -= 8; /* allocate more FIFO for Tx */
648
649
650 if (adapter->hw.mac_type == e1000_82547) {
651 adapter->tx_fifo_head = 0;
652 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
653 adapter->tx_fifo_size =
654 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
655 atomic_set(&adapter->tx_fifo_stall, 0);
656 }
657
658 E1000_WRITE_REG(&adapter->hw, PBA, pba);
659
660 /* flow control settings */
661 /* Set the FC high water mark to 90% of the FIFO size.
662 * Required to clear last 3 LSB */
663 fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
664 /* We can't use 90% on small FIFOs because the remainder
665 * would be less than 1 full frame. In this case, we size
666 * it to allow at least a full frame above the high water
667 * mark. */
668 if (pba < E1000_PBA_16K)
669 fc_high_water_mark = (pba * 1024) - 1600;
670
671 adapter->hw.fc_high_water = fc_high_water_mark;
672 adapter->hw.fc_low_water = fc_high_water_mark - 8;
673 if (adapter->hw.mac_type == e1000_80003es2lan)
674 adapter->hw.fc_pause_time = 0xFFFF;
675 else
676 adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
677 adapter->hw.fc_send_xon = 1;
678 adapter->hw.fc = adapter->hw.original_fc;
679
680 /* Allow time for pending master requests to run */
681 e1000_reset_hw(&adapter->hw);
682 if (adapter->hw.mac_type >= e1000_82544)
683 E1000_WRITE_REG(&adapter->hw, WUC, 0);
684
685 if (e1000_init_hw(&adapter->hw))
686 DPRINTK(PROBE, ERR, "Hardware Error\n");
687 e1000_update_mng_vlan(adapter);
688 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
689 E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
690
691 e1000_reset_adaptive(&adapter->hw);
692 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
693
694 if (!adapter->smart_power_down &&
695 (adapter->hw.mac_type == e1000_82571 ||
696 adapter->hw.mac_type == e1000_82572)) {
697 uint16_t phy_data = 0;
698 /* speed up time to link by disabling smart power down, ignore
699 * the return value of this function because there is nothing
700 * different we would do if it failed */
701 e1000_read_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
702 &phy_data);
703 phy_data &= ~IGP02E1000_PM_SPD;
704 e1000_write_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
705 phy_data);
706 }
707
708 if ((adapter->en_mng_pt) &&
709 (adapter->hw.mac_type >= e1000_82540) &&
710 (adapter->hw.mac_type < e1000_82571) &&
711 (adapter->hw.media_type == e1000_media_type_copper)) {
712 manc = E1000_READ_REG(&adapter->hw, MANC);
713 manc |= (E1000_MANC_ARP_EN | E1000_MANC_EN_MNG2HOST);
714 E1000_WRITE_REG(&adapter->hw, MANC, manc);
715 }
716 }
717
718 /**
719 * e1000_probe - Device Initialization Routine
720 * @pdev: PCI device information struct
721 * @ent: entry in e1000_pci_tbl
722 *
723 * Returns 0 on success, negative on failure
724 *
725 * e1000_probe initializes an adapter identified by a pci_dev structure.
726 * The OS initialization, configuring of the adapter private structure,
727 * and a hardware reset occur.
728 **/
729
730 static int __devinit
731 e1000_probe(struct pci_dev *pdev,
732 const struct pci_device_id *ent)
733 {
734 struct net_device *netdev;
735 struct e1000_adapter *adapter;
736 unsigned long mmio_start, mmio_len;
737 unsigned long flash_start, flash_len;
738
739 static int cards_found = 0;
740 static int global_quad_port_a = 0; /* global ksp3 port a indication */
741 int i, err, pci_using_dac;
742 uint16_t eeprom_data = 0;
743 uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
744 if ((err = pci_enable_device(pdev)))
745 return err;
746
747 if (!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK)) &&
748 !(err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))) {
749 pci_using_dac = 1;
750 } else {
751 if ((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK)) &&
752 (err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))) {
753 E1000_ERR("No usable DMA configuration, aborting\n");
754 goto err_dma;
755 }
756 pci_using_dac = 0;
757 }
758
759 if ((err = pci_request_regions(pdev, e1000_driver_name)))
760 goto err_pci_reg;
761
762 pci_set_master(pdev);
763
764 err = -ENOMEM;
765 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
766 if (!netdev)
767 goto err_alloc_etherdev;
768
769 SET_MODULE_OWNER(netdev);
770 SET_NETDEV_DEV(netdev, &pdev->dev);
771
772 pci_set_drvdata(pdev, netdev);
773 adapter = netdev_priv(netdev);
774 adapter->netdev = netdev;
775 adapter->pdev = pdev;
776 adapter->hw.back = adapter;
777 adapter->msg_enable = (1 << debug) - 1;
778
779 mmio_start = pci_resource_start(pdev, BAR_0);
780 mmio_len = pci_resource_len(pdev, BAR_0);
781
782 err = -EIO;
783 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
784 if (!adapter->hw.hw_addr)
785 goto err_ioremap;
786
787 for (i = BAR_1; i <= BAR_5; i++) {
788 if (pci_resource_len(pdev, i) == 0)
789 continue;
790 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
791 adapter->hw.io_base = pci_resource_start(pdev, i);
792 break;
793 }
794 }
795
796 netdev->open = &e1000_open;
797 netdev->stop = &e1000_close;
798 netdev->hard_start_xmit = &e1000_xmit_frame;
799 netdev->get_stats = &e1000_get_stats;
800 netdev->set_multicast_list = &e1000_set_multi;
801 netdev->set_mac_address = &e1000_set_mac;
802 netdev->change_mtu = &e1000_change_mtu;
803 netdev->do_ioctl = &e1000_ioctl;
804 e1000_set_ethtool_ops(netdev);
805 netdev->tx_timeout = &e1000_tx_timeout;
806 netdev->watchdog_timeo = 5 * HZ;
807 #ifdef CONFIG_E1000_NAPI
808 netdev->poll = &e1000_clean;
809 netdev->weight = 64;
810 #endif
811 netdev->vlan_rx_register = e1000_vlan_rx_register;
812 netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
813 netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
814 #ifdef CONFIG_NET_POLL_CONTROLLER
815 netdev->poll_controller = e1000_netpoll;
816 #endif
817 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
818
819 netdev->mem_start = mmio_start;
820 netdev->mem_end = mmio_start + mmio_len;
821 netdev->base_addr = adapter->hw.io_base;
822
823 adapter->bd_number = cards_found;
824
825 /* setup the private structure */
826
827 if ((err = e1000_sw_init(adapter)))
828 goto err_sw_init;
829
830 err = -EIO;
831 /* Flash BAR mapping must happen after e1000_sw_init
832 * because it depends on mac_type */
833 if ((adapter->hw.mac_type == e1000_ich8lan) &&
834 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
835 flash_start = pci_resource_start(pdev, 1);
836 flash_len = pci_resource_len(pdev, 1);
837 adapter->hw.flash_address = ioremap(flash_start, flash_len);
838 if (!adapter->hw.flash_address)
839 goto err_flashmap;
840 }
841
842 if (e1000_check_phy_reset_block(&adapter->hw))
843 DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
844
845 if (adapter->hw.mac_type >= e1000_82543) {
846 netdev->features = NETIF_F_SG |
847 NETIF_F_HW_CSUM |
848 NETIF_F_HW_VLAN_TX |
849 NETIF_F_HW_VLAN_RX |
850 NETIF_F_HW_VLAN_FILTER;
851 if (adapter->hw.mac_type == e1000_ich8lan)
852 netdev->features &= ~NETIF_F_HW_VLAN_FILTER;
853 }
854
855 #ifdef NETIF_F_TSO
856 if ((adapter->hw.mac_type >= e1000_82544) &&
857 (adapter->hw.mac_type != e1000_82547))
858 netdev->features |= NETIF_F_TSO;
859
860 #ifdef NETIF_F_TSO6
861 if (adapter->hw.mac_type > e1000_82547_rev_2)
862 netdev->features |= NETIF_F_TSO6;
863 #endif
864 #endif
865 if (pci_using_dac)
866 netdev->features |= NETIF_F_HIGHDMA;
867
868 netdev->features |= NETIF_F_LLTX;
869
870 adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
871
872 /* initialize eeprom parameters */
873
874 if (e1000_init_eeprom_params(&adapter->hw)) {
875 E1000_ERR("EEPROM initialization failed\n");
876 goto err_eeprom;
877 }
878
879 /* before reading the EEPROM, reset the controller to
880 * put the device in a known good starting state */
881
882 e1000_reset_hw(&adapter->hw);
883
884 /* make sure the EEPROM is good */
885
886 if (e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
887 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
888 goto err_eeprom;
889 }
890
891 /* copy the MAC address out of the EEPROM */
892
893 if (e1000_read_mac_addr(&adapter->hw))
894 DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
895 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
896 memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
897
898 if (!is_valid_ether_addr(netdev->perm_addr)) {
899 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
900 goto err_eeprom;
901 }
902
903 e1000_get_bus_info(&adapter->hw);
904
905 init_timer(&adapter->tx_fifo_stall_timer);
906 adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
907 adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
908
909 init_timer(&adapter->watchdog_timer);
910 adapter->watchdog_timer.function = &e1000_watchdog;
911 adapter->watchdog_timer.data = (unsigned long) adapter;
912
913 init_timer(&adapter->phy_info_timer);
914 adapter->phy_info_timer.function = &e1000_update_phy_info;
915 adapter->phy_info_timer.data = (unsigned long) adapter;
916
917 INIT_WORK(&adapter->reset_task,
918 (void (*)(void *))e1000_reset_task, netdev);
919
920 e1000_check_options(adapter);
921
922 /* Initial Wake on LAN setting
923 * If APM wake is enabled in the EEPROM,
924 * enable the ACPI Magic Packet filter
925 */
926
927 switch (adapter->hw.mac_type) {
928 case e1000_82542_rev2_0:
929 case e1000_82542_rev2_1:
930 case e1000_82543:
931 break;
932 case e1000_82544:
933 e1000_read_eeprom(&adapter->hw,
934 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
935 eeprom_apme_mask = E1000_EEPROM_82544_APM;
936 break;
937 case e1000_ich8lan:
938 e1000_read_eeprom(&adapter->hw,
939 EEPROM_INIT_CONTROL1_REG, 1, &eeprom_data);
940 eeprom_apme_mask = E1000_EEPROM_ICH8_APME;
941 break;
942 case e1000_82546:
943 case e1000_82546_rev_3:
944 case e1000_82571:
945 case e1000_80003es2lan:
946 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1){
947 e1000_read_eeprom(&adapter->hw,
948 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
949 break;
950 }
951 /* Fall Through */
952 default:
953 e1000_read_eeprom(&adapter->hw,
954 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
955 break;
956 }
957 if (eeprom_data & eeprom_apme_mask)
958 adapter->eeprom_wol |= E1000_WUFC_MAG;
959
960 /* now that we have the eeprom settings, apply the special cases
961 * where the eeprom may be wrong or the board simply won't support
962 * wake on lan on a particular port */
963 switch (pdev->device) {
964 case E1000_DEV_ID_82546GB_PCIE:
965 adapter->eeprom_wol = 0;
966 break;
967 case E1000_DEV_ID_82546EB_FIBER:
968 case E1000_DEV_ID_82546GB_FIBER:
969 case E1000_DEV_ID_82571EB_FIBER:
970 /* Wake events only supported on port A for dual fiber
971 * regardless of eeprom setting */
972 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1)
973 adapter->eeprom_wol = 0;
974 break;
975 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
976 case E1000_DEV_ID_82571EB_QUAD_COPPER:
977 case E1000_DEV_ID_82571EB_QUAD_COPPER_LOWPROFILE:
978 /* if quad port adapter, disable WoL on all but port A */
979 if (global_quad_port_a != 0)
980 adapter->eeprom_wol = 0;
981 else
982 adapter->quad_port_a = 1;
983 /* Reset for multiple quad port adapters */
984 if (++global_quad_port_a == 4)
985 global_quad_port_a = 0;
986 break;
987 }
988
989 /* initialize the wol settings based on the eeprom settings */
990 adapter->wol = adapter->eeprom_wol;
991
992 /* print bus type/speed/width info */
993 {
994 struct e1000_hw *hw = &adapter->hw;
995 DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
996 ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
997 (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
998 ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
999 (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
1000 (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
1001 (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
1002 (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
1003 ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
1004 (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
1005 (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
1006 "32-bit"));
1007 }
1008
1009 for (i = 0; i < 6; i++)
1010 printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
1011
1012 /* reset the hardware with the new settings */
1013 e1000_reset(adapter);
1014
1015 /* If the controller is 82573 and f/w is AMT, do not set
1016 * DRV_LOAD until the interface is up. For all other cases,
1017 * let the f/w know that the h/w is now under the control
1018 * of the driver. */
1019 if (adapter->hw.mac_type != e1000_82573 ||
1020 !e1000_check_mng_mode(&adapter->hw))
1021 e1000_get_hw_control(adapter);
1022
1023 strcpy(netdev->name, "eth%d");
1024 if ((err = register_netdev(netdev)))
1025 goto err_register;
1026
1027 /* tell the stack to leave us alone until e1000_open() is called */
1028 netif_carrier_off(netdev);
1029 netif_stop_queue(netdev);
1030
1031 DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
1032
1033 cards_found++;
1034 return 0;
1035
1036 err_register:
1037 e1000_release_hw_control(adapter);
1038 err_eeprom:
1039 if (!e1000_check_phy_reset_block(&adapter->hw))
1040 e1000_phy_hw_reset(&adapter->hw);
1041
1042 if (adapter->hw.flash_address)
1043 iounmap(adapter->hw.flash_address);
1044 err_flashmap:
1045 #ifdef CONFIG_E1000_NAPI
1046 for (i = 0; i < adapter->num_rx_queues; i++)
1047 dev_put(&adapter->polling_netdev[i]);
1048 #endif
1049
1050 kfree(adapter->tx_ring);
1051 kfree(adapter->rx_ring);
1052 #ifdef CONFIG_E1000_NAPI
1053 kfree(adapter->polling_netdev);
1054 #endif
1055 err_sw_init:
1056 iounmap(adapter->hw.hw_addr);
1057 err_ioremap:
1058 free_netdev(netdev);
1059 err_alloc_etherdev:
1060 pci_release_regions(pdev);
1061 err_pci_reg:
1062 err_dma:
1063 pci_disable_device(pdev);
1064 return err;
1065 }
1066
1067 /**
1068 * e1000_remove - Device Removal Routine
1069 * @pdev: PCI device information struct
1070 *
1071 * e1000_remove is called by the PCI subsystem to alert the driver
1072 * that it should release a PCI device. The could be caused by a
1073 * Hot-Plug event, or because the driver is going to be removed from
1074 * memory.
1075 **/
1076
1077 static void __devexit
1078 e1000_remove(struct pci_dev *pdev)
1079 {
1080 struct net_device *netdev = pci_get_drvdata(pdev);
1081 struct e1000_adapter *adapter = netdev_priv(netdev);
1082 uint32_t manc;
1083 #ifdef CONFIG_E1000_NAPI
1084 int i;
1085 #endif
1086
1087 flush_scheduled_work();
1088
1089 if (adapter->hw.mac_type >= e1000_82540 &&
1090 adapter->hw.mac_type < e1000_82571 &&
1091 adapter->hw.media_type == e1000_media_type_copper) {
1092 manc = E1000_READ_REG(&adapter->hw, MANC);
1093 if (manc & E1000_MANC_SMBUS_EN) {
1094 manc |= E1000_MANC_ARP_EN;
1095 E1000_WRITE_REG(&adapter->hw, MANC, manc);
1096 }
1097 }
1098
1099 /* Release control of h/w to f/w. If f/w is AMT enabled, this
1100 * would have already happened in close and is redundant. */
1101 e1000_release_hw_control(adapter);
1102
1103 unregister_netdev(netdev);
1104 #ifdef CONFIG_E1000_NAPI
1105 for (i = 0; i < adapter->num_rx_queues; i++)
1106 dev_put(&adapter->polling_netdev[i]);
1107 #endif
1108
1109 if (!e1000_check_phy_reset_block(&adapter->hw))
1110 e1000_phy_hw_reset(&adapter->hw);
1111
1112 kfree(adapter->tx_ring);
1113 kfree(adapter->rx_ring);
1114 #ifdef CONFIG_E1000_NAPI
1115 kfree(adapter->polling_netdev);
1116 #endif
1117
1118 iounmap(adapter->hw.hw_addr);
1119 if (adapter->hw.flash_address)
1120 iounmap(adapter->hw.flash_address);
1121 pci_release_regions(pdev);
1122
1123 free_netdev(netdev);
1124
1125 pci_disable_device(pdev);
1126 }
1127
1128 /**
1129 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
1130 * @adapter: board private structure to initialize
1131 *
1132 * e1000_sw_init initializes the Adapter private data structure.
1133 * Fields are initialized based on PCI device information and
1134 * OS network device settings (MTU size).
1135 **/
1136
1137 static int __devinit
1138 e1000_sw_init(struct e1000_adapter *adapter)
1139 {
1140 struct e1000_hw *hw = &adapter->hw;
1141 struct net_device *netdev = adapter->netdev;
1142 struct pci_dev *pdev = adapter->pdev;
1143 #ifdef CONFIG_E1000_NAPI
1144 int i;
1145 #endif
1146
1147 /* PCI config space info */
1148
1149 hw->vendor_id = pdev->vendor;
1150 hw->device_id = pdev->device;
1151 hw->subsystem_vendor_id = pdev->subsystem_vendor;
1152 hw->subsystem_id = pdev->subsystem_device;
1153
1154 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
1155
1156 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
1157
1158 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1159 adapter->rx_ps_bsize0 = E1000_RXBUFFER_128;
1160 hw->max_frame_size = netdev->mtu +
1161 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
1162 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
1163
1164 /* identify the MAC */
1165
1166 if (e1000_set_mac_type(hw)) {
1167 DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
1168 return -EIO;
1169 }
1170
1171 switch (hw->mac_type) {
1172 default:
1173 break;
1174 case e1000_82541:
1175 case e1000_82547:
1176 case e1000_82541_rev_2:
1177 case e1000_82547_rev_2:
1178 hw->phy_init_script = 1;
1179 break;
1180 }
1181
1182 e1000_set_media_type(hw);
1183
1184 hw->wait_autoneg_complete = FALSE;
1185 hw->tbi_compatibility_en = TRUE;
1186 hw->adaptive_ifs = TRUE;
1187
1188 /* Copper options */
1189
1190 if (hw->media_type == e1000_media_type_copper) {
1191 hw->mdix = AUTO_ALL_MODES;
1192 hw->disable_polarity_correction = FALSE;
1193 hw->master_slave = E1000_MASTER_SLAVE;
1194 }
1195
1196 adapter->num_tx_queues = 1;
1197 adapter->num_rx_queues = 1;
1198
1199 if (e1000_alloc_queues(adapter)) {
1200 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
1201 return -ENOMEM;
1202 }
1203
1204 #ifdef CONFIG_E1000_NAPI
1205 for (i = 0; i < adapter->num_rx_queues; i++) {
1206 adapter->polling_netdev[i].priv = adapter;
1207 adapter->polling_netdev[i].poll = &e1000_clean;
1208 adapter->polling_netdev[i].weight = 64;
1209 dev_hold(&adapter->polling_netdev[i]);
1210 set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
1211 }
1212 spin_lock_init(&adapter->tx_queue_lock);
1213 #endif
1214
1215 atomic_set(&adapter->irq_sem, 1);
1216 spin_lock_init(&adapter->stats_lock);
1217
1218 set_bit(__E1000_DOWN, &adapter->flags);
1219
1220 return 0;
1221 }
1222
1223 /**
1224 * e1000_alloc_queues - Allocate memory for all rings
1225 * @adapter: board private structure to initialize
1226 *
1227 * We allocate one ring per queue at run-time since we don't know the
1228 * number of queues at compile-time. The polling_netdev array is
1229 * intended for Multiqueue, but should work fine with a single queue.
1230 **/
1231
1232 static int __devinit
1233 e1000_alloc_queues(struct e1000_adapter *adapter)
1234 {
1235 int size;
1236
1237 size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues;
1238 adapter->tx_ring = kmalloc(size, GFP_KERNEL);
1239 if (!adapter->tx_ring)
1240 return -ENOMEM;
1241 memset(adapter->tx_ring, 0, size);
1242
1243 size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues;
1244 adapter->rx_ring = kmalloc(size, GFP_KERNEL);
1245 if (!adapter->rx_ring) {
1246 kfree(adapter->tx_ring);
1247 return -ENOMEM;
1248 }
1249 memset(adapter->rx_ring, 0, size);
1250
1251 #ifdef CONFIG_E1000_NAPI
1252 size = sizeof(struct net_device) * adapter->num_rx_queues;
1253 adapter->polling_netdev = kmalloc(size, GFP_KERNEL);
1254 if (!adapter->polling_netdev) {
1255 kfree(adapter->tx_ring);
1256 kfree(adapter->rx_ring);
1257 return -ENOMEM;
1258 }
1259 memset(adapter->polling_netdev, 0, size);
1260 #endif
1261
1262 return E1000_SUCCESS;
1263 }
1264
1265 /**
1266 * e1000_open - Called when a network interface is made active
1267 * @netdev: network interface device structure
1268 *
1269 * Returns 0 on success, negative value on failure
1270 *
1271 * The open entry point is called when a network interface is made
1272 * active by the system (IFF_UP). At this point all resources needed
1273 * for transmit and receive operations are allocated, the interrupt
1274 * handler is registered with the OS, the watchdog timer is started,
1275 * and the stack is notified that the interface is ready.
1276 **/
1277
1278 static int
1279 e1000_open(struct net_device *netdev)
1280 {
1281 struct e1000_adapter *adapter = netdev_priv(netdev);
1282 int err;
1283
1284 /* disallow open during test */
1285 if (test_bit(__E1000_TESTING, &adapter->flags))
1286 return -EBUSY;
1287
1288 /* allocate transmit descriptors */
1289 if ((err = e1000_setup_all_tx_resources(adapter)))
1290 goto err_setup_tx;
1291
1292 /* allocate receive descriptors */
1293 if ((err = e1000_setup_all_rx_resources(adapter)))
1294 goto err_setup_rx;
1295
1296 err = e1000_request_irq(adapter);
1297 if (err)
1298 goto err_req_irq;
1299
1300 e1000_power_up_phy(adapter);
1301
1302 if ((err = e1000_up(adapter)))
1303 goto err_up;
1304 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
1305 if ((adapter->hw.mng_cookie.status &
1306 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1307 e1000_update_mng_vlan(adapter);
1308 }
1309
1310 /* If AMT is enabled, let the firmware know that the network
1311 * interface is now open */
1312 if (adapter->hw.mac_type == e1000_82573 &&
1313 e1000_check_mng_mode(&adapter->hw))
1314 e1000_get_hw_control(adapter);
1315
1316 return E1000_SUCCESS;
1317
1318 err_up:
1319 e1000_power_down_phy(adapter);
1320 e1000_free_irq(adapter);
1321 err_req_irq:
1322 e1000_free_all_rx_resources(adapter);
1323 err_setup_rx:
1324 e1000_free_all_tx_resources(adapter);
1325 err_setup_tx:
1326 e1000_reset(adapter);
1327
1328 return err;
1329 }
1330
1331 /**
1332 * e1000_close - Disables a network interface
1333 * @netdev: network interface device structure
1334 *
1335 * Returns 0, this is not allowed to fail
1336 *
1337 * The close entry point is called when an interface is de-activated
1338 * by the OS. The hardware is still under the drivers control, but
1339 * needs to be disabled. A global MAC reset is issued to stop the
1340 * hardware, and all transmit and receive resources are freed.
1341 **/
1342
1343 static int
1344 e1000_close(struct net_device *netdev)
1345 {
1346 struct e1000_adapter *adapter = netdev_priv(netdev);
1347
1348 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1349 e1000_down(adapter);
1350 e1000_power_down_phy(adapter);
1351 e1000_free_irq(adapter);
1352
1353 e1000_free_all_tx_resources(adapter);
1354 e1000_free_all_rx_resources(adapter);
1355
1356 /* kill manageability vlan ID if supported, but not if a vlan with
1357 * the same ID is registered on the host OS (let 8021q kill it) */
1358 if ((adapter->hw.mng_cookie.status &
1359 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
1360 !(adapter->vlgrp &&
1361 adapter->vlgrp->vlan_devices[adapter->mng_vlan_id])) {
1362 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1363 }
1364
1365 /* If AMT is enabled, let the firmware know that the network
1366 * interface is now closed */
1367 if (adapter->hw.mac_type == e1000_82573 &&
1368 e1000_check_mng_mode(&adapter->hw))
1369 e1000_release_hw_control(adapter);
1370
1371 return 0;
1372 }
1373
1374 /**
1375 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1376 * @adapter: address of board private structure
1377 * @start: address of beginning of memory
1378 * @len: length of memory
1379 **/
1380 static boolean_t
1381 e1000_check_64k_bound(struct e1000_adapter *adapter,
1382 void *start, unsigned long len)
1383 {
1384 unsigned long begin = (unsigned long) start;
1385 unsigned long end = begin + len;
1386
1387 /* First rev 82545 and 82546 need to not allow any memory
1388 * write location to cross 64k boundary due to errata 23 */
1389 if (adapter->hw.mac_type == e1000_82545 ||
1390 adapter->hw.mac_type == e1000_82546) {
1391 return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
1392 }
1393
1394 return TRUE;
1395 }
1396
1397 /**
1398 * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1399 * @adapter: board private structure
1400 * @txdr: tx descriptor ring (for a specific queue) to setup
1401 *
1402 * Return 0 on success, negative on failure
1403 **/
1404
1405 static int
1406 e1000_setup_tx_resources(struct e1000_adapter *adapter,
1407 struct e1000_tx_ring *txdr)
1408 {
1409 struct pci_dev *pdev = adapter->pdev;
1410 int size;
1411
1412 size = sizeof(struct e1000_buffer) * txdr->count;
1413 txdr->buffer_info = vmalloc(size);
1414 if (!txdr->buffer_info) {
1415 DPRINTK(PROBE, ERR,
1416 "Unable to allocate memory for the transmit descriptor ring\n");
1417 return -ENOMEM;
1418 }
1419 memset(txdr->buffer_info, 0, size);
1420
1421 /* round up to nearest 4K */
1422
1423 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
1424 E1000_ROUNDUP(txdr->size, 4096);
1425
1426 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
1427 if (!txdr->desc) {
1428 setup_tx_desc_die:
1429 vfree(txdr->buffer_info);
1430 DPRINTK(PROBE, ERR,
1431 "Unable to allocate memory for the transmit descriptor ring\n");
1432 return -ENOMEM;
1433 }
1434
1435 /* Fix for errata 23, can't cross 64kB boundary */
1436 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1437 void *olddesc = txdr->desc;
1438 dma_addr_t olddma = txdr->dma;
1439 DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
1440 "at %p\n", txdr->size, txdr->desc);
1441 /* Try again, without freeing the previous */
1442 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
1443 /* Failed allocation, critical failure */
1444 if (!txdr->desc) {
1445 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1446 goto setup_tx_desc_die;
1447 }
1448
1449 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1450 /* give up */
1451 pci_free_consistent(pdev, txdr->size, txdr->desc,
1452 txdr->dma);
1453 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1454 DPRINTK(PROBE, ERR,
1455 "Unable to allocate aligned memory "
1456 "for the transmit descriptor ring\n");
1457 vfree(txdr->buffer_info);
1458 return -ENOMEM;
1459 } else {
1460 /* Free old allocation, new allocation was successful */
1461 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1462 }
1463 }
1464 memset(txdr->desc, 0, txdr->size);
1465
1466 txdr->next_to_use = 0;
1467 txdr->next_to_clean = 0;
1468 spin_lock_init(&txdr->tx_lock);
1469
1470 return 0;
1471 }
1472
1473 /**
1474 * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1475 * (Descriptors) for all queues
1476 * @adapter: board private structure
1477 *
1478 * Return 0 on success, negative on failure
1479 **/
1480
1481 int
1482 e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
1483 {
1484 int i, err = 0;
1485
1486 for (i = 0; i < adapter->num_tx_queues; i++) {
1487 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1488 if (err) {
1489 DPRINTK(PROBE, ERR,
1490 "Allocation for Tx Queue %u failed\n", i);
1491 for (i-- ; i >= 0; i--)
1492 e1000_free_tx_resources(adapter,
1493 &adapter->tx_ring[i]);
1494 break;
1495 }
1496 }
1497
1498 return err;
1499 }
1500
1501 /**
1502 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1503 * @adapter: board private structure
1504 *
1505 * Configure the Tx unit of the MAC after a reset.
1506 **/
1507
1508 static void
1509 e1000_configure_tx(struct e1000_adapter *adapter)
1510 {
1511 uint64_t tdba;
1512 struct e1000_hw *hw = &adapter->hw;
1513 uint32_t tdlen, tctl, tipg, tarc;
1514 uint32_t ipgr1, ipgr2;
1515
1516 /* Setup the HW Tx Head and Tail descriptor pointers */
1517
1518 switch (adapter->num_tx_queues) {
1519 case 1:
1520 default:
1521 tdba = adapter->tx_ring[0].dma;
1522 tdlen = adapter->tx_ring[0].count *
1523 sizeof(struct e1000_tx_desc);
1524 E1000_WRITE_REG(hw, TDLEN, tdlen);
1525 E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
1526 E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
1527 E1000_WRITE_REG(hw, TDT, 0);
1528 E1000_WRITE_REG(hw, TDH, 0);
1529 adapter->tx_ring[0].tdh = ((hw->mac_type >= e1000_82543) ? E1000_TDH : E1000_82542_TDH);
1530 adapter->tx_ring[0].tdt = ((hw->mac_type >= e1000_82543) ? E1000_TDT : E1000_82542_TDT);
1531 break;
1532 }
1533
1534 /* Set the default values for the Tx Inter Packet Gap timer */
1535
1536 if (hw->media_type == e1000_media_type_fiber ||
1537 hw->media_type == e1000_media_type_internal_serdes)
1538 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1539 else
1540 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1541
1542 switch (hw->mac_type) {
1543 case e1000_82542_rev2_0:
1544 case e1000_82542_rev2_1:
1545 tipg = DEFAULT_82542_TIPG_IPGT;
1546 ipgr1 = DEFAULT_82542_TIPG_IPGR1;
1547 ipgr2 = DEFAULT_82542_TIPG_IPGR2;
1548 break;
1549 case e1000_80003es2lan:
1550 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1551 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2;
1552 break;
1553 default:
1554 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1555 ipgr2 = DEFAULT_82543_TIPG_IPGR2;
1556 break;
1557 }
1558 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
1559 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
1560 E1000_WRITE_REG(hw, TIPG, tipg);
1561
1562 /* Set the Tx Interrupt Delay register */
1563
1564 E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
1565 if (hw->mac_type >= e1000_82540)
1566 E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
1567
1568 /* Program the Transmit Control Register */
1569
1570 tctl = E1000_READ_REG(hw, TCTL);
1571 tctl &= ~E1000_TCTL_CT;
1572 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1573 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1574
1575 if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
1576 tarc = E1000_READ_REG(hw, TARC0);
1577 /* set the speed mode bit, we'll clear it if we're not at
1578 * gigabit link later */
1579 tarc |= (1 << 21);
1580 E1000_WRITE_REG(hw, TARC0, tarc);
1581 } else if (hw->mac_type == e1000_80003es2lan) {
1582 tarc = E1000_READ_REG(hw, TARC0);
1583 tarc |= 1;
1584 E1000_WRITE_REG(hw, TARC0, tarc);
1585 tarc = E1000_READ_REG(hw, TARC1);
1586 tarc |= 1;
1587 E1000_WRITE_REG(hw, TARC1, tarc);
1588 }
1589
1590 e1000_config_collision_dist(hw);
1591
1592 /* Setup Transmit Descriptor Settings for eop descriptor */
1593 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
1594
1595 /* only set IDE if we are delaying interrupts using the timers */
1596 if (adapter->tx_int_delay)
1597 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
1598
1599 if (hw->mac_type < e1000_82543)
1600 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1601 else
1602 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1603
1604 /* Cache if we're 82544 running in PCI-X because we'll
1605 * need this to apply a workaround later in the send path. */
1606 if (hw->mac_type == e1000_82544 &&
1607 hw->bus_type == e1000_bus_type_pcix)
1608 adapter->pcix_82544 = 1;
1609
1610 E1000_WRITE_REG(hw, TCTL, tctl);
1611
1612 }
1613
1614 /**
1615 * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1616 * @adapter: board private structure
1617 * @rxdr: rx descriptor ring (for a specific queue) to setup
1618 *
1619 * Returns 0 on success, negative on failure
1620 **/
1621
1622 static int
1623 e1000_setup_rx_resources(struct e1000_adapter *adapter,
1624 struct e1000_rx_ring *rxdr)
1625 {
1626 struct pci_dev *pdev = adapter->pdev;
1627 int size, desc_len;
1628
1629 size = sizeof(struct e1000_buffer) * rxdr->count;
1630 rxdr->buffer_info = vmalloc(size);
1631 if (!rxdr->buffer_info) {
1632 DPRINTK(PROBE, ERR,
1633 "Unable to allocate memory for the receive descriptor ring\n");
1634 return -ENOMEM;
1635 }
1636 memset(rxdr->buffer_info, 0, size);
1637
1638 size = sizeof(struct e1000_ps_page) * rxdr->count;
1639 rxdr->ps_page = kmalloc(size, GFP_KERNEL);
1640 if (!rxdr->ps_page) {
1641 vfree(rxdr->buffer_info);
1642 DPRINTK(PROBE, ERR,
1643 "Unable to allocate memory for the receive descriptor ring\n");
1644 return -ENOMEM;
1645 }
1646 memset(rxdr->ps_page, 0, size);
1647
1648 size = sizeof(struct e1000_ps_page_dma) * rxdr->count;
1649 rxdr->ps_page_dma = kmalloc(size, GFP_KERNEL);
1650 if (!rxdr->ps_page_dma) {
1651 vfree(rxdr->buffer_info);
1652 kfree(rxdr->ps_page);
1653 DPRINTK(PROBE, ERR,
1654 "Unable to allocate memory for the receive descriptor ring\n");
1655 return -ENOMEM;
1656 }
1657 memset(rxdr->ps_page_dma, 0, size);
1658
1659 if (adapter->hw.mac_type <= e1000_82547_rev_2)
1660 desc_len = sizeof(struct e1000_rx_desc);
1661 else
1662 desc_len = sizeof(union e1000_rx_desc_packet_split);
1663
1664 /* Round up to nearest 4K */
1665
1666 rxdr->size = rxdr->count * desc_len;
1667 E1000_ROUNDUP(rxdr->size, 4096);
1668
1669 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1670
1671 if (!rxdr->desc) {
1672 DPRINTK(PROBE, ERR,
1673 "Unable to allocate memory for the receive descriptor ring\n");
1674 setup_rx_desc_die:
1675 vfree(rxdr->buffer_info);
1676 kfree(rxdr->ps_page);
1677 kfree(rxdr->ps_page_dma);
1678 return -ENOMEM;
1679 }
1680
1681 /* Fix for errata 23, can't cross 64kB boundary */
1682 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1683 void *olddesc = rxdr->desc;
1684 dma_addr_t olddma = rxdr->dma;
1685 DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
1686 "at %p\n", rxdr->size, rxdr->desc);
1687 /* Try again, without freeing the previous */
1688 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1689 /* Failed allocation, critical failure */
1690 if (!rxdr->desc) {
1691 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1692 DPRINTK(PROBE, ERR,
1693 "Unable to allocate memory "
1694 "for the receive descriptor ring\n");
1695 goto setup_rx_desc_die;
1696 }
1697
1698 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1699 /* give up */
1700 pci_free_consistent(pdev, rxdr->size, rxdr->desc,
1701 rxdr->dma);
1702 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1703 DPRINTK(PROBE, ERR,
1704 "Unable to allocate aligned memory "
1705 "for the receive descriptor ring\n");
1706 goto setup_rx_desc_die;
1707 } else {
1708 /* Free old allocation, new allocation was successful */
1709 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1710 }
1711 }
1712 memset(rxdr->desc, 0, rxdr->size);
1713
1714 rxdr->next_to_clean = 0;
1715 rxdr->next_to_use = 0;
1716
1717 return 0;
1718 }
1719
1720 /**
1721 * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1722 * (Descriptors) for all queues
1723 * @adapter: board private structure
1724 *
1725 * Return 0 on success, negative on failure
1726 **/
1727
1728 int
1729 e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
1730 {
1731 int i, err = 0;
1732
1733 for (i = 0; i < adapter->num_rx_queues; i++) {
1734 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1735 if (err) {
1736 DPRINTK(PROBE, ERR,
1737 "Allocation for Rx Queue %u failed\n", i);
1738 for (i-- ; i >= 0; i--)
1739 e1000_free_rx_resources(adapter,
1740 &adapter->rx_ring[i]);
1741 break;
1742 }
1743 }
1744
1745 return err;
1746 }
1747
1748 /**
1749 * e1000_setup_rctl - configure the receive control registers
1750 * @adapter: Board private structure
1751 **/
1752 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1753 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
1754 static void
1755 e1000_setup_rctl(struct e1000_adapter *adapter)
1756 {
1757 uint32_t rctl, rfctl;
1758 uint32_t psrctl = 0;
1759 #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
1760 uint32_t pages = 0;
1761 #endif
1762
1763 rctl = E1000_READ_REG(&adapter->hw, RCTL);
1764
1765 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1766
1767 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1768 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1769 (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
1770
1771 if (adapter->hw.tbi_compatibility_on == 1)
1772 rctl |= E1000_RCTL_SBP;
1773 else
1774 rctl &= ~E1000_RCTL_SBP;
1775
1776 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1777 rctl &= ~E1000_RCTL_LPE;
1778 else
1779 rctl |= E1000_RCTL_LPE;
1780
1781 /* Setup buffer sizes */
1782 rctl &= ~E1000_RCTL_SZ_4096;
1783 rctl |= E1000_RCTL_BSEX;
1784 switch (adapter->rx_buffer_len) {
1785 case E1000_RXBUFFER_256:
1786 rctl |= E1000_RCTL_SZ_256;
1787 rctl &= ~E1000_RCTL_BSEX;
1788 break;
1789 case E1000_RXBUFFER_512:
1790 rctl |= E1000_RCTL_SZ_512;
1791 rctl &= ~E1000_RCTL_BSEX;
1792 break;
1793 case E1000_RXBUFFER_1024:
1794 rctl |= E1000_RCTL_SZ_1024;
1795 rctl &= ~E1000_RCTL_BSEX;
1796 break;
1797 case E1000_RXBUFFER_2048:
1798 default:
1799 rctl |= E1000_RCTL_SZ_2048;
1800 rctl &= ~E1000_RCTL_BSEX;
1801 break;
1802 case E1000_RXBUFFER_4096:
1803 rctl |= E1000_RCTL_SZ_4096;
1804 break;
1805 case E1000_RXBUFFER_8192:
1806 rctl |= E1000_RCTL_SZ_8192;
1807 break;
1808 case E1000_RXBUFFER_16384:
1809 rctl |= E1000_RCTL_SZ_16384;
1810 break;
1811 }
1812
1813 #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
1814 /* 82571 and greater support packet-split where the protocol
1815 * header is placed in skb->data and the packet data is
1816 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
1817 * In the case of a non-split, skb->data is linearly filled,
1818 * followed by the page buffers. Therefore, skb->data is
1819 * sized to hold the largest protocol header.
1820 */
1821 /* allocations using alloc_page take too long for regular MTU
1822 * so only enable packet split for jumbo frames */
1823 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
1824 if ((adapter->hw.mac_type >= e1000_82571) && (pages <= 3) &&
1825 PAGE_SIZE <= 16384 && (rctl & E1000_RCTL_LPE))
1826 adapter->rx_ps_pages = pages;
1827 else
1828 adapter->rx_ps_pages = 0;
1829 #endif
1830 if (adapter->rx_ps_pages) {
1831 /* Configure extra packet-split registers */
1832 rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
1833 rfctl |= E1000_RFCTL_EXTEN;
1834 /* disable packet split support for IPv6 extension headers,
1835 * because some malformed IPv6 headers can hang the RX */
1836 rfctl |= (E1000_RFCTL_IPV6_EX_DIS |
1837 E1000_RFCTL_NEW_IPV6_EXT_DIS);
1838
1839 E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
1840
1841 rctl |= E1000_RCTL_DTYP_PS;
1842
1843 psrctl |= adapter->rx_ps_bsize0 >>
1844 E1000_PSRCTL_BSIZE0_SHIFT;
1845
1846 switch (adapter->rx_ps_pages) {
1847 case 3:
1848 psrctl |= PAGE_SIZE <<
1849 E1000_PSRCTL_BSIZE3_SHIFT;
1850 case 2:
1851 psrctl |= PAGE_SIZE <<
1852 E1000_PSRCTL_BSIZE2_SHIFT;
1853 case 1:
1854 psrctl |= PAGE_SIZE >>
1855 E1000_PSRCTL_BSIZE1_SHIFT;
1856 break;
1857 }
1858
1859 E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
1860 }
1861
1862 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
1863 }
1864
1865 /**
1866 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
1867 * @adapter: board private structure
1868 *
1869 * Configure the Rx unit of the MAC after a reset.
1870 **/
1871
1872 static void
1873 e1000_configure_rx(struct e1000_adapter *adapter)
1874 {
1875 uint64_t rdba;
1876 struct e1000_hw *hw = &adapter->hw;
1877 uint32_t rdlen, rctl, rxcsum, ctrl_ext;
1878
1879 if (adapter->rx_ps_pages) {
1880 /* this is a 32 byte descriptor */
1881 rdlen = adapter->rx_ring[0].count *
1882 sizeof(union e1000_rx_desc_packet_split);
1883 adapter->clean_rx = e1000_clean_rx_irq_ps;
1884 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
1885 } else {
1886 rdlen = adapter->rx_ring[0].count *
1887 sizeof(struct e1000_rx_desc);
1888 adapter->clean_rx = e1000_clean_rx_irq;
1889 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
1890 }
1891
1892 /* disable receives while setting up the descriptors */
1893 rctl = E1000_READ_REG(hw, RCTL);
1894 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
1895
1896 /* set the Receive Delay Timer Register */
1897 E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
1898
1899 if (hw->mac_type >= e1000_82540) {
1900 E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
1901 if (adapter->itr_setting != 0)
1902 E1000_WRITE_REG(hw, ITR,
1903 1000000000 / (adapter->itr * 256));
1904 }
1905
1906 if (hw->mac_type >= e1000_82571) {
1907 ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
1908 /* Reset delay timers after every interrupt */
1909 ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR;
1910 #ifdef CONFIG_E1000_NAPI
1911 /* Auto-Mask interrupts upon ICR access */
1912 ctrl_ext |= E1000_CTRL_EXT_IAME;
1913 E1000_WRITE_REG(hw, IAM, 0xffffffff);
1914 #endif
1915 E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
1916 E1000_WRITE_FLUSH(hw);
1917 }
1918
1919 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1920 * the Base and Length of the Rx Descriptor Ring */
1921 switch (adapter->num_rx_queues) {
1922 case 1:
1923 default:
1924 rdba = adapter->rx_ring[0].dma;
1925 E1000_WRITE_REG(hw, RDLEN, rdlen);
1926 E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
1927 E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
1928 E1000_WRITE_REG(hw, RDT, 0);
1929 E1000_WRITE_REG(hw, RDH, 0);
1930 adapter->rx_ring[0].rdh = ((hw->mac_type >= e1000_82543) ? E1000_RDH : E1000_82542_RDH);
1931 adapter->rx_ring[0].rdt = ((hw->mac_type >= e1000_82543) ? E1000_RDT : E1000_82542_RDT);
1932 break;
1933 }
1934
1935 /* Enable 82543 Receive Checksum Offload for TCP and UDP */
1936 if (hw->mac_type >= e1000_82543) {
1937 rxcsum = E1000_READ_REG(hw, RXCSUM);
1938 if (adapter->rx_csum == TRUE) {
1939 rxcsum |= E1000_RXCSUM_TUOFL;
1940
1941 /* Enable 82571 IPv4 payload checksum for UDP fragments
1942 * Must be used in conjunction with packet-split. */
1943 if ((hw->mac_type >= e1000_82571) &&
1944 (adapter->rx_ps_pages)) {
1945 rxcsum |= E1000_RXCSUM_IPPCSE;
1946 }
1947 } else {
1948 rxcsum &= ~E1000_RXCSUM_TUOFL;
1949 /* don't need to clear IPPCSE as it defaults to 0 */
1950 }
1951 E1000_WRITE_REG(hw, RXCSUM, rxcsum);
1952 }
1953
1954 /* enable early receives on 82573, only takes effect if using > 2048
1955 * byte total frame size. for example only for jumbo frames */
1956 #define E1000_ERT_2048 0x100
1957 if (hw->mac_type == e1000_82573)
1958 E1000_WRITE_REG(hw, ERT, E1000_ERT_2048);
1959
1960 /* Enable Receives */
1961 E1000_WRITE_REG(hw, RCTL, rctl);
1962 }
1963
1964 /**
1965 * e1000_free_tx_resources - Free Tx Resources per Queue
1966 * @adapter: board private structure
1967 * @tx_ring: Tx descriptor ring for a specific queue
1968 *
1969 * Free all transmit software resources
1970 **/
1971
1972 static void
1973 e1000_free_tx_resources(struct e1000_adapter *adapter,
1974 struct e1000_tx_ring *tx_ring)
1975 {
1976 struct pci_dev *pdev = adapter->pdev;
1977
1978 e1000_clean_tx_ring(adapter, tx_ring);
1979
1980 vfree(tx_ring->buffer_info);
1981 tx_ring->buffer_info = NULL;
1982
1983 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
1984
1985 tx_ring->desc = NULL;
1986 }
1987
1988 /**
1989 * e1000_free_all_tx_resources - Free Tx Resources for All Queues
1990 * @adapter: board private structure
1991 *
1992 * Free all transmit software resources
1993 **/
1994
1995 void
1996 e1000_free_all_tx_resources(struct e1000_adapter *adapter)
1997 {
1998 int i;
1999
2000 for (i = 0; i < adapter->num_tx_queues; i++)
2001 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
2002 }
2003
2004 static void
2005 e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
2006 struct e1000_buffer *buffer_info)
2007 {
2008 if (buffer_info->dma) {
2009 pci_unmap_page(adapter->pdev,
2010 buffer_info->dma,
2011 buffer_info->length,
2012 PCI_DMA_TODEVICE);
2013 buffer_info->dma = 0;
2014 }
2015 if (buffer_info->skb) {
2016 dev_kfree_skb_any(buffer_info->skb);
2017 buffer_info->skb = NULL;
2018 }
2019 /* buffer_info must be completely set up in the transmit path */
2020 }
2021
2022 /**
2023 * e1000_clean_tx_ring - Free Tx Buffers
2024 * @adapter: board private structure
2025 * @tx_ring: ring to be cleaned
2026 **/
2027
2028 static void
2029 e1000_clean_tx_ring(struct e1000_adapter *adapter,
2030 struct e1000_tx_ring *tx_ring)
2031 {
2032 struct e1000_buffer *buffer_info;
2033 unsigned long size;
2034 unsigned int i;
2035
2036 /* Free all the Tx ring sk_buffs */
2037
2038 for (i = 0; i < tx_ring->count; i++) {
2039 buffer_info = &tx_ring->buffer_info[i];
2040 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
2041 }
2042
2043 size = sizeof(struct e1000_buffer) * tx_ring->count;
2044 memset(tx_ring->buffer_info, 0, size);
2045
2046 /* Zero out the descriptor ring */
2047
2048 memset(tx_ring->desc, 0, tx_ring->size);
2049
2050 tx_ring->next_to_use = 0;
2051 tx_ring->next_to_clean = 0;
2052 tx_ring->last_tx_tso = 0;
2053
2054 writel(0, adapter->hw.hw_addr + tx_ring->tdh);
2055 writel(0, adapter->hw.hw_addr + tx_ring->tdt);
2056 }
2057
2058 /**
2059 * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
2060 * @adapter: board private structure
2061 **/
2062
2063 static void
2064 e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
2065 {
2066 int i;
2067
2068 for (i = 0; i < adapter->num_tx_queues; i++)
2069 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
2070 }
2071
2072 /**
2073 * e1000_free_rx_resources - Free Rx Resources
2074 * @adapter: board private structure
2075 * @rx_ring: ring to clean the resources from
2076 *
2077 * Free all receive software resources
2078 **/
2079
2080 static void
2081 e1000_free_rx_resources(struct e1000_adapter *adapter,
2082 struct e1000_rx_ring *rx_ring)
2083 {
2084 struct pci_dev *pdev = adapter->pdev;
2085
2086 e1000_clean_rx_ring(adapter, rx_ring);
2087
2088 vfree(rx_ring->buffer_info);
2089 rx_ring->buffer_info = NULL;
2090 kfree(rx_ring->ps_page);
2091 rx_ring->ps_page = NULL;
2092 kfree(rx_ring->ps_page_dma);
2093 rx_ring->ps_page_dma = NULL;
2094
2095 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
2096
2097 rx_ring->desc = NULL;
2098 }
2099
2100 /**
2101 * e1000_free_all_rx_resources - Free Rx Resources for All Queues
2102 * @adapter: board private structure
2103 *
2104 * Free all receive software resources
2105 **/
2106
2107 void
2108 e1000_free_all_rx_resources(struct e1000_adapter *adapter)
2109 {
2110 int i;
2111
2112 for (i = 0; i < adapter->num_rx_queues; i++)
2113 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
2114 }
2115
2116 /**
2117 * e1000_clean_rx_ring - Free Rx Buffers per Queue
2118 * @adapter: board private structure
2119 * @rx_ring: ring to free buffers from
2120 **/
2121
2122 static void
2123 e1000_clean_rx_ring(struct e1000_adapter *adapter,
2124 struct e1000_rx_ring *rx_ring)
2125 {
2126 struct e1000_buffer *buffer_info;
2127 struct e1000_ps_page *ps_page;
2128 struct e1000_ps_page_dma *ps_page_dma;
2129 struct pci_dev *pdev = adapter->pdev;
2130 unsigned long size;
2131 unsigned int i, j;
2132
2133 /* Free all the Rx ring sk_buffs */
2134 for (i = 0; i < rx_ring->count; i++) {
2135 buffer_info = &rx_ring->buffer_info[i];
2136 if (buffer_info->skb) {
2137 pci_unmap_single(pdev,
2138 buffer_info->dma,
2139 buffer_info->length,
2140 PCI_DMA_FROMDEVICE);
2141
2142 dev_kfree_skb(buffer_info->skb);
2143 buffer_info->skb = NULL;
2144 }
2145 ps_page = &rx_ring->ps_page[i];
2146 ps_page_dma = &rx_ring->ps_page_dma[i];
2147 for (j = 0; j < adapter->rx_ps_pages; j++) {
2148 if (!ps_page->ps_page[j]) break;
2149 pci_unmap_page(pdev,
2150 ps_page_dma->ps_page_dma[j],
2151 PAGE_SIZE, PCI_DMA_FROMDEVICE);
2152 ps_page_dma->ps_page_dma[j] = 0;
2153 put_page(ps_page->ps_page[j]);
2154 ps_page->ps_page[j] = NULL;
2155 }
2156 }
2157
2158 size = sizeof(struct e1000_buffer) * rx_ring->count;
2159 memset(rx_ring->buffer_info, 0, size);
2160 size = sizeof(struct e1000_ps_page) * rx_ring->count;
2161 memset(rx_ring->ps_page, 0, size);
2162 size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
2163 memset(rx_ring->ps_page_dma, 0, size);
2164
2165 /* Zero out the descriptor ring */
2166
2167 memset(rx_ring->desc, 0, rx_ring->size);
2168
2169 rx_ring->next_to_clean = 0;
2170 rx_ring->next_to_use = 0;
2171
2172 writel(0, adapter->hw.hw_addr + rx_ring->rdh);
2173 writel(0, adapter->hw.hw_addr + rx_ring->rdt);
2174 }
2175
2176 /**
2177 * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
2178 * @adapter: board private structure
2179 **/
2180
2181 static void
2182 e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
2183 {
2184 int i;
2185
2186 for (i = 0; i < adapter->num_rx_queues; i++)
2187 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
2188 }
2189
2190 /* The 82542 2.0 (revision 2) needs to have the receive unit in reset
2191 * and memory write and invalidate disabled for certain operations
2192 */
2193 static void
2194 e1000_enter_82542_rst(struct e1000_adapter *adapter)
2195 {
2196 struct net_device *netdev = adapter->netdev;
2197 uint32_t rctl;
2198
2199 e1000_pci_clear_mwi(&adapter->hw);
2200
2201 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2202 rctl |= E1000_RCTL_RST;
2203 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2204 E1000_WRITE_FLUSH(&adapter->hw);
2205 mdelay(5);
2206
2207 if (netif_running(netdev))
2208 e1000_clean_all_rx_rings(adapter);
2209 }
2210
2211 static void
2212 e1000_leave_82542_rst(struct e1000_adapter *adapter)
2213 {
2214 struct net_device *netdev = adapter->netdev;
2215 uint32_t rctl;
2216
2217 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2218 rctl &= ~E1000_RCTL_RST;
2219 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2220 E1000_WRITE_FLUSH(&adapter->hw);
2221 mdelay(5);
2222
2223 if (adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
2224 e1000_pci_set_mwi(&adapter->hw);
2225
2226 if (netif_running(netdev)) {
2227 /* No need to loop, because 82542 supports only 1 queue */
2228 struct e1000_rx_ring *ring = &adapter->rx_ring[0];
2229 e1000_configure_rx(adapter);
2230 adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
2231 }
2232 }
2233
2234 /**
2235 * e1000_set_mac - Change the Ethernet Address of the NIC
2236 * @netdev: network interface device structure
2237 * @p: pointer to an address structure
2238 *
2239 * Returns 0 on success, negative on failure
2240 **/
2241
2242 static int
2243 e1000_set_mac(struct net_device *netdev, void *p)
2244 {
2245 struct e1000_adapter *adapter = netdev_priv(netdev);
2246 struct sockaddr *addr = p;
2247
2248 if (!is_valid_ether_addr(addr->sa_data))
2249 return -EADDRNOTAVAIL;
2250
2251 /* 82542 2.0 needs to be in reset to write receive address registers */
2252
2253 if (adapter->hw.mac_type == e1000_82542_rev2_0)
2254 e1000_enter_82542_rst(adapter);
2255
2256 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2257 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
2258
2259 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2260
2261 /* With 82571 controllers, LAA may be overwritten (with the default)
2262 * due to controller reset from the other port. */
2263 if (adapter->hw.mac_type == e1000_82571) {
2264 /* activate the work around */
2265 adapter->hw.laa_is_present = 1;
2266
2267 /* Hold a copy of the LAA in RAR[14] This is done so that
2268 * between the time RAR[0] gets clobbered and the time it
2269 * gets fixed (in e1000_watchdog), the actual LAA is in one
2270 * of the RARs and no incoming packets directed to this port
2271 * are dropped. Eventaully the LAA will be in RAR[0] and
2272 * RAR[14] */
2273 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
2274 E1000_RAR_ENTRIES - 1);
2275 }
2276
2277 if (adapter->hw.mac_type == e1000_82542_rev2_0)
2278 e1000_leave_82542_rst(adapter);
2279
2280 return 0;
2281 }
2282
2283 /**
2284 * e1000_set_multi - Multicast and Promiscuous mode set
2285 * @netdev: network interface device structure
2286 *
2287 * The set_multi entry point is called whenever the multicast address
2288 * list or the network interface flags are updated. This routine is
2289 * responsible for configuring the hardware for proper multicast,
2290 * promiscuous mode, and all-multi behavior.
2291 **/
2292
2293 static void
2294 e1000_set_multi(struct net_device *netdev)
2295 {
2296 struct e1000_adapter *adapter = netdev_priv(netdev);
2297 struct e1000_hw *hw = &adapter->hw;
2298 struct dev_mc_list *mc_ptr;
2299 uint32_t rctl;
2300 uint32_t hash_value;
2301 int i, rar_entries = E1000_RAR_ENTRIES;
2302 int mta_reg_count = (hw->mac_type == e1000_ich8lan) ?
2303 E1000_NUM_MTA_REGISTERS_ICH8LAN :
2304 E1000_NUM_MTA_REGISTERS;
2305
2306 if (adapter->hw.mac_type == e1000_ich8lan)
2307 rar_entries = E1000_RAR_ENTRIES_ICH8LAN;
2308
2309 /* reserve RAR[14] for LAA over-write work-around */
2310 if (adapter->hw.mac_type == e1000_82571)
2311 rar_entries--;
2312
2313 /* Check for Promiscuous and All Multicast modes */
2314
2315 rctl = E1000_READ_REG(hw, RCTL);
2316
2317 if (netdev->flags & IFF_PROMISC) {
2318 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
2319 } else if (netdev->flags & IFF_ALLMULTI) {
2320 rctl |= E1000_RCTL_MPE;
2321 rctl &= ~E1000_RCTL_UPE;
2322 } else {
2323 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2324 }
2325
2326 E1000_WRITE_REG(hw, RCTL, rctl);
2327
2328 /* 82542 2.0 needs to be in reset to write receive address registers */
2329
2330 if (hw->mac_type == e1000_82542_rev2_0)
2331 e1000_enter_82542_rst(adapter);
2332
2333 /* load the first 14 multicast address into the exact filters 1-14
2334 * RAR 0 is used for the station MAC adddress
2335 * if there are not 14 addresses, go ahead and clear the filters
2336 * -- with 82571 controllers only 0-13 entries are filled here
2337 */
2338 mc_ptr = netdev->mc_list;
2339
2340 for (i = 1; i < rar_entries; i++) {
2341 if (mc_ptr) {
2342 e1000_rar_set(hw, mc_ptr->dmi_addr, i);
2343 mc_ptr = mc_ptr->next;
2344 } else {
2345 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
2346 E1000_WRITE_FLUSH(hw);
2347 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
2348 E1000_WRITE_FLUSH(hw);
2349 }
2350 }
2351
2352 /* clear the old settings from the multicast hash table */
2353
2354 for (i = 0; i < mta_reg_count; i++) {
2355 E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
2356 E1000_WRITE_FLUSH(hw);
2357 }
2358
2359 /* load any remaining addresses into the hash table */
2360
2361 for (; mc_ptr; mc_ptr = mc_ptr->next) {
2362 hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr);
2363 e1000_mta_set(hw, hash_value);
2364 }
2365
2366 if (hw->mac_type == e1000_82542_rev2_0)
2367 e1000_leave_82542_rst(adapter);
2368 }
2369
2370 /* Need to wait a few seconds after link up to get diagnostic information from
2371 * the phy */
2372
2373 static void
2374 e1000_update_phy_info(unsigned long data)
2375 {
2376 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2377 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
2378 }
2379
2380 /**
2381 * e1000_82547_tx_fifo_stall - Timer Call-back
2382 * @data: pointer to adapter cast into an unsigned long
2383 **/
2384
2385 static void
2386 e1000_82547_tx_fifo_stall(unsigned long data)
2387 {
2388 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2389 struct net_device *netdev = adapter->netdev;
2390 uint32_t tctl;
2391
2392 if (atomic_read(&adapter->tx_fifo_stall)) {
2393 if ((E1000_READ_REG(&adapter->hw, TDT) ==
2394 E1000_READ_REG(&adapter->hw, TDH)) &&
2395 (E1000_READ_REG(&adapter->hw, TDFT) ==
2396 E1000_READ_REG(&adapter->hw, TDFH)) &&
2397 (E1000_READ_REG(&adapter->hw, TDFTS) ==
2398 E1000_READ_REG(&adapter->hw, TDFHS))) {
2399 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2400 E1000_WRITE_REG(&adapter->hw, TCTL,
2401 tctl & ~E1000_TCTL_EN);
2402 E1000_WRITE_REG(&adapter->hw, TDFT,
2403 adapter->tx_head_addr);
2404 E1000_WRITE_REG(&adapter->hw, TDFH,
2405 adapter->tx_head_addr);
2406 E1000_WRITE_REG(&adapter->hw, TDFTS,
2407 adapter->tx_head_addr);
2408 E1000_WRITE_REG(&adapter->hw, TDFHS,
2409 adapter->tx_head_addr);
2410 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
2411 E1000_WRITE_FLUSH(&adapter->hw);
2412
2413 adapter->tx_fifo_head = 0;
2414 atomic_set(&adapter->tx_fifo_stall, 0);
2415 netif_wake_queue(netdev);
2416 } else {
2417 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
2418 }
2419 }
2420 }
2421
2422 /**
2423 * e1000_watchdog - Timer Call-back
2424 * @data: pointer to adapter cast into an unsigned long
2425 **/
2426 static void
2427 e1000_watchdog(unsigned long data)
2428 {
2429 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2430 struct net_device *netdev = adapter->netdev;
2431 struct e1000_tx_ring *txdr = adapter->tx_ring;
2432 uint32_t link, tctl;
2433 int32_t ret_val;
2434
2435 ret_val = e1000_check_for_link(&adapter->hw);
2436 if ((ret_val == E1000_ERR_PHY) &&
2437 (adapter->hw.phy_type == e1000_phy_igp_3) &&
2438 (E1000_READ_REG(&adapter->hw, CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
2439 /* See e1000_kumeran_lock_loss_workaround() */
2440 DPRINTK(LINK, INFO,
2441 "Gigabit has been disabled, downgrading speed\n");
2442 }
2443
2444 if (adapter->hw.mac_type == e1000_82573) {
2445 e1000_enable_tx_pkt_filtering(&adapter->hw);
2446 if (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
2447 e1000_update_mng_vlan(adapter);
2448 }
2449
2450 if ((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
2451 !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
2452 link = !adapter->hw.serdes_link_down;
2453 else
2454 link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
2455
2456 if (link) {
2457 if (!netif_carrier_ok(netdev)) {
2458 boolean_t txb2b = 1;
2459 e1000_get_speed_and_duplex(&adapter->hw,
2460 &adapter->link_speed,
2461 &adapter->link_duplex);
2462
2463 DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s\n",
2464 adapter->link_speed,
2465 adapter->link_duplex == FULL_DUPLEX ?
2466 "Full Duplex" : "Half Duplex");
2467
2468 /* tweak tx_queue_len according to speed/duplex
2469 * and adjust the timeout factor */
2470 netdev->tx_queue_len = adapter->tx_queue_len;
2471 adapter->tx_timeout_factor = 1;
2472 switch (adapter->link_speed) {
2473 case SPEED_10:
2474 txb2b = 0;
2475 netdev->tx_queue_len = 10;
2476 adapter->tx_timeout_factor = 8;
2477 break;
2478 case SPEED_100:
2479 txb2b = 0;
2480 netdev->tx_queue_len = 100;
2481 /* maybe add some timeout factor ? */
2482 break;
2483 }
2484
2485 if ((adapter->hw.mac_type == e1000_82571 ||
2486 adapter->hw.mac_type == e1000_82572) &&
2487 txb2b == 0) {
2488 uint32_t tarc0;
2489 tarc0 = E1000_READ_REG(&adapter->hw, TARC0);
2490 tarc0 &= ~(1 << 21);
2491 E1000_WRITE_REG(&adapter->hw, TARC0, tarc0);
2492 }
2493
2494 #ifdef NETIF_F_TSO
2495 /* disable TSO for pcie and 10/100 speeds, to avoid
2496 * some hardware issues */
2497 if (!adapter->tso_force &&
2498 adapter->hw.bus_type == e1000_bus_type_pci_express){
2499 switch (adapter->link_speed) {
2500 case SPEED_10:
2501 case SPEED_100:
2502 DPRINTK(PROBE,INFO,
2503 "10/100 speed: disabling TSO\n");
2504 netdev->features &= ~NETIF_F_TSO;
2505 #ifdef NETIF_F_TSO6
2506 netdev->features &= ~NETIF_F_TSO6;
2507 #endif
2508 break;
2509 case SPEED_1000:
2510 netdev->features |= NETIF_F_TSO;
2511 #ifdef NETIF_F_TSO6
2512 netdev->features |= NETIF_F_TSO6;
2513 #endif
2514 break;
2515 default:
2516 /* oops */
2517 break;
2518 }
2519 }
2520 #endif
2521
2522 /* enable transmits in the hardware, need to do this
2523 * after setting TARC0 */
2524 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2525 tctl |= E1000_TCTL_EN;
2526 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
2527
2528 netif_carrier_on(netdev);
2529 netif_wake_queue(netdev);
2530 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
2531 adapter->smartspeed = 0;
2532 }
2533 } else {
2534 if (netif_carrier_ok(netdev)) {
2535 adapter->link_speed = 0;
2536 adapter->link_duplex = 0;
2537 DPRINTK(LINK, INFO, "NIC Link is Down\n");
2538 netif_carrier_off(netdev);
2539 netif_stop_queue(netdev);
2540 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
2541
2542 /* 80003ES2LAN workaround--
2543 * For packet buffer work-around on link down event;
2544 * disable receives in the ISR and
2545 * reset device here in the watchdog
2546 */
2547 if (adapter->hw.mac_type == e1000_80003es2lan)
2548 /* reset device */
2549 schedule_work(&adapter->reset_task);
2550 }
2551
2552 e1000_smartspeed(adapter);
2553 }
2554
2555 e1000_update_stats(adapter);
2556
2557 adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
2558 adapter->tpt_old = adapter->stats.tpt;
2559 adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
2560 adapter->colc_old = adapter->stats.colc;
2561
2562 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2563 adapter->gorcl_old = adapter->stats.gorcl;
2564 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2565 adapter->gotcl_old = adapter->stats.gotcl;
2566
2567 e1000_update_adaptive(&adapter->hw);
2568
2569 if (!netif_carrier_ok(netdev)) {
2570 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
2571 /* We've lost link, so the controller stops DMA,
2572 * but we've got queued Tx work that's never going
2573 * to get done, so reset controller to flush Tx.
2574 * (Do the reset outside of interrupt context). */
2575 adapter->tx_timeout_count++;
2576 schedule_work(&adapter->reset_task);
2577 }
2578 }
2579
2580 /* Cause software interrupt to ensure rx ring is cleaned */
2581 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
2582
2583 /* Force detection of hung controller every watchdog period */
2584 adapter->detect_tx_hung = TRUE;
2585
2586 /* With 82571 controllers, LAA may be overwritten due to controller
2587 * reset from the other port. Set the appropriate LAA in RAR[0] */
2588 if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
2589 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2590
2591 /* Reset the timer */
2592 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
2593 }
2594
2595 enum latency_range {
2596 lowest_latency = 0,
2597 low_latency = 1,
2598 bulk_latency = 2,
2599 latency_invalid = 255
2600 };
2601
2602 /**
2603 * e1000_update_itr - update the dynamic ITR value based on statistics
2604 * Stores a new ITR value based on packets and byte
2605 * counts during the last interrupt. The advantage of per interrupt
2606 * computation is faster updates and more accurate ITR for the current
2607 * traffic pattern. Constants in this function were computed
2608 * based on theoretical maximum wire speed and thresholds were set based
2609 * on testing data as well as attempting to minimize response time
2610 * while increasing bulk throughput.
2611 * this functionality is controlled by the InterruptThrottleRate module
2612 * parameter (see e1000_param.c)
2613 * @adapter: pointer to adapter
2614 * @itr_setting: current adapter->itr
2615 * @packets: the number of packets during this measurement interval
2616 * @bytes: the number of bytes during this measurement interval
2617 **/
2618 static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
2619 uint16_t itr_setting,
2620 int packets,
2621 int bytes)
2622 {
2623 unsigned int retval = itr_setting;
2624 struct e1000_hw *hw = &adapter->hw;
2625
2626 if (unlikely(hw->mac_type < e1000_82540))
2627 goto update_itr_done;
2628
2629 if (packets == 0)
2630 goto update_itr_done;
2631
2632
2633 switch (itr_setting) {
2634 case lowest_latency:
2635 if ((packets < 5) && (bytes > 512))
2636 retval = low_latency;
2637 break;
2638 case low_latency: /* 50 usec aka 20000 ints/s */
2639 if (bytes > 10000) {
2640 if ((packets < 10) ||
2641 ((bytes/packets) > 1200))
2642 retval = bulk_latency;
2643 else if ((packets > 35))
2644 retval = lowest_latency;
2645 } else if (packets <= 2 && bytes < 512)
2646 retval = lowest_latency;
2647 break;
2648 case bulk_latency: /* 250 usec aka 4000 ints/s */
2649 if (bytes > 25000) {
2650 if (packets > 35)
2651 retval = low_latency;
2652 } else {
2653 if (bytes < 6000)
2654 retval = low_latency;
2655 }
2656 break;
2657 }
2658
2659 update_itr_done:
2660 return retval;
2661 }
2662
2663 static void e1000_set_itr(struct e1000_adapter *adapter)
2664 {
2665 struct e1000_hw *hw = &adapter->hw;
2666 uint16_t current_itr;
2667 uint32_t new_itr = adapter->itr;
2668
2669 if (unlikely(hw->mac_type < e1000_82540))
2670 return;
2671
2672 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2673 if (unlikely(adapter->link_speed != SPEED_1000)) {
2674 current_itr = 0;
2675 new_itr = 4000;
2676 goto set_itr_now;
2677 }
2678
2679 adapter->tx_itr = e1000_update_itr(adapter,
2680 adapter->tx_itr,
2681 adapter->total_tx_packets,
2682 adapter->total_tx_bytes);
2683 adapter->rx_itr = e1000_update_itr(adapter,
2684 adapter->rx_itr,
2685 adapter->total_rx_packets,
2686 adapter->total_rx_bytes);
2687
2688 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2689
2690 /* conservative mode eliminates the lowest_latency setting */
2691 if (current_itr == lowest_latency && (adapter->itr_setting == 3))
2692 current_itr = low_latency;
2693
2694 switch (current_itr) {
2695 /* counts and packets in update_itr are dependent on these numbers */
2696 case lowest_latency:
2697 new_itr = 70000;
2698 break;
2699 case low_latency:
2700 new_itr = 20000; /* aka hwitr = ~200 */
2701 break;
2702 case bulk_latency:
2703 new_itr = 4000;
2704 break;
2705 default:
2706 break;
2707 }
2708
2709 set_itr_now:
2710 if (new_itr != adapter->itr) {
2711 /* this attempts to bias the interrupt rate towards Bulk
2712 * by adding intermediate steps when interrupt rate is
2713 * increasing */
2714 new_itr = new_itr > adapter->itr ?
2715 min(adapter->itr + (new_itr >> 2), new_itr) :
2716 new_itr;
2717 adapter->itr = new_itr;
2718 E1000_WRITE_REG(hw, ITR, 1000000000 / (new_itr * 256));
2719 }
2720
2721 return;
2722 }
2723
2724 #define E1000_TX_FLAGS_CSUM 0x00000001
2725 #define E1000_TX_FLAGS_VLAN 0x00000002
2726 #define E1000_TX_FLAGS_TSO 0x00000004
2727 #define E1000_TX_FLAGS_IPV4 0x00000008
2728 #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
2729 #define E1000_TX_FLAGS_VLAN_SHIFT 16
2730
2731 static int
2732 e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2733 struct sk_buff *skb)
2734 {
2735 #ifdef NETIF_F_TSO
2736 struct e1000_context_desc *context_desc;
2737 struct e1000_buffer *buffer_info;
2738 unsigned int i;
2739 uint32_t cmd_length = 0;
2740 uint16_t ipcse = 0, tucse, mss;
2741 uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
2742 int err;
2743
2744 if (skb_is_gso(skb)) {
2745 if (skb_header_cloned(skb)) {
2746 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2747 if (err)
2748 return err;
2749 }
2750
2751 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
2752 mss = skb_shinfo(skb)->gso_size;
2753 if (skb->protocol == htons(ETH_P_IP)) {
2754 skb->nh.iph->tot_len = 0;
2755 skb->nh.iph->check = 0;
2756 skb->h.th->check =
2757 ~csum_tcpudp_magic(skb->nh.iph->saddr,
2758 skb->nh.iph->daddr,
2759 0,
2760 IPPROTO_TCP,
2761 0);
2762 cmd_length = E1000_TXD_CMD_IP;
2763 ipcse = skb->h.raw - skb->data - 1;
2764 #ifdef NETIF_F_TSO6
2765 } else if (skb->protocol == htons(ETH_P_IPV6)) {
2766 skb->nh.ipv6h->payload_len = 0;
2767 skb->h.th->check =
2768 ~csum_ipv6_magic(&skb->nh.ipv6h->saddr,
2769 &skb->nh.ipv6h->daddr,
2770 0,
2771 IPPROTO_TCP,
2772 0);
2773 ipcse = 0;
2774 #endif
2775 }
2776 ipcss = skb->nh.raw - skb->data;
2777 ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
2778 tucss = skb->h.raw - skb->data;
2779 tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
2780 tucse = 0;
2781
2782 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
2783 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
2784
2785 i = tx_ring->next_to_use;
2786 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
2787 buffer_info = &tx_ring->buffer_info[i];
2788
2789 context_desc->lower_setup.ip_fields.ipcss = ipcss;
2790 context_desc->lower_setup.ip_fields.ipcso = ipcso;
2791 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
2792 context_desc->upper_setup.tcp_fields.tucss = tucss;
2793 context_desc->upper_setup.tcp_fields.tucso = tucso;
2794 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
2795 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
2796 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
2797 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
2798
2799 buffer_info->time_stamp = jiffies;
2800 buffer_info->next_to_watch = i;
2801
2802 if (++i == tx_ring->count) i = 0;
2803 tx_ring->next_to_use = i;
2804
2805 return TRUE;
2806 }
2807 #endif
2808
2809 return FALSE;
2810 }
2811
2812 static boolean_t
2813 e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2814 struct sk_buff *skb)
2815 {
2816 struct e1000_context_desc *context_desc;
2817 struct e1000_buffer *buffer_info;
2818 unsigned int i;
2819 uint8_t css;
2820
2821 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
2822 css = skb->h.raw - skb->data;
2823
2824 i = tx_ring->next_to_use;
2825 buffer_info = &tx_ring->buffer_info[i];
2826 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
2827
2828 context_desc->upper_setup.tcp_fields.tucss = css;
2829 context_desc->upper_setup.tcp_fields.tucso = css + skb->csum_offset;
2830 context_desc->upper_setup.tcp_fields.tucse = 0;
2831 context_desc->tcp_seg_setup.data = 0;
2832 context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
2833
2834 buffer_info->time_stamp = jiffies;
2835 buffer_info->next_to_watch = i;
2836
2837 if (unlikely(++i == tx_ring->count)) i = 0;
2838 tx_ring->next_to_use = i;
2839
2840 return TRUE;
2841 }
2842
2843 return FALSE;
2844 }
2845
2846 #define E1000_MAX_TXD_PWR 12
2847 #define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
2848
2849 static int
2850 e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2851 struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
2852 unsigned int nr_frags, unsigned int mss)
2853 {
2854 struct e1000_buffer *buffer_info;
2855 unsigned int len = skb->len;
2856 unsigned int offset = 0, size, count = 0, i;
2857 unsigned int f;
2858 len -= skb->data_len;
2859
2860 i = tx_ring->next_to_use;
2861
2862 while (len) {
2863 buffer_info = &tx_ring->buffer_info[i];
2864 size = min(len, max_per_txd);
2865 #ifdef NETIF_F_TSO
2866 /* Workaround for Controller erratum --
2867 * descriptor for non-tso packet in a linear SKB that follows a
2868 * tso gets written back prematurely before the data is fully
2869 * DMA'd to the controller */
2870 if (!skb->data_len && tx_ring->last_tx_tso &&
2871 !skb_is_gso(skb)) {
2872 tx_ring->last_tx_tso = 0;
2873 size -= 4;
2874 }
2875
2876 /* Workaround for premature desc write-backs
2877 * in TSO mode. Append 4-byte sentinel desc */
2878 if (unlikely(mss && !nr_frags && size == len && size > 8))
2879 size -= 4;
2880 #endif
2881 /* work-around for errata 10 and it applies
2882 * to all controllers in PCI-X mode
2883 * The fix is to make sure that the first descriptor of a
2884 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
2885 */
2886 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
2887 (size > 2015) && count == 0))
2888 size = 2015;
2889
2890 /* Workaround for potential 82544 hang in PCI-X. Avoid
2891 * terminating buffers within evenly-aligned dwords. */
2892 if (unlikely(adapter->pcix_82544 &&
2893 !((unsigned long)(skb->data + offset + size - 1) & 4) &&
2894 size > 4))
2895 size -= 4;
2896
2897 buffer_info->length = size;
2898 buffer_info->dma =
2899 pci_map_single(adapter->pdev,
2900 skb->data + offset,
2901 size,
2902 PCI_DMA_TODEVICE);
2903 buffer_info->time_stamp = jiffies;
2904 buffer_info->next_to_watch = i;
2905
2906 len -= size;
2907 offset += size;
2908 count++;
2909 if (unlikely(++i == tx_ring->count)) i = 0;
2910 }
2911
2912 for (f = 0; f < nr_frags; f++) {
2913 struct skb_frag_struct *frag;
2914
2915 frag = &skb_shinfo(skb)->frags[f];
2916 len = frag->size;
2917 offset = frag->page_offset;
2918
2919 while (len) {
2920 buffer_info = &tx_ring->buffer_info[i];
2921 size = min(len, max_per_txd);
2922 #ifdef NETIF_F_TSO
2923 /* Workaround for premature desc write-backs
2924 * in TSO mode. Append 4-byte sentinel desc */
2925 if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
2926 size -= 4;
2927 #endif
2928 /* Workaround for potential 82544 hang in PCI-X.
2929 * Avoid terminating buffers within evenly-aligned
2930 * dwords. */
2931 if (unlikely(adapter->pcix_82544 &&
2932 !((unsigned long)(frag->page+offset+size-1) & 4) &&
2933 size > 4))
2934 size -= 4;
2935
2936 buffer_info->length = size;
2937 buffer_info->dma =
2938 pci_map_page(adapter->pdev,
2939 frag->page,
2940 offset,
2941 size,
2942 PCI_DMA_TODEVICE);
2943 buffer_info->time_stamp = jiffies;
2944 buffer_info->next_to_watch = i;
2945
2946 len -= size;
2947 offset += size;
2948 count++;
2949 if (unlikely(++i == tx_ring->count)) i = 0;
2950 }
2951 }
2952
2953 i = (i == 0) ? tx_ring->count - 1 : i - 1;
2954 tx_ring->buffer_info[i].skb = skb;
2955 tx_ring->buffer_info[first].next_to_watch = i;
2956
2957 return count;
2958 }
2959
2960 static void
2961 e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2962 int tx_flags, int count)
2963 {
2964 struct e1000_tx_desc *tx_desc = NULL;
2965 struct e1000_buffer *buffer_info;
2966 uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
2967 unsigned int i;
2968
2969 if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
2970 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
2971 E1000_TXD_CMD_TSE;
2972 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2973
2974 if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
2975 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
2976 }
2977
2978 if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
2979 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
2980 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2981 }
2982
2983 if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
2984 txd_lower |= E1000_TXD_CMD_VLE;
2985 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
2986 }
2987
2988 i = tx_ring->next_to_use;
2989
2990 while (count--) {
2991 buffer_info = &tx_ring->buffer_info[i];
2992 tx_desc = E1000_TX_DESC(*tx_ring, i);
2993 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
2994 tx_desc->lower.data =
2995 cpu_to_le32(txd_lower | buffer_info->length);
2996 tx_desc->upper.data = cpu_to_le32(txd_upper);
2997 if (unlikely(++i == tx_ring->count)) i = 0;
2998 }
2999
3000 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
3001
3002 /* Force memory writes to complete before letting h/w
3003 * know there are new descriptors to fetch. (Only
3004 * applicable for weak-ordered memory model archs,
3005 * such as IA-64). */
3006 wmb();
3007
3008 tx_ring->next_to_use = i;
3009 writel(i, adapter->hw.hw_addr + tx_ring->tdt);
3010 /* we need this if more than one processor can write to our tail
3011 * at a time, it syncronizes IO on IA64/Altix systems */
3012 mmiowb();
3013 }
3014
3015 /**
3016 * 82547 workaround to avoid controller hang in half-duplex environment.
3017 * The workaround is to avoid queuing a large packet that would span
3018 * the internal Tx FIFO ring boundary by notifying the stack to resend
3019 * the packet at a later time. This gives the Tx FIFO an opportunity to
3020 * flush all packets. When that occurs, we reset the Tx FIFO pointers
3021 * to the beginning of the Tx FIFO.
3022 **/
3023
3024 #define E1000_FIFO_HDR 0x10
3025 #define E1000_82547_PAD_LEN 0x3E0
3026
3027 static int
3028 e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
3029 {
3030 uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
3031 uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
3032
3033 E1000_ROUNDUP(skb_fifo_len, E1000_FIFO_HDR);
3034
3035 if (adapter->link_duplex != HALF_DUPLEX)
3036 goto no_fifo_stall_required;
3037
3038 if (atomic_read(&adapter->tx_fifo_stall))
3039 return 1;
3040
3041 if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
3042 atomic_set(&adapter->tx_fifo_stall, 1);
3043 return 1;
3044 }
3045
3046 no_fifo_stall_required:
3047 adapter->tx_fifo_head += skb_fifo_len;
3048 if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
3049 adapter->tx_fifo_head -= adapter->tx_fifo_size;
3050 return 0;
3051 }
3052
3053 #define MINIMUM_DHCP_PACKET_SIZE 282
3054 static int
3055 e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
3056 {
3057 struct e1000_hw *hw = &adapter->hw;
3058 uint16_t length, offset;
3059 if (vlan_tx_tag_present(skb)) {
3060 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
3061 ( adapter->hw.mng_cookie.status &
3062 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
3063 return 0;
3064 }
3065 if (skb->len > MINIMUM_DHCP_PACKET_SIZE) {
3066 struct ethhdr *eth = (struct ethhdr *) skb->data;
3067 if ((htons(ETH_P_IP) == eth->h_proto)) {
3068 const struct iphdr *ip =
3069 (struct iphdr *)((uint8_t *)skb->data+14);
3070 if (IPPROTO_UDP == ip->protocol) {
3071 struct udphdr *udp =
3072 (struct udphdr *)((uint8_t *)ip +
3073 (ip->ihl << 2));
3074 if (ntohs(udp->dest) == 67) {
3075 offset = (uint8_t *)udp + 8 - skb->data;
3076 length = skb->len - offset;
3077
3078 return e1000_mng_write_dhcp_info(hw,
3079 (uint8_t *)udp + 8,
3080 length);
3081 }
3082 }
3083 }
3084 }
3085 return 0;
3086 }
3087
3088 static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
3089 {
3090 struct e1000_adapter *adapter = netdev_priv(netdev);
3091 struct e1000_tx_ring *tx_ring = adapter->tx_ring;
3092
3093 netif_stop_queue(netdev);
3094 /* Herbert's original patch had:
3095 * smp_mb__after_netif_stop_queue();
3096 * but since that doesn't exist yet, just open code it. */
3097 smp_mb();
3098
3099 /* We need to check again in a case another CPU has just
3100 * made room available. */
3101 if (likely(E1000_DESC_UNUSED(tx_ring) < size))
3102 return -EBUSY;
3103
3104 /* A reprieve! */
3105 netif_start_queue(netdev);
3106 ++adapter->restart_queue;
3107 return 0;
3108 }
3109
3110 static int e1000_maybe_stop_tx(struct net_device *netdev,
3111 struct e1000_tx_ring *tx_ring, int size)
3112 {
3113 if (likely(E1000_DESC_UNUSED(tx_ring) >= size))
3114 return 0;
3115 return __e1000_maybe_stop_tx(netdev, size);
3116 }
3117
3118 #define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
3119 static int
3120 e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
3121 {
3122 struct e1000_adapter *adapter = netdev_priv(netdev);
3123 struct e1000_tx_ring *tx_ring;
3124 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
3125 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
3126 unsigned int tx_flags = 0;
3127 unsigned int len = skb->len;
3128 unsigned long flags;
3129 unsigned int nr_frags = 0;
3130 unsigned int mss = 0;
3131 int count = 0;
3132 int tso;
3133 unsigned int f;
3134 len -= skb->data_len;
3135
3136 /* This goes back to the question of how to logically map a tx queue
3137 * to a flow. Right now, performance is impacted slightly negatively
3138 * if using multiple tx queues. If the stack breaks away from a
3139 * single qdisc implementation, we can look at this again. */
3140 tx_ring = adapter->tx_ring;
3141
3142 if (unlikely(skb->len <= 0)) {
3143 dev_kfree_skb_any(skb);
3144 return NETDEV_TX_OK;
3145 }
3146
3147 /* 82571 and newer doesn't need the workaround that limited descriptor
3148 * length to 4kB */
3149 if (adapter->hw.mac_type >= e1000_82571)
3150 max_per_txd = 8192;
3151
3152 #ifdef NETIF_F_TSO
3153 mss = skb_shinfo(skb)->gso_size;
3154 /* The controller does a simple calculation to
3155 * make sure there is enough room in the FIFO before
3156 * initiating the DMA for each buffer. The calc is:
3157 * 4 = ceil(buffer len/mss). To make sure we don't
3158 * overrun the FIFO, adjust the max buffer len if mss
3159 * drops. */
3160 if (mss) {
3161 uint8_t hdr_len;
3162 max_per_txd = min(mss << 2, max_per_txd);
3163 max_txd_pwr = fls(max_per_txd) - 1;
3164
3165 /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
3166 * points to just header, pull a few bytes of payload from
3167 * frags into skb->data */
3168 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
3169 if (skb->data_len && (hdr_len == (skb->len - skb->data_len))) {
3170 switch (adapter->hw.mac_type) {
3171 unsigned int pull_size;
3172 case e1000_82571:
3173 case e1000_82572:
3174 case e1000_82573:
3175 case e1000_ich8lan:
3176 pull_size = min((unsigned int)4, skb->data_len);
3177 if (!__pskb_pull_tail(skb, pull_size)) {
3178 DPRINTK(DRV, ERR,
3179 "__pskb_pull_tail failed.\n");
3180 dev_kfree_skb_any(skb);
3181 return NETDEV_TX_OK;
3182 }
3183 len = skb->len - skb->data_len;
3184 break;
3185 default:
3186 /* do nothing */
3187 break;
3188 }
3189 }
3190 }
3191
3192 /* reserve a descriptor for the offload context */
3193 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
3194 count++;
3195 count++;
3196 #else
3197 if (skb->ip_summed == CHECKSUM_PARTIAL)
3198 count++;
3199 #endif
3200
3201 #ifdef NETIF_F_TSO
3202 /* Controller Erratum workaround */
3203 if (!skb->data_len && tx_ring->last_tx_tso && !skb_is_gso(skb))
3204 count++;
3205 #endif
3206
3207 count += TXD_USE_COUNT(len, max_txd_pwr);
3208
3209 if (adapter->pcix_82544)
3210 count++;
3211
3212 /* work-around for errata 10 and it applies to all controllers
3213 * in PCI-X mode, so add one more descriptor to the count
3214 */
3215 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
3216 (len > 2015)))
3217 count++;
3218
3219 nr_frags = skb_shinfo(skb)->nr_frags;
3220 for (f = 0; f < nr_frags; f++)
3221 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
3222 max_txd_pwr);
3223 if (adapter->pcix_82544)
3224 count += nr_frags;
3225
3226
3227 if (adapter->hw.tx_pkt_filtering &&
3228 (adapter->hw.mac_type == e1000_82573))
3229 e1000_transfer_dhcp_info(adapter, skb);
3230
3231 local_irq_save(flags);
3232 if (!spin_trylock(&tx_ring->tx_lock)) {
3233 /* Collision - tell upper layer to requeue */
3234 local_irq_restore(flags);
3235 return NETDEV_TX_LOCKED;
3236 }
3237
3238 /* need: count + 2 desc gap to keep tail from touching
3239 * head, otherwise try next time */
3240 if (unlikely(e1000_maybe_stop_tx(netdev, tx_ring, count + 2))) {
3241 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3242 return NETDEV_TX_BUSY;
3243 }
3244
3245 if (unlikely(adapter->hw.mac_type == e1000_82547)) {
3246 if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
3247 netif_stop_queue(netdev);
3248 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
3249 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3250 return NETDEV_TX_BUSY;
3251 }
3252 }
3253
3254 if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
3255 tx_flags |= E1000_TX_FLAGS_VLAN;
3256 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
3257 }
3258
3259 first = tx_ring->next_to_use;
3260
3261 tso = e1000_tso(adapter, tx_ring, skb);
3262 if (tso < 0) {
3263 dev_kfree_skb_any(skb);
3264 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3265 return NETDEV_TX_OK;
3266 }
3267
3268 if (likely(tso)) {
3269 tx_ring->last_tx_tso = 1;
3270 tx_flags |= E1000_TX_FLAGS_TSO;
3271 } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
3272 tx_flags |= E1000_TX_FLAGS_CSUM;
3273
3274 /* Old method was to assume IPv4 packet by default if TSO was enabled.
3275 * 82571 hardware supports TSO capabilities for IPv6 as well...
3276 * no longer assume, we must. */
3277 if (likely(skb->protocol == htons(ETH_P_IP)))
3278 tx_flags |= E1000_TX_FLAGS_IPV4;
3279
3280 e1000_tx_queue(adapter, tx_ring, tx_flags,
3281 e1000_tx_map(adapter, tx_ring, skb, first,
3282 max_per_txd, nr_frags, mss));
3283
3284 netdev->trans_start = jiffies;
3285
3286 /* Make sure there is space in the ring for the next send. */
3287 e1000_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 2);
3288
3289 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3290 return NETDEV_TX_OK;
3291 }
3292
3293 /**
3294 * e1000_tx_timeout - Respond to a Tx Hang
3295 * @netdev: network interface device structure
3296 **/
3297
3298 static void
3299 e1000_tx_timeout(struct net_device *netdev)
3300 {
3301 struct e1000_adapter *adapter = netdev_priv(netdev);
3302
3303 /* Do the reset outside of interrupt context */
3304 adapter->tx_timeout_count++;
3305 schedule_work(&adapter->reset_task);
3306 }
3307
3308 static void
3309 e1000_reset_task(struct net_device *netdev)
3310 {
3311 struct e1000_adapter *adapter = netdev_priv(netdev);
3312
3313 e1000_reinit_locked(adapter);
3314 }
3315
3316 /**
3317 * e1000_get_stats - Get System Network Statistics
3318 * @netdev: network interface device structure
3319 *
3320 * Returns the address of the device statistics structure.
3321 * The statistics are actually updated from the timer callback.
3322 **/
3323
3324 static struct net_device_stats *
3325 e1000_get_stats(struct net_device *netdev)
3326 {
3327 struct e1000_adapter *adapter = netdev_priv(netdev);
3328
3329 /* only return the current stats */
3330 return &adapter->net_stats;
3331 }
3332
3333 /**
3334 * e1000_change_mtu - Change the Maximum Transfer Unit
3335 * @netdev: network interface device structure
3336 * @new_mtu: new value for maximum frame size
3337 *
3338 * Returns 0 on success, negative on failure
3339 **/
3340
3341 static int
3342 e1000_change_mtu(struct net_device *netdev, int new_mtu)
3343 {
3344 struct e1000_adapter *adapter = netdev_priv(netdev);
3345 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
3346 uint16_t eeprom_data = 0;
3347
3348 if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
3349 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
3350 DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
3351 return -EINVAL;
3352 }
3353
3354 /* Adapter-specific max frame size limits. */
3355 switch (adapter->hw.mac_type) {
3356 case e1000_undefined ... e1000_82542_rev2_1:
3357 case e1000_ich8lan:
3358 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3359 DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
3360 return -EINVAL;
3361 }
3362 break;
3363 case e1000_82573:
3364 /* Jumbo Frames not supported if:
3365 * - this is not an 82573L device
3366 * - ASPM is enabled in any way (0x1A bits 3:2) */
3367 e1000_read_eeprom(&adapter->hw, EEPROM_INIT_3GIO_3, 1,
3368 &eeprom_data);
3369 if ((adapter->hw.device_id != E1000_DEV_ID_82573L) ||
3370 (eeprom_data & EEPROM_WORD1A_ASPM_MASK)) {
3371 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3372 DPRINTK(PROBE, ERR,
3373 "Jumbo Frames not supported.\n");
3374 return -EINVAL;
3375 }
3376 break;
3377 }
3378 /* ERT will be enabled later to enable wire speed receives */
3379
3380 /* fall through to get support */
3381 case e1000_82571:
3382 case e1000_82572:
3383 case e1000_80003es2lan:
3384 #define MAX_STD_JUMBO_FRAME_SIZE 9234
3385 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
3386 DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
3387 return -EINVAL;
3388 }
3389 break;
3390 default:
3391 /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
3392 break;
3393 }
3394
3395 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
3396 * means we reserve 2 more, this pushes us to allocate from the next
3397 * larger slab size
3398 * i.e. RXBUFFER_2048 --> size-4096 slab */
3399
3400 if (max_frame <= E1000_RXBUFFER_256)
3401 adapter->rx_buffer_len = E1000_RXBUFFER_256;
3402 else if (max_frame <= E1000_RXBUFFER_512)
3403 adapter->rx_buffer_len = E1000_RXBUFFER_512;
3404 else if (max_frame <= E1000_RXBUFFER_1024)
3405 adapter->rx_buffer_len = E1000_RXBUFFER_1024;
3406 else if (max_frame <= E1000_RXBUFFER_2048)
3407 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
3408 else if (max_frame <= E1000_RXBUFFER_4096)
3409 adapter->rx_buffer_len = E1000_RXBUFFER_4096;
3410 else if (max_frame <= E1000_RXBUFFER_8192)
3411 adapter->rx_buffer_len = E1000_RXBUFFER_8192;
3412 else if (max_frame <= E1000_RXBUFFER_16384)
3413 adapter->rx_buffer_len = E1000_RXBUFFER_16384;
3414
3415 /* adjust allocation if LPE protects us, and we aren't using SBP */
3416 if (!adapter->hw.tbi_compatibility_on &&
3417 ((max_frame == MAXIMUM_ETHERNET_FRAME_SIZE) ||
3418 (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
3419 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
3420
3421 netdev->mtu = new_mtu;
3422
3423 if (netif_running(netdev))
3424 e1000_reinit_locked(adapter);
3425
3426 adapter->hw.max_frame_size = max_frame;
3427
3428 return 0;
3429 }
3430
3431 /**
3432 * e1000_update_stats - Update the board statistics counters
3433 * @adapter: board private structure
3434 **/
3435
3436 void
3437 e1000_update_stats(struct e1000_adapter *adapter)
3438 {
3439 struct e1000_hw *hw = &adapter->hw;
3440 struct pci_dev *pdev = adapter->pdev;
3441 unsigned long flags;
3442 uint16_t phy_tmp;
3443
3444 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3445
3446 /*
3447 * Prevent stats update while adapter is being reset, or if the pci
3448 * connection is down.
3449 */
3450 if (adapter->link_speed == 0)
3451 return;
3452 if (pdev->error_state && pdev->error_state != pci_channel_io_normal)
3453 return;
3454
3455 spin_lock_irqsave(&adapter->stats_lock, flags);
3456
3457 /* these counters are modified from e1000_adjust_tbi_stats,
3458 * called from the interrupt context, so they must only
3459 * be written while holding adapter->stats_lock
3460 */
3461
3462 adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
3463 adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
3464 adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
3465 adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
3466 adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
3467 adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
3468 adapter->stats.roc += E1000_READ_REG(hw, ROC);
3469
3470 if (adapter->hw.mac_type != e1000_ich8lan) {
3471 adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
3472 adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
3473 adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
3474 adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
3475 adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
3476 adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
3477 }
3478
3479 adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
3480 adapter->stats.mpc += E1000_READ_REG(hw, MPC);
3481 adapter->stats.scc += E1000_READ_REG(hw, SCC);
3482 adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
3483 adapter->stats.mcc += E1000_READ_REG(hw, MCC);
3484 adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
3485 adapter->stats.dc += E1000_READ_REG(hw, DC);
3486 adapter->stats.sec += E1000_READ_REG(hw, SEC);
3487 adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
3488 adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
3489 adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
3490 adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
3491 adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
3492 adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
3493 adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
3494 adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
3495 adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
3496 adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
3497 adapter->stats.ruc += E1000_READ_REG(hw, RUC);
3498 adapter->stats.rfc += E1000_READ_REG(hw, RFC);
3499 adapter->stats.rjc += E1000_READ_REG(hw, RJC);
3500 adapter->stats.torl += E1000_READ_REG(hw, TORL);
3501 adapter->stats.torh += E1000_READ_REG(hw, TORH);
3502 adapter->stats.totl += E1000_READ_REG(hw, TOTL);
3503 adapter->stats.toth += E1000_READ_REG(hw, TOTH);
3504 adapter->stats.tpr += E1000_READ_REG(hw, TPR);
3505
3506 if (adapter->hw.mac_type != e1000_ich8lan) {
3507 adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
3508 adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
3509 adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
3510 adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
3511 adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
3512 adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
3513 }
3514
3515 adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
3516 adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
3517
3518 /* used for adaptive IFS */
3519
3520 hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
3521 adapter->stats.tpt += hw->tx_packet_delta;
3522 hw->collision_delta = E1000_READ_REG(hw, COLC);
3523 adapter->stats.colc += hw->collision_delta;
3524
3525 if (hw->mac_type >= e1000_82543) {
3526 adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
3527 adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
3528 adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
3529 adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
3530 adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
3531 adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
3532 }
3533 if (hw->mac_type > e1000_82547_rev_2) {
3534 adapter->stats.iac += E1000_READ_REG(hw, IAC);
3535 adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
3536
3537 if (adapter->hw.mac_type != e1000_ich8lan) {
3538 adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
3539 adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
3540 adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
3541 adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
3542 adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
3543 adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
3544 adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
3545 }
3546 }
3547
3548 /* Fill out the OS statistics structure */
3549 adapter->net_stats.rx_packets = adapter->stats.gprc;
3550 adapter->net_stats.tx_packets = adapter->stats.gptc;
3551 adapter->net_stats.rx_bytes = adapter->stats.gorcl;
3552 adapter->net_stats.tx_bytes = adapter->stats.gotcl;
3553 adapter->net_stats.multicast = adapter->stats.mprc;
3554 adapter->net_stats.collisions = adapter->stats.colc;
3555
3556 /* Rx Errors */
3557
3558 /* RLEC on some newer hardware can be incorrect so build
3559 * our own version based on RUC and ROC */
3560 adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3561 adapter->stats.crcerrs + adapter->stats.algnerrc +
3562 adapter->stats.ruc + adapter->stats.roc +
3563 adapter->stats.cexterr;
3564 adapter->stats.rlerrc = adapter->stats.ruc + adapter->stats.roc;
3565 adapter->net_stats.rx_length_errors = adapter->stats.rlerrc;
3566 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3567 adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
3568 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3569
3570 /* Tx Errors */
3571 adapter->stats.txerrc = adapter->stats.ecol + adapter->stats.latecol;
3572 adapter->net_stats.tx_errors = adapter->stats.txerrc;
3573 adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3574 adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3575 adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
3576
3577 /* Tx Dropped needs to be maintained elsewhere */
3578
3579 /* Phy Stats */
3580 if (hw->media_type == e1000_media_type_copper) {
3581 if ((adapter->link_speed == SPEED_1000) &&
3582 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
3583 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3584 adapter->phy_stats.idle_errors += phy_tmp;
3585 }
3586
3587 if ((hw->mac_type <= e1000_82546) &&
3588 (hw->phy_type == e1000_phy_m88) &&
3589 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
3590 adapter->phy_stats.receive_errors += phy_tmp;
3591 }
3592
3593 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3594 }
3595 #ifdef CONFIG_PCI_MSI
3596
3597 /**
3598 * e1000_intr_msi - Interrupt Handler
3599 * @irq: interrupt number
3600 * @data: pointer to a network interface device structure
3601 **/
3602
3603 static
3604 irqreturn_t e1000_intr_msi(int irq, void *data)
3605 {
3606 struct net_device *netdev = data;
3607 struct e1000_adapter *adapter = netdev_priv(netdev);
3608 struct e1000_hw *hw = &adapter->hw;
3609 #ifndef CONFIG_E1000_NAPI
3610 int i;
3611 #endif
3612
3613 /* this code avoids the read of ICR but has to get 1000 interrupts
3614 * at every link change event before it will notice the change */
3615 if (++adapter->detect_link >= 1000) {
3616 uint32_t icr = E1000_READ_REG(hw, ICR);
3617 #ifdef CONFIG_E1000_NAPI
3618 /* read ICR disables interrupts using IAM, so keep up with our
3619 * enable/disable accounting */
3620 atomic_inc(&adapter->irq_sem);
3621 #endif
3622 adapter->detect_link = 0;
3623 if ((icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) &&
3624 (icr & E1000_ICR_INT_ASSERTED)) {
3625 hw->get_link_status = 1;
3626 /* 80003ES2LAN workaround--
3627 * For packet buffer work-around on link down event;
3628 * disable receives here in the ISR and
3629 * reset adapter in watchdog
3630 */
3631 if (netif_carrier_ok(netdev) &&
3632 (adapter->hw.mac_type == e1000_80003es2lan)) {
3633 /* disable receives */
3634 uint32_t rctl = E1000_READ_REG(hw, RCTL);
3635 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
3636 }
3637 /* guard against interrupt when we're going down */
3638 if (!test_bit(__E1000_DOWN, &adapter->flags))
3639 mod_timer(&adapter->watchdog_timer,
3640 jiffies + 1);
3641 }
3642 } else {
3643 E1000_WRITE_REG(hw, ICR, (0xffffffff & ~(E1000_ICR_RXSEQ |
3644 E1000_ICR_LSC)));
3645 /* bummer we have to flush here, but things break otherwise as
3646 * some event appears to be lost or delayed and throughput
3647 * drops. In almost all tests this flush is un-necessary */
3648 E1000_WRITE_FLUSH(hw);
3649 #ifdef CONFIG_E1000_NAPI
3650 /* Interrupt Auto-Mask (IAM)...upon writing ICR, interrupts are
3651 * masked. No need for the IMC write, but it does mean we
3652 * should account for it ASAP. */
3653 atomic_inc(&adapter->irq_sem);
3654 #endif
3655 }
3656
3657 #ifdef CONFIG_E1000_NAPI
3658 if (likely(netif_rx_schedule_prep(netdev))) {
3659 adapter->total_tx_bytes = 0;
3660 adapter->total_tx_packets = 0;
3661 adapter->total_rx_bytes = 0;
3662 adapter->total_rx_packets = 0;
3663 __netif_rx_schedule(netdev);
3664 } else
3665 e1000_irq_enable(adapter);
3666 #else
3667 adapter->total_tx_bytes = 0;
3668 adapter->total_rx_bytes = 0;
3669 adapter->total_tx_packets = 0;
3670 adapter->total_rx_packets = 0;
3671
3672 for (i = 0; i < E1000_MAX_INTR; i++)
3673 if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
3674 !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
3675 break;
3676
3677 if (likely(adapter->itr_setting & 3))
3678 e1000_set_itr(adapter);
3679 #endif
3680
3681 return IRQ_HANDLED;
3682 }
3683 #endif
3684
3685 /**
3686 * e1000_intr - Interrupt Handler
3687 * @irq: interrupt number
3688 * @data: pointer to a network interface device structure
3689 **/
3690
3691 static irqreturn_t
3692 e1000_intr(int irq, void *data)
3693 {
3694 struct net_device *netdev = data;
3695 struct e1000_adapter *adapter = netdev_priv(netdev);
3696 struct e1000_hw *hw = &adapter->hw;
3697 uint32_t rctl, icr = E1000_READ_REG(hw, ICR);
3698 #ifndef CONFIG_E1000_NAPI
3699 int i;
3700 #endif
3701 if (unlikely(!icr))
3702 return IRQ_NONE; /* Not our interrupt */
3703
3704 #ifdef CONFIG_E1000_NAPI
3705 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
3706 * not set, then the adapter didn't send an interrupt */
3707 if (unlikely(hw->mac_type >= e1000_82571 &&
3708 !(icr & E1000_ICR_INT_ASSERTED)))
3709 return IRQ_NONE;
3710
3711 /* Interrupt Auto-Mask...upon reading ICR,
3712 * interrupts are masked. No need for the
3713 * IMC write, but it does mean we should
3714 * account for it ASAP. */
3715 if (likely(hw->mac_type >= e1000_82571))
3716 atomic_inc(&adapter->irq_sem);
3717 #endif
3718
3719 if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
3720 hw->get_link_status = 1;
3721 /* 80003ES2LAN workaround--
3722 * For packet buffer work-around on link down event;
3723 * disable receives here in the ISR and
3724 * reset adapter in watchdog
3725 */
3726 if (netif_carrier_ok(netdev) &&
3727 (adapter->hw.mac_type == e1000_80003es2lan)) {
3728 /* disable receives */
3729 rctl = E1000_READ_REG(hw, RCTL);
3730 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
3731 }
3732 /* guard against interrupt when we're going down */
3733 if (!test_bit(__E1000_DOWN, &adapter->flags))
3734 mod_timer(&adapter->watchdog_timer, jiffies + 1);
3735 }
3736
3737 #ifdef CONFIG_E1000_NAPI
3738 if (unlikely(hw->mac_type < e1000_82571)) {
3739 /* disable interrupts, without the synchronize_irq bit */
3740 atomic_inc(&adapter->irq_sem);
3741 E1000_WRITE_REG(hw, IMC, ~0);
3742 E1000_WRITE_FLUSH(hw);
3743 }
3744 if (likely(netif_rx_schedule_prep(netdev))) {
3745 adapter->total_tx_bytes = 0;
3746 adapter->total_tx_packets = 0;
3747 adapter->total_rx_bytes = 0;
3748 adapter->total_rx_packets = 0;
3749 __netif_rx_schedule(netdev);
3750 } else
3751 /* this really should not happen! if it does it is basically a
3752 * bug, but not a hard error, so enable ints and continue */
3753 e1000_irq_enable(adapter);
3754 #else
3755 /* Writing IMC and IMS is needed for 82547.
3756 * Due to Hub Link bus being occupied, an interrupt
3757 * de-assertion message is not able to be sent.
3758 * When an interrupt assertion message is generated later,
3759 * two messages are re-ordered and sent out.
3760 * That causes APIC to think 82547 is in de-assertion
3761 * state, while 82547 is in assertion state, resulting
3762 * in dead lock. Writing IMC forces 82547 into
3763 * de-assertion state.
3764 */
3765 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) {
3766 atomic_inc(&adapter->irq_sem);
3767 E1000_WRITE_REG(hw, IMC, ~0);
3768 }
3769
3770 adapter->total_tx_bytes = 0;
3771 adapter->total_rx_bytes = 0;
3772 adapter->total_tx_packets = 0;
3773 adapter->total_rx_packets = 0;
3774
3775 for (i = 0; i < E1000_MAX_INTR; i++)
3776 if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
3777 !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
3778 break;
3779
3780 if (likely(adapter->itr_setting & 3))
3781 e1000_set_itr(adapter);
3782
3783 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
3784 e1000_irq_enable(adapter);
3785
3786 #endif
3787 return IRQ_HANDLED;
3788 }
3789
3790 #ifdef CONFIG_E1000_NAPI
3791 /**
3792 * e1000_clean - NAPI Rx polling callback
3793 * @adapter: board private structure
3794 **/
3795
3796 static int
3797 e1000_clean(struct net_device *poll_dev, int *budget)
3798 {
3799 struct e1000_adapter *adapter;
3800 int work_to_do = min(*budget, poll_dev->quota);
3801 int tx_cleaned = 0, work_done = 0;
3802
3803 /* Must NOT use netdev_priv macro here. */
3804 adapter = poll_dev->priv;
3805
3806 /* Keep link state information with original netdev */
3807 if (!netif_carrier_ok(poll_dev))
3808 goto quit_polling;
3809
3810 /* e1000_clean is called per-cpu. This lock protects
3811 * tx_ring[0] from being cleaned by multiple cpus
3812 * simultaneously. A failure obtaining the lock means
3813 * tx_ring[0] is currently being cleaned anyway. */
3814 if (spin_trylock(&adapter->tx_queue_lock)) {
3815 tx_cleaned = e1000_clean_tx_irq(adapter,
3816 &adapter->tx_ring[0]);
3817 spin_unlock(&adapter->tx_queue_lock);
3818 }
3819
3820 adapter->clean_rx(adapter, &adapter->rx_ring[0],
3821 &work_done, work_to_do);
3822
3823 *budget -= work_done;
3824 poll_dev->quota -= work_done;
3825
3826 /* If no Tx and not enough Rx work done, exit the polling mode */
3827 if ((!tx_cleaned && (work_done == 0)) ||
3828 !netif_running(poll_dev)) {
3829 quit_polling:
3830 if (likely(adapter->itr_setting & 3))
3831 e1000_set_itr(adapter);
3832 netif_rx_complete(poll_dev);
3833 e1000_irq_enable(adapter);
3834 return 0;
3835 }
3836
3837 return 1;
3838 }
3839
3840 #endif
3841 /**
3842 * e1000_clean_tx_irq - Reclaim resources after transmit completes
3843 * @adapter: board private structure
3844 **/
3845
3846 static boolean_t
3847 e1000_clean_tx_irq(struct e1000_adapter *adapter,
3848 struct e1000_tx_ring *tx_ring)
3849 {
3850 struct net_device *netdev = adapter->netdev;
3851 struct e1000_tx_desc *tx_desc, *eop_desc;
3852 struct e1000_buffer *buffer_info;
3853 unsigned int i, eop;
3854 #ifdef CONFIG_E1000_NAPI
3855 unsigned int count = 0;
3856 #endif
3857 boolean_t cleaned = FALSE;
3858 unsigned int total_tx_bytes=0, total_tx_packets=0;
3859
3860 i = tx_ring->next_to_clean;
3861 eop = tx_ring->buffer_info[i].next_to_watch;
3862 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3863
3864 while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
3865 for (cleaned = FALSE; !cleaned; ) {
3866 tx_desc = E1000_TX_DESC(*tx_ring, i);
3867 buffer_info = &tx_ring->buffer_info[i];
3868 cleaned = (i == eop);
3869
3870 if (cleaned) {
3871 /* this packet count is wrong for TSO but has a
3872 * tendency to make dynamic ITR change more
3873 * towards bulk */
3874 total_tx_packets++;
3875 total_tx_bytes += buffer_info->skb->len;
3876 }
3877 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
3878 tx_desc->upper.data = 0;
3879
3880 if (unlikely(++i == tx_ring->count)) i = 0;
3881 }
3882
3883 eop = tx_ring->buffer_info[i].next_to_watch;
3884 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3885 #ifdef CONFIG_E1000_NAPI
3886 #define E1000_TX_WEIGHT 64
3887 /* weight of a sort for tx, to avoid endless transmit cleanup */
3888 if (count++ == E1000_TX_WEIGHT) break;
3889 #endif
3890 }
3891
3892 tx_ring->next_to_clean = i;
3893
3894 #define TX_WAKE_THRESHOLD 32
3895 if (unlikely(cleaned && netif_carrier_ok(netdev) &&
3896 E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) {
3897 /* Make sure that anybody stopping the queue after this
3898 * sees the new next_to_clean.
3899 */
3900 smp_mb();
3901 if (netif_queue_stopped(netdev)) {
3902 netif_wake_queue(netdev);
3903 ++adapter->restart_queue;
3904 }
3905 }
3906
3907 if (adapter->detect_tx_hung) {
3908 /* Detect a transmit hang in hardware, this serializes the
3909 * check with the clearing of time_stamp and movement of i */
3910 adapter->detect_tx_hung = FALSE;
3911 if (tx_ring->buffer_info[eop].dma &&
3912 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
3913 (adapter->tx_timeout_factor * HZ))
3914 && !(E1000_READ_REG(&adapter->hw, STATUS) &
3915 E1000_STATUS_TXOFF)) {
3916
3917 /* detected Tx unit hang */
3918 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
3919 " Tx Queue <%lu>\n"
3920 " TDH <%x>\n"
3921 " TDT <%x>\n"
3922 " next_to_use <%x>\n"
3923 " next_to_clean <%x>\n"
3924 "buffer_info[next_to_clean]\n"
3925 " time_stamp <%lx>\n"
3926 " next_to_watch <%x>\n"
3927 " jiffies <%lx>\n"
3928 " next_to_watch.status <%x>\n",
3929 (unsigned long)((tx_ring - adapter->tx_ring) /
3930 sizeof(struct e1000_tx_ring)),
3931 readl(adapter->hw.hw_addr + tx_ring->tdh),
3932 readl(adapter->hw.hw_addr + tx_ring->tdt),
3933 tx_ring->next_to_use,
3934 tx_ring->next_to_clean,
3935 tx_ring->buffer_info[eop].time_stamp,
3936 eop,
3937 jiffies,
3938 eop_desc->upper.fields.status);
3939 netif_stop_queue(netdev);
3940 }
3941 }
3942 adapter->total_tx_bytes += total_tx_bytes;
3943 adapter->total_tx_packets += total_tx_packets;
3944 return cleaned;
3945 }
3946
3947 /**
3948 * e1000_rx_checksum - Receive Checksum Offload for 82543
3949 * @adapter: board private structure
3950 * @status_err: receive descriptor status and error fields
3951 * @csum: receive descriptor csum field
3952 * @sk_buff: socket buffer with received data
3953 **/
3954
3955 static void
3956 e1000_rx_checksum(struct e1000_adapter *adapter,
3957 uint32_t status_err, uint32_t csum,
3958 struct sk_buff *skb)
3959 {
3960 uint16_t status = (uint16_t)status_err;
3961 uint8_t errors = (uint8_t)(status_err >> 24);
3962 skb->ip_summed = CHECKSUM_NONE;
3963
3964 /* 82543 or newer only */
3965 if (unlikely(adapter->hw.mac_type < e1000_82543)) return;
3966 /* Ignore Checksum bit is set */
3967 if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
3968 /* TCP/UDP checksum error bit is set */
3969 if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
3970 /* let the stack verify checksum errors */
3971 adapter->hw_csum_err++;
3972 return;
3973 }
3974 /* TCP/UDP Checksum has not been calculated */
3975 if (adapter->hw.mac_type <= e1000_82547_rev_2) {
3976 if (!(status & E1000_RXD_STAT_TCPCS))
3977 return;
3978 } else {
3979 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
3980 return;
3981 }
3982 /* It must be a TCP or UDP packet with a valid checksum */
3983 if (likely(status & E1000_RXD_STAT_TCPCS)) {
3984 /* TCP checksum is good */
3985 skb->ip_summed = CHECKSUM_UNNECESSARY;
3986 } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
3987 /* IP fragment with UDP payload */
3988 /* Hardware complements the payload checksum, so we undo it
3989 * and then put the value in host order for further stack use.
3990 */
3991 csum = ntohl(csum ^ 0xFFFF);
3992 skb->csum = csum;
3993 skb->ip_summed = CHECKSUM_COMPLETE;
3994 }
3995 adapter->hw_csum_good++;
3996 }
3997
3998 /**
3999 * e1000_clean_rx_irq - Send received data up the network stack; legacy
4000 * @adapter: board private structure
4001 **/
4002
4003 static boolean_t
4004 #ifdef CONFIG_E1000_NAPI
4005 e1000_clean_rx_irq(struct e1000_adapter *adapter,
4006 struct e1000_rx_ring *rx_ring,
4007 int *work_done, int work_to_do)
4008 #else
4009 e1000_clean_rx_irq(struct e1000_adapter *adapter,
4010 struct e1000_rx_ring *rx_ring)
4011 #endif
4012 {
4013 struct net_device *netdev = adapter->netdev;
4014 struct pci_dev *pdev = adapter->pdev;
4015 struct e1000_rx_desc *rx_desc, *next_rxd;
4016 struct e1000_buffer *buffer_info, *next_buffer;
4017 unsigned long flags;
4018 uint32_t length;
4019 uint8_t last_byte;
4020 unsigned int i;
4021 int cleaned_count = 0;
4022 boolean_t cleaned = FALSE;
4023 unsigned int total_rx_bytes=0, total_rx_packets=0;
4024
4025 i = rx_ring->next_to_clean;
4026 rx_desc = E1000_RX_DESC(*rx_ring, i);
4027 buffer_info = &rx_ring->buffer_info[i];
4028
4029 while (rx_desc->status & E1000_RXD_STAT_DD) {
4030 struct sk_buff *skb;
4031 u8 status;
4032
4033 #ifdef CONFIG_E1000_NAPI
4034 if (*work_done >= work_to_do)
4035 break;
4036 (*work_done)++;
4037 #endif
4038 status = rx_desc->status;
4039 skb = buffer_info->skb;
4040 buffer_info->skb = NULL;
4041
4042 prefetch(skb->data - NET_IP_ALIGN);
4043
4044 if (++i == rx_ring->count) i = 0;
4045 next_rxd = E1000_RX_DESC(*rx_ring, i);
4046 prefetch(next_rxd);
4047
4048 next_buffer = &rx_ring->buffer_info[i];
4049
4050 cleaned = TRUE;
4051 cleaned_count++;
4052 pci_unmap_single(pdev,
4053 buffer_info->dma,
4054 buffer_info->length,
4055 PCI_DMA_FROMDEVICE);
4056
4057 length = le16_to_cpu(rx_desc->length);
4058
4059 if (unlikely(!(status & E1000_RXD_STAT_EOP))) {
4060 /* All receives must fit into a single buffer */
4061 E1000_DBG("%s: Receive packet consumed multiple"
4062 " buffers\n", netdev->name);
4063 /* recycle */
4064 buffer_info->skb = skb;
4065 goto next_desc;
4066 }
4067
4068 if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
4069 last_byte = *(skb->data + length - 1);
4070 if (TBI_ACCEPT(&adapter->hw, status,
4071 rx_desc->errors, length, last_byte)) {
4072 spin_lock_irqsave(&adapter->stats_lock, flags);
4073 e1000_tbi_adjust_stats(&adapter->hw,
4074 &adapter->stats,
4075 length, skb->data);
4076 spin_unlock_irqrestore(&adapter->stats_lock,
4077 flags);
4078 length--;
4079 } else {
4080 /* recycle */
4081 buffer_info->skb = skb;
4082 goto next_desc;
4083 }
4084 }
4085
4086 /* adjust length to remove Ethernet CRC, this must be
4087 * done after the TBI_ACCEPT workaround above */
4088 length -= 4;
4089
4090 /* probably a little skewed due to removing CRC */
4091 total_rx_bytes += length;
4092 total_rx_packets++;
4093
4094 /* code added for copybreak, this should improve
4095 * performance for small packets with large amounts
4096 * of reassembly being done in the stack */
4097 #define E1000_CB_LENGTH 256
4098 if (length < E1000_CB_LENGTH) {
4099 struct sk_buff *new_skb =
4100 netdev_alloc_skb(netdev, length + NET_IP_ALIGN);
4101 if (new_skb) {
4102 skb_reserve(new_skb, NET_IP_ALIGN);
4103 memcpy(new_skb->data - NET_IP_ALIGN,
4104 skb->data - NET_IP_ALIGN,
4105 length + NET_IP_ALIGN);
4106 /* save the skb in buffer_info as good */
4107 buffer_info->skb = skb;
4108 skb = new_skb;
4109 }
4110 /* else just continue with the old one */
4111 }
4112 /* end copybreak code */
4113 skb_put(skb, length);
4114
4115 /* Receive Checksum Offload */
4116 e1000_rx_checksum(adapter,
4117 (uint32_t)(status) |
4118 ((uint32_t)(rx_desc->errors) << 24),
4119 le16_to_cpu(rx_desc->csum), skb);
4120
4121 skb->protocol = eth_type_trans(skb, netdev);
4122 #ifdef CONFIG_E1000_NAPI
4123 if (unlikely(adapter->vlgrp &&
4124 (status & E1000_RXD_STAT_VP))) {
4125 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
4126 le16_to_cpu(rx_desc->special) &
4127 E1000_RXD_SPC_VLAN_MASK);
4128 } else {
4129 netif_receive_skb(skb);
4130 }
4131 #else /* CONFIG_E1000_NAPI */
4132 if (unlikely(adapter->vlgrp &&
4133 (status & E1000_RXD_STAT_VP))) {
4134 vlan_hwaccel_rx(skb, adapter->vlgrp,
4135 le16_to_cpu(rx_desc->special) &
4136 E1000_RXD_SPC_VLAN_MASK);
4137 } else {
4138 netif_rx(skb);
4139 }
4140 #endif /* CONFIG_E1000_NAPI */
4141 netdev->last_rx = jiffies;
4142
4143 next_desc:
4144 rx_desc->status = 0;
4145
4146 /* return some buffers to hardware, one at a time is too slow */
4147 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
4148 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4149 cleaned_count = 0;
4150 }
4151
4152 /* use prefetched values */
4153 rx_desc = next_rxd;
4154 buffer_info = next_buffer;
4155 }
4156 rx_ring->next_to_clean = i;
4157
4158 cleaned_count = E1000_DESC_UNUSED(rx_ring);
4159 if (cleaned_count)
4160 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4161
4162 adapter->total_rx_packets += total_rx_packets;
4163 adapter->total_rx_bytes += total_rx_bytes;
4164 return cleaned;
4165 }
4166
4167 /**
4168 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
4169 * @adapter: board private structure
4170 **/
4171
4172 static boolean_t
4173 #ifdef CONFIG_E1000_NAPI
4174 e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
4175 struct e1000_rx_ring *rx_ring,
4176 int *work_done, int work_to_do)
4177 #else
4178 e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
4179 struct e1000_rx_ring *rx_ring)
4180 #endif
4181 {
4182 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
4183 struct net_device *netdev = adapter->netdev;
4184 struct pci_dev *pdev = adapter->pdev;
4185 struct e1000_buffer *buffer_info, *next_buffer;
4186 struct e1000_ps_page *ps_page;
4187 struct e1000_ps_page_dma *ps_page_dma;
4188 struct sk_buff *skb;
4189 unsigned int i, j;
4190 uint32_t length, staterr;
4191 int cleaned_count = 0;
4192 boolean_t cleaned = FALSE;
4193 unsigned int total_rx_bytes=0, total_rx_packets=0;
4194
4195 i = rx_ring->next_to_clean;
4196 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
4197 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
4198 buffer_info = &rx_ring->buffer_info[i];
4199
4200 while (staterr & E1000_RXD_STAT_DD) {
4201 ps_page = &rx_ring->ps_page[i];
4202 ps_page_dma = &rx_ring->ps_page_dma[i];
4203 #ifdef CONFIG_E1000_NAPI
4204 if (unlikely(*work_done >= work_to_do))
4205 break;
4206 (*work_done)++;
4207 #endif
4208 skb = buffer_info->skb;
4209
4210 /* in the packet split case this is header only */
4211 prefetch(skb->data - NET_IP_ALIGN);
4212
4213 if (++i == rx_ring->count) i = 0;
4214 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
4215 prefetch(next_rxd);
4216
4217 next_buffer = &rx_ring->buffer_info[i];
4218
4219 cleaned = TRUE;
4220 cleaned_count++;
4221 pci_unmap_single(pdev, buffer_info->dma,
4222 buffer_info->length,
4223 PCI_DMA_FROMDEVICE);
4224
4225 if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
4226 E1000_DBG("%s: Packet Split buffers didn't pick up"
4227 " the full packet\n", netdev->name);
4228 dev_kfree_skb_irq(skb);
4229 goto next_desc;
4230 }
4231
4232 if (unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
4233 dev_kfree_skb_irq(skb);
4234 goto next_desc;
4235 }
4236
4237 length = le16_to_cpu(rx_desc->wb.middle.length0);
4238
4239 if (unlikely(!length)) {
4240 E1000_DBG("%s: Last part of the packet spanning"
4241 " multiple descriptors\n", netdev->name);
4242 dev_kfree_skb_irq(skb);
4243 goto next_desc;
4244 }
4245
4246 /* Good Receive */
4247 skb_put(skb, length);
4248
4249 {
4250 /* this looks ugly, but it seems compiler issues make it
4251 more efficient than reusing j */
4252 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
4253
4254 /* page alloc/put takes too long and effects small packet
4255 * throughput, so unsplit small packets and save the alloc/put*/
4256 if (l1 && ((length + l1) <= adapter->rx_ps_bsize0)) {
4257 u8 *vaddr;
4258 /* there is no documentation about how to call
4259 * kmap_atomic, so we can't hold the mapping
4260 * very long */
4261 pci_dma_sync_single_for_cpu(pdev,
4262 ps_page_dma->ps_page_dma[0],
4263 PAGE_SIZE,
4264 PCI_DMA_FROMDEVICE);
4265 vaddr = kmap_atomic(ps_page->ps_page[0],
4266 KM_SKB_DATA_SOFTIRQ);
4267 memcpy(skb->tail, vaddr, l1);
4268 kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
4269 pci_dma_sync_single_for_device(pdev,
4270 ps_page_dma->ps_page_dma[0],
4271 PAGE_SIZE, PCI_DMA_FROMDEVICE);
4272 /* remove the CRC */
4273 l1 -= 4;
4274 skb_put(skb, l1);
4275 goto copydone;
4276 } /* if */
4277 }
4278
4279 for (j = 0; j < adapter->rx_ps_pages; j++) {
4280 if (!(length= le16_to_cpu(rx_desc->wb.upper.length[j])))
4281 break;
4282 pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
4283 PAGE_SIZE, PCI_DMA_FROMDEVICE);
4284 ps_page_dma->ps_page_dma[j] = 0;
4285 skb_fill_page_desc(skb, j, ps_page->ps_page[j], 0,
4286 length);
4287 ps_page->ps_page[j] = NULL;
4288 skb->len += length;
4289 skb->data_len += length;
4290 skb->truesize += length;
4291 }
4292
4293 /* strip the ethernet crc, problem is we're using pages now so
4294 * this whole operation can get a little cpu intensive */
4295 pskb_trim(skb, skb->len - 4);
4296
4297 copydone:
4298 total_rx_bytes += skb->len;
4299 total_rx_packets++;
4300
4301 e1000_rx_checksum(adapter, staterr,
4302 le16_to_cpu(rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
4303 skb->protocol = eth_type_trans(skb, netdev);
4304
4305 if (likely(rx_desc->wb.upper.header_status &
4306 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP)))
4307 adapter->rx_hdr_split++;
4308 #ifdef CONFIG_E1000_NAPI
4309 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
4310 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
4311 le16_to_cpu(rx_desc->wb.middle.vlan) &
4312 E1000_RXD_SPC_VLAN_MASK);
4313 } else {
4314 netif_receive_skb(skb);
4315 }
4316 #else /* CONFIG_E1000_NAPI */
4317 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
4318 vlan_hwaccel_rx(skb, adapter->vlgrp,
4319 le16_to_cpu(rx_desc->wb.middle.vlan) &
4320 E1000_RXD_SPC_VLAN_MASK);
4321 } else {
4322 netif_rx(skb);
4323 }
4324 #endif /* CONFIG_E1000_NAPI */
4325 netdev->last_rx = jiffies;
4326
4327 next_desc:
4328 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
4329 buffer_info->skb = NULL;
4330
4331 /* return some buffers to hardware, one at a time is too slow */
4332 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
4333 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4334 cleaned_count = 0;
4335 }
4336
4337 /* use prefetched values */
4338 rx_desc = next_rxd;
4339 buffer_info = next_buffer;
4340
4341 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
4342 }
4343 rx_ring->next_to_clean = i;
4344
4345 cleaned_count = E1000_DESC_UNUSED(rx_ring);
4346 if (cleaned_count)
4347 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4348
4349 adapter->total_rx_packets += total_rx_packets;
4350 adapter->total_rx_bytes += total_rx_bytes;
4351 return cleaned;
4352 }
4353
4354 /**
4355 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
4356 * @adapter: address of board private structure
4357 **/
4358
4359 static void
4360 e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
4361 struct e1000_rx_ring *rx_ring,
4362 int cleaned_count)
4363 {
4364 struct net_device *netdev = adapter->netdev;
4365 struct pci_dev *pdev = adapter->pdev;
4366 struct e1000_rx_desc *rx_desc;
4367 struct e1000_buffer *buffer_info;
4368 struct sk_buff *skb;
4369 unsigned int i;
4370 unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
4371
4372 i = rx_ring->next_to_use;
4373 buffer_info = &rx_ring->buffer_info[i];
4374
4375 while (cleaned_count--) {
4376 skb = buffer_info->skb;
4377 if (skb) {
4378 skb_trim(skb, 0);
4379 goto map_skb;
4380 }
4381
4382 skb = netdev_alloc_skb(netdev, bufsz);
4383 if (unlikely(!skb)) {
4384 /* Better luck next round */
4385 adapter->alloc_rx_buff_failed++;
4386 break;
4387 }
4388
4389 /* Fix for errata 23, can't cross 64kB boundary */
4390 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4391 struct sk_buff *oldskb = skb;
4392 DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
4393 "at %p\n", bufsz, skb->data);
4394 /* Try again, without freeing the previous */
4395 skb = netdev_alloc_skb(netdev, bufsz);
4396 /* Failed allocation, critical failure */
4397 if (!skb) {
4398 dev_kfree_skb(oldskb);
4399 break;
4400 }
4401
4402 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4403 /* give up */
4404 dev_kfree_skb(skb);
4405 dev_kfree_skb(oldskb);
4406 break; /* while !buffer_info->skb */
4407 }
4408
4409 /* Use new allocation */
4410 dev_kfree_skb(oldskb);
4411 }
4412 /* Make buffer alignment 2 beyond a 16 byte boundary
4413 * this will result in a 16 byte aligned IP header after
4414 * the 14 byte MAC header is removed
4415 */
4416 skb_reserve(skb, NET_IP_ALIGN);
4417
4418 buffer_info->skb = skb;
4419 buffer_info->length = adapter->rx_buffer_len;
4420 map_skb:
4421 buffer_info->dma = pci_map_single(pdev,
4422 skb->data,
4423 adapter->rx_buffer_len,
4424 PCI_DMA_FROMDEVICE);
4425
4426 /* Fix for errata 23, can't cross 64kB boundary */
4427 if (!e1000_check_64k_bound(adapter,
4428 (void *)(unsigned long)buffer_info->dma,
4429 adapter->rx_buffer_len)) {
4430 DPRINTK(RX_ERR, ERR,
4431 "dma align check failed: %u bytes at %p\n",
4432 adapter->rx_buffer_len,
4433 (void *)(unsigned long)buffer_info->dma);
4434 dev_kfree_skb(skb);
4435 buffer_info->skb = NULL;
4436
4437 pci_unmap_single(pdev, buffer_info->dma,
4438 adapter->rx_buffer_len,
4439 PCI_DMA_FROMDEVICE);
4440
4441 break; /* while !buffer_info->skb */
4442 }
4443 rx_desc = E1000_RX_DESC(*rx_ring, i);
4444 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4445
4446 if (unlikely(++i == rx_ring->count))
4447 i = 0;
4448 buffer_info = &rx_ring->buffer_info[i];
4449 }
4450
4451 if (likely(rx_ring->next_to_use != i)) {
4452 rx_ring->next_to_use = i;
4453 if (unlikely(i-- == 0))
4454 i = (rx_ring->count - 1);
4455
4456 /* Force memory writes to complete before letting h/w
4457 * know there are new descriptors to fetch. (Only
4458 * applicable for weak-ordered memory model archs,
4459 * such as IA-64). */
4460 wmb();
4461 writel(i, adapter->hw.hw_addr + rx_ring->rdt);
4462 }
4463 }
4464
4465 /**
4466 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
4467 * @adapter: address of board private structure
4468 **/
4469
4470 static void
4471 e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
4472 struct e1000_rx_ring *rx_ring,
4473 int cleaned_count)
4474 {
4475 struct net_device *netdev = adapter->netdev;
4476 struct pci_dev *pdev = adapter->pdev;
4477 union e1000_rx_desc_packet_split *rx_desc;
4478 struct e1000_buffer *buffer_info;
4479 struct e1000_ps_page *ps_page;
4480 struct e1000_ps_page_dma *ps_page_dma;
4481 struct sk_buff *skb;
4482 unsigned int i, j;
4483
4484 i = rx_ring->next_to_use;
4485 buffer_info = &rx_ring->buffer_info[i];
4486 ps_page = &rx_ring->ps_page[i];
4487 ps_page_dma = &rx_ring->ps_page_dma[i];
4488
4489 while (cleaned_count--) {
4490 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
4491
4492 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
4493 if (j < adapter->rx_ps_pages) {
4494 if (likely(!ps_page->ps_page[j])) {
4495 ps_page->ps_page[j] =
4496 alloc_page(GFP_ATOMIC);
4497 if (unlikely(!ps_page->ps_page[j])) {
4498 adapter->alloc_rx_buff_failed++;
4499 goto no_buffers;
4500 }
4501 ps_page_dma->ps_page_dma[j] =
4502 pci_map_page(pdev,
4503 ps_page->ps_page[j],
4504 0, PAGE_SIZE,
4505 PCI_DMA_FROMDEVICE);
4506 }
4507 /* Refresh the desc even if buffer_addrs didn't
4508 * change because each write-back erases
4509 * this info.
4510 */
4511 rx_desc->read.buffer_addr[j+1] =
4512 cpu_to_le64(ps_page_dma->ps_page_dma[j]);
4513 } else
4514 rx_desc->read.buffer_addr[j+1] = ~0;
4515 }
4516
4517 skb = netdev_alloc_skb(netdev,
4518 adapter->rx_ps_bsize0 + NET_IP_ALIGN);
4519
4520 if (unlikely(!skb)) {
4521 adapter->alloc_rx_buff_failed++;
4522 break;
4523 }
4524
4525 /* Make buffer alignment 2 beyond a 16 byte boundary
4526 * this will result in a 16 byte aligned IP header after
4527 * the 14 byte MAC header is removed
4528 */
4529 skb_reserve(skb, NET_IP_ALIGN);
4530
4531 buffer_info->skb = skb;
4532 buffer_info->length = adapter->rx_ps_bsize0;
4533 buffer_info->dma = pci_map_single(pdev, skb->data,
4534 adapter->rx_ps_bsize0,
4535 PCI_DMA_FROMDEVICE);
4536
4537 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
4538
4539 if (unlikely(++i == rx_ring->count)) i = 0;
4540 buffer_info = &rx_ring->buffer_info[i];
4541 ps_page = &rx_ring->ps_page[i];
4542 ps_page_dma = &rx_ring->ps_page_dma[i];
4543 }
4544
4545 no_buffers:
4546 if (likely(rx_ring->next_to_use != i)) {
4547 rx_ring->next_to_use = i;
4548 if (unlikely(i-- == 0)) i = (rx_ring->count - 1);
4549
4550 /* Force memory writes to complete before letting h/w
4551 * know there are new descriptors to fetch. (Only
4552 * applicable for weak-ordered memory model archs,
4553 * such as IA-64). */
4554 wmb();
4555 /* Hardware increments by 16 bytes, but packet split
4556 * descriptors are 32 bytes...so we increment tail
4557 * twice as much.
4558 */
4559 writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
4560 }
4561 }
4562
4563 /**
4564 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
4565 * @adapter:
4566 **/
4567
4568 static void
4569 e1000_smartspeed(struct e1000_adapter *adapter)
4570 {
4571 uint16_t phy_status;
4572 uint16_t phy_ctrl;
4573
4574 if ((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
4575 !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
4576 return;
4577
4578 if (adapter->smartspeed == 0) {
4579 /* If Master/Slave config fault is asserted twice,
4580 * we assume back-to-back */
4581 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
4582 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
4583 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
4584 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
4585 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
4586 if (phy_ctrl & CR_1000T_MS_ENABLE) {
4587 phy_ctrl &= ~CR_1000T_MS_ENABLE;
4588 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
4589 phy_ctrl);
4590 adapter->smartspeed++;
4591 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
4592 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
4593 &phy_ctrl)) {
4594 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4595 MII_CR_RESTART_AUTO_NEG);
4596 e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
4597 phy_ctrl);
4598 }
4599 }
4600 return;
4601 } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
4602 /* If still no link, perhaps using 2/3 pair cable */
4603 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
4604 phy_ctrl |= CR_1000T_MS_ENABLE;
4605 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
4606 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
4607 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
4608 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4609 MII_CR_RESTART_AUTO_NEG);
4610 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
4611 }
4612 }
4613 /* Restart process after E1000_SMARTSPEED_MAX iterations */
4614 if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
4615 adapter->smartspeed = 0;
4616 }
4617
4618 /**
4619 * e1000_ioctl -
4620 * @netdev:
4621 * @ifreq:
4622 * @cmd:
4623 **/
4624
4625 static int
4626 e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4627 {
4628 switch (cmd) {
4629 case SIOCGMIIPHY:
4630 case SIOCGMIIREG:
4631 case SIOCSMIIREG:
4632 return e1000_mii_ioctl(netdev, ifr, cmd);
4633 default:
4634 return -EOPNOTSUPP;
4635 }
4636 }
4637
4638 /**
4639 * e1000_mii_ioctl -
4640 * @netdev:
4641 * @ifreq:
4642 * @cmd:
4643 **/
4644
4645 static int
4646 e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4647 {
4648 struct e1000_adapter *adapter = netdev_priv(netdev);
4649 struct mii_ioctl_data *data = if_mii(ifr);
4650 int retval;
4651 uint16_t mii_reg;
4652 uint16_t spddplx;
4653 unsigned long flags;
4654
4655 if (adapter->hw.media_type != e1000_media_type_copper)
4656 return -EOPNOTSUPP;
4657
4658 switch (cmd) {
4659 case SIOCGMIIPHY:
4660 data->phy_id = adapter->hw.phy_addr;
4661 break;
4662 case SIOCGMIIREG:
4663 if (!capable(CAP_NET_ADMIN))
4664 return -EPERM;
4665 spin_lock_irqsave(&adapter->stats_lock, flags);
4666 if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
4667 &data->val_out)) {
4668 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4669 return -EIO;
4670 }
4671 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4672 break;
4673 case SIOCSMIIREG:
4674 if (!capable(CAP_NET_ADMIN))
4675 return -EPERM;
4676 if (data->reg_num & ~(0x1F))
4677 return -EFAULT;
4678 mii_reg = data->val_in;
4679 spin_lock_irqsave(&adapter->stats_lock, flags);
4680 if (e1000_write_phy_reg(&adapter->hw, data->reg_num,
4681 mii_reg)) {
4682 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4683 return -EIO;
4684 }
4685 if (adapter->hw.media_type == e1000_media_type_copper) {
4686 switch (data->reg_num) {
4687 case PHY_CTRL:
4688 if (mii_reg & MII_CR_POWER_DOWN)
4689 break;
4690 if (mii_reg & MII_CR_AUTO_NEG_EN) {
4691 adapter->hw.autoneg = 1;
4692 adapter->hw.autoneg_advertised = 0x2F;
4693 } else {
4694 if (mii_reg & 0x40)
4695 spddplx = SPEED_1000;
4696 else if (mii_reg & 0x2000)
4697 spddplx = SPEED_100;
4698 else
4699 spddplx = SPEED_10;
4700 spddplx += (mii_reg & 0x100)
4701 ? DUPLEX_FULL :
4702 DUPLEX_HALF;
4703 retval = e1000_set_spd_dplx(adapter,
4704 spddplx);
4705 if (retval) {
4706 spin_unlock_irqrestore(
4707 &adapter->stats_lock,
4708 flags);
4709 return retval;
4710 }
4711 }
4712 if (netif_running(adapter->netdev))
4713 e1000_reinit_locked(adapter);
4714 else
4715 e1000_reset(adapter);
4716 break;
4717 case M88E1000_PHY_SPEC_CTRL:
4718 case M88E1000_EXT_PHY_SPEC_CTRL:
4719 if (e1000_phy_reset(&adapter->hw)) {
4720 spin_unlock_irqrestore(
4721 &adapter->stats_lock, flags);
4722 return -EIO;
4723 }
4724 break;
4725 }
4726 } else {
4727 switch (data->reg_num) {
4728 case PHY_CTRL:
4729 if (mii_reg & MII_CR_POWER_DOWN)
4730 break;
4731 if (netif_running(adapter->netdev))
4732 e1000_reinit_locked(adapter);
4733 else
4734 e1000_reset(adapter);
4735 break;
4736 }
4737 }
4738 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4739 break;
4740 default:
4741 return -EOPNOTSUPP;
4742 }
4743 return E1000_SUCCESS;
4744 }
4745
4746 void
4747 e1000_pci_set_mwi(struct e1000_hw *hw)
4748 {
4749 struct e1000_adapter *adapter = hw->back;
4750 int ret_val = pci_set_mwi(adapter->pdev);
4751
4752 if (ret_val)
4753 DPRINTK(PROBE, ERR, "Error in setting MWI\n");
4754 }
4755
4756 void
4757 e1000_pci_clear_mwi(struct e1000_hw *hw)
4758 {
4759 struct e1000_adapter *adapter = hw->back;
4760
4761 pci_clear_mwi(adapter->pdev);
4762 }
4763
4764 void
4765 e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4766 {
4767 struct e1000_adapter *adapter = hw->back;
4768
4769 pci_read_config_word(adapter->pdev, reg, value);
4770 }
4771
4772 void
4773 e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4774 {
4775 struct e1000_adapter *adapter = hw->back;
4776
4777 pci_write_config_word(adapter->pdev, reg, *value);
4778 }
4779
4780 int32_t
4781 e1000_read_pcie_cap_reg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4782 {
4783 struct e1000_adapter *adapter = hw->back;
4784 uint16_t cap_offset;
4785
4786 cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP);
4787 if (!cap_offset)
4788 return -E1000_ERR_CONFIG;
4789
4790 pci_read_config_word(adapter->pdev, cap_offset + reg, value);
4791
4792 return E1000_SUCCESS;
4793 }
4794
4795 void
4796 e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
4797 {
4798 outl(value, port);
4799 }
4800
4801 static void
4802 e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
4803 {
4804 struct e1000_adapter *adapter = netdev_priv(netdev);
4805 uint32_t ctrl, rctl;
4806
4807 e1000_irq_disable(adapter);
4808 adapter->vlgrp = grp;
4809
4810 if (grp) {
4811 /* enable VLAN tag insert/strip */
4812 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4813 ctrl |= E1000_CTRL_VME;
4814 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4815
4816 if (adapter->hw.mac_type != e1000_ich8lan) {
4817 /* enable VLAN receive filtering */
4818 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4819 rctl |= E1000_RCTL_VFE;
4820 rctl &= ~E1000_RCTL_CFIEN;
4821 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4822 e1000_update_mng_vlan(adapter);
4823 }
4824 } else {
4825 /* disable VLAN tag insert/strip */
4826 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4827 ctrl &= ~E1000_CTRL_VME;
4828 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4829
4830 if (adapter->hw.mac_type != e1000_ich8lan) {
4831 /* disable VLAN filtering */
4832 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4833 rctl &= ~E1000_RCTL_VFE;
4834 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4835 if (adapter->mng_vlan_id !=
4836 (uint16_t)E1000_MNG_VLAN_NONE) {
4837 e1000_vlan_rx_kill_vid(netdev,
4838 adapter->mng_vlan_id);
4839 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4840 }
4841 }
4842 }
4843
4844 e1000_irq_enable(adapter);
4845 }
4846
4847 static void
4848 e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
4849 {
4850 struct e1000_adapter *adapter = netdev_priv(netdev);
4851 uint32_t vfta, index;
4852
4853 if ((adapter->hw.mng_cookie.status &
4854 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4855 (vid == adapter->mng_vlan_id))
4856 return;
4857 /* add VID to filter table */
4858 index = (vid >> 5) & 0x7F;
4859 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4860 vfta |= (1 << (vid & 0x1F));
4861 e1000_write_vfta(&adapter->hw, index, vfta);
4862 }
4863
4864 static void
4865 e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
4866 {
4867 struct e1000_adapter *adapter = netdev_priv(netdev);
4868 uint32_t vfta, index;
4869
4870 e1000_irq_disable(adapter);
4871
4872 if (adapter->vlgrp)
4873 adapter->vlgrp->vlan_devices[vid] = NULL;
4874
4875 e1000_irq_enable(adapter);
4876
4877 if ((adapter->hw.mng_cookie.status &
4878 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4879 (vid == adapter->mng_vlan_id)) {
4880 /* release control to f/w */
4881 e1000_release_hw_control(adapter);
4882 return;
4883 }
4884
4885 /* remove VID from filter table */
4886 index = (vid >> 5) & 0x7F;
4887 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4888 vfta &= ~(1 << (vid & 0x1F));
4889 e1000_write_vfta(&adapter->hw, index, vfta);
4890 }
4891
4892 static void
4893 e1000_restore_vlan(struct e1000_adapter *adapter)
4894 {
4895 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
4896
4897 if (adapter->vlgrp) {
4898 uint16_t vid;
4899 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
4900 if (!adapter->vlgrp->vlan_devices[vid])
4901 continue;
4902 e1000_vlan_rx_add_vid(adapter->netdev, vid);
4903 }
4904 }
4905 }
4906
4907 int
4908 e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
4909 {
4910 adapter->hw.autoneg = 0;
4911
4912 /* Fiber NICs only allow 1000 gbps Full duplex */
4913 if ((adapter->hw.media_type == e1000_media_type_fiber) &&
4914 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
4915 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
4916 return -EINVAL;
4917 }
4918
4919 switch (spddplx) {
4920 case SPEED_10 + DUPLEX_HALF:
4921 adapter->hw.forced_speed_duplex = e1000_10_half;
4922 break;
4923 case SPEED_10 + DUPLEX_FULL:
4924 adapter->hw.forced_speed_duplex = e1000_10_full;
4925 break;
4926 case SPEED_100 + DUPLEX_HALF:
4927 adapter->hw.forced_speed_duplex = e1000_100_half;
4928 break;
4929 case SPEED_100 + DUPLEX_FULL:
4930 adapter->hw.forced_speed_duplex = e1000_100_full;
4931 break;
4932 case SPEED_1000 + DUPLEX_FULL:
4933 adapter->hw.autoneg = 1;
4934 adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
4935 break;
4936 case SPEED_1000 + DUPLEX_HALF: /* not supported */
4937 default:
4938 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
4939 return -EINVAL;
4940 }
4941 return 0;
4942 }
4943
4944 #ifdef CONFIG_PM
4945 /* Save/restore 16 or 64 dwords of PCI config space depending on which
4946 * bus we're on (PCI(X) vs. PCI-E)
4947 */
4948 #define PCIE_CONFIG_SPACE_LEN 256
4949 #define PCI_CONFIG_SPACE_LEN 64
4950 static int
4951 e1000_pci_save_state(struct e1000_adapter *adapter)
4952 {
4953 struct pci_dev *dev = adapter->pdev;
4954 int size;
4955 int i;
4956
4957 if (adapter->hw.mac_type >= e1000_82571)
4958 size = PCIE_CONFIG_SPACE_LEN;
4959 else
4960 size = PCI_CONFIG_SPACE_LEN;
4961
4962 WARN_ON(adapter->config_space != NULL);
4963
4964 adapter->config_space = kmalloc(size, GFP_KERNEL);
4965 if (!adapter->config_space) {
4966 DPRINTK(PROBE, ERR, "unable to allocate %d bytes\n", size);
4967 return -ENOMEM;
4968 }
4969 for (i = 0; i < (size / 4); i++)
4970 pci_read_config_dword(dev, i * 4, &adapter->config_space[i]);
4971 return 0;
4972 }
4973
4974 static void
4975 e1000_pci_restore_state(struct e1000_adapter *adapter)
4976 {
4977 struct pci_dev *dev = adapter->pdev;
4978 int size;
4979 int i;
4980
4981 if (adapter->config_space == NULL)
4982 return;
4983
4984 if (adapter->hw.mac_type >= e1000_82571)
4985 size = PCIE_CONFIG_SPACE_LEN;
4986 else
4987 size = PCI_CONFIG_SPACE_LEN;
4988 for (i = 0; i < (size / 4); i++)
4989 pci_write_config_dword(dev, i * 4, adapter->config_space[i]);
4990 kfree(adapter->config_space);
4991 adapter->config_space = NULL;
4992 return;
4993 }
4994 #endif /* CONFIG_PM */
4995
4996 static int
4997 e1000_suspend(struct pci_dev *pdev, pm_message_t state)
4998 {
4999 struct net_device *netdev = pci_get_drvdata(pdev);
5000 struct e1000_adapter *adapter = netdev_priv(netdev);
5001 uint32_t ctrl, ctrl_ext, rctl, manc, status;
5002 uint32_t wufc = adapter->wol;
5003 #ifdef CONFIG_PM
5004 int retval = 0;
5005 #endif
5006
5007 netif_device_detach(netdev);
5008
5009 if (netif_running(netdev)) {
5010 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
5011 e1000_down(adapter);
5012 }
5013
5014 #ifdef CONFIG_PM
5015 /* Implement our own version of pci_save_state(pdev) because pci-
5016 * express adapters have 256-byte config spaces. */
5017 retval = e1000_pci_save_state(adapter);
5018 if (retval)
5019 return retval;
5020 #endif
5021
5022 status = E1000_READ_REG(&adapter->hw, STATUS);
5023 if (status & E1000_STATUS_LU)
5024 wufc &= ~E1000_WUFC_LNKC;
5025
5026 if (wufc) {
5027 e1000_setup_rctl(adapter);
5028 e1000_set_multi(netdev);
5029
5030 /* turn on all-multi mode if wake on multicast is enabled */
5031 if (wufc & E1000_WUFC_MC) {
5032 rctl = E1000_READ_REG(&adapter->hw, RCTL);
5033 rctl |= E1000_RCTL_MPE;
5034 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
5035 }
5036
5037 if (adapter->hw.mac_type >= e1000_82540) {
5038 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
5039 /* advertise wake from D3Cold */
5040 #define E1000_CTRL_ADVD3WUC 0x00100000
5041 /* phy power management enable */
5042 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
5043 ctrl |= E1000_CTRL_ADVD3WUC |
5044 E1000_CTRL_EN_PHY_PWR_MGMT;
5045 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
5046 }
5047
5048 if (adapter->hw.media_type == e1000_media_type_fiber ||
5049 adapter->hw.media_type == e1000_media_type_internal_serdes) {
5050 /* keep the laser running in D3 */
5051 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
5052 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
5053 E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
5054 }
5055
5056 /* Allow time for pending master requests to run */
5057 e1000_disable_pciex_master(&adapter->hw);
5058
5059 E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
5060 E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
5061 pci_enable_wake(pdev, PCI_D3hot, 1);
5062 pci_enable_wake(pdev, PCI_D3cold, 1);
5063 } else {
5064 E1000_WRITE_REG(&adapter->hw, WUC, 0);
5065 E1000_WRITE_REG(&adapter->hw, WUFC, 0);
5066 pci_enable_wake(pdev, PCI_D3hot, 0);
5067 pci_enable_wake(pdev, PCI_D3cold, 0);
5068 }
5069
5070 if (adapter->hw.mac_type >= e1000_82540 &&
5071 adapter->hw.mac_type < e1000_82571 &&
5072 adapter->hw.media_type == e1000_media_type_copper) {
5073 manc = E1000_READ_REG(&adapter->hw, MANC);
5074 if (manc & E1000_MANC_SMBUS_EN) {
5075 manc |= E1000_MANC_ARP_EN;
5076 E1000_WRITE_REG(&adapter->hw, MANC, manc);
5077 pci_enable_wake(pdev, PCI_D3hot, 1);
5078 pci_enable_wake(pdev, PCI_D3cold, 1);
5079 }
5080 }
5081
5082 if (adapter->hw.phy_type == e1000_phy_igp_3)
5083 e1000_phy_powerdown_workaround(&adapter->hw);
5084
5085 if (netif_running(netdev))
5086 e1000_free_irq(adapter);
5087
5088 /* Release control of h/w to f/w. If f/w is AMT enabled, this
5089 * would have already happened in close and is redundant. */
5090 e1000_release_hw_control(adapter);
5091
5092 pci_disable_device(pdev);
5093
5094 pci_set_power_state(pdev, pci_choose_state(pdev, state));
5095
5096 return 0;
5097 }
5098
5099 #ifdef CONFIG_PM
5100 static int
5101 e1000_resume(struct pci_dev *pdev)
5102 {
5103 struct net_device *netdev = pci_get_drvdata(pdev);
5104 struct e1000_adapter *adapter = netdev_priv(netdev);
5105 uint32_t manc, err;
5106
5107 pci_set_power_state(pdev, PCI_D0);
5108 e1000_pci_restore_state(adapter);
5109 if ((err = pci_enable_device(pdev))) {
5110 printk(KERN_ERR "e1000: Cannot enable PCI device from suspend\n");
5111 return err;
5112 }
5113 pci_set_master(pdev);
5114
5115 pci_enable_wake(pdev, PCI_D3hot, 0);
5116 pci_enable_wake(pdev, PCI_D3cold, 0);
5117
5118 if (netif_running(netdev) && (err = e1000_request_irq(adapter)))
5119 return err;
5120
5121 e1000_power_up_phy(adapter);
5122 e1000_reset(adapter);
5123 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
5124
5125 if (netif_running(netdev))
5126 e1000_up(adapter);
5127
5128 netif_device_attach(netdev);
5129
5130 if (adapter->hw.mac_type >= e1000_82540 &&
5131 adapter->hw.mac_type < e1000_82571 &&
5132 adapter->hw.media_type == e1000_media_type_copper) {
5133 manc = E1000_READ_REG(&adapter->hw, MANC);
5134 manc &= ~(E1000_MANC_ARP_EN);
5135 E1000_WRITE_REG(&adapter->hw, MANC, manc);
5136 }
5137
5138 /* If the controller is 82573 and f/w is AMT, do not set
5139 * DRV_LOAD until the interface is up. For all other cases,
5140 * let the f/w know that the h/w is now under the control
5141 * of the driver. */
5142 if (adapter->hw.mac_type != e1000_82573 ||
5143 !e1000_check_mng_mode(&adapter->hw))
5144 e1000_get_hw_control(adapter);
5145
5146 return 0;
5147 }
5148 #endif
5149
5150 static void e1000_shutdown(struct pci_dev *pdev)
5151 {
5152 e1000_suspend(pdev, PMSG_SUSPEND);
5153 }
5154
5155 #ifdef CONFIG_NET_POLL_CONTROLLER
5156 /*
5157 * Polling 'interrupt' - used by things like netconsole to send skbs
5158 * without having to re-enable interrupts. It's not called while
5159 * the interrupt routine is executing.
5160 */
5161 static void
5162 e1000_netpoll(struct net_device *netdev)
5163 {
5164 struct e1000_adapter *adapter = netdev_priv(netdev);
5165
5166 disable_irq(adapter->pdev->irq);
5167 e1000_intr(adapter->pdev->irq, netdev);
5168 e1000_clean_tx_irq(adapter, adapter->tx_ring);
5169 #ifndef CONFIG_E1000_NAPI
5170 adapter->clean_rx(adapter, adapter->rx_ring);
5171 #endif
5172 enable_irq(adapter->pdev->irq);
5173 }
5174 #endif
5175
5176 /**
5177 * e1000_io_error_detected - called when PCI error is detected
5178 * @pdev: Pointer to PCI device
5179 * @state: The current pci conneection state
5180 *
5181 * This function is called after a PCI bus error affecting
5182 * this device has been detected.
5183 */
5184 static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
5185 {
5186 struct net_device *netdev = pci_get_drvdata(pdev);
5187 struct e1000_adapter *adapter = netdev->priv;
5188
5189 netif_device_detach(netdev);
5190
5191 if (netif_running(netdev))
5192 e1000_down(adapter);
5193 pci_disable_device(pdev);
5194
5195 /* Request a slot slot reset. */
5196 return PCI_ERS_RESULT_NEED_RESET;
5197 }
5198
5199 /**
5200 * e1000_io_slot_reset - called after the pci bus has been reset.
5201 * @pdev: Pointer to PCI device
5202 *
5203 * Restart the card from scratch, as if from a cold-boot. Implementation
5204 * resembles the first-half of the e1000_resume routine.
5205 */
5206 static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
5207 {
5208 struct net_device *netdev = pci_get_drvdata(pdev);
5209 struct e1000_adapter *adapter = netdev->priv;
5210
5211 if (pci_enable_device(pdev)) {
5212 printk(KERN_ERR "e1000: Cannot re-enable PCI device after reset.\n");
5213 return PCI_ERS_RESULT_DISCONNECT;
5214 }
5215 pci_set_master(pdev);
5216
5217 pci_enable_wake(pdev, PCI_D3hot, 0);
5218 pci_enable_wake(pdev, PCI_D3cold, 0);
5219
5220 e1000_reset(adapter);
5221 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
5222
5223 return PCI_ERS_RESULT_RECOVERED;
5224 }
5225
5226 /**
5227 * e1000_io_resume - called when traffic can start flowing again.
5228 * @pdev: Pointer to PCI device
5229 *
5230 * This callback is called when the error recovery driver tells us that
5231 * its OK to resume normal operation. Implementation resembles the
5232 * second-half of the e1000_resume routine.
5233 */
5234 static void e1000_io_resume(struct pci_dev *pdev)
5235 {
5236 struct net_device *netdev = pci_get_drvdata(pdev);
5237 struct e1000_adapter *adapter = netdev->priv;
5238 uint32_t manc, swsm;
5239
5240 if (netif_running(netdev)) {
5241 if (e1000_up(adapter)) {
5242 printk("e1000: can't bring device back up after reset\n");
5243 return;
5244 }
5245 }
5246
5247 netif_device_attach(netdev);
5248
5249 if (adapter->hw.mac_type >= e1000_82540 &&
5250 adapter->hw.mac_type < e1000_82571 &&
5251 adapter->hw.media_type == e1000_media_type_copper) {
5252 manc = E1000_READ_REG(&adapter->hw, MANC);
5253 manc &= ~(E1000_MANC_ARP_EN);
5254 E1000_WRITE_REG(&adapter->hw, MANC, manc);
5255 }
5256
5257 switch (adapter->hw.mac_type) {
5258 case e1000_82573:
5259 swsm = E1000_READ_REG(&adapter->hw, SWSM);
5260 E1000_WRITE_REG(&adapter->hw, SWSM,
5261 swsm | E1000_SWSM_DRV_LOAD);
5262 break;
5263 default:
5264 break;
5265 }
5266
5267 if (netif_running(netdev))
5268 mod_timer(&adapter->watchdog_timer, jiffies);
5269 }
5270
5271 /* e1000_main.c */
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