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[mirror_ubuntu-artful-kernel.git] / drivers / net / ethernet / amazon / ena / ena_netdev.c
1 /*
2 * Copyright 2015 Amazon.com, Inc. or its affiliates.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 */
32
33 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
34
35 #ifdef CONFIG_RFS_ACCEL
36 #include <linux/cpu_rmap.h>
37 #endif /* CONFIG_RFS_ACCEL */
38 #include <linux/ethtool.h>
39 #include <linux/if_vlan.h>
40 #include <linux/kernel.h>
41 #include <linux/module.h>
42 #include <linux/moduleparam.h>
43 #include <linux/numa.h>
44 #include <linux/pci.h>
45 #include <linux/utsname.h>
46 #include <linux/version.h>
47 #include <linux/vmalloc.h>
48 #include <net/ip.h>
49
50 #include "ena_netdev.h"
51 #include "ena_pci_id_tbl.h"
52
53 static char version[] = DEVICE_NAME " v" DRV_MODULE_VERSION "\n";
54
55 MODULE_AUTHOR("Amazon.com, Inc. or its affiliates");
56 MODULE_DESCRIPTION(DEVICE_NAME);
57 MODULE_LICENSE("GPL");
58 MODULE_VERSION(DRV_MODULE_VERSION);
59
60 /* Time in jiffies before concluding the transmitter is hung. */
61 #define TX_TIMEOUT (5 * HZ)
62
63 #define ENA_NAPI_BUDGET 64
64
65 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_IFUP | \
66 NETIF_MSG_TX_DONE | NETIF_MSG_TX_ERR | NETIF_MSG_RX_ERR)
67 static int debug = -1;
68 module_param(debug, int, 0);
69 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
70
71 static struct ena_aenq_handlers aenq_handlers;
72
73 static struct workqueue_struct *ena_wq;
74
75 MODULE_DEVICE_TABLE(pci, ena_pci_tbl);
76
77 static int ena_rss_init_default(struct ena_adapter *adapter);
78
79 static void ena_tx_timeout(struct net_device *dev)
80 {
81 struct ena_adapter *adapter = netdev_priv(dev);
82
83 /* Change the state of the device to trigger reset
84 * Check that we are not in the middle or a trigger already
85 */
86
87 if (test_and_set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))
88 return;
89
90 u64_stats_update_begin(&adapter->syncp);
91 adapter->dev_stats.tx_timeout++;
92 u64_stats_update_end(&adapter->syncp);
93
94 netif_err(adapter, tx_err, dev, "Transmit time out\n");
95 }
96
97 static void update_rx_ring_mtu(struct ena_adapter *adapter, int mtu)
98 {
99 int i;
100
101 for (i = 0; i < adapter->num_queues; i++)
102 adapter->rx_ring[i].mtu = mtu;
103 }
104
105 static int ena_change_mtu(struct net_device *dev, int new_mtu)
106 {
107 struct ena_adapter *adapter = netdev_priv(dev);
108 int ret;
109
110 ret = ena_com_set_dev_mtu(adapter->ena_dev, new_mtu);
111 if (!ret) {
112 netif_dbg(adapter, drv, dev, "set MTU to %d\n", new_mtu);
113 update_rx_ring_mtu(adapter, new_mtu);
114 dev->mtu = new_mtu;
115 } else {
116 netif_err(adapter, drv, dev, "Failed to set MTU to %d\n",
117 new_mtu);
118 }
119
120 return ret;
121 }
122
123 static int ena_init_rx_cpu_rmap(struct ena_adapter *adapter)
124 {
125 #ifdef CONFIG_RFS_ACCEL
126 u32 i;
127 int rc;
128
129 adapter->netdev->rx_cpu_rmap = alloc_irq_cpu_rmap(adapter->num_queues);
130 if (!adapter->netdev->rx_cpu_rmap)
131 return -ENOMEM;
132 for (i = 0; i < adapter->num_queues; i++) {
133 int irq_idx = ENA_IO_IRQ_IDX(i);
134
135 rc = irq_cpu_rmap_add(adapter->netdev->rx_cpu_rmap,
136 adapter->msix_entries[irq_idx].vector);
137 if (rc) {
138 free_irq_cpu_rmap(adapter->netdev->rx_cpu_rmap);
139 adapter->netdev->rx_cpu_rmap = NULL;
140 return rc;
141 }
142 }
143 #endif /* CONFIG_RFS_ACCEL */
144 return 0;
145 }
146
147 static void ena_init_io_rings_common(struct ena_adapter *adapter,
148 struct ena_ring *ring, u16 qid)
149 {
150 ring->qid = qid;
151 ring->pdev = adapter->pdev;
152 ring->dev = &adapter->pdev->dev;
153 ring->netdev = adapter->netdev;
154 ring->napi = &adapter->ena_napi[qid].napi;
155 ring->adapter = adapter;
156 ring->ena_dev = adapter->ena_dev;
157 ring->per_napi_packets = 0;
158 ring->per_napi_bytes = 0;
159 ring->cpu = 0;
160 u64_stats_init(&ring->syncp);
161 }
162
163 static void ena_init_io_rings(struct ena_adapter *adapter)
164 {
165 struct ena_com_dev *ena_dev;
166 struct ena_ring *txr, *rxr;
167 int i;
168
169 ena_dev = adapter->ena_dev;
170
171 for (i = 0; i < adapter->num_queues; i++) {
172 txr = &adapter->tx_ring[i];
173 rxr = &adapter->rx_ring[i];
174
175 /* TX/RX common ring state */
176 ena_init_io_rings_common(adapter, txr, i);
177 ena_init_io_rings_common(adapter, rxr, i);
178
179 /* TX specific ring state */
180 txr->ring_size = adapter->tx_ring_size;
181 txr->tx_max_header_size = ena_dev->tx_max_header_size;
182 txr->tx_mem_queue_type = ena_dev->tx_mem_queue_type;
183 txr->sgl_size = adapter->max_tx_sgl_size;
184 txr->smoothed_interval =
185 ena_com_get_nonadaptive_moderation_interval_tx(ena_dev);
186
187 /* RX specific ring state */
188 rxr->ring_size = adapter->rx_ring_size;
189 rxr->rx_copybreak = adapter->rx_copybreak;
190 rxr->sgl_size = adapter->max_rx_sgl_size;
191 rxr->smoothed_interval =
192 ena_com_get_nonadaptive_moderation_interval_rx(ena_dev);
193 }
194 }
195
196 /* ena_setup_tx_resources - allocate I/O Tx resources (Descriptors)
197 * @adapter: network interface device structure
198 * @qid: queue index
199 *
200 * Return 0 on success, negative on failure
201 */
202 static int ena_setup_tx_resources(struct ena_adapter *adapter, int qid)
203 {
204 struct ena_ring *tx_ring = &adapter->tx_ring[qid];
205 struct ena_irq *ena_irq = &adapter->irq_tbl[ENA_IO_IRQ_IDX(qid)];
206 int size, i, node;
207
208 if (tx_ring->tx_buffer_info) {
209 netif_err(adapter, ifup,
210 adapter->netdev, "tx_buffer_info info is not NULL");
211 return -EEXIST;
212 }
213
214 size = sizeof(struct ena_tx_buffer) * tx_ring->ring_size;
215 node = cpu_to_node(ena_irq->cpu);
216
217 tx_ring->tx_buffer_info = vzalloc_node(size, node);
218 if (!tx_ring->tx_buffer_info) {
219 tx_ring->tx_buffer_info = vzalloc(size);
220 if (!tx_ring->tx_buffer_info)
221 return -ENOMEM;
222 }
223
224 size = sizeof(u16) * tx_ring->ring_size;
225 tx_ring->free_tx_ids = vzalloc_node(size, node);
226 if (!tx_ring->free_tx_ids) {
227 tx_ring->free_tx_ids = vzalloc(size);
228 if (!tx_ring->free_tx_ids) {
229 vfree(tx_ring->tx_buffer_info);
230 return -ENOMEM;
231 }
232 }
233
234 /* Req id ring for TX out of order completions */
235 for (i = 0; i < tx_ring->ring_size; i++)
236 tx_ring->free_tx_ids[i] = i;
237
238 /* Reset tx statistics */
239 memset(&tx_ring->tx_stats, 0x0, sizeof(tx_ring->tx_stats));
240
241 tx_ring->next_to_use = 0;
242 tx_ring->next_to_clean = 0;
243 tx_ring->cpu = ena_irq->cpu;
244 return 0;
245 }
246
247 /* ena_free_tx_resources - Free I/O Tx Resources per Queue
248 * @adapter: network interface device structure
249 * @qid: queue index
250 *
251 * Free all transmit software resources
252 */
253 static void ena_free_tx_resources(struct ena_adapter *adapter, int qid)
254 {
255 struct ena_ring *tx_ring = &adapter->tx_ring[qid];
256
257 vfree(tx_ring->tx_buffer_info);
258 tx_ring->tx_buffer_info = NULL;
259
260 vfree(tx_ring->free_tx_ids);
261 tx_ring->free_tx_ids = NULL;
262 }
263
264 /* ena_setup_all_tx_resources - allocate I/O Tx queues resources for All queues
265 * @adapter: private structure
266 *
267 * Return 0 on success, negative on failure
268 */
269 static int ena_setup_all_tx_resources(struct ena_adapter *adapter)
270 {
271 int i, rc = 0;
272
273 for (i = 0; i < adapter->num_queues; i++) {
274 rc = ena_setup_tx_resources(adapter, i);
275 if (rc)
276 goto err_setup_tx;
277 }
278
279 return 0;
280
281 err_setup_tx:
282
283 netif_err(adapter, ifup, adapter->netdev,
284 "Tx queue %d: allocation failed\n", i);
285
286 /* rewind the index freeing the rings as we go */
287 while (i--)
288 ena_free_tx_resources(adapter, i);
289 return rc;
290 }
291
292 /* ena_free_all_io_tx_resources - Free I/O Tx Resources for All Queues
293 * @adapter: board private structure
294 *
295 * Free all transmit software resources
296 */
297 static void ena_free_all_io_tx_resources(struct ena_adapter *adapter)
298 {
299 int i;
300
301 for (i = 0; i < adapter->num_queues; i++)
302 ena_free_tx_resources(adapter, i);
303 }
304
305 /* ena_setup_rx_resources - allocate I/O Rx resources (Descriptors)
306 * @adapter: network interface device structure
307 * @qid: queue index
308 *
309 * Returns 0 on success, negative on failure
310 */
311 static int ena_setup_rx_resources(struct ena_adapter *adapter,
312 u32 qid)
313 {
314 struct ena_ring *rx_ring = &adapter->rx_ring[qid];
315 struct ena_irq *ena_irq = &adapter->irq_tbl[ENA_IO_IRQ_IDX(qid)];
316 int size, node;
317
318 if (rx_ring->rx_buffer_info) {
319 netif_err(adapter, ifup, adapter->netdev,
320 "rx_buffer_info is not NULL");
321 return -EEXIST;
322 }
323
324 /* alloc extra element so in rx path
325 * we can always prefetch rx_info + 1
326 */
327 size = sizeof(struct ena_rx_buffer) * (rx_ring->ring_size + 1);
328 node = cpu_to_node(ena_irq->cpu);
329
330 rx_ring->rx_buffer_info = vzalloc_node(size, node);
331 if (!rx_ring->rx_buffer_info) {
332 rx_ring->rx_buffer_info = vzalloc(size);
333 if (!rx_ring->rx_buffer_info)
334 return -ENOMEM;
335 }
336
337 /* Reset rx statistics */
338 memset(&rx_ring->rx_stats, 0x0, sizeof(rx_ring->rx_stats));
339
340 rx_ring->next_to_clean = 0;
341 rx_ring->next_to_use = 0;
342 rx_ring->cpu = ena_irq->cpu;
343
344 return 0;
345 }
346
347 /* ena_free_rx_resources - Free I/O Rx Resources
348 * @adapter: network interface device structure
349 * @qid: queue index
350 *
351 * Free all receive software resources
352 */
353 static void ena_free_rx_resources(struct ena_adapter *adapter,
354 u32 qid)
355 {
356 struct ena_ring *rx_ring = &adapter->rx_ring[qid];
357
358 vfree(rx_ring->rx_buffer_info);
359 rx_ring->rx_buffer_info = NULL;
360 }
361
362 /* ena_setup_all_rx_resources - allocate I/O Rx queues resources for all queues
363 * @adapter: board private structure
364 *
365 * Return 0 on success, negative on failure
366 */
367 static int ena_setup_all_rx_resources(struct ena_adapter *adapter)
368 {
369 int i, rc = 0;
370
371 for (i = 0; i < adapter->num_queues; i++) {
372 rc = ena_setup_rx_resources(adapter, i);
373 if (rc)
374 goto err_setup_rx;
375 }
376
377 return 0;
378
379 err_setup_rx:
380
381 netif_err(adapter, ifup, adapter->netdev,
382 "Rx queue %d: allocation failed\n", i);
383
384 /* rewind the index freeing the rings as we go */
385 while (i--)
386 ena_free_rx_resources(adapter, i);
387 return rc;
388 }
389
390 /* ena_free_all_io_rx_resources - Free I/O Rx Resources for All Queues
391 * @adapter: board private structure
392 *
393 * Free all receive software resources
394 */
395 static void ena_free_all_io_rx_resources(struct ena_adapter *adapter)
396 {
397 int i;
398
399 for (i = 0; i < adapter->num_queues; i++)
400 ena_free_rx_resources(adapter, i);
401 }
402
403 static inline int ena_alloc_rx_page(struct ena_ring *rx_ring,
404 struct ena_rx_buffer *rx_info, gfp_t gfp)
405 {
406 struct ena_com_buf *ena_buf;
407 struct page *page;
408 dma_addr_t dma;
409
410 /* if previous allocated page is not used */
411 if (unlikely(rx_info->page))
412 return 0;
413
414 page = alloc_page(gfp);
415 if (unlikely(!page)) {
416 u64_stats_update_begin(&rx_ring->syncp);
417 rx_ring->rx_stats.page_alloc_fail++;
418 u64_stats_update_end(&rx_ring->syncp);
419 return -ENOMEM;
420 }
421
422 dma = dma_map_page(rx_ring->dev, page, 0, PAGE_SIZE,
423 DMA_FROM_DEVICE);
424 if (unlikely(dma_mapping_error(rx_ring->dev, dma))) {
425 u64_stats_update_begin(&rx_ring->syncp);
426 rx_ring->rx_stats.dma_mapping_err++;
427 u64_stats_update_end(&rx_ring->syncp);
428
429 __free_page(page);
430 return -EIO;
431 }
432 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,
433 "alloc page %p, rx_info %p\n", page, rx_info);
434
435 rx_info->page = page;
436 rx_info->page_offset = 0;
437 ena_buf = &rx_info->ena_buf;
438 ena_buf->paddr = dma;
439 ena_buf->len = PAGE_SIZE;
440
441 return 0;
442 }
443
444 static void ena_free_rx_page(struct ena_ring *rx_ring,
445 struct ena_rx_buffer *rx_info)
446 {
447 struct page *page = rx_info->page;
448 struct ena_com_buf *ena_buf = &rx_info->ena_buf;
449
450 if (unlikely(!page)) {
451 netif_warn(rx_ring->adapter, rx_err, rx_ring->netdev,
452 "Trying to free unallocated buffer\n");
453 return;
454 }
455
456 dma_unmap_page(rx_ring->dev, ena_buf->paddr, PAGE_SIZE,
457 DMA_FROM_DEVICE);
458
459 __free_page(page);
460 rx_info->page = NULL;
461 }
462
463 static int ena_refill_rx_bufs(struct ena_ring *rx_ring, u32 num)
464 {
465 u16 next_to_use;
466 u32 i;
467 int rc;
468
469 next_to_use = rx_ring->next_to_use;
470
471 for (i = 0; i < num; i++) {
472 struct ena_rx_buffer *rx_info =
473 &rx_ring->rx_buffer_info[next_to_use];
474
475 rc = ena_alloc_rx_page(rx_ring, rx_info,
476 __GFP_COLD | GFP_ATOMIC | __GFP_COMP);
477 if (unlikely(rc < 0)) {
478 netif_warn(rx_ring->adapter, rx_err, rx_ring->netdev,
479 "failed to alloc buffer for rx queue %d\n",
480 rx_ring->qid);
481 break;
482 }
483 rc = ena_com_add_single_rx_desc(rx_ring->ena_com_io_sq,
484 &rx_info->ena_buf,
485 next_to_use);
486 if (unlikely(rc)) {
487 netif_warn(rx_ring->adapter, rx_status, rx_ring->netdev,
488 "failed to add buffer for rx queue %d\n",
489 rx_ring->qid);
490 break;
491 }
492 next_to_use = ENA_RX_RING_IDX_NEXT(next_to_use,
493 rx_ring->ring_size);
494 }
495
496 if (unlikely(i < num)) {
497 u64_stats_update_begin(&rx_ring->syncp);
498 rx_ring->rx_stats.refil_partial++;
499 u64_stats_update_end(&rx_ring->syncp);
500 netdev_warn(rx_ring->netdev,
501 "refilled rx qid %d with only %d buffers (from %d)\n",
502 rx_ring->qid, i, num);
503 }
504
505 if (likely(i)) {
506 /* Add memory barrier to make sure the desc were written before
507 * issue a doorbell
508 */
509 wmb();
510 ena_com_write_sq_doorbell(rx_ring->ena_com_io_sq);
511 }
512
513 rx_ring->next_to_use = next_to_use;
514
515 return i;
516 }
517
518 static void ena_free_rx_bufs(struct ena_adapter *adapter,
519 u32 qid)
520 {
521 struct ena_ring *rx_ring = &adapter->rx_ring[qid];
522 u32 i;
523
524 for (i = 0; i < rx_ring->ring_size; i++) {
525 struct ena_rx_buffer *rx_info = &rx_ring->rx_buffer_info[i];
526
527 if (rx_info->page)
528 ena_free_rx_page(rx_ring, rx_info);
529 }
530 }
531
532 /* ena_refill_all_rx_bufs - allocate all queues Rx buffers
533 * @adapter: board private structure
534 *
535 */
536 static void ena_refill_all_rx_bufs(struct ena_adapter *adapter)
537 {
538 struct ena_ring *rx_ring;
539 int i, rc, bufs_num;
540
541 for (i = 0; i < adapter->num_queues; i++) {
542 rx_ring = &adapter->rx_ring[i];
543 bufs_num = rx_ring->ring_size - 1;
544 rc = ena_refill_rx_bufs(rx_ring, bufs_num);
545
546 if (unlikely(rc != bufs_num))
547 netif_warn(rx_ring->adapter, rx_status, rx_ring->netdev,
548 "refilling Queue %d failed. allocated %d buffers from: %d\n",
549 i, rc, bufs_num);
550 }
551 }
552
553 static void ena_free_all_rx_bufs(struct ena_adapter *adapter)
554 {
555 int i;
556
557 for (i = 0; i < adapter->num_queues; i++)
558 ena_free_rx_bufs(adapter, i);
559 }
560
561 /* ena_free_tx_bufs - Free Tx Buffers per Queue
562 * @tx_ring: TX ring for which buffers be freed
563 */
564 static void ena_free_tx_bufs(struct ena_ring *tx_ring)
565 {
566 u32 i;
567
568 for (i = 0; i < tx_ring->ring_size; i++) {
569 struct ena_tx_buffer *tx_info = &tx_ring->tx_buffer_info[i];
570 struct ena_com_buf *ena_buf;
571 int nr_frags;
572 int j;
573
574 if (!tx_info->skb)
575 continue;
576
577 netdev_notice(tx_ring->netdev,
578 "free uncompleted tx skb qid %d idx 0x%x\n",
579 tx_ring->qid, i);
580
581 ena_buf = tx_info->bufs;
582 dma_unmap_single(tx_ring->dev,
583 ena_buf->paddr,
584 ena_buf->len,
585 DMA_TO_DEVICE);
586
587 /* unmap remaining mapped pages */
588 nr_frags = tx_info->num_of_bufs - 1;
589 for (j = 0; j < nr_frags; j++) {
590 ena_buf++;
591 dma_unmap_page(tx_ring->dev,
592 ena_buf->paddr,
593 ena_buf->len,
594 DMA_TO_DEVICE);
595 }
596
597 dev_kfree_skb_any(tx_info->skb);
598 }
599 netdev_tx_reset_queue(netdev_get_tx_queue(tx_ring->netdev,
600 tx_ring->qid));
601 }
602
603 static void ena_free_all_tx_bufs(struct ena_adapter *adapter)
604 {
605 struct ena_ring *tx_ring;
606 int i;
607
608 for (i = 0; i < adapter->num_queues; i++) {
609 tx_ring = &adapter->tx_ring[i];
610 ena_free_tx_bufs(tx_ring);
611 }
612 }
613
614 static void ena_destroy_all_tx_queues(struct ena_adapter *adapter)
615 {
616 u16 ena_qid;
617 int i;
618
619 for (i = 0; i < adapter->num_queues; i++) {
620 ena_qid = ENA_IO_TXQ_IDX(i);
621 ena_com_destroy_io_queue(adapter->ena_dev, ena_qid);
622 }
623 }
624
625 static void ena_destroy_all_rx_queues(struct ena_adapter *adapter)
626 {
627 u16 ena_qid;
628 int i;
629
630 for (i = 0; i < adapter->num_queues; i++) {
631 ena_qid = ENA_IO_RXQ_IDX(i);
632 ena_com_destroy_io_queue(adapter->ena_dev, ena_qid);
633 }
634 }
635
636 static void ena_destroy_all_io_queues(struct ena_adapter *adapter)
637 {
638 ena_destroy_all_tx_queues(adapter);
639 ena_destroy_all_rx_queues(adapter);
640 }
641
642 static int validate_tx_req_id(struct ena_ring *tx_ring, u16 req_id)
643 {
644 struct ena_tx_buffer *tx_info = NULL;
645
646 if (likely(req_id < tx_ring->ring_size)) {
647 tx_info = &tx_ring->tx_buffer_info[req_id];
648 if (likely(tx_info->skb))
649 return 0;
650 }
651
652 if (tx_info)
653 netif_err(tx_ring->adapter, tx_done, tx_ring->netdev,
654 "tx_info doesn't have valid skb\n");
655 else
656 netif_err(tx_ring->adapter, tx_done, tx_ring->netdev,
657 "Invalid req_id: %hu\n", req_id);
658
659 u64_stats_update_begin(&tx_ring->syncp);
660 tx_ring->tx_stats.bad_req_id++;
661 u64_stats_update_end(&tx_ring->syncp);
662
663 /* Trigger device reset */
664 set_bit(ENA_FLAG_TRIGGER_RESET, &tx_ring->adapter->flags);
665 return -EFAULT;
666 }
667
668 static int ena_clean_tx_irq(struct ena_ring *tx_ring, u32 budget)
669 {
670 struct netdev_queue *txq;
671 bool above_thresh;
672 u32 tx_bytes = 0;
673 u32 total_done = 0;
674 u16 next_to_clean;
675 u16 req_id;
676 int tx_pkts = 0;
677 int rc;
678
679 next_to_clean = tx_ring->next_to_clean;
680 txq = netdev_get_tx_queue(tx_ring->netdev, tx_ring->qid);
681
682 while (tx_pkts < budget) {
683 struct ena_tx_buffer *tx_info;
684 struct sk_buff *skb;
685 struct ena_com_buf *ena_buf;
686 int i, nr_frags;
687
688 rc = ena_com_tx_comp_req_id_get(tx_ring->ena_com_io_cq,
689 &req_id);
690 if (rc)
691 break;
692
693 rc = validate_tx_req_id(tx_ring, req_id);
694 if (rc)
695 break;
696
697 tx_info = &tx_ring->tx_buffer_info[req_id];
698 skb = tx_info->skb;
699
700 /* prefetch skb_end_pointer() to speedup skb_shinfo(skb) */
701 prefetch(&skb->end);
702
703 tx_info->skb = NULL;
704 tx_info->last_jiffies = 0;
705
706 if (likely(tx_info->num_of_bufs != 0)) {
707 ena_buf = tx_info->bufs;
708
709 dma_unmap_single(tx_ring->dev,
710 dma_unmap_addr(ena_buf, paddr),
711 dma_unmap_len(ena_buf, len),
712 DMA_TO_DEVICE);
713
714 /* unmap remaining mapped pages */
715 nr_frags = tx_info->num_of_bufs - 1;
716 for (i = 0; i < nr_frags; i++) {
717 ena_buf++;
718 dma_unmap_page(tx_ring->dev,
719 dma_unmap_addr(ena_buf, paddr),
720 dma_unmap_len(ena_buf, len),
721 DMA_TO_DEVICE);
722 }
723 }
724
725 netif_dbg(tx_ring->adapter, tx_done, tx_ring->netdev,
726 "tx_poll: q %d skb %p completed\n", tx_ring->qid,
727 skb);
728
729 tx_bytes += skb->len;
730 dev_kfree_skb(skb);
731 tx_pkts++;
732 total_done += tx_info->tx_descs;
733
734 tx_ring->free_tx_ids[next_to_clean] = req_id;
735 next_to_clean = ENA_TX_RING_IDX_NEXT(next_to_clean,
736 tx_ring->ring_size);
737 }
738
739 tx_ring->next_to_clean = next_to_clean;
740 ena_com_comp_ack(tx_ring->ena_com_io_sq, total_done);
741 ena_com_update_dev_comp_head(tx_ring->ena_com_io_cq);
742
743 netdev_tx_completed_queue(txq, tx_pkts, tx_bytes);
744
745 netif_dbg(tx_ring->adapter, tx_done, tx_ring->netdev,
746 "tx_poll: q %d done. total pkts: %d\n",
747 tx_ring->qid, tx_pkts);
748
749 /* need to make the rings circular update visible to
750 * ena_start_xmit() before checking for netif_queue_stopped().
751 */
752 smp_mb();
753
754 above_thresh = ena_com_sq_empty_space(tx_ring->ena_com_io_sq) >
755 ENA_TX_WAKEUP_THRESH;
756 if (unlikely(netif_tx_queue_stopped(txq) && above_thresh)) {
757 __netif_tx_lock(txq, smp_processor_id());
758 above_thresh = ena_com_sq_empty_space(tx_ring->ena_com_io_sq) >
759 ENA_TX_WAKEUP_THRESH;
760 if (netif_tx_queue_stopped(txq) && above_thresh) {
761 netif_tx_wake_queue(txq);
762 u64_stats_update_begin(&tx_ring->syncp);
763 tx_ring->tx_stats.queue_wakeup++;
764 u64_stats_update_end(&tx_ring->syncp);
765 }
766 __netif_tx_unlock(txq);
767 }
768
769 tx_ring->per_napi_bytes += tx_bytes;
770 tx_ring->per_napi_packets += tx_pkts;
771
772 return tx_pkts;
773 }
774
775 static struct sk_buff *ena_rx_skb(struct ena_ring *rx_ring,
776 struct ena_com_rx_buf_info *ena_bufs,
777 u32 descs,
778 u16 *next_to_clean)
779 {
780 struct sk_buff *skb;
781 struct ena_rx_buffer *rx_info =
782 &rx_ring->rx_buffer_info[*next_to_clean];
783 u32 len;
784 u32 buf = 0;
785 void *va;
786
787 len = ena_bufs[0].len;
788 if (unlikely(!rx_info->page)) {
789 netif_err(rx_ring->adapter, rx_err, rx_ring->netdev,
790 "Page is NULL\n");
791 return NULL;
792 }
793
794 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,
795 "rx_info %p page %p\n",
796 rx_info, rx_info->page);
797
798 /* save virt address of first buffer */
799 va = page_address(rx_info->page) + rx_info->page_offset;
800 prefetch(va + NET_IP_ALIGN);
801
802 if (len <= rx_ring->rx_copybreak) {
803 skb = netdev_alloc_skb_ip_align(rx_ring->netdev,
804 rx_ring->rx_copybreak);
805 if (unlikely(!skb)) {
806 u64_stats_update_begin(&rx_ring->syncp);
807 rx_ring->rx_stats.skb_alloc_fail++;
808 u64_stats_update_end(&rx_ring->syncp);
809 netif_err(rx_ring->adapter, rx_err, rx_ring->netdev,
810 "Failed to allocate skb\n");
811 return NULL;
812 }
813
814 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,
815 "rx allocated small packet. len %d. data_len %d\n",
816 skb->len, skb->data_len);
817
818 /* sync this buffer for CPU use */
819 dma_sync_single_for_cpu(rx_ring->dev,
820 dma_unmap_addr(&rx_info->ena_buf, paddr),
821 len,
822 DMA_FROM_DEVICE);
823 skb_copy_to_linear_data(skb, va, len);
824 dma_sync_single_for_device(rx_ring->dev,
825 dma_unmap_addr(&rx_info->ena_buf, paddr),
826 len,
827 DMA_FROM_DEVICE);
828
829 skb_put(skb, len);
830 skb->protocol = eth_type_trans(skb, rx_ring->netdev);
831 *next_to_clean = ENA_RX_RING_IDX_ADD(*next_to_clean, descs,
832 rx_ring->ring_size);
833 return skb;
834 }
835
836 skb = napi_get_frags(rx_ring->napi);
837 if (unlikely(!skb)) {
838 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,
839 "Failed allocating skb\n");
840 u64_stats_update_begin(&rx_ring->syncp);
841 rx_ring->rx_stats.skb_alloc_fail++;
842 u64_stats_update_end(&rx_ring->syncp);
843 return NULL;
844 }
845
846 do {
847 dma_unmap_page(rx_ring->dev,
848 dma_unmap_addr(&rx_info->ena_buf, paddr),
849 PAGE_SIZE, DMA_FROM_DEVICE);
850
851 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, rx_info->page,
852 rx_info->page_offset, len, PAGE_SIZE);
853
854 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,
855 "rx skb updated. len %d. data_len %d\n",
856 skb->len, skb->data_len);
857
858 rx_info->page = NULL;
859 *next_to_clean =
860 ENA_RX_RING_IDX_NEXT(*next_to_clean,
861 rx_ring->ring_size);
862 if (likely(--descs == 0))
863 break;
864 rx_info = &rx_ring->rx_buffer_info[*next_to_clean];
865 len = ena_bufs[++buf].len;
866 } while (1);
867
868 return skb;
869 }
870
871 /* ena_rx_checksum - indicate in skb if hw indicated a good cksum
872 * @adapter: structure containing adapter specific data
873 * @ena_rx_ctx: received packet context/metadata
874 * @skb: skb currently being received and modified
875 */
876 static inline void ena_rx_checksum(struct ena_ring *rx_ring,
877 struct ena_com_rx_ctx *ena_rx_ctx,
878 struct sk_buff *skb)
879 {
880 /* Rx csum disabled */
881 if (unlikely(!(rx_ring->netdev->features & NETIF_F_RXCSUM))) {
882 skb->ip_summed = CHECKSUM_NONE;
883 return;
884 }
885
886 /* For fragmented packets the checksum isn't valid */
887 if (ena_rx_ctx->frag) {
888 skb->ip_summed = CHECKSUM_NONE;
889 return;
890 }
891
892 /* if IP and error */
893 if (unlikely((ena_rx_ctx->l3_proto == ENA_ETH_IO_L3_PROTO_IPV4) &&
894 (ena_rx_ctx->l3_csum_err))) {
895 /* ipv4 checksum error */
896 skb->ip_summed = CHECKSUM_NONE;
897 u64_stats_update_begin(&rx_ring->syncp);
898 rx_ring->rx_stats.bad_csum++;
899 u64_stats_update_end(&rx_ring->syncp);
900 netif_err(rx_ring->adapter, rx_err, rx_ring->netdev,
901 "RX IPv4 header checksum error\n");
902 return;
903 }
904
905 /* if TCP/UDP */
906 if (likely((ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_TCP) ||
907 (ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_UDP))) {
908 if (unlikely(ena_rx_ctx->l4_csum_err)) {
909 /* TCP/UDP checksum error */
910 u64_stats_update_begin(&rx_ring->syncp);
911 rx_ring->rx_stats.bad_csum++;
912 u64_stats_update_end(&rx_ring->syncp);
913 netif_err(rx_ring->adapter, rx_err, rx_ring->netdev,
914 "RX L4 checksum error\n");
915 skb->ip_summed = CHECKSUM_NONE;
916 return;
917 }
918
919 skb->ip_summed = CHECKSUM_UNNECESSARY;
920 }
921 }
922
923 static void ena_set_rx_hash(struct ena_ring *rx_ring,
924 struct ena_com_rx_ctx *ena_rx_ctx,
925 struct sk_buff *skb)
926 {
927 enum pkt_hash_types hash_type;
928
929 if (likely(rx_ring->netdev->features & NETIF_F_RXHASH)) {
930 if (likely((ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_TCP) ||
931 (ena_rx_ctx->l4_proto == ENA_ETH_IO_L4_PROTO_UDP)))
932
933 hash_type = PKT_HASH_TYPE_L4;
934 else
935 hash_type = PKT_HASH_TYPE_NONE;
936
937 /* Override hash type if the packet is fragmented */
938 if (ena_rx_ctx->frag)
939 hash_type = PKT_HASH_TYPE_NONE;
940
941 skb_set_hash(skb, ena_rx_ctx->hash, hash_type);
942 }
943 }
944
945 /* ena_clean_rx_irq - Cleanup RX irq
946 * @rx_ring: RX ring to clean
947 * @napi: napi handler
948 * @budget: how many packets driver is allowed to clean
949 *
950 * Returns the number of cleaned buffers.
951 */
952 static int ena_clean_rx_irq(struct ena_ring *rx_ring, struct napi_struct *napi,
953 u32 budget)
954 {
955 u16 next_to_clean = rx_ring->next_to_clean;
956 u32 res_budget, work_done;
957
958 struct ena_com_rx_ctx ena_rx_ctx;
959 struct ena_adapter *adapter;
960 struct sk_buff *skb;
961 int refill_required;
962 int refill_threshold;
963 int rc = 0;
964 int total_len = 0;
965 int rx_copybreak_pkt = 0;
966
967 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,
968 "%s qid %d\n", __func__, rx_ring->qid);
969 res_budget = budget;
970
971 do {
972 ena_rx_ctx.ena_bufs = rx_ring->ena_bufs;
973 ena_rx_ctx.max_bufs = rx_ring->sgl_size;
974 ena_rx_ctx.descs = 0;
975 rc = ena_com_rx_pkt(rx_ring->ena_com_io_cq,
976 rx_ring->ena_com_io_sq,
977 &ena_rx_ctx);
978 if (unlikely(rc))
979 goto error;
980
981 if (unlikely(ena_rx_ctx.descs == 0))
982 break;
983
984 netif_dbg(rx_ring->adapter, rx_status, rx_ring->netdev,
985 "rx_poll: q %d got packet from ena. descs #: %d l3 proto %d l4 proto %d hash: %x\n",
986 rx_ring->qid, ena_rx_ctx.descs, ena_rx_ctx.l3_proto,
987 ena_rx_ctx.l4_proto, ena_rx_ctx.hash);
988
989 /* allocate skb and fill it */
990 skb = ena_rx_skb(rx_ring, rx_ring->ena_bufs, ena_rx_ctx.descs,
991 &next_to_clean);
992
993 /* exit if we failed to retrieve a buffer */
994 if (unlikely(!skb)) {
995 next_to_clean = ENA_RX_RING_IDX_ADD(next_to_clean,
996 ena_rx_ctx.descs,
997 rx_ring->ring_size);
998 break;
999 }
1000
1001 ena_rx_checksum(rx_ring, &ena_rx_ctx, skb);
1002
1003 ena_set_rx_hash(rx_ring, &ena_rx_ctx, skb);
1004
1005 skb_record_rx_queue(skb, rx_ring->qid);
1006
1007 if (rx_ring->ena_bufs[0].len <= rx_ring->rx_copybreak) {
1008 total_len += rx_ring->ena_bufs[0].len;
1009 rx_copybreak_pkt++;
1010 napi_gro_receive(napi, skb);
1011 } else {
1012 total_len += skb->len;
1013 napi_gro_frags(napi);
1014 }
1015
1016 res_budget--;
1017 } while (likely(res_budget));
1018
1019 work_done = budget - res_budget;
1020 rx_ring->per_napi_bytes += total_len;
1021 rx_ring->per_napi_packets += work_done;
1022 u64_stats_update_begin(&rx_ring->syncp);
1023 rx_ring->rx_stats.bytes += total_len;
1024 rx_ring->rx_stats.cnt += work_done;
1025 rx_ring->rx_stats.rx_copybreak_pkt += rx_copybreak_pkt;
1026 u64_stats_update_end(&rx_ring->syncp);
1027
1028 rx_ring->next_to_clean = next_to_clean;
1029
1030 refill_required = ena_com_sq_empty_space(rx_ring->ena_com_io_sq);
1031 refill_threshold = rx_ring->ring_size / ENA_RX_REFILL_THRESH_DIVIDER;
1032
1033 /* Optimization, try to batch new rx buffers */
1034 if (refill_required > refill_threshold) {
1035 ena_com_update_dev_comp_head(rx_ring->ena_com_io_cq);
1036 ena_refill_rx_bufs(rx_ring, refill_required);
1037 }
1038
1039 return work_done;
1040
1041 error:
1042 adapter = netdev_priv(rx_ring->netdev);
1043
1044 u64_stats_update_begin(&rx_ring->syncp);
1045 rx_ring->rx_stats.bad_desc_num++;
1046 u64_stats_update_end(&rx_ring->syncp);
1047
1048 /* Too many desc from the device. Trigger reset */
1049 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
1050
1051 return 0;
1052 }
1053
1054 inline void ena_adjust_intr_moderation(struct ena_ring *rx_ring,
1055 struct ena_ring *tx_ring)
1056 {
1057 /* We apply adaptive moderation on Rx path only.
1058 * Tx uses static interrupt moderation.
1059 */
1060 ena_com_calculate_interrupt_delay(rx_ring->ena_dev,
1061 rx_ring->per_napi_packets,
1062 rx_ring->per_napi_bytes,
1063 &rx_ring->smoothed_interval,
1064 &rx_ring->moder_tbl_idx);
1065
1066 /* Reset per napi packets/bytes */
1067 tx_ring->per_napi_packets = 0;
1068 tx_ring->per_napi_bytes = 0;
1069 rx_ring->per_napi_packets = 0;
1070 rx_ring->per_napi_bytes = 0;
1071 }
1072
1073 static inline void ena_update_ring_numa_node(struct ena_ring *tx_ring,
1074 struct ena_ring *rx_ring)
1075 {
1076 int cpu = get_cpu();
1077 int numa_node;
1078
1079 /* Check only one ring since the 2 rings are running on the same cpu */
1080 if (likely(tx_ring->cpu == cpu))
1081 goto out;
1082
1083 numa_node = cpu_to_node(cpu);
1084 put_cpu();
1085
1086 if (numa_node != NUMA_NO_NODE) {
1087 ena_com_update_numa_node(tx_ring->ena_com_io_cq, numa_node);
1088 ena_com_update_numa_node(rx_ring->ena_com_io_cq, numa_node);
1089 }
1090
1091 tx_ring->cpu = cpu;
1092 rx_ring->cpu = cpu;
1093
1094 return;
1095 out:
1096 put_cpu();
1097 }
1098
1099 static int ena_io_poll(struct napi_struct *napi, int budget)
1100 {
1101 struct ena_napi *ena_napi = container_of(napi, struct ena_napi, napi);
1102 struct ena_ring *tx_ring, *rx_ring;
1103 struct ena_eth_io_intr_reg intr_reg;
1104
1105 u32 tx_work_done;
1106 u32 rx_work_done;
1107 int tx_budget;
1108 int napi_comp_call = 0;
1109 int ret;
1110
1111 tx_ring = ena_napi->tx_ring;
1112 rx_ring = ena_napi->rx_ring;
1113
1114 tx_budget = tx_ring->ring_size / ENA_TX_POLL_BUDGET_DIVIDER;
1115
1116 if (!test_bit(ENA_FLAG_DEV_UP, &tx_ring->adapter->flags) ||
1117 test_bit(ENA_FLAG_TRIGGER_RESET, &tx_ring->adapter->flags)) {
1118 napi_complete_done(napi, 0);
1119 return 0;
1120 }
1121
1122 tx_work_done = ena_clean_tx_irq(tx_ring, tx_budget);
1123 rx_work_done = ena_clean_rx_irq(rx_ring, napi, budget);
1124
1125 if ((budget > rx_work_done) && (tx_budget > tx_work_done)) {
1126 napi_complete_done(napi, rx_work_done);
1127
1128 napi_comp_call = 1;
1129 /* Tx and Rx share the same interrupt vector */
1130 if (ena_com_get_adaptive_moderation_enabled(rx_ring->ena_dev))
1131 ena_adjust_intr_moderation(rx_ring, tx_ring);
1132
1133 /* Update intr register: rx intr delay, tx intr delay and
1134 * interrupt unmask
1135 */
1136 ena_com_update_intr_reg(&intr_reg,
1137 rx_ring->smoothed_interval,
1138 tx_ring->smoothed_interval,
1139 true);
1140
1141 /* It is a shared MSI-X. Tx and Rx CQ have pointer to it.
1142 * So we use one of them to reach the intr reg
1143 */
1144 ena_com_unmask_intr(rx_ring->ena_com_io_cq, &intr_reg);
1145
1146 ena_update_ring_numa_node(tx_ring, rx_ring);
1147
1148 ret = rx_work_done;
1149 } else {
1150 ret = budget;
1151 }
1152
1153 u64_stats_update_begin(&tx_ring->syncp);
1154 tx_ring->tx_stats.napi_comp += napi_comp_call;
1155 tx_ring->tx_stats.tx_poll++;
1156 u64_stats_update_end(&tx_ring->syncp);
1157
1158 return ret;
1159 }
1160
1161 static irqreturn_t ena_intr_msix_mgmnt(int irq, void *data)
1162 {
1163 struct ena_adapter *adapter = (struct ena_adapter *)data;
1164
1165 ena_com_admin_q_comp_intr_handler(adapter->ena_dev);
1166
1167 /* Don't call the aenq handler before probe is done */
1168 if (likely(test_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags)))
1169 ena_com_aenq_intr_handler(adapter->ena_dev, data);
1170
1171 return IRQ_HANDLED;
1172 }
1173
1174 /* ena_intr_msix_io - MSI-X Interrupt Handler for Tx/Rx
1175 * @irq: interrupt number
1176 * @data: pointer to a network interface private napi device structure
1177 */
1178 static irqreturn_t ena_intr_msix_io(int irq, void *data)
1179 {
1180 struct ena_napi *ena_napi = data;
1181
1182 napi_schedule(&ena_napi->napi);
1183
1184 return IRQ_HANDLED;
1185 }
1186
1187 static int ena_enable_msix(struct ena_adapter *adapter, int num_queues)
1188 {
1189 int i, msix_vecs, rc;
1190
1191 if (test_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags)) {
1192 netif_err(adapter, probe, adapter->netdev,
1193 "Error, MSI-X is already enabled\n");
1194 return -EPERM;
1195 }
1196
1197 /* Reserved the max msix vectors we might need */
1198 msix_vecs = ENA_MAX_MSIX_VEC(num_queues);
1199
1200 netif_dbg(adapter, probe, adapter->netdev,
1201 "trying to enable MSI-X, vectors %d\n", msix_vecs);
1202
1203 adapter->msix_entries = vzalloc(msix_vecs * sizeof(struct msix_entry));
1204
1205 if (!adapter->msix_entries)
1206 return -ENOMEM;
1207
1208 for (i = 0; i < msix_vecs; i++)
1209 adapter->msix_entries[i].entry = i;
1210
1211 rc = pci_enable_msix(adapter->pdev, adapter->msix_entries, msix_vecs);
1212 if (rc != 0) {
1213 netif_err(adapter, probe, adapter->netdev,
1214 "Failed to enable MSI-X, vectors %d rc %d\n",
1215 msix_vecs, rc);
1216 return -ENOSPC;
1217 }
1218
1219 netif_dbg(adapter, probe, adapter->netdev, "enable MSI-X, vectors %d\n",
1220 msix_vecs);
1221
1222 if (msix_vecs >= 1) {
1223 if (ena_init_rx_cpu_rmap(adapter))
1224 netif_warn(adapter, probe, adapter->netdev,
1225 "Failed to map IRQs to CPUs\n");
1226 }
1227
1228 adapter->msix_vecs = msix_vecs;
1229 set_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags);
1230
1231 return 0;
1232 }
1233
1234 static void ena_setup_mgmnt_intr(struct ena_adapter *adapter)
1235 {
1236 u32 cpu;
1237
1238 snprintf(adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].name,
1239 ENA_IRQNAME_SIZE, "ena-mgmnt@pci:%s",
1240 pci_name(adapter->pdev));
1241 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].handler =
1242 ena_intr_msix_mgmnt;
1243 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].data = adapter;
1244 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].vector =
1245 adapter->msix_entries[ENA_MGMNT_IRQ_IDX].vector;
1246 cpu = cpumask_first(cpu_online_mask);
1247 adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].cpu = cpu;
1248 cpumask_set_cpu(cpu,
1249 &adapter->irq_tbl[ENA_MGMNT_IRQ_IDX].affinity_hint_mask);
1250 }
1251
1252 static void ena_setup_io_intr(struct ena_adapter *adapter)
1253 {
1254 struct net_device *netdev;
1255 int irq_idx, i, cpu;
1256
1257 netdev = adapter->netdev;
1258
1259 for (i = 0; i < adapter->num_queues; i++) {
1260 irq_idx = ENA_IO_IRQ_IDX(i);
1261 cpu = i % num_online_cpus();
1262
1263 snprintf(adapter->irq_tbl[irq_idx].name, ENA_IRQNAME_SIZE,
1264 "%s-Tx-Rx-%d", netdev->name, i);
1265 adapter->irq_tbl[irq_idx].handler = ena_intr_msix_io;
1266 adapter->irq_tbl[irq_idx].data = &adapter->ena_napi[i];
1267 adapter->irq_tbl[irq_idx].vector =
1268 adapter->msix_entries[irq_idx].vector;
1269 adapter->irq_tbl[irq_idx].cpu = cpu;
1270
1271 cpumask_set_cpu(cpu,
1272 &adapter->irq_tbl[irq_idx].affinity_hint_mask);
1273 }
1274 }
1275
1276 static int ena_request_mgmnt_irq(struct ena_adapter *adapter)
1277 {
1278 unsigned long flags = 0;
1279 struct ena_irq *irq;
1280 int rc;
1281
1282 irq = &adapter->irq_tbl[ENA_MGMNT_IRQ_IDX];
1283 rc = request_irq(irq->vector, irq->handler, flags, irq->name,
1284 irq->data);
1285 if (rc) {
1286 netif_err(adapter, probe, adapter->netdev,
1287 "failed to request admin irq\n");
1288 return rc;
1289 }
1290
1291 netif_dbg(adapter, probe, adapter->netdev,
1292 "set affinity hint of mgmnt irq.to 0x%lx (irq vector: %d)\n",
1293 irq->affinity_hint_mask.bits[0], irq->vector);
1294
1295 irq_set_affinity_hint(irq->vector, &irq->affinity_hint_mask);
1296
1297 return rc;
1298 }
1299
1300 static int ena_request_io_irq(struct ena_adapter *adapter)
1301 {
1302 unsigned long flags = 0;
1303 struct ena_irq *irq;
1304 int rc = 0, i, k;
1305
1306 if (!test_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags)) {
1307 netif_err(adapter, ifup, adapter->netdev,
1308 "Failed to request I/O IRQ: MSI-X is not enabled\n");
1309 return -EINVAL;
1310 }
1311
1312 for (i = ENA_IO_IRQ_FIRST_IDX; i < adapter->msix_vecs; i++) {
1313 irq = &adapter->irq_tbl[i];
1314 rc = request_irq(irq->vector, irq->handler, flags, irq->name,
1315 irq->data);
1316 if (rc) {
1317 netif_err(adapter, ifup, adapter->netdev,
1318 "Failed to request I/O IRQ. index %d rc %d\n",
1319 i, rc);
1320 goto err;
1321 }
1322
1323 netif_dbg(adapter, ifup, adapter->netdev,
1324 "set affinity hint of irq. index %d to 0x%lx (irq vector: %d)\n",
1325 i, irq->affinity_hint_mask.bits[0], irq->vector);
1326
1327 irq_set_affinity_hint(irq->vector, &irq->affinity_hint_mask);
1328 }
1329
1330 return rc;
1331
1332 err:
1333 for (k = ENA_IO_IRQ_FIRST_IDX; k < i; k++) {
1334 irq = &adapter->irq_tbl[k];
1335 free_irq(irq->vector, irq->data);
1336 }
1337
1338 return rc;
1339 }
1340
1341 static void ena_free_mgmnt_irq(struct ena_adapter *adapter)
1342 {
1343 struct ena_irq *irq;
1344
1345 irq = &adapter->irq_tbl[ENA_MGMNT_IRQ_IDX];
1346 synchronize_irq(irq->vector);
1347 irq_set_affinity_hint(irq->vector, NULL);
1348 free_irq(irq->vector, irq->data);
1349 }
1350
1351 static void ena_free_io_irq(struct ena_adapter *adapter)
1352 {
1353 struct ena_irq *irq;
1354 int i;
1355
1356 #ifdef CONFIG_RFS_ACCEL
1357 if (adapter->msix_vecs >= 1) {
1358 free_irq_cpu_rmap(adapter->netdev->rx_cpu_rmap);
1359 adapter->netdev->rx_cpu_rmap = NULL;
1360 }
1361 #endif /* CONFIG_RFS_ACCEL */
1362
1363 for (i = ENA_IO_IRQ_FIRST_IDX; i < adapter->msix_vecs; i++) {
1364 irq = &adapter->irq_tbl[i];
1365 irq_set_affinity_hint(irq->vector, NULL);
1366 free_irq(irq->vector, irq->data);
1367 }
1368 }
1369
1370 static void ena_disable_msix(struct ena_adapter *adapter)
1371 {
1372 if (test_and_clear_bit(ENA_FLAG_MSIX_ENABLED, &adapter->flags))
1373 pci_disable_msix(adapter->pdev);
1374
1375 if (adapter->msix_entries)
1376 vfree(adapter->msix_entries);
1377 adapter->msix_entries = NULL;
1378 }
1379
1380 static void ena_disable_io_intr_sync(struct ena_adapter *adapter)
1381 {
1382 int i;
1383
1384 if (!netif_running(adapter->netdev))
1385 return;
1386
1387 for (i = ENA_IO_IRQ_FIRST_IDX; i < adapter->msix_vecs; i++)
1388 synchronize_irq(adapter->irq_tbl[i].vector);
1389 }
1390
1391 static void ena_del_napi(struct ena_adapter *adapter)
1392 {
1393 int i;
1394
1395 for (i = 0; i < adapter->num_queues; i++)
1396 netif_napi_del(&adapter->ena_napi[i].napi);
1397 }
1398
1399 static void ena_init_napi(struct ena_adapter *adapter)
1400 {
1401 struct ena_napi *napi;
1402 int i;
1403
1404 for (i = 0; i < adapter->num_queues; i++) {
1405 napi = &adapter->ena_napi[i];
1406
1407 netif_napi_add(adapter->netdev,
1408 &adapter->ena_napi[i].napi,
1409 ena_io_poll,
1410 ENA_NAPI_BUDGET);
1411 napi->rx_ring = &adapter->rx_ring[i];
1412 napi->tx_ring = &adapter->tx_ring[i];
1413 napi->qid = i;
1414 }
1415 }
1416
1417 static void ena_napi_disable_all(struct ena_adapter *adapter)
1418 {
1419 int i;
1420
1421 for (i = 0; i < adapter->num_queues; i++)
1422 napi_disable(&adapter->ena_napi[i].napi);
1423 }
1424
1425 static void ena_napi_enable_all(struct ena_adapter *adapter)
1426 {
1427 int i;
1428
1429 for (i = 0; i < adapter->num_queues; i++)
1430 napi_enable(&adapter->ena_napi[i].napi);
1431 }
1432
1433 static void ena_restore_ethtool_params(struct ena_adapter *adapter)
1434 {
1435 adapter->tx_usecs = 0;
1436 adapter->rx_usecs = 0;
1437 adapter->tx_frames = 1;
1438 adapter->rx_frames = 1;
1439 }
1440
1441 /* Configure the Rx forwarding */
1442 static int ena_rss_configure(struct ena_adapter *adapter)
1443 {
1444 struct ena_com_dev *ena_dev = adapter->ena_dev;
1445 int rc;
1446
1447 /* In case the RSS table wasn't initialized by probe */
1448 if (!ena_dev->rss.tbl_log_size) {
1449 rc = ena_rss_init_default(adapter);
1450 if (rc && (rc != -EPERM)) {
1451 netif_err(adapter, ifup, adapter->netdev,
1452 "Failed to init RSS rc: %d\n", rc);
1453 return rc;
1454 }
1455 }
1456
1457 /* Set indirect table */
1458 rc = ena_com_indirect_table_set(ena_dev);
1459 if (unlikely(rc && rc != -EPERM))
1460 return rc;
1461
1462 /* Configure hash function (if supported) */
1463 rc = ena_com_set_hash_function(ena_dev);
1464 if (unlikely(rc && (rc != -EPERM)))
1465 return rc;
1466
1467 /* Configure hash inputs (if supported) */
1468 rc = ena_com_set_hash_ctrl(ena_dev);
1469 if (unlikely(rc && (rc != -EPERM)))
1470 return rc;
1471
1472 return 0;
1473 }
1474
1475 static int ena_up_complete(struct ena_adapter *adapter)
1476 {
1477 int rc, i;
1478
1479 rc = ena_rss_configure(adapter);
1480 if (rc)
1481 return rc;
1482
1483 ena_init_napi(adapter);
1484
1485 ena_change_mtu(adapter->netdev, adapter->netdev->mtu);
1486
1487 ena_refill_all_rx_bufs(adapter);
1488
1489 /* enable transmits */
1490 netif_tx_start_all_queues(adapter->netdev);
1491
1492 ena_restore_ethtool_params(adapter);
1493
1494 ena_napi_enable_all(adapter);
1495
1496 /* schedule napi in case we had pending packets
1497 * from the last time we disable napi
1498 */
1499 for (i = 0; i < adapter->num_queues; i++)
1500 napi_schedule(&adapter->ena_napi[i].napi);
1501
1502 return 0;
1503 }
1504
1505 static int ena_create_io_tx_queue(struct ena_adapter *adapter, int qid)
1506 {
1507 struct ena_com_create_io_ctx ctx = { 0 };
1508 struct ena_com_dev *ena_dev;
1509 struct ena_ring *tx_ring;
1510 u32 msix_vector;
1511 u16 ena_qid;
1512 int rc;
1513
1514 ena_dev = adapter->ena_dev;
1515
1516 tx_ring = &adapter->tx_ring[qid];
1517 msix_vector = ENA_IO_IRQ_IDX(qid);
1518 ena_qid = ENA_IO_TXQ_IDX(qid);
1519
1520 ctx.direction = ENA_COM_IO_QUEUE_DIRECTION_TX;
1521 ctx.qid = ena_qid;
1522 ctx.mem_queue_type = ena_dev->tx_mem_queue_type;
1523 ctx.msix_vector = msix_vector;
1524 ctx.queue_size = adapter->tx_ring_size;
1525 ctx.numa_node = cpu_to_node(tx_ring->cpu);
1526
1527 rc = ena_com_create_io_queue(ena_dev, &ctx);
1528 if (rc) {
1529 netif_err(adapter, ifup, adapter->netdev,
1530 "Failed to create I/O TX queue num %d rc: %d\n",
1531 qid, rc);
1532 return rc;
1533 }
1534
1535 rc = ena_com_get_io_handlers(ena_dev, ena_qid,
1536 &tx_ring->ena_com_io_sq,
1537 &tx_ring->ena_com_io_cq);
1538 if (rc) {
1539 netif_err(adapter, ifup, adapter->netdev,
1540 "Failed to get TX queue handlers. TX queue num %d rc: %d\n",
1541 qid, rc);
1542 ena_com_destroy_io_queue(ena_dev, ena_qid);
1543 }
1544
1545 ena_com_update_numa_node(tx_ring->ena_com_io_cq, ctx.numa_node);
1546 return rc;
1547 }
1548
1549 static int ena_create_all_io_tx_queues(struct ena_adapter *adapter)
1550 {
1551 struct ena_com_dev *ena_dev = adapter->ena_dev;
1552 int rc, i;
1553
1554 for (i = 0; i < adapter->num_queues; i++) {
1555 rc = ena_create_io_tx_queue(adapter, i);
1556 if (rc)
1557 goto create_err;
1558 }
1559
1560 return 0;
1561
1562 create_err:
1563 while (i--)
1564 ena_com_destroy_io_queue(ena_dev, ENA_IO_TXQ_IDX(i));
1565
1566 return rc;
1567 }
1568
1569 static int ena_create_io_rx_queue(struct ena_adapter *adapter, int qid)
1570 {
1571 struct ena_com_dev *ena_dev;
1572 struct ena_com_create_io_ctx ctx = { 0 };
1573 struct ena_ring *rx_ring;
1574 u32 msix_vector;
1575 u16 ena_qid;
1576 int rc;
1577
1578 ena_dev = adapter->ena_dev;
1579
1580 rx_ring = &adapter->rx_ring[qid];
1581 msix_vector = ENA_IO_IRQ_IDX(qid);
1582 ena_qid = ENA_IO_RXQ_IDX(qid);
1583
1584 ctx.qid = ena_qid;
1585 ctx.direction = ENA_COM_IO_QUEUE_DIRECTION_RX;
1586 ctx.mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST;
1587 ctx.msix_vector = msix_vector;
1588 ctx.queue_size = adapter->rx_ring_size;
1589 ctx.numa_node = cpu_to_node(rx_ring->cpu);
1590
1591 rc = ena_com_create_io_queue(ena_dev, &ctx);
1592 if (rc) {
1593 netif_err(adapter, ifup, adapter->netdev,
1594 "Failed to create I/O RX queue num %d rc: %d\n",
1595 qid, rc);
1596 return rc;
1597 }
1598
1599 rc = ena_com_get_io_handlers(ena_dev, ena_qid,
1600 &rx_ring->ena_com_io_sq,
1601 &rx_ring->ena_com_io_cq);
1602 if (rc) {
1603 netif_err(adapter, ifup, adapter->netdev,
1604 "Failed to get RX queue handlers. RX queue num %d rc: %d\n",
1605 qid, rc);
1606 ena_com_destroy_io_queue(ena_dev, ena_qid);
1607 }
1608
1609 ena_com_update_numa_node(rx_ring->ena_com_io_cq, ctx.numa_node);
1610
1611 return rc;
1612 }
1613
1614 static int ena_create_all_io_rx_queues(struct ena_adapter *adapter)
1615 {
1616 struct ena_com_dev *ena_dev = adapter->ena_dev;
1617 int rc, i;
1618
1619 for (i = 0; i < adapter->num_queues; i++) {
1620 rc = ena_create_io_rx_queue(adapter, i);
1621 if (rc)
1622 goto create_err;
1623 }
1624
1625 return 0;
1626
1627 create_err:
1628 while (i--)
1629 ena_com_destroy_io_queue(ena_dev, ENA_IO_RXQ_IDX(i));
1630
1631 return rc;
1632 }
1633
1634 static int ena_up(struct ena_adapter *adapter)
1635 {
1636 int rc;
1637
1638 netdev_dbg(adapter->netdev, "%s\n", __func__);
1639
1640 ena_setup_io_intr(adapter);
1641
1642 rc = ena_request_io_irq(adapter);
1643 if (rc)
1644 goto err_req_irq;
1645
1646 /* allocate transmit descriptors */
1647 rc = ena_setup_all_tx_resources(adapter);
1648 if (rc)
1649 goto err_setup_tx;
1650
1651 /* allocate receive descriptors */
1652 rc = ena_setup_all_rx_resources(adapter);
1653 if (rc)
1654 goto err_setup_rx;
1655
1656 /* Create TX queues */
1657 rc = ena_create_all_io_tx_queues(adapter);
1658 if (rc)
1659 goto err_create_tx_queues;
1660
1661 /* Create RX queues */
1662 rc = ena_create_all_io_rx_queues(adapter);
1663 if (rc)
1664 goto err_create_rx_queues;
1665
1666 rc = ena_up_complete(adapter);
1667 if (rc)
1668 goto err_up;
1669
1670 if (test_bit(ENA_FLAG_LINK_UP, &adapter->flags))
1671 netif_carrier_on(adapter->netdev);
1672
1673 u64_stats_update_begin(&adapter->syncp);
1674 adapter->dev_stats.interface_up++;
1675 u64_stats_update_end(&adapter->syncp);
1676
1677 set_bit(ENA_FLAG_DEV_UP, &adapter->flags);
1678
1679 return rc;
1680
1681 err_up:
1682 ena_destroy_all_rx_queues(adapter);
1683 err_create_rx_queues:
1684 ena_destroy_all_tx_queues(adapter);
1685 err_create_tx_queues:
1686 ena_free_all_io_rx_resources(adapter);
1687 err_setup_rx:
1688 ena_free_all_io_tx_resources(adapter);
1689 err_setup_tx:
1690 ena_free_io_irq(adapter);
1691 err_req_irq:
1692
1693 return rc;
1694 }
1695
1696 static void ena_down(struct ena_adapter *adapter)
1697 {
1698 netif_info(adapter, ifdown, adapter->netdev, "%s\n", __func__);
1699
1700 clear_bit(ENA_FLAG_DEV_UP, &adapter->flags);
1701
1702 u64_stats_update_begin(&adapter->syncp);
1703 adapter->dev_stats.interface_down++;
1704 u64_stats_update_end(&adapter->syncp);
1705
1706 netif_carrier_off(adapter->netdev);
1707 netif_tx_disable(adapter->netdev);
1708
1709 /* After this point the napi handler won't enable the tx queue */
1710 ena_napi_disable_all(adapter);
1711
1712 /* After destroy the queue there won't be any new interrupts */
1713
1714 if (test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags)) {
1715 int rc;
1716
1717 rc = ena_com_dev_reset(adapter->ena_dev);
1718 if (rc)
1719 dev_err(&adapter->pdev->dev, "Device reset failed\n");
1720 }
1721
1722 ena_destroy_all_io_queues(adapter);
1723
1724 ena_disable_io_intr_sync(adapter);
1725 ena_free_io_irq(adapter);
1726 ena_del_napi(adapter);
1727
1728 ena_free_all_tx_bufs(adapter);
1729 ena_free_all_rx_bufs(adapter);
1730 ena_free_all_io_tx_resources(adapter);
1731 ena_free_all_io_rx_resources(adapter);
1732 }
1733
1734 /* ena_open - Called when a network interface is made active
1735 * @netdev: network interface device structure
1736 *
1737 * Returns 0 on success, negative value on failure
1738 *
1739 * The open entry point is called when a network interface is made
1740 * active by the system (IFF_UP). At this point all resources needed
1741 * for transmit and receive operations are allocated, the interrupt
1742 * handler is registered with the OS, the watchdog timer is started,
1743 * and the stack is notified that the interface is ready.
1744 */
1745 static int ena_open(struct net_device *netdev)
1746 {
1747 struct ena_adapter *adapter = netdev_priv(netdev);
1748 int rc;
1749
1750 /* Notify the stack of the actual queue counts. */
1751 rc = netif_set_real_num_tx_queues(netdev, adapter->num_queues);
1752 if (rc) {
1753 netif_err(adapter, ifup, netdev, "Can't set num tx queues\n");
1754 return rc;
1755 }
1756
1757 rc = netif_set_real_num_rx_queues(netdev, adapter->num_queues);
1758 if (rc) {
1759 netif_err(adapter, ifup, netdev, "Can't set num rx queues\n");
1760 return rc;
1761 }
1762
1763 rc = ena_up(adapter);
1764 if (rc)
1765 return rc;
1766
1767 return rc;
1768 }
1769
1770 /* ena_close - Disables a network interface
1771 * @netdev: network interface device structure
1772 *
1773 * Returns 0, this is not allowed to fail
1774 *
1775 * The close entry point is called when an interface is de-activated
1776 * by the OS. The hardware is still under the drivers control, but
1777 * needs to be disabled. A global MAC reset is issued to stop the
1778 * hardware, and all transmit and receive resources are freed.
1779 */
1780 static int ena_close(struct net_device *netdev)
1781 {
1782 struct ena_adapter *adapter = netdev_priv(netdev);
1783
1784 netif_dbg(adapter, ifdown, netdev, "%s\n", __func__);
1785
1786 if (test_bit(ENA_FLAG_DEV_UP, &adapter->flags))
1787 ena_down(adapter);
1788
1789 return 0;
1790 }
1791
1792 static void ena_tx_csum(struct ena_com_tx_ctx *ena_tx_ctx, struct sk_buff *skb)
1793 {
1794 u32 mss = skb_shinfo(skb)->gso_size;
1795 struct ena_com_tx_meta *ena_meta = &ena_tx_ctx->ena_meta;
1796 u8 l4_protocol = 0;
1797
1798 if ((skb->ip_summed == CHECKSUM_PARTIAL) || mss) {
1799 ena_tx_ctx->l4_csum_enable = 1;
1800 if (mss) {
1801 ena_tx_ctx->tso_enable = 1;
1802 ena_meta->l4_hdr_len = tcp_hdr(skb)->doff;
1803 ena_tx_ctx->l4_csum_partial = 0;
1804 } else {
1805 ena_tx_ctx->tso_enable = 0;
1806 ena_meta->l4_hdr_len = 0;
1807 ena_tx_ctx->l4_csum_partial = 1;
1808 }
1809
1810 switch (ip_hdr(skb)->version) {
1811 case IPVERSION:
1812 ena_tx_ctx->l3_proto = ENA_ETH_IO_L3_PROTO_IPV4;
1813 if (ip_hdr(skb)->frag_off & htons(IP_DF))
1814 ena_tx_ctx->df = 1;
1815 if (mss)
1816 ena_tx_ctx->l3_csum_enable = 1;
1817 l4_protocol = ip_hdr(skb)->protocol;
1818 break;
1819 case 6:
1820 ena_tx_ctx->l3_proto = ENA_ETH_IO_L3_PROTO_IPV6;
1821 l4_protocol = ipv6_hdr(skb)->nexthdr;
1822 break;
1823 default:
1824 break;
1825 }
1826
1827 if (l4_protocol == IPPROTO_TCP)
1828 ena_tx_ctx->l4_proto = ENA_ETH_IO_L4_PROTO_TCP;
1829 else
1830 ena_tx_ctx->l4_proto = ENA_ETH_IO_L4_PROTO_UDP;
1831
1832 ena_meta->mss = mss;
1833 ena_meta->l3_hdr_len = skb_network_header_len(skb);
1834 ena_meta->l3_hdr_offset = skb_network_offset(skb);
1835 ena_tx_ctx->meta_valid = 1;
1836
1837 } else {
1838 ena_tx_ctx->meta_valid = 0;
1839 }
1840 }
1841
1842 static int ena_check_and_linearize_skb(struct ena_ring *tx_ring,
1843 struct sk_buff *skb)
1844 {
1845 int num_frags, header_len, rc;
1846
1847 num_frags = skb_shinfo(skb)->nr_frags;
1848 header_len = skb_headlen(skb);
1849
1850 if (num_frags < tx_ring->sgl_size)
1851 return 0;
1852
1853 if ((num_frags == tx_ring->sgl_size) &&
1854 (header_len < tx_ring->tx_max_header_size))
1855 return 0;
1856
1857 u64_stats_update_begin(&tx_ring->syncp);
1858 tx_ring->tx_stats.linearize++;
1859 u64_stats_update_end(&tx_ring->syncp);
1860
1861 rc = skb_linearize(skb);
1862 if (unlikely(rc)) {
1863 u64_stats_update_begin(&tx_ring->syncp);
1864 tx_ring->tx_stats.linearize_failed++;
1865 u64_stats_update_end(&tx_ring->syncp);
1866 }
1867
1868 return rc;
1869 }
1870
1871 /* Called with netif_tx_lock. */
1872 static netdev_tx_t ena_start_xmit(struct sk_buff *skb, struct net_device *dev)
1873 {
1874 struct ena_adapter *adapter = netdev_priv(dev);
1875 struct ena_tx_buffer *tx_info;
1876 struct ena_com_tx_ctx ena_tx_ctx;
1877 struct ena_ring *tx_ring;
1878 struct netdev_queue *txq;
1879 struct ena_com_buf *ena_buf;
1880 void *push_hdr;
1881 u32 len, last_frag;
1882 u16 next_to_use;
1883 u16 req_id;
1884 u16 push_len;
1885 u16 header_len;
1886 dma_addr_t dma;
1887 int qid, rc, nb_hw_desc;
1888 int i = -1;
1889
1890 netif_dbg(adapter, tx_queued, dev, "%s skb %p\n", __func__, skb);
1891 /* Determine which tx ring we will be placed on */
1892 qid = skb_get_queue_mapping(skb);
1893 tx_ring = &adapter->tx_ring[qid];
1894 txq = netdev_get_tx_queue(dev, qid);
1895
1896 rc = ena_check_and_linearize_skb(tx_ring, skb);
1897 if (unlikely(rc))
1898 goto error_drop_packet;
1899
1900 skb_tx_timestamp(skb);
1901 len = skb_headlen(skb);
1902
1903 next_to_use = tx_ring->next_to_use;
1904 req_id = tx_ring->free_tx_ids[next_to_use];
1905 tx_info = &tx_ring->tx_buffer_info[req_id];
1906 tx_info->num_of_bufs = 0;
1907
1908 WARN(tx_info->skb, "SKB isn't NULL req_id %d\n", req_id);
1909 ena_buf = tx_info->bufs;
1910 tx_info->skb = skb;
1911
1912 if (tx_ring->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) {
1913 /* prepared the push buffer */
1914 push_len = min_t(u32, len, tx_ring->tx_max_header_size);
1915 header_len = push_len;
1916 push_hdr = skb->data;
1917 } else {
1918 push_len = 0;
1919 header_len = min_t(u32, len, tx_ring->tx_max_header_size);
1920 push_hdr = NULL;
1921 }
1922
1923 netif_dbg(adapter, tx_queued, dev,
1924 "skb: %p header_buf->vaddr: %p push_len: %d\n", skb,
1925 push_hdr, push_len);
1926
1927 if (len > push_len) {
1928 dma = dma_map_single(tx_ring->dev, skb->data + push_len,
1929 len - push_len, DMA_TO_DEVICE);
1930 if (dma_mapping_error(tx_ring->dev, dma))
1931 goto error_report_dma_error;
1932
1933 ena_buf->paddr = dma;
1934 ena_buf->len = len - push_len;
1935
1936 ena_buf++;
1937 tx_info->num_of_bufs++;
1938 }
1939
1940 last_frag = skb_shinfo(skb)->nr_frags;
1941
1942 for (i = 0; i < last_frag; i++) {
1943 const skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
1944
1945 len = skb_frag_size(frag);
1946 dma = skb_frag_dma_map(tx_ring->dev, frag, 0, len,
1947 DMA_TO_DEVICE);
1948 if (dma_mapping_error(tx_ring->dev, dma))
1949 goto error_report_dma_error;
1950
1951 ena_buf->paddr = dma;
1952 ena_buf->len = len;
1953 ena_buf++;
1954 }
1955
1956 tx_info->num_of_bufs += last_frag;
1957
1958 memset(&ena_tx_ctx, 0x0, sizeof(struct ena_com_tx_ctx));
1959 ena_tx_ctx.ena_bufs = tx_info->bufs;
1960 ena_tx_ctx.push_header = push_hdr;
1961 ena_tx_ctx.num_bufs = tx_info->num_of_bufs;
1962 ena_tx_ctx.req_id = req_id;
1963 ena_tx_ctx.header_len = header_len;
1964
1965 /* set flags and meta data */
1966 ena_tx_csum(&ena_tx_ctx, skb);
1967
1968 /* prepare the packet's descriptors to dma engine */
1969 rc = ena_com_prepare_tx(tx_ring->ena_com_io_sq, &ena_tx_ctx,
1970 &nb_hw_desc);
1971
1972 if (unlikely(rc)) {
1973 netif_err(adapter, tx_queued, dev,
1974 "failed to prepare tx bufs\n");
1975 u64_stats_update_begin(&tx_ring->syncp);
1976 tx_ring->tx_stats.queue_stop++;
1977 tx_ring->tx_stats.prepare_ctx_err++;
1978 u64_stats_update_end(&tx_ring->syncp);
1979 netif_tx_stop_queue(txq);
1980 goto error_unmap_dma;
1981 }
1982
1983 netdev_tx_sent_queue(txq, skb->len);
1984
1985 u64_stats_update_begin(&tx_ring->syncp);
1986 tx_ring->tx_stats.cnt++;
1987 tx_ring->tx_stats.bytes += skb->len;
1988 u64_stats_update_end(&tx_ring->syncp);
1989
1990 tx_info->tx_descs = nb_hw_desc;
1991 tx_info->last_jiffies = jiffies;
1992
1993 tx_ring->next_to_use = ENA_TX_RING_IDX_NEXT(next_to_use,
1994 tx_ring->ring_size);
1995
1996 /* This WMB is aimed to:
1997 * 1 - perform smp barrier before reading next_to_completion
1998 * 2 - make sure the desc were written before trigger DB
1999 */
2000 wmb();
2001
2002 /* stop the queue when no more space available, the packet can have up
2003 * to sgl_size + 2. one for the meta descriptor and one for header
2004 * (if the header is larger than tx_max_header_size).
2005 */
2006 if (unlikely(ena_com_sq_empty_space(tx_ring->ena_com_io_sq) <
2007 (tx_ring->sgl_size + 2))) {
2008 netif_dbg(adapter, tx_queued, dev, "%s stop queue %d\n",
2009 __func__, qid);
2010
2011 netif_tx_stop_queue(txq);
2012 u64_stats_update_begin(&tx_ring->syncp);
2013 tx_ring->tx_stats.queue_stop++;
2014 u64_stats_update_end(&tx_ring->syncp);
2015
2016 /* There is a rare condition where this function decide to
2017 * stop the queue but meanwhile clean_tx_irq updates
2018 * next_to_completion and terminates.
2019 * The queue will remain stopped forever.
2020 * To solve this issue this function perform rmb, check
2021 * the wakeup condition and wake up the queue if needed.
2022 */
2023 smp_rmb();
2024
2025 if (ena_com_sq_empty_space(tx_ring->ena_com_io_sq)
2026 > ENA_TX_WAKEUP_THRESH) {
2027 netif_tx_wake_queue(txq);
2028 u64_stats_update_begin(&tx_ring->syncp);
2029 tx_ring->tx_stats.queue_wakeup++;
2030 u64_stats_update_end(&tx_ring->syncp);
2031 }
2032 }
2033
2034 if (netif_xmit_stopped(txq) || !skb->xmit_more) {
2035 /* trigger the dma engine */
2036 ena_com_write_sq_doorbell(tx_ring->ena_com_io_sq);
2037 u64_stats_update_begin(&tx_ring->syncp);
2038 tx_ring->tx_stats.doorbells++;
2039 u64_stats_update_end(&tx_ring->syncp);
2040 }
2041
2042 return NETDEV_TX_OK;
2043
2044 error_report_dma_error:
2045 u64_stats_update_begin(&tx_ring->syncp);
2046 tx_ring->tx_stats.dma_mapping_err++;
2047 u64_stats_update_end(&tx_ring->syncp);
2048 netdev_warn(adapter->netdev, "failed to map skb\n");
2049
2050 tx_info->skb = NULL;
2051
2052 error_unmap_dma:
2053 if (i >= 0) {
2054 /* save value of frag that failed */
2055 last_frag = i;
2056
2057 /* start back at beginning and unmap skb */
2058 tx_info->skb = NULL;
2059 ena_buf = tx_info->bufs;
2060 dma_unmap_single(tx_ring->dev, dma_unmap_addr(ena_buf, paddr),
2061 dma_unmap_len(ena_buf, len), DMA_TO_DEVICE);
2062
2063 /* unmap remaining mapped pages */
2064 for (i = 0; i < last_frag; i++) {
2065 ena_buf++;
2066 dma_unmap_page(tx_ring->dev, dma_unmap_addr(ena_buf, paddr),
2067 dma_unmap_len(ena_buf, len), DMA_TO_DEVICE);
2068 }
2069 }
2070
2071 error_drop_packet:
2072
2073 dev_kfree_skb(skb);
2074 return NETDEV_TX_OK;
2075 }
2076
2077 #ifdef CONFIG_NET_POLL_CONTROLLER
2078 static void ena_netpoll(struct net_device *netdev)
2079 {
2080 struct ena_adapter *adapter = netdev_priv(netdev);
2081 int i;
2082
2083 /* Dont schedule NAPI if the driver is in the middle of reset
2084 * or netdev is down.
2085 */
2086
2087 if (!test_bit(ENA_FLAG_DEV_UP, &adapter->flags) ||
2088 test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))
2089 return;
2090
2091 for (i = 0; i < adapter->num_queues; i++)
2092 napi_schedule(&adapter->ena_napi[i].napi);
2093 }
2094 #endif /* CONFIG_NET_POLL_CONTROLLER */
2095
2096 static u16 ena_select_queue(struct net_device *dev, struct sk_buff *skb,
2097 void *accel_priv, select_queue_fallback_t fallback)
2098 {
2099 u16 qid;
2100 /* we suspect that this is good for in--kernel network services that
2101 * want to loop incoming skb rx to tx in normal user generated traffic,
2102 * most probably we will not get to this
2103 */
2104 if (skb_rx_queue_recorded(skb))
2105 qid = skb_get_rx_queue(skb);
2106 else
2107 qid = fallback(dev, skb);
2108
2109 return qid;
2110 }
2111
2112 static void ena_config_host_info(struct ena_com_dev *ena_dev)
2113 {
2114 struct ena_admin_host_info *host_info;
2115 int rc;
2116
2117 /* Allocate only the host info */
2118 rc = ena_com_allocate_host_info(ena_dev);
2119 if (rc) {
2120 pr_err("Cannot allocate host info\n");
2121 return;
2122 }
2123
2124 host_info = ena_dev->host_attr.host_info;
2125
2126 host_info->os_type = ENA_ADMIN_OS_LINUX;
2127 host_info->kernel_ver = LINUX_VERSION_CODE;
2128 strncpy(host_info->kernel_ver_str, utsname()->version,
2129 sizeof(host_info->kernel_ver_str) - 1);
2130 host_info->os_dist = 0;
2131 strncpy(host_info->os_dist_str, utsname()->release,
2132 sizeof(host_info->os_dist_str) - 1);
2133 host_info->driver_version =
2134 (DRV_MODULE_VER_MAJOR) |
2135 (DRV_MODULE_VER_MINOR << ENA_ADMIN_HOST_INFO_MINOR_SHIFT) |
2136 (DRV_MODULE_VER_SUBMINOR << ENA_ADMIN_HOST_INFO_SUB_MINOR_SHIFT);
2137
2138 rc = ena_com_set_host_attributes(ena_dev);
2139 if (rc) {
2140 if (rc == -EPERM)
2141 pr_warn("Cannot set host attributes\n");
2142 else
2143 pr_err("Cannot set host attributes\n");
2144
2145 goto err;
2146 }
2147
2148 return;
2149
2150 err:
2151 ena_com_delete_host_info(ena_dev);
2152 }
2153
2154 static void ena_config_debug_area(struct ena_adapter *adapter)
2155 {
2156 u32 debug_area_size;
2157 int rc, ss_count;
2158
2159 ss_count = ena_get_sset_count(adapter->netdev, ETH_SS_STATS);
2160 if (ss_count <= 0) {
2161 netif_err(adapter, drv, adapter->netdev,
2162 "SS count is negative\n");
2163 return;
2164 }
2165
2166 /* allocate 32 bytes for each string and 64bit for the value */
2167 debug_area_size = ss_count * ETH_GSTRING_LEN + sizeof(u64) * ss_count;
2168
2169 rc = ena_com_allocate_debug_area(adapter->ena_dev, debug_area_size);
2170 if (rc) {
2171 pr_err("Cannot allocate debug area\n");
2172 return;
2173 }
2174
2175 rc = ena_com_set_host_attributes(adapter->ena_dev);
2176 if (rc) {
2177 if (rc == -EPERM)
2178 netif_warn(adapter, drv, adapter->netdev,
2179 "Cannot set host attributes\n");
2180 else
2181 netif_err(adapter, drv, adapter->netdev,
2182 "Cannot set host attributes\n");
2183 goto err;
2184 }
2185
2186 return;
2187 err:
2188 ena_com_delete_debug_area(adapter->ena_dev);
2189 }
2190
2191 static void ena_get_stats64(struct net_device *netdev,
2192 struct rtnl_link_stats64 *stats)
2193 {
2194 struct ena_adapter *adapter = netdev_priv(netdev);
2195 struct ena_ring *rx_ring, *tx_ring;
2196 unsigned int start;
2197 u64 rx_drops;
2198 int i;
2199
2200 if (!test_bit(ENA_FLAG_DEV_UP, &adapter->flags))
2201 return;
2202
2203 for (i = 0; i < adapter->num_queues; i++) {
2204 u64 bytes, packets;
2205
2206 tx_ring = &adapter->tx_ring[i];
2207
2208 do {
2209 start = u64_stats_fetch_begin_irq(&tx_ring->syncp);
2210 packets = tx_ring->tx_stats.cnt;
2211 bytes = tx_ring->tx_stats.bytes;
2212 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start));
2213
2214 stats->tx_packets += packets;
2215 stats->tx_bytes += bytes;
2216
2217 rx_ring = &adapter->rx_ring[i];
2218
2219 do {
2220 start = u64_stats_fetch_begin_irq(&rx_ring->syncp);
2221 packets = rx_ring->rx_stats.cnt;
2222 bytes = rx_ring->rx_stats.bytes;
2223 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start));
2224
2225 stats->rx_packets += packets;
2226 stats->rx_bytes += bytes;
2227 }
2228
2229 do {
2230 start = u64_stats_fetch_begin_irq(&adapter->syncp);
2231 rx_drops = adapter->dev_stats.rx_drops;
2232 } while (u64_stats_fetch_retry_irq(&adapter->syncp, start));
2233
2234 stats->rx_dropped = rx_drops;
2235
2236 stats->multicast = 0;
2237 stats->collisions = 0;
2238
2239 stats->rx_length_errors = 0;
2240 stats->rx_crc_errors = 0;
2241 stats->rx_frame_errors = 0;
2242 stats->rx_fifo_errors = 0;
2243 stats->rx_missed_errors = 0;
2244 stats->tx_window_errors = 0;
2245
2246 stats->rx_errors = 0;
2247 stats->tx_errors = 0;
2248 }
2249
2250 static const struct net_device_ops ena_netdev_ops = {
2251 .ndo_open = ena_open,
2252 .ndo_stop = ena_close,
2253 .ndo_start_xmit = ena_start_xmit,
2254 .ndo_select_queue = ena_select_queue,
2255 .ndo_get_stats64 = ena_get_stats64,
2256 .ndo_tx_timeout = ena_tx_timeout,
2257 .ndo_change_mtu = ena_change_mtu,
2258 .ndo_set_mac_address = NULL,
2259 .ndo_validate_addr = eth_validate_addr,
2260 #ifdef CONFIG_NET_POLL_CONTROLLER
2261 .ndo_poll_controller = ena_netpoll,
2262 #endif /* CONFIG_NET_POLL_CONTROLLER */
2263 };
2264
2265 static void ena_device_io_suspend(struct work_struct *work)
2266 {
2267 struct ena_adapter *adapter =
2268 container_of(work, struct ena_adapter, suspend_io_task);
2269 struct net_device *netdev = adapter->netdev;
2270
2271 /* ena_napi_disable_all disables only the IO handling.
2272 * We are still subject to AENQ keep alive watchdog.
2273 */
2274 u64_stats_update_begin(&adapter->syncp);
2275 adapter->dev_stats.io_suspend++;
2276 u64_stats_update_begin(&adapter->syncp);
2277 ena_napi_disable_all(adapter);
2278 netif_tx_lock(netdev);
2279 netif_device_detach(netdev);
2280 netif_tx_unlock(netdev);
2281 }
2282
2283 static void ena_device_io_resume(struct work_struct *work)
2284 {
2285 struct ena_adapter *adapter =
2286 container_of(work, struct ena_adapter, resume_io_task);
2287 struct net_device *netdev = adapter->netdev;
2288
2289 u64_stats_update_begin(&adapter->syncp);
2290 adapter->dev_stats.io_resume++;
2291 u64_stats_update_end(&adapter->syncp);
2292
2293 netif_device_attach(netdev);
2294 ena_napi_enable_all(adapter);
2295 }
2296
2297 static int ena_device_validate_params(struct ena_adapter *adapter,
2298 struct ena_com_dev_get_features_ctx *get_feat_ctx)
2299 {
2300 struct net_device *netdev = adapter->netdev;
2301 int rc;
2302
2303 rc = ether_addr_equal(get_feat_ctx->dev_attr.mac_addr,
2304 adapter->mac_addr);
2305 if (!rc) {
2306 netif_err(adapter, drv, netdev,
2307 "Error, mac address are different\n");
2308 return -EINVAL;
2309 }
2310
2311 if ((get_feat_ctx->max_queues.max_cq_num < adapter->num_queues) ||
2312 (get_feat_ctx->max_queues.max_sq_num < adapter->num_queues)) {
2313 netif_err(adapter, drv, netdev,
2314 "Error, device doesn't support enough queues\n");
2315 return -EINVAL;
2316 }
2317
2318 if (get_feat_ctx->dev_attr.max_mtu < netdev->mtu) {
2319 netif_err(adapter, drv, netdev,
2320 "Error, device max mtu is smaller than netdev MTU\n");
2321 return -EINVAL;
2322 }
2323
2324 return 0;
2325 }
2326
2327 static int ena_device_init(struct ena_com_dev *ena_dev, struct pci_dev *pdev,
2328 struct ena_com_dev_get_features_ctx *get_feat_ctx,
2329 bool *wd_state)
2330 {
2331 struct device *dev = &pdev->dev;
2332 bool readless_supported;
2333 u32 aenq_groups;
2334 int dma_width;
2335 int rc;
2336
2337 rc = ena_com_mmio_reg_read_request_init(ena_dev);
2338 if (rc) {
2339 dev_err(dev, "failed to init mmio read less\n");
2340 return rc;
2341 }
2342
2343 /* The PCIe configuration space revision id indicate if mmio reg
2344 * read is disabled
2345 */
2346 readless_supported = !(pdev->revision & ENA_MMIO_DISABLE_REG_READ);
2347 ena_com_set_mmio_read_mode(ena_dev, readless_supported);
2348
2349 rc = ena_com_dev_reset(ena_dev);
2350 if (rc) {
2351 dev_err(dev, "Can not reset device\n");
2352 goto err_mmio_read_less;
2353 }
2354
2355 rc = ena_com_validate_version(ena_dev);
2356 if (rc) {
2357 dev_err(dev, "device version is too low\n");
2358 goto err_mmio_read_less;
2359 }
2360
2361 dma_width = ena_com_get_dma_width(ena_dev);
2362 if (dma_width < 0) {
2363 dev_err(dev, "Invalid dma width value %d", dma_width);
2364 rc = dma_width;
2365 goto err_mmio_read_less;
2366 }
2367
2368 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(dma_width));
2369 if (rc) {
2370 dev_err(dev, "pci_set_dma_mask failed 0x%x\n", rc);
2371 goto err_mmio_read_less;
2372 }
2373
2374 rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(dma_width));
2375 if (rc) {
2376 dev_err(dev, "err_pci_set_consistent_dma_mask failed 0x%x\n",
2377 rc);
2378 goto err_mmio_read_less;
2379 }
2380
2381 /* ENA admin level init */
2382 rc = ena_com_admin_init(ena_dev, &aenq_handlers, true);
2383 if (rc) {
2384 dev_err(dev,
2385 "Can not initialize ena admin queue with device\n");
2386 goto err_mmio_read_less;
2387 }
2388
2389 /* To enable the msix interrupts the driver needs to know the number
2390 * of queues. So the driver uses polling mode to retrieve this
2391 * information
2392 */
2393 ena_com_set_admin_polling_mode(ena_dev, true);
2394
2395 /* Get Device Attributes*/
2396 rc = ena_com_get_dev_attr_feat(ena_dev, get_feat_ctx);
2397 if (rc) {
2398 dev_err(dev, "Cannot get attribute for ena device rc=%d\n", rc);
2399 goto err_admin_init;
2400 }
2401
2402 /* Try to turn all the available aenq groups */
2403 aenq_groups = BIT(ENA_ADMIN_LINK_CHANGE) |
2404 BIT(ENA_ADMIN_FATAL_ERROR) |
2405 BIT(ENA_ADMIN_WARNING) |
2406 BIT(ENA_ADMIN_NOTIFICATION) |
2407 BIT(ENA_ADMIN_KEEP_ALIVE);
2408
2409 aenq_groups &= get_feat_ctx->aenq.supported_groups;
2410
2411 rc = ena_com_set_aenq_config(ena_dev, aenq_groups);
2412 if (rc) {
2413 dev_err(dev, "Cannot configure aenq groups rc= %d\n", rc);
2414 goto err_admin_init;
2415 }
2416
2417 *wd_state = !!(aenq_groups & BIT(ENA_ADMIN_KEEP_ALIVE));
2418
2419 ena_config_host_info(ena_dev);
2420
2421 return 0;
2422
2423 err_admin_init:
2424 ena_com_admin_destroy(ena_dev);
2425 err_mmio_read_less:
2426 ena_com_mmio_reg_read_request_destroy(ena_dev);
2427
2428 return rc;
2429 }
2430
2431 static int ena_enable_msix_and_set_admin_interrupts(struct ena_adapter *adapter,
2432 int io_vectors)
2433 {
2434 struct ena_com_dev *ena_dev = adapter->ena_dev;
2435 struct device *dev = &adapter->pdev->dev;
2436 int rc;
2437
2438 rc = ena_enable_msix(adapter, io_vectors);
2439 if (rc) {
2440 dev_err(dev, "Can not reserve msix vectors\n");
2441 return rc;
2442 }
2443
2444 ena_setup_mgmnt_intr(adapter);
2445
2446 rc = ena_request_mgmnt_irq(adapter);
2447 if (rc) {
2448 dev_err(dev, "Can not setup management interrupts\n");
2449 goto err_disable_msix;
2450 }
2451
2452 ena_com_set_admin_polling_mode(ena_dev, false);
2453
2454 ena_com_admin_aenq_enable(ena_dev);
2455
2456 return 0;
2457
2458 err_disable_msix:
2459 ena_disable_msix(adapter);
2460
2461 return rc;
2462 }
2463
2464 static void ena_fw_reset_device(struct work_struct *work)
2465 {
2466 struct ena_com_dev_get_features_ctx get_feat_ctx;
2467 struct ena_adapter *adapter =
2468 container_of(work, struct ena_adapter, reset_task);
2469 struct net_device *netdev = adapter->netdev;
2470 struct ena_com_dev *ena_dev = adapter->ena_dev;
2471 struct pci_dev *pdev = adapter->pdev;
2472 bool dev_up, wd_state;
2473 int rc;
2474
2475 if (unlikely(!test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) {
2476 dev_err(&pdev->dev,
2477 "device reset schedule while reset bit is off\n");
2478 return;
2479 }
2480
2481 netif_carrier_off(netdev);
2482
2483 del_timer_sync(&adapter->timer_service);
2484
2485 rtnl_lock();
2486
2487 dev_up = test_bit(ENA_FLAG_DEV_UP, &adapter->flags);
2488 ena_com_set_admin_running_state(ena_dev, false);
2489
2490 /* After calling ena_close the tx queues and the napi
2491 * are disabled so no one can interfere or touch the
2492 * data structures
2493 */
2494 ena_close(netdev);
2495
2496 ena_free_mgmnt_irq(adapter);
2497
2498 ena_disable_msix(adapter);
2499
2500 ena_com_abort_admin_commands(ena_dev);
2501
2502 ena_com_wait_for_abort_completion(ena_dev);
2503
2504 ena_com_admin_destroy(ena_dev);
2505
2506 ena_com_mmio_reg_read_request_destroy(ena_dev);
2507
2508 clear_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
2509
2510 /* Finish with the destroy part. Start the init part */
2511
2512 rc = ena_device_init(ena_dev, adapter->pdev, &get_feat_ctx, &wd_state);
2513 if (rc) {
2514 dev_err(&pdev->dev, "Can not initialize device\n");
2515 goto err;
2516 }
2517 adapter->wd_state = wd_state;
2518
2519 rc = ena_device_validate_params(adapter, &get_feat_ctx);
2520 if (rc) {
2521 dev_err(&pdev->dev, "Validation of device parameters failed\n");
2522 goto err_device_destroy;
2523 }
2524
2525 rc = ena_enable_msix_and_set_admin_interrupts(adapter,
2526 adapter->num_queues);
2527 if (rc) {
2528 dev_err(&pdev->dev, "Enable MSI-X failed\n");
2529 goto err_device_destroy;
2530 }
2531 /* If the interface was up before the reset bring it up */
2532 if (dev_up) {
2533 rc = ena_up(adapter);
2534 if (rc) {
2535 dev_err(&pdev->dev, "Failed to create I/O queues\n");
2536 goto err_disable_msix;
2537 }
2538 }
2539
2540 mod_timer(&adapter->timer_service, round_jiffies(jiffies + HZ));
2541
2542 rtnl_unlock();
2543
2544 dev_err(&pdev->dev, "Device reset completed successfully\n");
2545
2546 return;
2547 err_disable_msix:
2548 ena_free_mgmnt_irq(adapter);
2549 ena_disable_msix(adapter);
2550 err_device_destroy:
2551 ena_com_admin_destroy(ena_dev);
2552 err:
2553 rtnl_unlock();
2554
2555 clear_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags);
2556
2557 dev_err(&pdev->dev,
2558 "Reset attempt failed. Can not reset the device\n");
2559 }
2560
2561 static void check_for_missing_tx_completions(struct ena_adapter *adapter)
2562 {
2563 struct ena_tx_buffer *tx_buf;
2564 unsigned long last_jiffies;
2565 struct ena_ring *tx_ring;
2566 int i, j, budget;
2567 u32 missed_tx;
2568
2569 /* Make sure the driver doesn't turn the device in other process */
2570 smp_rmb();
2571
2572 if (!test_bit(ENA_FLAG_DEV_UP, &adapter->flags))
2573 return;
2574
2575 if (test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))
2576 return;
2577
2578 budget = ENA_MONITORED_TX_QUEUES;
2579
2580 for (i = adapter->last_monitored_tx_qid; i < adapter->num_queues; i++) {
2581 tx_ring = &adapter->tx_ring[i];
2582
2583 for (j = 0; j < tx_ring->ring_size; j++) {
2584 tx_buf = &tx_ring->tx_buffer_info[j];
2585 last_jiffies = tx_buf->last_jiffies;
2586 if (unlikely(last_jiffies && time_is_before_jiffies(last_jiffies + TX_TIMEOUT))) {
2587 netif_notice(adapter, tx_err, adapter->netdev,
2588 "Found a Tx that wasn't completed on time, qid %d, index %d.\n",
2589 tx_ring->qid, j);
2590
2591 u64_stats_update_begin(&tx_ring->syncp);
2592 missed_tx = tx_ring->tx_stats.missing_tx_comp++;
2593 u64_stats_update_end(&tx_ring->syncp);
2594
2595 /* Clear last jiffies so the lost buffer won't
2596 * be counted twice.
2597 */
2598 tx_buf->last_jiffies = 0;
2599
2600 if (unlikely(missed_tx > MAX_NUM_OF_TIMEOUTED_PACKETS)) {
2601 netif_err(adapter, tx_err, adapter->netdev,
2602 "The number of lost tx completion is above the threshold (%d > %d). Reset the device\n",
2603 missed_tx, MAX_NUM_OF_TIMEOUTED_PACKETS);
2604 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
2605 }
2606 }
2607 }
2608
2609 budget--;
2610 if (!budget)
2611 break;
2612 }
2613
2614 adapter->last_monitored_tx_qid = i % adapter->num_queues;
2615 }
2616
2617 /* Check for keep alive expiration */
2618 static void check_for_missing_keep_alive(struct ena_adapter *adapter)
2619 {
2620 unsigned long keep_alive_expired;
2621
2622 if (!adapter->wd_state)
2623 return;
2624
2625 keep_alive_expired = round_jiffies(adapter->last_keep_alive_jiffies
2626 + ENA_DEVICE_KALIVE_TIMEOUT);
2627 if (unlikely(time_is_before_jiffies(keep_alive_expired))) {
2628 netif_err(adapter, drv, adapter->netdev,
2629 "Keep alive watchdog timeout.\n");
2630 u64_stats_update_begin(&adapter->syncp);
2631 adapter->dev_stats.wd_expired++;
2632 u64_stats_update_end(&adapter->syncp);
2633 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
2634 }
2635 }
2636
2637 static void check_for_admin_com_state(struct ena_adapter *adapter)
2638 {
2639 if (unlikely(!ena_com_get_admin_running_state(adapter->ena_dev))) {
2640 netif_err(adapter, drv, adapter->netdev,
2641 "ENA admin queue is not in running state!\n");
2642 u64_stats_update_begin(&adapter->syncp);
2643 adapter->dev_stats.admin_q_pause++;
2644 u64_stats_update_end(&adapter->syncp);
2645 set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
2646 }
2647 }
2648
2649 static void ena_update_host_info(struct ena_admin_host_info *host_info,
2650 struct net_device *netdev)
2651 {
2652 host_info->supported_network_features[0] =
2653 netdev->features & GENMASK_ULL(31, 0);
2654 host_info->supported_network_features[1] =
2655 (netdev->features & GENMASK_ULL(63, 32)) >> 32;
2656 }
2657
2658 static void ena_timer_service(unsigned long data)
2659 {
2660 struct ena_adapter *adapter = (struct ena_adapter *)data;
2661 u8 *debug_area = adapter->ena_dev->host_attr.debug_area_virt_addr;
2662 struct ena_admin_host_info *host_info =
2663 adapter->ena_dev->host_attr.host_info;
2664
2665 check_for_missing_keep_alive(adapter);
2666
2667 check_for_admin_com_state(adapter);
2668
2669 check_for_missing_tx_completions(adapter);
2670
2671 if (debug_area)
2672 ena_dump_stats_to_buf(adapter, debug_area);
2673
2674 if (host_info)
2675 ena_update_host_info(host_info, adapter->netdev);
2676
2677 if (unlikely(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) {
2678 netif_err(adapter, drv, adapter->netdev,
2679 "Trigger reset is on\n");
2680 ena_dump_stats_to_dmesg(adapter);
2681 queue_work(ena_wq, &adapter->reset_task);
2682 return;
2683 }
2684
2685 /* Reset the timer */
2686 mod_timer(&adapter->timer_service, jiffies + HZ);
2687 }
2688
2689 static int ena_calc_io_queue_num(struct pci_dev *pdev,
2690 struct ena_com_dev *ena_dev,
2691 struct ena_com_dev_get_features_ctx *get_feat_ctx)
2692 {
2693 int io_sq_num, io_queue_num;
2694
2695 /* In case of LLQ use the llq number in the get feature cmd */
2696 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) {
2697 io_sq_num = get_feat_ctx->max_queues.max_llq_num;
2698
2699 if (io_sq_num == 0) {
2700 dev_err(&pdev->dev,
2701 "Trying to use LLQ but llq_num is 0. Fall back into regular queues\n");
2702
2703 ena_dev->tx_mem_queue_type =
2704 ENA_ADMIN_PLACEMENT_POLICY_HOST;
2705 io_sq_num = get_feat_ctx->max_queues.max_sq_num;
2706 }
2707 } else {
2708 io_sq_num = get_feat_ctx->max_queues.max_sq_num;
2709 }
2710
2711 io_queue_num = min_t(int, num_online_cpus(), ENA_MAX_NUM_IO_QUEUES);
2712 io_queue_num = min_t(int, io_queue_num, io_sq_num);
2713 io_queue_num = min_t(int, io_queue_num,
2714 get_feat_ctx->max_queues.max_cq_num);
2715 /* 1 IRQ for for mgmnt and 1 IRQs for each IO direction */
2716 io_queue_num = min_t(int, io_queue_num, pci_msix_vec_count(pdev) - 1);
2717 if (unlikely(!io_queue_num)) {
2718 dev_err(&pdev->dev, "The device doesn't have io queues\n");
2719 return -EFAULT;
2720 }
2721
2722 return io_queue_num;
2723 }
2724
2725 static void ena_set_push_mode(struct pci_dev *pdev, struct ena_com_dev *ena_dev,
2726 struct ena_com_dev_get_features_ctx *get_feat_ctx)
2727 {
2728 bool has_mem_bar;
2729
2730 has_mem_bar = pci_select_bars(pdev, IORESOURCE_MEM) & BIT(ENA_MEM_BAR);
2731
2732 /* Enable push mode if device supports LLQ */
2733 if (has_mem_bar && (get_feat_ctx->max_queues.max_llq_num > 0))
2734 ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_DEV;
2735 else
2736 ena_dev->tx_mem_queue_type = ENA_ADMIN_PLACEMENT_POLICY_HOST;
2737 }
2738
2739 static void ena_set_dev_offloads(struct ena_com_dev_get_features_ctx *feat,
2740 struct net_device *netdev)
2741 {
2742 netdev_features_t dev_features = 0;
2743
2744 /* Set offload features */
2745 if (feat->offload.tx &
2746 ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV4_CSUM_PART_MASK)
2747 dev_features |= NETIF_F_IP_CSUM;
2748
2749 if (feat->offload.tx &
2750 ENA_ADMIN_FEATURE_OFFLOAD_DESC_TX_L4_IPV6_CSUM_PART_MASK)
2751 dev_features |= NETIF_F_IPV6_CSUM;
2752
2753 if (feat->offload.tx & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_IPV4_MASK)
2754 dev_features |= NETIF_F_TSO;
2755
2756 if (feat->offload.tx & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_IPV6_MASK)
2757 dev_features |= NETIF_F_TSO6;
2758
2759 if (feat->offload.tx & ENA_ADMIN_FEATURE_OFFLOAD_DESC_TSO_ECN_MASK)
2760 dev_features |= NETIF_F_TSO_ECN;
2761
2762 if (feat->offload.rx_supported &
2763 ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L4_IPV4_CSUM_MASK)
2764 dev_features |= NETIF_F_RXCSUM;
2765
2766 if (feat->offload.rx_supported &
2767 ENA_ADMIN_FEATURE_OFFLOAD_DESC_RX_L4_IPV6_CSUM_MASK)
2768 dev_features |= NETIF_F_RXCSUM;
2769
2770 netdev->features =
2771 dev_features |
2772 NETIF_F_SG |
2773 NETIF_F_RXHASH |
2774 NETIF_F_HIGHDMA;
2775
2776 netdev->hw_features |= netdev->features;
2777 netdev->vlan_features |= netdev->features;
2778 }
2779
2780 static void ena_set_conf_feat_params(struct ena_adapter *adapter,
2781 struct ena_com_dev_get_features_ctx *feat)
2782 {
2783 struct net_device *netdev = adapter->netdev;
2784
2785 /* Copy mac address */
2786 if (!is_valid_ether_addr(feat->dev_attr.mac_addr)) {
2787 eth_hw_addr_random(netdev);
2788 ether_addr_copy(adapter->mac_addr, netdev->dev_addr);
2789 } else {
2790 ether_addr_copy(adapter->mac_addr, feat->dev_attr.mac_addr);
2791 ether_addr_copy(netdev->dev_addr, adapter->mac_addr);
2792 }
2793
2794 /* Set offload features */
2795 ena_set_dev_offloads(feat, netdev);
2796
2797 adapter->max_mtu = feat->dev_attr.max_mtu;
2798 netdev->max_mtu = adapter->max_mtu;
2799 netdev->min_mtu = ENA_MIN_MTU;
2800 }
2801
2802 static int ena_rss_init_default(struct ena_adapter *adapter)
2803 {
2804 struct ena_com_dev *ena_dev = adapter->ena_dev;
2805 struct device *dev = &adapter->pdev->dev;
2806 int rc, i;
2807 u32 val;
2808
2809 rc = ena_com_rss_init(ena_dev, ENA_RX_RSS_TABLE_LOG_SIZE);
2810 if (unlikely(rc)) {
2811 dev_err(dev, "Cannot init indirect table\n");
2812 goto err_rss_init;
2813 }
2814
2815 for (i = 0; i < ENA_RX_RSS_TABLE_SIZE; i++) {
2816 val = ethtool_rxfh_indir_default(i, adapter->num_queues);
2817 rc = ena_com_indirect_table_fill_entry(ena_dev, i,
2818 ENA_IO_RXQ_IDX(val));
2819 if (unlikely(rc && (rc != -EPERM))) {
2820 dev_err(dev, "Cannot fill indirect table\n");
2821 goto err_fill_indir;
2822 }
2823 }
2824
2825 rc = ena_com_fill_hash_function(ena_dev, ENA_ADMIN_CRC32, NULL,
2826 ENA_HASH_KEY_SIZE, 0xFFFFFFFF);
2827 if (unlikely(rc && (rc != -EPERM))) {
2828 dev_err(dev, "Cannot fill hash function\n");
2829 goto err_fill_indir;
2830 }
2831
2832 rc = ena_com_set_default_hash_ctrl(ena_dev);
2833 if (unlikely(rc && (rc != -EPERM))) {
2834 dev_err(dev, "Cannot fill hash control\n");
2835 goto err_fill_indir;
2836 }
2837
2838 return 0;
2839
2840 err_fill_indir:
2841 ena_com_rss_destroy(ena_dev);
2842 err_rss_init:
2843
2844 return rc;
2845 }
2846
2847 static void ena_release_bars(struct ena_com_dev *ena_dev, struct pci_dev *pdev)
2848 {
2849 int release_bars;
2850
2851 release_bars = pci_select_bars(pdev, IORESOURCE_MEM) & ENA_BAR_MASK;
2852 pci_release_selected_regions(pdev, release_bars);
2853 }
2854
2855 static int ena_calc_queue_size(struct pci_dev *pdev,
2856 struct ena_com_dev *ena_dev,
2857 u16 *max_tx_sgl_size,
2858 u16 *max_rx_sgl_size,
2859 struct ena_com_dev_get_features_ctx *get_feat_ctx)
2860 {
2861 u32 queue_size = ENA_DEFAULT_RING_SIZE;
2862
2863 queue_size = min_t(u32, queue_size,
2864 get_feat_ctx->max_queues.max_cq_depth);
2865 queue_size = min_t(u32, queue_size,
2866 get_feat_ctx->max_queues.max_sq_depth);
2867
2868 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV)
2869 queue_size = min_t(u32, queue_size,
2870 get_feat_ctx->max_queues.max_llq_depth);
2871
2872 queue_size = rounddown_pow_of_two(queue_size);
2873
2874 if (unlikely(!queue_size)) {
2875 dev_err(&pdev->dev, "Invalid queue size\n");
2876 return -EFAULT;
2877 }
2878
2879 *max_tx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS,
2880 get_feat_ctx->max_queues.max_packet_tx_descs);
2881 *max_rx_sgl_size = min_t(u16, ENA_PKT_MAX_BUFS,
2882 get_feat_ctx->max_queues.max_packet_rx_descs);
2883
2884 return queue_size;
2885 }
2886
2887 /* ena_probe - Device Initialization Routine
2888 * @pdev: PCI device information struct
2889 * @ent: entry in ena_pci_tbl
2890 *
2891 * Returns 0 on success, negative on failure
2892 *
2893 * ena_probe initializes an adapter identified by a pci_dev structure.
2894 * The OS initialization, configuring of the adapter private structure,
2895 * and a hardware reset occur.
2896 */
2897 static int ena_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
2898 {
2899 struct ena_com_dev_get_features_ctx get_feat_ctx;
2900 static int version_printed;
2901 struct net_device *netdev;
2902 struct ena_adapter *adapter;
2903 struct ena_com_dev *ena_dev = NULL;
2904 static int adapters_found;
2905 int io_queue_num, bars, rc;
2906 int queue_size;
2907 u16 tx_sgl_size = 0;
2908 u16 rx_sgl_size = 0;
2909 bool wd_state;
2910
2911 dev_dbg(&pdev->dev, "%s\n", __func__);
2912
2913 if (version_printed++ == 0)
2914 dev_info(&pdev->dev, "%s", version);
2915
2916 rc = pci_enable_device_mem(pdev);
2917 if (rc) {
2918 dev_err(&pdev->dev, "pci_enable_device_mem() failed!\n");
2919 return rc;
2920 }
2921
2922 pci_set_master(pdev);
2923
2924 ena_dev = vzalloc(sizeof(*ena_dev));
2925 if (!ena_dev) {
2926 rc = -ENOMEM;
2927 goto err_disable_device;
2928 }
2929
2930 bars = pci_select_bars(pdev, IORESOURCE_MEM) & ENA_BAR_MASK;
2931 rc = pci_request_selected_regions(pdev, bars, DRV_MODULE_NAME);
2932 if (rc) {
2933 dev_err(&pdev->dev, "pci_request_selected_regions failed %d\n",
2934 rc);
2935 goto err_free_ena_dev;
2936 }
2937
2938 ena_dev->reg_bar = ioremap(pci_resource_start(pdev, ENA_REG_BAR),
2939 pci_resource_len(pdev, ENA_REG_BAR));
2940 if (!ena_dev->reg_bar) {
2941 dev_err(&pdev->dev, "failed to remap regs bar\n");
2942 rc = -EFAULT;
2943 goto err_free_region;
2944 }
2945
2946 ena_dev->dmadev = &pdev->dev;
2947
2948 rc = ena_device_init(ena_dev, pdev, &get_feat_ctx, &wd_state);
2949 if (rc) {
2950 dev_err(&pdev->dev, "ena device init failed\n");
2951 if (rc == -ETIME)
2952 rc = -EPROBE_DEFER;
2953 goto err_free_region;
2954 }
2955
2956 ena_set_push_mode(pdev, ena_dev, &get_feat_ctx);
2957
2958 if (ena_dev->tx_mem_queue_type == ENA_ADMIN_PLACEMENT_POLICY_DEV) {
2959 ena_dev->mem_bar = ioremap_wc(pci_resource_start(pdev, ENA_MEM_BAR),
2960 pci_resource_len(pdev, ENA_MEM_BAR));
2961 if (!ena_dev->mem_bar) {
2962 rc = -EFAULT;
2963 goto err_device_destroy;
2964 }
2965 }
2966
2967 /* initial Tx interrupt delay, Assumes 1 usec granularity.
2968 * Updated during device initialization with the real granularity
2969 */
2970 ena_dev->intr_moder_tx_interval = ENA_INTR_INITIAL_TX_INTERVAL_USECS;
2971 io_queue_num = ena_calc_io_queue_num(pdev, ena_dev, &get_feat_ctx);
2972 queue_size = ena_calc_queue_size(pdev, ena_dev, &tx_sgl_size,
2973 &rx_sgl_size, &get_feat_ctx);
2974 if ((queue_size <= 0) || (io_queue_num <= 0)) {
2975 rc = -EFAULT;
2976 goto err_device_destroy;
2977 }
2978
2979 dev_info(&pdev->dev, "creating %d io queues. queue size: %d\n",
2980 io_queue_num, queue_size);
2981
2982 /* dev zeroed in init_etherdev */
2983 netdev = alloc_etherdev_mq(sizeof(struct ena_adapter), io_queue_num);
2984 if (!netdev) {
2985 dev_err(&pdev->dev, "alloc_etherdev_mq failed\n");
2986 rc = -ENOMEM;
2987 goto err_device_destroy;
2988 }
2989
2990 SET_NETDEV_DEV(netdev, &pdev->dev);
2991
2992 adapter = netdev_priv(netdev);
2993 pci_set_drvdata(pdev, adapter);
2994
2995 adapter->ena_dev = ena_dev;
2996 adapter->netdev = netdev;
2997 adapter->pdev = pdev;
2998
2999 ena_set_conf_feat_params(adapter, &get_feat_ctx);
3000
3001 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
3002
3003 adapter->tx_ring_size = queue_size;
3004 adapter->rx_ring_size = queue_size;
3005
3006 adapter->max_tx_sgl_size = tx_sgl_size;
3007 adapter->max_rx_sgl_size = rx_sgl_size;
3008
3009 adapter->num_queues = io_queue_num;
3010 adapter->last_monitored_tx_qid = 0;
3011
3012 adapter->rx_copybreak = ENA_DEFAULT_RX_COPYBREAK;
3013 adapter->wd_state = wd_state;
3014
3015 snprintf(adapter->name, ENA_NAME_MAX_LEN, "ena_%d", adapters_found);
3016
3017 rc = ena_com_init_interrupt_moderation(adapter->ena_dev);
3018 if (rc) {
3019 dev_err(&pdev->dev,
3020 "Failed to query interrupt moderation feature\n");
3021 goto err_netdev_destroy;
3022 }
3023 ena_init_io_rings(adapter);
3024
3025 netdev->netdev_ops = &ena_netdev_ops;
3026 netdev->watchdog_timeo = TX_TIMEOUT;
3027 ena_set_ethtool_ops(netdev);
3028
3029 netdev->priv_flags |= IFF_UNICAST_FLT;
3030
3031 u64_stats_init(&adapter->syncp);
3032
3033 rc = ena_enable_msix_and_set_admin_interrupts(adapter, io_queue_num);
3034 if (rc) {
3035 dev_err(&pdev->dev,
3036 "Failed to enable and set the admin interrupts\n");
3037 goto err_worker_destroy;
3038 }
3039 rc = ena_rss_init_default(adapter);
3040 if (rc && (rc != -EPERM)) {
3041 dev_err(&pdev->dev, "Cannot init RSS rc: %d\n", rc);
3042 goto err_free_msix;
3043 }
3044
3045 ena_config_debug_area(adapter);
3046
3047 memcpy(adapter->netdev->perm_addr, adapter->mac_addr, netdev->addr_len);
3048
3049 netif_carrier_off(netdev);
3050
3051 rc = register_netdev(netdev);
3052 if (rc) {
3053 dev_err(&pdev->dev, "Cannot register net device\n");
3054 goto err_rss;
3055 }
3056
3057 INIT_WORK(&adapter->suspend_io_task, ena_device_io_suspend);
3058 INIT_WORK(&adapter->resume_io_task, ena_device_io_resume);
3059 INIT_WORK(&adapter->reset_task, ena_fw_reset_device);
3060
3061 adapter->last_keep_alive_jiffies = jiffies;
3062
3063 setup_timer(&adapter->timer_service, ena_timer_service,
3064 (unsigned long)adapter);
3065 mod_timer(&adapter->timer_service, round_jiffies(jiffies + HZ));
3066
3067 dev_info(&pdev->dev, "%s found at mem %lx, mac addr %pM Queues %d\n",
3068 DEVICE_NAME, (long)pci_resource_start(pdev, 0),
3069 netdev->dev_addr, io_queue_num);
3070
3071 set_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags);
3072
3073 adapters_found++;
3074
3075 return 0;
3076
3077 err_rss:
3078 ena_com_delete_debug_area(ena_dev);
3079 ena_com_rss_destroy(ena_dev);
3080 err_free_msix:
3081 ena_com_dev_reset(ena_dev);
3082 ena_free_mgmnt_irq(adapter);
3083 ena_disable_msix(adapter);
3084 err_worker_destroy:
3085 ena_com_destroy_interrupt_moderation(ena_dev);
3086 del_timer(&adapter->timer_service);
3087 cancel_work_sync(&adapter->suspend_io_task);
3088 cancel_work_sync(&adapter->resume_io_task);
3089 err_netdev_destroy:
3090 free_netdev(netdev);
3091 err_device_destroy:
3092 ena_com_delete_host_info(ena_dev);
3093 ena_com_admin_destroy(ena_dev);
3094 err_free_region:
3095 ena_release_bars(ena_dev, pdev);
3096 err_free_ena_dev:
3097 vfree(ena_dev);
3098 err_disable_device:
3099 pci_disable_device(pdev);
3100 return rc;
3101 }
3102
3103 /*****************************************************************************/
3104 static int ena_sriov_configure(struct pci_dev *dev, int numvfs)
3105 {
3106 int rc;
3107
3108 if (numvfs > 0) {
3109 rc = pci_enable_sriov(dev, numvfs);
3110 if (rc != 0) {
3111 dev_err(&dev->dev,
3112 "pci_enable_sriov failed to enable: %d vfs with the error: %d\n",
3113 numvfs, rc);
3114 return rc;
3115 }
3116
3117 return numvfs;
3118 }
3119
3120 if (numvfs == 0) {
3121 pci_disable_sriov(dev);
3122 return 0;
3123 }
3124
3125 return -EINVAL;
3126 }
3127
3128 /*****************************************************************************/
3129 /*****************************************************************************/
3130
3131 /* ena_remove - Device Removal Routine
3132 * @pdev: PCI device information struct
3133 *
3134 * ena_remove is called by the PCI subsystem to alert the driver
3135 * that it should release a PCI device.
3136 */
3137 static void ena_remove(struct pci_dev *pdev)
3138 {
3139 struct ena_adapter *adapter = pci_get_drvdata(pdev);
3140 struct ena_com_dev *ena_dev;
3141 struct net_device *netdev;
3142
3143 if (!adapter)
3144 /* This device didn't load properly and it's resources
3145 * already released, nothing to do
3146 */
3147 return;
3148
3149 ena_dev = adapter->ena_dev;
3150 netdev = adapter->netdev;
3151
3152 #ifdef CONFIG_RFS_ACCEL
3153 if ((adapter->msix_vecs >= 1) && (netdev->rx_cpu_rmap)) {
3154 free_irq_cpu_rmap(netdev->rx_cpu_rmap);
3155 netdev->rx_cpu_rmap = NULL;
3156 }
3157 #endif /* CONFIG_RFS_ACCEL */
3158
3159 unregister_netdev(netdev);
3160 del_timer_sync(&adapter->timer_service);
3161
3162 cancel_work_sync(&adapter->reset_task);
3163
3164 cancel_work_sync(&adapter->suspend_io_task);
3165
3166 cancel_work_sync(&adapter->resume_io_task);
3167
3168 /* Reset the device only if the device is running. */
3169 if (test_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags))
3170 ena_com_dev_reset(ena_dev);
3171
3172 ena_free_mgmnt_irq(adapter);
3173
3174 ena_disable_msix(adapter);
3175
3176 free_netdev(netdev);
3177
3178 ena_com_mmio_reg_read_request_destroy(ena_dev);
3179
3180 ena_com_abort_admin_commands(ena_dev);
3181
3182 ena_com_wait_for_abort_completion(ena_dev);
3183
3184 ena_com_admin_destroy(ena_dev);
3185
3186 ena_com_rss_destroy(ena_dev);
3187
3188 ena_com_delete_debug_area(ena_dev);
3189
3190 ena_com_delete_host_info(ena_dev);
3191
3192 ena_release_bars(ena_dev, pdev);
3193
3194 pci_disable_device(pdev);
3195
3196 ena_com_destroy_interrupt_moderation(ena_dev);
3197
3198 vfree(ena_dev);
3199 }
3200
3201 static struct pci_driver ena_pci_driver = {
3202 .name = DRV_MODULE_NAME,
3203 .id_table = ena_pci_tbl,
3204 .probe = ena_probe,
3205 .remove = ena_remove,
3206 .sriov_configure = ena_sriov_configure,
3207 };
3208
3209 static int __init ena_init(void)
3210 {
3211 pr_info("%s", version);
3212
3213 ena_wq = create_singlethread_workqueue(DRV_MODULE_NAME);
3214 if (!ena_wq) {
3215 pr_err("Failed to create workqueue\n");
3216 return -ENOMEM;
3217 }
3218
3219 return pci_register_driver(&ena_pci_driver);
3220 }
3221
3222 static void __exit ena_cleanup(void)
3223 {
3224 pci_unregister_driver(&ena_pci_driver);
3225
3226 if (ena_wq) {
3227 destroy_workqueue(ena_wq);
3228 ena_wq = NULL;
3229 }
3230 }
3231
3232 /******************************************************************************
3233 ******************************** AENQ Handlers *******************************
3234 *****************************************************************************/
3235 /* ena_update_on_link_change:
3236 * Notify the network interface about the change in link status
3237 */
3238 static void ena_update_on_link_change(void *adapter_data,
3239 struct ena_admin_aenq_entry *aenq_e)
3240 {
3241 struct ena_adapter *adapter = (struct ena_adapter *)adapter_data;
3242 struct ena_admin_aenq_link_change_desc *aenq_desc =
3243 (struct ena_admin_aenq_link_change_desc *)aenq_e;
3244 int status = aenq_desc->flags &
3245 ENA_ADMIN_AENQ_LINK_CHANGE_DESC_LINK_STATUS_MASK;
3246
3247 if (status) {
3248 netdev_dbg(adapter->netdev, "%s\n", __func__);
3249 set_bit(ENA_FLAG_LINK_UP, &adapter->flags);
3250 netif_carrier_on(adapter->netdev);
3251 } else {
3252 clear_bit(ENA_FLAG_LINK_UP, &adapter->flags);
3253 netif_carrier_off(adapter->netdev);
3254 }
3255 }
3256
3257 static void ena_keep_alive_wd(void *adapter_data,
3258 struct ena_admin_aenq_entry *aenq_e)
3259 {
3260 struct ena_adapter *adapter = (struct ena_adapter *)adapter_data;
3261
3262 adapter->last_keep_alive_jiffies = jiffies;
3263 }
3264
3265 static void ena_notification(void *adapter_data,
3266 struct ena_admin_aenq_entry *aenq_e)
3267 {
3268 struct ena_adapter *adapter = (struct ena_adapter *)adapter_data;
3269
3270 WARN(aenq_e->aenq_common_desc.group != ENA_ADMIN_NOTIFICATION,
3271 "Invalid group(%x) expected %x\n",
3272 aenq_e->aenq_common_desc.group,
3273 ENA_ADMIN_NOTIFICATION);
3274
3275 switch (aenq_e->aenq_common_desc.syndrom) {
3276 case ENA_ADMIN_SUSPEND:
3277 /* Suspend just the IO queues.
3278 * We deliberately don't suspend admin so the timer and
3279 * the keep_alive events should remain.
3280 */
3281 queue_work(ena_wq, &adapter->suspend_io_task);
3282 break;
3283 case ENA_ADMIN_RESUME:
3284 queue_work(ena_wq, &adapter->resume_io_task);
3285 break;
3286 default:
3287 netif_err(adapter, drv, adapter->netdev,
3288 "Invalid aenq notification link state %d\n",
3289 aenq_e->aenq_common_desc.syndrom);
3290 }
3291 }
3292
3293 /* This handler will called for unknown event group or unimplemented handlers*/
3294 static void unimplemented_aenq_handler(void *data,
3295 struct ena_admin_aenq_entry *aenq_e)
3296 {
3297 struct ena_adapter *adapter = (struct ena_adapter *)data;
3298
3299 netif_err(adapter, drv, adapter->netdev,
3300 "Unknown event was received or event with unimplemented handler\n");
3301 }
3302
3303 static struct ena_aenq_handlers aenq_handlers = {
3304 .handlers = {
3305 [ENA_ADMIN_LINK_CHANGE] = ena_update_on_link_change,
3306 [ENA_ADMIN_NOTIFICATION] = ena_notification,
3307 [ENA_ADMIN_KEEP_ALIVE] = ena_keep_alive_wd,
3308 },
3309 .unimplemented_handler = unimplemented_aenq_handler
3310 };
3311
3312 module_init(ena_init);
3313 module_exit(ena_cleanup);
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