drivers/net/ethernet/arc/emac.h

   1 /* SPDX-License-Identifier: GPL-2.0 */
   2 /*
   3  * Copyright (C) 2004-2013 Synopsys, Inc. (www.synopsys.com)
   4  *
   5  * Registers and bits definitions of ARC EMAC
   6  */
   7
   8 #ifndef ARC_EMAC_H
   9 #define ARC_EMAC_H
  10
  11 #include <linux/device.h>
  12 #include <linux/dma-mapping.h>
  13 #include <linux/netdevice.h>
  14 #include <linux/phy.h>
  15 #include <linux/clk.h>
  16
  17 /* STATUS and ENABLE Register bit masks */
  18 #define TXINT_MASK      (1 << 0)        /* Transmit interrupt */
  19 #define RXINT_MASK      (1 << 1)        /* Receive interrupt */
  20 #define ERR_MASK        (1 << 2)        /* Error interrupt */
  21 #define TXCH_MASK       (1 << 3)        /* Transmit chaining error interrupt */
  22 #define MSER_MASK       (1 << 4)        /* Missed packet counter error */
  23 #define RXCR_MASK       (1 << 8)        /* RXCRCERR counter rolled over  */
  24 #define RXFR_MASK       (1 << 9)        /* RXFRAMEERR counter rolled over */
  25 #define RXFL_MASK       (1 << 10)       /* RXOFLOWERR counter rolled over */
  26 #define MDIO_MASK       (1 << 12)       /* MDIO complete interrupt */
  27 #define TXPL_MASK       (1 << 31)       /* Force polling of BD by EMAC */
  28
  29 /* CONTROL Register bit masks */
  30 #define EN_MASK         (1 << 0)        /* VMAC enable */
  31 #define TXRN_MASK       (1 << 3)        /* TX enable */
  32 #define RXRN_MASK       (1 << 4)        /* RX enable */
  33 #define DSBC_MASK       (1 << 8)        /* Disable receive broadcast */
  34 #define ENFL_MASK       (1 << 10)       /* Enable Full-duplex */
  35 #define PROM_MASK       (1 << 11)       /* Promiscuous mode */
  36
  37 /* Buffer descriptor INFO bit masks */
  38 #define OWN_MASK        (1 << 31)       /* 0-CPU or 1-EMAC owns buffer */
  39 #define FIRST_MASK      (1 << 16)       /* First buffer in chain */
  40 #define LAST_MASK       (1 << 17)       /* Last buffer in chain */
  41 #define LEN_MASK        0x000007FF      /* last 11 bits */
  42 #define CRLS            (1 << 21)
  43 #define DEFR            (1 << 22)
  44 #define DROP            (1 << 23)
  45 #define RTRY            (1 << 24)
  46 #define LTCL            (1 << 28)
  47 #define UFLO            (1 << 29)
  48
  49 #define FOR_EMAC        OWN_MASK
  50 #define FOR_CPU         0
  51
  52 /* ARC EMAC register set combines entries for MAC and MDIO */
  53 enum {
  54         R_ID = 0,
  55         R_STATUS,
  56         R_ENABLE,
  57         R_CTRL,
  58         R_POLLRATE,
  59         R_RXERR,
  60         R_MISS,
  61         R_TX_RING,
  62         R_RX_RING,
  63         R_ADDRL,
  64         R_ADDRH,
  65         R_LAFL,
  66         R_LAFH,
  67         R_MDIO,
  68 };
  69
  70 #define TX_TIMEOUT              (400 * HZ / 1000) /* Transmission timeout */
  71
  72 #define ARC_EMAC_NAPI_WEIGHT    40              /* Workload for NAPI */
  73
  74 #define EMAC_BUFFER_SIZE        1536            /* EMAC buffer size */
  75
  76 /**
  77  * struct arc_emac_bd - EMAC buffer descriptor (BD).
  78  *
  79  * @info:       Contains status information on the buffer itself.
  80  * @data:       32-bit byte addressable pointer to the packet data.
  81  */
  82 struct arc_emac_bd {
  83         __le32 info;
  84         dma_addr_t data;
  85 };
  86
  87 /* Number of Rx/Tx BD's */
  88 #define RX_BD_NUM       128
  89 #define TX_BD_NUM       128
  90
  91 #define RX_RING_SZ      (RX_BD_NUM * sizeof(struct arc_emac_bd))
  92 #define TX_RING_SZ      (TX_BD_NUM * sizeof(struct arc_emac_bd))
  93
  94 /**
  95  * struct buffer_state - Stores Rx/Tx buffer state.
  96  * @sk_buff:    Pointer to socket buffer.
  97  * @addr:       Start address of DMA-mapped memory region.
  98  * @len:        Length of DMA-mapped memory region.
  99  */
 100 struct buffer_state {
 101         struct sk_buff *skb;
 102         DEFINE_DMA_UNMAP_ADDR(addr);
 103         DEFINE_DMA_UNMAP_LEN(len);
 104 };
 105
 106 struct arc_emac_mdio_bus_data {
 107         struct gpio_desc *reset_gpio;
 108         int msec;
 109 };
 110
 111 /**
 112  * struct arc_emac_priv - Storage of EMAC's private information.
 113  * @dev:        Pointer to the current device.
 114  * @phy_dev:    Pointer to attached PHY device.
 115  * @bus:        Pointer to the current MII bus.
 116  * @regs:       Base address of EMAC memory-mapped control registers.
 117  * @napi:       Structure for NAPI.
 118  * @rxbd:       Pointer to Rx BD ring.
 119  * @txbd:       Pointer to Tx BD ring.
 120  * @rxbd_dma:   DMA handle for Rx BD ring.
 121  * @txbd_dma:   DMA handle for Tx BD ring.
 122  * @rx_buff:    Storage for Rx buffers states.
 123  * @tx_buff:    Storage for Tx buffers states.
 124  * @txbd_curr:  Index of Tx BD to use on the next "ndo_start_xmit".
 125  * @txbd_dirty: Index of Tx BD to free on the next Tx interrupt.
 126  * @last_rx_bd: Index of the last Rx BD we've got from EMAC.
 127  * @link:       PHY's last seen link state.
 128  * @duplex:     PHY's last set duplex mode.
 129  * @speed:      PHY's last set speed.
 130  */
 131 struct arc_emac_priv {
 132         const char *drv_name;
 133         const char *drv_version;
 134         void (*set_mac_speed)(void *priv, unsigned int speed);
 135
 136         /* Devices */
 137         struct device *dev;
 138         struct mii_bus *bus;
 139         struct arc_emac_mdio_bus_data bus_data;
 140
 141         void __iomem *regs;
 142         struct clk *clk;
 143
 144         struct napi_struct napi;
 145
 146         struct arc_emac_bd *rxbd;
 147         struct arc_emac_bd *txbd;
 148
 149         dma_addr_t rxbd_dma;
 150         dma_addr_t txbd_dma;
 151
 152         struct buffer_state rx_buff[RX_BD_NUM];
 153         struct buffer_state tx_buff[TX_BD_NUM];
 154         unsigned int txbd_curr;
 155         unsigned int txbd_dirty;
 156
 157         unsigned int last_rx_bd;
 158
 159         unsigned int link;
 160         unsigned int duplex;
 161         unsigned int speed;
 162 };
 163
 164 /**
 165  * arc_reg_set - Sets EMAC register with provided value.
 166  * @priv:       Pointer to ARC EMAC private data structure.
 167  * @reg:        Register offset from base address.
 168  * @value:      Value to set in register.
 169  */
 170 static inline void arc_reg_set(struct arc_emac_priv *priv, int reg, int value)
 171 {
 172         iowrite32(value, priv->regs + reg * sizeof(int));
 173 }
 174
 175 /**
 176  * arc_reg_get - Gets value of specified EMAC register.
 177  * @priv:       Pointer to ARC EMAC private data structure.
 178  * @reg:        Register offset from base address.
 179  *
 180  * returns:     Value of requested register.
 181  */
 182 static inline unsigned int arc_reg_get(struct arc_emac_priv *priv, int reg)
 183 {
 184         return ioread32(priv->regs + reg * sizeof(int));
 185 }
 186
 187 /**
 188  * arc_reg_or - Applies mask to specified EMAC register - ("reg" | "mask").
 189  * @priv:       Pointer to ARC EMAC private data structure.
 190  * @reg:        Register offset from base address.
 191  * @mask:       Mask to apply to specified register.
 192  *
 193  * This function reads initial register value, then applies provided mask
 194  * to it and then writes register back.
 195  */
 196 static inline void arc_reg_or(struct arc_emac_priv *priv, int reg, int mask)
 197 {
 198         unsigned int value = arc_reg_get(priv, reg);
 199
 200         arc_reg_set(priv, reg, value | mask);
 201 }
 202
 203 /**
 204  * arc_reg_clr - Applies mask to specified EMAC register - ("reg" & ~"mask").
 205  * @priv:       Pointer to ARC EMAC private data structure.
 206  * @reg:        Register offset from base address.
 207  * @mask:       Mask to apply to specified register.
 208  *
 209  * This function reads initial register value, then applies provided mask
 210  * to it and then writes register back.
 211  */
 212 static inline void arc_reg_clr(struct arc_emac_priv *priv, int reg, int mask)
 213 {
 214         unsigned int value = arc_reg_get(priv, reg);
 215
 216         arc_reg_set(priv, reg, value & ~mask);
 217 }
 218
 219 int arc_mdio_probe(struct arc_emac_priv *priv);
 220 int arc_mdio_remove(struct arc_emac_priv *priv);
 221 int arc_emac_probe(struct net_device *ndev, int interface);
 222 int arc_emac_remove(struct net_device *ndev);
 223
 224 #endif /* ARC_EMAC_H */