]> git.proxmox.com Git - mirror_ubuntu-eoan-kernel.git/blob - drivers/net/ethernet/broadcom/bcmsysport.c
projects / mirror_ubuntu-eoan-kernel.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
blame | history | raw | HEAD
Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net
[mirror_ubuntu-eoan-kernel.git] / drivers / net / ethernet / broadcom / bcmsysport.c
1 /*
2 * Broadcom BCM7xxx System Port Ethernet MAC driver
3 *
4 * Copyright (C) 2014 Broadcom Corporation
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
12
13 #include <linux/init.h>
14 #include <linux/interrupt.h>
15 #include <linux/module.h>
16 #include <linux/kernel.h>
17 #include <linux/netdevice.h>
18 #include <linux/etherdevice.h>
19 #include <linux/platform_device.h>
20 #include <linux/of.h>
21 #include <linux/of_net.h>
22 #include <linux/of_mdio.h>
23 #include <linux/phy.h>
24 #include <linux/phy_fixed.h>
25 #include <net/dsa.h>
26 #include <net/ip.h>
27 #include <net/ipv6.h>
28
29 #include "bcmsysport.h"
30
31 /* I/O accessors register helpers */
32 #define BCM_SYSPORT_IO_MACRO(name, offset) \
33 static inline u32 name##_readl(struct bcm_sysport_priv *priv, u32 off) \
34 { \
35 u32 reg = readl_relaxed(priv->base + offset + off); \
36 return reg; \
37 } \
38 static inline void name##_writel(struct bcm_sysport_priv *priv, \
39 u32 val, u32 off) \
40 { \
41 writel_relaxed(val, priv->base + offset + off); \
42 } \
43
44 BCM_SYSPORT_IO_MACRO(intrl2_0, SYS_PORT_INTRL2_0_OFFSET);
45 BCM_SYSPORT_IO_MACRO(intrl2_1, SYS_PORT_INTRL2_1_OFFSET);
46 BCM_SYSPORT_IO_MACRO(umac, SYS_PORT_UMAC_OFFSET);
47 BCM_SYSPORT_IO_MACRO(gib, SYS_PORT_GIB_OFFSET);
48 BCM_SYSPORT_IO_MACRO(tdma, SYS_PORT_TDMA_OFFSET);
49 BCM_SYSPORT_IO_MACRO(rxchk, SYS_PORT_RXCHK_OFFSET);
50 BCM_SYSPORT_IO_MACRO(txchk, SYS_PORT_TXCHK_OFFSET);
51 BCM_SYSPORT_IO_MACRO(rbuf, SYS_PORT_RBUF_OFFSET);
52 BCM_SYSPORT_IO_MACRO(tbuf, SYS_PORT_TBUF_OFFSET);
53 BCM_SYSPORT_IO_MACRO(topctrl, SYS_PORT_TOPCTRL_OFFSET);
54
55 /* On SYSTEMPORT Lite, any register after RDMA_STATUS has the exact
56 * same layout, except it has been moved by 4 bytes up, *sigh*
57 */
58 static inline u32 rdma_readl(struct bcm_sysport_priv *priv, u32 off)
59 {
60 if (priv->is_lite && off >= RDMA_STATUS)
61 off += 4;
62 return readl_relaxed(priv->base + SYS_PORT_RDMA_OFFSET + off);
63 }
64
65 static inline void rdma_writel(struct bcm_sysport_priv *priv, u32 val, u32 off)
66 {
67 if (priv->is_lite && off >= RDMA_STATUS)
68 off += 4;
69 writel_relaxed(val, priv->base + SYS_PORT_RDMA_OFFSET + off);
70 }
71
72 static inline u32 tdma_control_bit(struct bcm_sysport_priv *priv, u32 bit)
73 {
74 if (!priv->is_lite) {
75 return BIT(bit);
76 } else {
77 if (bit >= ACB_ALGO)
78 return BIT(bit + 1);
79 else
80 return BIT(bit);
81 }
82 }
83
84 /* L2-interrupt masking/unmasking helpers, does automatic saving of the applied
85 * mask in a software copy to avoid CPU_MASK_STATUS reads in hot-paths.
86 */
87 #define BCM_SYSPORT_INTR_L2(which) \
88 static inline void intrl2_##which##_mask_clear(struct bcm_sysport_priv *priv, \
89 u32 mask) \
90 { \
91 priv->irq##which##_mask &= ~(mask); \
92 intrl2_##which##_writel(priv, mask, INTRL2_CPU_MASK_CLEAR); \
93 } \
94 static inline void intrl2_##which##_mask_set(struct bcm_sysport_priv *priv, \
95 u32 mask) \
96 { \
97 intrl2_## which##_writel(priv, mask, INTRL2_CPU_MASK_SET); \
98 priv->irq##which##_mask |= (mask); \
99 } \
100
101 BCM_SYSPORT_INTR_L2(0)
102 BCM_SYSPORT_INTR_L2(1)
103
104 /* Register accesses to GISB/RBUS registers are expensive (few hundred
105 * nanoseconds), so keep the check for 64-bits explicit here to save
106 * one register write per-packet on 32-bits platforms.
107 */
108 static inline void dma_desc_set_addr(struct bcm_sysport_priv *priv,
109 void __iomem *d,
110 dma_addr_t addr)
111 {
112 #ifdef CONFIG_PHYS_ADDR_T_64BIT
113 writel_relaxed(upper_32_bits(addr) & DESC_ADDR_HI_MASK,
114 d + DESC_ADDR_HI_STATUS_LEN);
115 #endif
116 writel_relaxed(lower_32_bits(addr), d + DESC_ADDR_LO);
117 }
118
119 static inline void tdma_port_write_desc_addr(struct bcm_sysport_priv *priv,
120 struct dma_desc *desc,
121 unsigned int port)
122 {
123 /* Ports are latched, so write upper address first */
124 tdma_writel(priv, desc->addr_status_len, TDMA_WRITE_PORT_HI(port));
125 tdma_writel(priv, desc->addr_lo, TDMA_WRITE_PORT_LO(port));
126 }
127
128 /* Ethtool operations */
129 static int bcm_sysport_set_rx_csum(struct net_device *dev,
130 netdev_features_t wanted)
131 {
132 struct bcm_sysport_priv *priv = netdev_priv(dev);
133 u32 reg;
134
135 priv->rx_chk_en = !!(wanted & NETIF_F_RXCSUM);
136 reg = rxchk_readl(priv, RXCHK_CONTROL);
137 if (priv->rx_chk_en)
138 reg |= RXCHK_EN;
139 else
140 reg &= ~RXCHK_EN;
141
142 /* If UniMAC forwards CRC, we need to skip over it to get
143 * a valid CHK bit to be set in the per-packet status word
144 */
145 if (priv->rx_chk_en && priv->crc_fwd)
146 reg |= RXCHK_SKIP_FCS;
147 else
148 reg &= ~RXCHK_SKIP_FCS;
149
150 /* If Broadcom tags are enabled (e.g: using a switch), make
151 * sure we tell the RXCHK hardware to expect a 4-bytes Broadcom
152 * tag after the Ethernet MAC Source Address.
153 */
154 if (netdev_uses_dsa(dev))
155 reg |= RXCHK_BRCM_TAG_EN;
156 else
157 reg &= ~RXCHK_BRCM_TAG_EN;
158
159 rxchk_writel(priv, reg, RXCHK_CONTROL);
160
161 return 0;
162 }
163
164 static int bcm_sysport_set_tx_csum(struct net_device *dev,
165 netdev_features_t wanted)
166 {
167 struct bcm_sysport_priv *priv = netdev_priv(dev);
168 u32 reg;
169
170 /* Hardware transmit checksum requires us to enable the Transmit status
171 * block prepended to the packet contents
172 */
173 priv->tsb_en = !!(wanted & (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM));
174 reg = tdma_readl(priv, TDMA_CONTROL);
175 if (priv->tsb_en)
176 reg |= tdma_control_bit(priv, TSB_EN);
177 else
178 reg &= ~tdma_control_bit(priv, TSB_EN);
179 tdma_writel(priv, reg, TDMA_CONTROL);
180
181 return 0;
182 }
183
184 static int bcm_sysport_set_features(struct net_device *dev,
185 netdev_features_t features)
186 {
187 netdev_features_t changed = features ^ dev->features;
188 netdev_features_t wanted = dev->wanted_features;
189 int ret = 0;
190
191 if (changed & NETIF_F_RXCSUM)
192 ret = bcm_sysport_set_rx_csum(dev, wanted);
193 if (changed & (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM))
194 ret = bcm_sysport_set_tx_csum(dev, wanted);
195
196 return ret;
197 }
198
199 /* Hardware counters must be kept in sync because the order/offset
200 * is important here (order in structure declaration = order in hardware)
201 */
202 static const struct bcm_sysport_stats bcm_sysport_gstrings_stats[] = {
203 /* general stats */
204 STAT_NETDEV64(rx_packets),
205 STAT_NETDEV64(tx_packets),
206 STAT_NETDEV64(rx_bytes),
207 STAT_NETDEV64(tx_bytes),
208 STAT_NETDEV(rx_errors),
209 STAT_NETDEV(tx_errors),
210 STAT_NETDEV(rx_dropped),
211 STAT_NETDEV(tx_dropped),
212 STAT_NETDEV(multicast),
213 /* UniMAC RSV counters */
214 STAT_MIB_RX("rx_64_octets", mib.rx.pkt_cnt.cnt_64),
215 STAT_MIB_RX("rx_65_127_oct", mib.rx.pkt_cnt.cnt_127),
216 STAT_MIB_RX("rx_128_255_oct", mib.rx.pkt_cnt.cnt_255),
217 STAT_MIB_RX("rx_256_511_oct", mib.rx.pkt_cnt.cnt_511),
218 STAT_MIB_RX("rx_512_1023_oct", mib.rx.pkt_cnt.cnt_1023),
219 STAT_MIB_RX("rx_1024_1518_oct", mib.rx.pkt_cnt.cnt_1518),
220 STAT_MIB_RX("rx_vlan_1519_1522_oct", mib.rx.pkt_cnt.cnt_mgv),
221 STAT_MIB_RX("rx_1522_2047_oct", mib.rx.pkt_cnt.cnt_2047),
222 STAT_MIB_RX("rx_2048_4095_oct", mib.rx.pkt_cnt.cnt_4095),
223 STAT_MIB_RX("rx_4096_9216_oct", mib.rx.pkt_cnt.cnt_9216),
224 STAT_MIB_RX("rx_pkts", mib.rx.pkt),
225 STAT_MIB_RX("rx_bytes", mib.rx.bytes),
226 STAT_MIB_RX("rx_multicast", mib.rx.mca),
227 STAT_MIB_RX("rx_broadcast", mib.rx.bca),
228 STAT_MIB_RX("rx_fcs", mib.rx.fcs),
229 STAT_MIB_RX("rx_control", mib.rx.cf),
230 STAT_MIB_RX("rx_pause", mib.rx.pf),
231 STAT_MIB_RX("rx_unknown", mib.rx.uo),
232 STAT_MIB_RX("rx_align", mib.rx.aln),
233 STAT_MIB_RX("rx_outrange", mib.rx.flr),
234 STAT_MIB_RX("rx_code", mib.rx.cde),
235 STAT_MIB_RX("rx_carrier", mib.rx.fcr),
236 STAT_MIB_RX("rx_oversize", mib.rx.ovr),
237 STAT_MIB_RX("rx_jabber", mib.rx.jbr),
238 STAT_MIB_RX("rx_mtu_err", mib.rx.mtue),
239 STAT_MIB_RX("rx_good_pkts", mib.rx.pok),
240 STAT_MIB_RX("rx_unicast", mib.rx.uc),
241 STAT_MIB_RX("rx_ppp", mib.rx.ppp),
242 STAT_MIB_RX("rx_crc", mib.rx.rcrc),
243 /* UniMAC TSV counters */
244 STAT_MIB_TX("tx_64_octets", mib.tx.pkt_cnt.cnt_64),
245 STAT_MIB_TX("tx_65_127_oct", mib.tx.pkt_cnt.cnt_127),
246 STAT_MIB_TX("tx_128_255_oct", mib.tx.pkt_cnt.cnt_255),
247 STAT_MIB_TX("tx_256_511_oct", mib.tx.pkt_cnt.cnt_511),
248 STAT_MIB_TX("tx_512_1023_oct", mib.tx.pkt_cnt.cnt_1023),
249 STAT_MIB_TX("tx_1024_1518_oct", mib.tx.pkt_cnt.cnt_1518),
250 STAT_MIB_TX("tx_vlan_1519_1522_oct", mib.tx.pkt_cnt.cnt_mgv),
251 STAT_MIB_TX("tx_1522_2047_oct", mib.tx.pkt_cnt.cnt_2047),
252 STAT_MIB_TX("tx_2048_4095_oct", mib.tx.pkt_cnt.cnt_4095),
253 STAT_MIB_TX("tx_4096_9216_oct", mib.tx.pkt_cnt.cnt_9216),
254 STAT_MIB_TX("tx_pkts", mib.tx.pkts),
255 STAT_MIB_TX("tx_multicast", mib.tx.mca),
256 STAT_MIB_TX("tx_broadcast", mib.tx.bca),
257 STAT_MIB_TX("tx_pause", mib.tx.pf),
258 STAT_MIB_TX("tx_control", mib.tx.cf),
259 STAT_MIB_TX("tx_fcs_err", mib.tx.fcs),
260 STAT_MIB_TX("tx_oversize", mib.tx.ovr),
261 STAT_MIB_TX("tx_defer", mib.tx.drf),
262 STAT_MIB_TX("tx_excess_defer", mib.tx.edf),
263 STAT_MIB_TX("tx_single_col", mib.tx.scl),
264 STAT_MIB_TX("tx_multi_col", mib.tx.mcl),
265 STAT_MIB_TX("tx_late_col", mib.tx.lcl),
266 STAT_MIB_TX("tx_excess_col", mib.tx.ecl),
267 STAT_MIB_TX("tx_frags", mib.tx.frg),
268 STAT_MIB_TX("tx_total_col", mib.tx.ncl),
269 STAT_MIB_TX("tx_jabber", mib.tx.jbr),
270 STAT_MIB_TX("tx_bytes", mib.tx.bytes),
271 STAT_MIB_TX("tx_good_pkts", mib.tx.pok),
272 STAT_MIB_TX("tx_unicast", mib.tx.uc),
273 /* UniMAC RUNT counters */
274 STAT_RUNT("rx_runt_pkts", mib.rx_runt_cnt),
275 STAT_RUNT("rx_runt_valid_fcs", mib.rx_runt_fcs),
276 STAT_RUNT("rx_runt_inval_fcs_align", mib.rx_runt_fcs_align),
277 STAT_RUNT("rx_runt_bytes", mib.rx_runt_bytes),
278 /* RXCHK misc statistics */
279 STAT_RXCHK("rxchk_bad_csum", mib.rxchk_bad_csum, RXCHK_BAD_CSUM_CNTR),
280 STAT_RXCHK("rxchk_other_pkt_disc", mib.rxchk_other_pkt_disc,
281 RXCHK_OTHER_DISC_CNTR),
282 /* RBUF misc statistics */
283 STAT_RBUF("rbuf_ovflow_cnt", mib.rbuf_ovflow_cnt, RBUF_OVFL_DISC_CNTR),
284 STAT_RBUF("rbuf_err_cnt", mib.rbuf_err_cnt, RBUF_ERR_PKT_CNTR),
285 STAT_MIB_SOFT("alloc_rx_buff_failed", mib.alloc_rx_buff_failed),
286 STAT_MIB_SOFT("rx_dma_failed", mib.rx_dma_failed),
287 STAT_MIB_SOFT("tx_dma_failed", mib.tx_dma_failed),
288 /* Per TX-queue statistics are dynamically appended */
289 };
290
291 #define BCM_SYSPORT_STATS_LEN ARRAY_SIZE(bcm_sysport_gstrings_stats)
292
293 static void bcm_sysport_get_drvinfo(struct net_device *dev,
294 struct ethtool_drvinfo *info)
295 {
296 strlcpy(info->driver, KBUILD_MODNAME, sizeof(info->driver));
297 strlcpy(info->version, "0.1", sizeof(info->version));
298 strlcpy(info->bus_info, "platform", sizeof(info->bus_info));
299 }
300
301 static u32 bcm_sysport_get_msglvl(struct net_device *dev)
302 {
303 struct bcm_sysport_priv *priv = netdev_priv(dev);
304
305 return priv->msg_enable;
306 }
307
308 static void bcm_sysport_set_msglvl(struct net_device *dev, u32 enable)
309 {
310 struct bcm_sysport_priv *priv = netdev_priv(dev);
311
312 priv->msg_enable = enable;
313 }
314
315 static inline bool bcm_sysport_lite_stat_valid(enum bcm_sysport_stat_type type)
316 {
317 switch (type) {
318 case BCM_SYSPORT_STAT_NETDEV:
319 case BCM_SYSPORT_STAT_NETDEV64:
320 case BCM_SYSPORT_STAT_RXCHK:
321 case BCM_SYSPORT_STAT_RBUF:
322 case BCM_SYSPORT_STAT_SOFT:
323 return true;
324 default:
325 return false;
326 }
327 }
328
329 static int bcm_sysport_get_sset_count(struct net_device *dev, int string_set)
330 {
331 struct bcm_sysport_priv *priv = netdev_priv(dev);
332 const struct bcm_sysport_stats *s;
333 unsigned int i, j;
334
335 switch (string_set) {
336 case ETH_SS_STATS:
337 for (i = 0, j = 0; i < BCM_SYSPORT_STATS_LEN; i++) {
338 s = &bcm_sysport_gstrings_stats[i];
339 if (priv->is_lite &&
340 !bcm_sysport_lite_stat_valid(s->type))
341 continue;
342 j++;
343 }
344 /* Include per-queue statistics */
345 return j + dev->num_tx_queues * NUM_SYSPORT_TXQ_STAT;
346 default:
347 return -EOPNOTSUPP;
348 }
349 }
350
351 static void bcm_sysport_get_strings(struct net_device *dev,
352 u32 stringset, u8 *data)
353 {
354 struct bcm_sysport_priv *priv = netdev_priv(dev);
355 const struct bcm_sysport_stats *s;
356 char buf[128];
357 int i, j;
358
359 switch (stringset) {
360 case ETH_SS_STATS:
361 for (i = 0, j = 0; i < BCM_SYSPORT_STATS_LEN; i++) {
362 s = &bcm_sysport_gstrings_stats[i];
363 if (priv->is_lite &&
364 !bcm_sysport_lite_stat_valid(s->type))
365 continue;
366
367 memcpy(data + j * ETH_GSTRING_LEN, s->stat_string,
368 ETH_GSTRING_LEN);
369 j++;
370 }
371
372 for (i = 0; i < dev->num_tx_queues; i++) {
373 snprintf(buf, sizeof(buf), "txq%d_packets", i);
374 memcpy(data + j * ETH_GSTRING_LEN, buf,
375 ETH_GSTRING_LEN);
376 j++;
377
378 snprintf(buf, sizeof(buf), "txq%d_bytes", i);
379 memcpy(data + j * ETH_GSTRING_LEN, buf,
380 ETH_GSTRING_LEN);
381 j++;
382 }
383 break;
384 default:
385 break;
386 }
387 }
388
389 static void bcm_sysport_update_mib_counters(struct bcm_sysport_priv *priv)
390 {
391 int i, j = 0;
392
393 for (i = 0; i < BCM_SYSPORT_STATS_LEN; i++) {
394 const struct bcm_sysport_stats *s;
395 u8 offset = 0;
396 u32 val = 0;
397 char *p;
398
399 s = &bcm_sysport_gstrings_stats[i];
400 switch (s->type) {
401 case BCM_SYSPORT_STAT_NETDEV:
402 case BCM_SYSPORT_STAT_NETDEV64:
403 case BCM_SYSPORT_STAT_SOFT:
404 continue;
405 case BCM_SYSPORT_STAT_MIB_RX:
406 case BCM_SYSPORT_STAT_MIB_TX:
407 case BCM_SYSPORT_STAT_RUNT:
408 if (priv->is_lite)
409 continue;
410
411 if (s->type != BCM_SYSPORT_STAT_MIB_RX)
412 offset = UMAC_MIB_STAT_OFFSET;
413 val = umac_readl(priv, UMAC_MIB_START + j + offset);
414 break;
415 case BCM_SYSPORT_STAT_RXCHK:
416 val = rxchk_readl(priv, s->reg_offset);
417 if (val == ~0)
418 rxchk_writel(priv, 0, s->reg_offset);
419 break;
420 case BCM_SYSPORT_STAT_RBUF:
421 val = rbuf_readl(priv, s->reg_offset);
422 if (val == ~0)
423 rbuf_writel(priv, 0, s->reg_offset);
424 break;
425 }
426
427 j += s->stat_sizeof;
428 p = (char *)priv + s->stat_offset;
429 *(u32 *)p = val;
430 }
431
432 netif_dbg(priv, hw, priv->netdev, "updated MIB counters\n");
433 }
434
435 static void bcm_sysport_update_tx_stats(struct bcm_sysport_priv *priv,
436 u64 *tx_bytes, u64 *tx_packets)
437 {
438 struct bcm_sysport_tx_ring *ring;
439 u64 bytes = 0, packets = 0;
440 unsigned int start;
441 unsigned int q;
442
443 for (q = 0; q < priv->netdev->num_tx_queues; q++) {
444 ring = &priv->tx_rings[q];
445 do {
446 start = u64_stats_fetch_begin_irq(&priv->syncp);
447 bytes = ring->bytes;
448 packets = ring->packets;
449 } while (u64_stats_fetch_retry_irq(&priv->syncp, start));
450
451 *tx_bytes += bytes;
452 *tx_packets += packets;
453 }
454 }
455
456 static void bcm_sysport_get_stats(struct net_device *dev,
457 struct ethtool_stats *stats, u64 *data)
458 {
459 struct bcm_sysport_priv *priv = netdev_priv(dev);
460 struct bcm_sysport_stats64 *stats64 = &priv->stats64;
461 struct u64_stats_sync *syncp = &priv->syncp;
462 struct bcm_sysport_tx_ring *ring;
463 u64 tx_bytes = 0, tx_packets = 0;
464 unsigned int start;
465 int i, j;
466
467 if (netif_running(dev)) {
468 bcm_sysport_update_mib_counters(priv);
469 bcm_sysport_update_tx_stats(priv, &tx_bytes, &tx_packets);
470 stats64->tx_bytes = tx_bytes;
471 stats64->tx_packets = tx_packets;
472 }
473
474 for (i = 0, j = 0; i < BCM_SYSPORT_STATS_LEN; i++) {
475 const struct bcm_sysport_stats *s;
476 char *p;
477
478 s = &bcm_sysport_gstrings_stats[i];
479 if (s->type == BCM_SYSPORT_STAT_NETDEV)
480 p = (char *)&dev->stats;
481 else if (s->type == BCM_SYSPORT_STAT_NETDEV64)
482 p = (char *)stats64;
483 else
484 p = (char *)priv;
485
486 if (priv->is_lite && !bcm_sysport_lite_stat_valid(s->type))
487 continue;
488 p += s->stat_offset;
489
490 if (s->stat_sizeof == sizeof(u64) &&
491 s->type == BCM_SYSPORT_STAT_NETDEV64) {
492 do {
493 start = u64_stats_fetch_begin_irq(syncp);
494 data[i] = *(u64 *)p;
495 } while (u64_stats_fetch_retry_irq(syncp, start));
496 } else
497 data[i] = *(u32 *)p;
498 j++;
499 }
500
501 /* For SYSTEMPORT Lite since we have holes in our statistics, j would
502 * be equal to BCM_SYSPORT_STATS_LEN at the end of the loop, but it
503 * needs to point to how many total statistics we have minus the
504 * number of per TX queue statistics
505 */
506 j = bcm_sysport_get_sset_count(dev, ETH_SS_STATS) -
507 dev->num_tx_queues * NUM_SYSPORT_TXQ_STAT;
508
509 for (i = 0; i < dev->num_tx_queues; i++) {
510 ring = &priv->tx_rings[i];
511 data[j] = ring->packets;
512 j++;
513 data[j] = ring->bytes;
514 j++;
515 }
516 }
517
518 static void bcm_sysport_get_wol(struct net_device *dev,
519 struct ethtool_wolinfo *wol)
520 {
521 struct bcm_sysport_priv *priv = netdev_priv(dev);
522 u32 reg;
523
524 wol->supported = WAKE_MAGIC | WAKE_MAGICSECURE;
525 wol->wolopts = priv->wolopts;
526
527 if (!(priv->wolopts & WAKE_MAGICSECURE))
528 return;
529
530 /* Return the programmed SecureOn password */
531 reg = umac_readl(priv, UMAC_PSW_MS);
532 put_unaligned_be16(reg, &wol->sopass[0]);
533 reg = umac_readl(priv, UMAC_PSW_LS);
534 put_unaligned_be32(reg, &wol->sopass[2]);
535 }
536
537 static int bcm_sysport_set_wol(struct net_device *dev,
538 struct ethtool_wolinfo *wol)
539 {
540 struct bcm_sysport_priv *priv = netdev_priv(dev);
541 struct device *kdev = &priv->pdev->dev;
542 u32 supported = WAKE_MAGIC | WAKE_MAGICSECURE;
543
544 if (!device_can_wakeup(kdev))
545 return -ENOTSUPP;
546
547 if (wol->wolopts & ~supported)
548 return -EINVAL;
549
550 /* Program the SecureOn password */
551 if (wol->wolopts & WAKE_MAGICSECURE) {
552 umac_writel(priv, get_unaligned_be16(&wol->sopass[0]),
553 UMAC_PSW_MS);
554 umac_writel(priv, get_unaligned_be32(&wol->sopass[2]),
555 UMAC_PSW_LS);
556 }
557
558 /* Flag the device and relevant IRQ as wakeup capable */
559 if (wol->wolopts) {
560 device_set_wakeup_enable(kdev, 1);
561 if (priv->wol_irq_disabled)
562 enable_irq_wake(priv->wol_irq);
563 priv->wol_irq_disabled = 0;
564 } else {
565 device_set_wakeup_enable(kdev, 0);
566 /* Avoid unbalanced disable_irq_wake calls */
567 if (!priv->wol_irq_disabled)
568 disable_irq_wake(priv->wol_irq);
569 priv->wol_irq_disabled = 1;
570 }
571
572 priv->wolopts = wol->wolopts;
573
574 return 0;
575 }
576
577 static int bcm_sysport_get_coalesce(struct net_device *dev,
578 struct ethtool_coalesce *ec)
579 {
580 struct bcm_sysport_priv *priv = netdev_priv(dev);
581 u32 reg;
582
583 reg = tdma_readl(priv, TDMA_DESC_RING_INTR_CONTROL(0));
584
585 ec->tx_coalesce_usecs = (reg >> RING_TIMEOUT_SHIFT) * 8192 / 1000;
586 ec->tx_max_coalesced_frames = reg & RING_INTR_THRESH_MASK;
587
588 reg = rdma_readl(priv, RDMA_MBDONE_INTR);
589
590 ec->rx_coalesce_usecs = (reg >> RDMA_TIMEOUT_SHIFT) * 8192 / 1000;
591 ec->rx_max_coalesced_frames = reg & RDMA_INTR_THRESH_MASK;
592
593 return 0;
594 }
595
596 static int bcm_sysport_set_coalesce(struct net_device *dev,
597 struct ethtool_coalesce *ec)
598 {
599 struct bcm_sysport_priv *priv = netdev_priv(dev);
600 unsigned int i;
601 u32 reg;
602
603 /* Base system clock is 125Mhz, DMA timeout is this reference clock
604 * divided by 1024, which yield roughly 8.192 us, our maximum value has
605 * to fit in the RING_TIMEOUT_MASK (16 bits).
606 */
607 if (ec->tx_max_coalesced_frames > RING_INTR_THRESH_MASK ||
608 ec->tx_coalesce_usecs > (RING_TIMEOUT_MASK * 8) + 1 ||
609 ec->rx_max_coalesced_frames > RDMA_INTR_THRESH_MASK ||
610 ec->rx_coalesce_usecs > (RDMA_TIMEOUT_MASK * 8) + 1)
611 return -EINVAL;
612
613 if ((ec->tx_coalesce_usecs == 0 && ec->tx_max_coalesced_frames == 0) ||
614 (ec->rx_coalesce_usecs == 0 && ec->rx_max_coalesced_frames == 0))
615 return -EINVAL;
616
617 for (i = 0; i < dev->num_tx_queues; i++) {
618 reg = tdma_readl(priv, TDMA_DESC_RING_INTR_CONTROL(i));
619 reg &= ~(RING_INTR_THRESH_MASK |
620 RING_TIMEOUT_MASK << RING_TIMEOUT_SHIFT);
621 reg |= ec->tx_max_coalesced_frames;
622 reg |= DIV_ROUND_UP(ec->tx_coalesce_usecs * 1000, 8192) <<
623 RING_TIMEOUT_SHIFT;
624 tdma_writel(priv, reg, TDMA_DESC_RING_INTR_CONTROL(i));
625 }
626
627 reg = rdma_readl(priv, RDMA_MBDONE_INTR);
628 reg &= ~(RDMA_INTR_THRESH_MASK |
629 RDMA_TIMEOUT_MASK << RDMA_TIMEOUT_SHIFT);
630 reg |= ec->rx_max_coalesced_frames;
631 reg |= DIV_ROUND_UP(ec->rx_coalesce_usecs * 1000, 8192) <<
632 RDMA_TIMEOUT_SHIFT;
633 rdma_writel(priv, reg, RDMA_MBDONE_INTR);
634
635 return 0;
636 }
637
638 static void bcm_sysport_free_cb(struct bcm_sysport_cb *cb)
639 {
640 dev_consume_skb_any(cb->skb);
641 cb->skb = NULL;
642 dma_unmap_addr_set(cb, dma_addr, 0);
643 }
644
645 static struct sk_buff *bcm_sysport_rx_refill(struct bcm_sysport_priv *priv,
646 struct bcm_sysport_cb *cb)
647 {
648 struct device *kdev = &priv->pdev->dev;
649 struct net_device *ndev = priv->netdev;
650 struct sk_buff *skb, *rx_skb;
651 dma_addr_t mapping;
652
653 /* Allocate a new SKB for a new packet */
654 skb = netdev_alloc_skb(priv->netdev, RX_BUF_LENGTH);
655 if (!skb) {
656 priv->mib.alloc_rx_buff_failed++;
657 netif_err(priv, rx_err, ndev, "SKB alloc failed\n");
658 return NULL;
659 }
660
661 mapping = dma_map_single(kdev, skb->data,
662 RX_BUF_LENGTH, DMA_FROM_DEVICE);
663 if (dma_mapping_error(kdev, mapping)) {
664 priv->mib.rx_dma_failed++;
665 dev_kfree_skb_any(skb);
666 netif_err(priv, rx_err, ndev, "DMA mapping failure\n");
667 return NULL;
668 }
669
670 /* Grab the current SKB on the ring */
671 rx_skb = cb->skb;
672 if (likely(rx_skb))
673 dma_unmap_single(kdev, dma_unmap_addr(cb, dma_addr),
674 RX_BUF_LENGTH, DMA_FROM_DEVICE);
675
676 /* Put the new SKB on the ring */
677 cb->skb = skb;
678 dma_unmap_addr_set(cb, dma_addr, mapping);
679 dma_desc_set_addr(priv, cb->bd_addr, mapping);
680
681 netif_dbg(priv, rx_status, ndev, "RX refill\n");
682
683 /* Return the current SKB to the caller */
684 return rx_skb;
685 }
686
687 static int bcm_sysport_alloc_rx_bufs(struct bcm_sysport_priv *priv)
688 {
689 struct bcm_sysport_cb *cb;
690 struct sk_buff *skb;
691 unsigned int i;
692
693 for (i = 0; i < priv->num_rx_bds; i++) {
694 cb = &priv->rx_cbs[i];
695 skb = bcm_sysport_rx_refill(priv, cb);
696 if (skb)
697 dev_kfree_skb(skb);
698 if (!cb->skb)
699 return -ENOMEM;
700 }
701
702 return 0;
703 }
704
705 /* Poll the hardware for up to budget packets to process */
706 static unsigned int bcm_sysport_desc_rx(struct bcm_sysport_priv *priv,
707 unsigned int budget)
708 {
709 struct bcm_sysport_stats64 *stats64 = &priv->stats64;
710 struct net_device *ndev = priv->netdev;
711 unsigned int processed = 0, to_process;
712 struct bcm_sysport_cb *cb;
713 struct sk_buff *skb;
714 unsigned int p_index;
715 u16 len, status;
716 struct bcm_rsb *rsb;
717
718 /* Clear status before servicing to reduce spurious interrupts */
719 intrl2_0_writel(priv, INTRL2_0_RDMA_MBDONE, INTRL2_CPU_CLEAR);
720
721 /* Determine how much we should process since last call, SYSTEMPORT Lite
722 * groups the producer and consumer indexes into the same 32-bit
723 * which we access using RDMA_CONS_INDEX
724 */
725 if (!priv->is_lite)
726 p_index = rdma_readl(priv, RDMA_PROD_INDEX);
727 else
728 p_index = rdma_readl(priv, RDMA_CONS_INDEX);
729 p_index &= RDMA_PROD_INDEX_MASK;
730
731 to_process = (p_index - priv->rx_c_index) & RDMA_CONS_INDEX_MASK;
732
733 netif_dbg(priv, rx_status, ndev,
734 "p_index=%d rx_c_index=%d to_process=%d\n",
735 p_index, priv->rx_c_index, to_process);
736
737 while ((processed < to_process) && (processed < budget)) {
738 cb = &priv->rx_cbs[priv->rx_read_ptr];
739 skb = bcm_sysport_rx_refill(priv, cb);
740
741
742 /* We do not have a backing SKB, so we do not a corresponding
743 * DMA mapping for this incoming packet since
744 * bcm_sysport_rx_refill always either has both skb and mapping
745 * or none.
746 */
747 if (unlikely(!skb)) {
748 netif_err(priv, rx_err, ndev, "out of memory!\n");
749 ndev->stats.rx_dropped++;
750 ndev->stats.rx_errors++;
751 goto next;
752 }
753
754 /* Extract the Receive Status Block prepended */
755 rsb = (struct bcm_rsb *)skb->data;
756 len = (rsb->rx_status_len >> DESC_LEN_SHIFT) & DESC_LEN_MASK;
757 status = (rsb->rx_status_len >> DESC_STATUS_SHIFT) &
758 DESC_STATUS_MASK;
759
760 netif_dbg(priv, rx_status, ndev,
761 "p=%d, c=%d, rd_ptr=%d, len=%d, flag=0x%04x\n",
762 p_index, priv->rx_c_index, priv->rx_read_ptr,
763 len, status);
764
765 if (unlikely(len > RX_BUF_LENGTH)) {
766 netif_err(priv, rx_status, ndev, "oversized packet\n");
767 ndev->stats.rx_length_errors++;
768 ndev->stats.rx_errors++;
769 dev_kfree_skb_any(skb);
770 goto next;
771 }
772
773 if (unlikely(!(status & DESC_EOP) || !(status & DESC_SOP))) {
774 netif_err(priv, rx_status, ndev, "fragmented packet!\n");
775 ndev->stats.rx_dropped++;
776 ndev->stats.rx_errors++;
777 dev_kfree_skb_any(skb);
778 goto next;
779 }
780
781 if (unlikely(status & (RX_STATUS_ERR | RX_STATUS_OVFLOW))) {
782 netif_err(priv, rx_err, ndev, "error packet\n");
783 if (status & RX_STATUS_OVFLOW)
784 ndev->stats.rx_over_errors++;
785 ndev->stats.rx_dropped++;
786 ndev->stats.rx_errors++;
787 dev_kfree_skb_any(skb);
788 goto next;
789 }
790
791 skb_put(skb, len);
792
793 /* Hardware validated our checksum */
794 if (likely(status & DESC_L4_CSUM))
795 skb->ip_summed = CHECKSUM_UNNECESSARY;
796
797 /* Hardware pre-pends packets with 2bytes before Ethernet
798 * header plus we have the Receive Status Block, strip off all
799 * of this from the SKB.
800 */
801 skb_pull(skb, sizeof(*rsb) + 2);
802 len -= (sizeof(*rsb) + 2);
803
804 /* UniMAC may forward CRC */
805 if (priv->crc_fwd) {
806 skb_trim(skb, len - ETH_FCS_LEN);
807 len -= ETH_FCS_LEN;
808 }
809
810 skb->protocol = eth_type_trans(skb, ndev);
811 ndev->stats.rx_packets++;
812 ndev->stats.rx_bytes += len;
813 u64_stats_update_begin(&priv->syncp);
814 stats64->rx_packets++;
815 stats64->rx_bytes += len;
816 u64_stats_update_end(&priv->syncp);
817
818 napi_gro_receive(&priv->napi, skb);
819 next:
820 processed++;
821 priv->rx_read_ptr++;
822
823 if (priv->rx_read_ptr == priv->num_rx_bds)
824 priv->rx_read_ptr = 0;
825 }
826
827 return processed;
828 }
829
830 static void bcm_sysport_tx_reclaim_one(struct bcm_sysport_tx_ring *ring,
831 struct bcm_sysport_cb *cb,
832 unsigned int *bytes_compl,
833 unsigned int *pkts_compl)
834 {
835 struct bcm_sysport_priv *priv = ring->priv;
836 struct device *kdev = &priv->pdev->dev;
837
838 if (cb->skb) {
839 *bytes_compl += cb->skb->len;
840 dma_unmap_single(kdev, dma_unmap_addr(cb, dma_addr),
841 dma_unmap_len(cb, dma_len),
842 DMA_TO_DEVICE);
843 (*pkts_compl)++;
844 bcm_sysport_free_cb(cb);
845 /* SKB fragment */
846 } else if (dma_unmap_addr(cb, dma_addr)) {
847 *bytes_compl += dma_unmap_len(cb, dma_len);
848 dma_unmap_page(kdev, dma_unmap_addr(cb, dma_addr),
849 dma_unmap_len(cb, dma_len), DMA_TO_DEVICE);
850 dma_unmap_addr_set(cb, dma_addr, 0);
851 }
852 }
853
854 /* Reclaim queued SKBs for transmission completion, lockless version */
855 static unsigned int __bcm_sysport_tx_reclaim(struct bcm_sysport_priv *priv,
856 struct bcm_sysport_tx_ring *ring)
857 {
858 unsigned int pkts_compl = 0, bytes_compl = 0;
859 struct net_device *ndev = priv->netdev;
860 unsigned int txbds_processed = 0;
861 struct bcm_sysport_cb *cb;
862 unsigned int txbds_ready;
863 unsigned int c_index;
864 u32 hw_ind;
865
866 /* Clear status before servicing to reduce spurious interrupts */
867 if (!ring->priv->is_lite)
868 intrl2_1_writel(ring->priv, BIT(ring->index), INTRL2_CPU_CLEAR);
869 else
870 intrl2_0_writel(ring->priv, BIT(ring->index +
871 INTRL2_0_TDMA_MBDONE_SHIFT), INTRL2_CPU_CLEAR);
872
873 /* Compute how many descriptors have been processed since last call */
874 hw_ind = tdma_readl(priv, TDMA_DESC_RING_PROD_CONS_INDEX(ring->index));
875 c_index = (hw_ind >> RING_CONS_INDEX_SHIFT) & RING_CONS_INDEX_MASK;
876 txbds_ready = (c_index - ring->c_index) & RING_CONS_INDEX_MASK;
877
878 netif_dbg(priv, tx_done, ndev,
879 "ring=%d old_c_index=%u c_index=%u txbds_ready=%u\n",
880 ring->index, ring->c_index, c_index, txbds_ready);
881
882 while (txbds_processed < txbds_ready) {
883 cb = &ring->cbs[ring->clean_index];
884 bcm_sysport_tx_reclaim_one(ring, cb, &bytes_compl, &pkts_compl);
885
886 ring->desc_count++;
887 txbds_processed++;
888
889 if (likely(ring->clean_index < ring->size - 1))
890 ring->clean_index++;
891 else
892 ring->clean_index = 0;
893 }
894
895 u64_stats_update_begin(&priv->syncp);
896 ring->packets += pkts_compl;
897 ring->bytes += bytes_compl;
898 u64_stats_update_end(&priv->syncp);
899
900 ring->c_index = c_index;
901
902 netif_dbg(priv, tx_done, ndev,
903 "ring=%d c_index=%d pkts_compl=%d, bytes_compl=%d\n",
904 ring->index, ring->c_index, pkts_compl, bytes_compl);
905
906 return pkts_compl;
907 }
908
909 /* Locked version of the per-ring TX reclaim routine */
910 static unsigned int bcm_sysport_tx_reclaim(struct bcm_sysport_priv *priv,
911 struct bcm_sysport_tx_ring *ring)
912 {
913 struct netdev_queue *txq;
914 unsigned int released;
915 unsigned long flags;
916
917 txq = netdev_get_tx_queue(priv->netdev, ring->index);
918
919 spin_lock_irqsave(&ring->lock, flags);
920 released = __bcm_sysport_tx_reclaim(priv, ring);
921 if (released)
922 netif_tx_wake_queue(txq);
923
924 spin_unlock_irqrestore(&ring->lock, flags);
925
926 return released;
927 }
928
929 /* Locked version of the per-ring TX reclaim, but does not wake the queue */
930 static void bcm_sysport_tx_clean(struct bcm_sysport_priv *priv,
931 struct bcm_sysport_tx_ring *ring)
932 {
933 unsigned long flags;
934
935 spin_lock_irqsave(&ring->lock, flags);
936 __bcm_sysport_tx_reclaim(priv, ring);
937 spin_unlock_irqrestore(&ring->lock, flags);
938 }
939
940 static int bcm_sysport_tx_poll(struct napi_struct *napi, int budget)
941 {
942 struct bcm_sysport_tx_ring *ring =
943 container_of(napi, struct bcm_sysport_tx_ring, napi);
944 unsigned int work_done = 0;
945
946 work_done = bcm_sysport_tx_reclaim(ring->priv, ring);
947
948 if (work_done == 0) {
949 napi_complete(napi);
950 /* re-enable TX interrupt */
951 if (!ring->priv->is_lite)
952 intrl2_1_mask_clear(ring->priv, BIT(ring->index));
953 else
954 intrl2_0_mask_clear(ring->priv, BIT(ring->index +
955 INTRL2_0_TDMA_MBDONE_SHIFT));
956
957 return 0;
958 }
959
960 return budget;
961 }
962
963 static void bcm_sysport_tx_reclaim_all(struct bcm_sysport_priv *priv)
964 {
965 unsigned int q;
966
967 for (q = 0; q < priv->netdev->num_tx_queues; q++)
968 bcm_sysport_tx_reclaim(priv, &priv->tx_rings[q]);
969 }
970
971 static int bcm_sysport_poll(struct napi_struct *napi, int budget)
972 {
973 struct bcm_sysport_priv *priv =
974 container_of(napi, struct bcm_sysport_priv, napi);
975 unsigned int work_done = 0;
976
977 work_done = bcm_sysport_desc_rx(priv, budget);
978
979 priv->rx_c_index += work_done;
980 priv->rx_c_index &= RDMA_CONS_INDEX_MASK;
981
982 /* SYSTEMPORT Lite groups the producer/consumer index, producer is
983 * maintained by HW, but writes to it will be ignore while RDMA
984 * is active
985 */
986 if (!priv->is_lite)
987 rdma_writel(priv, priv->rx_c_index, RDMA_CONS_INDEX);
988 else
989 rdma_writel(priv, priv->rx_c_index << 16, RDMA_CONS_INDEX);
990
991 if (work_done < budget) {
992 napi_complete_done(napi, work_done);
993 /* re-enable RX interrupts */
994 intrl2_0_mask_clear(priv, INTRL2_0_RDMA_MBDONE);
995 }
996
997 return work_done;
998 }
999
1000 static void bcm_sysport_resume_from_wol(struct bcm_sysport_priv *priv)
1001 {
1002 u32 reg;
1003
1004 /* Stop monitoring MPD interrupt */
1005 intrl2_0_mask_set(priv, INTRL2_0_MPD);
1006
1007 /* Clear the MagicPacket detection logic */
1008 reg = umac_readl(priv, UMAC_MPD_CTRL);
1009 reg &= ~MPD_EN;
1010 umac_writel(priv, reg, UMAC_MPD_CTRL);
1011
1012 netif_dbg(priv, wol, priv->netdev, "resumed from WOL\n");
1013 }
1014
1015 /* RX and misc interrupt routine */
1016 static irqreturn_t bcm_sysport_rx_isr(int irq, void *dev_id)
1017 {
1018 struct net_device *dev = dev_id;
1019 struct bcm_sysport_priv *priv = netdev_priv(dev);
1020 struct bcm_sysport_tx_ring *txr;
1021 unsigned int ring, ring_bit;
1022
1023 priv->irq0_stat = intrl2_0_readl(priv, INTRL2_CPU_STATUS) &
1024 ~intrl2_0_readl(priv, INTRL2_CPU_MASK_STATUS);
1025 intrl2_0_writel(priv, priv->irq0_stat, INTRL2_CPU_CLEAR);
1026
1027 if (unlikely(priv->irq0_stat == 0)) {
1028 netdev_warn(priv->netdev, "spurious RX interrupt\n");
1029 return IRQ_NONE;
1030 }
1031
1032 if (priv->irq0_stat & INTRL2_0_RDMA_MBDONE) {
1033 if (likely(napi_schedule_prep(&priv->napi))) {
1034 /* disable RX interrupts */
1035 intrl2_0_mask_set(priv, INTRL2_0_RDMA_MBDONE);
1036 __napi_schedule_irqoff(&priv->napi);
1037 }
1038 }
1039
1040 /* TX ring is full, perform a full reclaim since we do not know
1041 * which one would trigger this interrupt
1042 */
1043 if (priv->irq0_stat & INTRL2_0_TX_RING_FULL)
1044 bcm_sysport_tx_reclaim_all(priv);
1045
1046 if (priv->irq0_stat & INTRL2_0_MPD) {
1047 netdev_info(priv->netdev, "Wake-on-LAN interrupt!\n");
1048 bcm_sysport_resume_from_wol(priv);
1049 }
1050
1051 if (!priv->is_lite)
1052 goto out;
1053
1054 for (ring = 0; ring < dev->num_tx_queues; ring++) {
1055 ring_bit = BIT(ring + INTRL2_0_TDMA_MBDONE_SHIFT);
1056 if (!(priv->irq0_stat & ring_bit))
1057 continue;
1058
1059 txr = &priv->tx_rings[ring];
1060
1061 if (likely(napi_schedule_prep(&txr->napi))) {
1062 intrl2_0_mask_set(priv, ring_bit);
1063 __napi_schedule(&txr->napi);
1064 }
1065 }
1066 out:
1067 return IRQ_HANDLED;
1068 }
1069
1070 /* TX interrupt service routine */
1071 static irqreturn_t bcm_sysport_tx_isr(int irq, void *dev_id)
1072 {
1073 struct net_device *dev = dev_id;
1074 struct bcm_sysport_priv *priv = netdev_priv(dev);
1075 struct bcm_sysport_tx_ring *txr;
1076 unsigned int ring;
1077
1078 priv->irq1_stat = intrl2_1_readl(priv, INTRL2_CPU_STATUS) &
1079 ~intrl2_1_readl(priv, INTRL2_CPU_MASK_STATUS);
1080 intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
1081
1082 if (unlikely(priv->irq1_stat == 0)) {
1083 netdev_warn(priv->netdev, "spurious TX interrupt\n");
1084 return IRQ_NONE;
1085 }
1086
1087 for (ring = 0; ring < dev->num_tx_queues; ring++) {
1088 if (!(priv->irq1_stat & BIT(ring)))
1089 continue;
1090
1091 txr = &priv->tx_rings[ring];
1092
1093 if (likely(napi_schedule_prep(&txr->napi))) {
1094 intrl2_1_mask_set(priv, BIT(ring));
1095 __napi_schedule_irqoff(&txr->napi);
1096 }
1097 }
1098
1099 return IRQ_HANDLED;
1100 }
1101
1102 static irqreturn_t bcm_sysport_wol_isr(int irq, void *dev_id)
1103 {
1104 struct bcm_sysport_priv *priv = dev_id;
1105
1106 pm_wakeup_event(&priv->pdev->dev, 0);
1107
1108 return IRQ_HANDLED;
1109 }
1110
1111 #ifdef CONFIG_NET_POLL_CONTROLLER
1112 static void bcm_sysport_poll_controller(struct net_device *dev)
1113 {
1114 struct bcm_sysport_priv *priv = netdev_priv(dev);
1115
1116 disable_irq(priv->irq0);
1117 bcm_sysport_rx_isr(priv->irq0, priv);
1118 enable_irq(priv->irq0);
1119
1120 if (!priv->is_lite) {
1121 disable_irq(priv->irq1);
1122 bcm_sysport_tx_isr(priv->irq1, priv);
1123 enable_irq(priv->irq1);
1124 }
1125 }
1126 #endif
1127
1128 static struct sk_buff *bcm_sysport_insert_tsb(struct sk_buff *skb,
1129 struct net_device *dev)
1130 {
1131 struct sk_buff *nskb;
1132 struct bcm_tsb *tsb;
1133 u32 csum_info;
1134 u8 ip_proto;
1135 u16 csum_start;
1136 u16 ip_ver;
1137
1138 /* Re-allocate SKB if needed */
1139 if (unlikely(skb_headroom(skb) < sizeof(*tsb))) {
1140 nskb = skb_realloc_headroom(skb, sizeof(*tsb));
1141 dev_kfree_skb(skb);
1142 if (!nskb) {
1143 dev->stats.tx_errors++;
1144 dev->stats.tx_dropped++;
1145 return NULL;
1146 }
1147 skb = nskb;
1148 }
1149
1150 tsb = skb_push(skb, sizeof(*tsb));
1151 /* Zero-out TSB by default */
1152 memset(tsb, 0, sizeof(*tsb));
1153
1154 if (skb->ip_summed == CHECKSUM_PARTIAL) {
1155 ip_ver = htons(skb->protocol);
1156 switch (ip_ver) {
1157 case ETH_P_IP:
1158 ip_proto = ip_hdr(skb)->protocol;
1159 break;
1160 case ETH_P_IPV6:
1161 ip_proto = ipv6_hdr(skb)->nexthdr;
1162 break;
1163 default:
1164 return skb;
1165 }
1166
1167 /* Get the checksum offset and the L4 (transport) offset */
1168 csum_start = skb_checksum_start_offset(skb) - sizeof(*tsb);
1169 csum_info = (csum_start + skb->csum_offset) & L4_CSUM_PTR_MASK;
1170 csum_info |= (csum_start << L4_PTR_SHIFT);
1171
1172 if (ip_proto == IPPROTO_TCP || ip_proto == IPPROTO_UDP) {
1173 csum_info |= L4_LENGTH_VALID;
1174 if (ip_proto == IPPROTO_UDP && ip_ver == ETH_P_IP)
1175 csum_info |= L4_UDP;
1176 } else {
1177 csum_info = 0;
1178 }
1179
1180 tsb->l4_ptr_dest_map = csum_info;
1181 }
1182
1183 return skb;
1184 }
1185
1186 static netdev_tx_t bcm_sysport_xmit(struct sk_buff *skb,
1187 struct net_device *dev)
1188 {
1189 struct bcm_sysport_priv *priv = netdev_priv(dev);
1190 struct device *kdev = &priv->pdev->dev;
1191 struct bcm_sysport_tx_ring *ring;
1192 struct bcm_sysport_cb *cb;
1193 struct netdev_queue *txq;
1194 struct dma_desc *desc;
1195 unsigned int skb_len;
1196 unsigned long flags;
1197 dma_addr_t mapping;
1198 u32 len_status;
1199 u16 queue;
1200 int ret;
1201
1202 queue = skb_get_queue_mapping(skb);
1203 txq = netdev_get_tx_queue(dev, queue);
1204 ring = &priv->tx_rings[queue];
1205
1206 /* lock against tx reclaim in BH context and TX ring full interrupt */
1207 spin_lock_irqsave(&ring->lock, flags);
1208 if (unlikely(ring->desc_count == 0)) {
1209 netif_tx_stop_queue(txq);
1210 netdev_err(dev, "queue %d awake and ring full!\n", queue);
1211 ret = NETDEV_TX_BUSY;
1212 goto out;
1213 }
1214
1215 /* Insert TSB and checksum infos */
1216 if (priv->tsb_en) {
1217 skb = bcm_sysport_insert_tsb(skb, dev);
1218 if (!skb) {
1219 ret = NETDEV_TX_OK;
1220 goto out;
1221 }
1222 }
1223
1224 skb_len = skb->len;
1225
1226 mapping = dma_map_single(kdev, skb->data, skb_len, DMA_TO_DEVICE);
1227 if (dma_mapping_error(kdev, mapping)) {
1228 priv->mib.tx_dma_failed++;
1229 netif_err(priv, tx_err, dev, "DMA map failed at %p (len=%d)\n",
1230 skb->data, skb_len);
1231 ret = NETDEV_TX_OK;
1232 goto out;
1233 }
1234
1235 /* Remember the SKB for future freeing */
1236 cb = &ring->cbs[ring->curr_desc];
1237 cb->skb = skb;
1238 dma_unmap_addr_set(cb, dma_addr, mapping);
1239 dma_unmap_len_set(cb, dma_len, skb_len);
1240
1241 /* Fetch a descriptor entry from our pool */
1242 desc = ring->desc_cpu;
1243
1244 desc->addr_lo = lower_32_bits(mapping);
1245 len_status = upper_32_bits(mapping) & DESC_ADDR_HI_MASK;
1246 len_status |= (skb_len << DESC_LEN_SHIFT);
1247 len_status |= (DESC_SOP | DESC_EOP | TX_STATUS_APP_CRC) <<
1248 DESC_STATUS_SHIFT;
1249 if (skb->ip_summed == CHECKSUM_PARTIAL)
1250 len_status |= (DESC_L4_CSUM << DESC_STATUS_SHIFT);
1251
1252 ring->curr_desc++;
1253 if (ring->curr_desc == ring->size)
1254 ring->curr_desc = 0;
1255 ring->desc_count--;
1256
1257 /* Ensure write completion of the descriptor status/length
1258 * in DRAM before the System Port WRITE_PORT register latches
1259 * the value
1260 */
1261 wmb();
1262 desc->addr_status_len = len_status;
1263 wmb();
1264
1265 /* Write this descriptor address to the RING write port */
1266 tdma_port_write_desc_addr(priv, desc, ring->index);
1267
1268 /* Check ring space and update SW control flow */
1269 if (ring->desc_count == 0)
1270 netif_tx_stop_queue(txq);
1271
1272 netif_dbg(priv, tx_queued, dev, "ring=%d desc_count=%d, curr_desc=%d\n",
1273 ring->index, ring->desc_count, ring->curr_desc);
1274
1275 ret = NETDEV_TX_OK;
1276 out:
1277 spin_unlock_irqrestore(&ring->lock, flags);
1278 return ret;
1279 }
1280
1281 static void bcm_sysport_tx_timeout(struct net_device *dev)
1282 {
1283 netdev_warn(dev, "transmit timeout!\n");
1284
1285 netif_trans_update(dev);
1286 dev->stats.tx_errors++;
1287
1288 netif_tx_wake_all_queues(dev);
1289 }
1290
1291 /* phylib adjust link callback */
1292 static void bcm_sysport_adj_link(struct net_device *dev)
1293 {
1294 struct bcm_sysport_priv *priv = netdev_priv(dev);
1295 struct phy_device *phydev = dev->phydev;
1296 unsigned int changed = 0;
1297 u32 cmd_bits = 0, reg;
1298
1299 if (priv->old_link != phydev->link) {
1300 changed = 1;
1301 priv->old_link = phydev->link;
1302 }
1303
1304 if (priv->old_duplex != phydev->duplex) {
1305 changed = 1;
1306 priv->old_duplex = phydev->duplex;
1307 }
1308
1309 if (priv->is_lite)
1310 goto out;
1311
1312 switch (phydev->speed) {
1313 case SPEED_2500:
1314 cmd_bits = CMD_SPEED_2500;
1315 break;
1316 case SPEED_1000:
1317 cmd_bits = CMD_SPEED_1000;
1318 break;
1319 case SPEED_100:
1320 cmd_bits = CMD_SPEED_100;
1321 break;
1322 case SPEED_10:
1323 cmd_bits = CMD_SPEED_10;
1324 break;
1325 default:
1326 break;
1327 }
1328 cmd_bits <<= CMD_SPEED_SHIFT;
1329
1330 if (phydev->duplex == DUPLEX_HALF)
1331 cmd_bits |= CMD_HD_EN;
1332
1333 if (priv->old_pause != phydev->pause) {
1334 changed = 1;
1335 priv->old_pause = phydev->pause;
1336 }
1337
1338 if (!phydev->pause)
1339 cmd_bits |= CMD_RX_PAUSE_IGNORE | CMD_TX_PAUSE_IGNORE;
1340
1341 if (!changed)
1342 return;
1343
1344 if (phydev->link) {
1345 reg = umac_readl(priv, UMAC_CMD);
1346 reg &= ~((CMD_SPEED_MASK << CMD_SPEED_SHIFT) |
1347 CMD_HD_EN | CMD_RX_PAUSE_IGNORE |
1348 CMD_TX_PAUSE_IGNORE);
1349 reg |= cmd_bits;
1350 umac_writel(priv, reg, UMAC_CMD);
1351 }
1352 out:
1353 if (changed)
1354 phy_print_status(phydev);
1355 }
1356
1357 static int bcm_sysport_init_tx_ring(struct bcm_sysport_priv *priv,
1358 unsigned int index)
1359 {
1360 struct bcm_sysport_tx_ring *ring = &priv->tx_rings[index];
1361 struct device *kdev = &priv->pdev->dev;
1362 size_t size;
1363 void *p;
1364 u32 reg;
1365
1366 /* Simple descriptors partitioning for now */
1367 size = 256;
1368
1369 /* We just need one DMA descriptor which is DMA-able, since writing to
1370 * the port will allocate a new descriptor in its internal linked-list
1371 */
1372 p = dma_zalloc_coherent(kdev, sizeof(struct dma_desc), &ring->desc_dma,
1373 GFP_KERNEL);
1374 if (!p) {
1375 netif_err(priv, hw, priv->netdev, "DMA alloc failed\n");
1376 return -ENOMEM;
1377 }
1378
1379 ring->cbs = kcalloc(size, sizeof(struct bcm_sysport_cb), GFP_KERNEL);
1380 if (!ring->cbs) {
1381 dma_free_coherent(kdev, sizeof(struct dma_desc),
1382 ring->desc_cpu, ring->desc_dma);
1383 netif_err(priv, hw, priv->netdev, "CB allocation failed\n");
1384 return -ENOMEM;
1385 }
1386
1387 /* Initialize SW view of the ring */
1388 spin_lock_init(&ring->lock);
1389 ring->priv = priv;
1390 netif_tx_napi_add(priv->netdev, &ring->napi, bcm_sysport_tx_poll, 64);
1391 ring->index = index;
1392 ring->size = size;
1393 ring->clean_index = 0;
1394 ring->alloc_size = ring->size;
1395 ring->desc_cpu = p;
1396 ring->desc_count = ring->size;
1397 ring->curr_desc = 0;
1398
1399 /* Initialize HW ring */
1400 tdma_writel(priv, RING_EN, TDMA_DESC_RING_HEAD_TAIL_PTR(index));
1401 tdma_writel(priv, 0, TDMA_DESC_RING_COUNT(index));
1402 tdma_writel(priv, 1, TDMA_DESC_RING_INTR_CONTROL(index));
1403 tdma_writel(priv, 0, TDMA_DESC_RING_PROD_CONS_INDEX(index));
1404
1405 /* Configure QID and port mapping */
1406 reg = tdma_readl(priv, TDMA_DESC_RING_MAPPING(index));
1407 reg &= ~(RING_QID_MASK | RING_PORT_ID_MASK << RING_PORT_ID_SHIFT);
1408 if (ring->inspect) {
1409 reg |= ring->switch_queue & RING_QID_MASK;
1410 reg |= ring->switch_port << RING_PORT_ID_SHIFT;
1411 } else {
1412 reg |= RING_IGNORE_STATUS;
1413 }
1414 tdma_writel(priv, reg, TDMA_DESC_RING_MAPPING(index));
1415 tdma_writel(priv, 0, TDMA_DESC_RING_PCP_DEI_VID(index));
1416
1417 /* Enable ACB algorithm 2 */
1418 reg = tdma_readl(priv, TDMA_CONTROL);
1419 reg |= tdma_control_bit(priv, ACB_ALGO);
1420 tdma_writel(priv, reg, TDMA_CONTROL);
1421
1422 /* Do not use tdma_control_bit() here because TSB_SWAP1 collides
1423 * with the original definition of ACB_ALGO
1424 */
1425 reg = tdma_readl(priv, TDMA_CONTROL);
1426 if (priv->is_lite)
1427 reg &= ~BIT(TSB_SWAP1);
1428 /* Set a correct TSB format based on host endian */
1429 if (!IS_ENABLED(CONFIG_CPU_BIG_ENDIAN))
1430 reg |= tdma_control_bit(priv, TSB_SWAP0);
1431 else
1432 reg &= ~tdma_control_bit(priv, TSB_SWAP0);
1433 tdma_writel(priv, reg, TDMA_CONTROL);
1434
1435 /* Program the number of descriptors as MAX_THRESHOLD and half of
1436 * its size for the hysteresis trigger
1437 */
1438 tdma_writel(priv, ring->size |
1439 1 << RING_HYST_THRESH_SHIFT,
1440 TDMA_DESC_RING_MAX_HYST(index));
1441
1442 /* Enable the ring queue in the arbiter */
1443 reg = tdma_readl(priv, TDMA_TIER1_ARB_0_QUEUE_EN);
1444 reg |= (1 << index);
1445 tdma_writel(priv, reg, TDMA_TIER1_ARB_0_QUEUE_EN);
1446
1447 napi_enable(&ring->napi);
1448
1449 netif_dbg(priv, hw, priv->netdev,
1450 "TDMA cfg, size=%d, desc_cpu=%p switch q=%d,port=%d\n",
1451 ring->size, ring->desc_cpu, ring->switch_queue,
1452 ring->switch_port);
1453
1454 return 0;
1455 }
1456
1457 static void bcm_sysport_fini_tx_ring(struct bcm_sysport_priv *priv,
1458 unsigned int index)
1459 {
1460 struct bcm_sysport_tx_ring *ring = &priv->tx_rings[index];
1461 struct device *kdev = &priv->pdev->dev;
1462 u32 reg;
1463
1464 /* Caller should stop the TDMA engine */
1465 reg = tdma_readl(priv, TDMA_STATUS);
1466 if (!(reg & TDMA_DISABLED))
1467 netdev_warn(priv->netdev, "TDMA not stopped!\n");
1468
1469 /* ring->cbs is the last part in bcm_sysport_init_tx_ring which could
1470 * fail, so by checking this pointer we know whether the TX ring was
1471 * fully initialized or not.
1472 */
1473 if (!ring->cbs)
1474 return;
1475
1476 napi_disable(&ring->napi);
1477 netif_napi_del(&ring->napi);
1478
1479 bcm_sysport_tx_clean(priv, ring);
1480
1481 kfree(ring->cbs);
1482 ring->cbs = NULL;
1483
1484 if (ring->desc_dma) {
1485 dma_free_coherent(kdev, sizeof(struct dma_desc),
1486 ring->desc_cpu, ring->desc_dma);
1487 ring->desc_dma = 0;
1488 }
1489 ring->size = 0;
1490 ring->alloc_size = 0;
1491
1492 netif_dbg(priv, hw, priv->netdev, "TDMA fini done\n");
1493 }
1494
1495 /* RDMA helper */
1496 static inline int rdma_enable_set(struct bcm_sysport_priv *priv,
1497 unsigned int enable)
1498 {
1499 unsigned int timeout = 1000;
1500 u32 reg;
1501
1502 reg = rdma_readl(priv, RDMA_CONTROL);
1503 if (enable)
1504 reg |= RDMA_EN;
1505 else
1506 reg &= ~RDMA_EN;
1507 rdma_writel(priv, reg, RDMA_CONTROL);
1508
1509 /* Poll for RMDA disabling completion */
1510 do {
1511 reg = rdma_readl(priv, RDMA_STATUS);
1512 if (!!(reg & RDMA_DISABLED) == !enable)
1513 return 0;
1514 usleep_range(1000, 2000);
1515 } while (timeout-- > 0);
1516
1517 netdev_err(priv->netdev, "timeout waiting for RDMA to finish\n");
1518
1519 return -ETIMEDOUT;
1520 }
1521
1522 /* TDMA helper */
1523 static inline int tdma_enable_set(struct bcm_sysport_priv *priv,
1524 unsigned int enable)
1525 {
1526 unsigned int timeout = 1000;
1527 u32 reg;
1528
1529 reg = tdma_readl(priv, TDMA_CONTROL);
1530 if (enable)
1531 reg |= tdma_control_bit(priv, TDMA_EN);
1532 else
1533 reg &= ~tdma_control_bit(priv, TDMA_EN);
1534 tdma_writel(priv, reg, TDMA_CONTROL);
1535
1536 /* Poll for TMDA disabling completion */
1537 do {
1538 reg = tdma_readl(priv, TDMA_STATUS);
1539 if (!!(reg & TDMA_DISABLED) == !enable)
1540 return 0;
1541
1542 usleep_range(1000, 2000);
1543 } while (timeout-- > 0);
1544
1545 netdev_err(priv->netdev, "timeout waiting for TDMA to finish\n");
1546
1547 return -ETIMEDOUT;
1548 }
1549
1550 static int bcm_sysport_init_rx_ring(struct bcm_sysport_priv *priv)
1551 {
1552 struct bcm_sysport_cb *cb;
1553 u32 reg;
1554 int ret;
1555 int i;
1556
1557 /* Initialize SW view of the RX ring */
1558 priv->num_rx_bds = priv->num_rx_desc_words / WORDS_PER_DESC;
1559 priv->rx_bds = priv->base + SYS_PORT_RDMA_OFFSET;
1560 priv->rx_c_index = 0;
1561 priv->rx_read_ptr = 0;
1562 priv->rx_cbs = kcalloc(priv->num_rx_bds, sizeof(struct bcm_sysport_cb),
1563 GFP_KERNEL);
1564 if (!priv->rx_cbs) {
1565 netif_err(priv, hw, priv->netdev, "CB allocation failed\n");
1566 return -ENOMEM;
1567 }
1568
1569 for (i = 0; i < priv->num_rx_bds; i++) {
1570 cb = priv->rx_cbs + i;
1571 cb->bd_addr = priv->rx_bds + i * DESC_SIZE;
1572 }
1573
1574 ret = bcm_sysport_alloc_rx_bufs(priv);
1575 if (ret) {
1576 netif_err(priv, hw, priv->netdev, "SKB allocation failed\n");
1577 return ret;
1578 }
1579
1580 /* Initialize HW, ensure RDMA is disabled */
1581 reg = rdma_readl(priv, RDMA_STATUS);
1582 if (!(reg & RDMA_DISABLED))
1583 rdma_enable_set(priv, 0);
1584
1585 rdma_writel(priv, 0, RDMA_WRITE_PTR_LO);
1586 rdma_writel(priv, 0, RDMA_WRITE_PTR_HI);
1587 rdma_writel(priv, 0, RDMA_PROD_INDEX);
1588 rdma_writel(priv, 0, RDMA_CONS_INDEX);
1589 rdma_writel(priv, priv->num_rx_bds << RDMA_RING_SIZE_SHIFT |
1590 RX_BUF_LENGTH, RDMA_RING_BUF_SIZE);
1591 /* Operate the queue in ring mode */
1592 rdma_writel(priv, 0, RDMA_START_ADDR_HI);
1593 rdma_writel(priv, 0, RDMA_START_ADDR_LO);
1594 rdma_writel(priv, 0, RDMA_END_ADDR_HI);
1595 rdma_writel(priv, priv->num_rx_desc_words - 1, RDMA_END_ADDR_LO);
1596
1597 rdma_writel(priv, 1, RDMA_MBDONE_INTR);
1598
1599 netif_dbg(priv, hw, priv->netdev,
1600 "RDMA cfg, num_rx_bds=%d, rx_bds=%p\n",
1601 priv->num_rx_bds, priv->rx_bds);
1602
1603 return 0;
1604 }
1605
1606 static void bcm_sysport_fini_rx_ring(struct bcm_sysport_priv *priv)
1607 {
1608 struct bcm_sysport_cb *cb;
1609 unsigned int i;
1610 u32 reg;
1611
1612 /* Caller should ensure RDMA is disabled */
1613 reg = rdma_readl(priv, RDMA_STATUS);
1614 if (!(reg & RDMA_DISABLED))
1615 netdev_warn(priv->netdev, "RDMA not stopped!\n");
1616
1617 for (i = 0; i < priv->num_rx_bds; i++) {
1618 cb = &priv->rx_cbs[i];
1619 if (dma_unmap_addr(cb, dma_addr))
1620 dma_unmap_single(&priv->pdev->dev,
1621 dma_unmap_addr(cb, dma_addr),
1622 RX_BUF_LENGTH, DMA_FROM_DEVICE);
1623 bcm_sysport_free_cb(cb);
1624 }
1625
1626 kfree(priv->rx_cbs);
1627 priv->rx_cbs = NULL;
1628
1629 netif_dbg(priv, hw, priv->netdev, "RDMA fini done\n");
1630 }
1631
1632 static void bcm_sysport_set_rx_mode(struct net_device *dev)
1633 {
1634 struct bcm_sysport_priv *priv = netdev_priv(dev);
1635 u32 reg;
1636
1637 if (priv->is_lite)
1638 return;
1639
1640 reg = umac_readl(priv, UMAC_CMD);
1641 if (dev->flags & IFF_PROMISC)
1642 reg |= CMD_PROMISC;
1643 else
1644 reg &= ~CMD_PROMISC;
1645 umac_writel(priv, reg, UMAC_CMD);
1646
1647 /* No support for ALLMULTI */
1648 if (dev->flags & IFF_ALLMULTI)
1649 return;
1650 }
1651
1652 static inline void umac_enable_set(struct bcm_sysport_priv *priv,
1653 u32 mask, unsigned int enable)
1654 {
1655 u32 reg;
1656
1657 if (!priv->is_lite) {
1658 reg = umac_readl(priv, UMAC_CMD);
1659 if (enable)
1660 reg |= mask;
1661 else
1662 reg &= ~mask;
1663 umac_writel(priv, reg, UMAC_CMD);
1664 } else {
1665 reg = gib_readl(priv, GIB_CONTROL);
1666 if (enable)
1667 reg |= mask;
1668 else
1669 reg &= ~mask;
1670 gib_writel(priv, reg, GIB_CONTROL);
1671 }
1672
1673 /* UniMAC stops on a packet boundary, wait for a full-sized packet
1674 * to be processed (1 msec).
1675 */
1676 if (enable == 0)
1677 usleep_range(1000, 2000);
1678 }
1679
1680 static inline void umac_reset(struct bcm_sysport_priv *priv)
1681 {
1682 u32 reg;
1683
1684 if (priv->is_lite)
1685 return;
1686
1687 reg = umac_readl(priv, UMAC_CMD);
1688 reg |= CMD_SW_RESET;
1689 umac_writel(priv, reg, UMAC_CMD);
1690 udelay(10);
1691 reg = umac_readl(priv, UMAC_CMD);
1692 reg &= ~CMD_SW_RESET;
1693 umac_writel(priv, reg, UMAC_CMD);
1694 }
1695
1696 static void umac_set_hw_addr(struct bcm_sysport_priv *priv,
1697 unsigned char *addr)
1698 {
1699 u32 mac0 = (addr[0] << 24) | (addr[1] << 16) | (addr[2] << 8) |
1700 addr[3];
1701 u32 mac1 = (addr[4] << 8) | addr[5];
1702
1703 if (!priv->is_lite) {
1704 umac_writel(priv, mac0, UMAC_MAC0);
1705 umac_writel(priv, mac1, UMAC_MAC1);
1706 } else {
1707 gib_writel(priv, mac0, GIB_MAC0);
1708 gib_writel(priv, mac1, GIB_MAC1);
1709 }
1710 }
1711
1712 static void topctrl_flush(struct bcm_sysport_priv *priv)
1713 {
1714 topctrl_writel(priv, RX_FLUSH, RX_FLUSH_CNTL);
1715 topctrl_writel(priv, TX_FLUSH, TX_FLUSH_CNTL);
1716 mdelay(1);
1717 topctrl_writel(priv, 0, RX_FLUSH_CNTL);
1718 topctrl_writel(priv, 0, TX_FLUSH_CNTL);
1719 }
1720
1721 static int bcm_sysport_change_mac(struct net_device *dev, void *p)
1722 {
1723 struct bcm_sysport_priv *priv = netdev_priv(dev);
1724 struct sockaddr *addr = p;
1725
1726 if (!is_valid_ether_addr(addr->sa_data))
1727 return -EINVAL;
1728
1729 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
1730
1731 /* interface is disabled, changes to MAC will be reflected on next
1732 * open call
1733 */
1734 if (!netif_running(dev))
1735 return 0;
1736
1737 umac_set_hw_addr(priv, dev->dev_addr);
1738
1739 return 0;
1740 }
1741
1742 static void bcm_sysport_get_stats64(struct net_device *dev,
1743 struct rtnl_link_stats64 *stats)
1744 {
1745 struct bcm_sysport_priv *priv = netdev_priv(dev);
1746 struct bcm_sysport_stats64 *stats64 = &priv->stats64;
1747 unsigned int start;
1748
1749 netdev_stats_to_stats64(stats, &dev->stats);
1750
1751 bcm_sysport_update_tx_stats(priv, &stats->tx_bytes,
1752 &stats->tx_packets);
1753
1754 do {
1755 start = u64_stats_fetch_begin_irq(&priv->syncp);
1756 stats->rx_packets = stats64->rx_packets;
1757 stats->rx_bytes = stats64->rx_bytes;
1758 } while (u64_stats_fetch_retry_irq(&priv->syncp, start));
1759 }
1760
1761 static void bcm_sysport_netif_start(struct net_device *dev)
1762 {
1763 struct bcm_sysport_priv *priv = netdev_priv(dev);
1764
1765 /* Enable NAPI */
1766 napi_enable(&priv->napi);
1767
1768 /* Enable RX interrupt and TX ring full interrupt */
1769 intrl2_0_mask_clear(priv, INTRL2_0_RDMA_MBDONE | INTRL2_0_TX_RING_FULL);
1770
1771 phy_start(dev->phydev);
1772
1773 /* Enable TX interrupts for the TXQs */
1774 if (!priv->is_lite)
1775 intrl2_1_mask_clear(priv, 0xffffffff);
1776 else
1777 intrl2_0_mask_clear(priv, INTRL2_0_TDMA_MBDONE_MASK);
1778
1779 /* Last call before we start the real business */
1780 netif_tx_start_all_queues(dev);
1781 }
1782
1783 static void rbuf_init(struct bcm_sysport_priv *priv)
1784 {
1785 u32 reg;
1786
1787 reg = rbuf_readl(priv, RBUF_CONTROL);
1788 reg |= RBUF_4B_ALGN | RBUF_RSB_EN;
1789 /* Set a correct RSB format on SYSTEMPORT Lite */
1790 if (priv->is_lite)
1791 reg &= ~RBUF_RSB_SWAP1;
1792
1793 /* Set a correct RSB format based on host endian */
1794 if (!IS_ENABLED(CONFIG_CPU_BIG_ENDIAN))
1795 reg |= RBUF_RSB_SWAP0;
1796 else
1797 reg &= ~RBUF_RSB_SWAP0;
1798 rbuf_writel(priv, reg, RBUF_CONTROL);
1799 }
1800
1801 static inline void bcm_sysport_mask_all_intrs(struct bcm_sysport_priv *priv)
1802 {
1803 intrl2_0_mask_set(priv, 0xffffffff);
1804 intrl2_0_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
1805 if (!priv->is_lite) {
1806 intrl2_1_mask_set(priv, 0xffffffff);
1807 intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
1808 }
1809 }
1810
1811 static inline void gib_set_pad_extension(struct bcm_sysport_priv *priv)
1812 {
1813 u32 reg;
1814
1815 reg = gib_readl(priv, GIB_CONTROL);
1816 /* Include Broadcom tag in pad extension and fix up IPG_LENGTH */
1817 if (netdev_uses_dsa(priv->netdev)) {
1818 reg &= ~(GIB_PAD_EXTENSION_MASK << GIB_PAD_EXTENSION_SHIFT);
1819 reg |= ENET_BRCM_TAG_LEN << GIB_PAD_EXTENSION_SHIFT;
1820 }
1821 reg &= ~(GIB_IPG_LEN_MASK << GIB_IPG_LEN_SHIFT);
1822 reg |= 12 << GIB_IPG_LEN_SHIFT;
1823 gib_writel(priv, reg, GIB_CONTROL);
1824 }
1825
1826 static int bcm_sysport_open(struct net_device *dev)
1827 {
1828 struct bcm_sysport_priv *priv = netdev_priv(dev);
1829 struct phy_device *phydev;
1830 unsigned int i;
1831 int ret;
1832
1833 /* Reset UniMAC */
1834 umac_reset(priv);
1835
1836 /* Flush TX and RX FIFOs at TOPCTRL level */
1837 topctrl_flush(priv);
1838
1839 /* Disable the UniMAC RX/TX */
1840 umac_enable_set(priv, CMD_RX_EN | CMD_TX_EN, 0);
1841
1842 /* Enable RBUF 2bytes alignment and Receive Status Block */
1843 rbuf_init(priv);
1844
1845 /* Set maximum frame length */
1846 if (!priv->is_lite)
1847 umac_writel(priv, UMAC_MAX_MTU_SIZE, UMAC_MAX_FRAME_LEN);
1848 else
1849 gib_set_pad_extension(priv);
1850
1851 /* Set MAC address */
1852 umac_set_hw_addr(priv, dev->dev_addr);
1853
1854 /* Read CRC forward */
1855 if (!priv->is_lite)
1856 priv->crc_fwd = !!(umac_readl(priv, UMAC_CMD) & CMD_CRC_FWD);
1857 else
1858 priv->crc_fwd = !!(gib_readl(priv, GIB_CONTROL) &
1859 GIB_FCS_STRIP);
1860
1861 phydev = of_phy_connect(dev, priv->phy_dn, bcm_sysport_adj_link,
1862 0, priv->phy_interface);
1863 if (!phydev) {
1864 netdev_err(dev, "could not attach to PHY\n");
1865 return -ENODEV;
1866 }
1867
1868 /* Reset house keeping link status */
1869 priv->old_duplex = -1;
1870 priv->old_link = -1;
1871 priv->old_pause = -1;
1872
1873 /* mask all interrupts and request them */
1874 bcm_sysport_mask_all_intrs(priv);
1875
1876 ret = request_irq(priv->irq0, bcm_sysport_rx_isr, 0, dev->name, dev);
1877 if (ret) {
1878 netdev_err(dev, "failed to request RX interrupt\n");
1879 goto out_phy_disconnect;
1880 }
1881
1882 if (!priv->is_lite) {
1883 ret = request_irq(priv->irq1, bcm_sysport_tx_isr, 0,
1884 dev->name, dev);
1885 if (ret) {
1886 netdev_err(dev, "failed to request TX interrupt\n");
1887 goto out_free_irq0;
1888 }
1889 }
1890
1891 /* Initialize both hardware and software ring */
1892 for (i = 0; i < dev->num_tx_queues; i++) {
1893 ret = bcm_sysport_init_tx_ring(priv, i);
1894 if (ret) {
1895 netdev_err(dev, "failed to initialize TX ring %d\n",
1896 i);
1897 goto out_free_tx_ring;
1898 }
1899 }
1900
1901 /* Initialize linked-list */
1902 tdma_writel(priv, TDMA_LL_RAM_INIT_BUSY, TDMA_STATUS);
1903
1904 /* Initialize RX ring */
1905 ret = bcm_sysport_init_rx_ring(priv);
1906 if (ret) {
1907 netdev_err(dev, "failed to initialize RX ring\n");
1908 goto out_free_rx_ring;
1909 }
1910
1911 /* Turn on RDMA */
1912 ret = rdma_enable_set(priv, 1);
1913 if (ret)
1914 goto out_free_rx_ring;
1915
1916 /* Turn on TDMA */
1917 ret = tdma_enable_set(priv, 1);
1918 if (ret)
1919 goto out_clear_rx_int;
1920
1921 /* Turn on UniMAC TX/RX */
1922 umac_enable_set(priv, CMD_RX_EN | CMD_TX_EN, 1);
1923
1924 bcm_sysport_netif_start(dev);
1925
1926 return 0;
1927
1928 out_clear_rx_int:
1929 intrl2_0_mask_set(priv, INTRL2_0_RDMA_MBDONE | INTRL2_0_TX_RING_FULL);
1930 out_free_rx_ring:
1931 bcm_sysport_fini_rx_ring(priv);
1932 out_free_tx_ring:
1933 for (i = 0; i < dev->num_tx_queues; i++)
1934 bcm_sysport_fini_tx_ring(priv, i);
1935 if (!priv->is_lite)
1936 free_irq(priv->irq1, dev);
1937 out_free_irq0:
1938 free_irq(priv->irq0, dev);
1939 out_phy_disconnect:
1940 phy_disconnect(phydev);
1941 return ret;
1942 }
1943
1944 static void bcm_sysport_netif_stop(struct net_device *dev)
1945 {
1946 struct bcm_sysport_priv *priv = netdev_priv(dev);
1947
1948 /* stop all software from updating hardware */
1949 netif_tx_stop_all_queues(dev);
1950 napi_disable(&priv->napi);
1951 phy_stop(dev->phydev);
1952
1953 /* mask all interrupts */
1954 bcm_sysport_mask_all_intrs(priv);
1955 }
1956
1957 static int bcm_sysport_stop(struct net_device *dev)
1958 {
1959 struct bcm_sysport_priv *priv = netdev_priv(dev);
1960 unsigned int i;
1961 int ret;
1962
1963 bcm_sysport_netif_stop(dev);
1964
1965 /* Disable UniMAC RX */
1966 umac_enable_set(priv, CMD_RX_EN, 0);
1967
1968 ret = tdma_enable_set(priv, 0);
1969 if (ret) {
1970 netdev_err(dev, "timeout disabling RDMA\n");
1971 return ret;
1972 }
1973
1974 /* Wait for a maximum packet size to be drained */
1975 usleep_range(2000, 3000);
1976
1977 ret = rdma_enable_set(priv, 0);
1978 if (ret) {
1979 netdev_err(dev, "timeout disabling TDMA\n");
1980 return ret;
1981 }
1982
1983 /* Disable UniMAC TX */
1984 umac_enable_set(priv, CMD_TX_EN, 0);
1985
1986 /* Free RX/TX rings SW structures */
1987 for (i = 0; i < dev->num_tx_queues; i++)
1988 bcm_sysport_fini_tx_ring(priv, i);
1989 bcm_sysport_fini_rx_ring(priv);
1990
1991 free_irq(priv->irq0, dev);
1992 if (!priv->is_lite)
1993 free_irq(priv->irq1, dev);
1994
1995 /* Disconnect from PHY */
1996 phy_disconnect(dev->phydev);
1997
1998 return 0;
1999 }
2000
2001 static const struct ethtool_ops bcm_sysport_ethtool_ops = {
2002 .get_drvinfo = bcm_sysport_get_drvinfo,
2003 .get_msglevel = bcm_sysport_get_msglvl,
2004 .set_msglevel = bcm_sysport_set_msglvl,
2005 .get_link = ethtool_op_get_link,
2006 .get_strings = bcm_sysport_get_strings,
2007 .get_ethtool_stats = bcm_sysport_get_stats,
2008 .get_sset_count = bcm_sysport_get_sset_count,
2009 .get_wol = bcm_sysport_get_wol,
2010 .set_wol = bcm_sysport_set_wol,
2011 .get_coalesce = bcm_sysport_get_coalesce,
2012 .set_coalesce = bcm_sysport_set_coalesce,
2013 .get_link_ksettings = phy_ethtool_get_link_ksettings,
2014 .set_link_ksettings = phy_ethtool_set_link_ksettings,
2015 };
2016
2017 static u16 bcm_sysport_select_queue(struct net_device *dev, struct sk_buff *skb,
2018 void *accel_priv,
2019 select_queue_fallback_t fallback)
2020 {
2021 struct bcm_sysport_priv *priv = netdev_priv(dev);
2022 u16 queue = skb_get_queue_mapping(skb);
2023 struct bcm_sysport_tx_ring *tx_ring;
2024 unsigned int q, port;
2025
2026 if (!netdev_uses_dsa(dev))
2027 return fallback(dev, skb);
2028
2029 /* DSA tagging layer will have configured the correct queue */
2030 q = BRCM_TAG_GET_QUEUE(queue);
2031 port = BRCM_TAG_GET_PORT(queue);
2032 tx_ring = priv->ring_map[q + port * priv->per_port_num_tx_queues];
2033
2034 if (unlikely(!tx_ring))
2035 return fallback(dev, skb);
2036
2037 return tx_ring->index;
2038 }
2039
2040 static const struct net_device_ops bcm_sysport_netdev_ops = {
2041 .ndo_start_xmit = bcm_sysport_xmit,
2042 .ndo_tx_timeout = bcm_sysport_tx_timeout,
2043 .ndo_open = bcm_sysport_open,
2044 .ndo_stop = bcm_sysport_stop,
2045 .ndo_set_features = bcm_sysport_set_features,
2046 .ndo_set_rx_mode = bcm_sysport_set_rx_mode,
2047 .ndo_set_mac_address = bcm_sysport_change_mac,
2048 #ifdef CONFIG_NET_POLL_CONTROLLER
2049 .ndo_poll_controller = bcm_sysport_poll_controller,
2050 #endif
2051 .ndo_get_stats64 = bcm_sysport_get_stats64,
2052 .ndo_select_queue = bcm_sysport_select_queue,
2053 };
2054
2055 static int bcm_sysport_map_queues(struct net_device *dev,
2056 struct dsa_notifier_register_info *info)
2057 {
2058 struct bcm_sysport_priv *priv = netdev_priv(dev);
2059 struct bcm_sysport_tx_ring *ring;
2060 struct net_device *slave_dev;
2061 unsigned int num_tx_queues;
2062 unsigned int q, start, port;
2063
2064 /* We can't be setting up queue inspection for non directly attached
2065 * switches
2066 */
2067 if (info->switch_number)
2068 return 0;
2069
2070 if (dev->netdev_ops != &bcm_sysport_netdev_ops)
2071 return 0;
2072
2073 port = info->port_number;
2074 slave_dev = info->info.dev;
2075
2076 /* On SYSTEMPORT Lite we have twice as less queues, so we cannot do a
2077 * 1:1 mapping, we can only do a 2:1 mapping. By reducing the number of
2078 * per-port (slave_dev) network devices queue, we achieve just that.
2079 * This need to happen now before any slave network device is used such
2080 * it accurately reflects the number of real TX queues.
2081 */
2082 if (priv->is_lite)
2083 netif_set_real_num_tx_queues(slave_dev,
2084 slave_dev->num_tx_queues / 2);
2085 num_tx_queues = slave_dev->real_num_tx_queues;
2086
2087 if (priv->per_port_num_tx_queues &&
2088 priv->per_port_num_tx_queues != num_tx_queues)
2089 netdev_warn(slave_dev, "asymetric number of per-port queues\n");
2090
2091 priv->per_port_num_tx_queues = num_tx_queues;
2092
2093 start = find_first_zero_bit(&priv->queue_bitmap, dev->num_tx_queues);
2094 for (q = 0; q < num_tx_queues; q++) {
2095 ring = &priv->tx_rings[q + start];
2096
2097 /* Just remember the mapping actual programming done
2098 * during bcm_sysport_init_tx_ring
2099 */
2100 ring->switch_queue = q;
2101 ring->switch_port = port;
2102 ring->inspect = true;
2103 priv->ring_map[q + port * num_tx_queues] = ring;
2104
2105 /* Set all queues as being used now */
2106 set_bit(q + start, &priv->queue_bitmap);
2107 }
2108
2109 return 0;
2110 }
2111
2112 static int bcm_sysport_dsa_notifier(struct notifier_block *unused,
2113 unsigned long event, void *ptr)
2114 {
2115 struct dsa_notifier_register_info *info;
2116
2117 if (event != DSA_PORT_REGISTER)
2118 return NOTIFY_DONE;
2119
2120 info = ptr;
2121
2122 return notifier_from_errno(bcm_sysport_map_queues(info->master, info));
2123 }
2124
2125 #define REV_FMT "v%2x.%02x"
2126
2127 static const struct bcm_sysport_hw_params bcm_sysport_params[] = {
2128 [SYSTEMPORT] = {
2129 .is_lite = false,
2130 .num_rx_desc_words = SP_NUM_HW_RX_DESC_WORDS,
2131 },
2132 [SYSTEMPORT_LITE] = {
2133 .is_lite = true,
2134 .num_rx_desc_words = SP_LT_NUM_HW_RX_DESC_WORDS,
2135 },
2136 };
2137
2138 static const struct of_device_id bcm_sysport_of_match[] = {
2139 { .compatible = "brcm,systemportlite-v1.00",
2140 .data = &bcm_sysport_params[SYSTEMPORT_LITE] },
2141 { .compatible = "brcm,systemport-v1.00",
2142 .data = &bcm_sysport_params[SYSTEMPORT] },
2143 { .compatible = "brcm,systemport",
2144 .data = &bcm_sysport_params[SYSTEMPORT] },
2145 { /* sentinel */ }
2146 };
2147 MODULE_DEVICE_TABLE(of, bcm_sysport_of_match);
2148
2149 static int bcm_sysport_probe(struct platform_device *pdev)
2150 {
2151 const struct bcm_sysport_hw_params *params;
2152 const struct of_device_id *of_id = NULL;
2153 struct bcm_sysport_priv *priv;
2154 struct device_node *dn;
2155 struct net_device *dev;
2156 const void *macaddr;
2157 struct resource *r;
2158 u32 txq, rxq;
2159 int ret;
2160
2161 dn = pdev->dev.of_node;
2162 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2163 of_id = of_match_node(bcm_sysport_of_match, dn);
2164 if (!of_id || !of_id->data)
2165 return -EINVAL;
2166
2167 /* Fairly quickly we need to know the type of adapter we have */
2168 params = of_id->data;
2169
2170 /* Read the Transmit/Receive Queue properties */
2171 if (of_property_read_u32(dn, "systemport,num-txq", &txq))
2172 txq = TDMA_NUM_RINGS;
2173 if (of_property_read_u32(dn, "systemport,num-rxq", &rxq))
2174 rxq = 1;
2175
2176 /* Sanity check the number of transmit queues */
2177 if (!txq || txq > TDMA_NUM_RINGS)
2178 return -EINVAL;
2179
2180 dev = alloc_etherdev_mqs(sizeof(*priv), txq, rxq);
2181 if (!dev)
2182 return -ENOMEM;
2183
2184 /* Initialize private members */
2185 priv = netdev_priv(dev);
2186
2187 /* Allocate number of TX rings */
2188 priv->tx_rings = devm_kcalloc(&pdev->dev, txq,
2189 sizeof(struct bcm_sysport_tx_ring),
2190 GFP_KERNEL);
2191 if (!priv->tx_rings)
2192 return -ENOMEM;
2193
2194 priv->is_lite = params->is_lite;
2195 priv->num_rx_desc_words = params->num_rx_desc_words;
2196
2197 priv->irq0 = platform_get_irq(pdev, 0);
2198 if (!priv->is_lite) {
2199 priv->irq1 = platform_get_irq(pdev, 1);
2200 priv->wol_irq = platform_get_irq(pdev, 2);
2201 } else {
2202 priv->wol_irq = platform_get_irq(pdev, 1);
2203 }
2204 if (priv->irq0 <= 0 || (priv->irq1 <= 0 && !priv->is_lite)) {
2205 dev_err(&pdev->dev, "invalid interrupts\n");
2206 ret = -EINVAL;
2207 goto err_free_netdev;
2208 }
2209
2210 priv->base = devm_ioremap_resource(&pdev->dev, r);
2211 if (IS_ERR(priv->base)) {
2212 ret = PTR_ERR(priv->base);
2213 goto err_free_netdev;
2214 }
2215
2216 priv->netdev = dev;
2217 priv->pdev = pdev;
2218
2219 priv->phy_interface = of_get_phy_mode(dn);
2220 /* Default to GMII interface mode */
2221 if (priv->phy_interface < 0)
2222 priv->phy_interface = PHY_INTERFACE_MODE_GMII;
2223
2224 /* In the case of a fixed PHY, the DT node associated
2225 * to the PHY is the Ethernet MAC DT node.
2226 */
2227 if (of_phy_is_fixed_link(dn)) {
2228 ret = of_phy_register_fixed_link(dn);
2229 if (ret) {
2230 dev_err(&pdev->dev, "failed to register fixed PHY\n");
2231 goto err_free_netdev;
2232 }
2233
2234 priv->phy_dn = dn;
2235 }
2236
2237 /* Initialize netdevice members */
2238 macaddr = of_get_mac_address(dn);
2239 if (!macaddr || !is_valid_ether_addr(macaddr)) {
2240 dev_warn(&pdev->dev, "using random Ethernet MAC\n");
2241 eth_hw_addr_random(dev);
2242 } else {
2243 ether_addr_copy(dev->dev_addr, macaddr);
2244 }
2245
2246 SET_NETDEV_DEV(dev, &pdev->dev);
2247 dev_set_drvdata(&pdev->dev, dev);
2248 dev->ethtool_ops = &bcm_sysport_ethtool_ops;
2249 dev->netdev_ops = &bcm_sysport_netdev_ops;
2250 netif_napi_add(dev, &priv->napi, bcm_sysport_poll, 64);
2251
2252 /* HW supported features, none enabled by default */
2253 dev->hw_features |= NETIF_F_RXCSUM | NETIF_F_HIGHDMA |
2254 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
2255
2256 /* Request the WOL interrupt and advertise suspend if available */
2257 priv->wol_irq_disabled = 1;
2258 ret = devm_request_irq(&pdev->dev, priv->wol_irq,
2259 bcm_sysport_wol_isr, 0, dev->name, priv);
2260 if (!ret)
2261 device_set_wakeup_capable(&pdev->dev, 1);
2262
2263 /* Set the needed headroom once and for all */
2264 BUILD_BUG_ON(sizeof(struct bcm_tsb) != 8);
2265 dev->needed_headroom += sizeof(struct bcm_tsb);
2266
2267 /* libphy will adjust the link state accordingly */
2268 netif_carrier_off(dev);
2269
2270 u64_stats_init(&priv->syncp);
2271
2272 priv->dsa_notifier.notifier_call = bcm_sysport_dsa_notifier;
2273
2274 ret = register_dsa_notifier(&priv->dsa_notifier);
2275 if (ret) {
2276 dev_err(&pdev->dev, "failed to register DSA notifier\n");
2277 goto err_deregister_fixed_link;
2278 }
2279
2280 ret = register_netdev(dev);
2281 if (ret) {
2282 dev_err(&pdev->dev, "failed to register net_device\n");
2283 goto err_deregister_notifier;
2284 }
2285
2286 priv->rev = topctrl_readl(priv, REV_CNTL) & REV_MASK;
2287 dev_info(&pdev->dev,
2288 "Broadcom SYSTEMPORT%s" REV_FMT
2289 " at 0x%p (irqs: %d, %d, TXQs: %d, RXQs: %d)\n",
2290 priv->is_lite ? " Lite" : "",
2291 (priv->rev >> 8) & 0xff, priv->rev & 0xff,
2292 priv->base, priv->irq0, priv->irq1, txq, rxq);
2293
2294 return 0;
2295
2296 err_deregister_notifier:
2297 unregister_dsa_notifier(&priv->dsa_notifier);
2298 err_deregister_fixed_link:
2299 if (of_phy_is_fixed_link(dn))
2300 of_phy_deregister_fixed_link(dn);
2301 err_free_netdev:
2302 free_netdev(dev);
2303 return ret;
2304 }
2305
2306 static int bcm_sysport_remove(struct platform_device *pdev)
2307 {
2308 struct net_device *dev = dev_get_drvdata(&pdev->dev);
2309 struct bcm_sysport_priv *priv = netdev_priv(dev);
2310 struct device_node *dn = pdev->dev.of_node;
2311
2312 /* Not much to do, ndo_close has been called
2313 * and we use managed allocations
2314 */
2315 unregister_dsa_notifier(&priv->dsa_notifier);
2316 unregister_netdev(dev);
2317 if (of_phy_is_fixed_link(dn))
2318 of_phy_deregister_fixed_link(dn);
2319 free_netdev(dev);
2320 dev_set_drvdata(&pdev->dev, NULL);
2321
2322 return 0;
2323 }
2324
2325 #ifdef CONFIG_PM_SLEEP
2326 static int bcm_sysport_suspend_to_wol(struct bcm_sysport_priv *priv)
2327 {
2328 struct net_device *ndev = priv->netdev;
2329 unsigned int timeout = 1000;
2330 u32 reg;
2331
2332 /* Password has already been programmed */
2333 reg = umac_readl(priv, UMAC_MPD_CTRL);
2334 reg |= MPD_EN;
2335 reg &= ~PSW_EN;
2336 if (priv->wolopts & WAKE_MAGICSECURE)
2337 reg |= PSW_EN;
2338 umac_writel(priv, reg, UMAC_MPD_CTRL);
2339
2340 /* Make sure RBUF entered WoL mode as result */
2341 do {
2342 reg = rbuf_readl(priv, RBUF_STATUS);
2343 if (reg & RBUF_WOL_MODE)
2344 break;
2345
2346 udelay(10);
2347 } while (timeout-- > 0);
2348
2349 /* Do not leave the UniMAC RBUF matching only MPD packets */
2350 if (!timeout) {
2351 reg = umac_readl(priv, UMAC_MPD_CTRL);
2352 reg &= ~MPD_EN;
2353 umac_writel(priv, reg, UMAC_MPD_CTRL);
2354 netif_err(priv, wol, ndev, "failed to enter WOL mode\n");
2355 return -ETIMEDOUT;
2356 }
2357
2358 /* UniMAC receive needs to be turned on */
2359 umac_enable_set(priv, CMD_RX_EN, 1);
2360
2361 /* Enable the interrupt wake-up source */
2362 intrl2_0_mask_clear(priv, INTRL2_0_MPD);
2363
2364 netif_dbg(priv, wol, ndev, "entered WOL mode\n");
2365
2366 return 0;
2367 }
2368
2369 static int bcm_sysport_suspend(struct device *d)
2370 {
2371 struct net_device *dev = dev_get_drvdata(d);
2372 struct bcm_sysport_priv *priv = netdev_priv(dev);
2373 unsigned int i;
2374 int ret = 0;
2375 u32 reg;
2376
2377 if (!netif_running(dev))
2378 return 0;
2379
2380 bcm_sysport_netif_stop(dev);
2381
2382 phy_suspend(dev->phydev);
2383
2384 netif_device_detach(dev);
2385
2386 /* Disable UniMAC RX */
2387 umac_enable_set(priv, CMD_RX_EN, 0);
2388
2389 ret = rdma_enable_set(priv, 0);
2390 if (ret) {
2391 netdev_err(dev, "RDMA timeout!\n");
2392 return ret;
2393 }
2394
2395 /* Disable RXCHK if enabled */
2396 if (priv->rx_chk_en) {
2397 reg = rxchk_readl(priv, RXCHK_CONTROL);
2398 reg &= ~RXCHK_EN;
2399 rxchk_writel(priv, reg, RXCHK_CONTROL);
2400 }
2401
2402 /* Flush RX pipe */
2403 if (!priv->wolopts)
2404 topctrl_writel(priv, RX_FLUSH, RX_FLUSH_CNTL);
2405
2406 ret = tdma_enable_set(priv, 0);
2407 if (ret) {
2408 netdev_err(dev, "TDMA timeout!\n");
2409 return ret;
2410 }
2411
2412 /* Wait for a packet boundary */
2413 usleep_range(2000, 3000);
2414
2415 umac_enable_set(priv, CMD_TX_EN, 0);
2416
2417 topctrl_writel(priv, TX_FLUSH, TX_FLUSH_CNTL);
2418
2419 /* Free RX/TX rings SW structures */
2420 for (i = 0; i < dev->num_tx_queues; i++)
2421 bcm_sysport_fini_tx_ring(priv, i);
2422 bcm_sysport_fini_rx_ring(priv);
2423
2424 /* Get prepared for Wake-on-LAN */
2425 if (device_may_wakeup(d) && priv->wolopts)
2426 ret = bcm_sysport_suspend_to_wol(priv);
2427
2428 return ret;
2429 }
2430
2431 static int bcm_sysport_resume(struct device *d)
2432 {
2433 struct net_device *dev = dev_get_drvdata(d);
2434 struct bcm_sysport_priv *priv = netdev_priv(dev);
2435 unsigned int i;
2436 u32 reg;
2437 int ret;
2438
2439 if (!netif_running(dev))
2440 return 0;
2441
2442 umac_reset(priv);
2443
2444 /* We may have been suspended and never received a WOL event that
2445 * would turn off MPD detection, take care of that now
2446 */
2447 bcm_sysport_resume_from_wol(priv);
2448
2449 /* Initialize both hardware and software ring */
2450 for (i = 0; i < dev->num_tx_queues; i++) {
2451 ret = bcm_sysport_init_tx_ring(priv, i);
2452 if (ret) {
2453 netdev_err(dev, "failed to initialize TX ring %d\n",
2454 i);
2455 goto out_free_tx_rings;
2456 }
2457 }
2458
2459 /* Initialize linked-list */
2460 tdma_writel(priv, TDMA_LL_RAM_INIT_BUSY, TDMA_STATUS);
2461
2462 /* Initialize RX ring */
2463 ret = bcm_sysport_init_rx_ring(priv);
2464 if (ret) {
2465 netdev_err(dev, "failed to initialize RX ring\n");
2466 goto out_free_rx_ring;
2467 }
2468
2469 netif_device_attach(dev);
2470
2471 /* RX pipe enable */
2472 topctrl_writel(priv, 0, RX_FLUSH_CNTL);
2473
2474 ret = rdma_enable_set(priv, 1);
2475 if (ret) {
2476 netdev_err(dev, "failed to enable RDMA\n");
2477 goto out_free_rx_ring;
2478 }
2479
2480 /* Enable rxhck */
2481 if (priv->rx_chk_en) {
2482 reg = rxchk_readl(priv, RXCHK_CONTROL);
2483 reg |= RXCHK_EN;
2484 rxchk_writel(priv, reg, RXCHK_CONTROL);
2485 }
2486
2487 rbuf_init(priv);
2488
2489 /* Set maximum frame length */
2490 if (!priv->is_lite)
2491 umac_writel(priv, UMAC_MAX_MTU_SIZE, UMAC_MAX_FRAME_LEN);
2492 else
2493 gib_set_pad_extension(priv);
2494
2495 /* Set MAC address */
2496 umac_set_hw_addr(priv, dev->dev_addr);
2497
2498 umac_enable_set(priv, CMD_RX_EN, 1);
2499
2500 /* TX pipe enable */
2501 topctrl_writel(priv, 0, TX_FLUSH_CNTL);
2502
2503 umac_enable_set(priv, CMD_TX_EN, 1);
2504
2505 ret = tdma_enable_set(priv, 1);
2506 if (ret) {
2507 netdev_err(dev, "TDMA timeout!\n");
2508 goto out_free_rx_ring;
2509 }
2510
2511 phy_resume(dev->phydev);
2512
2513 bcm_sysport_netif_start(dev);
2514
2515 return 0;
2516
2517 out_free_rx_ring:
2518 bcm_sysport_fini_rx_ring(priv);
2519 out_free_tx_rings:
2520 for (i = 0; i < dev->num_tx_queues; i++)
2521 bcm_sysport_fini_tx_ring(priv, i);
2522 return ret;
2523 }
2524 #endif
2525
2526 static SIMPLE_DEV_PM_OPS(bcm_sysport_pm_ops,
2527 bcm_sysport_suspend, bcm_sysport_resume);
2528
2529 static struct platform_driver bcm_sysport_driver = {
2530 .probe = bcm_sysport_probe,
2531 .remove = bcm_sysport_remove,
2532 .driver = {
2533 .name = "brcm-systemport",
2534 .of_match_table = bcm_sysport_of_match,
2535 .pm = &bcm_sysport_pm_ops,
2536 },
2537 };
2538 module_platform_driver(bcm_sysport_driver);
2539
2540 MODULE_AUTHOR("Broadcom Corporation");
2541 MODULE_DESCRIPTION("Broadcom System Port Ethernet MAC driver");
2542 MODULE_ALIAS("platform:brcm-systemport");
2543 MODULE_LICENSE("GPL");
Ubuntu Eoan Linux kernel mirror