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jfs: fix error path in ialloc
[mirror_ubuntu-eoan-kernel.git] / drivers / net / ethernet / broadcom / bnx2x / bnx2x_sriov.c
1 /* bnx2x_sriov.c: Broadcom Everest network driver.
2 *
3 * Copyright 2009-2013 Broadcom Corporation
4 *
5 * Unless you and Broadcom execute a separate written software license
6 * agreement governing use of this software, this software is licensed to you
7 * under the terms of the GNU General Public License version 2, available
8 * at http://www.gnu.org/licenses/old-licenses/gpl-2.0.html (the "GPL").
9 *
10 * Notwithstanding the above, under no circumstances may you combine this
11 * software in any way with any other Broadcom software provided under a
12 * license other than the GPL, without Broadcom's express prior written
13 * consent.
14 *
15 * Maintained by: Eilon Greenstein <eilong@broadcom.com>
16 * Written by: Shmulik Ravid <shmulikr@broadcom.com>
17 * Ariel Elior <ariele@broadcom.com>
18 *
19 */
20 #include "bnx2x.h"
21 #include "bnx2x_init.h"
22 #include "bnx2x_cmn.h"
23 #include "bnx2x_sp.h"
24 #include <linux/crc32.h>
25 #include <linux/if_vlan.h>
26
27 /* General service functions */
28 static void storm_memset_vf_to_pf(struct bnx2x *bp, u16 abs_fid,
29 u16 pf_id)
30 {
31 REG_WR8(bp, BAR_XSTRORM_INTMEM + XSTORM_VF_TO_PF_OFFSET(abs_fid),
32 pf_id);
33 REG_WR8(bp, BAR_CSTRORM_INTMEM + CSTORM_VF_TO_PF_OFFSET(abs_fid),
34 pf_id);
35 REG_WR8(bp, BAR_TSTRORM_INTMEM + TSTORM_VF_TO_PF_OFFSET(abs_fid),
36 pf_id);
37 REG_WR8(bp, BAR_USTRORM_INTMEM + USTORM_VF_TO_PF_OFFSET(abs_fid),
38 pf_id);
39 }
40
41 static void storm_memset_func_en(struct bnx2x *bp, u16 abs_fid,
42 u8 enable)
43 {
44 REG_WR8(bp, BAR_XSTRORM_INTMEM + XSTORM_FUNC_EN_OFFSET(abs_fid),
45 enable);
46 REG_WR8(bp, BAR_CSTRORM_INTMEM + CSTORM_FUNC_EN_OFFSET(abs_fid),
47 enable);
48 REG_WR8(bp, BAR_TSTRORM_INTMEM + TSTORM_FUNC_EN_OFFSET(abs_fid),
49 enable);
50 REG_WR8(bp, BAR_USTRORM_INTMEM + USTORM_FUNC_EN_OFFSET(abs_fid),
51 enable);
52 }
53
54 int bnx2x_vf_idx_by_abs_fid(struct bnx2x *bp, u16 abs_vfid)
55 {
56 int idx;
57
58 for_each_vf(bp, idx)
59 if (bnx2x_vf(bp, idx, abs_vfid) == abs_vfid)
60 break;
61 return idx;
62 }
63
64 static
65 struct bnx2x_virtf *bnx2x_vf_by_abs_fid(struct bnx2x *bp, u16 abs_vfid)
66 {
67 u16 idx = (u16)bnx2x_vf_idx_by_abs_fid(bp, abs_vfid);
68 return (idx < BNX2X_NR_VIRTFN(bp)) ? BP_VF(bp, idx) : NULL;
69 }
70
71 static void bnx2x_vf_igu_ack_sb(struct bnx2x *bp, struct bnx2x_virtf *vf,
72 u8 igu_sb_id, u8 segment, u16 index, u8 op,
73 u8 update)
74 {
75 /* acking a VF sb through the PF - use the GRC */
76 u32 ctl;
77 u32 igu_addr_data = IGU_REG_COMMAND_REG_32LSB_DATA;
78 u32 igu_addr_ctl = IGU_REG_COMMAND_REG_CTRL;
79 u32 func_encode = vf->abs_vfid;
80 u32 addr_encode = IGU_CMD_E2_PROD_UPD_BASE + igu_sb_id;
81 struct igu_regular cmd_data = {0};
82
83 cmd_data.sb_id_and_flags =
84 ((index << IGU_REGULAR_SB_INDEX_SHIFT) |
85 (segment << IGU_REGULAR_SEGMENT_ACCESS_SHIFT) |
86 (update << IGU_REGULAR_BUPDATE_SHIFT) |
87 (op << IGU_REGULAR_ENABLE_INT_SHIFT));
88
89 ctl = addr_encode << IGU_CTRL_REG_ADDRESS_SHIFT |
90 func_encode << IGU_CTRL_REG_FID_SHIFT |
91 IGU_CTRL_CMD_TYPE_WR << IGU_CTRL_REG_TYPE_SHIFT;
92
93 DP(NETIF_MSG_HW, "write 0x%08x to IGU(via GRC) addr 0x%x\n",
94 cmd_data.sb_id_and_flags, igu_addr_data);
95 REG_WR(bp, igu_addr_data, cmd_data.sb_id_and_flags);
96 mmiowb();
97 barrier();
98
99 DP(NETIF_MSG_HW, "write 0x%08x to IGU(via GRC) addr 0x%x\n",
100 ctl, igu_addr_ctl);
101 REG_WR(bp, igu_addr_ctl, ctl);
102 mmiowb();
103 barrier();
104 }
105 /* VFOP - VF slow-path operation support */
106
107 #define BNX2X_VFOP_FILTER_ADD_CNT_MAX 0x10000
108
109 /* VFOP operations states */
110 enum bnx2x_vfop_qctor_state {
111 BNX2X_VFOP_QCTOR_INIT,
112 BNX2X_VFOP_QCTOR_SETUP,
113 BNX2X_VFOP_QCTOR_INT_EN
114 };
115
116 enum bnx2x_vfop_qdtor_state {
117 BNX2X_VFOP_QDTOR_HALT,
118 BNX2X_VFOP_QDTOR_TERMINATE,
119 BNX2X_VFOP_QDTOR_CFCDEL,
120 BNX2X_VFOP_QDTOR_DONE
121 };
122
123 enum bnx2x_vfop_vlan_mac_state {
124 BNX2X_VFOP_VLAN_MAC_CONFIG_SINGLE,
125 BNX2X_VFOP_VLAN_MAC_CLEAR,
126 BNX2X_VFOP_VLAN_MAC_CHK_DONE,
127 BNX2X_VFOP_MAC_CONFIG_LIST,
128 BNX2X_VFOP_VLAN_CONFIG_LIST,
129 BNX2X_VFOP_VLAN_CONFIG_LIST_0
130 };
131
132 enum bnx2x_vfop_qsetup_state {
133 BNX2X_VFOP_QSETUP_CTOR,
134 BNX2X_VFOP_QSETUP_VLAN0,
135 BNX2X_VFOP_QSETUP_DONE
136 };
137
138 enum bnx2x_vfop_mcast_state {
139 BNX2X_VFOP_MCAST_DEL,
140 BNX2X_VFOP_MCAST_ADD,
141 BNX2X_VFOP_MCAST_CHK_DONE
142 };
143 enum bnx2x_vfop_qflr_state {
144 BNX2X_VFOP_QFLR_CLR_VLAN,
145 BNX2X_VFOP_QFLR_CLR_MAC,
146 BNX2X_VFOP_QFLR_TERMINATE,
147 BNX2X_VFOP_QFLR_DONE
148 };
149
150 enum bnx2x_vfop_flr_state {
151 BNX2X_VFOP_FLR_QUEUES,
152 BNX2X_VFOP_FLR_HW
153 };
154
155 enum bnx2x_vfop_close_state {
156 BNX2X_VFOP_CLOSE_QUEUES,
157 BNX2X_VFOP_CLOSE_HW
158 };
159
160 enum bnx2x_vfop_rxmode_state {
161 BNX2X_VFOP_RXMODE_CONFIG,
162 BNX2X_VFOP_RXMODE_DONE
163 };
164
165 enum bnx2x_vfop_qteardown_state {
166 BNX2X_VFOP_QTEARDOWN_RXMODE,
167 BNX2X_VFOP_QTEARDOWN_CLR_VLAN,
168 BNX2X_VFOP_QTEARDOWN_CLR_MAC,
169 BNX2X_VFOP_QTEARDOWN_QDTOR,
170 BNX2X_VFOP_QTEARDOWN_DONE
171 };
172
173 enum bnx2x_vfop_rss_state {
174 BNX2X_VFOP_RSS_CONFIG,
175 BNX2X_VFOP_RSS_DONE
176 };
177
178 #define bnx2x_vfop_reset_wq(vf) atomic_set(&vf->op_in_progress, 0)
179
180 void bnx2x_vfop_qctor_dump_tx(struct bnx2x *bp, struct bnx2x_virtf *vf,
181 struct bnx2x_queue_init_params *init_params,
182 struct bnx2x_queue_setup_params *setup_params,
183 u16 q_idx, u16 sb_idx)
184 {
185 DP(BNX2X_MSG_IOV,
186 "VF[%d] Q_SETUP: txq[%d]-- vfsb=%d, sb-index=%d, hc-rate=%d, flags=0x%lx, traffic-type=%d",
187 vf->abs_vfid,
188 q_idx,
189 sb_idx,
190 init_params->tx.sb_cq_index,
191 init_params->tx.hc_rate,
192 setup_params->flags,
193 setup_params->txq_params.traffic_type);
194 }
195
196 void bnx2x_vfop_qctor_dump_rx(struct bnx2x *bp, struct bnx2x_virtf *vf,
197 struct bnx2x_queue_init_params *init_params,
198 struct bnx2x_queue_setup_params *setup_params,
199 u16 q_idx, u16 sb_idx)
200 {
201 struct bnx2x_rxq_setup_params *rxq_params = &setup_params->rxq_params;
202
203 DP(BNX2X_MSG_IOV, "VF[%d] Q_SETUP: rxq[%d]-- vfsb=%d, sb-index=%d, hc-rate=%d, mtu=%d, buf-size=%d\n"
204 "sge-size=%d, max_sge_pkt=%d, tpa-agg-size=%d, flags=0x%lx, drop-flags=0x%x, cache-log=%d\n",
205 vf->abs_vfid,
206 q_idx,
207 sb_idx,
208 init_params->rx.sb_cq_index,
209 init_params->rx.hc_rate,
210 setup_params->gen_params.mtu,
211 rxq_params->buf_sz,
212 rxq_params->sge_buf_sz,
213 rxq_params->max_sges_pkt,
214 rxq_params->tpa_agg_sz,
215 setup_params->flags,
216 rxq_params->drop_flags,
217 rxq_params->cache_line_log);
218 }
219
220 void bnx2x_vfop_qctor_prep(struct bnx2x *bp,
221 struct bnx2x_virtf *vf,
222 struct bnx2x_vf_queue *q,
223 struct bnx2x_vfop_qctor_params *p,
224 unsigned long q_type)
225 {
226 struct bnx2x_queue_init_params *init_p = &p->qstate.params.init;
227 struct bnx2x_queue_setup_params *setup_p = &p->prep_qsetup;
228
229 /* INIT */
230
231 /* Enable host coalescing in the transition to INIT state */
232 if (test_bit(BNX2X_Q_FLG_HC, &init_p->rx.flags))
233 __set_bit(BNX2X_Q_FLG_HC_EN, &init_p->rx.flags);
234
235 if (test_bit(BNX2X_Q_FLG_HC, &init_p->tx.flags))
236 __set_bit(BNX2X_Q_FLG_HC_EN, &init_p->tx.flags);
237
238 /* FW SB ID */
239 init_p->rx.fw_sb_id = vf_igu_sb(vf, q->sb_idx);
240 init_p->tx.fw_sb_id = vf_igu_sb(vf, q->sb_idx);
241
242 /* context */
243 init_p->cxts[0] = q->cxt;
244
245 /* SETUP */
246
247 /* Setup-op general parameters */
248 setup_p->gen_params.spcl_id = vf->sp_cl_id;
249 setup_p->gen_params.stat_id = vfq_stat_id(vf, q);
250
251 /* Setup-op pause params:
252 * Nothing to do, the pause thresholds are set by default to 0 which
253 * effectively turns off the feature for this queue. We don't want
254 * one queue (VF) to interfering with another queue (another VF)
255 */
256 if (vf->cfg_flags & VF_CFG_FW_FC)
257 BNX2X_ERR("No support for pause to VFs (abs_vfid: %d)\n",
258 vf->abs_vfid);
259 /* Setup-op flags:
260 * collect statistics, zero statistics, local-switching, security,
261 * OV for Flex10, RSS and MCAST for leading
262 */
263 if (test_bit(BNX2X_Q_FLG_STATS, &setup_p->flags))
264 __set_bit(BNX2X_Q_FLG_ZERO_STATS, &setup_p->flags);
265
266 /* for VFs, enable tx switching, bd coherency, and mac address
267 * anti-spoofing
268 */
269 __set_bit(BNX2X_Q_FLG_TX_SWITCH, &setup_p->flags);
270 __set_bit(BNX2X_Q_FLG_TX_SEC, &setup_p->flags);
271 __set_bit(BNX2X_Q_FLG_ANTI_SPOOF, &setup_p->flags);
272
273 /* Setup-op rx parameters */
274 if (test_bit(BNX2X_Q_TYPE_HAS_RX, &q_type)) {
275 struct bnx2x_rxq_setup_params *rxq_p = &setup_p->rxq_params;
276
277 rxq_p->cl_qzone_id = vfq_qzone_id(vf, q);
278 rxq_p->fw_sb_id = vf_igu_sb(vf, q->sb_idx);
279 rxq_p->rss_engine_id = FW_VF_HANDLE(vf->abs_vfid);
280
281 if (test_bit(BNX2X_Q_FLG_TPA, &setup_p->flags))
282 rxq_p->max_tpa_queues = BNX2X_VF_MAX_TPA_AGG_QUEUES;
283 }
284
285 /* Setup-op tx parameters */
286 if (test_bit(BNX2X_Q_TYPE_HAS_TX, &q_type)) {
287 setup_p->txq_params.tss_leading_cl_id = vf->leading_rss;
288 setup_p->txq_params.fw_sb_id = vf_igu_sb(vf, q->sb_idx);
289 }
290 }
291
292 /* VFOP queue construction */
293 static void bnx2x_vfop_qctor(struct bnx2x *bp, struct bnx2x_virtf *vf)
294 {
295 struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf);
296 struct bnx2x_vfop_args_qctor *args = &vfop->args.qctor;
297 struct bnx2x_queue_state_params *q_params = &vfop->op_p->qctor.qstate;
298 enum bnx2x_vfop_qctor_state state = vfop->state;
299
300 bnx2x_vfop_reset_wq(vf);
301
302 if (vfop->rc < 0)
303 goto op_err;
304
305 DP(BNX2X_MSG_IOV, "vf[%d] STATE: %d\n", vf->abs_vfid, state);
306
307 switch (state) {
308 case BNX2X_VFOP_QCTOR_INIT:
309
310 /* has this queue already been opened? */
311 if (bnx2x_get_q_logical_state(bp, q_params->q_obj) ==
312 BNX2X_Q_LOGICAL_STATE_ACTIVE) {
313 DP(BNX2X_MSG_IOV,
314 "Entered qctor but queue was already up. Aborting gracefully\n");
315 goto op_done;
316 }
317
318 /* next state */
319 vfop->state = BNX2X_VFOP_QCTOR_SETUP;
320
321 q_params->cmd = BNX2X_Q_CMD_INIT;
322 vfop->rc = bnx2x_queue_state_change(bp, q_params);
323
324 bnx2x_vfop_finalize(vf, vfop->rc, VFOP_CONT);
325
326 case BNX2X_VFOP_QCTOR_SETUP:
327 /* next state */
328 vfop->state = BNX2X_VFOP_QCTOR_INT_EN;
329
330 /* copy pre-prepared setup params to the queue-state params */
331 vfop->op_p->qctor.qstate.params.setup =
332 vfop->op_p->qctor.prep_qsetup;
333
334 q_params->cmd = BNX2X_Q_CMD_SETUP;
335 vfop->rc = bnx2x_queue_state_change(bp, q_params);
336
337 bnx2x_vfop_finalize(vf, vfop->rc, VFOP_CONT);
338
339 case BNX2X_VFOP_QCTOR_INT_EN:
340
341 /* enable interrupts */
342 bnx2x_vf_igu_ack_sb(bp, vf, vf_igu_sb(vf, args->sb_idx),
343 USTORM_ID, 0, IGU_INT_ENABLE, 0);
344 goto op_done;
345 default:
346 bnx2x_vfop_default(state);
347 }
348 op_err:
349 BNX2X_ERR("QCTOR[%d:%d] error: cmd %d, rc %d\n",
350 vf->abs_vfid, args->qid, q_params->cmd, vfop->rc);
351 op_done:
352 bnx2x_vfop_end(bp, vf, vfop);
353 op_pending:
354 return;
355 }
356
357 static int bnx2x_vfop_qctor_cmd(struct bnx2x *bp,
358 struct bnx2x_virtf *vf,
359 struct bnx2x_vfop_cmd *cmd,
360 int qid)
361 {
362 struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
363
364 if (vfop) {
365 vf->op_params.qctor.qstate.q_obj = &bnx2x_vfq(vf, qid, sp_obj);
366
367 vfop->args.qctor.qid = qid;
368 vfop->args.qctor.sb_idx = bnx2x_vfq(vf, qid, sb_idx);
369
370 bnx2x_vfop_opset(BNX2X_VFOP_QCTOR_INIT,
371 bnx2x_vfop_qctor, cmd->done);
372 return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_qctor,
373 cmd->block);
374 }
375 return -ENOMEM;
376 }
377
378 /* VFOP queue destruction */
379 static void bnx2x_vfop_qdtor(struct bnx2x *bp, struct bnx2x_virtf *vf)
380 {
381 struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf);
382 struct bnx2x_vfop_args_qdtor *qdtor = &vfop->args.qdtor;
383 struct bnx2x_queue_state_params *q_params = &vfop->op_p->qctor.qstate;
384 enum bnx2x_vfop_qdtor_state state = vfop->state;
385
386 bnx2x_vfop_reset_wq(vf);
387
388 if (vfop->rc < 0)
389 goto op_err;
390
391 DP(BNX2X_MSG_IOV, "vf[%d] STATE: %d\n", vf->abs_vfid, state);
392
393 switch (state) {
394 case BNX2X_VFOP_QDTOR_HALT:
395
396 /* has this queue already been stopped? */
397 if (bnx2x_get_q_logical_state(bp, q_params->q_obj) ==
398 BNX2X_Q_LOGICAL_STATE_STOPPED) {
399 DP(BNX2X_MSG_IOV,
400 "Entered qdtor but queue was already stopped. Aborting gracefully\n");
401
402 /* next state */
403 vfop->state = BNX2X_VFOP_QDTOR_DONE;
404
405 bnx2x_vfop_finalize(vf, vfop->rc, VFOP_CONT);
406 }
407
408 /* next state */
409 vfop->state = BNX2X_VFOP_QDTOR_TERMINATE;
410
411 q_params->cmd = BNX2X_Q_CMD_HALT;
412 vfop->rc = bnx2x_queue_state_change(bp, q_params);
413
414 bnx2x_vfop_finalize(vf, vfop->rc, VFOP_CONT);
415
416 case BNX2X_VFOP_QDTOR_TERMINATE:
417 /* next state */
418 vfop->state = BNX2X_VFOP_QDTOR_CFCDEL;
419
420 q_params->cmd = BNX2X_Q_CMD_TERMINATE;
421 vfop->rc = bnx2x_queue_state_change(bp, q_params);
422
423 bnx2x_vfop_finalize(vf, vfop->rc, VFOP_CONT);
424
425 case BNX2X_VFOP_QDTOR_CFCDEL:
426 /* next state */
427 vfop->state = BNX2X_VFOP_QDTOR_DONE;
428
429 q_params->cmd = BNX2X_Q_CMD_CFC_DEL;
430 vfop->rc = bnx2x_queue_state_change(bp, q_params);
431
432 bnx2x_vfop_finalize(vf, vfop->rc, VFOP_DONE);
433 op_err:
434 BNX2X_ERR("QDTOR[%d:%d] error: cmd %d, rc %d\n",
435 vf->abs_vfid, qdtor->qid, q_params->cmd, vfop->rc);
436 op_done:
437 case BNX2X_VFOP_QDTOR_DONE:
438 /* invalidate the context */
439 if (qdtor->cxt) {
440 qdtor->cxt->ustorm_ag_context.cdu_usage = 0;
441 qdtor->cxt->xstorm_ag_context.cdu_reserved = 0;
442 }
443 bnx2x_vfop_end(bp, vf, vfop);
444 return;
445 default:
446 bnx2x_vfop_default(state);
447 }
448 op_pending:
449 return;
450 }
451
452 static int bnx2x_vfop_qdtor_cmd(struct bnx2x *bp,
453 struct bnx2x_virtf *vf,
454 struct bnx2x_vfop_cmd *cmd,
455 int qid)
456 {
457 struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
458
459 if (vfop) {
460 struct bnx2x_queue_state_params *qstate =
461 &vf->op_params.qctor.qstate;
462
463 memset(qstate, 0, sizeof(*qstate));
464 qstate->q_obj = &bnx2x_vfq(vf, qid, sp_obj);
465
466 vfop->args.qdtor.qid = qid;
467 vfop->args.qdtor.cxt = bnx2x_vfq(vf, qid, cxt);
468
469 bnx2x_vfop_opset(BNX2X_VFOP_QDTOR_HALT,
470 bnx2x_vfop_qdtor, cmd->done);
471 return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_qdtor,
472 cmd->block);
473 }
474 DP(BNX2X_MSG_IOV, "VF[%d] failed to add a vfop. rc %d\n",
475 vf->abs_vfid, vfop->rc);
476 return -ENOMEM;
477 }
478
479 static void
480 bnx2x_vf_set_igu_info(struct bnx2x *bp, u8 igu_sb_id, u8 abs_vfid)
481 {
482 struct bnx2x_virtf *vf = bnx2x_vf_by_abs_fid(bp, abs_vfid);
483 if (vf) {
484 /* the first igu entry belonging to VFs of this PF */
485 if (!BP_VFDB(bp)->first_vf_igu_entry)
486 BP_VFDB(bp)->first_vf_igu_entry = igu_sb_id;
487
488 /* the first igu entry belonging to this VF */
489 if (!vf_sb_count(vf))
490 vf->igu_base_id = igu_sb_id;
491
492 ++vf_sb_count(vf);
493 ++vf->sb_count;
494 }
495 BP_VFDB(bp)->vf_sbs_pool++;
496 }
497
498 /* VFOP MAC/VLAN helpers */
499 static inline void bnx2x_vfop_credit(struct bnx2x *bp,
500 struct bnx2x_vfop *vfop,
501 struct bnx2x_vlan_mac_obj *obj)
502 {
503 struct bnx2x_vfop_args_filters *args = &vfop->args.filters;
504
505 /* update credit only if there is no error
506 * and a valid credit counter
507 */
508 if (!vfop->rc && args->credit) {
509 struct list_head *pos;
510 int read_lock;
511 int cnt = 0;
512
513 read_lock = bnx2x_vlan_mac_h_read_lock(bp, obj);
514 if (read_lock)
515 DP(BNX2X_MSG_SP, "Failed to take vlan mac read head; continuing anyway\n");
516
517 list_for_each(pos, &obj->head)
518 cnt++;
519
520 if (!read_lock)
521 bnx2x_vlan_mac_h_read_unlock(bp, obj);
522
523 atomic_set(args->credit, cnt);
524 }
525 }
526
527 static int bnx2x_vfop_set_user_req(struct bnx2x *bp,
528 struct bnx2x_vfop_filter *pos,
529 struct bnx2x_vlan_mac_data *user_req)
530 {
531 user_req->cmd = pos->add ? BNX2X_VLAN_MAC_ADD :
532 BNX2X_VLAN_MAC_DEL;
533
534 switch (pos->type) {
535 case BNX2X_VFOP_FILTER_MAC:
536 memcpy(user_req->u.mac.mac, pos->mac, ETH_ALEN);
537 break;
538 case BNX2X_VFOP_FILTER_VLAN:
539 user_req->u.vlan.vlan = pos->vid;
540 break;
541 default:
542 BNX2X_ERR("Invalid filter type, skipping\n");
543 return 1;
544 }
545 return 0;
546 }
547
548 static int bnx2x_vfop_config_list(struct bnx2x *bp,
549 struct bnx2x_vfop_filters *filters,
550 struct bnx2x_vlan_mac_ramrod_params *vlan_mac)
551 {
552 struct bnx2x_vfop_filter *pos, *tmp;
553 struct list_head rollback_list, *filters_list = &filters->head;
554 struct bnx2x_vlan_mac_data *user_req = &vlan_mac->user_req;
555 int rc = 0, cnt = 0;
556
557 INIT_LIST_HEAD(&rollback_list);
558
559 list_for_each_entry_safe(pos, tmp, filters_list, link) {
560 if (bnx2x_vfop_set_user_req(bp, pos, user_req))
561 continue;
562
563 rc = bnx2x_config_vlan_mac(bp, vlan_mac);
564 if (rc >= 0) {
565 cnt += pos->add ? 1 : -1;
566 list_move(&pos->link, &rollback_list);
567 rc = 0;
568 } else if (rc == -EEXIST) {
569 rc = 0;
570 } else {
571 BNX2X_ERR("Failed to add a new vlan_mac command\n");
572 break;
573 }
574 }
575
576 /* rollback if error or too many rules added */
577 if (rc || cnt > filters->add_cnt) {
578 BNX2X_ERR("error or too many rules added. Performing rollback\n");
579 list_for_each_entry_safe(pos, tmp, &rollback_list, link) {
580 pos->add = !pos->add; /* reverse op */
581 bnx2x_vfop_set_user_req(bp, pos, user_req);
582 bnx2x_config_vlan_mac(bp, vlan_mac);
583 list_del(&pos->link);
584 }
585 cnt = 0;
586 if (!rc)
587 rc = -EINVAL;
588 }
589 filters->add_cnt = cnt;
590 return rc;
591 }
592
593 /* VFOP set VLAN/MAC */
594 static void bnx2x_vfop_vlan_mac(struct bnx2x *bp, struct bnx2x_virtf *vf)
595 {
596 struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf);
597 struct bnx2x_vlan_mac_ramrod_params *vlan_mac = &vfop->op_p->vlan_mac;
598 struct bnx2x_vlan_mac_obj *obj = vlan_mac->vlan_mac_obj;
599 struct bnx2x_vfop_filters *filters = vfop->args.filters.multi_filter;
600
601 enum bnx2x_vfop_vlan_mac_state state = vfop->state;
602
603 if (vfop->rc < 0)
604 goto op_err;
605
606 DP(BNX2X_MSG_IOV, "vf[%d] STATE: %d\n", vf->abs_vfid, state);
607
608 bnx2x_vfop_reset_wq(vf);
609
610 switch (state) {
611 case BNX2X_VFOP_VLAN_MAC_CLEAR:
612 /* next state */
613 vfop->state = BNX2X_VFOP_VLAN_MAC_CHK_DONE;
614
615 /* do delete */
616 vfop->rc = obj->delete_all(bp, obj,
617 &vlan_mac->user_req.vlan_mac_flags,
618 &vlan_mac->ramrod_flags);
619
620 bnx2x_vfop_finalize(vf, vfop->rc, VFOP_DONE);
621
622 case BNX2X_VFOP_VLAN_MAC_CONFIG_SINGLE:
623 /* next state */
624 vfop->state = BNX2X_VFOP_VLAN_MAC_CHK_DONE;
625
626 /* do config */
627 vfop->rc = bnx2x_config_vlan_mac(bp, vlan_mac);
628 if (vfop->rc == -EEXIST)
629 vfop->rc = 0;
630
631 bnx2x_vfop_finalize(vf, vfop->rc, VFOP_DONE);
632
633 case BNX2X_VFOP_VLAN_MAC_CHK_DONE:
634 vfop->rc = !!obj->raw.check_pending(&obj->raw);
635 bnx2x_vfop_finalize(vf, vfop->rc, VFOP_DONE);
636
637 case BNX2X_VFOP_MAC_CONFIG_LIST:
638 /* next state */
639 vfop->state = BNX2X_VFOP_VLAN_MAC_CHK_DONE;
640
641 /* do list config */
642 vfop->rc = bnx2x_vfop_config_list(bp, filters, vlan_mac);
643 if (vfop->rc)
644 goto op_err;
645
646 set_bit(RAMROD_CONT, &vlan_mac->ramrod_flags);
647 vfop->rc = bnx2x_config_vlan_mac(bp, vlan_mac);
648 bnx2x_vfop_finalize(vf, vfop->rc, VFOP_DONE);
649
650 case BNX2X_VFOP_VLAN_CONFIG_LIST:
651 /* next state */
652 vfop->state = BNX2X_VFOP_VLAN_MAC_CHK_DONE;
653
654 /* do list config */
655 vfop->rc = bnx2x_vfop_config_list(bp, filters, vlan_mac);
656 if (!vfop->rc) {
657 set_bit(RAMROD_CONT, &vlan_mac->ramrod_flags);
658 vfop->rc = bnx2x_config_vlan_mac(bp, vlan_mac);
659 }
660 bnx2x_vfop_finalize(vf, vfop->rc, VFOP_DONE);
661
662 default:
663 bnx2x_vfop_default(state);
664 }
665 op_err:
666 BNX2X_ERR("VLAN-MAC error: rc %d\n", vfop->rc);
667 op_done:
668 kfree(filters);
669 bnx2x_vfop_credit(bp, vfop, obj);
670 bnx2x_vfop_end(bp, vf, vfop);
671 op_pending:
672 return;
673 }
674
675 struct bnx2x_vfop_vlan_mac_flags {
676 bool drv_only;
677 bool dont_consume;
678 bool single_cmd;
679 bool add;
680 };
681
682 static void
683 bnx2x_vfop_vlan_mac_prep_ramrod(struct bnx2x_vlan_mac_ramrod_params *ramrod,
684 struct bnx2x_vfop_vlan_mac_flags *flags)
685 {
686 struct bnx2x_vlan_mac_data *ureq = &ramrod->user_req;
687
688 memset(ramrod, 0, sizeof(*ramrod));
689
690 /* ramrod flags */
691 if (flags->drv_only)
692 set_bit(RAMROD_DRV_CLR_ONLY, &ramrod->ramrod_flags);
693 if (flags->single_cmd)
694 set_bit(RAMROD_EXEC, &ramrod->ramrod_flags);
695
696 /* mac_vlan flags */
697 if (flags->dont_consume)
698 set_bit(BNX2X_DONT_CONSUME_CAM_CREDIT, &ureq->vlan_mac_flags);
699
700 /* cmd */
701 ureq->cmd = flags->add ? BNX2X_VLAN_MAC_ADD : BNX2X_VLAN_MAC_DEL;
702 }
703
704 static inline void
705 bnx2x_vfop_mac_prep_ramrod(struct bnx2x_vlan_mac_ramrod_params *ramrod,
706 struct bnx2x_vfop_vlan_mac_flags *flags)
707 {
708 bnx2x_vfop_vlan_mac_prep_ramrod(ramrod, flags);
709 set_bit(BNX2X_ETH_MAC, &ramrod->user_req.vlan_mac_flags);
710 }
711
712 static int bnx2x_vfop_mac_delall_cmd(struct bnx2x *bp,
713 struct bnx2x_virtf *vf,
714 struct bnx2x_vfop_cmd *cmd,
715 int qid, bool drv_only)
716 {
717 struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
718 int rc;
719
720 if (vfop) {
721 struct bnx2x_vfop_args_filters filters = {
722 .multi_filter = NULL, /* single */
723 .credit = NULL, /* consume credit */
724 };
725 struct bnx2x_vfop_vlan_mac_flags flags = {
726 .drv_only = drv_only,
727 .dont_consume = (filters.credit != NULL),
728 .single_cmd = true,
729 .add = false /* don't care */,
730 };
731 struct bnx2x_vlan_mac_ramrod_params *ramrod =
732 &vf->op_params.vlan_mac;
733
734 /* set ramrod params */
735 bnx2x_vfop_mac_prep_ramrod(ramrod, &flags);
736
737 /* set object */
738 rc = validate_vlan_mac(bp, &bnx2x_vfq(vf, qid, mac_obj));
739 if (rc)
740 return rc;
741 ramrod->vlan_mac_obj = &bnx2x_vfq(vf, qid, mac_obj);
742
743 /* set extra args */
744 vfop->args.filters = filters;
745
746 bnx2x_vfop_opset(BNX2X_VFOP_VLAN_MAC_CLEAR,
747 bnx2x_vfop_vlan_mac, cmd->done);
748 return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_vlan_mac,
749 cmd->block);
750 }
751 return -ENOMEM;
752 }
753
754 int bnx2x_vfop_mac_list_cmd(struct bnx2x *bp,
755 struct bnx2x_virtf *vf,
756 struct bnx2x_vfop_cmd *cmd,
757 struct bnx2x_vfop_filters *macs,
758 int qid, bool drv_only)
759 {
760 struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
761 int rc;
762
763 if (vfop) {
764 struct bnx2x_vfop_args_filters filters = {
765 .multi_filter = macs,
766 .credit = NULL, /* consume credit */
767 };
768 struct bnx2x_vfop_vlan_mac_flags flags = {
769 .drv_only = drv_only,
770 .dont_consume = (filters.credit != NULL),
771 .single_cmd = false,
772 .add = false, /* don't care since only the items in the
773 * filters list affect the sp operation,
774 * not the list itself
775 */
776 };
777 struct bnx2x_vlan_mac_ramrod_params *ramrod =
778 &vf->op_params.vlan_mac;
779
780 /* set ramrod params */
781 bnx2x_vfop_mac_prep_ramrod(ramrod, &flags);
782
783 /* set object */
784 rc = validate_vlan_mac(bp, &bnx2x_vfq(vf, qid, mac_obj));
785 if (rc)
786 return rc;
787 ramrod->vlan_mac_obj = &bnx2x_vfq(vf, qid, mac_obj);
788
789 /* set extra args */
790 filters.multi_filter->add_cnt = BNX2X_VFOP_FILTER_ADD_CNT_MAX;
791 vfop->args.filters = filters;
792
793 bnx2x_vfop_opset(BNX2X_VFOP_MAC_CONFIG_LIST,
794 bnx2x_vfop_vlan_mac, cmd->done);
795 return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_vlan_mac,
796 cmd->block);
797 }
798 return -ENOMEM;
799 }
800
801 int bnx2x_vfop_vlan_set_cmd(struct bnx2x *bp,
802 struct bnx2x_virtf *vf,
803 struct bnx2x_vfop_cmd *cmd,
804 int qid, u16 vid, bool add)
805 {
806 struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
807 int rc;
808
809 if (vfop) {
810 struct bnx2x_vfop_args_filters filters = {
811 .multi_filter = NULL, /* single command */
812 .credit = &bnx2x_vfq(vf, qid, vlan_count),
813 };
814 struct bnx2x_vfop_vlan_mac_flags flags = {
815 .drv_only = false,
816 .dont_consume = (filters.credit != NULL),
817 .single_cmd = true,
818 .add = add,
819 };
820 struct bnx2x_vlan_mac_ramrod_params *ramrod =
821 &vf->op_params.vlan_mac;
822
823 /* set ramrod params */
824 bnx2x_vfop_vlan_mac_prep_ramrod(ramrod, &flags);
825 ramrod->user_req.u.vlan.vlan = vid;
826
827 /* set object */
828 rc = validate_vlan_mac(bp, &bnx2x_vfq(vf, qid, vlan_obj));
829 if (rc)
830 return rc;
831 ramrod->vlan_mac_obj = &bnx2x_vfq(vf, qid, vlan_obj);
832
833 /* set extra args */
834 vfop->args.filters = filters;
835
836 bnx2x_vfop_opset(BNX2X_VFOP_VLAN_MAC_CONFIG_SINGLE,
837 bnx2x_vfop_vlan_mac, cmd->done);
838 return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_vlan_mac,
839 cmd->block);
840 }
841 return -ENOMEM;
842 }
843
844 static int bnx2x_vfop_vlan_delall_cmd(struct bnx2x *bp,
845 struct bnx2x_virtf *vf,
846 struct bnx2x_vfop_cmd *cmd,
847 int qid, bool drv_only)
848 {
849 struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
850 int rc;
851
852 if (vfop) {
853 struct bnx2x_vfop_args_filters filters = {
854 .multi_filter = NULL, /* single command */
855 .credit = &bnx2x_vfq(vf, qid, vlan_count),
856 };
857 struct bnx2x_vfop_vlan_mac_flags flags = {
858 .drv_only = drv_only,
859 .dont_consume = (filters.credit != NULL),
860 .single_cmd = true,
861 .add = false, /* don't care */
862 };
863 struct bnx2x_vlan_mac_ramrod_params *ramrod =
864 &vf->op_params.vlan_mac;
865
866 /* set ramrod params */
867 bnx2x_vfop_vlan_mac_prep_ramrod(ramrod, &flags);
868
869 /* set object */
870 rc = validate_vlan_mac(bp, &bnx2x_vfq(vf, qid, vlan_obj));
871 if (rc)
872 return rc;
873 ramrod->vlan_mac_obj = &bnx2x_vfq(vf, qid, vlan_obj);
874
875 /* set extra args */
876 vfop->args.filters = filters;
877
878 bnx2x_vfop_opset(BNX2X_VFOP_VLAN_MAC_CLEAR,
879 bnx2x_vfop_vlan_mac, cmd->done);
880 return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_vlan_mac,
881 cmd->block);
882 }
883 return -ENOMEM;
884 }
885
886 int bnx2x_vfop_vlan_list_cmd(struct bnx2x *bp,
887 struct bnx2x_virtf *vf,
888 struct bnx2x_vfop_cmd *cmd,
889 struct bnx2x_vfop_filters *vlans,
890 int qid, bool drv_only)
891 {
892 struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
893 int rc;
894
895 if (vfop) {
896 struct bnx2x_vfop_args_filters filters = {
897 .multi_filter = vlans,
898 .credit = &bnx2x_vfq(vf, qid, vlan_count),
899 };
900 struct bnx2x_vfop_vlan_mac_flags flags = {
901 .drv_only = drv_only,
902 .dont_consume = (filters.credit != NULL),
903 .single_cmd = false,
904 .add = false, /* don't care */
905 };
906 struct bnx2x_vlan_mac_ramrod_params *ramrod =
907 &vf->op_params.vlan_mac;
908
909 /* set ramrod params */
910 bnx2x_vfop_vlan_mac_prep_ramrod(ramrod, &flags);
911
912 /* set object */
913 rc = validate_vlan_mac(bp, &bnx2x_vfq(vf, qid, vlan_obj));
914 if (rc)
915 return rc;
916 ramrod->vlan_mac_obj = &bnx2x_vfq(vf, qid, vlan_obj);
917
918 /* set extra args */
919 filters.multi_filter->add_cnt = vf_vlan_rules_cnt(vf) -
920 atomic_read(filters.credit);
921
922 vfop->args.filters = filters;
923
924 bnx2x_vfop_opset(BNX2X_VFOP_VLAN_CONFIG_LIST,
925 bnx2x_vfop_vlan_mac, cmd->done);
926 return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_vlan_mac,
927 cmd->block);
928 }
929 return -ENOMEM;
930 }
931
932 /* VFOP queue setup (queue constructor + set vlan 0) */
933 static void bnx2x_vfop_qsetup(struct bnx2x *bp, struct bnx2x_virtf *vf)
934 {
935 struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf);
936 int qid = vfop->args.qctor.qid;
937 enum bnx2x_vfop_qsetup_state state = vfop->state;
938 struct bnx2x_vfop_cmd cmd = {
939 .done = bnx2x_vfop_qsetup,
940 .block = false,
941 };
942
943 if (vfop->rc < 0)
944 goto op_err;
945
946 DP(BNX2X_MSG_IOV, "vf[%d] STATE: %d\n", vf->abs_vfid, state);
947
948 switch (state) {
949 case BNX2X_VFOP_QSETUP_CTOR:
950 /* init the queue ctor command */
951 vfop->state = BNX2X_VFOP_QSETUP_VLAN0;
952 vfop->rc = bnx2x_vfop_qctor_cmd(bp, vf, &cmd, qid);
953 if (vfop->rc)
954 goto op_err;
955 return;
956
957 case BNX2X_VFOP_QSETUP_VLAN0:
958 /* skip if non-leading or FPGA/EMU*/
959 if (qid)
960 goto op_done;
961
962 /* init the queue set-vlan command (for vlan 0) */
963 vfop->state = BNX2X_VFOP_QSETUP_DONE;
964 vfop->rc = bnx2x_vfop_vlan_set_cmd(bp, vf, &cmd, qid, 0, true);
965 if (vfop->rc)
966 goto op_err;
967 return;
968 op_err:
969 BNX2X_ERR("QSETUP[%d:%d] error: rc %d\n", vf->abs_vfid, qid, vfop->rc);
970 op_done:
971 case BNX2X_VFOP_QSETUP_DONE:
972 vf->cfg_flags |= VF_CFG_VLAN;
973 smp_mb__before_clear_bit();
974 set_bit(BNX2X_SP_RTNL_HYPERVISOR_VLAN,
975 &bp->sp_rtnl_state);
976 smp_mb__after_clear_bit();
977 schedule_delayed_work(&bp->sp_rtnl_task, 0);
978 bnx2x_vfop_end(bp, vf, vfop);
979 return;
980 default:
981 bnx2x_vfop_default(state);
982 }
983 }
984
985 int bnx2x_vfop_qsetup_cmd(struct bnx2x *bp,
986 struct bnx2x_virtf *vf,
987 struct bnx2x_vfop_cmd *cmd,
988 int qid)
989 {
990 struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
991
992 if (vfop) {
993 vfop->args.qctor.qid = qid;
994
995 bnx2x_vfop_opset(BNX2X_VFOP_QSETUP_CTOR,
996 bnx2x_vfop_qsetup, cmd->done);
997 return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_qsetup,
998 cmd->block);
999 }
1000 return -ENOMEM;
1001 }
1002
1003 /* VFOP queue FLR handling (clear vlans, clear macs, queue destructor) */
1004 static void bnx2x_vfop_qflr(struct bnx2x *bp, struct bnx2x_virtf *vf)
1005 {
1006 struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf);
1007 int qid = vfop->args.qx.qid;
1008 enum bnx2x_vfop_qflr_state state = vfop->state;
1009 struct bnx2x_queue_state_params *qstate;
1010 struct bnx2x_vfop_cmd cmd;
1011
1012 bnx2x_vfop_reset_wq(vf);
1013
1014 if (vfop->rc < 0)
1015 goto op_err;
1016
1017 DP(BNX2X_MSG_IOV, "VF[%d] STATE: %d\n", vf->abs_vfid, state);
1018
1019 cmd.done = bnx2x_vfop_qflr;
1020 cmd.block = false;
1021
1022 switch (state) {
1023 case BNX2X_VFOP_QFLR_CLR_VLAN:
1024 /* vlan-clear-all: driver-only, don't consume credit */
1025 vfop->state = BNX2X_VFOP_QFLR_CLR_MAC;
1026 if (!validate_vlan_mac(bp, &bnx2x_vfq(vf, qid, vlan_obj)))
1027 vfop->rc = bnx2x_vfop_vlan_delall_cmd(bp, vf, &cmd, qid,
1028 true);
1029 if (vfop->rc)
1030 goto op_err;
1031 bnx2x_vfop_finalize(vf, vfop->rc, VFOP_CONT);
1032
1033 case BNX2X_VFOP_QFLR_CLR_MAC:
1034 /* mac-clear-all: driver only consume credit */
1035 vfop->state = BNX2X_VFOP_QFLR_TERMINATE;
1036 if (!validate_vlan_mac(bp, &bnx2x_vfq(vf, qid, mac_obj)))
1037 vfop->rc = bnx2x_vfop_mac_delall_cmd(bp, vf, &cmd, qid,
1038 true);
1039 DP(BNX2X_MSG_IOV,
1040 "VF[%d] vfop->rc after bnx2x_vfop_mac_delall_cmd was %d",
1041 vf->abs_vfid, vfop->rc);
1042 if (vfop->rc)
1043 goto op_err;
1044 bnx2x_vfop_finalize(vf, vfop->rc, VFOP_CONT);
1045
1046 case BNX2X_VFOP_QFLR_TERMINATE:
1047 qstate = &vfop->op_p->qctor.qstate;
1048 memset(qstate , 0, sizeof(*qstate));
1049 qstate->q_obj = &bnx2x_vfq(vf, qid, sp_obj);
1050 vfop->state = BNX2X_VFOP_QFLR_DONE;
1051
1052 DP(BNX2X_MSG_IOV, "VF[%d] qstate during flr was %d\n",
1053 vf->abs_vfid, qstate->q_obj->state);
1054
1055 if (qstate->q_obj->state != BNX2X_Q_STATE_RESET) {
1056 qstate->q_obj->state = BNX2X_Q_STATE_STOPPED;
1057 qstate->cmd = BNX2X_Q_CMD_TERMINATE;
1058 vfop->rc = bnx2x_queue_state_change(bp, qstate);
1059 bnx2x_vfop_finalize(vf, vfop->rc, VFOP_VERIFY_PEND);
1060 } else {
1061 goto op_done;
1062 }
1063
1064 op_err:
1065 BNX2X_ERR("QFLR[%d:%d] error: rc %d\n",
1066 vf->abs_vfid, qid, vfop->rc);
1067 op_done:
1068 case BNX2X_VFOP_QFLR_DONE:
1069 bnx2x_vfop_end(bp, vf, vfop);
1070 return;
1071 default:
1072 bnx2x_vfop_default(state);
1073 }
1074 op_pending:
1075 return;
1076 }
1077
1078 static int bnx2x_vfop_qflr_cmd(struct bnx2x *bp,
1079 struct bnx2x_virtf *vf,
1080 struct bnx2x_vfop_cmd *cmd,
1081 int qid)
1082 {
1083 struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
1084
1085 if (vfop) {
1086 vfop->args.qx.qid = qid;
1087 bnx2x_vfop_opset(BNX2X_VFOP_QFLR_CLR_VLAN,
1088 bnx2x_vfop_qflr, cmd->done);
1089 return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_qflr,
1090 cmd->block);
1091 }
1092 return -ENOMEM;
1093 }
1094
1095 /* VFOP multi-casts */
1096 static void bnx2x_vfop_mcast(struct bnx2x *bp, struct bnx2x_virtf *vf)
1097 {
1098 struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf);
1099 struct bnx2x_mcast_ramrod_params *mcast = &vfop->op_p->mcast;
1100 struct bnx2x_raw_obj *raw = &mcast->mcast_obj->raw;
1101 struct bnx2x_vfop_args_mcast *args = &vfop->args.mc_list;
1102 enum bnx2x_vfop_mcast_state state = vfop->state;
1103 int i;
1104
1105 bnx2x_vfop_reset_wq(vf);
1106
1107 if (vfop->rc < 0)
1108 goto op_err;
1109
1110 DP(BNX2X_MSG_IOV, "vf[%d] STATE: %d\n", vf->abs_vfid, state);
1111
1112 switch (state) {
1113 case BNX2X_VFOP_MCAST_DEL:
1114 /* clear existing mcasts */
1115 vfop->state = BNX2X_VFOP_MCAST_ADD;
1116 vfop->rc = bnx2x_config_mcast(bp, mcast, BNX2X_MCAST_CMD_DEL);
1117 bnx2x_vfop_finalize(vf, vfop->rc, VFOP_CONT);
1118
1119 case BNX2X_VFOP_MCAST_ADD:
1120 if (raw->check_pending(raw))
1121 goto op_pending;
1122
1123 if (args->mc_num) {
1124 /* update mcast list on the ramrod params */
1125 INIT_LIST_HEAD(&mcast->mcast_list);
1126 for (i = 0; i < args->mc_num; i++)
1127 list_add_tail(&(args->mc[i].link),
1128 &mcast->mcast_list);
1129 /* add new mcasts */
1130 vfop->state = BNX2X_VFOP_MCAST_CHK_DONE;
1131 vfop->rc = bnx2x_config_mcast(bp, mcast,
1132 BNX2X_MCAST_CMD_ADD);
1133 }
1134 bnx2x_vfop_finalize(vf, vfop->rc, VFOP_DONE);
1135
1136 case BNX2X_VFOP_MCAST_CHK_DONE:
1137 vfop->rc = raw->check_pending(raw) ? 1 : 0;
1138 bnx2x_vfop_finalize(vf, vfop->rc, VFOP_DONE);
1139 default:
1140 bnx2x_vfop_default(state);
1141 }
1142 op_err:
1143 BNX2X_ERR("MCAST CONFIG error: rc %d\n", vfop->rc);
1144 op_done:
1145 kfree(args->mc);
1146 bnx2x_vfop_end(bp, vf, vfop);
1147 op_pending:
1148 return;
1149 }
1150
1151 int bnx2x_vfop_mcast_cmd(struct bnx2x *bp,
1152 struct bnx2x_virtf *vf,
1153 struct bnx2x_vfop_cmd *cmd,
1154 bnx2x_mac_addr_t *mcasts,
1155 int mcast_num, bool drv_only)
1156 {
1157 struct bnx2x_vfop *vfop = NULL;
1158 size_t mc_sz = mcast_num * sizeof(struct bnx2x_mcast_list_elem);
1159 struct bnx2x_mcast_list_elem *mc = mc_sz ? kzalloc(mc_sz, GFP_KERNEL) :
1160 NULL;
1161
1162 if (!mc_sz || mc) {
1163 vfop = bnx2x_vfop_add(bp, vf);
1164 if (vfop) {
1165 int i;
1166 struct bnx2x_mcast_ramrod_params *ramrod =
1167 &vf->op_params.mcast;
1168
1169 /* set ramrod params */
1170 memset(ramrod, 0, sizeof(*ramrod));
1171 ramrod->mcast_obj = &vf->mcast_obj;
1172 if (drv_only)
1173 set_bit(RAMROD_DRV_CLR_ONLY,
1174 &ramrod->ramrod_flags);
1175
1176 /* copy mcasts pointers */
1177 vfop->args.mc_list.mc_num = mcast_num;
1178 vfop->args.mc_list.mc = mc;
1179 for (i = 0; i < mcast_num; i++)
1180 mc[i].mac = mcasts[i];
1181
1182 bnx2x_vfop_opset(BNX2X_VFOP_MCAST_DEL,
1183 bnx2x_vfop_mcast, cmd->done);
1184 return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_mcast,
1185 cmd->block);
1186 } else {
1187 kfree(mc);
1188 }
1189 }
1190 return -ENOMEM;
1191 }
1192
1193 /* VFOP rx-mode */
1194 static void bnx2x_vfop_rxmode(struct bnx2x *bp, struct bnx2x_virtf *vf)
1195 {
1196 struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf);
1197 struct bnx2x_rx_mode_ramrod_params *ramrod = &vfop->op_p->rx_mode;
1198 enum bnx2x_vfop_rxmode_state state = vfop->state;
1199
1200 bnx2x_vfop_reset_wq(vf);
1201
1202 if (vfop->rc < 0)
1203 goto op_err;
1204
1205 DP(BNX2X_MSG_IOV, "vf[%d] STATE: %d\n", vf->abs_vfid, state);
1206
1207 switch (state) {
1208 case BNX2X_VFOP_RXMODE_CONFIG:
1209 /* next state */
1210 vfop->state = BNX2X_VFOP_RXMODE_DONE;
1211
1212 vfop->rc = bnx2x_config_rx_mode(bp, ramrod);
1213 bnx2x_vfop_finalize(vf, vfop->rc, VFOP_DONE);
1214 op_err:
1215 BNX2X_ERR("RXMODE error: rc %d\n", vfop->rc);
1216 op_done:
1217 case BNX2X_VFOP_RXMODE_DONE:
1218 bnx2x_vfop_end(bp, vf, vfop);
1219 return;
1220 default:
1221 bnx2x_vfop_default(state);
1222 }
1223 op_pending:
1224 return;
1225 }
1226
1227 int bnx2x_vfop_rxmode_cmd(struct bnx2x *bp,
1228 struct bnx2x_virtf *vf,
1229 struct bnx2x_vfop_cmd *cmd,
1230 int qid, unsigned long accept_flags)
1231 {
1232 struct bnx2x_vf_queue *vfq = vfq_get(vf, qid);
1233 struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
1234
1235 if (vfop) {
1236 struct bnx2x_rx_mode_ramrod_params *ramrod =
1237 &vf->op_params.rx_mode;
1238
1239 memset(ramrod, 0, sizeof(*ramrod));
1240
1241 /* Prepare ramrod parameters */
1242 ramrod->cid = vfq->cid;
1243 ramrod->cl_id = vfq_cl_id(vf, vfq);
1244 ramrod->rx_mode_obj = &bp->rx_mode_obj;
1245 ramrod->func_id = FW_VF_HANDLE(vf->abs_vfid);
1246
1247 ramrod->rx_accept_flags = accept_flags;
1248 ramrod->tx_accept_flags = accept_flags;
1249 ramrod->pstate = &vf->filter_state;
1250 ramrod->state = BNX2X_FILTER_RX_MODE_PENDING;
1251
1252 set_bit(BNX2X_FILTER_RX_MODE_PENDING, &vf->filter_state);
1253 set_bit(RAMROD_RX, &ramrod->ramrod_flags);
1254 set_bit(RAMROD_TX, &ramrod->ramrod_flags);
1255
1256 ramrod->rdata =
1257 bnx2x_vf_sp(bp, vf, rx_mode_rdata.e2);
1258 ramrod->rdata_mapping =
1259 bnx2x_vf_sp_map(bp, vf, rx_mode_rdata.e2);
1260
1261 bnx2x_vfop_opset(BNX2X_VFOP_RXMODE_CONFIG,
1262 bnx2x_vfop_rxmode, cmd->done);
1263 return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_rxmode,
1264 cmd->block);
1265 }
1266 return -ENOMEM;
1267 }
1268
1269 /* VFOP queue tear-down ('drop all' rx-mode, clear vlans, clear macs,
1270 * queue destructor)
1271 */
1272 static void bnx2x_vfop_qdown(struct bnx2x *bp, struct bnx2x_virtf *vf)
1273 {
1274 struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf);
1275 int qid = vfop->args.qx.qid;
1276 enum bnx2x_vfop_qteardown_state state = vfop->state;
1277 struct bnx2x_vfop_cmd cmd;
1278
1279 if (vfop->rc < 0)
1280 goto op_err;
1281
1282 DP(BNX2X_MSG_IOV, "vf[%d] STATE: %d\n", vf->abs_vfid, state);
1283
1284 cmd.done = bnx2x_vfop_qdown;
1285 cmd.block = false;
1286
1287 switch (state) {
1288 case BNX2X_VFOP_QTEARDOWN_RXMODE:
1289 /* Drop all */
1290 vfop->state = BNX2X_VFOP_QTEARDOWN_CLR_VLAN;
1291 vfop->rc = bnx2x_vfop_rxmode_cmd(bp, vf, &cmd, qid, 0);
1292 if (vfop->rc)
1293 goto op_err;
1294 return;
1295
1296 case BNX2X_VFOP_QTEARDOWN_CLR_VLAN:
1297 /* vlan-clear-all: don't consume credit */
1298 vfop->state = BNX2X_VFOP_QTEARDOWN_CLR_MAC;
1299 vfop->rc = bnx2x_vfop_vlan_delall_cmd(bp, vf, &cmd, qid, false);
1300 if (vfop->rc)
1301 goto op_err;
1302 return;
1303
1304 case BNX2X_VFOP_QTEARDOWN_CLR_MAC:
1305 /* mac-clear-all: consume credit */
1306 vfop->state = BNX2X_VFOP_QTEARDOWN_QDTOR;
1307 vfop->rc = bnx2x_vfop_mac_delall_cmd(bp, vf, &cmd, qid, false);
1308 if (vfop->rc)
1309 goto op_err;
1310 return;
1311
1312 case BNX2X_VFOP_QTEARDOWN_QDTOR:
1313 /* run the queue destruction flow */
1314 DP(BNX2X_MSG_IOV, "case: BNX2X_VFOP_QTEARDOWN_QDTOR\n");
1315 vfop->state = BNX2X_VFOP_QTEARDOWN_DONE;
1316 DP(BNX2X_MSG_IOV, "new state: BNX2X_VFOP_QTEARDOWN_DONE\n");
1317 vfop->rc = bnx2x_vfop_qdtor_cmd(bp, vf, &cmd, qid);
1318 DP(BNX2X_MSG_IOV, "returned from cmd\n");
1319 if (vfop->rc)
1320 goto op_err;
1321 return;
1322 op_err:
1323 BNX2X_ERR("QTEARDOWN[%d:%d] error: rc %d\n",
1324 vf->abs_vfid, qid, vfop->rc);
1325
1326 case BNX2X_VFOP_QTEARDOWN_DONE:
1327 bnx2x_vfop_end(bp, vf, vfop);
1328 return;
1329 default:
1330 bnx2x_vfop_default(state);
1331 }
1332 }
1333
1334 int bnx2x_vfop_qdown_cmd(struct bnx2x *bp,
1335 struct bnx2x_virtf *vf,
1336 struct bnx2x_vfop_cmd *cmd,
1337 int qid)
1338 {
1339 struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
1340
1341 /* for non leading queues skip directly to qdown sate */
1342 if (vfop) {
1343 vfop->args.qx.qid = qid;
1344 bnx2x_vfop_opset(qid == LEADING_IDX ?
1345 BNX2X_VFOP_QTEARDOWN_RXMODE :
1346 BNX2X_VFOP_QTEARDOWN_QDTOR, bnx2x_vfop_qdown,
1347 cmd->done);
1348 return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_qdown,
1349 cmd->block);
1350 }
1351
1352 return -ENOMEM;
1353 }
1354
1355 /* VF enable primitives
1356 * when pretend is required the caller is responsible
1357 * for calling pretend prior to calling these routines
1358 */
1359
1360 /* internal vf enable - until vf is enabled internally all transactions
1361 * are blocked. This routine should always be called last with pretend.
1362 */
1363 static void bnx2x_vf_enable_internal(struct bnx2x *bp, u8 enable)
1364 {
1365 REG_WR(bp, PGLUE_B_REG_INTERNAL_VFID_ENABLE, enable ? 1 : 0);
1366 }
1367
1368 /* clears vf error in all semi blocks */
1369 static void bnx2x_vf_semi_clear_err(struct bnx2x *bp, u8 abs_vfid)
1370 {
1371 REG_WR(bp, TSEM_REG_VFPF_ERR_NUM, abs_vfid);
1372 REG_WR(bp, USEM_REG_VFPF_ERR_NUM, abs_vfid);
1373 REG_WR(bp, CSEM_REG_VFPF_ERR_NUM, abs_vfid);
1374 REG_WR(bp, XSEM_REG_VFPF_ERR_NUM, abs_vfid);
1375 }
1376
1377 static void bnx2x_vf_pglue_clear_err(struct bnx2x *bp, u8 abs_vfid)
1378 {
1379 u32 was_err_group = (2 * BP_PATH(bp) + abs_vfid) >> 5;
1380 u32 was_err_reg = 0;
1381
1382 switch (was_err_group) {
1383 case 0:
1384 was_err_reg = PGLUE_B_REG_WAS_ERROR_VF_31_0_CLR;
1385 break;
1386 case 1:
1387 was_err_reg = PGLUE_B_REG_WAS_ERROR_VF_63_32_CLR;
1388 break;
1389 case 2:
1390 was_err_reg = PGLUE_B_REG_WAS_ERROR_VF_95_64_CLR;
1391 break;
1392 case 3:
1393 was_err_reg = PGLUE_B_REG_WAS_ERROR_VF_127_96_CLR;
1394 break;
1395 }
1396 REG_WR(bp, was_err_reg, 1 << (abs_vfid & 0x1f));
1397 }
1398
1399 static void bnx2x_vf_igu_reset(struct bnx2x *bp, struct bnx2x_virtf *vf)
1400 {
1401 int i;
1402 u32 val;
1403
1404 /* Set VF masks and configuration - pretend */
1405 bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, vf->abs_vfid));
1406
1407 REG_WR(bp, IGU_REG_SB_INT_BEFORE_MASK_LSB, 0);
1408 REG_WR(bp, IGU_REG_SB_INT_BEFORE_MASK_MSB, 0);
1409 REG_WR(bp, IGU_REG_SB_MASK_LSB, 0);
1410 REG_WR(bp, IGU_REG_SB_MASK_MSB, 0);
1411 REG_WR(bp, IGU_REG_PBA_STATUS_LSB, 0);
1412 REG_WR(bp, IGU_REG_PBA_STATUS_MSB, 0);
1413
1414 val = REG_RD(bp, IGU_REG_VF_CONFIGURATION);
1415 val |= (IGU_VF_CONF_FUNC_EN | IGU_VF_CONF_MSI_MSIX_EN);
1416 if (vf->cfg_flags & VF_CFG_INT_SIMD)
1417 val |= IGU_VF_CONF_SINGLE_ISR_EN;
1418 val &= ~IGU_VF_CONF_PARENT_MASK;
1419 val |= BP_FUNC(bp) << IGU_VF_CONF_PARENT_SHIFT; /* parent PF */
1420 REG_WR(bp, IGU_REG_VF_CONFIGURATION, val);
1421
1422 DP(BNX2X_MSG_IOV,
1423 "value in IGU_REG_VF_CONFIGURATION of vf %d after write %x\n",
1424 vf->abs_vfid, REG_RD(bp, IGU_REG_VF_CONFIGURATION));
1425
1426 bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
1427
1428 /* iterate over all queues, clear sb consumer */
1429 for (i = 0; i < vf_sb_count(vf); i++) {
1430 u8 igu_sb_id = vf_igu_sb(vf, i);
1431
1432 /* zero prod memory */
1433 REG_WR(bp, IGU_REG_PROD_CONS_MEMORY + igu_sb_id * 4, 0);
1434
1435 /* clear sb state machine */
1436 bnx2x_igu_clear_sb_gen(bp, vf->abs_vfid, igu_sb_id,
1437 false /* VF */);
1438
1439 /* disable + update */
1440 bnx2x_vf_igu_ack_sb(bp, vf, igu_sb_id, USTORM_ID, 0,
1441 IGU_INT_DISABLE, 1);
1442 }
1443 }
1444
1445 void bnx2x_vf_enable_access(struct bnx2x *bp, u8 abs_vfid)
1446 {
1447 /* set the VF-PF association in the FW */
1448 storm_memset_vf_to_pf(bp, FW_VF_HANDLE(abs_vfid), BP_FUNC(bp));
1449 storm_memset_func_en(bp, FW_VF_HANDLE(abs_vfid), 1);
1450
1451 /* clear vf errors*/
1452 bnx2x_vf_semi_clear_err(bp, abs_vfid);
1453 bnx2x_vf_pglue_clear_err(bp, abs_vfid);
1454
1455 /* internal vf-enable - pretend */
1456 bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, abs_vfid));
1457 DP(BNX2X_MSG_IOV, "enabling internal access for vf %x\n", abs_vfid);
1458 bnx2x_vf_enable_internal(bp, true);
1459 bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
1460 }
1461
1462 static void bnx2x_vf_enable_traffic(struct bnx2x *bp, struct bnx2x_virtf *vf)
1463 {
1464 /* Reset vf in IGU interrupts are still disabled */
1465 bnx2x_vf_igu_reset(bp, vf);
1466
1467 /* pretend to enable the vf with the PBF */
1468 bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, vf->abs_vfid));
1469 REG_WR(bp, PBF_REG_DISABLE_VF, 0);
1470 bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
1471 }
1472
1473 static u8 bnx2x_vf_is_pcie_pending(struct bnx2x *bp, u8 abs_vfid)
1474 {
1475 struct pci_dev *dev;
1476 struct bnx2x_virtf *vf = bnx2x_vf_by_abs_fid(bp, abs_vfid);
1477
1478 if (!vf)
1479 return false;
1480
1481 dev = pci_get_bus_and_slot(vf->bus, vf->devfn);
1482 if (dev)
1483 return bnx2x_is_pcie_pending(dev);
1484 return false;
1485 }
1486
1487 int bnx2x_vf_flr_clnup_epilog(struct bnx2x *bp, u8 abs_vfid)
1488 {
1489 /* Verify no pending pci transactions */
1490 if (bnx2x_vf_is_pcie_pending(bp, abs_vfid))
1491 BNX2X_ERR("PCIE Transactions still pending\n");
1492
1493 return 0;
1494 }
1495
1496 /* must be called after the number of PF queues and the number of VFs are
1497 * both known
1498 */
1499 static void
1500 bnx2x_iov_static_resc(struct bnx2x *bp, struct bnx2x_virtf *vf)
1501 {
1502 struct vf_pf_resc_request *resc = &vf->alloc_resc;
1503 u16 vlan_count = 0;
1504
1505 /* will be set only during VF-ACQUIRE */
1506 resc->num_rxqs = 0;
1507 resc->num_txqs = 0;
1508
1509 /* no credit calculations for macs (just yet) */
1510 resc->num_mac_filters = 1;
1511
1512 /* divvy up vlan rules */
1513 vlan_count = bp->vlans_pool.check(&bp->vlans_pool);
1514 vlan_count = 1 << ilog2(vlan_count);
1515 resc->num_vlan_filters = vlan_count / BNX2X_NR_VIRTFN(bp);
1516
1517 /* no real limitation */
1518 resc->num_mc_filters = 0;
1519
1520 /* num_sbs already set */
1521 resc->num_sbs = vf->sb_count;
1522 }
1523
1524 /* FLR routines: */
1525 static void bnx2x_vf_free_resc(struct bnx2x *bp, struct bnx2x_virtf *vf)
1526 {
1527 /* reset the state variables */
1528 bnx2x_iov_static_resc(bp, vf);
1529 vf->state = VF_FREE;
1530 }
1531
1532 static void bnx2x_vf_flr_clnup_hw(struct bnx2x *bp, struct bnx2x_virtf *vf)
1533 {
1534 u32 poll_cnt = bnx2x_flr_clnup_poll_count(bp);
1535
1536 /* DQ usage counter */
1537 bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, vf->abs_vfid));
1538 bnx2x_flr_clnup_poll_hw_counter(bp, DORQ_REG_VF_USAGE_CNT,
1539 "DQ VF usage counter timed out",
1540 poll_cnt);
1541 bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
1542
1543 /* FW cleanup command - poll for the results */
1544 if (bnx2x_send_final_clnup(bp, (u8)FW_VF_HANDLE(vf->abs_vfid),
1545 poll_cnt))
1546 BNX2X_ERR("VF[%d] Final cleanup timed-out\n", vf->abs_vfid);
1547
1548 /* verify TX hw is flushed */
1549 bnx2x_tx_hw_flushed(bp, poll_cnt);
1550 }
1551
1552 static void bnx2x_vfop_flr(struct bnx2x *bp, struct bnx2x_virtf *vf)
1553 {
1554 struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf);
1555 struct bnx2x_vfop_args_qx *qx = &vfop->args.qx;
1556 enum bnx2x_vfop_flr_state state = vfop->state;
1557 struct bnx2x_vfop_cmd cmd = {
1558 .done = bnx2x_vfop_flr,
1559 .block = false,
1560 };
1561
1562 if (vfop->rc < 0)
1563 goto op_err;
1564
1565 DP(BNX2X_MSG_IOV, "vf[%d] STATE: %d\n", vf->abs_vfid, state);
1566
1567 switch (state) {
1568 case BNX2X_VFOP_FLR_QUEUES:
1569 /* the cleanup operations are valid if and only if the VF
1570 * was first acquired.
1571 */
1572 if (++(qx->qid) < vf_rxq_count(vf)) {
1573 vfop->rc = bnx2x_vfop_qflr_cmd(bp, vf, &cmd,
1574 qx->qid);
1575 if (vfop->rc)
1576 goto op_err;
1577 return;
1578 }
1579 /* remove multicasts */
1580 vfop->state = BNX2X_VFOP_FLR_HW;
1581 vfop->rc = bnx2x_vfop_mcast_cmd(bp, vf, &cmd, NULL,
1582 0, true);
1583 if (vfop->rc)
1584 goto op_err;
1585 return;
1586 case BNX2X_VFOP_FLR_HW:
1587
1588 /* dispatch final cleanup and wait for HW queues to flush */
1589 bnx2x_vf_flr_clnup_hw(bp, vf);
1590
1591 /* release VF resources */
1592 bnx2x_vf_free_resc(bp, vf);
1593
1594 /* re-open the mailbox */
1595 bnx2x_vf_enable_mbx(bp, vf->abs_vfid);
1596
1597 goto op_done;
1598 default:
1599 bnx2x_vfop_default(state);
1600 }
1601 op_err:
1602 BNX2X_ERR("VF[%d] FLR error: rc %d\n", vf->abs_vfid, vfop->rc);
1603 op_done:
1604 vf->flr_clnup_stage = VF_FLR_ACK;
1605 bnx2x_vfop_end(bp, vf, vfop);
1606 bnx2x_unlock_vf_pf_channel(bp, vf, CHANNEL_TLV_FLR);
1607 }
1608
1609 static int bnx2x_vfop_flr_cmd(struct bnx2x *bp,
1610 struct bnx2x_virtf *vf,
1611 vfop_handler_t done)
1612 {
1613 struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
1614 if (vfop) {
1615 vfop->args.qx.qid = -1; /* loop */
1616 bnx2x_vfop_opset(BNX2X_VFOP_FLR_QUEUES,
1617 bnx2x_vfop_flr, done);
1618 return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_flr, false);
1619 }
1620 return -ENOMEM;
1621 }
1622
1623 static void bnx2x_vf_flr_clnup(struct bnx2x *bp, struct bnx2x_virtf *prev_vf)
1624 {
1625 int i = prev_vf ? prev_vf->index + 1 : 0;
1626 struct bnx2x_virtf *vf;
1627
1628 /* find next VF to cleanup */
1629 next_vf_to_clean:
1630 for (;
1631 i < BNX2X_NR_VIRTFN(bp) &&
1632 (bnx2x_vf(bp, i, state) != VF_RESET ||
1633 bnx2x_vf(bp, i, flr_clnup_stage) != VF_FLR_CLN);
1634 i++)
1635 ;
1636
1637 DP(BNX2X_MSG_IOV, "next vf to cleanup: %d. Num of vfs: %d\n", i,
1638 BNX2X_NR_VIRTFN(bp));
1639
1640 if (i < BNX2X_NR_VIRTFN(bp)) {
1641 vf = BP_VF(bp, i);
1642
1643 /* lock the vf pf channel */
1644 bnx2x_lock_vf_pf_channel(bp, vf, CHANNEL_TLV_FLR);
1645
1646 /* invoke the VF FLR SM */
1647 if (bnx2x_vfop_flr_cmd(bp, vf, bnx2x_vf_flr_clnup)) {
1648 BNX2X_ERR("VF[%d]: FLR cleanup failed -ENOMEM\n",
1649 vf->abs_vfid);
1650
1651 /* mark the VF to be ACKED and continue */
1652 vf->flr_clnup_stage = VF_FLR_ACK;
1653 goto next_vf_to_clean;
1654 }
1655 return;
1656 }
1657
1658 /* we are done, update vf records */
1659 for_each_vf(bp, i) {
1660 vf = BP_VF(bp, i);
1661
1662 if (vf->flr_clnup_stage != VF_FLR_ACK)
1663 continue;
1664
1665 vf->flr_clnup_stage = VF_FLR_EPILOG;
1666 }
1667
1668 /* Acknowledge the handled VFs.
1669 * we are acknowledge all the vfs which an flr was requested for, even
1670 * if amongst them there are such that we never opened, since the mcp
1671 * will interrupt us immediately again if we only ack some of the bits,
1672 * resulting in an endless loop. This can happen for example in KVM
1673 * where an 'all ones' flr request is sometimes given by hyper visor
1674 */
1675 DP(BNX2X_MSG_MCP, "DRV_STATUS_VF_DISABLED ACK for vfs 0x%x 0x%x\n",
1676 bp->vfdb->flrd_vfs[0], bp->vfdb->flrd_vfs[1]);
1677 for (i = 0; i < FLRD_VFS_DWORDS; i++)
1678 SHMEM2_WR(bp, drv_ack_vf_disabled[BP_FW_MB_IDX(bp)][i],
1679 bp->vfdb->flrd_vfs[i]);
1680
1681 bnx2x_fw_command(bp, DRV_MSG_CODE_VF_DISABLED_DONE, 0);
1682
1683 /* clear the acked bits - better yet if the MCP implemented
1684 * write to clear semantics
1685 */
1686 for (i = 0; i < FLRD_VFS_DWORDS; i++)
1687 SHMEM2_WR(bp, drv_ack_vf_disabled[BP_FW_MB_IDX(bp)][i], 0);
1688 }
1689
1690 void bnx2x_vf_handle_flr_event(struct bnx2x *bp)
1691 {
1692 int i;
1693
1694 /* Read FLR'd VFs */
1695 for (i = 0; i < FLRD_VFS_DWORDS; i++)
1696 bp->vfdb->flrd_vfs[i] = SHMEM2_RD(bp, mcp_vf_disabled[i]);
1697
1698 DP(BNX2X_MSG_MCP,
1699 "DRV_STATUS_VF_DISABLED received for vfs 0x%x 0x%x\n",
1700 bp->vfdb->flrd_vfs[0], bp->vfdb->flrd_vfs[1]);
1701
1702 for_each_vf(bp, i) {
1703 struct bnx2x_virtf *vf = BP_VF(bp, i);
1704 u32 reset = 0;
1705
1706 if (vf->abs_vfid < 32)
1707 reset = bp->vfdb->flrd_vfs[0] & (1 << vf->abs_vfid);
1708 else
1709 reset = bp->vfdb->flrd_vfs[1] &
1710 (1 << (vf->abs_vfid - 32));
1711
1712 if (reset) {
1713 /* set as reset and ready for cleanup */
1714 vf->state = VF_RESET;
1715 vf->flr_clnup_stage = VF_FLR_CLN;
1716
1717 DP(BNX2X_MSG_IOV,
1718 "Initiating Final cleanup for VF %d\n",
1719 vf->abs_vfid);
1720 }
1721 }
1722
1723 /* do the FLR cleanup for all marked VFs*/
1724 bnx2x_vf_flr_clnup(bp, NULL);
1725 }
1726
1727 /* IOV global initialization routines */
1728 void bnx2x_iov_init_dq(struct bnx2x *bp)
1729 {
1730 if (!IS_SRIOV(bp))
1731 return;
1732
1733 /* Set the DQ such that the CID reflect the abs_vfid */
1734 REG_WR(bp, DORQ_REG_VF_NORM_VF_BASE, 0);
1735 REG_WR(bp, DORQ_REG_MAX_RVFID_SIZE, ilog2(BNX2X_MAX_NUM_OF_VFS));
1736
1737 /* Set VFs starting CID. If its > 0 the preceding CIDs are belong to
1738 * the PF L2 queues
1739 */
1740 REG_WR(bp, DORQ_REG_VF_NORM_CID_BASE, BNX2X_FIRST_VF_CID);
1741
1742 /* The VF window size is the log2 of the max number of CIDs per VF */
1743 REG_WR(bp, DORQ_REG_VF_NORM_CID_WND_SIZE, BNX2X_VF_CID_WND);
1744
1745 /* The VF doorbell size 0 - *B, 4 - 128B. We set it here to match
1746 * the Pf doorbell size although the 2 are independent.
1747 */
1748 REG_WR(bp, DORQ_REG_VF_NORM_CID_OFST, 3);
1749
1750 /* No security checks for now -
1751 * configure single rule (out of 16) mask = 0x1, value = 0x0,
1752 * CID range 0 - 0x1ffff
1753 */
1754 REG_WR(bp, DORQ_REG_VF_TYPE_MASK_0, 1);
1755 REG_WR(bp, DORQ_REG_VF_TYPE_VALUE_0, 0);
1756 REG_WR(bp, DORQ_REG_VF_TYPE_MIN_MCID_0, 0);
1757 REG_WR(bp, DORQ_REG_VF_TYPE_MAX_MCID_0, 0x1ffff);
1758
1759 /* set the number of VF allowed doorbells to the full DQ range */
1760 REG_WR(bp, DORQ_REG_VF_NORM_MAX_CID_COUNT, 0x20000);
1761
1762 /* set the VF doorbell threshold */
1763 REG_WR(bp, DORQ_REG_VF_USAGE_CT_LIMIT, 4);
1764 }
1765
1766 void bnx2x_iov_init_dmae(struct bnx2x *bp)
1767 {
1768 if (pci_find_ext_capability(bp->pdev, PCI_EXT_CAP_ID_SRIOV))
1769 REG_WR(bp, DMAE_REG_BACKWARD_COMP_EN, 0);
1770 }
1771
1772 static int bnx2x_vf_bus(struct bnx2x *bp, int vfid)
1773 {
1774 struct pci_dev *dev = bp->pdev;
1775 struct bnx2x_sriov *iov = &bp->vfdb->sriov;
1776
1777 return dev->bus->number + ((dev->devfn + iov->offset +
1778 iov->stride * vfid) >> 8);
1779 }
1780
1781 static int bnx2x_vf_devfn(struct bnx2x *bp, int vfid)
1782 {
1783 struct pci_dev *dev = bp->pdev;
1784 struct bnx2x_sriov *iov = &bp->vfdb->sriov;
1785
1786 return (dev->devfn + iov->offset + iov->stride * vfid) & 0xff;
1787 }
1788
1789 static void bnx2x_vf_set_bars(struct bnx2x *bp, struct bnx2x_virtf *vf)
1790 {
1791 int i, n;
1792 struct pci_dev *dev = bp->pdev;
1793 struct bnx2x_sriov *iov = &bp->vfdb->sriov;
1794
1795 for (i = 0, n = 0; i < PCI_SRIOV_NUM_BARS; i += 2, n++) {
1796 u64 start = pci_resource_start(dev, PCI_IOV_RESOURCES + i);
1797 u32 size = pci_resource_len(dev, PCI_IOV_RESOURCES + i);
1798
1799 size /= iov->total;
1800 vf->bars[n].bar = start + size * vf->abs_vfid;
1801 vf->bars[n].size = size;
1802 }
1803 }
1804
1805 static int bnx2x_ari_enabled(struct pci_dev *dev)
1806 {
1807 return dev->bus->self && dev->bus->self->ari_enabled;
1808 }
1809
1810 static void
1811 bnx2x_get_vf_igu_cam_info(struct bnx2x *bp)
1812 {
1813 int sb_id;
1814 u32 val;
1815 u8 fid, current_pf = 0;
1816
1817 /* IGU in normal mode - read CAM */
1818 for (sb_id = 0; sb_id < IGU_REG_MAPPING_MEMORY_SIZE; sb_id++) {
1819 val = REG_RD(bp, IGU_REG_MAPPING_MEMORY + sb_id * 4);
1820 if (!(val & IGU_REG_MAPPING_MEMORY_VALID))
1821 continue;
1822 fid = GET_FIELD((val), IGU_REG_MAPPING_MEMORY_FID);
1823 if (fid & IGU_FID_ENCODE_IS_PF)
1824 current_pf = fid & IGU_FID_PF_NUM_MASK;
1825 else if (current_pf == BP_ABS_FUNC(bp))
1826 bnx2x_vf_set_igu_info(bp, sb_id,
1827 (fid & IGU_FID_VF_NUM_MASK));
1828 DP(BNX2X_MSG_IOV, "%s[%d], igu_sb_id=%d, msix=%d\n",
1829 ((fid & IGU_FID_ENCODE_IS_PF) ? "PF" : "VF"),
1830 ((fid & IGU_FID_ENCODE_IS_PF) ? (fid & IGU_FID_PF_NUM_MASK) :
1831 (fid & IGU_FID_VF_NUM_MASK)), sb_id,
1832 GET_FIELD((val), IGU_REG_MAPPING_MEMORY_VECTOR));
1833 }
1834 DP(BNX2X_MSG_IOV, "vf_sbs_pool is %d\n", BP_VFDB(bp)->vf_sbs_pool);
1835 }
1836
1837 static void __bnx2x_iov_free_vfdb(struct bnx2x *bp)
1838 {
1839 if (bp->vfdb) {
1840 kfree(bp->vfdb->vfqs);
1841 kfree(bp->vfdb->vfs);
1842 kfree(bp->vfdb);
1843 }
1844 bp->vfdb = NULL;
1845 }
1846
1847 static int bnx2x_sriov_pci_cfg_info(struct bnx2x *bp, struct bnx2x_sriov *iov)
1848 {
1849 int pos;
1850 struct pci_dev *dev = bp->pdev;
1851
1852 pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV);
1853 if (!pos) {
1854 BNX2X_ERR("failed to find SRIOV capability in device\n");
1855 return -ENODEV;
1856 }
1857
1858 iov->pos = pos;
1859 DP(BNX2X_MSG_IOV, "sriov ext pos %d\n", pos);
1860 pci_read_config_word(dev, pos + PCI_SRIOV_CTRL, &iov->ctrl);
1861 pci_read_config_word(dev, pos + PCI_SRIOV_TOTAL_VF, &iov->total);
1862 pci_read_config_word(dev, pos + PCI_SRIOV_INITIAL_VF, &iov->initial);
1863 pci_read_config_word(dev, pos + PCI_SRIOV_VF_OFFSET, &iov->offset);
1864 pci_read_config_word(dev, pos + PCI_SRIOV_VF_STRIDE, &iov->stride);
1865 pci_read_config_dword(dev, pos + PCI_SRIOV_SUP_PGSIZE, &iov->pgsz);
1866 pci_read_config_dword(dev, pos + PCI_SRIOV_CAP, &iov->cap);
1867 pci_read_config_byte(dev, pos + PCI_SRIOV_FUNC_LINK, &iov->link);
1868
1869 return 0;
1870 }
1871
1872 static int bnx2x_sriov_info(struct bnx2x *bp, struct bnx2x_sriov *iov)
1873 {
1874 u32 val;
1875
1876 /* read the SRIOV capability structure
1877 * The fields can be read via configuration read or
1878 * directly from the device (starting at offset PCICFG_OFFSET)
1879 */
1880 if (bnx2x_sriov_pci_cfg_info(bp, iov))
1881 return -ENODEV;
1882
1883 /* get the number of SRIOV bars */
1884 iov->nres = 0;
1885
1886 /* read the first_vfid */
1887 val = REG_RD(bp, PCICFG_OFFSET + GRC_CONFIG_REG_PF_INIT_VF);
1888 iov->first_vf_in_pf = ((val & GRC_CR_PF_INIT_VF_PF_FIRST_VF_NUM_MASK)
1889 * 8) - (BNX2X_MAX_NUM_OF_VFS * BP_PATH(bp));
1890
1891 DP(BNX2X_MSG_IOV,
1892 "IOV info[%d]: first vf %d, nres %d, cap 0x%x, ctrl 0x%x, total %d, initial %d, num vfs %d, offset %d, stride %d, page size 0x%x\n",
1893 BP_FUNC(bp),
1894 iov->first_vf_in_pf, iov->nres, iov->cap, iov->ctrl, iov->total,
1895 iov->initial, iov->nr_virtfn, iov->offset, iov->stride, iov->pgsz);
1896
1897 return 0;
1898 }
1899
1900 /* must be called after PF bars are mapped */
1901 int bnx2x_iov_init_one(struct bnx2x *bp, int int_mode_param,
1902 int num_vfs_param)
1903 {
1904 int err, i;
1905 struct bnx2x_sriov *iov;
1906 struct pci_dev *dev = bp->pdev;
1907
1908 bp->vfdb = NULL;
1909
1910 /* verify is pf */
1911 if (IS_VF(bp))
1912 return 0;
1913
1914 /* verify sriov capability is present in configuration space */
1915 if (!pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV))
1916 return 0;
1917
1918 /* verify chip revision */
1919 if (CHIP_IS_E1x(bp))
1920 return 0;
1921
1922 /* check if SRIOV support is turned off */
1923 if (!num_vfs_param)
1924 return 0;
1925
1926 /* SRIOV assumes that num of PF CIDs < BNX2X_FIRST_VF_CID */
1927 if (BNX2X_L2_MAX_CID(bp) >= BNX2X_FIRST_VF_CID) {
1928 BNX2X_ERR("PF cids %d are overspilling into vf space (starts at %d). Abort SRIOV\n",
1929 BNX2X_L2_MAX_CID(bp), BNX2X_FIRST_VF_CID);
1930 return 0;
1931 }
1932
1933 /* SRIOV can be enabled only with MSIX */
1934 if (int_mode_param == BNX2X_INT_MODE_MSI ||
1935 int_mode_param == BNX2X_INT_MODE_INTX) {
1936 BNX2X_ERR("Forced MSI/INTx mode is incompatible with SRIOV\n");
1937 return 0;
1938 }
1939
1940 err = -EIO;
1941 /* verify ari is enabled */
1942 if (!bnx2x_ari_enabled(bp->pdev)) {
1943 BNX2X_ERR("ARI not supported (check pci bridge ARI forwarding), SRIOV can not be enabled\n");
1944 return 0;
1945 }
1946
1947 /* verify igu is in normal mode */
1948 if (CHIP_INT_MODE_IS_BC(bp)) {
1949 BNX2X_ERR("IGU not normal mode, SRIOV can not be enabled\n");
1950 return 0;
1951 }
1952
1953 /* allocate the vfs database */
1954 bp->vfdb = kzalloc(sizeof(*(bp->vfdb)), GFP_KERNEL);
1955 if (!bp->vfdb) {
1956 BNX2X_ERR("failed to allocate vf database\n");
1957 err = -ENOMEM;
1958 goto failed;
1959 }
1960
1961 /* get the sriov info - Linux already collected all the pertinent
1962 * information, however the sriov structure is for the private use
1963 * of the pci module. Also we want this information regardless
1964 * of the hyper-visor.
1965 */
1966 iov = &(bp->vfdb->sriov);
1967 err = bnx2x_sriov_info(bp, iov);
1968 if (err)
1969 goto failed;
1970
1971 /* SR-IOV capability was enabled but there are no VFs*/
1972 if (iov->total == 0)
1973 goto failed;
1974
1975 iov->nr_virtfn = min_t(u16, iov->total, num_vfs_param);
1976
1977 DP(BNX2X_MSG_IOV, "num_vfs_param was %d, nr_virtfn was %d\n",
1978 num_vfs_param, iov->nr_virtfn);
1979
1980 /* allocate the vf array */
1981 bp->vfdb->vfs = kzalloc(sizeof(struct bnx2x_virtf) *
1982 BNX2X_NR_VIRTFN(bp), GFP_KERNEL);
1983 if (!bp->vfdb->vfs) {
1984 BNX2X_ERR("failed to allocate vf array\n");
1985 err = -ENOMEM;
1986 goto failed;
1987 }
1988
1989 /* Initial VF init - index and abs_vfid - nr_virtfn must be set */
1990 for_each_vf(bp, i) {
1991 bnx2x_vf(bp, i, index) = i;
1992 bnx2x_vf(bp, i, abs_vfid) = iov->first_vf_in_pf + i;
1993 bnx2x_vf(bp, i, state) = VF_FREE;
1994 INIT_LIST_HEAD(&bnx2x_vf(bp, i, op_list_head));
1995 mutex_init(&bnx2x_vf(bp, i, op_mutex));
1996 bnx2x_vf(bp, i, op_current) = CHANNEL_TLV_NONE;
1997 }
1998
1999 /* re-read the IGU CAM for VFs - index and abs_vfid must be set */
2000 bnx2x_get_vf_igu_cam_info(bp);
2001
2002 /* allocate the queue arrays for all VFs */
2003 bp->vfdb->vfqs = kzalloc(
2004 BNX2X_MAX_NUM_VF_QUEUES * sizeof(struct bnx2x_vf_queue),
2005 GFP_KERNEL);
2006
2007 DP(BNX2X_MSG_IOV, "bp->vfdb->vfqs was %p\n", bp->vfdb->vfqs);
2008
2009 if (!bp->vfdb->vfqs) {
2010 BNX2X_ERR("failed to allocate vf queue array\n");
2011 err = -ENOMEM;
2012 goto failed;
2013 }
2014
2015 return 0;
2016 failed:
2017 DP(BNX2X_MSG_IOV, "Failed err=%d\n", err);
2018 __bnx2x_iov_free_vfdb(bp);
2019 return err;
2020 }
2021
2022 void bnx2x_iov_remove_one(struct bnx2x *bp)
2023 {
2024 /* if SRIOV is not enabled there's nothing to do */
2025 if (!IS_SRIOV(bp))
2026 return;
2027
2028 DP(BNX2X_MSG_IOV, "about to call disable sriov\n");
2029 pci_disable_sriov(bp->pdev);
2030 DP(BNX2X_MSG_IOV, "sriov disabled\n");
2031
2032 /* free vf database */
2033 __bnx2x_iov_free_vfdb(bp);
2034 }
2035
2036 void bnx2x_iov_free_mem(struct bnx2x *bp)
2037 {
2038 int i;
2039
2040 if (!IS_SRIOV(bp))
2041 return;
2042
2043 /* free vfs hw contexts */
2044 for (i = 0; i < BNX2X_VF_CIDS/ILT_PAGE_CIDS; i++) {
2045 struct hw_dma *cxt = &bp->vfdb->context[i];
2046 BNX2X_PCI_FREE(cxt->addr, cxt->mapping, cxt->size);
2047 }
2048
2049 BNX2X_PCI_FREE(BP_VFDB(bp)->sp_dma.addr,
2050 BP_VFDB(bp)->sp_dma.mapping,
2051 BP_VFDB(bp)->sp_dma.size);
2052
2053 BNX2X_PCI_FREE(BP_VF_MBX_DMA(bp)->addr,
2054 BP_VF_MBX_DMA(bp)->mapping,
2055 BP_VF_MBX_DMA(bp)->size);
2056
2057 BNX2X_PCI_FREE(BP_VF_BULLETIN_DMA(bp)->addr,
2058 BP_VF_BULLETIN_DMA(bp)->mapping,
2059 BP_VF_BULLETIN_DMA(bp)->size);
2060 }
2061
2062 int bnx2x_iov_alloc_mem(struct bnx2x *bp)
2063 {
2064 size_t tot_size;
2065 int i, rc = 0;
2066
2067 if (!IS_SRIOV(bp))
2068 return rc;
2069
2070 /* allocate vfs hw contexts */
2071 tot_size = (BP_VFDB(bp)->sriov.first_vf_in_pf + BNX2X_NR_VIRTFN(bp)) *
2072 BNX2X_CIDS_PER_VF * sizeof(union cdu_context);
2073
2074 for (i = 0; i < BNX2X_VF_CIDS/ILT_PAGE_CIDS; i++) {
2075 struct hw_dma *cxt = BP_VF_CXT_PAGE(bp, i);
2076 cxt->size = min_t(size_t, tot_size, CDU_ILT_PAGE_SZ);
2077
2078 if (cxt->size) {
2079 BNX2X_PCI_ALLOC(cxt->addr, &cxt->mapping, cxt->size);
2080 } else {
2081 cxt->addr = NULL;
2082 cxt->mapping = 0;
2083 }
2084 tot_size -= cxt->size;
2085 }
2086
2087 /* allocate vfs ramrods dma memory - client_init and set_mac */
2088 tot_size = BNX2X_NR_VIRTFN(bp) * sizeof(struct bnx2x_vf_sp);
2089 BNX2X_PCI_ALLOC(BP_VFDB(bp)->sp_dma.addr, &BP_VFDB(bp)->sp_dma.mapping,
2090 tot_size);
2091 BP_VFDB(bp)->sp_dma.size = tot_size;
2092
2093 /* allocate mailboxes */
2094 tot_size = BNX2X_NR_VIRTFN(bp) * MBX_MSG_ALIGNED_SIZE;
2095 BNX2X_PCI_ALLOC(BP_VF_MBX_DMA(bp)->addr, &BP_VF_MBX_DMA(bp)->mapping,
2096 tot_size);
2097 BP_VF_MBX_DMA(bp)->size = tot_size;
2098
2099 /* allocate local bulletin boards */
2100 tot_size = BNX2X_NR_VIRTFN(bp) * BULLETIN_CONTENT_SIZE;
2101 BNX2X_PCI_ALLOC(BP_VF_BULLETIN_DMA(bp)->addr,
2102 &BP_VF_BULLETIN_DMA(bp)->mapping, tot_size);
2103 BP_VF_BULLETIN_DMA(bp)->size = tot_size;
2104
2105 return 0;
2106
2107 alloc_mem_err:
2108 return -ENOMEM;
2109 }
2110
2111 static void bnx2x_vfq_init(struct bnx2x *bp, struct bnx2x_virtf *vf,
2112 struct bnx2x_vf_queue *q)
2113 {
2114 u8 cl_id = vfq_cl_id(vf, q);
2115 u8 func_id = FW_VF_HANDLE(vf->abs_vfid);
2116 unsigned long q_type = 0;
2117
2118 set_bit(BNX2X_Q_TYPE_HAS_TX, &q_type);
2119 set_bit(BNX2X_Q_TYPE_HAS_RX, &q_type);
2120
2121 /* Queue State object */
2122 bnx2x_init_queue_obj(bp, &q->sp_obj,
2123 cl_id, &q->cid, 1, func_id,
2124 bnx2x_vf_sp(bp, vf, q_data),
2125 bnx2x_vf_sp_map(bp, vf, q_data),
2126 q_type);
2127
2128 DP(BNX2X_MSG_IOV,
2129 "initialized vf %d's queue object. func id set to %d. cid set to 0x%x\n",
2130 vf->abs_vfid, q->sp_obj.func_id, q->cid);
2131 }
2132
2133 /* called by bnx2x_nic_load */
2134 int bnx2x_iov_nic_init(struct bnx2x *bp)
2135 {
2136 int vfid;
2137
2138 if (!IS_SRIOV(bp)) {
2139 DP(BNX2X_MSG_IOV, "vfdb was not allocated\n");
2140 return 0;
2141 }
2142
2143 DP(BNX2X_MSG_IOV, "num of vfs: %d\n", (bp)->vfdb->sriov.nr_virtfn);
2144
2145 /* let FLR complete ... */
2146 msleep(100);
2147
2148 /* initialize vf database */
2149 for_each_vf(bp, vfid) {
2150 struct bnx2x_virtf *vf = BP_VF(bp, vfid);
2151
2152 int base_vf_cid = (BP_VFDB(bp)->sriov.first_vf_in_pf + vfid) *
2153 BNX2X_CIDS_PER_VF;
2154
2155 union cdu_context *base_cxt = (union cdu_context *)
2156 BP_VF_CXT_PAGE(bp, base_vf_cid/ILT_PAGE_CIDS)->addr +
2157 (base_vf_cid & (ILT_PAGE_CIDS-1));
2158
2159 DP(BNX2X_MSG_IOV,
2160 "VF[%d] Max IGU SBs: %d, base vf cid 0x%x, base cid 0x%x, base cxt %p\n",
2161 vf->abs_vfid, vf_sb_count(vf), base_vf_cid,
2162 BNX2X_FIRST_VF_CID + base_vf_cid, base_cxt);
2163
2164 /* init statically provisioned resources */
2165 bnx2x_iov_static_resc(bp, vf);
2166
2167 /* queues are initialized during VF-ACQUIRE */
2168
2169 /* reserve the vf vlan credit */
2170 bp->vlans_pool.get(&bp->vlans_pool, vf_vlan_rules_cnt(vf));
2171
2172 vf->filter_state = 0;
2173 vf->sp_cl_id = bnx2x_fp(bp, 0, cl_id);
2174
2175 /* init mcast object - This object will be re-initialized
2176 * during VF-ACQUIRE with the proper cl_id and cid.
2177 * It needs to be initialized here so that it can be safely
2178 * handled by a subsequent FLR flow.
2179 */
2180 bnx2x_init_mcast_obj(bp, &vf->mcast_obj, 0xFF,
2181 0xFF, 0xFF, 0xFF,
2182 bnx2x_vf_sp(bp, vf, mcast_rdata),
2183 bnx2x_vf_sp_map(bp, vf, mcast_rdata),
2184 BNX2X_FILTER_MCAST_PENDING,
2185 &vf->filter_state,
2186 BNX2X_OBJ_TYPE_RX_TX);
2187
2188 /* set the mailbox message addresses */
2189 BP_VF_MBX(bp, vfid)->msg = (struct bnx2x_vf_mbx_msg *)
2190 (((u8 *)BP_VF_MBX_DMA(bp)->addr) + vfid *
2191 MBX_MSG_ALIGNED_SIZE);
2192
2193 BP_VF_MBX(bp, vfid)->msg_mapping = BP_VF_MBX_DMA(bp)->mapping +
2194 vfid * MBX_MSG_ALIGNED_SIZE;
2195
2196 /* Enable vf mailbox */
2197 bnx2x_vf_enable_mbx(bp, vf->abs_vfid);
2198 }
2199
2200 /* Final VF init */
2201 for_each_vf(bp, vfid) {
2202 struct bnx2x_virtf *vf = BP_VF(bp, vfid);
2203
2204 /* fill in the BDF and bars */
2205 vf->bus = bnx2x_vf_bus(bp, vfid);
2206 vf->devfn = bnx2x_vf_devfn(bp, vfid);
2207 bnx2x_vf_set_bars(bp, vf);
2208
2209 DP(BNX2X_MSG_IOV,
2210 "VF info[%d]: bus 0x%x, devfn 0x%x, bar0 [0x%x, %d], bar1 [0x%x, %d], bar2 [0x%x, %d]\n",
2211 vf->abs_vfid, vf->bus, vf->devfn,
2212 (unsigned)vf->bars[0].bar, vf->bars[0].size,
2213 (unsigned)vf->bars[1].bar, vf->bars[1].size,
2214 (unsigned)vf->bars[2].bar, vf->bars[2].size);
2215 }
2216
2217 return 0;
2218 }
2219
2220 /* called by bnx2x_chip_cleanup */
2221 int bnx2x_iov_chip_cleanup(struct bnx2x *bp)
2222 {
2223 int i;
2224
2225 if (!IS_SRIOV(bp))
2226 return 0;
2227
2228 /* release all the VFs */
2229 for_each_vf(bp, i)
2230 bnx2x_vf_release(bp, BP_VF(bp, i), true); /* blocking */
2231
2232 return 0;
2233 }
2234
2235 /* called by bnx2x_init_hw_func, returns the next ilt line */
2236 int bnx2x_iov_init_ilt(struct bnx2x *bp, u16 line)
2237 {
2238 int i;
2239 struct bnx2x_ilt *ilt = BP_ILT(bp);
2240
2241 if (!IS_SRIOV(bp))
2242 return line;
2243
2244 /* set vfs ilt lines */
2245 for (i = 0; i < BNX2X_VF_CIDS/ILT_PAGE_CIDS; i++) {
2246 struct hw_dma *hw_cxt = BP_VF_CXT_PAGE(bp, i);
2247
2248 ilt->lines[line+i].page = hw_cxt->addr;
2249 ilt->lines[line+i].page_mapping = hw_cxt->mapping;
2250 ilt->lines[line+i].size = hw_cxt->size; /* doesn't matter */
2251 }
2252 return line + i;
2253 }
2254
2255 static u8 bnx2x_iov_is_vf_cid(struct bnx2x *bp, u16 cid)
2256 {
2257 return ((cid >= BNX2X_FIRST_VF_CID) &&
2258 ((cid - BNX2X_FIRST_VF_CID) < BNX2X_VF_CIDS));
2259 }
2260
2261 static
2262 void bnx2x_vf_handle_classification_eqe(struct bnx2x *bp,
2263 struct bnx2x_vf_queue *vfq,
2264 union event_ring_elem *elem)
2265 {
2266 unsigned long ramrod_flags = 0;
2267 int rc = 0;
2268
2269 /* Always push next commands out, don't wait here */
2270 set_bit(RAMROD_CONT, &ramrod_flags);
2271
2272 switch (elem->message.data.eth_event.echo >> BNX2X_SWCID_SHIFT) {
2273 case BNX2X_FILTER_MAC_PENDING:
2274 rc = vfq->mac_obj.complete(bp, &vfq->mac_obj, elem,
2275 &ramrod_flags);
2276 break;
2277 case BNX2X_FILTER_VLAN_PENDING:
2278 rc = vfq->vlan_obj.complete(bp, &vfq->vlan_obj, elem,
2279 &ramrod_flags);
2280 break;
2281 default:
2282 BNX2X_ERR("Unsupported classification command: %d\n",
2283 elem->message.data.eth_event.echo);
2284 return;
2285 }
2286 if (rc < 0)
2287 BNX2X_ERR("Failed to schedule new commands: %d\n", rc);
2288 else if (rc > 0)
2289 DP(BNX2X_MSG_IOV, "Scheduled next pending commands...\n");
2290 }
2291
2292 static
2293 void bnx2x_vf_handle_mcast_eqe(struct bnx2x *bp,
2294 struct bnx2x_virtf *vf)
2295 {
2296 struct bnx2x_mcast_ramrod_params rparam = {NULL};
2297 int rc;
2298
2299 rparam.mcast_obj = &vf->mcast_obj;
2300 vf->mcast_obj.raw.clear_pending(&vf->mcast_obj.raw);
2301
2302 /* If there are pending mcast commands - send them */
2303 if (vf->mcast_obj.check_pending(&vf->mcast_obj)) {
2304 rc = bnx2x_config_mcast(bp, &rparam, BNX2X_MCAST_CMD_CONT);
2305 if (rc < 0)
2306 BNX2X_ERR("Failed to send pending mcast commands: %d\n",
2307 rc);
2308 }
2309 }
2310
2311 static
2312 void bnx2x_vf_handle_filters_eqe(struct bnx2x *bp,
2313 struct bnx2x_virtf *vf)
2314 {
2315 smp_mb__before_clear_bit();
2316 clear_bit(BNX2X_FILTER_RX_MODE_PENDING, &vf->filter_state);
2317 smp_mb__after_clear_bit();
2318 }
2319
2320 int bnx2x_iov_eq_sp_event(struct bnx2x *bp, union event_ring_elem *elem)
2321 {
2322 struct bnx2x_virtf *vf;
2323 int qidx = 0, abs_vfid;
2324 u8 opcode;
2325 u16 cid = 0xffff;
2326
2327 if (!IS_SRIOV(bp))
2328 return 1;
2329
2330 /* first get the cid - the only events we handle here are cfc-delete
2331 * and set-mac completion
2332 */
2333 opcode = elem->message.opcode;
2334
2335 switch (opcode) {
2336 case EVENT_RING_OPCODE_CFC_DEL:
2337 cid = SW_CID((__force __le32)
2338 elem->message.data.cfc_del_event.cid);
2339 DP(BNX2X_MSG_IOV, "checking cfc-del comp cid=%d\n", cid);
2340 break;
2341 case EVENT_RING_OPCODE_CLASSIFICATION_RULES:
2342 case EVENT_RING_OPCODE_MULTICAST_RULES:
2343 case EVENT_RING_OPCODE_FILTERS_RULES:
2344 cid = (elem->message.data.eth_event.echo &
2345 BNX2X_SWCID_MASK);
2346 DP(BNX2X_MSG_IOV, "checking filtering comp cid=%d\n", cid);
2347 break;
2348 case EVENT_RING_OPCODE_VF_FLR:
2349 abs_vfid = elem->message.data.vf_flr_event.vf_id;
2350 DP(BNX2X_MSG_IOV, "Got VF FLR notification abs_vfid=%d\n",
2351 abs_vfid);
2352 goto get_vf;
2353 case EVENT_RING_OPCODE_MALICIOUS_VF:
2354 abs_vfid = elem->message.data.malicious_vf_event.vf_id;
2355 DP(BNX2X_MSG_IOV, "Got VF MALICIOUS notification abs_vfid=%d err_id=0x%x\n",
2356 abs_vfid, elem->message.data.malicious_vf_event.err_id);
2357 goto get_vf;
2358 default:
2359 return 1;
2360 }
2361
2362 /* check if the cid is the VF range */
2363 if (!bnx2x_iov_is_vf_cid(bp, cid)) {
2364 DP(BNX2X_MSG_IOV, "cid is outside vf range: %d\n", cid);
2365 return 1;
2366 }
2367
2368 /* extract vf and rxq index from vf_cid - relies on the following:
2369 * 1. vfid on cid reflects the true abs_vfid
2370 * 2. The max number of VFs (per path) is 64
2371 */
2372 qidx = cid & ((1 << BNX2X_VF_CID_WND)-1);
2373 abs_vfid = (cid >> BNX2X_VF_CID_WND) & (BNX2X_MAX_NUM_OF_VFS-1);
2374 get_vf:
2375 vf = bnx2x_vf_by_abs_fid(bp, abs_vfid);
2376
2377 if (!vf) {
2378 BNX2X_ERR("EQ completion for unknown VF, cid %d, abs_vfid %d\n",
2379 cid, abs_vfid);
2380 return 0;
2381 }
2382
2383 switch (opcode) {
2384 case EVENT_RING_OPCODE_CFC_DEL:
2385 DP(BNX2X_MSG_IOV, "got VF [%d:%d] cfc delete ramrod\n",
2386 vf->abs_vfid, qidx);
2387 vfq_get(vf, qidx)->sp_obj.complete_cmd(bp,
2388 &vfq_get(vf,
2389 qidx)->sp_obj,
2390 BNX2X_Q_CMD_CFC_DEL);
2391 break;
2392 case EVENT_RING_OPCODE_CLASSIFICATION_RULES:
2393 DP(BNX2X_MSG_IOV, "got VF [%d:%d] set mac/vlan ramrod\n",
2394 vf->abs_vfid, qidx);
2395 bnx2x_vf_handle_classification_eqe(bp, vfq_get(vf, qidx), elem);
2396 break;
2397 case EVENT_RING_OPCODE_MULTICAST_RULES:
2398 DP(BNX2X_MSG_IOV, "got VF [%d:%d] set mcast ramrod\n",
2399 vf->abs_vfid, qidx);
2400 bnx2x_vf_handle_mcast_eqe(bp, vf);
2401 break;
2402 case EVENT_RING_OPCODE_FILTERS_RULES:
2403 DP(BNX2X_MSG_IOV, "got VF [%d:%d] set rx-mode ramrod\n",
2404 vf->abs_vfid, qidx);
2405 bnx2x_vf_handle_filters_eqe(bp, vf);
2406 break;
2407 case EVENT_RING_OPCODE_VF_FLR:
2408 DP(BNX2X_MSG_IOV, "got VF [%d] FLR notification\n",
2409 vf->abs_vfid);
2410 /* Do nothing for now */
2411 break;
2412 case EVENT_RING_OPCODE_MALICIOUS_VF:
2413 DP(BNX2X_MSG_IOV, "Got VF MALICIOUS notification abs_vfid=%d error id %x\n",
2414 abs_vfid, elem->message.data.malicious_vf_event.err_id);
2415 /* Do nothing for now */
2416 break;
2417 }
2418 /* SRIOV: reschedule any 'in_progress' operations */
2419 bnx2x_iov_sp_event(bp, cid, false);
2420
2421 return 0;
2422 }
2423
2424 static struct bnx2x_virtf *bnx2x_vf_by_cid(struct bnx2x *bp, int vf_cid)
2425 {
2426 /* extract the vf from vf_cid - relies on the following:
2427 * 1. vfid on cid reflects the true abs_vfid
2428 * 2. The max number of VFs (per path) is 64
2429 */
2430 int abs_vfid = (vf_cid >> BNX2X_VF_CID_WND) & (BNX2X_MAX_NUM_OF_VFS-1);
2431 return bnx2x_vf_by_abs_fid(bp, abs_vfid);
2432 }
2433
2434 void bnx2x_iov_set_queue_sp_obj(struct bnx2x *bp, int vf_cid,
2435 struct bnx2x_queue_sp_obj **q_obj)
2436 {
2437 struct bnx2x_virtf *vf;
2438
2439 if (!IS_SRIOV(bp))
2440 return;
2441
2442 vf = bnx2x_vf_by_cid(bp, vf_cid);
2443
2444 if (vf) {
2445 /* extract queue index from vf_cid - relies on the following:
2446 * 1. vfid on cid reflects the true abs_vfid
2447 * 2. The max number of VFs (per path) is 64
2448 */
2449 int q_index = vf_cid & ((1 << BNX2X_VF_CID_WND)-1);
2450 *q_obj = &bnx2x_vfq(vf, q_index, sp_obj);
2451 } else {
2452 BNX2X_ERR("No vf matching cid %d\n", vf_cid);
2453 }
2454 }
2455
2456 void bnx2x_iov_sp_event(struct bnx2x *bp, int vf_cid, bool queue_work)
2457 {
2458 struct bnx2x_virtf *vf;
2459
2460 /* check if the cid is the VF range */
2461 if (!IS_SRIOV(bp) || !bnx2x_iov_is_vf_cid(bp, vf_cid))
2462 return;
2463
2464 vf = bnx2x_vf_by_cid(bp, vf_cid);
2465 if (vf) {
2466 /* set in_progress flag */
2467 atomic_set(&vf->op_in_progress, 1);
2468 if (queue_work)
2469 queue_delayed_work(bnx2x_wq, &bp->sp_task, 0);
2470 }
2471 }
2472
2473 void bnx2x_iov_adjust_stats_req(struct bnx2x *bp)
2474 {
2475 int i;
2476 int first_queue_query_index, num_queues_req;
2477 dma_addr_t cur_data_offset;
2478 struct stats_query_entry *cur_query_entry;
2479 u8 stats_count = 0;
2480 bool is_fcoe = false;
2481
2482 if (!IS_SRIOV(bp))
2483 return;
2484
2485 if (!NO_FCOE(bp))
2486 is_fcoe = true;
2487
2488 /* fcoe adds one global request and one queue request */
2489 num_queues_req = BNX2X_NUM_ETH_QUEUES(bp) + is_fcoe;
2490 first_queue_query_index = BNX2X_FIRST_QUEUE_QUERY_IDX -
2491 (is_fcoe ? 0 : 1);
2492
2493 DP(BNX2X_MSG_IOV,
2494 "BNX2X_NUM_ETH_QUEUES %d, is_fcoe %d, first_queue_query_index %d => determined the last non virtual statistics query index is %d. Will add queries on top of that\n",
2495 BNX2X_NUM_ETH_QUEUES(bp), is_fcoe, first_queue_query_index,
2496 first_queue_query_index + num_queues_req);
2497
2498 cur_data_offset = bp->fw_stats_data_mapping +
2499 offsetof(struct bnx2x_fw_stats_data, queue_stats) +
2500 num_queues_req * sizeof(struct per_queue_stats);
2501
2502 cur_query_entry = &bp->fw_stats_req->
2503 query[first_queue_query_index + num_queues_req];
2504
2505 for_each_vf(bp, i) {
2506 int j;
2507 struct bnx2x_virtf *vf = BP_VF(bp, i);
2508
2509 if (vf->state != VF_ENABLED) {
2510 DP(BNX2X_MSG_IOV,
2511 "vf %d not enabled so no stats for it\n",
2512 vf->abs_vfid);
2513 continue;
2514 }
2515
2516 DP(BNX2X_MSG_IOV, "add addresses for vf %d\n", vf->abs_vfid);
2517 for_each_vfq(vf, j) {
2518 struct bnx2x_vf_queue *rxq = vfq_get(vf, j);
2519
2520 dma_addr_t q_stats_addr =
2521 vf->fw_stat_map + j * vf->stats_stride;
2522
2523 /* collect stats fro active queues only */
2524 if (bnx2x_get_q_logical_state(bp, &rxq->sp_obj) ==
2525 BNX2X_Q_LOGICAL_STATE_STOPPED)
2526 continue;
2527
2528 /* create stats query entry for this queue */
2529 cur_query_entry->kind = STATS_TYPE_QUEUE;
2530 cur_query_entry->index = vfq_stat_id(vf, rxq);
2531 cur_query_entry->funcID =
2532 cpu_to_le16(FW_VF_HANDLE(vf->abs_vfid));
2533 cur_query_entry->address.hi =
2534 cpu_to_le32(U64_HI(q_stats_addr));
2535 cur_query_entry->address.lo =
2536 cpu_to_le32(U64_LO(q_stats_addr));
2537 DP(BNX2X_MSG_IOV,
2538 "added address %x %x for vf %d queue %d client %d\n",
2539 cur_query_entry->address.hi,
2540 cur_query_entry->address.lo, cur_query_entry->funcID,
2541 j, cur_query_entry->index);
2542 cur_query_entry++;
2543 cur_data_offset += sizeof(struct per_queue_stats);
2544 stats_count++;
2545
2546 /* all stats are coalesced to the leading queue */
2547 if (vf->cfg_flags & VF_CFG_STATS_COALESCE)
2548 break;
2549 }
2550 }
2551 bp->fw_stats_req->hdr.cmd_num = bp->fw_stats_num + stats_count;
2552 }
2553
2554 void bnx2x_iov_sp_task(struct bnx2x *bp)
2555 {
2556 int i;
2557
2558 if (!IS_SRIOV(bp))
2559 return;
2560 /* Iterate over all VFs and invoke state transition for VFs with
2561 * 'in-progress' slow-path operations
2562 */
2563 DP(BNX2X_MSG_IOV, "searching for pending vf operations\n");
2564 for_each_vf(bp, i) {
2565 struct bnx2x_virtf *vf = BP_VF(bp, i);
2566
2567 if (!vf) {
2568 BNX2X_ERR("VF was null! skipping...\n");
2569 continue;
2570 }
2571
2572 if (!list_empty(&vf->op_list_head) &&
2573 atomic_read(&vf->op_in_progress)) {
2574 DP(BNX2X_MSG_IOV, "running pending op for vf %d\n", i);
2575 bnx2x_vfop_cur(bp, vf)->transition(bp, vf);
2576 }
2577 }
2578 }
2579
2580 static inline
2581 struct bnx2x_virtf *__vf_from_stat_id(struct bnx2x *bp, u8 stat_id)
2582 {
2583 int i;
2584 struct bnx2x_virtf *vf = NULL;
2585
2586 for_each_vf(bp, i) {
2587 vf = BP_VF(bp, i);
2588 if (stat_id >= vf->igu_base_id &&
2589 stat_id < vf->igu_base_id + vf_sb_count(vf))
2590 break;
2591 }
2592 return vf;
2593 }
2594
2595 /* VF API helpers */
2596 static void bnx2x_vf_qtbl_set_q(struct bnx2x *bp, u8 abs_vfid, u8 qid,
2597 u8 enable)
2598 {
2599 u32 reg = PXP_REG_HST_ZONE_PERMISSION_TABLE + qid * 4;
2600 u32 val = enable ? (abs_vfid | (1 << 6)) : 0;
2601
2602 REG_WR(bp, reg, val);
2603 }
2604
2605 static void bnx2x_vf_clr_qtbl(struct bnx2x *bp, struct bnx2x_virtf *vf)
2606 {
2607 int i;
2608
2609 for_each_vfq(vf, i)
2610 bnx2x_vf_qtbl_set_q(bp, vf->abs_vfid,
2611 vfq_qzone_id(vf, vfq_get(vf, i)), false);
2612 }
2613
2614 static void bnx2x_vf_igu_disable(struct bnx2x *bp, struct bnx2x_virtf *vf)
2615 {
2616 u32 val;
2617
2618 /* clear the VF configuration - pretend */
2619 bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, vf->abs_vfid));
2620 val = REG_RD(bp, IGU_REG_VF_CONFIGURATION);
2621 val &= ~(IGU_VF_CONF_MSI_MSIX_EN | IGU_VF_CONF_SINGLE_ISR_EN |
2622 IGU_VF_CONF_FUNC_EN | IGU_VF_CONF_PARENT_MASK);
2623 REG_WR(bp, IGU_REG_VF_CONFIGURATION, val);
2624 bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
2625 }
2626
2627 u8 bnx2x_vf_max_queue_cnt(struct bnx2x *bp, struct bnx2x_virtf *vf)
2628 {
2629 return min_t(u8, min_t(u8, vf_sb_count(vf), BNX2X_CIDS_PER_VF),
2630 BNX2X_VF_MAX_QUEUES);
2631 }
2632
2633 static
2634 int bnx2x_vf_chk_avail_resc(struct bnx2x *bp, struct bnx2x_virtf *vf,
2635 struct vf_pf_resc_request *req_resc)
2636 {
2637 u8 rxq_cnt = vf_rxq_count(vf) ? : bnx2x_vf_max_queue_cnt(bp, vf);
2638 u8 txq_cnt = vf_txq_count(vf) ? : bnx2x_vf_max_queue_cnt(bp, vf);
2639
2640 return ((req_resc->num_rxqs <= rxq_cnt) &&
2641 (req_resc->num_txqs <= txq_cnt) &&
2642 (req_resc->num_sbs <= vf_sb_count(vf)) &&
2643 (req_resc->num_mac_filters <= vf_mac_rules_cnt(vf)) &&
2644 (req_resc->num_vlan_filters <= vf_vlan_rules_cnt(vf)));
2645 }
2646
2647 /* CORE VF API */
2648 int bnx2x_vf_acquire(struct bnx2x *bp, struct bnx2x_virtf *vf,
2649 struct vf_pf_resc_request *resc)
2650 {
2651 int base_vf_cid = (BP_VFDB(bp)->sriov.first_vf_in_pf + vf->index) *
2652 BNX2X_CIDS_PER_VF;
2653
2654 union cdu_context *base_cxt = (union cdu_context *)
2655 BP_VF_CXT_PAGE(bp, base_vf_cid/ILT_PAGE_CIDS)->addr +
2656 (base_vf_cid & (ILT_PAGE_CIDS-1));
2657 int i;
2658
2659 /* if state is 'acquired' the VF was not released or FLR'd, in
2660 * this case the returned resources match the acquired already
2661 * acquired resources. Verify that the requested numbers do
2662 * not exceed the already acquired numbers.
2663 */
2664 if (vf->state == VF_ACQUIRED) {
2665 DP(BNX2X_MSG_IOV, "VF[%d] Trying to re-acquire resources (VF was not released or FLR'd)\n",
2666 vf->abs_vfid);
2667
2668 if (!bnx2x_vf_chk_avail_resc(bp, vf, resc)) {
2669 BNX2X_ERR("VF[%d] When re-acquiring resources, requested numbers must be <= then previously acquired numbers\n",
2670 vf->abs_vfid);
2671 return -EINVAL;
2672 }
2673 return 0;
2674 }
2675
2676 /* Otherwise vf state must be 'free' or 'reset' */
2677 if (vf->state != VF_FREE && vf->state != VF_RESET) {
2678 BNX2X_ERR("VF[%d] Can not acquire a VF with state %d\n",
2679 vf->abs_vfid, vf->state);
2680 return -EINVAL;
2681 }
2682
2683 /* static allocation:
2684 * the global maximum number are fixed per VF. Fail the request if
2685 * requested number exceed these globals
2686 */
2687 if (!bnx2x_vf_chk_avail_resc(bp, vf, resc)) {
2688 DP(BNX2X_MSG_IOV,
2689 "cannot fulfill vf resource request. Placing maximal available values in response\n");
2690 /* set the max resource in the vf */
2691 return -ENOMEM;
2692 }
2693
2694 /* Set resources counters - 0 request means max available */
2695 vf_sb_count(vf) = resc->num_sbs;
2696 vf_rxq_count(vf) = resc->num_rxqs ? : bnx2x_vf_max_queue_cnt(bp, vf);
2697 vf_txq_count(vf) = resc->num_txqs ? : bnx2x_vf_max_queue_cnt(bp, vf);
2698 if (resc->num_mac_filters)
2699 vf_mac_rules_cnt(vf) = resc->num_mac_filters;
2700 if (resc->num_vlan_filters)
2701 vf_vlan_rules_cnt(vf) = resc->num_vlan_filters;
2702
2703 DP(BNX2X_MSG_IOV,
2704 "Fulfilling vf request: sb count %d, tx_count %d, rx_count %d, mac_rules_count %d, vlan_rules_count %d\n",
2705 vf_sb_count(vf), vf_rxq_count(vf),
2706 vf_txq_count(vf), vf_mac_rules_cnt(vf),
2707 vf_vlan_rules_cnt(vf));
2708
2709 /* Initialize the queues */
2710 if (!vf->vfqs) {
2711 DP(BNX2X_MSG_IOV, "vf->vfqs was not allocated\n");
2712 return -EINVAL;
2713 }
2714
2715 for_each_vfq(vf, i) {
2716 struct bnx2x_vf_queue *q = vfq_get(vf, i);
2717
2718 if (!q) {
2719 BNX2X_ERR("q number %d was not allocated\n", i);
2720 return -EINVAL;
2721 }
2722
2723 q->index = i;
2724 q->cxt = &((base_cxt + i)->eth);
2725 q->cid = BNX2X_FIRST_VF_CID + base_vf_cid + i;
2726
2727 DP(BNX2X_MSG_IOV, "VFQ[%d:%d]: index %d, cid 0x%x, cxt %p\n",
2728 vf->abs_vfid, i, q->index, q->cid, q->cxt);
2729
2730 /* init SP objects */
2731 bnx2x_vfq_init(bp, vf, q);
2732 }
2733 vf->state = VF_ACQUIRED;
2734 return 0;
2735 }
2736
2737 int bnx2x_vf_init(struct bnx2x *bp, struct bnx2x_virtf *vf, dma_addr_t *sb_map)
2738 {
2739 struct bnx2x_func_init_params func_init = {0};
2740 u16 flags = 0;
2741 int i;
2742
2743 /* the sb resources are initialized at this point, do the
2744 * FW/HW initializations
2745 */
2746 for_each_vf_sb(vf, i)
2747 bnx2x_init_sb(bp, (dma_addr_t)sb_map[i], vf->abs_vfid, true,
2748 vf_igu_sb(vf, i), vf_igu_sb(vf, i));
2749
2750 /* Sanity checks */
2751 if (vf->state != VF_ACQUIRED) {
2752 DP(BNX2X_MSG_IOV, "VF[%d] is not in VF_ACQUIRED, but %d\n",
2753 vf->abs_vfid, vf->state);
2754 return -EINVAL;
2755 }
2756
2757 /* let FLR complete ... */
2758 msleep(100);
2759
2760 /* FLR cleanup epilogue */
2761 if (bnx2x_vf_flr_clnup_epilog(bp, vf->abs_vfid))
2762 return -EBUSY;
2763
2764 /* reset IGU VF statistics: MSIX */
2765 REG_WR(bp, IGU_REG_STATISTIC_NUM_MESSAGE_SENT + vf->abs_vfid * 4 , 0);
2766
2767 /* vf init */
2768 if (vf->cfg_flags & VF_CFG_STATS)
2769 flags |= (FUNC_FLG_STATS | FUNC_FLG_SPQ);
2770
2771 if (vf->cfg_flags & VF_CFG_TPA)
2772 flags |= FUNC_FLG_TPA;
2773
2774 if (is_vf_multi(vf))
2775 flags |= FUNC_FLG_RSS;
2776
2777 /* function setup */
2778 func_init.func_flgs = flags;
2779 func_init.pf_id = BP_FUNC(bp);
2780 func_init.func_id = FW_VF_HANDLE(vf->abs_vfid);
2781 func_init.fw_stat_map = vf->fw_stat_map;
2782 func_init.spq_map = vf->spq_map;
2783 func_init.spq_prod = 0;
2784 bnx2x_func_init(bp, &func_init);
2785
2786 /* Enable the vf */
2787 bnx2x_vf_enable_access(bp, vf->abs_vfid);
2788 bnx2x_vf_enable_traffic(bp, vf);
2789
2790 /* queue protection table */
2791 for_each_vfq(vf, i)
2792 bnx2x_vf_qtbl_set_q(bp, vf->abs_vfid,
2793 vfq_qzone_id(vf, vfq_get(vf, i)), true);
2794
2795 vf->state = VF_ENABLED;
2796
2797 /* update vf bulletin board */
2798 bnx2x_post_vf_bulletin(bp, vf->index);
2799
2800 return 0;
2801 }
2802
2803 struct set_vf_state_cookie {
2804 struct bnx2x_virtf *vf;
2805 u8 state;
2806 };
2807
2808 void bnx2x_set_vf_state(void *cookie)
2809 {
2810 struct set_vf_state_cookie *p = (struct set_vf_state_cookie *)cookie;
2811
2812 p->vf->state = p->state;
2813 }
2814
2815 /* VFOP close (teardown the queues, delete mcasts and close HW) */
2816 static void bnx2x_vfop_close(struct bnx2x *bp, struct bnx2x_virtf *vf)
2817 {
2818 struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf);
2819 struct bnx2x_vfop_args_qx *qx = &vfop->args.qx;
2820 enum bnx2x_vfop_close_state state = vfop->state;
2821 struct bnx2x_vfop_cmd cmd = {
2822 .done = bnx2x_vfop_close,
2823 .block = false,
2824 };
2825
2826 if (vfop->rc < 0)
2827 goto op_err;
2828
2829 DP(BNX2X_MSG_IOV, "vf[%d] STATE: %d\n", vf->abs_vfid, state);
2830
2831 switch (state) {
2832 case BNX2X_VFOP_CLOSE_QUEUES:
2833
2834 if (++(qx->qid) < vf_rxq_count(vf)) {
2835 vfop->rc = bnx2x_vfop_qdown_cmd(bp, vf, &cmd, qx->qid);
2836 if (vfop->rc)
2837 goto op_err;
2838 return;
2839 }
2840
2841 /* remove multicasts */
2842 vfop->state = BNX2X_VFOP_CLOSE_HW;
2843 vfop->rc = bnx2x_vfop_mcast_cmd(bp, vf, &cmd, NULL, 0, false);
2844 if (vfop->rc)
2845 goto op_err;
2846 return;
2847
2848 case BNX2X_VFOP_CLOSE_HW:
2849
2850 /* disable the interrupts */
2851 DP(BNX2X_MSG_IOV, "disabling igu\n");
2852 bnx2x_vf_igu_disable(bp, vf);
2853
2854 /* disable the VF */
2855 DP(BNX2X_MSG_IOV, "clearing qtbl\n");
2856 bnx2x_vf_clr_qtbl(bp, vf);
2857
2858 goto op_done;
2859 default:
2860 bnx2x_vfop_default(state);
2861 }
2862 op_err:
2863 BNX2X_ERR("VF[%d] CLOSE error: rc %d\n", vf->abs_vfid, vfop->rc);
2864 op_done:
2865
2866 /* need to make sure there are no outstanding stats ramrods which may
2867 * cause the device to access the VF's stats buffer which it will free
2868 * as soon as we return from the close flow.
2869 */
2870 {
2871 struct set_vf_state_cookie cookie;
2872
2873 cookie.vf = vf;
2874 cookie.state = VF_ACQUIRED;
2875 bnx2x_stats_safe_exec(bp, bnx2x_set_vf_state, &cookie);
2876 }
2877
2878 DP(BNX2X_MSG_IOV, "set state to acquired\n");
2879 bnx2x_vfop_end(bp, vf, vfop);
2880 }
2881
2882 int bnx2x_vfop_close_cmd(struct bnx2x *bp,
2883 struct bnx2x_virtf *vf,
2884 struct bnx2x_vfop_cmd *cmd)
2885 {
2886 struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
2887 if (vfop) {
2888 vfop->args.qx.qid = -1; /* loop */
2889 bnx2x_vfop_opset(BNX2X_VFOP_CLOSE_QUEUES,
2890 bnx2x_vfop_close, cmd->done);
2891 return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_close,
2892 cmd->block);
2893 }
2894 return -ENOMEM;
2895 }
2896
2897 /* VF release can be called either: 1. The VF was acquired but
2898 * not enabled 2. the vf was enabled or in the process of being
2899 * enabled
2900 */
2901 static void bnx2x_vfop_release(struct bnx2x *bp, struct bnx2x_virtf *vf)
2902 {
2903 struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf);
2904 struct bnx2x_vfop_cmd cmd = {
2905 .done = bnx2x_vfop_release,
2906 .block = false,
2907 };
2908
2909 DP(BNX2X_MSG_IOV, "vfop->rc %d\n", vfop->rc);
2910
2911 if (vfop->rc < 0)
2912 goto op_err;
2913
2914 DP(BNX2X_MSG_IOV, "VF[%d] STATE: %s\n", vf->abs_vfid,
2915 vf->state == VF_FREE ? "Free" :
2916 vf->state == VF_ACQUIRED ? "Acquired" :
2917 vf->state == VF_ENABLED ? "Enabled" :
2918 vf->state == VF_RESET ? "Reset" :
2919 "Unknown");
2920
2921 switch (vf->state) {
2922 case VF_ENABLED:
2923 vfop->rc = bnx2x_vfop_close_cmd(bp, vf, &cmd);
2924 if (vfop->rc)
2925 goto op_err;
2926 return;
2927
2928 case VF_ACQUIRED:
2929 DP(BNX2X_MSG_IOV, "about to free resources\n");
2930 bnx2x_vf_free_resc(bp, vf);
2931 DP(BNX2X_MSG_IOV, "vfop->rc %d\n", vfop->rc);
2932 goto op_done;
2933
2934 case VF_FREE:
2935 case VF_RESET:
2936 /* do nothing */
2937 goto op_done;
2938 default:
2939 bnx2x_vfop_default(vf->state);
2940 }
2941 op_err:
2942 BNX2X_ERR("VF[%d] RELEASE error: rc %d\n", vf->abs_vfid, vfop->rc);
2943 op_done:
2944 bnx2x_vfop_end(bp, vf, vfop);
2945 }
2946
2947 static void bnx2x_vfop_rss(struct bnx2x *bp, struct bnx2x_virtf *vf)
2948 {
2949 struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf);
2950 enum bnx2x_vfop_rss_state state;
2951
2952 if (!vfop) {
2953 BNX2X_ERR("vfop was null\n");
2954 return;
2955 }
2956
2957 state = vfop->state;
2958 bnx2x_vfop_reset_wq(vf);
2959
2960 if (vfop->rc < 0)
2961 goto op_err;
2962
2963 DP(BNX2X_MSG_IOV, "vf[%d] STATE: %d\n", vf->abs_vfid, state);
2964
2965 switch (state) {
2966 case BNX2X_VFOP_RSS_CONFIG:
2967 /* next state */
2968 vfop->state = BNX2X_VFOP_RSS_DONE;
2969 bnx2x_config_rss(bp, &vfop->op_p->rss);
2970 bnx2x_vfop_finalize(vf, vfop->rc, VFOP_DONE);
2971 op_err:
2972 BNX2X_ERR("RSS error: rc %d\n", vfop->rc);
2973 op_done:
2974 case BNX2X_VFOP_RSS_DONE:
2975 bnx2x_vfop_end(bp, vf, vfop);
2976 return;
2977 default:
2978 bnx2x_vfop_default(state);
2979 }
2980 op_pending:
2981 return;
2982 }
2983
2984 int bnx2x_vfop_release_cmd(struct bnx2x *bp,
2985 struct bnx2x_virtf *vf,
2986 struct bnx2x_vfop_cmd *cmd)
2987 {
2988 struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
2989 if (vfop) {
2990 bnx2x_vfop_opset(-1, /* use vf->state */
2991 bnx2x_vfop_release, cmd->done);
2992 return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_release,
2993 cmd->block);
2994 }
2995 return -ENOMEM;
2996 }
2997
2998 int bnx2x_vfop_rss_cmd(struct bnx2x *bp,
2999 struct bnx2x_virtf *vf,
3000 struct bnx2x_vfop_cmd *cmd)
3001 {
3002 struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
3003
3004 if (vfop) {
3005 bnx2x_vfop_opset(BNX2X_VFOP_RSS_CONFIG, bnx2x_vfop_rss,
3006 cmd->done);
3007 return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_rss,
3008 cmd->block);
3009 }
3010 return -ENOMEM;
3011 }
3012
3013 /* VF release ~ VF close + VF release-resources
3014 * Release is the ultimate SW shutdown and is called whenever an
3015 * irrecoverable error is encountered.
3016 */
3017 void bnx2x_vf_release(struct bnx2x *bp, struct bnx2x_virtf *vf, bool block)
3018 {
3019 struct bnx2x_vfop_cmd cmd = {
3020 .done = NULL,
3021 .block = block,
3022 };
3023 int rc;
3024
3025 DP(BNX2X_MSG_IOV, "PF releasing vf %d\n", vf->abs_vfid);
3026 bnx2x_lock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_RELEASE_VF);
3027
3028 rc = bnx2x_vfop_release_cmd(bp, vf, &cmd);
3029 if (rc)
3030 WARN(rc,
3031 "VF[%d] Failed to allocate resources for release op- rc=%d\n",
3032 vf->abs_vfid, rc);
3033 }
3034
3035 static inline void bnx2x_vf_get_sbdf(struct bnx2x *bp,
3036 struct bnx2x_virtf *vf, u32 *sbdf)
3037 {
3038 *sbdf = vf->devfn | (vf->bus << 8);
3039 }
3040
3041 static inline void bnx2x_vf_get_bars(struct bnx2x *bp, struct bnx2x_virtf *vf,
3042 struct bnx2x_vf_bar_info *bar_info)
3043 {
3044 int n;
3045
3046 bar_info->nr_bars = bp->vfdb->sriov.nres;
3047 for (n = 0; n < bar_info->nr_bars; n++)
3048 bar_info->bars[n] = vf->bars[n];
3049 }
3050
3051 void bnx2x_lock_vf_pf_channel(struct bnx2x *bp, struct bnx2x_virtf *vf,
3052 enum channel_tlvs tlv)
3053 {
3054 /* we don't lock the channel for unsupported tlvs */
3055 if (!bnx2x_tlv_supported(tlv)) {
3056 BNX2X_ERR("attempting to lock with unsupported tlv. Aborting\n");
3057 return;
3058 }
3059
3060 /* lock the channel */
3061 mutex_lock(&vf->op_mutex);
3062
3063 /* record the locking op */
3064 vf->op_current = tlv;
3065
3066 /* log the lock */
3067 DP(BNX2X_MSG_IOV, "VF[%d]: vf pf channel locked by %d\n",
3068 vf->abs_vfid, tlv);
3069 }
3070
3071 void bnx2x_unlock_vf_pf_channel(struct bnx2x *bp, struct bnx2x_virtf *vf,
3072 enum channel_tlvs expected_tlv)
3073 {
3074 enum channel_tlvs current_tlv;
3075
3076 if (!vf) {
3077 BNX2X_ERR("VF was %p\n", vf);
3078 return;
3079 }
3080
3081 current_tlv = vf->op_current;
3082
3083 /* we don't unlock the channel for unsupported tlvs */
3084 if (!bnx2x_tlv_supported(expected_tlv))
3085 return;
3086
3087 WARN(expected_tlv != vf->op_current,
3088 "lock mismatch: expected %d found %d", expected_tlv,
3089 vf->op_current);
3090
3091 /* record the locking op */
3092 vf->op_current = CHANNEL_TLV_NONE;
3093
3094 /* lock the channel */
3095 mutex_unlock(&vf->op_mutex);
3096
3097 /* log the unlock */
3098 DP(BNX2X_MSG_IOV, "VF[%d]: vf pf channel unlocked by %d\n",
3099 vf->abs_vfid, vf->op_current);
3100 }
3101
3102 int bnx2x_sriov_configure(struct pci_dev *dev, int num_vfs_param)
3103 {
3104 struct bnx2x *bp = netdev_priv(pci_get_drvdata(dev));
3105
3106 DP(BNX2X_MSG_IOV, "bnx2x_sriov_configure called with %d, BNX2X_NR_VIRTFN(bp) was %d\n",
3107 num_vfs_param, BNX2X_NR_VIRTFN(bp));
3108
3109 /* HW channel is only operational when PF is up */
3110 if (bp->state != BNX2X_STATE_OPEN) {
3111 BNX2X_ERR("VF num configuration via sysfs not supported while PF is down\n");
3112 return -EINVAL;
3113 }
3114
3115 /* we are always bound by the total_vfs in the configuration space */
3116 if (num_vfs_param > BNX2X_NR_VIRTFN(bp)) {
3117 BNX2X_ERR("truncating requested number of VFs (%d) down to maximum allowed (%d)\n",
3118 num_vfs_param, BNX2X_NR_VIRTFN(bp));
3119 num_vfs_param = BNX2X_NR_VIRTFN(bp);
3120 }
3121
3122 bp->requested_nr_virtfn = num_vfs_param;
3123 if (num_vfs_param == 0) {
3124 pci_disable_sriov(dev);
3125 return 0;
3126 } else {
3127 return bnx2x_enable_sriov(bp);
3128 }
3129 }
3130 #define IGU_ENTRY_SIZE 4
3131
3132 int bnx2x_enable_sriov(struct bnx2x *bp)
3133 {
3134 int rc = 0, req_vfs = bp->requested_nr_virtfn;
3135 int vf_idx, sb_idx, vfq_idx, qcount, first_vf;
3136 u32 igu_entry, address;
3137 u16 num_vf_queues;
3138
3139 if (req_vfs == 0)
3140 return 0;
3141
3142 first_vf = bp->vfdb->sriov.first_vf_in_pf;
3143
3144 /* statically distribute vf sb pool between VFs */
3145 num_vf_queues = min_t(u16, BNX2X_VF_MAX_QUEUES,
3146 BP_VFDB(bp)->vf_sbs_pool / req_vfs);
3147
3148 /* zero previous values learned from igu cam */
3149 for (vf_idx = 0; vf_idx < req_vfs; vf_idx++) {
3150 struct bnx2x_virtf *vf = BP_VF(bp, vf_idx);
3151
3152 vf->sb_count = 0;
3153 vf_sb_count(BP_VF(bp, vf_idx)) = 0;
3154 }
3155 bp->vfdb->vf_sbs_pool = 0;
3156
3157 /* prepare IGU cam */
3158 sb_idx = BP_VFDB(bp)->first_vf_igu_entry;
3159 address = IGU_REG_MAPPING_MEMORY + sb_idx * IGU_ENTRY_SIZE;
3160 for (vf_idx = first_vf; vf_idx < first_vf + req_vfs; vf_idx++) {
3161 for (vfq_idx = 0; vfq_idx < num_vf_queues; vfq_idx++) {
3162 igu_entry = vf_idx << IGU_REG_MAPPING_MEMORY_FID_SHIFT |
3163 vfq_idx << IGU_REG_MAPPING_MEMORY_VECTOR_SHIFT |
3164 IGU_REG_MAPPING_MEMORY_VALID;
3165 DP(BNX2X_MSG_IOV, "assigning sb %d to vf %d\n",
3166 sb_idx, vf_idx);
3167 REG_WR(bp, address, igu_entry);
3168 sb_idx++;
3169 address += IGU_ENTRY_SIZE;
3170 }
3171 }
3172
3173 /* Reinitialize vf database according to igu cam */
3174 bnx2x_get_vf_igu_cam_info(bp);
3175
3176 DP(BNX2X_MSG_IOV, "vf_sbs_pool %d, num_vf_queues %d\n",
3177 BP_VFDB(bp)->vf_sbs_pool, num_vf_queues);
3178
3179 qcount = 0;
3180 for_each_vf(bp, vf_idx) {
3181 struct bnx2x_virtf *vf = BP_VF(bp, vf_idx);
3182
3183 /* set local queue arrays */
3184 vf->vfqs = &bp->vfdb->vfqs[qcount];
3185 qcount += vf_sb_count(vf);
3186 }
3187
3188 /* prepare msix vectors in VF configuration space */
3189 for (vf_idx = first_vf; vf_idx < first_vf + req_vfs; vf_idx++) {
3190 bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, vf_idx));
3191 REG_WR(bp, PCICFG_OFFSET + GRC_CONFIG_REG_VF_MSIX_CONTROL,
3192 num_vf_queues);
3193 }
3194 bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
3195
3196 /* enable sriov. This will probe all the VFs, and consequentially cause
3197 * the "acquire" messages to appear on the VF PF channel.
3198 */
3199 DP(BNX2X_MSG_IOV, "about to call enable sriov\n");
3200 pci_disable_sriov(bp->pdev);
3201 rc = pci_enable_sriov(bp->pdev, req_vfs);
3202 if (rc) {
3203 BNX2X_ERR("pci_enable_sriov failed with %d\n", rc);
3204 return rc;
3205 }
3206 DP(BNX2X_MSG_IOV, "sriov enabled (%d vfs)\n", req_vfs);
3207 return req_vfs;
3208 }
3209
3210 void bnx2x_pf_set_vfs_vlan(struct bnx2x *bp)
3211 {
3212 int vfidx;
3213 struct pf_vf_bulletin_content *bulletin;
3214
3215 DP(BNX2X_MSG_IOV, "configuring vlan for VFs from sp-task\n");
3216 for_each_vf(bp, vfidx) {
3217 bulletin = BP_VF_BULLETIN(bp, vfidx);
3218 if (BP_VF(bp, vfidx)->cfg_flags & VF_CFG_VLAN)
3219 bnx2x_set_vf_vlan(bp->dev, vfidx, bulletin->vlan, 0);
3220 }
3221 }
3222
3223 void bnx2x_disable_sriov(struct bnx2x *bp)
3224 {
3225 pci_disable_sriov(bp->pdev);
3226 }
3227
3228 int bnx2x_vf_ndo_prep(struct bnx2x *bp, int vfidx, struct bnx2x_virtf **vf,
3229 struct pf_vf_bulletin_content **bulletin)
3230 {
3231 if (bp->state != BNX2X_STATE_OPEN) {
3232 BNX2X_ERR("vf ndo called though PF is down\n");
3233 return -EINVAL;
3234 }
3235
3236 if (!IS_SRIOV(bp)) {
3237 BNX2X_ERR("vf ndo called though sriov is disabled\n");
3238 return -EINVAL;
3239 }
3240
3241 if (vfidx >= BNX2X_NR_VIRTFN(bp)) {
3242 BNX2X_ERR("vf ndo called for uninitialized VF. vfidx was %d BNX2X_NR_VIRTFN was %d\n",
3243 vfidx, BNX2X_NR_VIRTFN(bp));
3244 return -EINVAL;
3245 }
3246
3247 /* init members */
3248 *vf = BP_VF(bp, vfidx);
3249 *bulletin = BP_VF_BULLETIN(bp, vfidx);
3250
3251 if (!*vf) {
3252 BNX2X_ERR("vf ndo called but vf struct is null. vfidx was %d\n",
3253 vfidx);
3254 return -EINVAL;
3255 }
3256
3257 if (!(*vf)->vfqs) {
3258 BNX2X_ERR("vf ndo called but vfqs struct is null. Was ndo invoked before dynamically enabling SR-IOV? vfidx was %d\n",
3259 vfidx);
3260 return -EINVAL;
3261 }
3262
3263 if (!*bulletin) {
3264 BNX2X_ERR("vf ndo called but Bulletin Board struct is null. vfidx was %d\n",
3265 vfidx);
3266 return -EINVAL;
3267 }
3268
3269 return 0;
3270 }
3271
3272 int bnx2x_get_vf_config(struct net_device *dev, int vfidx,
3273 struct ifla_vf_info *ivi)
3274 {
3275 struct bnx2x *bp = netdev_priv(dev);
3276 struct bnx2x_virtf *vf = NULL;
3277 struct pf_vf_bulletin_content *bulletin = NULL;
3278 struct bnx2x_vlan_mac_obj *mac_obj;
3279 struct bnx2x_vlan_mac_obj *vlan_obj;
3280 int rc;
3281
3282 /* sanity and init */
3283 rc = bnx2x_vf_ndo_prep(bp, vfidx, &vf, &bulletin);
3284 if (rc)
3285 return rc;
3286 mac_obj = &bnx2x_leading_vfq(vf, mac_obj);
3287 vlan_obj = &bnx2x_leading_vfq(vf, vlan_obj);
3288 if (!mac_obj || !vlan_obj) {
3289 BNX2X_ERR("VF partially initialized\n");
3290 return -EINVAL;
3291 }
3292
3293 ivi->vf = vfidx;
3294 ivi->qos = 0;
3295 ivi->tx_rate = 10000; /* always 10G. TBA take from link struct */
3296 ivi->spoofchk = 1; /*always enabled */
3297 if (vf->state == VF_ENABLED) {
3298 /* mac and vlan are in vlan_mac objects */
3299 if (validate_vlan_mac(bp, &bnx2x_leading_vfq(vf, mac_obj)))
3300 mac_obj->get_n_elements(bp, mac_obj, 1, (u8 *)&ivi->mac,
3301 0, ETH_ALEN);
3302 if (validate_vlan_mac(bp, &bnx2x_leading_vfq(vf, vlan_obj)))
3303 vlan_obj->get_n_elements(bp, vlan_obj, 1,
3304 (u8 *)&ivi->vlan, 0,
3305 VLAN_HLEN);
3306 } else {
3307 /* mac */
3308 if (bulletin->valid_bitmap & (1 << MAC_ADDR_VALID))
3309 /* mac configured by ndo so its in bulletin board */
3310 memcpy(&ivi->mac, bulletin->mac, ETH_ALEN);
3311 else
3312 /* function has not been loaded yet. Show mac as 0s */
3313 memset(&ivi->mac, 0, ETH_ALEN);
3314
3315 /* vlan */
3316 if (bulletin->valid_bitmap & (1 << VLAN_VALID))
3317 /* vlan configured by ndo so its in bulletin board */
3318 memcpy(&ivi->vlan, &bulletin->vlan, VLAN_HLEN);
3319 else
3320 /* function has not been loaded yet. Show vlans as 0s */
3321 memset(&ivi->vlan, 0, VLAN_HLEN);
3322 }
3323
3324 return 0;
3325 }
3326
3327 /* New mac for VF. Consider these cases:
3328 * 1. VF hasn't been acquired yet - save the mac in local bulletin board and
3329 * supply at acquire.
3330 * 2. VF has already been acquired but has not yet initialized - store in local
3331 * bulletin board. mac will be posted on VF bulletin board after VF init. VF
3332 * will configure this mac when it is ready.
3333 * 3. VF has already initialized but has not yet setup a queue - post the new
3334 * mac on VF's bulletin board right now. VF will configure this mac when it
3335 * is ready.
3336 * 4. VF has already set a queue - delete any macs already configured for this
3337 * queue and manually config the new mac.
3338 * In any event, once this function has been called refuse any attempts by the
3339 * VF to configure any mac for itself except for this mac. In case of a race
3340 * where the VF fails to see the new post on its bulletin board before sending a
3341 * mac configuration request, the PF will simply fail the request and VF can try
3342 * again after consulting its bulletin board.
3343 */
3344 int bnx2x_set_vf_mac(struct net_device *dev, int vfidx, u8 *mac)
3345 {
3346 struct bnx2x *bp = netdev_priv(dev);
3347 int rc, q_logical_state;
3348 struct bnx2x_virtf *vf = NULL;
3349 struct pf_vf_bulletin_content *bulletin = NULL;
3350
3351 /* sanity and init */
3352 rc = bnx2x_vf_ndo_prep(bp, vfidx, &vf, &bulletin);
3353 if (rc)
3354 return rc;
3355 if (!is_valid_ether_addr(mac)) {
3356 BNX2X_ERR("mac address invalid\n");
3357 return -EINVAL;
3358 }
3359
3360 /* update PF's copy of the VF's bulletin. Will no longer accept mac
3361 * configuration requests from vf unless match this mac
3362 */
3363 bulletin->valid_bitmap |= 1 << MAC_ADDR_VALID;
3364 memcpy(bulletin->mac, mac, ETH_ALEN);
3365
3366 /* Post update on VF's bulletin board */
3367 rc = bnx2x_post_vf_bulletin(bp, vfidx);
3368 if (rc) {
3369 BNX2X_ERR("failed to update VF[%d] bulletin\n", vfidx);
3370 return rc;
3371 }
3372
3373 q_logical_state =
3374 bnx2x_get_q_logical_state(bp, &bnx2x_leading_vfq(vf, sp_obj));
3375 if (vf->state == VF_ENABLED &&
3376 q_logical_state == BNX2X_Q_LOGICAL_STATE_ACTIVE) {
3377 /* configure the mac in device on this vf's queue */
3378 unsigned long ramrod_flags = 0;
3379 struct bnx2x_vlan_mac_obj *mac_obj =
3380 &bnx2x_leading_vfq(vf, mac_obj);
3381
3382 rc = validate_vlan_mac(bp, &bnx2x_leading_vfq(vf, mac_obj));
3383 if (rc)
3384 return rc;
3385
3386 /* must lock vfpf channel to protect against vf flows */
3387 bnx2x_lock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_SET_MAC);
3388
3389 /* remove existing eth macs */
3390 rc = bnx2x_del_all_macs(bp, mac_obj, BNX2X_ETH_MAC, true);
3391 if (rc) {
3392 BNX2X_ERR("failed to delete eth macs\n");
3393 return -EINVAL;
3394 }
3395
3396 /* remove existing uc list macs */
3397 rc = bnx2x_del_all_macs(bp, mac_obj, BNX2X_UC_LIST_MAC, true);
3398 if (rc) {
3399 BNX2X_ERR("failed to delete uc_list macs\n");
3400 return -EINVAL;
3401 }
3402
3403 /* configure the new mac to device */
3404 __set_bit(RAMROD_COMP_WAIT, &ramrod_flags);
3405 bnx2x_set_mac_one(bp, (u8 *)&bulletin->mac, mac_obj, true,
3406 BNX2X_ETH_MAC, &ramrod_flags);
3407
3408 bnx2x_unlock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_SET_MAC);
3409 }
3410
3411 return 0;
3412 }
3413
3414 int bnx2x_set_vf_vlan(struct net_device *dev, int vfidx, u16 vlan, u8 qos)
3415 {
3416 struct bnx2x *bp = netdev_priv(dev);
3417 int rc, q_logical_state;
3418 struct bnx2x_virtf *vf = NULL;
3419 struct pf_vf_bulletin_content *bulletin = NULL;
3420
3421 /* sanity and init */
3422 rc = bnx2x_vf_ndo_prep(bp, vfidx, &vf, &bulletin);
3423 if (rc)
3424 return rc;
3425
3426 if (vlan > 4095) {
3427 BNX2X_ERR("illegal vlan value %d\n", vlan);
3428 return -EINVAL;
3429 }
3430
3431 DP(BNX2X_MSG_IOV, "configuring VF %d with VLAN %d qos %d\n",
3432 vfidx, vlan, 0);
3433
3434 /* update PF's copy of the VF's bulletin. No point in posting the vlan
3435 * to the VF since it doesn't have anything to do with it. But it useful
3436 * to store it here in case the VF is not up yet and we can only
3437 * configure the vlan later when it does.
3438 */
3439 bulletin->valid_bitmap |= 1 << VLAN_VALID;
3440 bulletin->vlan = vlan;
3441
3442 /* is vf initialized and queue set up? */
3443 q_logical_state =
3444 bnx2x_get_q_logical_state(bp, &bnx2x_leading_vfq(vf, sp_obj));
3445 if (vf->state == VF_ENABLED &&
3446 q_logical_state == BNX2X_Q_LOGICAL_STATE_ACTIVE) {
3447 /* configure the vlan in device on this vf's queue */
3448 unsigned long ramrod_flags = 0;
3449 unsigned long vlan_mac_flags = 0;
3450 struct bnx2x_vlan_mac_obj *vlan_obj =
3451 &bnx2x_leading_vfq(vf, vlan_obj);
3452 struct bnx2x_vlan_mac_ramrod_params ramrod_param;
3453 struct bnx2x_queue_state_params q_params = {NULL};
3454 struct bnx2x_queue_update_params *update_params;
3455
3456 rc = validate_vlan_mac(bp, &bnx2x_leading_vfq(vf, mac_obj));
3457 if (rc)
3458 return rc;
3459 memset(&ramrod_param, 0, sizeof(ramrod_param));
3460
3461 /* must lock vfpf channel to protect against vf flows */
3462 bnx2x_lock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_SET_VLAN);
3463
3464 /* remove existing vlans */
3465 __set_bit(RAMROD_COMP_WAIT, &ramrod_flags);
3466 rc = vlan_obj->delete_all(bp, vlan_obj, &vlan_mac_flags,
3467 &ramrod_flags);
3468 if (rc) {
3469 BNX2X_ERR("failed to delete vlans\n");
3470 return -EINVAL;
3471 }
3472
3473 /* send queue update ramrod to configure default vlan and silent
3474 * vlan removal
3475 */
3476 __set_bit(RAMROD_COMP_WAIT, &q_params.ramrod_flags);
3477 q_params.cmd = BNX2X_Q_CMD_UPDATE;
3478 q_params.q_obj = &bnx2x_leading_vfq(vf, sp_obj);
3479 update_params = &q_params.params.update;
3480 __set_bit(BNX2X_Q_UPDATE_DEF_VLAN_EN_CHNG,
3481 &update_params->update_flags);
3482 __set_bit(BNX2X_Q_UPDATE_SILENT_VLAN_REM_CHNG,
3483 &update_params->update_flags);
3484
3485 if (vlan == 0) {
3486 /* if vlan is 0 then we want to leave the VF traffic
3487 * untagged, and leave the incoming traffic untouched
3488 * (i.e. do not remove any vlan tags).
3489 */
3490 __clear_bit(BNX2X_Q_UPDATE_DEF_VLAN_EN,
3491 &update_params->update_flags);
3492 __clear_bit(BNX2X_Q_UPDATE_SILENT_VLAN_REM,
3493 &update_params->update_flags);
3494 } else {
3495 /* configure the new vlan to device */
3496 __set_bit(RAMROD_COMP_WAIT, &ramrod_flags);
3497 ramrod_param.vlan_mac_obj = vlan_obj;
3498 ramrod_param.ramrod_flags = ramrod_flags;
3499 ramrod_param.user_req.u.vlan.vlan = vlan;
3500 ramrod_param.user_req.cmd = BNX2X_VLAN_MAC_ADD;
3501 rc = bnx2x_config_vlan_mac(bp, &ramrod_param);
3502 if (rc) {
3503 BNX2X_ERR("failed to configure vlan\n");
3504 return -EINVAL;
3505 }
3506
3507 /* configure default vlan to vf queue and set silent
3508 * vlan removal (the vf remains unaware of this vlan).
3509 */
3510 update_params = &q_params.params.update;
3511 __set_bit(BNX2X_Q_UPDATE_DEF_VLAN_EN,
3512 &update_params->update_flags);
3513 __set_bit(BNX2X_Q_UPDATE_SILENT_VLAN_REM,
3514 &update_params->update_flags);
3515 update_params->def_vlan = vlan;
3516 }
3517
3518 /* Update the Queue state */
3519 rc = bnx2x_queue_state_change(bp, &q_params);
3520 if (rc) {
3521 BNX2X_ERR("Failed to configure default VLAN\n");
3522 return rc;
3523 }
3524
3525 /* clear the flag indicating that this VF needs its vlan
3526 * (will only be set if the HV configured th Vlan before vf was
3527 * and we were called because the VF came up later
3528 */
3529 vf->cfg_flags &= ~VF_CFG_VLAN;
3530
3531 bnx2x_unlock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_SET_VLAN);
3532 }
3533 return 0;
3534 }
3535
3536 /* crc is the first field in the bulletin board. Compute the crc over the
3537 * entire bulletin board excluding the crc field itself. Use the length field
3538 * as the Bulletin Board was posted by a PF with possibly a different version
3539 * from the vf which will sample it. Therefore, the length is computed by the
3540 * PF and the used blindly by the VF.
3541 */
3542 u32 bnx2x_crc_vf_bulletin(struct bnx2x *bp,
3543 struct pf_vf_bulletin_content *bulletin)
3544 {
3545 return crc32(BULLETIN_CRC_SEED,
3546 ((u8 *)bulletin) + sizeof(bulletin->crc),
3547 bulletin->length - sizeof(bulletin->crc));
3548 }
3549
3550 /* Check for new posts on the bulletin board */
3551 enum sample_bulletin_result bnx2x_sample_bulletin(struct bnx2x *bp)
3552 {
3553 struct pf_vf_bulletin_content bulletin = bp->pf2vf_bulletin->content;
3554 int attempts;
3555
3556 /* bulletin board hasn't changed since last sample */
3557 if (bp->old_bulletin.version == bulletin.version)
3558 return PFVF_BULLETIN_UNCHANGED;
3559
3560 /* validate crc of new bulletin board */
3561 if (bp->old_bulletin.version != bp->pf2vf_bulletin->content.version) {
3562 /* sampling structure in mid post may result with corrupted data
3563 * validate crc to ensure coherency.
3564 */
3565 for (attempts = 0; attempts < BULLETIN_ATTEMPTS; attempts++) {
3566 bulletin = bp->pf2vf_bulletin->content;
3567 if (bulletin.crc == bnx2x_crc_vf_bulletin(bp,
3568 &bulletin))
3569 break;
3570 BNX2X_ERR("bad crc on bulletin board. Contained %x computed %x\n",
3571 bulletin.crc,
3572 bnx2x_crc_vf_bulletin(bp, &bulletin));
3573 }
3574 if (attempts >= BULLETIN_ATTEMPTS) {
3575 BNX2X_ERR("pf to vf bulletin board crc was wrong %d consecutive times. Aborting\n",
3576 attempts);
3577 return PFVF_BULLETIN_CRC_ERR;
3578 }
3579 }
3580
3581 /* the mac address in bulletin board is valid and is new */
3582 if (bulletin.valid_bitmap & 1 << MAC_ADDR_VALID &&
3583 memcmp(bulletin.mac, bp->old_bulletin.mac, ETH_ALEN)) {
3584 /* update new mac to net device */
3585 memcpy(bp->dev->dev_addr, bulletin.mac, ETH_ALEN);
3586 }
3587
3588 /* the vlan in bulletin board is valid and is new */
3589 if (bulletin.valid_bitmap & 1 << VLAN_VALID)
3590 memcpy(&bulletin.vlan, &bp->old_bulletin.vlan, VLAN_HLEN);
3591
3592 /* copy new bulletin board to bp */
3593 bp->old_bulletin = bulletin;
3594
3595 return PFVF_BULLETIN_UPDATED;
3596 }
3597
3598 void bnx2x_timer_sriov(struct bnx2x *bp)
3599 {
3600 bnx2x_sample_bulletin(bp);
3601
3602 /* if channel is down we need to self destruct */
3603 if (bp->old_bulletin.valid_bitmap & 1 << CHANNEL_DOWN) {
3604 smp_mb__before_clear_bit();
3605 set_bit(BNX2X_SP_RTNL_VFPF_CHANNEL_DOWN,
3606 &bp->sp_rtnl_state);
3607 smp_mb__after_clear_bit();
3608 schedule_delayed_work(&bp->sp_rtnl_task, 0);
3609 }
3610 }
3611
3612 void __iomem *bnx2x_vf_doorbells(struct bnx2x *bp)
3613 {
3614 /* vf doorbells are embedded within the regview */
3615 return bp->regview + PXP_VF_ADDR_DB_START;
3616 }
3617
3618 int bnx2x_vf_pci_alloc(struct bnx2x *bp)
3619 {
3620 mutex_init(&bp->vf2pf_mutex);
3621
3622 /* allocate vf2pf mailbox for vf to pf channel */
3623 BNX2X_PCI_ALLOC(bp->vf2pf_mbox, &bp->vf2pf_mbox_mapping,
3624 sizeof(struct bnx2x_vf_mbx_msg));
3625
3626 /* allocate pf 2 vf bulletin board */
3627 BNX2X_PCI_ALLOC(bp->pf2vf_bulletin, &bp->pf2vf_bulletin_mapping,
3628 sizeof(union pf_vf_bulletin));
3629
3630 return 0;
3631
3632 alloc_mem_err:
3633 BNX2X_PCI_FREE(bp->vf2pf_mbox, bp->vf2pf_mbox_mapping,
3634 sizeof(struct bnx2x_vf_mbx_msg));
3635 BNX2X_PCI_FREE(bp->vf2pf_mbox, bp->pf2vf_bulletin_mapping,
3636 sizeof(union pf_vf_bulletin));
3637 return -ENOMEM;
3638 }
3639
3640 int bnx2x_open_epilog(struct bnx2x *bp)
3641 {
3642 /* Enable sriov via delayed work. This must be done via delayed work
3643 * because it causes the probe of the vf devices to be run, which invoke
3644 * register_netdevice which must have rtnl lock taken. As we are holding
3645 * the lock right now, that could only work if the probe would not take
3646 * the lock. However, as the probe of the vf may be called from other
3647 * contexts as well (such as passthrough to vm fails) it can't assume
3648 * the lock is being held for it. Using delayed work here allows the
3649 * probe code to simply take the lock (i.e. wait for it to be released
3650 * if it is being held). We only want to do this if the number of VFs
3651 * was set before PF driver was loaded.
3652 */
3653 if (IS_SRIOV(bp) && BNX2X_NR_VIRTFN(bp)) {
3654 smp_mb__before_clear_bit();
3655 set_bit(BNX2X_SP_RTNL_ENABLE_SRIOV, &bp->sp_rtnl_state);
3656 smp_mb__after_clear_bit();
3657 schedule_delayed_work(&bp->sp_rtnl_task, 0);
3658 }
3659
3660 return 0;
3661 }
3662
3663 void bnx2x_iov_channel_down(struct bnx2x *bp)
3664 {
3665 int vf_idx;
3666 struct pf_vf_bulletin_content *bulletin;
3667
3668 if (!IS_SRIOV(bp))
3669 return;
3670
3671 for_each_vf(bp, vf_idx) {
3672 /* locate this VFs bulletin board and update the channel down
3673 * bit
3674 */
3675 bulletin = BP_VF_BULLETIN(bp, vf_idx);
3676 bulletin->valid_bitmap |= 1 << CHANNEL_DOWN;
3677
3678 /* update vf bulletin board */
3679 bnx2x_post_vf_bulletin(bp, vf_idx);
3680 }
3681 }
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