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net/rds: Add a few missing rds_stat_names entries
[mirror_ubuntu-bionic-kernel.git] / drivers / net / ethernet / broadcom / bnxt / bnxt_ethtool.c
1 /* Broadcom NetXtreme-C/E network driver.
2 *
3 * Copyright (c) 2014-2016 Broadcom Corporation
4 * Copyright (c) 2016-2017 Broadcom Limited
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation.
9 */
10
11 #include <linux/ctype.h>
12 #include <linux/stringify.h>
13 #include <linux/ethtool.h>
14 #include <linux/interrupt.h>
15 #include <linux/pci.h>
16 #include <linux/etherdevice.h>
17 #include <linux/crc32.h>
18 #include <linux/firmware.h>
19 #include "bnxt_hsi.h"
20 #include "bnxt.h"
21 #include "bnxt_xdp.h"
22 #include "bnxt_ethtool.h"
23 #include "bnxt_nvm_defs.h" /* NVRAM content constant and structure defs */
24 #include "bnxt_fw_hdr.h" /* Firmware hdr constant and structure defs */
25 #define FLASH_NVRAM_TIMEOUT ((HWRM_CMD_TIMEOUT) * 100)
26 #define FLASH_PACKAGE_TIMEOUT ((HWRM_CMD_TIMEOUT) * 200)
27 #define INSTALL_PACKAGE_TIMEOUT ((HWRM_CMD_TIMEOUT) * 200)
28
29 static u32 bnxt_get_msglevel(struct net_device *dev)
30 {
31 struct bnxt *bp = netdev_priv(dev);
32
33 return bp->msg_enable;
34 }
35
36 static void bnxt_set_msglevel(struct net_device *dev, u32 value)
37 {
38 struct bnxt *bp = netdev_priv(dev);
39
40 bp->msg_enable = value;
41 }
42
43 static int bnxt_get_coalesce(struct net_device *dev,
44 struct ethtool_coalesce *coal)
45 {
46 struct bnxt *bp = netdev_priv(dev);
47 struct bnxt_coal *hw_coal;
48 u16 mult;
49
50 memset(coal, 0, sizeof(*coal));
51
52 hw_coal = &bp->rx_coal;
53 mult = hw_coal->bufs_per_record;
54 coal->rx_coalesce_usecs = hw_coal->coal_ticks;
55 coal->rx_max_coalesced_frames = hw_coal->coal_bufs / mult;
56 coal->rx_coalesce_usecs_irq = hw_coal->coal_ticks_irq;
57 coal->rx_max_coalesced_frames_irq = hw_coal->coal_bufs_irq / mult;
58
59 hw_coal = &bp->tx_coal;
60 mult = hw_coal->bufs_per_record;
61 coal->tx_coalesce_usecs = hw_coal->coal_ticks;
62 coal->tx_max_coalesced_frames = hw_coal->coal_bufs / mult;
63 coal->tx_coalesce_usecs_irq = hw_coal->coal_ticks_irq;
64 coal->tx_max_coalesced_frames_irq = hw_coal->coal_bufs_irq / mult;
65
66 coal->stats_block_coalesce_usecs = bp->stats_coal_ticks;
67
68 return 0;
69 }
70
71 static int bnxt_set_coalesce(struct net_device *dev,
72 struct ethtool_coalesce *coal)
73 {
74 struct bnxt *bp = netdev_priv(dev);
75 bool update_stats = false;
76 struct bnxt_coal *hw_coal;
77 int rc = 0;
78 u16 mult;
79
80 hw_coal = &bp->rx_coal;
81 mult = hw_coal->bufs_per_record;
82 hw_coal->coal_ticks = coal->rx_coalesce_usecs;
83 hw_coal->coal_bufs = coal->rx_max_coalesced_frames * mult;
84 hw_coal->coal_ticks_irq = coal->rx_coalesce_usecs_irq;
85 hw_coal->coal_bufs_irq = coal->rx_max_coalesced_frames_irq * mult;
86
87 hw_coal = &bp->tx_coal;
88 mult = hw_coal->bufs_per_record;
89 hw_coal->coal_ticks = coal->tx_coalesce_usecs;
90 hw_coal->coal_bufs = coal->tx_max_coalesced_frames * mult;
91 hw_coal->coal_ticks_irq = coal->tx_coalesce_usecs_irq;
92 hw_coal->coal_bufs_irq = coal->tx_max_coalesced_frames_irq * mult;
93
94 if (bp->stats_coal_ticks != coal->stats_block_coalesce_usecs) {
95 u32 stats_ticks = coal->stats_block_coalesce_usecs;
96
97 /* Allow 0, which means disable. */
98 if (stats_ticks)
99 stats_ticks = clamp_t(u32, stats_ticks,
100 BNXT_MIN_STATS_COAL_TICKS,
101 BNXT_MAX_STATS_COAL_TICKS);
102 stats_ticks = rounddown(stats_ticks, BNXT_MIN_STATS_COAL_TICKS);
103 bp->stats_coal_ticks = stats_ticks;
104 update_stats = true;
105 }
106
107 if (netif_running(dev)) {
108 if (update_stats) {
109 rc = bnxt_close_nic(bp, true, false);
110 if (!rc)
111 rc = bnxt_open_nic(bp, true, false);
112 } else {
113 rc = bnxt_hwrm_set_coal(bp);
114 }
115 }
116
117 return rc;
118 }
119
120 #define BNXT_NUM_STATS 21
121
122 #define BNXT_RX_STATS_ENTRY(counter) \
123 { BNXT_RX_STATS_OFFSET(counter), __stringify(counter) }
124
125 #define BNXT_TX_STATS_ENTRY(counter) \
126 { BNXT_TX_STATS_OFFSET(counter), __stringify(counter) }
127
128 static const struct {
129 long offset;
130 char string[ETH_GSTRING_LEN];
131 } bnxt_port_stats_arr[] = {
132 BNXT_RX_STATS_ENTRY(rx_64b_frames),
133 BNXT_RX_STATS_ENTRY(rx_65b_127b_frames),
134 BNXT_RX_STATS_ENTRY(rx_128b_255b_frames),
135 BNXT_RX_STATS_ENTRY(rx_256b_511b_frames),
136 BNXT_RX_STATS_ENTRY(rx_512b_1023b_frames),
137 BNXT_RX_STATS_ENTRY(rx_1024b_1518_frames),
138 BNXT_RX_STATS_ENTRY(rx_good_vlan_frames),
139 BNXT_RX_STATS_ENTRY(rx_1519b_2047b_frames),
140 BNXT_RX_STATS_ENTRY(rx_2048b_4095b_frames),
141 BNXT_RX_STATS_ENTRY(rx_4096b_9216b_frames),
142 BNXT_RX_STATS_ENTRY(rx_9217b_16383b_frames),
143 BNXT_RX_STATS_ENTRY(rx_total_frames),
144 BNXT_RX_STATS_ENTRY(rx_ucast_frames),
145 BNXT_RX_STATS_ENTRY(rx_mcast_frames),
146 BNXT_RX_STATS_ENTRY(rx_bcast_frames),
147 BNXT_RX_STATS_ENTRY(rx_fcs_err_frames),
148 BNXT_RX_STATS_ENTRY(rx_ctrl_frames),
149 BNXT_RX_STATS_ENTRY(rx_pause_frames),
150 BNXT_RX_STATS_ENTRY(rx_pfc_frames),
151 BNXT_RX_STATS_ENTRY(rx_align_err_frames),
152 BNXT_RX_STATS_ENTRY(rx_ovrsz_frames),
153 BNXT_RX_STATS_ENTRY(rx_jbr_frames),
154 BNXT_RX_STATS_ENTRY(rx_mtu_err_frames),
155 BNXT_RX_STATS_ENTRY(rx_tagged_frames),
156 BNXT_RX_STATS_ENTRY(rx_double_tagged_frames),
157 BNXT_RX_STATS_ENTRY(rx_good_frames),
158 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri0),
159 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri1),
160 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri2),
161 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri3),
162 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri4),
163 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri5),
164 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri6),
165 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri7),
166 BNXT_RX_STATS_ENTRY(rx_undrsz_frames),
167 BNXT_RX_STATS_ENTRY(rx_eee_lpi_events),
168 BNXT_RX_STATS_ENTRY(rx_eee_lpi_duration),
169 BNXT_RX_STATS_ENTRY(rx_bytes),
170 BNXT_RX_STATS_ENTRY(rx_runt_bytes),
171 BNXT_RX_STATS_ENTRY(rx_runt_frames),
172
173 BNXT_TX_STATS_ENTRY(tx_64b_frames),
174 BNXT_TX_STATS_ENTRY(tx_65b_127b_frames),
175 BNXT_TX_STATS_ENTRY(tx_128b_255b_frames),
176 BNXT_TX_STATS_ENTRY(tx_256b_511b_frames),
177 BNXT_TX_STATS_ENTRY(tx_512b_1023b_frames),
178 BNXT_TX_STATS_ENTRY(tx_1024b_1518_frames),
179 BNXT_TX_STATS_ENTRY(tx_good_vlan_frames),
180 BNXT_TX_STATS_ENTRY(tx_1519b_2047_frames),
181 BNXT_TX_STATS_ENTRY(tx_2048b_4095b_frames),
182 BNXT_TX_STATS_ENTRY(tx_4096b_9216b_frames),
183 BNXT_TX_STATS_ENTRY(tx_9217b_16383b_frames),
184 BNXT_TX_STATS_ENTRY(tx_good_frames),
185 BNXT_TX_STATS_ENTRY(tx_total_frames),
186 BNXT_TX_STATS_ENTRY(tx_ucast_frames),
187 BNXT_TX_STATS_ENTRY(tx_mcast_frames),
188 BNXT_TX_STATS_ENTRY(tx_bcast_frames),
189 BNXT_TX_STATS_ENTRY(tx_pause_frames),
190 BNXT_TX_STATS_ENTRY(tx_pfc_frames),
191 BNXT_TX_STATS_ENTRY(tx_jabber_frames),
192 BNXT_TX_STATS_ENTRY(tx_fcs_err_frames),
193 BNXT_TX_STATS_ENTRY(tx_err),
194 BNXT_TX_STATS_ENTRY(tx_fifo_underruns),
195 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri0),
196 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri1),
197 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri2),
198 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri3),
199 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri4),
200 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri5),
201 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri6),
202 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri7),
203 BNXT_TX_STATS_ENTRY(tx_eee_lpi_events),
204 BNXT_TX_STATS_ENTRY(tx_eee_lpi_duration),
205 BNXT_TX_STATS_ENTRY(tx_total_collisions),
206 BNXT_TX_STATS_ENTRY(tx_bytes),
207 };
208
209 #define BNXT_NUM_PORT_STATS ARRAY_SIZE(bnxt_port_stats_arr)
210
211 static int bnxt_get_num_stats(struct bnxt *bp)
212 {
213 int num_stats = BNXT_NUM_STATS * bp->cp_nr_rings;
214
215 if (bp->flags & BNXT_FLAG_PORT_STATS)
216 num_stats += BNXT_NUM_PORT_STATS;
217
218 return num_stats;
219 }
220
221 static int bnxt_get_sset_count(struct net_device *dev, int sset)
222 {
223 struct bnxt *bp = netdev_priv(dev);
224
225 switch (sset) {
226 case ETH_SS_STATS:
227 return bnxt_get_num_stats(bp);
228 case ETH_SS_TEST:
229 if (!bp->num_tests)
230 return -EOPNOTSUPP;
231 return bp->num_tests;
232 default:
233 return -EOPNOTSUPP;
234 }
235 }
236
237 static void bnxt_get_ethtool_stats(struct net_device *dev,
238 struct ethtool_stats *stats, u64 *buf)
239 {
240 u32 i, j = 0;
241 struct bnxt *bp = netdev_priv(dev);
242 u32 stat_fields = sizeof(struct ctx_hw_stats) / 8;
243
244 if (!bp->bnapi)
245 return;
246
247 for (i = 0; i < bp->cp_nr_rings; i++) {
248 struct bnxt_napi *bnapi = bp->bnapi[i];
249 struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring;
250 __le64 *hw_stats = (__le64 *)cpr->hw_stats;
251 int k;
252
253 for (k = 0; k < stat_fields; j++, k++)
254 buf[j] = le64_to_cpu(hw_stats[k]);
255 buf[j++] = cpr->rx_l4_csum_errors;
256 }
257 if (bp->flags & BNXT_FLAG_PORT_STATS) {
258 __le64 *port_stats = (__le64 *)bp->hw_rx_port_stats;
259
260 for (i = 0; i < BNXT_NUM_PORT_STATS; i++, j++) {
261 buf[j] = le64_to_cpu(*(port_stats +
262 bnxt_port_stats_arr[i].offset));
263 }
264 }
265 }
266
267 static void bnxt_get_strings(struct net_device *dev, u32 stringset, u8 *buf)
268 {
269 struct bnxt *bp = netdev_priv(dev);
270 u32 i;
271
272 switch (stringset) {
273 /* The number of strings must match BNXT_NUM_STATS defined above. */
274 case ETH_SS_STATS:
275 for (i = 0; i < bp->cp_nr_rings; i++) {
276 sprintf(buf, "[%d]: rx_ucast_packets", i);
277 buf += ETH_GSTRING_LEN;
278 sprintf(buf, "[%d]: rx_mcast_packets", i);
279 buf += ETH_GSTRING_LEN;
280 sprintf(buf, "[%d]: rx_bcast_packets", i);
281 buf += ETH_GSTRING_LEN;
282 sprintf(buf, "[%d]: rx_discards", i);
283 buf += ETH_GSTRING_LEN;
284 sprintf(buf, "[%d]: rx_drops", i);
285 buf += ETH_GSTRING_LEN;
286 sprintf(buf, "[%d]: rx_ucast_bytes", i);
287 buf += ETH_GSTRING_LEN;
288 sprintf(buf, "[%d]: rx_mcast_bytes", i);
289 buf += ETH_GSTRING_LEN;
290 sprintf(buf, "[%d]: rx_bcast_bytes", i);
291 buf += ETH_GSTRING_LEN;
292 sprintf(buf, "[%d]: tx_ucast_packets", i);
293 buf += ETH_GSTRING_LEN;
294 sprintf(buf, "[%d]: tx_mcast_packets", i);
295 buf += ETH_GSTRING_LEN;
296 sprintf(buf, "[%d]: tx_bcast_packets", i);
297 buf += ETH_GSTRING_LEN;
298 sprintf(buf, "[%d]: tx_discards", i);
299 buf += ETH_GSTRING_LEN;
300 sprintf(buf, "[%d]: tx_drops", i);
301 buf += ETH_GSTRING_LEN;
302 sprintf(buf, "[%d]: tx_ucast_bytes", i);
303 buf += ETH_GSTRING_LEN;
304 sprintf(buf, "[%d]: tx_mcast_bytes", i);
305 buf += ETH_GSTRING_LEN;
306 sprintf(buf, "[%d]: tx_bcast_bytes", i);
307 buf += ETH_GSTRING_LEN;
308 sprintf(buf, "[%d]: tpa_packets", i);
309 buf += ETH_GSTRING_LEN;
310 sprintf(buf, "[%d]: tpa_bytes", i);
311 buf += ETH_GSTRING_LEN;
312 sprintf(buf, "[%d]: tpa_events", i);
313 buf += ETH_GSTRING_LEN;
314 sprintf(buf, "[%d]: tpa_aborts", i);
315 buf += ETH_GSTRING_LEN;
316 sprintf(buf, "[%d]: rx_l4_csum_errors", i);
317 buf += ETH_GSTRING_LEN;
318 }
319 if (bp->flags & BNXT_FLAG_PORT_STATS) {
320 for (i = 0; i < BNXT_NUM_PORT_STATS; i++) {
321 strcpy(buf, bnxt_port_stats_arr[i].string);
322 buf += ETH_GSTRING_LEN;
323 }
324 }
325 break;
326 case ETH_SS_TEST:
327 if (bp->num_tests)
328 memcpy(buf, bp->test_info->string,
329 bp->num_tests * ETH_GSTRING_LEN);
330 break;
331 default:
332 netdev_err(bp->dev, "bnxt_get_strings invalid request %x\n",
333 stringset);
334 break;
335 }
336 }
337
338 static void bnxt_get_ringparam(struct net_device *dev,
339 struct ethtool_ringparam *ering)
340 {
341 struct bnxt *bp = netdev_priv(dev);
342
343 ering->rx_max_pending = BNXT_MAX_RX_DESC_CNT;
344 ering->rx_jumbo_max_pending = BNXT_MAX_RX_JUM_DESC_CNT;
345 ering->tx_max_pending = BNXT_MAX_TX_DESC_CNT;
346
347 ering->rx_pending = bp->rx_ring_size;
348 ering->rx_jumbo_pending = bp->rx_agg_ring_size;
349 ering->tx_pending = bp->tx_ring_size;
350 }
351
352 static int bnxt_set_ringparam(struct net_device *dev,
353 struct ethtool_ringparam *ering)
354 {
355 struct bnxt *bp = netdev_priv(dev);
356
357 if ((ering->rx_pending > BNXT_MAX_RX_DESC_CNT) ||
358 (ering->tx_pending > BNXT_MAX_TX_DESC_CNT) ||
359 (ering->tx_pending <= MAX_SKB_FRAGS))
360 return -EINVAL;
361
362 if (netif_running(dev))
363 bnxt_close_nic(bp, false, false);
364
365 bp->rx_ring_size = ering->rx_pending;
366 bp->tx_ring_size = ering->tx_pending;
367 bnxt_set_ring_params(bp);
368
369 if (netif_running(dev))
370 return bnxt_open_nic(bp, false, false);
371
372 return 0;
373 }
374
375 static void bnxt_get_channels(struct net_device *dev,
376 struct ethtool_channels *channel)
377 {
378 struct bnxt *bp = netdev_priv(dev);
379 int max_rx_rings, max_tx_rings, tcs;
380
381 bnxt_get_max_rings(bp, &max_rx_rings, &max_tx_rings, true);
382 channel->max_combined = min_t(int, max_rx_rings, max_tx_rings);
383
384 if (bnxt_get_max_rings(bp, &max_rx_rings, &max_tx_rings, false)) {
385 max_rx_rings = 0;
386 max_tx_rings = 0;
387 }
388
389 tcs = netdev_get_num_tc(dev);
390 if (tcs > 1)
391 max_tx_rings /= tcs;
392
393 channel->max_rx = max_rx_rings;
394 channel->max_tx = max_tx_rings;
395 channel->max_other = 0;
396 if (bp->flags & BNXT_FLAG_SHARED_RINGS) {
397 channel->combined_count = bp->rx_nr_rings;
398 if (BNXT_CHIP_TYPE_NITRO_A0(bp))
399 channel->combined_count--;
400 } else {
401 if (!BNXT_CHIP_TYPE_NITRO_A0(bp)) {
402 channel->rx_count = bp->rx_nr_rings;
403 channel->tx_count = bp->tx_nr_rings_per_tc;
404 }
405 }
406 }
407
408 static int bnxt_set_channels(struct net_device *dev,
409 struct ethtool_channels *channel)
410 {
411 struct bnxt *bp = netdev_priv(dev);
412 int req_tx_rings, req_rx_rings, tcs;
413 bool sh = false;
414 int tx_xdp = 0;
415 int rc = 0;
416
417 if (channel->other_count)
418 return -EINVAL;
419
420 if (!channel->combined_count &&
421 (!channel->rx_count || !channel->tx_count))
422 return -EINVAL;
423
424 if (channel->combined_count &&
425 (channel->rx_count || channel->tx_count))
426 return -EINVAL;
427
428 if (BNXT_CHIP_TYPE_NITRO_A0(bp) && (channel->rx_count ||
429 channel->tx_count))
430 return -EINVAL;
431
432 if (channel->combined_count)
433 sh = true;
434
435 tcs = netdev_get_num_tc(dev);
436
437 req_tx_rings = sh ? channel->combined_count : channel->tx_count;
438 req_rx_rings = sh ? channel->combined_count : channel->rx_count;
439 if (bp->tx_nr_rings_xdp) {
440 if (!sh) {
441 netdev_err(dev, "Only combined mode supported when XDP is enabled.\n");
442 return -EINVAL;
443 }
444 tx_xdp = req_rx_rings;
445 }
446 rc = bnxt_check_rings(bp, req_tx_rings, req_rx_rings, sh, tcs, tx_xdp);
447 if (rc) {
448 netdev_warn(dev, "Unable to allocate the requested rings\n");
449 return rc;
450 }
451
452 if (netif_running(dev)) {
453 if (BNXT_PF(bp)) {
454 /* TODO CHIMP_FW: Send message to all VF's
455 * before PF unload
456 */
457 }
458 rc = bnxt_close_nic(bp, true, false);
459 if (rc) {
460 netdev_err(bp->dev, "Set channel failure rc :%x\n",
461 rc);
462 return rc;
463 }
464 }
465
466 if (sh) {
467 bp->flags |= BNXT_FLAG_SHARED_RINGS;
468 bp->rx_nr_rings = channel->combined_count;
469 bp->tx_nr_rings_per_tc = channel->combined_count;
470 } else {
471 bp->flags &= ~BNXT_FLAG_SHARED_RINGS;
472 bp->rx_nr_rings = channel->rx_count;
473 bp->tx_nr_rings_per_tc = channel->tx_count;
474 }
475 bp->tx_nr_rings_xdp = tx_xdp;
476 bp->tx_nr_rings = bp->tx_nr_rings_per_tc + tx_xdp;
477 if (tcs > 1)
478 bp->tx_nr_rings = bp->tx_nr_rings_per_tc * tcs + tx_xdp;
479
480 bp->cp_nr_rings = sh ? max_t(int, bp->tx_nr_rings, bp->rx_nr_rings) :
481 bp->tx_nr_rings + bp->rx_nr_rings;
482
483 bp->num_stat_ctxs = bp->cp_nr_rings;
484
485 /* After changing number of rx channels, update NTUPLE feature. */
486 netdev_update_features(dev);
487 if (netif_running(dev)) {
488 rc = bnxt_open_nic(bp, true, false);
489 if ((!rc) && BNXT_PF(bp)) {
490 /* TODO CHIMP_FW: Send message to all VF's
491 * to renable
492 */
493 }
494 }
495
496 return rc;
497 }
498
499 #ifdef CONFIG_RFS_ACCEL
500 static int bnxt_grxclsrlall(struct bnxt *bp, struct ethtool_rxnfc *cmd,
501 u32 *rule_locs)
502 {
503 int i, j = 0;
504
505 cmd->data = bp->ntp_fltr_count;
506 for (i = 0; i < BNXT_NTP_FLTR_HASH_SIZE; i++) {
507 struct hlist_head *head;
508 struct bnxt_ntuple_filter *fltr;
509
510 head = &bp->ntp_fltr_hash_tbl[i];
511 rcu_read_lock();
512 hlist_for_each_entry_rcu(fltr, head, hash) {
513 if (j == cmd->rule_cnt)
514 break;
515 rule_locs[j++] = fltr->sw_id;
516 }
517 rcu_read_unlock();
518 if (j == cmd->rule_cnt)
519 break;
520 }
521 cmd->rule_cnt = j;
522 return 0;
523 }
524
525 static int bnxt_grxclsrule(struct bnxt *bp, struct ethtool_rxnfc *cmd)
526 {
527 struct ethtool_rx_flow_spec *fs =
528 (struct ethtool_rx_flow_spec *)&cmd->fs;
529 struct bnxt_ntuple_filter *fltr;
530 struct flow_keys *fkeys;
531 int i, rc = -EINVAL;
532
533 if (fs->location >= BNXT_NTP_FLTR_MAX_FLTR)
534 return rc;
535
536 for (i = 0; i < BNXT_NTP_FLTR_HASH_SIZE; i++) {
537 struct hlist_head *head;
538
539 head = &bp->ntp_fltr_hash_tbl[i];
540 rcu_read_lock();
541 hlist_for_each_entry_rcu(fltr, head, hash) {
542 if (fltr->sw_id == fs->location)
543 goto fltr_found;
544 }
545 rcu_read_unlock();
546 }
547 return rc;
548
549 fltr_found:
550 fkeys = &fltr->fkeys;
551 if (fkeys->basic.n_proto == htons(ETH_P_IP)) {
552 if (fkeys->basic.ip_proto == IPPROTO_TCP)
553 fs->flow_type = TCP_V4_FLOW;
554 else if (fkeys->basic.ip_proto == IPPROTO_UDP)
555 fs->flow_type = UDP_V4_FLOW;
556 else
557 goto fltr_err;
558
559 fs->h_u.tcp_ip4_spec.ip4src = fkeys->addrs.v4addrs.src;
560 fs->m_u.tcp_ip4_spec.ip4src = cpu_to_be32(~0);
561
562 fs->h_u.tcp_ip4_spec.ip4dst = fkeys->addrs.v4addrs.dst;
563 fs->m_u.tcp_ip4_spec.ip4dst = cpu_to_be32(~0);
564
565 fs->h_u.tcp_ip4_spec.psrc = fkeys->ports.src;
566 fs->m_u.tcp_ip4_spec.psrc = cpu_to_be16(~0);
567
568 fs->h_u.tcp_ip4_spec.pdst = fkeys->ports.dst;
569 fs->m_u.tcp_ip4_spec.pdst = cpu_to_be16(~0);
570 } else {
571 int i;
572
573 if (fkeys->basic.ip_proto == IPPROTO_TCP)
574 fs->flow_type = TCP_V6_FLOW;
575 else if (fkeys->basic.ip_proto == IPPROTO_UDP)
576 fs->flow_type = UDP_V6_FLOW;
577 else
578 goto fltr_err;
579
580 *(struct in6_addr *)&fs->h_u.tcp_ip6_spec.ip6src[0] =
581 fkeys->addrs.v6addrs.src;
582 *(struct in6_addr *)&fs->h_u.tcp_ip6_spec.ip6dst[0] =
583 fkeys->addrs.v6addrs.dst;
584 for (i = 0; i < 4; i++) {
585 fs->m_u.tcp_ip6_spec.ip6src[i] = cpu_to_be32(~0);
586 fs->m_u.tcp_ip6_spec.ip6dst[i] = cpu_to_be32(~0);
587 }
588 fs->h_u.tcp_ip6_spec.psrc = fkeys->ports.src;
589 fs->m_u.tcp_ip6_spec.psrc = cpu_to_be16(~0);
590
591 fs->h_u.tcp_ip6_spec.pdst = fkeys->ports.dst;
592 fs->m_u.tcp_ip6_spec.pdst = cpu_to_be16(~0);
593 }
594
595 fs->ring_cookie = fltr->rxq;
596 rc = 0;
597
598 fltr_err:
599 rcu_read_unlock();
600
601 return rc;
602 }
603 #endif
604
605 static u64 get_ethtool_ipv4_rss(struct bnxt *bp)
606 {
607 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4)
608 return RXH_IP_SRC | RXH_IP_DST;
609 return 0;
610 }
611
612 static u64 get_ethtool_ipv6_rss(struct bnxt *bp)
613 {
614 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6)
615 return RXH_IP_SRC | RXH_IP_DST;
616 return 0;
617 }
618
619 static int bnxt_grxfh(struct bnxt *bp, struct ethtool_rxnfc *cmd)
620 {
621 cmd->data = 0;
622 switch (cmd->flow_type) {
623 case TCP_V4_FLOW:
624 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4)
625 cmd->data |= RXH_IP_SRC | RXH_IP_DST |
626 RXH_L4_B_0_1 | RXH_L4_B_2_3;
627 cmd->data |= get_ethtool_ipv4_rss(bp);
628 break;
629 case UDP_V4_FLOW:
630 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4)
631 cmd->data |= RXH_IP_SRC | RXH_IP_DST |
632 RXH_L4_B_0_1 | RXH_L4_B_2_3;
633 /* fall through */
634 case SCTP_V4_FLOW:
635 case AH_ESP_V4_FLOW:
636 case AH_V4_FLOW:
637 case ESP_V4_FLOW:
638 case IPV4_FLOW:
639 cmd->data |= get_ethtool_ipv4_rss(bp);
640 break;
641
642 case TCP_V6_FLOW:
643 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6)
644 cmd->data |= RXH_IP_SRC | RXH_IP_DST |
645 RXH_L4_B_0_1 | RXH_L4_B_2_3;
646 cmd->data |= get_ethtool_ipv6_rss(bp);
647 break;
648 case UDP_V6_FLOW:
649 if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6)
650 cmd->data |= RXH_IP_SRC | RXH_IP_DST |
651 RXH_L4_B_0_1 | RXH_L4_B_2_3;
652 /* fall through */
653 case SCTP_V6_FLOW:
654 case AH_ESP_V6_FLOW:
655 case AH_V6_FLOW:
656 case ESP_V6_FLOW:
657 case IPV6_FLOW:
658 cmd->data |= get_ethtool_ipv6_rss(bp);
659 break;
660 }
661 return 0;
662 }
663
664 #define RXH_4TUPLE (RXH_IP_SRC | RXH_IP_DST | RXH_L4_B_0_1 | RXH_L4_B_2_3)
665 #define RXH_2TUPLE (RXH_IP_SRC | RXH_IP_DST)
666
667 static int bnxt_srxfh(struct bnxt *bp, struct ethtool_rxnfc *cmd)
668 {
669 u32 rss_hash_cfg = bp->rss_hash_cfg;
670 int tuple, rc = 0;
671
672 if (cmd->data == RXH_4TUPLE)
673 tuple = 4;
674 else if (cmd->data == RXH_2TUPLE)
675 tuple = 2;
676 else if (!cmd->data)
677 tuple = 0;
678 else
679 return -EINVAL;
680
681 if (cmd->flow_type == TCP_V4_FLOW) {
682 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4;
683 if (tuple == 4)
684 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4;
685 } else if (cmd->flow_type == UDP_V4_FLOW) {
686 if (tuple == 4 && !(bp->flags & BNXT_FLAG_UDP_RSS_CAP))
687 return -EINVAL;
688 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4;
689 if (tuple == 4)
690 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4;
691 } else if (cmd->flow_type == TCP_V6_FLOW) {
692 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6;
693 if (tuple == 4)
694 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6;
695 } else if (cmd->flow_type == UDP_V6_FLOW) {
696 if (tuple == 4 && !(bp->flags & BNXT_FLAG_UDP_RSS_CAP))
697 return -EINVAL;
698 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6;
699 if (tuple == 4)
700 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6;
701 } else if (tuple == 4) {
702 return -EINVAL;
703 }
704
705 switch (cmd->flow_type) {
706 case TCP_V4_FLOW:
707 case UDP_V4_FLOW:
708 case SCTP_V4_FLOW:
709 case AH_ESP_V4_FLOW:
710 case AH_V4_FLOW:
711 case ESP_V4_FLOW:
712 case IPV4_FLOW:
713 if (tuple == 2)
714 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4;
715 else if (!tuple)
716 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4;
717 break;
718
719 case TCP_V6_FLOW:
720 case UDP_V6_FLOW:
721 case SCTP_V6_FLOW:
722 case AH_ESP_V6_FLOW:
723 case AH_V6_FLOW:
724 case ESP_V6_FLOW:
725 case IPV6_FLOW:
726 if (tuple == 2)
727 rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6;
728 else if (!tuple)
729 rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6;
730 break;
731 }
732
733 if (bp->rss_hash_cfg == rss_hash_cfg)
734 return 0;
735
736 bp->rss_hash_cfg = rss_hash_cfg;
737 if (netif_running(bp->dev)) {
738 bnxt_close_nic(bp, false, false);
739 rc = bnxt_open_nic(bp, false, false);
740 }
741 return rc;
742 }
743
744 static int bnxt_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,
745 u32 *rule_locs)
746 {
747 struct bnxt *bp = netdev_priv(dev);
748 int rc = 0;
749
750 switch (cmd->cmd) {
751 #ifdef CONFIG_RFS_ACCEL
752 case ETHTOOL_GRXRINGS:
753 cmd->data = bp->rx_nr_rings;
754 break;
755
756 case ETHTOOL_GRXCLSRLCNT:
757 cmd->rule_cnt = bp->ntp_fltr_count;
758 cmd->data = BNXT_NTP_FLTR_MAX_FLTR;
759 break;
760
761 case ETHTOOL_GRXCLSRLALL:
762 rc = bnxt_grxclsrlall(bp, cmd, (u32 *)rule_locs);
763 break;
764
765 case ETHTOOL_GRXCLSRULE:
766 rc = bnxt_grxclsrule(bp, cmd);
767 break;
768 #endif
769
770 case ETHTOOL_GRXFH:
771 rc = bnxt_grxfh(bp, cmd);
772 break;
773
774 default:
775 rc = -EOPNOTSUPP;
776 break;
777 }
778
779 return rc;
780 }
781
782 static int bnxt_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)
783 {
784 struct bnxt *bp = netdev_priv(dev);
785 int rc;
786
787 switch (cmd->cmd) {
788 case ETHTOOL_SRXFH:
789 rc = bnxt_srxfh(bp, cmd);
790 break;
791
792 default:
793 rc = -EOPNOTSUPP;
794 break;
795 }
796 return rc;
797 }
798
799 static u32 bnxt_get_rxfh_indir_size(struct net_device *dev)
800 {
801 return HW_HASH_INDEX_SIZE;
802 }
803
804 static u32 bnxt_get_rxfh_key_size(struct net_device *dev)
805 {
806 return HW_HASH_KEY_SIZE;
807 }
808
809 static int bnxt_get_rxfh(struct net_device *dev, u32 *indir, u8 *key,
810 u8 *hfunc)
811 {
812 struct bnxt *bp = netdev_priv(dev);
813 struct bnxt_vnic_info *vnic = &bp->vnic_info[0];
814 int i = 0;
815
816 if (hfunc)
817 *hfunc = ETH_RSS_HASH_TOP;
818
819 if (indir)
820 for (i = 0; i < HW_HASH_INDEX_SIZE; i++)
821 indir[i] = le16_to_cpu(vnic->rss_table[i]);
822
823 if (key)
824 memcpy(key, vnic->rss_hash_key, HW_HASH_KEY_SIZE);
825
826 return 0;
827 }
828
829 static void bnxt_get_drvinfo(struct net_device *dev,
830 struct ethtool_drvinfo *info)
831 {
832 struct bnxt *bp = netdev_priv(dev);
833
834 strlcpy(info->driver, DRV_MODULE_NAME, sizeof(info->driver));
835 strlcpy(info->version, DRV_MODULE_VERSION, sizeof(info->version));
836 strlcpy(info->fw_version, bp->fw_ver_str, sizeof(info->fw_version));
837 strlcpy(info->bus_info, pci_name(bp->pdev), sizeof(info->bus_info));
838 info->n_stats = bnxt_get_num_stats(bp);
839 info->testinfo_len = bp->num_tests;
840 /* TODO CHIMP_FW: eeprom dump details */
841 info->eedump_len = 0;
842 /* TODO CHIMP FW: reg dump details */
843 info->regdump_len = 0;
844 }
845
846 static void bnxt_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
847 {
848 struct bnxt *bp = netdev_priv(dev);
849
850 wol->supported = 0;
851 wol->wolopts = 0;
852 memset(&wol->sopass, 0, sizeof(wol->sopass));
853 if (bp->flags & BNXT_FLAG_WOL_CAP) {
854 wol->supported = WAKE_MAGIC;
855 if (bp->wol)
856 wol->wolopts = WAKE_MAGIC;
857 }
858 }
859
860 static int bnxt_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
861 {
862 struct bnxt *bp = netdev_priv(dev);
863
864 if (wol->wolopts & ~WAKE_MAGIC)
865 return -EINVAL;
866
867 if (wol->wolopts & WAKE_MAGIC) {
868 if (!(bp->flags & BNXT_FLAG_WOL_CAP))
869 return -EINVAL;
870 if (!bp->wol) {
871 if (bnxt_hwrm_alloc_wol_fltr(bp))
872 return -EBUSY;
873 bp->wol = 1;
874 }
875 } else {
876 if (bp->wol) {
877 if (bnxt_hwrm_free_wol_fltr(bp))
878 return -EBUSY;
879 bp->wol = 0;
880 }
881 }
882 return 0;
883 }
884
885 u32 _bnxt_fw_to_ethtool_adv_spds(u16 fw_speeds, u8 fw_pause)
886 {
887 u32 speed_mask = 0;
888
889 /* TODO: support 25GB, 40GB, 50GB with different cable type */
890 /* set the advertised speeds */
891 if (fw_speeds & BNXT_LINK_SPEED_MSK_100MB)
892 speed_mask |= ADVERTISED_100baseT_Full;
893 if (fw_speeds & BNXT_LINK_SPEED_MSK_1GB)
894 speed_mask |= ADVERTISED_1000baseT_Full;
895 if (fw_speeds & BNXT_LINK_SPEED_MSK_2_5GB)
896 speed_mask |= ADVERTISED_2500baseX_Full;
897 if (fw_speeds & BNXT_LINK_SPEED_MSK_10GB)
898 speed_mask |= ADVERTISED_10000baseT_Full;
899 if (fw_speeds & BNXT_LINK_SPEED_MSK_40GB)
900 speed_mask |= ADVERTISED_40000baseCR4_Full;
901
902 if ((fw_pause & BNXT_LINK_PAUSE_BOTH) == BNXT_LINK_PAUSE_BOTH)
903 speed_mask |= ADVERTISED_Pause;
904 else if (fw_pause & BNXT_LINK_PAUSE_TX)
905 speed_mask |= ADVERTISED_Asym_Pause;
906 else if (fw_pause & BNXT_LINK_PAUSE_RX)
907 speed_mask |= ADVERTISED_Pause | ADVERTISED_Asym_Pause;
908
909 return speed_mask;
910 }
911
912 #define BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings, name)\
913 { \
914 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_100MB) \
915 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
916 100baseT_Full); \
917 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_1GB) \
918 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
919 1000baseT_Full); \
920 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_10GB) \
921 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
922 10000baseT_Full); \
923 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_25GB) \
924 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
925 25000baseCR_Full); \
926 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_40GB) \
927 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
928 40000baseCR4_Full);\
929 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_50GB) \
930 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
931 50000baseCR2_Full);\
932 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_100GB) \
933 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
934 100000baseCR4_Full);\
935 if ((fw_pause) & BNXT_LINK_PAUSE_RX) { \
936 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
937 Pause); \
938 if (!((fw_pause) & BNXT_LINK_PAUSE_TX)) \
939 ethtool_link_ksettings_add_link_mode( \
940 lk_ksettings, name, Asym_Pause);\
941 } else if ((fw_pause) & BNXT_LINK_PAUSE_TX) { \
942 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
943 Asym_Pause); \
944 } \
945 }
946
947 #define BNXT_ETHTOOL_TO_FW_SPDS(fw_speeds, lk_ksettings, name) \
948 { \
949 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
950 100baseT_Full) || \
951 ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
952 100baseT_Half)) \
953 (fw_speeds) |= BNXT_LINK_SPEED_MSK_100MB; \
954 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
955 1000baseT_Full) || \
956 ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
957 1000baseT_Half)) \
958 (fw_speeds) |= BNXT_LINK_SPEED_MSK_1GB; \
959 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
960 10000baseT_Full)) \
961 (fw_speeds) |= BNXT_LINK_SPEED_MSK_10GB; \
962 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
963 25000baseCR_Full)) \
964 (fw_speeds) |= BNXT_LINK_SPEED_MSK_25GB; \
965 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
966 40000baseCR4_Full)) \
967 (fw_speeds) |= BNXT_LINK_SPEED_MSK_40GB; \
968 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
969 50000baseCR2_Full)) \
970 (fw_speeds) |= BNXT_LINK_SPEED_MSK_50GB; \
971 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
972 100000baseCR4_Full)) \
973 (fw_speeds) |= BNXT_LINK_SPEED_MSK_100GB; \
974 }
975
976 static void bnxt_fw_to_ethtool_advertised_spds(struct bnxt_link_info *link_info,
977 struct ethtool_link_ksettings *lk_ksettings)
978 {
979 u16 fw_speeds = link_info->advertising;
980 u8 fw_pause = 0;
981
982 if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL)
983 fw_pause = link_info->auto_pause_setting;
984
985 BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings, advertising);
986 }
987
988 static void bnxt_fw_to_ethtool_lp_adv(struct bnxt_link_info *link_info,
989 struct ethtool_link_ksettings *lk_ksettings)
990 {
991 u16 fw_speeds = link_info->lp_auto_link_speeds;
992 u8 fw_pause = 0;
993
994 if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL)
995 fw_pause = link_info->lp_pause;
996
997 BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings,
998 lp_advertising);
999 }
1000
1001 static void bnxt_fw_to_ethtool_support_spds(struct bnxt_link_info *link_info,
1002 struct ethtool_link_ksettings *lk_ksettings)
1003 {
1004 u16 fw_speeds = link_info->support_speeds;
1005
1006 BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, 0, lk_ksettings, supported);
1007
1008 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported, Pause);
1009 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported,
1010 Asym_Pause);
1011
1012 if (link_info->support_auto_speeds)
1013 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported,
1014 Autoneg);
1015 }
1016
1017 u32 bnxt_fw_to_ethtool_speed(u16 fw_link_speed)
1018 {
1019 switch (fw_link_speed) {
1020 case BNXT_LINK_SPEED_100MB:
1021 return SPEED_100;
1022 case BNXT_LINK_SPEED_1GB:
1023 return SPEED_1000;
1024 case BNXT_LINK_SPEED_2_5GB:
1025 return SPEED_2500;
1026 case BNXT_LINK_SPEED_10GB:
1027 return SPEED_10000;
1028 case BNXT_LINK_SPEED_20GB:
1029 return SPEED_20000;
1030 case BNXT_LINK_SPEED_25GB:
1031 return SPEED_25000;
1032 case BNXT_LINK_SPEED_40GB:
1033 return SPEED_40000;
1034 case BNXT_LINK_SPEED_50GB:
1035 return SPEED_50000;
1036 case BNXT_LINK_SPEED_100GB:
1037 return SPEED_100000;
1038 default:
1039 return SPEED_UNKNOWN;
1040 }
1041 }
1042
1043 static int bnxt_get_link_ksettings(struct net_device *dev,
1044 struct ethtool_link_ksettings *lk_ksettings)
1045 {
1046 struct bnxt *bp = netdev_priv(dev);
1047 struct bnxt_link_info *link_info = &bp->link_info;
1048 struct ethtool_link_settings *base = &lk_ksettings->base;
1049 u32 ethtool_speed;
1050
1051 ethtool_link_ksettings_zero_link_mode(lk_ksettings, supported);
1052 mutex_lock(&bp->link_lock);
1053 bnxt_fw_to_ethtool_support_spds(link_info, lk_ksettings);
1054
1055 ethtool_link_ksettings_zero_link_mode(lk_ksettings, advertising);
1056 if (link_info->autoneg) {
1057 bnxt_fw_to_ethtool_advertised_spds(link_info, lk_ksettings);
1058 ethtool_link_ksettings_add_link_mode(lk_ksettings,
1059 advertising, Autoneg);
1060 base->autoneg = AUTONEG_ENABLE;
1061 if (link_info->phy_link_status == BNXT_LINK_LINK)
1062 bnxt_fw_to_ethtool_lp_adv(link_info, lk_ksettings);
1063 ethtool_speed = bnxt_fw_to_ethtool_speed(link_info->link_speed);
1064 if (!netif_carrier_ok(dev))
1065 base->duplex = DUPLEX_UNKNOWN;
1066 else if (link_info->duplex & BNXT_LINK_DUPLEX_FULL)
1067 base->duplex = DUPLEX_FULL;
1068 else
1069 base->duplex = DUPLEX_HALF;
1070 } else {
1071 base->autoneg = AUTONEG_DISABLE;
1072 ethtool_speed =
1073 bnxt_fw_to_ethtool_speed(link_info->req_link_speed);
1074 base->duplex = DUPLEX_HALF;
1075 if (link_info->req_duplex == BNXT_LINK_DUPLEX_FULL)
1076 base->duplex = DUPLEX_FULL;
1077 }
1078 base->speed = ethtool_speed;
1079
1080 base->port = PORT_NONE;
1081 if (link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_TP) {
1082 base->port = PORT_TP;
1083 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported,
1084 TP);
1085 ethtool_link_ksettings_add_link_mode(lk_ksettings, advertising,
1086 TP);
1087 } else {
1088 ethtool_link_ksettings_add_link_mode(lk_ksettings, supported,
1089 FIBRE);
1090 ethtool_link_ksettings_add_link_mode(lk_ksettings, advertising,
1091 FIBRE);
1092
1093 if (link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_DAC)
1094 base->port = PORT_DA;
1095 else if (link_info->media_type ==
1096 PORT_PHY_QCFG_RESP_MEDIA_TYPE_FIBRE)
1097 base->port = PORT_FIBRE;
1098 }
1099 base->phy_address = link_info->phy_addr;
1100 mutex_unlock(&bp->link_lock);
1101
1102 return 0;
1103 }
1104
1105 static u32 bnxt_get_fw_speed(struct net_device *dev, u32 ethtool_speed)
1106 {
1107 struct bnxt *bp = netdev_priv(dev);
1108 struct bnxt_link_info *link_info = &bp->link_info;
1109 u16 support_spds = link_info->support_speeds;
1110 u32 fw_speed = 0;
1111
1112 switch (ethtool_speed) {
1113 case SPEED_100:
1114 if (support_spds & BNXT_LINK_SPEED_MSK_100MB)
1115 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_100MB;
1116 break;
1117 case SPEED_1000:
1118 if (support_spds & BNXT_LINK_SPEED_MSK_1GB)
1119 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_1GB;
1120 break;
1121 case SPEED_2500:
1122 if (support_spds & BNXT_LINK_SPEED_MSK_2_5GB)
1123 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_2_5GB;
1124 break;
1125 case SPEED_10000:
1126 if (support_spds & BNXT_LINK_SPEED_MSK_10GB)
1127 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_10GB;
1128 break;
1129 case SPEED_20000:
1130 if (support_spds & BNXT_LINK_SPEED_MSK_20GB)
1131 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_20GB;
1132 break;
1133 case SPEED_25000:
1134 if (support_spds & BNXT_LINK_SPEED_MSK_25GB)
1135 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_25GB;
1136 break;
1137 case SPEED_40000:
1138 if (support_spds & BNXT_LINK_SPEED_MSK_40GB)
1139 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_40GB;
1140 break;
1141 case SPEED_50000:
1142 if (support_spds & BNXT_LINK_SPEED_MSK_50GB)
1143 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_50GB;
1144 break;
1145 case SPEED_100000:
1146 if (support_spds & BNXT_LINK_SPEED_MSK_100GB)
1147 fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_100GB;
1148 break;
1149 default:
1150 netdev_err(dev, "unsupported speed!\n");
1151 break;
1152 }
1153 return fw_speed;
1154 }
1155
1156 u16 bnxt_get_fw_auto_link_speeds(u32 advertising)
1157 {
1158 u16 fw_speed_mask = 0;
1159
1160 /* only support autoneg at speed 100, 1000, and 10000 */
1161 if (advertising & (ADVERTISED_100baseT_Full |
1162 ADVERTISED_100baseT_Half)) {
1163 fw_speed_mask |= BNXT_LINK_SPEED_MSK_100MB;
1164 }
1165 if (advertising & (ADVERTISED_1000baseT_Full |
1166 ADVERTISED_1000baseT_Half)) {
1167 fw_speed_mask |= BNXT_LINK_SPEED_MSK_1GB;
1168 }
1169 if (advertising & ADVERTISED_10000baseT_Full)
1170 fw_speed_mask |= BNXT_LINK_SPEED_MSK_10GB;
1171
1172 if (advertising & ADVERTISED_40000baseCR4_Full)
1173 fw_speed_mask |= BNXT_LINK_SPEED_MSK_40GB;
1174
1175 return fw_speed_mask;
1176 }
1177
1178 static int bnxt_set_link_ksettings(struct net_device *dev,
1179 const struct ethtool_link_ksettings *lk_ksettings)
1180 {
1181 struct bnxt *bp = netdev_priv(dev);
1182 struct bnxt_link_info *link_info = &bp->link_info;
1183 const struct ethtool_link_settings *base = &lk_ksettings->base;
1184 bool set_pause = false;
1185 u16 fw_advertising = 0;
1186 u32 speed;
1187 int rc = 0;
1188
1189 if (!BNXT_SINGLE_PF(bp))
1190 return -EOPNOTSUPP;
1191
1192 mutex_lock(&bp->link_lock);
1193 if (base->autoneg == AUTONEG_ENABLE) {
1194 BNXT_ETHTOOL_TO_FW_SPDS(fw_advertising, lk_ksettings,
1195 advertising);
1196 link_info->autoneg |= BNXT_AUTONEG_SPEED;
1197 if (!fw_advertising)
1198 link_info->advertising = link_info->support_auto_speeds;
1199 else
1200 link_info->advertising = fw_advertising;
1201 /* any change to autoneg will cause link change, therefore the
1202 * driver should put back the original pause setting in autoneg
1203 */
1204 set_pause = true;
1205 } else {
1206 u16 fw_speed;
1207 u8 phy_type = link_info->phy_type;
1208
1209 if (phy_type == PORT_PHY_QCFG_RESP_PHY_TYPE_BASET ||
1210 phy_type == PORT_PHY_QCFG_RESP_PHY_TYPE_BASETE ||
1211 link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_TP) {
1212 netdev_err(dev, "10GBase-T devices must autoneg\n");
1213 rc = -EINVAL;
1214 goto set_setting_exit;
1215 }
1216 if (base->duplex == DUPLEX_HALF) {
1217 netdev_err(dev, "HALF DUPLEX is not supported!\n");
1218 rc = -EINVAL;
1219 goto set_setting_exit;
1220 }
1221 speed = base->speed;
1222 fw_speed = bnxt_get_fw_speed(dev, speed);
1223 if (!fw_speed) {
1224 rc = -EINVAL;
1225 goto set_setting_exit;
1226 }
1227 link_info->req_link_speed = fw_speed;
1228 link_info->req_duplex = BNXT_LINK_DUPLEX_FULL;
1229 link_info->autoneg = 0;
1230 link_info->advertising = 0;
1231 }
1232
1233 if (netif_running(dev))
1234 rc = bnxt_hwrm_set_link_setting(bp, set_pause, false);
1235
1236 set_setting_exit:
1237 mutex_unlock(&bp->link_lock);
1238 return rc;
1239 }
1240
1241 static void bnxt_get_pauseparam(struct net_device *dev,
1242 struct ethtool_pauseparam *epause)
1243 {
1244 struct bnxt *bp = netdev_priv(dev);
1245 struct bnxt_link_info *link_info = &bp->link_info;
1246
1247 if (BNXT_VF(bp))
1248 return;
1249 epause->autoneg = !!(link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL);
1250 epause->rx_pause = !!(link_info->req_flow_ctrl & BNXT_LINK_PAUSE_RX);
1251 epause->tx_pause = !!(link_info->req_flow_ctrl & BNXT_LINK_PAUSE_TX);
1252 }
1253
1254 static int bnxt_set_pauseparam(struct net_device *dev,
1255 struct ethtool_pauseparam *epause)
1256 {
1257 int rc = 0;
1258 struct bnxt *bp = netdev_priv(dev);
1259 struct bnxt_link_info *link_info = &bp->link_info;
1260
1261 if (!BNXT_SINGLE_PF(bp))
1262 return -EOPNOTSUPP;
1263
1264 if (epause->autoneg) {
1265 if (!(link_info->autoneg & BNXT_AUTONEG_SPEED))
1266 return -EINVAL;
1267
1268 link_info->autoneg |= BNXT_AUTONEG_FLOW_CTRL;
1269 if (bp->hwrm_spec_code >= 0x10201)
1270 link_info->req_flow_ctrl =
1271 PORT_PHY_CFG_REQ_AUTO_PAUSE_AUTONEG_PAUSE;
1272 } else {
1273 /* when transition from auto pause to force pause,
1274 * force a link change
1275 */
1276 if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL)
1277 link_info->force_link_chng = true;
1278 link_info->autoneg &= ~BNXT_AUTONEG_FLOW_CTRL;
1279 link_info->req_flow_ctrl = 0;
1280 }
1281 if (epause->rx_pause)
1282 link_info->req_flow_ctrl |= BNXT_LINK_PAUSE_RX;
1283
1284 if (epause->tx_pause)
1285 link_info->req_flow_ctrl |= BNXT_LINK_PAUSE_TX;
1286
1287 if (netif_running(dev))
1288 rc = bnxt_hwrm_set_pause(bp);
1289 return rc;
1290 }
1291
1292 static u32 bnxt_get_link(struct net_device *dev)
1293 {
1294 struct bnxt *bp = netdev_priv(dev);
1295
1296 /* TODO: handle MF, VF, driver close case */
1297 return bp->link_info.link_up;
1298 }
1299
1300 static int bnxt_find_nvram_item(struct net_device *dev, u16 type, u16 ordinal,
1301 u16 ext, u16 *index, u32 *item_length,
1302 u32 *data_length);
1303
1304 static int bnxt_flash_nvram(struct net_device *dev,
1305 u16 dir_type,
1306 u16 dir_ordinal,
1307 u16 dir_ext,
1308 u16 dir_attr,
1309 const u8 *data,
1310 size_t data_len)
1311 {
1312 struct bnxt *bp = netdev_priv(dev);
1313 int rc;
1314 struct hwrm_nvm_write_input req = {0};
1315 dma_addr_t dma_handle;
1316 u8 *kmem;
1317
1318 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_WRITE, -1, -1);
1319
1320 req.dir_type = cpu_to_le16(dir_type);
1321 req.dir_ordinal = cpu_to_le16(dir_ordinal);
1322 req.dir_ext = cpu_to_le16(dir_ext);
1323 req.dir_attr = cpu_to_le16(dir_attr);
1324 req.dir_data_length = cpu_to_le32(data_len);
1325
1326 kmem = dma_alloc_coherent(&bp->pdev->dev, data_len, &dma_handle,
1327 GFP_KERNEL);
1328 if (!kmem) {
1329 netdev_err(dev, "dma_alloc_coherent failure, length = %u\n",
1330 (unsigned)data_len);
1331 return -ENOMEM;
1332 }
1333 memcpy(kmem, data, data_len);
1334 req.host_src_addr = cpu_to_le64(dma_handle);
1335
1336 rc = hwrm_send_message(bp, &req, sizeof(req), FLASH_NVRAM_TIMEOUT);
1337 dma_free_coherent(&bp->pdev->dev, data_len, kmem, dma_handle);
1338
1339 if (rc == HWRM_ERR_CODE_RESOURCE_ACCESS_DENIED) {
1340 netdev_info(dev,
1341 "PF does not have admin privileges to flash the device\n");
1342 rc = -EACCES;
1343 } else if (rc) {
1344 rc = -EIO;
1345 }
1346 return rc;
1347 }
1348
1349 static int bnxt_firmware_reset(struct net_device *dev,
1350 u16 dir_type)
1351 {
1352 struct hwrm_fw_reset_input req = {0};
1353 struct bnxt *bp = netdev_priv(dev);
1354 int rc;
1355
1356 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_FW_RESET, -1, -1);
1357
1358 /* TODO: Address self-reset of APE/KONG/BONO/TANG or ungraceful reset */
1359 /* (e.g. when firmware isn't already running) */
1360 switch (dir_type) {
1361 case BNX_DIR_TYPE_CHIMP_PATCH:
1362 case BNX_DIR_TYPE_BOOTCODE:
1363 case BNX_DIR_TYPE_BOOTCODE_2:
1364 req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_BOOT;
1365 /* Self-reset ChiMP upon next PCIe reset: */
1366 req.selfrst_status = FW_RESET_REQ_SELFRST_STATUS_SELFRSTPCIERST;
1367 break;
1368 case BNX_DIR_TYPE_APE_FW:
1369 case BNX_DIR_TYPE_APE_PATCH:
1370 req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_MGMT;
1371 /* Self-reset APE upon next PCIe reset: */
1372 req.selfrst_status = FW_RESET_REQ_SELFRST_STATUS_SELFRSTPCIERST;
1373 break;
1374 case BNX_DIR_TYPE_KONG_FW:
1375 case BNX_DIR_TYPE_KONG_PATCH:
1376 req.embedded_proc_type =
1377 FW_RESET_REQ_EMBEDDED_PROC_TYPE_NETCTRL;
1378 break;
1379 case BNX_DIR_TYPE_BONO_FW:
1380 case BNX_DIR_TYPE_BONO_PATCH:
1381 req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_ROCE;
1382 break;
1383 case BNXT_FW_RESET_CHIP:
1384 req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_CHIP;
1385 req.selfrst_status = FW_RESET_REQ_SELFRST_STATUS_SELFRSTASAP;
1386 break;
1387 default:
1388 return -EINVAL;
1389 }
1390
1391 rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
1392 if (rc == HWRM_ERR_CODE_RESOURCE_ACCESS_DENIED) {
1393 netdev_info(dev,
1394 "PF does not have admin privileges to reset the device\n");
1395 rc = -EACCES;
1396 } else if (rc) {
1397 rc = -EIO;
1398 }
1399 return rc;
1400 }
1401
1402 static int bnxt_flash_firmware(struct net_device *dev,
1403 u16 dir_type,
1404 const u8 *fw_data,
1405 size_t fw_size)
1406 {
1407 int rc = 0;
1408 u16 code_type;
1409 u32 stored_crc;
1410 u32 calculated_crc;
1411 struct bnxt_fw_header *header = (struct bnxt_fw_header *)fw_data;
1412
1413 switch (dir_type) {
1414 case BNX_DIR_TYPE_BOOTCODE:
1415 case BNX_DIR_TYPE_BOOTCODE_2:
1416 code_type = CODE_BOOT;
1417 break;
1418 case BNX_DIR_TYPE_CHIMP_PATCH:
1419 code_type = CODE_CHIMP_PATCH;
1420 break;
1421 case BNX_DIR_TYPE_APE_FW:
1422 code_type = CODE_MCTP_PASSTHRU;
1423 break;
1424 case BNX_DIR_TYPE_APE_PATCH:
1425 code_type = CODE_APE_PATCH;
1426 break;
1427 case BNX_DIR_TYPE_KONG_FW:
1428 code_type = CODE_KONG_FW;
1429 break;
1430 case BNX_DIR_TYPE_KONG_PATCH:
1431 code_type = CODE_KONG_PATCH;
1432 break;
1433 case BNX_DIR_TYPE_BONO_FW:
1434 code_type = CODE_BONO_FW;
1435 break;
1436 case BNX_DIR_TYPE_BONO_PATCH:
1437 code_type = CODE_BONO_PATCH;
1438 break;
1439 default:
1440 netdev_err(dev, "Unsupported directory entry type: %u\n",
1441 dir_type);
1442 return -EINVAL;
1443 }
1444 if (fw_size < sizeof(struct bnxt_fw_header)) {
1445 netdev_err(dev, "Invalid firmware file size: %u\n",
1446 (unsigned int)fw_size);
1447 return -EINVAL;
1448 }
1449 if (header->signature != cpu_to_le32(BNXT_FIRMWARE_BIN_SIGNATURE)) {
1450 netdev_err(dev, "Invalid firmware signature: %08X\n",
1451 le32_to_cpu(header->signature));
1452 return -EINVAL;
1453 }
1454 if (header->code_type != code_type) {
1455 netdev_err(dev, "Expected firmware type: %d, read: %d\n",
1456 code_type, header->code_type);
1457 return -EINVAL;
1458 }
1459 if (header->device != DEVICE_CUMULUS_FAMILY) {
1460 netdev_err(dev, "Expected firmware device family %d, read: %d\n",
1461 DEVICE_CUMULUS_FAMILY, header->device);
1462 return -EINVAL;
1463 }
1464 /* Confirm the CRC32 checksum of the file: */
1465 stored_crc = le32_to_cpu(*(__le32 *)(fw_data + fw_size -
1466 sizeof(stored_crc)));
1467 calculated_crc = ~crc32(~0, fw_data, fw_size - sizeof(stored_crc));
1468 if (calculated_crc != stored_crc) {
1469 netdev_err(dev, "Firmware file CRC32 checksum (%08lX) does not match calculated checksum (%08lX)\n",
1470 (unsigned long)stored_crc,
1471 (unsigned long)calculated_crc);
1472 return -EINVAL;
1473 }
1474 rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST,
1475 0, 0, fw_data, fw_size);
1476 if (rc == 0) /* Firmware update successful */
1477 rc = bnxt_firmware_reset(dev, dir_type);
1478
1479 return rc;
1480 }
1481
1482 static int bnxt_flash_microcode(struct net_device *dev,
1483 u16 dir_type,
1484 const u8 *fw_data,
1485 size_t fw_size)
1486 {
1487 struct bnxt_ucode_trailer *trailer;
1488 u32 calculated_crc;
1489 u32 stored_crc;
1490 int rc = 0;
1491
1492 if (fw_size < sizeof(struct bnxt_ucode_trailer)) {
1493 netdev_err(dev, "Invalid microcode file size: %u\n",
1494 (unsigned int)fw_size);
1495 return -EINVAL;
1496 }
1497 trailer = (struct bnxt_ucode_trailer *)(fw_data + (fw_size -
1498 sizeof(*trailer)));
1499 if (trailer->sig != cpu_to_le32(BNXT_UCODE_TRAILER_SIGNATURE)) {
1500 netdev_err(dev, "Invalid microcode trailer signature: %08X\n",
1501 le32_to_cpu(trailer->sig));
1502 return -EINVAL;
1503 }
1504 if (le16_to_cpu(trailer->dir_type) != dir_type) {
1505 netdev_err(dev, "Expected microcode type: %d, read: %d\n",
1506 dir_type, le16_to_cpu(trailer->dir_type));
1507 return -EINVAL;
1508 }
1509 if (le16_to_cpu(trailer->trailer_length) <
1510 sizeof(struct bnxt_ucode_trailer)) {
1511 netdev_err(dev, "Invalid microcode trailer length: %d\n",
1512 le16_to_cpu(trailer->trailer_length));
1513 return -EINVAL;
1514 }
1515
1516 /* Confirm the CRC32 checksum of the file: */
1517 stored_crc = le32_to_cpu(*(__le32 *)(fw_data + fw_size -
1518 sizeof(stored_crc)));
1519 calculated_crc = ~crc32(~0, fw_data, fw_size - sizeof(stored_crc));
1520 if (calculated_crc != stored_crc) {
1521 netdev_err(dev,
1522 "CRC32 (%08lX) does not match calculated: %08lX\n",
1523 (unsigned long)stored_crc,
1524 (unsigned long)calculated_crc);
1525 return -EINVAL;
1526 }
1527 rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST,
1528 0, 0, fw_data, fw_size);
1529
1530 return rc;
1531 }
1532
1533 static bool bnxt_dir_type_is_ape_bin_format(u16 dir_type)
1534 {
1535 switch (dir_type) {
1536 case BNX_DIR_TYPE_CHIMP_PATCH:
1537 case BNX_DIR_TYPE_BOOTCODE:
1538 case BNX_DIR_TYPE_BOOTCODE_2:
1539 case BNX_DIR_TYPE_APE_FW:
1540 case BNX_DIR_TYPE_APE_PATCH:
1541 case BNX_DIR_TYPE_KONG_FW:
1542 case BNX_DIR_TYPE_KONG_PATCH:
1543 case BNX_DIR_TYPE_BONO_FW:
1544 case BNX_DIR_TYPE_BONO_PATCH:
1545 return true;
1546 }
1547
1548 return false;
1549 }
1550
1551 static bool bnxt_dir_type_is_other_exec_format(u16 dir_type)
1552 {
1553 switch (dir_type) {
1554 case BNX_DIR_TYPE_AVS:
1555 case BNX_DIR_TYPE_EXP_ROM_MBA:
1556 case BNX_DIR_TYPE_PCIE:
1557 case BNX_DIR_TYPE_TSCF_UCODE:
1558 case BNX_DIR_TYPE_EXT_PHY:
1559 case BNX_DIR_TYPE_CCM:
1560 case BNX_DIR_TYPE_ISCSI_BOOT:
1561 case BNX_DIR_TYPE_ISCSI_BOOT_IPV6:
1562 case BNX_DIR_TYPE_ISCSI_BOOT_IPV4N6:
1563 return true;
1564 }
1565
1566 return false;
1567 }
1568
1569 static bool bnxt_dir_type_is_executable(u16 dir_type)
1570 {
1571 return bnxt_dir_type_is_ape_bin_format(dir_type) ||
1572 bnxt_dir_type_is_other_exec_format(dir_type);
1573 }
1574
1575 static int bnxt_flash_firmware_from_file(struct net_device *dev,
1576 u16 dir_type,
1577 const char *filename)
1578 {
1579 const struct firmware *fw;
1580 int rc;
1581
1582 rc = request_firmware(&fw, filename, &dev->dev);
1583 if (rc != 0) {
1584 netdev_err(dev, "Error %d requesting firmware file: %s\n",
1585 rc, filename);
1586 return rc;
1587 }
1588 if (bnxt_dir_type_is_ape_bin_format(dir_type) == true)
1589 rc = bnxt_flash_firmware(dev, dir_type, fw->data, fw->size);
1590 else if (bnxt_dir_type_is_other_exec_format(dir_type) == true)
1591 rc = bnxt_flash_microcode(dev, dir_type, fw->data, fw->size);
1592 else
1593 rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST,
1594 0, 0, fw->data, fw->size);
1595 release_firmware(fw);
1596 return rc;
1597 }
1598
1599 static int bnxt_flash_package_from_file(struct net_device *dev,
1600 char *filename, u32 install_type)
1601 {
1602 struct bnxt *bp = netdev_priv(dev);
1603 struct hwrm_nvm_install_update_output *resp = bp->hwrm_cmd_resp_addr;
1604 struct hwrm_nvm_install_update_input install = {0};
1605 const struct firmware *fw;
1606 int rc, hwrm_err = 0;
1607 u32 item_len;
1608 u16 index;
1609
1610 bnxt_hwrm_fw_set_time(bp);
1611
1612 if (bnxt_find_nvram_item(dev, BNX_DIR_TYPE_UPDATE,
1613 BNX_DIR_ORDINAL_FIRST, BNX_DIR_EXT_NONE,
1614 &index, &item_len, NULL) != 0) {
1615 netdev_err(dev, "PKG update area not created in nvram\n");
1616 return -ENOBUFS;
1617 }
1618
1619 rc = request_firmware(&fw, filename, &dev->dev);
1620 if (rc != 0) {
1621 netdev_err(dev, "PKG error %d requesting file: %s\n",
1622 rc, filename);
1623 return rc;
1624 }
1625
1626 if (fw->size > item_len) {
1627 netdev_err(dev, "PKG insufficient update area in nvram: %lu",
1628 (unsigned long)fw->size);
1629 rc = -EFBIG;
1630 } else {
1631 dma_addr_t dma_handle;
1632 u8 *kmem;
1633 struct hwrm_nvm_modify_input modify = {0};
1634
1635 bnxt_hwrm_cmd_hdr_init(bp, &modify, HWRM_NVM_MODIFY, -1, -1);
1636
1637 modify.dir_idx = cpu_to_le16(index);
1638 modify.len = cpu_to_le32(fw->size);
1639
1640 kmem = dma_alloc_coherent(&bp->pdev->dev, fw->size,
1641 &dma_handle, GFP_KERNEL);
1642 if (!kmem) {
1643 netdev_err(dev,
1644 "dma_alloc_coherent failure, length = %u\n",
1645 (unsigned int)fw->size);
1646 rc = -ENOMEM;
1647 } else {
1648 memcpy(kmem, fw->data, fw->size);
1649 modify.host_src_addr = cpu_to_le64(dma_handle);
1650
1651 hwrm_err = hwrm_send_message(bp, &modify,
1652 sizeof(modify),
1653 FLASH_PACKAGE_TIMEOUT);
1654 dma_free_coherent(&bp->pdev->dev, fw->size, kmem,
1655 dma_handle);
1656 }
1657 }
1658 release_firmware(fw);
1659 if (rc || hwrm_err)
1660 goto err_exit;
1661
1662 if ((install_type & 0xffff) == 0)
1663 install_type >>= 16;
1664 bnxt_hwrm_cmd_hdr_init(bp, &install, HWRM_NVM_INSTALL_UPDATE, -1, -1);
1665 install.install_type = cpu_to_le32(install_type);
1666
1667 mutex_lock(&bp->hwrm_cmd_lock);
1668 hwrm_err = _hwrm_send_message(bp, &install, sizeof(install),
1669 INSTALL_PACKAGE_TIMEOUT);
1670 if (hwrm_err)
1671 goto flash_pkg_exit;
1672
1673 if (resp->error_code) {
1674 u8 error_code = ((struct hwrm_err_output *)resp)->cmd_err;
1675
1676 if (error_code == NVM_INSTALL_UPDATE_CMD_ERR_CODE_FRAG_ERR) {
1677 install.flags |= cpu_to_le16(
1678 NVM_INSTALL_UPDATE_REQ_FLAGS_ALLOWED_TO_DEFRAG);
1679 hwrm_err = _hwrm_send_message(bp, &install,
1680 sizeof(install),
1681 INSTALL_PACKAGE_TIMEOUT);
1682 if (hwrm_err)
1683 goto flash_pkg_exit;
1684 }
1685 }
1686
1687 if (resp->result) {
1688 netdev_err(dev, "PKG install error = %d, problem_item = %d\n",
1689 (s8)resp->result, (int)resp->problem_item);
1690 rc = -ENOPKG;
1691 }
1692 flash_pkg_exit:
1693 mutex_unlock(&bp->hwrm_cmd_lock);
1694 err_exit:
1695 if (hwrm_err == HWRM_ERR_CODE_RESOURCE_ACCESS_DENIED) {
1696 netdev_info(dev,
1697 "PF does not have admin privileges to flash the device\n");
1698 rc = -EACCES;
1699 } else if (hwrm_err) {
1700 rc = -EOPNOTSUPP;
1701 }
1702 return rc;
1703 }
1704
1705 static int bnxt_flash_device(struct net_device *dev,
1706 struct ethtool_flash *flash)
1707 {
1708 if (!BNXT_PF((struct bnxt *)netdev_priv(dev))) {
1709 netdev_err(dev, "flashdev not supported from a virtual function\n");
1710 return -EINVAL;
1711 }
1712
1713 if (flash->region == ETHTOOL_FLASH_ALL_REGIONS ||
1714 flash->region > 0xffff)
1715 return bnxt_flash_package_from_file(dev, flash->data,
1716 flash->region);
1717
1718 return bnxt_flash_firmware_from_file(dev, flash->region, flash->data);
1719 }
1720
1721 static int nvm_get_dir_info(struct net_device *dev, u32 *entries, u32 *length)
1722 {
1723 struct bnxt *bp = netdev_priv(dev);
1724 int rc;
1725 struct hwrm_nvm_get_dir_info_input req = {0};
1726 struct hwrm_nvm_get_dir_info_output *output = bp->hwrm_cmd_resp_addr;
1727
1728 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_GET_DIR_INFO, -1, -1);
1729
1730 mutex_lock(&bp->hwrm_cmd_lock);
1731 rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
1732 if (!rc) {
1733 *entries = le32_to_cpu(output->entries);
1734 *length = le32_to_cpu(output->entry_length);
1735 }
1736 mutex_unlock(&bp->hwrm_cmd_lock);
1737 return rc;
1738 }
1739
1740 static int bnxt_get_eeprom_len(struct net_device *dev)
1741 {
1742 /* The -1 return value allows the entire 32-bit range of offsets to be
1743 * passed via the ethtool command-line utility.
1744 */
1745 return -1;
1746 }
1747
1748 static int bnxt_get_nvram_directory(struct net_device *dev, u32 len, u8 *data)
1749 {
1750 struct bnxt *bp = netdev_priv(dev);
1751 int rc;
1752 u32 dir_entries;
1753 u32 entry_length;
1754 u8 *buf;
1755 size_t buflen;
1756 dma_addr_t dma_handle;
1757 struct hwrm_nvm_get_dir_entries_input req = {0};
1758
1759 rc = nvm_get_dir_info(dev, &dir_entries, &entry_length);
1760 if (rc != 0)
1761 return rc;
1762
1763 /* Insert 2 bytes of directory info (count and size of entries) */
1764 if (len < 2)
1765 return -EINVAL;
1766
1767 *data++ = dir_entries;
1768 *data++ = entry_length;
1769 len -= 2;
1770 memset(data, 0xff, len);
1771
1772 buflen = dir_entries * entry_length;
1773 buf = dma_alloc_coherent(&bp->pdev->dev, buflen, &dma_handle,
1774 GFP_KERNEL);
1775 if (!buf) {
1776 netdev_err(dev, "dma_alloc_coherent failure, length = %u\n",
1777 (unsigned)buflen);
1778 return -ENOMEM;
1779 }
1780 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_GET_DIR_ENTRIES, -1, -1);
1781 req.host_dest_addr = cpu_to_le64(dma_handle);
1782 rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
1783 if (rc == 0)
1784 memcpy(data, buf, len > buflen ? buflen : len);
1785 dma_free_coherent(&bp->pdev->dev, buflen, buf, dma_handle);
1786 return rc;
1787 }
1788
1789 static int bnxt_get_nvram_item(struct net_device *dev, u32 index, u32 offset,
1790 u32 length, u8 *data)
1791 {
1792 struct bnxt *bp = netdev_priv(dev);
1793 int rc;
1794 u8 *buf;
1795 dma_addr_t dma_handle;
1796 struct hwrm_nvm_read_input req = {0};
1797
1798 if (!length)
1799 return -EINVAL;
1800
1801 buf = dma_alloc_coherent(&bp->pdev->dev, length, &dma_handle,
1802 GFP_KERNEL);
1803 if (!buf) {
1804 netdev_err(dev, "dma_alloc_coherent failure, length = %u\n",
1805 (unsigned)length);
1806 return -ENOMEM;
1807 }
1808 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_READ, -1, -1);
1809 req.host_dest_addr = cpu_to_le64(dma_handle);
1810 req.dir_idx = cpu_to_le16(index);
1811 req.offset = cpu_to_le32(offset);
1812 req.len = cpu_to_le32(length);
1813
1814 rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
1815 if (rc == 0)
1816 memcpy(data, buf, length);
1817 dma_free_coherent(&bp->pdev->dev, length, buf, dma_handle);
1818 return rc;
1819 }
1820
1821 static int bnxt_find_nvram_item(struct net_device *dev, u16 type, u16 ordinal,
1822 u16 ext, u16 *index, u32 *item_length,
1823 u32 *data_length)
1824 {
1825 struct bnxt *bp = netdev_priv(dev);
1826 int rc;
1827 struct hwrm_nvm_find_dir_entry_input req = {0};
1828 struct hwrm_nvm_find_dir_entry_output *output = bp->hwrm_cmd_resp_addr;
1829
1830 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_FIND_DIR_ENTRY, -1, -1);
1831 req.enables = 0;
1832 req.dir_idx = 0;
1833 req.dir_type = cpu_to_le16(type);
1834 req.dir_ordinal = cpu_to_le16(ordinal);
1835 req.dir_ext = cpu_to_le16(ext);
1836 req.opt_ordinal = NVM_FIND_DIR_ENTRY_REQ_OPT_ORDINAL_EQ;
1837 mutex_lock(&bp->hwrm_cmd_lock);
1838 rc = _hwrm_send_message_silent(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
1839 if (rc == 0) {
1840 if (index)
1841 *index = le16_to_cpu(output->dir_idx);
1842 if (item_length)
1843 *item_length = le32_to_cpu(output->dir_item_length);
1844 if (data_length)
1845 *data_length = le32_to_cpu(output->dir_data_length);
1846 }
1847 mutex_unlock(&bp->hwrm_cmd_lock);
1848 return rc;
1849 }
1850
1851 static char *bnxt_parse_pkglog(int desired_field, u8 *data, size_t datalen)
1852 {
1853 char *retval = NULL;
1854 char *p;
1855 char *value;
1856 int field = 0;
1857
1858 if (datalen < 1)
1859 return NULL;
1860 /* null-terminate the log data (removing last '\n'): */
1861 data[datalen - 1] = 0;
1862 for (p = data; *p != 0; p++) {
1863 field = 0;
1864 retval = NULL;
1865 while (*p != 0 && *p != '\n') {
1866 value = p;
1867 while (*p != 0 && *p != '\t' && *p != '\n')
1868 p++;
1869 if (field == desired_field)
1870 retval = value;
1871 if (*p != '\t')
1872 break;
1873 *p = 0;
1874 field++;
1875 p++;
1876 }
1877 if (*p == 0)
1878 break;
1879 *p = 0;
1880 }
1881 return retval;
1882 }
1883
1884 static void bnxt_get_pkgver(struct net_device *dev)
1885 {
1886 struct bnxt *bp = netdev_priv(dev);
1887 u16 index = 0;
1888 char *pkgver;
1889 u32 pkglen;
1890 u8 *pkgbuf;
1891 int len;
1892
1893 if (bnxt_find_nvram_item(dev, BNX_DIR_TYPE_PKG_LOG,
1894 BNX_DIR_ORDINAL_FIRST, BNX_DIR_EXT_NONE,
1895 &index, NULL, &pkglen) != 0)
1896 return;
1897
1898 pkgbuf = kzalloc(pkglen, GFP_KERNEL);
1899 if (!pkgbuf) {
1900 dev_err(&bp->pdev->dev, "Unable to allocate memory for pkg version, length = %u\n",
1901 pkglen);
1902 return;
1903 }
1904
1905 if (bnxt_get_nvram_item(dev, index, 0, pkglen, pkgbuf))
1906 goto err;
1907
1908 pkgver = bnxt_parse_pkglog(BNX_PKG_LOG_FIELD_IDX_PKG_VERSION, pkgbuf,
1909 pkglen);
1910 if (pkgver && *pkgver != 0 && isdigit(*pkgver)) {
1911 len = strlen(bp->fw_ver_str);
1912 snprintf(bp->fw_ver_str + len, FW_VER_STR_LEN - len - 1,
1913 "/pkg %s", pkgver);
1914 }
1915 err:
1916 kfree(pkgbuf);
1917 }
1918
1919 static int bnxt_get_eeprom(struct net_device *dev,
1920 struct ethtool_eeprom *eeprom,
1921 u8 *data)
1922 {
1923 u32 index;
1924 u32 offset;
1925
1926 if (eeprom->offset == 0) /* special offset value to get directory */
1927 return bnxt_get_nvram_directory(dev, eeprom->len, data);
1928
1929 index = eeprom->offset >> 24;
1930 offset = eeprom->offset & 0xffffff;
1931
1932 if (index == 0) {
1933 netdev_err(dev, "unsupported index value: %d\n", index);
1934 return -EINVAL;
1935 }
1936
1937 return bnxt_get_nvram_item(dev, index - 1, offset, eeprom->len, data);
1938 }
1939
1940 static int bnxt_erase_nvram_directory(struct net_device *dev, u8 index)
1941 {
1942 struct bnxt *bp = netdev_priv(dev);
1943 struct hwrm_nvm_erase_dir_entry_input req = {0};
1944
1945 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_ERASE_DIR_ENTRY, -1, -1);
1946 req.dir_idx = cpu_to_le16(index);
1947 return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
1948 }
1949
1950 static int bnxt_set_eeprom(struct net_device *dev,
1951 struct ethtool_eeprom *eeprom,
1952 u8 *data)
1953 {
1954 struct bnxt *bp = netdev_priv(dev);
1955 u8 index, dir_op;
1956 u16 type, ext, ordinal, attr;
1957
1958 if (!BNXT_PF(bp)) {
1959 netdev_err(dev, "NVM write not supported from a virtual function\n");
1960 return -EINVAL;
1961 }
1962
1963 type = eeprom->magic >> 16;
1964
1965 if (type == 0xffff) { /* special value for directory operations */
1966 index = eeprom->magic & 0xff;
1967 dir_op = eeprom->magic >> 8;
1968 if (index == 0)
1969 return -EINVAL;
1970 switch (dir_op) {
1971 case 0x0e: /* erase */
1972 if (eeprom->offset != ~eeprom->magic)
1973 return -EINVAL;
1974 return bnxt_erase_nvram_directory(dev, index - 1);
1975 default:
1976 return -EINVAL;
1977 }
1978 }
1979
1980 /* Create or re-write an NVM item: */
1981 if (bnxt_dir_type_is_executable(type) == true)
1982 return -EOPNOTSUPP;
1983 ext = eeprom->magic & 0xffff;
1984 ordinal = eeprom->offset >> 16;
1985 attr = eeprom->offset & 0xffff;
1986
1987 return bnxt_flash_nvram(dev, type, ordinal, ext, attr, data,
1988 eeprom->len);
1989 }
1990
1991 static int bnxt_set_eee(struct net_device *dev, struct ethtool_eee *edata)
1992 {
1993 struct bnxt *bp = netdev_priv(dev);
1994 struct ethtool_eee *eee = &bp->eee;
1995 struct bnxt_link_info *link_info = &bp->link_info;
1996 u32 advertising =
1997 _bnxt_fw_to_ethtool_adv_spds(link_info->advertising, 0);
1998 int rc = 0;
1999
2000 if (!BNXT_SINGLE_PF(bp))
2001 return -EOPNOTSUPP;
2002
2003 if (!(bp->flags & BNXT_FLAG_EEE_CAP))
2004 return -EOPNOTSUPP;
2005
2006 if (!edata->eee_enabled)
2007 goto eee_ok;
2008
2009 if (!(link_info->autoneg & BNXT_AUTONEG_SPEED)) {
2010 netdev_warn(dev, "EEE requires autoneg\n");
2011 return -EINVAL;
2012 }
2013 if (edata->tx_lpi_enabled) {
2014 if (bp->lpi_tmr_hi && (edata->tx_lpi_timer > bp->lpi_tmr_hi ||
2015 edata->tx_lpi_timer < bp->lpi_tmr_lo)) {
2016 netdev_warn(dev, "Valid LPI timer range is %d and %d microsecs\n",
2017 bp->lpi_tmr_lo, bp->lpi_tmr_hi);
2018 return -EINVAL;
2019 } else if (!bp->lpi_tmr_hi) {
2020 edata->tx_lpi_timer = eee->tx_lpi_timer;
2021 }
2022 }
2023 if (!edata->advertised) {
2024 edata->advertised = advertising & eee->supported;
2025 } else if (edata->advertised & ~advertising) {
2026 netdev_warn(dev, "EEE advertised %x must be a subset of autoneg advertised speeds %x\n",
2027 edata->advertised, advertising);
2028 return -EINVAL;
2029 }
2030
2031 eee->advertised = edata->advertised;
2032 eee->tx_lpi_enabled = edata->tx_lpi_enabled;
2033 eee->tx_lpi_timer = edata->tx_lpi_timer;
2034 eee_ok:
2035 eee->eee_enabled = edata->eee_enabled;
2036
2037 if (netif_running(dev))
2038 rc = bnxt_hwrm_set_link_setting(bp, false, true);
2039
2040 return rc;
2041 }
2042
2043 static int bnxt_get_eee(struct net_device *dev, struct ethtool_eee *edata)
2044 {
2045 struct bnxt *bp = netdev_priv(dev);
2046
2047 if (!(bp->flags & BNXT_FLAG_EEE_CAP))
2048 return -EOPNOTSUPP;
2049
2050 *edata = bp->eee;
2051 if (!bp->eee.eee_enabled) {
2052 /* Preserve tx_lpi_timer so that the last value will be used
2053 * by default when it is re-enabled.
2054 */
2055 edata->advertised = 0;
2056 edata->tx_lpi_enabled = 0;
2057 }
2058
2059 if (!bp->eee.eee_active)
2060 edata->lp_advertised = 0;
2061
2062 return 0;
2063 }
2064
2065 static int bnxt_read_sfp_module_eeprom_info(struct bnxt *bp, u16 i2c_addr,
2066 u16 page_number, u16 start_addr,
2067 u16 data_length, u8 *buf)
2068 {
2069 struct hwrm_port_phy_i2c_read_input req = {0};
2070 struct hwrm_port_phy_i2c_read_output *output = bp->hwrm_cmd_resp_addr;
2071 int rc, byte_offset = 0;
2072
2073 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_PHY_I2C_READ, -1, -1);
2074 req.i2c_slave_addr = i2c_addr;
2075 req.page_number = cpu_to_le16(page_number);
2076 req.port_id = cpu_to_le16(bp->pf.port_id);
2077 do {
2078 u16 xfer_size;
2079
2080 xfer_size = min_t(u16, data_length, BNXT_MAX_PHY_I2C_RESP_SIZE);
2081 data_length -= xfer_size;
2082 req.page_offset = cpu_to_le16(start_addr + byte_offset);
2083 req.data_length = xfer_size;
2084 req.enables = cpu_to_le32(start_addr + byte_offset ?
2085 PORT_PHY_I2C_READ_REQ_ENABLES_PAGE_OFFSET : 0);
2086 mutex_lock(&bp->hwrm_cmd_lock);
2087 rc = _hwrm_send_message(bp, &req, sizeof(req),
2088 HWRM_CMD_TIMEOUT);
2089 if (!rc)
2090 memcpy(buf + byte_offset, output->data, xfer_size);
2091 mutex_unlock(&bp->hwrm_cmd_lock);
2092 byte_offset += xfer_size;
2093 } while (!rc && data_length > 0);
2094
2095 return rc;
2096 }
2097
2098 static int bnxt_get_module_info(struct net_device *dev,
2099 struct ethtool_modinfo *modinfo)
2100 {
2101 struct bnxt *bp = netdev_priv(dev);
2102 struct hwrm_port_phy_i2c_read_input req = {0};
2103 struct hwrm_port_phy_i2c_read_output *output = bp->hwrm_cmd_resp_addr;
2104 int rc;
2105
2106 /* No point in going further if phy status indicates
2107 * module is not inserted or if it is powered down or
2108 * if it is of type 10GBase-T
2109 */
2110 if (bp->link_info.module_status >
2111 PORT_PHY_QCFG_RESP_MODULE_STATUS_WARNINGMSG)
2112 return -EOPNOTSUPP;
2113
2114 /* This feature is not supported in older firmware versions */
2115 if (bp->hwrm_spec_code < 0x10202)
2116 return -EOPNOTSUPP;
2117
2118 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_PHY_I2C_READ, -1, -1);
2119 req.i2c_slave_addr = I2C_DEV_ADDR_A0;
2120 req.page_number = 0;
2121 req.page_offset = cpu_to_le16(SFP_EEPROM_SFF_8472_COMP_ADDR);
2122 req.data_length = SFP_EEPROM_SFF_8472_COMP_SIZE;
2123 req.port_id = cpu_to_le16(bp->pf.port_id);
2124 mutex_lock(&bp->hwrm_cmd_lock);
2125 rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
2126 if (!rc) {
2127 u32 module_id = le32_to_cpu(output->data[0]);
2128
2129 switch (module_id) {
2130 case SFF_MODULE_ID_SFP:
2131 modinfo->type = ETH_MODULE_SFF_8472;
2132 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
2133 break;
2134 case SFF_MODULE_ID_QSFP:
2135 case SFF_MODULE_ID_QSFP_PLUS:
2136 modinfo->type = ETH_MODULE_SFF_8436;
2137 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
2138 break;
2139 case SFF_MODULE_ID_QSFP28:
2140 modinfo->type = ETH_MODULE_SFF_8636;
2141 modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN;
2142 break;
2143 default:
2144 rc = -EOPNOTSUPP;
2145 break;
2146 }
2147 }
2148 mutex_unlock(&bp->hwrm_cmd_lock);
2149 return rc;
2150 }
2151
2152 static int bnxt_get_module_eeprom(struct net_device *dev,
2153 struct ethtool_eeprom *eeprom,
2154 u8 *data)
2155 {
2156 struct bnxt *bp = netdev_priv(dev);
2157 u16 start = eeprom->offset, length = eeprom->len;
2158 int rc = 0;
2159
2160 memset(data, 0, eeprom->len);
2161
2162 /* Read A0 portion of the EEPROM */
2163 if (start < ETH_MODULE_SFF_8436_LEN) {
2164 if (start + eeprom->len > ETH_MODULE_SFF_8436_LEN)
2165 length = ETH_MODULE_SFF_8436_LEN - start;
2166 rc = bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A0, 0,
2167 start, length, data);
2168 if (rc)
2169 return rc;
2170 start += length;
2171 data += length;
2172 length = eeprom->len - length;
2173 }
2174
2175 /* Read A2 portion of the EEPROM */
2176 if (length) {
2177 start -= ETH_MODULE_SFF_8436_LEN;
2178 rc = bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A2, 1,
2179 start, length, data);
2180 }
2181 return rc;
2182 }
2183
2184 static int bnxt_nway_reset(struct net_device *dev)
2185 {
2186 int rc = 0;
2187
2188 struct bnxt *bp = netdev_priv(dev);
2189 struct bnxt_link_info *link_info = &bp->link_info;
2190
2191 if (!BNXT_SINGLE_PF(bp))
2192 return -EOPNOTSUPP;
2193
2194 if (!(link_info->autoneg & BNXT_AUTONEG_SPEED))
2195 return -EINVAL;
2196
2197 if (netif_running(dev))
2198 rc = bnxt_hwrm_set_link_setting(bp, true, false);
2199
2200 return rc;
2201 }
2202
2203 static int bnxt_set_phys_id(struct net_device *dev,
2204 enum ethtool_phys_id_state state)
2205 {
2206 struct hwrm_port_led_cfg_input req = {0};
2207 struct bnxt *bp = netdev_priv(dev);
2208 struct bnxt_pf_info *pf = &bp->pf;
2209 struct bnxt_led_cfg *led_cfg;
2210 u8 led_state;
2211 __le16 duration;
2212 int i, rc;
2213
2214 if (!bp->num_leds || BNXT_VF(bp))
2215 return -EOPNOTSUPP;
2216
2217 if (state == ETHTOOL_ID_ACTIVE) {
2218 led_state = PORT_LED_CFG_REQ_LED0_STATE_BLINKALT;
2219 duration = cpu_to_le16(500);
2220 } else if (state == ETHTOOL_ID_INACTIVE) {
2221 led_state = PORT_LED_CFG_REQ_LED1_STATE_DEFAULT;
2222 duration = cpu_to_le16(0);
2223 } else {
2224 return -EINVAL;
2225 }
2226 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_LED_CFG, -1, -1);
2227 req.port_id = cpu_to_le16(pf->port_id);
2228 req.num_leds = bp->num_leds;
2229 led_cfg = (struct bnxt_led_cfg *)&req.led0_id;
2230 for (i = 0; i < bp->num_leds; i++, led_cfg++) {
2231 req.enables |= BNXT_LED_DFLT_ENABLES(i);
2232 led_cfg->led_id = bp->leds[i].led_id;
2233 led_cfg->led_state = led_state;
2234 led_cfg->led_blink_on = duration;
2235 led_cfg->led_blink_off = duration;
2236 led_cfg->led_group_id = bp->leds[i].led_group_id;
2237 }
2238 rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
2239 if (rc)
2240 rc = -EIO;
2241 return rc;
2242 }
2243
2244 static int bnxt_hwrm_selftest_irq(struct bnxt *bp, u16 cmpl_ring)
2245 {
2246 struct hwrm_selftest_irq_input req = {0};
2247
2248 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_SELFTEST_IRQ, cmpl_ring, -1);
2249 return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
2250 }
2251
2252 static int bnxt_test_irq(struct bnxt *bp)
2253 {
2254 int i;
2255
2256 for (i = 0; i < bp->cp_nr_rings; i++) {
2257 u16 cmpl_ring = bp->grp_info[i].cp_fw_ring_id;
2258 int rc;
2259
2260 rc = bnxt_hwrm_selftest_irq(bp, cmpl_ring);
2261 if (rc)
2262 return rc;
2263 }
2264 return 0;
2265 }
2266
2267 static int bnxt_hwrm_mac_loopback(struct bnxt *bp, bool enable)
2268 {
2269 struct hwrm_port_mac_cfg_input req = {0};
2270
2271 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_MAC_CFG, -1, -1);
2272
2273 req.enables = cpu_to_le32(PORT_MAC_CFG_REQ_ENABLES_LPBK);
2274 if (enable)
2275 req.lpbk = PORT_MAC_CFG_REQ_LPBK_LOCAL;
2276 else
2277 req.lpbk = PORT_MAC_CFG_REQ_LPBK_NONE;
2278 return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
2279 }
2280
2281 static int bnxt_query_force_speeds(struct bnxt *bp, u16 *force_speeds)
2282 {
2283 struct hwrm_port_phy_qcaps_output *resp = bp->hwrm_cmd_resp_addr;
2284 struct hwrm_port_phy_qcaps_input req = {0};
2285 int rc;
2286
2287 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_PHY_QCAPS, -1, -1);
2288 mutex_lock(&bp->hwrm_cmd_lock);
2289 rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
2290 if (!rc)
2291 *force_speeds = le16_to_cpu(resp->supported_speeds_force_mode);
2292
2293 mutex_unlock(&bp->hwrm_cmd_lock);
2294 return rc;
2295 }
2296
2297 static int bnxt_disable_an_for_lpbk(struct bnxt *bp,
2298 struct hwrm_port_phy_cfg_input *req)
2299 {
2300 struct bnxt_link_info *link_info = &bp->link_info;
2301 u16 fw_advertising;
2302 u16 fw_speed;
2303 int rc;
2304
2305 if (!link_info->autoneg)
2306 return 0;
2307
2308 rc = bnxt_query_force_speeds(bp, &fw_advertising);
2309 if (rc)
2310 return rc;
2311
2312 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_1GB;
2313 if (netif_carrier_ok(bp->dev))
2314 fw_speed = bp->link_info.link_speed;
2315 else if (fw_advertising & BNXT_LINK_SPEED_MSK_10GB)
2316 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_10GB;
2317 else if (fw_advertising & BNXT_LINK_SPEED_MSK_25GB)
2318 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_25GB;
2319 else if (fw_advertising & BNXT_LINK_SPEED_MSK_40GB)
2320 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_40GB;
2321 else if (fw_advertising & BNXT_LINK_SPEED_MSK_50GB)
2322 fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_50GB;
2323
2324 req->force_link_speed = cpu_to_le16(fw_speed);
2325 req->flags |= cpu_to_le32(PORT_PHY_CFG_REQ_FLAGS_FORCE |
2326 PORT_PHY_CFG_REQ_FLAGS_RESET_PHY);
2327 rc = hwrm_send_message(bp, req, sizeof(*req), HWRM_CMD_TIMEOUT);
2328 req->flags = 0;
2329 req->force_link_speed = cpu_to_le16(0);
2330 return rc;
2331 }
2332
2333 static int bnxt_hwrm_phy_loopback(struct bnxt *bp, bool enable)
2334 {
2335 struct hwrm_port_phy_cfg_input req = {0};
2336
2337 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_PHY_CFG, -1, -1);
2338
2339 if (enable) {
2340 bnxt_disable_an_for_lpbk(bp, &req);
2341 req.lpbk = PORT_PHY_CFG_REQ_LPBK_LOCAL;
2342 } else {
2343 req.lpbk = PORT_PHY_CFG_REQ_LPBK_NONE;
2344 }
2345 req.enables = cpu_to_le32(PORT_PHY_CFG_REQ_ENABLES_LPBK);
2346 return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
2347 }
2348
2349 static int bnxt_rx_loopback(struct bnxt *bp, struct bnxt_napi *bnapi,
2350 u32 raw_cons, int pkt_size)
2351 {
2352 struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring;
2353 struct bnxt_rx_ring_info *rxr = bnapi->rx_ring;
2354 struct bnxt_sw_rx_bd *rx_buf;
2355 struct rx_cmp *rxcmp;
2356 u16 cp_cons, cons;
2357 u8 *data;
2358 u32 len;
2359 int i;
2360
2361 cp_cons = RING_CMP(raw_cons);
2362 rxcmp = (struct rx_cmp *)
2363 &cpr->cp_desc_ring[CP_RING(cp_cons)][CP_IDX(cp_cons)];
2364 cons = rxcmp->rx_cmp_opaque;
2365 rx_buf = &rxr->rx_buf_ring[cons];
2366 data = rx_buf->data_ptr;
2367 len = le32_to_cpu(rxcmp->rx_cmp_len_flags_type) >> RX_CMP_LEN_SHIFT;
2368 if (len != pkt_size)
2369 return -EIO;
2370 i = ETH_ALEN;
2371 if (!ether_addr_equal(data + i, bnapi->bp->dev->dev_addr))
2372 return -EIO;
2373 i += ETH_ALEN;
2374 for ( ; i < pkt_size; i++) {
2375 if (data[i] != (u8)(i & 0xff))
2376 return -EIO;
2377 }
2378 return 0;
2379 }
2380
2381 static int bnxt_poll_loopback(struct bnxt *bp, int pkt_size)
2382 {
2383 struct bnxt_napi *bnapi = bp->bnapi[0];
2384 struct bnxt_cp_ring_info *cpr;
2385 struct tx_cmp *txcmp;
2386 int rc = -EIO;
2387 u32 raw_cons;
2388 u32 cons;
2389 int i;
2390
2391 cpr = &bnapi->cp_ring;
2392 raw_cons = cpr->cp_raw_cons;
2393 for (i = 0; i < 200; i++) {
2394 cons = RING_CMP(raw_cons);
2395 txcmp = &cpr->cp_desc_ring[CP_RING(cons)][CP_IDX(cons)];
2396
2397 if (!TX_CMP_VALID(txcmp, raw_cons)) {
2398 udelay(5);
2399 continue;
2400 }
2401
2402 /* The valid test of the entry must be done first before
2403 * reading any further.
2404 */
2405 dma_rmb();
2406 if (TX_CMP_TYPE(txcmp) == CMP_TYPE_RX_L2_CMP) {
2407 rc = bnxt_rx_loopback(bp, bnapi, raw_cons, pkt_size);
2408 raw_cons = NEXT_RAW_CMP(raw_cons);
2409 raw_cons = NEXT_RAW_CMP(raw_cons);
2410 break;
2411 }
2412 raw_cons = NEXT_RAW_CMP(raw_cons);
2413 }
2414 cpr->cp_raw_cons = raw_cons;
2415 return rc;
2416 }
2417
2418 static int bnxt_run_loopback(struct bnxt *bp)
2419 {
2420 struct bnxt_tx_ring_info *txr = &bp->tx_ring[0];
2421 int pkt_size, i = 0;
2422 struct sk_buff *skb;
2423 dma_addr_t map;
2424 u8 *data;
2425 int rc;
2426
2427 pkt_size = min(bp->dev->mtu + ETH_HLEN, bp->rx_copy_thresh);
2428 skb = netdev_alloc_skb(bp->dev, pkt_size);
2429 if (!skb)
2430 return -ENOMEM;
2431 data = skb_put(skb, pkt_size);
2432 eth_broadcast_addr(data);
2433 i += ETH_ALEN;
2434 ether_addr_copy(&data[i], bp->dev->dev_addr);
2435 i += ETH_ALEN;
2436 for ( ; i < pkt_size; i++)
2437 data[i] = (u8)(i & 0xff);
2438
2439 map = dma_map_single(&bp->pdev->dev, skb->data, pkt_size,
2440 PCI_DMA_TODEVICE);
2441 if (dma_mapping_error(&bp->pdev->dev, map)) {
2442 dev_kfree_skb(skb);
2443 return -EIO;
2444 }
2445 bnxt_xmit_xdp(bp, txr, map, pkt_size, 0);
2446
2447 /* Sync BD data before updating doorbell */
2448 wmb();
2449
2450 bnxt_db_write(bp, txr->tx_doorbell, DB_KEY_TX | txr->tx_prod);
2451 rc = bnxt_poll_loopback(bp, pkt_size);
2452
2453 dma_unmap_single(&bp->pdev->dev, map, pkt_size, PCI_DMA_TODEVICE);
2454 dev_kfree_skb(skb);
2455 return rc;
2456 }
2457
2458 static int bnxt_run_fw_tests(struct bnxt *bp, u8 test_mask, u8 *test_results)
2459 {
2460 struct hwrm_selftest_exec_output *resp = bp->hwrm_cmd_resp_addr;
2461 struct hwrm_selftest_exec_input req = {0};
2462 int rc;
2463
2464 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_SELFTEST_EXEC, -1, -1);
2465 mutex_lock(&bp->hwrm_cmd_lock);
2466 resp->test_success = 0;
2467 req.flags = test_mask;
2468 rc = _hwrm_send_message(bp, &req, sizeof(req), bp->test_info->timeout);
2469 *test_results = resp->test_success;
2470 mutex_unlock(&bp->hwrm_cmd_lock);
2471 return rc;
2472 }
2473
2474 #define BNXT_DRV_TESTS 3
2475 #define BNXT_MACLPBK_TEST_IDX (bp->num_tests - BNXT_DRV_TESTS)
2476 #define BNXT_PHYLPBK_TEST_IDX (BNXT_MACLPBK_TEST_IDX + 1)
2477 #define BNXT_IRQ_TEST_IDX (BNXT_MACLPBK_TEST_IDX + 2)
2478
2479 static void bnxt_self_test(struct net_device *dev, struct ethtool_test *etest,
2480 u64 *buf)
2481 {
2482 struct bnxt *bp = netdev_priv(dev);
2483 bool offline = false;
2484 u8 test_results = 0;
2485 u8 test_mask = 0;
2486 int rc = 0, i;
2487
2488 if (!bp->num_tests || !BNXT_SINGLE_PF(bp))
2489 return;
2490 memset(buf, 0, sizeof(u64) * bp->num_tests);
2491 if (!netif_running(dev)) {
2492 etest->flags |= ETH_TEST_FL_FAILED;
2493 return;
2494 }
2495
2496 if (etest->flags & ETH_TEST_FL_OFFLINE) {
2497 if (bp->pf.active_vfs) {
2498 etest->flags |= ETH_TEST_FL_FAILED;
2499 netdev_warn(dev, "Offline tests cannot be run with active VFs\n");
2500 return;
2501 }
2502 offline = true;
2503 }
2504
2505 for (i = 0; i < bp->num_tests - BNXT_DRV_TESTS; i++) {
2506 u8 bit_val = 1 << i;
2507
2508 if (!(bp->test_info->offline_mask & bit_val))
2509 test_mask |= bit_val;
2510 else if (offline)
2511 test_mask |= bit_val;
2512 }
2513 if (!offline) {
2514 bnxt_run_fw_tests(bp, test_mask, &test_results);
2515 } else {
2516 rc = bnxt_close_nic(bp, false, false);
2517 if (rc)
2518 return;
2519 bnxt_run_fw_tests(bp, test_mask, &test_results);
2520
2521 buf[BNXT_MACLPBK_TEST_IDX] = 1;
2522 bnxt_hwrm_mac_loopback(bp, true);
2523 msleep(250);
2524 rc = bnxt_half_open_nic(bp);
2525 if (rc) {
2526 bnxt_hwrm_mac_loopback(bp, false);
2527 etest->flags |= ETH_TEST_FL_FAILED;
2528 return;
2529 }
2530 if (bnxt_run_loopback(bp))
2531 etest->flags |= ETH_TEST_FL_FAILED;
2532 else
2533 buf[BNXT_MACLPBK_TEST_IDX] = 0;
2534
2535 bnxt_hwrm_mac_loopback(bp, false);
2536 bnxt_hwrm_phy_loopback(bp, true);
2537 msleep(1000);
2538 if (bnxt_run_loopback(bp)) {
2539 buf[BNXT_PHYLPBK_TEST_IDX] = 1;
2540 etest->flags |= ETH_TEST_FL_FAILED;
2541 }
2542 bnxt_hwrm_phy_loopback(bp, false);
2543 bnxt_half_close_nic(bp);
2544 rc = bnxt_open_nic(bp, false, true);
2545 }
2546 if (rc || bnxt_test_irq(bp)) {
2547 buf[BNXT_IRQ_TEST_IDX] = 1;
2548 etest->flags |= ETH_TEST_FL_FAILED;
2549 }
2550 for (i = 0; i < bp->num_tests - BNXT_DRV_TESTS; i++) {
2551 u8 bit_val = 1 << i;
2552
2553 if ((test_mask & bit_val) && !(test_results & bit_val)) {
2554 buf[i] = 1;
2555 etest->flags |= ETH_TEST_FL_FAILED;
2556 }
2557 }
2558 }
2559
2560 static int bnxt_reset(struct net_device *dev, u32 *flags)
2561 {
2562 struct bnxt *bp = netdev_priv(dev);
2563 int rc = 0;
2564
2565 if (!BNXT_PF(bp)) {
2566 netdev_err(dev, "Reset is not supported from a VF\n");
2567 return -EOPNOTSUPP;
2568 }
2569
2570 if (pci_vfs_assigned(bp->pdev)) {
2571 netdev_err(dev,
2572 "Reset not allowed when VFs are assigned to VMs\n");
2573 return -EBUSY;
2574 }
2575
2576 if (*flags == ETH_RESET_ALL) {
2577 /* This feature is not supported in older firmware versions */
2578 if (bp->hwrm_spec_code < 0x10803)
2579 return -EOPNOTSUPP;
2580
2581 rc = bnxt_firmware_reset(dev, BNXT_FW_RESET_CHIP);
2582 if (!rc)
2583 netdev_info(dev, "Reset request successful. Reload driver to complete reset\n");
2584 } else {
2585 rc = -EINVAL;
2586 }
2587
2588 return rc;
2589 }
2590
2591 void bnxt_ethtool_init(struct bnxt *bp)
2592 {
2593 struct hwrm_selftest_qlist_output *resp = bp->hwrm_cmd_resp_addr;
2594 struct hwrm_selftest_qlist_input req = {0};
2595 struct bnxt_test_info *test_info;
2596 struct net_device *dev = bp->dev;
2597 int i, rc;
2598
2599 bnxt_get_pkgver(dev);
2600
2601 if (bp->hwrm_spec_code < 0x10704 || !BNXT_SINGLE_PF(bp))
2602 return;
2603
2604 bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_SELFTEST_QLIST, -1, -1);
2605 mutex_lock(&bp->hwrm_cmd_lock);
2606 rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
2607 if (rc)
2608 goto ethtool_init_exit;
2609
2610 test_info = kzalloc(sizeof(*bp->test_info), GFP_KERNEL);
2611 if (!test_info)
2612 goto ethtool_init_exit;
2613
2614 bp->test_info = test_info;
2615 bp->num_tests = resp->num_tests + BNXT_DRV_TESTS;
2616 if (bp->num_tests > BNXT_MAX_TEST)
2617 bp->num_tests = BNXT_MAX_TEST;
2618
2619 test_info->offline_mask = resp->offline_tests;
2620 test_info->timeout = le16_to_cpu(resp->test_timeout);
2621 if (!test_info->timeout)
2622 test_info->timeout = HWRM_CMD_TIMEOUT;
2623 for (i = 0; i < bp->num_tests; i++) {
2624 char *str = test_info->string[i];
2625 char *fw_str = resp->test0_name + i * 32;
2626
2627 if (i == BNXT_MACLPBK_TEST_IDX) {
2628 strcpy(str, "Mac loopback test (offline)");
2629 } else if (i == BNXT_PHYLPBK_TEST_IDX) {
2630 strcpy(str, "Phy loopback test (offline)");
2631 } else if (i == BNXT_IRQ_TEST_IDX) {
2632 strcpy(str, "Interrupt_test (offline)");
2633 } else {
2634 strlcpy(str, fw_str, ETH_GSTRING_LEN);
2635 strncat(str, " test", ETH_GSTRING_LEN - strlen(str));
2636 if (test_info->offline_mask & (1 << i))
2637 strncat(str, " (offline)",
2638 ETH_GSTRING_LEN - strlen(str));
2639 else
2640 strncat(str, " (online)",
2641 ETH_GSTRING_LEN - strlen(str));
2642 }
2643 }
2644
2645 ethtool_init_exit:
2646 mutex_unlock(&bp->hwrm_cmd_lock);
2647 }
2648
2649 void bnxt_ethtool_free(struct bnxt *bp)
2650 {
2651 kfree(bp->test_info);
2652 bp->test_info = NULL;
2653 }
2654
2655 const struct ethtool_ops bnxt_ethtool_ops = {
2656 .get_link_ksettings = bnxt_get_link_ksettings,
2657 .set_link_ksettings = bnxt_set_link_ksettings,
2658 .get_pauseparam = bnxt_get_pauseparam,
2659 .set_pauseparam = bnxt_set_pauseparam,
2660 .get_drvinfo = bnxt_get_drvinfo,
2661 .get_wol = bnxt_get_wol,
2662 .set_wol = bnxt_set_wol,
2663 .get_coalesce = bnxt_get_coalesce,
2664 .set_coalesce = bnxt_set_coalesce,
2665 .get_msglevel = bnxt_get_msglevel,
2666 .set_msglevel = bnxt_set_msglevel,
2667 .get_sset_count = bnxt_get_sset_count,
2668 .get_strings = bnxt_get_strings,
2669 .get_ethtool_stats = bnxt_get_ethtool_stats,
2670 .set_ringparam = bnxt_set_ringparam,
2671 .get_ringparam = bnxt_get_ringparam,
2672 .get_channels = bnxt_get_channels,
2673 .set_channels = bnxt_set_channels,
2674 .get_rxnfc = bnxt_get_rxnfc,
2675 .set_rxnfc = bnxt_set_rxnfc,
2676 .get_rxfh_indir_size = bnxt_get_rxfh_indir_size,
2677 .get_rxfh_key_size = bnxt_get_rxfh_key_size,
2678 .get_rxfh = bnxt_get_rxfh,
2679 .flash_device = bnxt_flash_device,
2680 .get_eeprom_len = bnxt_get_eeprom_len,
2681 .get_eeprom = bnxt_get_eeprom,
2682 .set_eeprom = bnxt_set_eeprom,
2683 .get_link = bnxt_get_link,
2684 .get_eee = bnxt_get_eee,
2685 .set_eee = bnxt_set_eee,
2686 .get_module_info = bnxt_get_module_info,
2687 .get_module_eeprom = bnxt_get_module_eeprom,
2688 .nway_reset = bnxt_nway_reset,
2689 .set_phys_id = bnxt_set_phys_id,
2690 .self_test = bnxt_self_test,
2691 .reset = bnxt_reset,
2692 };
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