1 /* Broadcom NetXtreme-C/E network driver.
3 * Copyright (c) 2014-2016 Broadcom Corporation
4 * Copyright (c) 2016-2017 Broadcom Limited
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation.
11 #include <linux/ctype.h>
12 #include <linux/stringify.h>
13 #include <linux/ethtool.h>
14 #include <linux/interrupt.h>
15 #include <linux/pci.h>
16 #include <linux/etherdevice.h>
17 #include <linux/crc32.h>
18 #include <linux/firmware.h>
19 #include <linux/utsname.h>
20 #include <linux/time.h>
24 #include "bnxt_ethtool.h"
25 #include "bnxt_nvm_defs.h" /* NVRAM content constant and structure defs */
26 #include "bnxt_fw_hdr.h" /* Firmware hdr constant and structure defs */
27 #include "bnxt_coredump.h"
28 #define FLASH_NVRAM_TIMEOUT ((HWRM_CMD_TIMEOUT) * 100)
29 #define FLASH_PACKAGE_TIMEOUT ((HWRM_CMD_TIMEOUT) * 200)
30 #define INSTALL_PACKAGE_TIMEOUT ((HWRM_CMD_TIMEOUT) * 200)
32 static u32
bnxt_get_msglevel(struct net_device
*dev
)
34 struct bnxt
*bp
= netdev_priv(dev
);
36 return bp
->msg_enable
;
39 static void bnxt_set_msglevel(struct net_device
*dev
, u32 value
)
41 struct bnxt
*bp
= netdev_priv(dev
);
43 bp
->msg_enable
= value
;
46 static int bnxt_get_coalesce(struct net_device
*dev
,
47 struct ethtool_coalesce
*coal
)
49 struct bnxt
*bp
= netdev_priv(dev
);
50 struct bnxt_coal
*hw_coal
;
53 memset(coal
, 0, sizeof(*coal
));
55 coal
->use_adaptive_rx_coalesce
= bp
->flags
& BNXT_FLAG_DIM
;
57 hw_coal
= &bp
->rx_coal
;
58 mult
= hw_coal
->bufs_per_record
;
59 coal
->rx_coalesce_usecs
= hw_coal
->coal_ticks
;
60 coal
->rx_max_coalesced_frames
= hw_coal
->coal_bufs
/ mult
;
61 coal
->rx_coalesce_usecs_irq
= hw_coal
->coal_ticks_irq
;
62 coal
->rx_max_coalesced_frames_irq
= hw_coal
->coal_bufs_irq
/ mult
;
64 hw_coal
= &bp
->tx_coal
;
65 mult
= hw_coal
->bufs_per_record
;
66 coal
->tx_coalesce_usecs
= hw_coal
->coal_ticks
;
67 coal
->tx_max_coalesced_frames
= hw_coal
->coal_bufs
/ mult
;
68 coal
->tx_coalesce_usecs_irq
= hw_coal
->coal_ticks_irq
;
69 coal
->tx_max_coalesced_frames_irq
= hw_coal
->coal_bufs_irq
/ mult
;
71 coal
->stats_block_coalesce_usecs
= bp
->stats_coal_ticks
;
76 static int bnxt_set_coalesce(struct net_device
*dev
,
77 struct ethtool_coalesce
*coal
)
79 struct bnxt
*bp
= netdev_priv(dev
);
80 bool update_stats
= false;
81 struct bnxt_coal
*hw_coal
;
85 if (coal
->use_adaptive_rx_coalesce
) {
86 bp
->flags
|= BNXT_FLAG_DIM
;
88 if (bp
->flags
& BNXT_FLAG_DIM
) {
89 bp
->flags
&= ~(BNXT_FLAG_DIM
);
94 hw_coal
= &bp
->rx_coal
;
95 mult
= hw_coal
->bufs_per_record
;
96 hw_coal
->coal_ticks
= coal
->rx_coalesce_usecs
;
97 hw_coal
->coal_bufs
= coal
->rx_max_coalesced_frames
* mult
;
98 hw_coal
->coal_ticks_irq
= coal
->rx_coalesce_usecs_irq
;
99 hw_coal
->coal_bufs_irq
= coal
->rx_max_coalesced_frames_irq
* mult
;
101 hw_coal
= &bp
->tx_coal
;
102 mult
= hw_coal
->bufs_per_record
;
103 hw_coal
->coal_ticks
= coal
->tx_coalesce_usecs
;
104 hw_coal
->coal_bufs
= coal
->tx_max_coalesced_frames
* mult
;
105 hw_coal
->coal_ticks_irq
= coal
->tx_coalesce_usecs_irq
;
106 hw_coal
->coal_bufs_irq
= coal
->tx_max_coalesced_frames_irq
* mult
;
108 if (bp
->stats_coal_ticks
!= coal
->stats_block_coalesce_usecs
) {
109 u32 stats_ticks
= coal
->stats_block_coalesce_usecs
;
111 /* Allow 0, which means disable. */
113 stats_ticks
= clamp_t(u32
, stats_ticks
,
114 BNXT_MIN_STATS_COAL_TICKS
,
115 BNXT_MAX_STATS_COAL_TICKS
);
116 stats_ticks
= rounddown(stats_ticks
, BNXT_MIN_STATS_COAL_TICKS
);
117 bp
->stats_coal_ticks
= stats_ticks
;
118 if (bp
->stats_coal_ticks
)
119 bp
->current_interval
=
120 bp
->stats_coal_ticks
* HZ
/ 1000000;
122 bp
->current_interval
= BNXT_TIMER_INTERVAL
;
127 if (netif_running(dev
)) {
129 rc
= bnxt_close_nic(bp
, true, false);
131 rc
= bnxt_open_nic(bp
, true, false);
133 rc
= bnxt_hwrm_set_coal(bp
);
140 static const char * const bnxt_ring_stats_str
[] = {
159 static const char * const bnxt_ring_tpa_stats_str
[] = {
166 static const char * const bnxt_ring_tpa2_stats_str
[] = {
167 "rx_tpa_eligible_pkt",
168 "rx_tpa_eligible_bytes",
174 static const char * const bnxt_ring_sw_stats_str
[] = {
180 #define BNXT_RX_STATS_ENTRY(counter) \
181 { BNXT_RX_STATS_OFFSET(counter), __stringify(counter) }
183 #define BNXT_TX_STATS_ENTRY(counter) \
184 { BNXT_TX_STATS_OFFSET(counter), __stringify(counter) }
186 #define BNXT_RX_STATS_EXT_ENTRY(counter) \
187 { BNXT_RX_STATS_EXT_OFFSET(counter), __stringify(counter) }
189 #define BNXT_TX_STATS_EXT_ENTRY(counter) \
190 { BNXT_TX_STATS_EXT_OFFSET(counter), __stringify(counter) }
192 #define BNXT_RX_STATS_EXT_PFC_ENTRY(n) \
193 BNXT_RX_STATS_EXT_ENTRY(pfc_pri##n##_rx_duration_us), \
194 BNXT_RX_STATS_EXT_ENTRY(pfc_pri##n##_rx_transitions)
196 #define BNXT_TX_STATS_EXT_PFC_ENTRY(n) \
197 BNXT_TX_STATS_EXT_ENTRY(pfc_pri##n##_tx_duration_us), \
198 BNXT_TX_STATS_EXT_ENTRY(pfc_pri##n##_tx_transitions)
200 #define BNXT_RX_STATS_EXT_PFC_ENTRIES \
201 BNXT_RX_STATS_EXT_PFC_ENTRY(0), \
202 BNXT_RX_STATS_EXT_PFC_ENTRY(1), \
203 BNXT_RX_STATS_EXT_PFC_ENTRY(2), \
204 BNXT_RX_STATS_EXT_PFC_ENTRY(3), \
205 BNXT_RX_STATS_EXT_PFC_ENTRY(4), \
206 BNXT_RX_STATS_EXT_PFC_ENTRY(5), \
207 BNXT_RX_STATS_EXT_PFC_ENTRY(6), \
208 BNXT_RX_STATS_EXT_PFC_ENTRY(7)
210 #define BNXT_TX_STATS_EXT_PFC_ENTRIES \
211 BNXT_TX_STATS_EXT_PFC_ENTRY(0), \
212 BNXT_TX_STATS_EXT_PFC_ENTRY(1), \
213 BNXT_TX_STATS_EXT_PFC_ENTRY(2), \
214 BNXT_TX_STATS_EXT_PFC_ENTRY(3), \
215 BNXT_TX_STATS_EXT_PFC_ENTRY(4), \
216 BNXT_TX_STATS_EXT_PFC_ENTRY(5), \
217 BNXT_TX_STATS_EXT_PFC_ENTRY(6), \
218 BNXT_TX_STATS_EXT_PFC_ENTRY(7)
220 #define BNXT_RX_STATS_EXT_COS_ENTRY(n) \
221 BNXT_RX_STATS_EXT_ENTRY(rx_bytes_cos##n), \
222 BNXT_RX_STATS_EXT_ENTRY(rx_packets_cos##n)
224 #define BNXT_TX_STATS_EXT_COS_ENTRY(n) \
225 BNXT_TX_STATS_EXT_ENTRY(tx_bytes_cos##n), \
226 BNXT_TX_STATS_EXT_ENTRY(tx_packets_cos##n)
228 #define BNXT_RX_STATS_EXT_COS_ENTRIES \
229 BNXT_RX_STATS_EXT_COS_ENTRY(0), \
230 BNXT_RX_STATS_EXT_COS_ENTRY(1), \
231 BNXT_RX_STATS_EXT_COS_ENTRY(2), \
232 BNXT_RX_STATS_EXT_COS_ENTRY(3), \
233 BNXT_RX_STATS_EXT_COS_ENTRY(4), \
234 BNXT_RX_STATS_EXT_COS_ENTRY(5), \
235 BNXT_RX_STATS_EXT_COS_ENTRY(6), \
236 BNXT_RX_STATS_EXT_COS_ENTRY(7) \
238 #define BNXT_TX_STATS_EXT_COS_ENTRIES \
239 BNXT_TX_STATS_EXT_COS_ENTRY(0), \
240 BNXT_TX_STATS_EXT_COS_ENTRY(1), \
241 BNXT_TX_STATS_EXT_COS_ENTRY(2), \
242 BNXT_TX_STATS_EXT_COS_ENTRY(3), \
243 BNXT_TX_STATS_EXT_COS_ENTRY(4), \
244 BNXT_TX_STATS_EXT_COS_ENTRY(5), \
245 BNXT_TX_STATS_EXT_COS_ENTRY(6), \
246 BNXT_TX_STATS_EXT_COS_ENTRY(7) \
248 #define BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(n) \
249 BNXT_RX_STATS_EXT_ENTRY(rx_discard_bytes_cos##n), \
250 BNXT_RX_STATS_EXT_ENTRY(rx_discard_packets_cos##n)
252 #define BNXT_RX_STATS_EXT_DISCARD_COS_ENTRIES \
253 BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(0), \
254 BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(1), \
255 BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(2), \
256 BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(3), \
257 BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(4), \
258 BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(5), \
259 BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(6), \
260 BNXT_RX_STATS_EXT_DISCARD_COS_ENTRY(7)
262 #define BNXT_RX_STATS_PRI_ENTRY(counter, n) \
263 { BNXT_RX_STATS_EXT_OFFSET(counter##_cos0), \
264 __stringify(counter##_pri##n) }
266 #define BNXT_TX_STATS_PRI_ENTRY(counter, n) \
267 { BNXT_TX_STATS_EXT_OFFSET(counter##_cos0), \
268 __stringify(counter##_pri##n) }
270 #define BNXT_RX_STATS_PRI_ENTRIES(counter) \
271 BNXT_RX_STATS_PRI_ENTRY(counter, 0), \
272 BNXT_RX_STATS_PRI_ENTRY(counter, 1), \
273 BNXT_RX_STATS_PRI_ENTRY(counter, 2), \
274 BNXT_RX_STATS_PRI_ENTRY(counter, 3), \
275 BNXT_RX_STATS_PRI_ENTRY(counter, 4), \
276 BNXT_RX_STATS_PRI_ENTRY(counter, 5), \
277 BNXT_RX_STATS_PRI_ENTRY(counter, 6), \
278 BNXT_RX_STATS_PRI_ENTRY(counter, 7)
280 #define BNXT_TX_STATS_PRI_ENTRIES(counter) \
281 BNXT_TX_STATS_PRI_ENTRY(counter, 0), \
282 BNXT_TX_STATS_PRI_ENTRY(counter, 1), \
283 BNXT_TX_STATS_PRI_ENTRY(counter, 2), \
284 BNXT_TX_STATS_PRI_ENTRY(counter, 3), \
285 BNXT_TX_STATS_PRI_ENTRY(counter, 4), \
286 BNXT_TX_STATS_PRI_ENTRY(counter, 5), \
287 BNXT_TX_STATS_PRI_ENTRY(counter, 6), \
288 BNXT_TX_STATS_PRI_ENTRY(counter, 7)
290 #define BNXT_PCIE_STATS_ENTRY(counter) \
291 { BNXT_PCIE_STATS_OFFSET(counter), __stringify(counter) }
300 char string
[ETH_GSTRING_LEN
];
301 } bnxt_sw_func_stats
[] = {
302 {0, "rx_total_discard_pkts"},
303 {0, "tx_total_discard_pkts"},
306 static const struct {
308 char string
[ETH_GSTRING_LEN
];
309 } bnxt_port_stats_arr
[] = {
310 BNXT_RX_STATS_ENTRY(rx_64b_frames
),
311 BNXT_RX_STATS_ENTRY(rx_65b_127b_frames
),
312 BNXT_RX_STATS_ENTRY(rx_128b_255b_frames
),
313 BNXT_RX_STATS_ENTRY(rx_256b_511b_frames
),
314 BNXT_RX_STATS_ENTRY(rx_512b_1023b_frames
),
315 BNXT_RX_STATS_ENTRY(rx_1024b_1518b_frames
),
316 BNXT_RX_STATS_ENTRY(rx_good_vlan_frames
),
317 BNXT_RX_STATS_ENTRY(rx_1519b_2047b_frames
),
318 BNXT_RX_STATS_ENTRY(rx_2048b_4095b_frames
),
319 BNXT_RX_STATS_ENTRY(rx_4096b_9216b_frames
),
320 BNXT_RX_STATS_ENTRY(rx_9217b_16383b_frames
),
321 BNXT_RX_STATS_ENTRY(rx_total_frames
),
322 BNXT_RX_STATS_ENTRY(rx_ucast_frames
),
323 BNXT_RX_STATS_ENTRY(rx_mcast_frames
),
324 BNXT_RX_STATS_ENTRY(rx_bcast_frames
),
325 BNXT_RX_STATS_ENTRY(rx_fcs_err_frames
),
326 BNXT_RX_STATS_ENTRY(rx_ctrl_frames
),
327 BNXT_RX_STATS_ENTRY(rx_pause_frames
),
328 BNXT_RX_STATS_ENTRY(rx_pfc_frames
),
329 BNXT_RX_STATS_ENTRY(rx_align_err_frames
),
330 BNXT_RX_STATS_ENTRY(rx_ovrsz_frames
),
331 BNXT_RX_STATS_ENTRY(rx_jbr_frames
),
332 BNXT_RX_STATS_ENTRY(rx_mtu_err_frames
),
333 BNXT_RX_STATS_ENTRY(rx_tagged_frames
),
334 BNXT_RX_STATS_ENTRY(rx_double_tagged_frames
),
335 BNXT_RX_STATS_ENTRY(rx_good_frames
),
336 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri0
),
337 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri1
),
338 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri2
),
339 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri3
),
340 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri4
),
341 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri5
),
342 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri6
),
343 BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri7
),
344 BNXT_RX_STATS_ENTRY(rx_undrsz_frames
),
345 BNXT_RX_STATS_ENTRY(rx_eee_lpi_events
),
346 BNXT_RX_STATS_ENTRY(rx_eee_lpi_duration
),
347 BNXT_RX_STATS_ENTRY(rx_bytes
),
348 BNXT_RX_STATS_ENTRY(rx_runt_bytes
),
349 BNXT_RX_STATS_ENTRY(rx_runt_frames
),
350 BNXT_RX_STATS_ENTRY(rx_stat_discard
),
351 BNXT_RX_STATS_ENTRY(rx_stat_err
),
353 BNXT_TX_STATS_ENTRY(tx_64b_frames
),
354 BNXT_TX_STATS_ENTRY(tx_65b_127b_frames
),
355 BNXT_TX_STATS_ENTRY(tx_128b_255b_frames
),
356 BNXT_TX_STATS_ENTRY(tx_256b_511b_frames
),
357 BNXT_TX_STATS_ENTRY(tx_512b_1023b_frames
),
358 BNXT_TX_STATS_ENTRY(tx_1024b_1518b_frames
),
359 BNXT_TX_STATS_ENTRY(tx_good_vlan_frames
),
360 BNXT_TX_STATS_ENTRY(tx_1519b_2047b_frames
),
361 BNXT_TX_STATS_ENTRY(tx_2048b_4095b_frames
),
362 BNXT_TX_STATS_ENTRY(tx_4096b_9216b_frames
),
363 BNXT_TX_STATS_ENTRY(tx_9217b_16383b_frames
),
364 BNXT_TX_STATS_ENTRY(tx_good_frames
),
365 BNXT_TX_STATS_ENTRY(tx_total_frames
),
366 BNXT_TX_STATS_ENTRY(tx_ucast_frames
),
367 BNXT_TX_STATS_ENTRY(tx_mcast_frames
),
368 BNXT_TX_STATS_ENTRY(tx_bcast_frames
),
369 BNXT_TX_STATS_ENTRY(tx_pause_frames
),
370 BNXT_TX_STATS_ENTRY(tx_pfc_frames
),
371 BNXT_TX_STATS_ENTRY(tx_jabber_frames
),
372 BNXT_TX_STATS_ENTRY(tx_fcs_err_frames
),
373 BNXT_TX_STATS_ENTRY(tx_err
),
374 BNXT_TX_STATS_ENTRY(tx_fifo_underruns
),
375 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri0
),
376 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri1
),
377 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri2
),
378 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri3
),
379 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri4
),
380 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri5
),
381 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri6
),
382 BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri7
),
383 BNXT_TX_STATS_ENTRY(tx_eee_lpi_events
),
384 BNXT_TX_STATS_ENTRY(tx_eee_lpi_duration
),
385 BNXT_TX_STATS_ENTRY(tx_total_collisions
),
386 BNXT_TX_STATS_ENTRY(tx_bytes
),
387 BNXT_TX_STATS_ENTRY(tx_xthol_frames
),
388 BNXT_TX_STATS_ENTRY(tx_stat_discard
),
389 BNXT_TX_STATS_ENTRY(tx_stat_error
),
392 static const struct {
394 char string
[ETH_GSTRING_LEN
];
395 } bnxt_port_stats_ext_arr
[] = {
396 BNXT_RX_STATS_EXT_ENTRY(link_down_events
),
397 BNXT_RX_STATS_EXT_ENTRY(continuous_pause_events
),
398 BNXT_RX_STATS_EXT_ENTRY(resume_pause_events
),
399 BNXT_RX_STATS_EXT_ENTRY(continuous_roce_pause_events
),
400 BNXT_RX_STATS_EXT_ENTRY(resume_roce_pause_events
),
401 BNXT_RX_STATS_EXT_COS_ENTRIES
,
402 BNXT_RX_STATS_EXT_PFC_ENTRIES
,
403 BNXT_RX_STATS_EXT_ENTRY(rx_bits
),
404 BNXT_RX_STATS_EXT_ENTRY(rx_buffer_passed_threshold
),
405 BNXT_RX_STATS_EXT_ENTRY(rx_pcs_symbol_err
),
406 BNXT_RX_STATS_EXT_ENTRY(rx_corrected_bits
),
407 BNXT_RX_STATS_EXT_DISCARD_COS_ENTRIES
,
410 static const struct {
412 char string
[ETH_GSTRING_LEN
];
413 } bnxt_tx_port_stats_ext_arr
[] = {
414 BNXT_TX_STATS_EXT_COS_ENTRIES
,
415 BNXT_TX_STATS_EXT_PFC_ENTRIES
,
418 static const struct {
420 char string
[ETH_GSTRING_LEN
];
421 } bnxt_rx_bytes_pri_arr
[] = {
422 BNXT_RX_STATS_PRI_ENTRIES(rx_bytes
),
425 static const struct {
427 char string
[ETH_GSTRING_LEN
];
428 } bnxt_rx_pkts_pri_arr
[] = {
429 BNXT_RX_STATS_PRI_ENTRIES(rx_packets
),
432 static const struct {
434 char string
[ETH_GSTRING_LEN
];
435 } bnxt_tx_bytes_pri_arr
[] = {
436 BNXT_TX_STATS_PRI_ENTRIES(tx_bytes
),
439 static const struct {
441 char string
[ETH_GSTRING_LEN
];
442 } bnxt_tx_pkts_pri_arr
[] = {
443 BNXT_TX_STATS_PRI_ENTRIES(tx_packets
),
446 static const struct {
448 char string
[ETH_GSTRING_LEN
];
449 } bnxt_pcie_stats_arr
[] = {
450 BNXT_PCIE_STATS_ENTRY(pcie_pl_signal_integrity
),
451 BNXT_PCIE_STATS_ENTRY(pcie_dl_signal_integrity
),
452 BNXT_PCIE_STATS_ENTRY(pcie_tl_signal_integrity
),
453 BNXT_PCIE_STATS_ENTRY(pcie_link_integrity
),
454 BNXT_PCIE_STATS_ENTRY(pcie_tx_traffic_rate
),
455 BNXT_PCIE_STATS_ENTRY(pcie_rx_traffic_rate
),
456 BNXT_PCIE_STATS_ENTRY(pcie_tx_dllp_statistics
),
457 BNXT_PCIE_STATS_ENTRY(pcie_rx_dllp_statistics
),
458 BNXT_PCIE_STATS_ENTRY(pcie_equalization_time
),
459 BNXT_PCIE_STATS_ENTRY(pcie_ltssm_histogram
[0]),
460 BNXT_PCIE_STATS_ENTRY(pcie_ltssm_histogram
[2]),
461 BNXT_PCIE_STATS_ENTRY(pcie_recovery_histogram
),
464 #define BNXT_NUM_SW_FUNC_STATS ARRAY_SIZE(bnxt_sw_func_stats)
465 #define BNXT_NUM_PORT_STATS ARRAY_SIZE(bnxt_port_stats_arr)
466 #define BNXT_NUM_STATS_PRI \
467 (ARRAY_SIZE(bnxt_rx_bytes_pri_arr) + \
468 ARRAY_SIZE(bnxt_rx_pkts_pri_arr) + \
469 ARRAY_SIZE(bnxt_tx_bytes_pri_arr) + \
470 ARRAY_SIZE(bnxt_tx_pkts_pri_arr))
471 #define BNXT_NUM_PCIE_STATS ARRAY_SIZE(bnxt_pcie_stats_arr)
473 static int bnxt_get_num_tpa_ring_stats(struct bnxt
*bp
)
475 if (BNXT_SUPPORTS_TPA(bp
)) {
477 return ARRAY_SIZE(bnxt_ring_tpa2_stats_str
);
478 return ARRAY_SIZE(bnxt_ring_tpa_stats_str
);
483 static int bnxt_get_num_ring_stats(struct bnxt
*bp
)
487 num_stats
= ARRAY_SIZE(bnxt_ring_stats_str
) +
488 ARRAY_SIZE(bnxt_ring_sw_stats_str
) +
489 bnxt_get_num_tpa_ring_stats(bp
);
490 return num_stats
* bp
->cp_nr_rings
;
493 static int bnxt_get_num_stats(struct bnxt
*bp
)
495 int num_stats
= bnxt_get_num_ring_stats(bp
);
497 num_stats
+= BNXT_NUM_SW_FUNC_STATS
;
499 if (bp
->flags
& BNXT_FLAG_PORT_STATS
)
500 num_stats
+= BNXT_NUM_PORT_STATS
;
502 if (bp
->flags
& BNXT_FLAG_PORT_STATS_EXT
) {
503 num_stats
+= bp
->fw_rx_stats_ext_size
+
504 bp
->fw_tx_stats_ext_size
;
505 if (bp
->pri2cos_valid
)
506 num_stats
+= BNXT_NUM_STATS_PRI
;
509 if (bp
->flags
& BNXT_FLAG_PCIE_STATS
)
510 num_stats
+= BNXT_NUM_PCIE_STATS
;
515 static int bnxt_get_sset_count(struct net_device
*dev
, int sset
)
517 struct bnxt
*bp
= netdev_priv(dev
);
521 return bnxt_get_num_stats(bp
);
525 return bp
->num_tests
;
531 static void bnxt_get_ethtool_stats(struct net_device
*dev
,
532 struct ethtool_stats
*stats
, u64
*buf
)
535 struct bnxt
*bp
= netdev_priv(dev
);
536 u32 stat_fields
= ARRAY_SIZE(bnxt_ring_stats_str
) +
537 bnxt_get_num_tpa_ring_stats(bp
);
540 j
+= bnxt_get_num_ring_stats(bp
) + BNXT_NUM_SW_FUNC_STATS
;
541 goto skip_ring_stats
;
544 for (i
= 0; i
< BNXT_NUM_SW_FUNC_STATS
; i
++)
545 bnxt_sw_func_stats
[i
].counter
= 0;
547 for (i
= 0; i
< bp
->cp_nr_rings
; i
++) {
548 struct bnxt_napi
*bnapi
= bp
->bnapi
[i
];
549 struct bnxt_cp_ring_info
*cpr
= &bnapi
->cp_ring
;
550 __le64
*hw_stats
= (__le64
*)cpr
->hw_stats
;
553 for (k
= 0; k
< stat_fields
; j
++, k
++)
554 buf
[j
] = le64_to_cpu(hw_stats
[k
]);
555 buf
[j
++] = cpr
->rx_l4_csum_errors
;
556 buf
[j
++] = cpr
->rx_buf_errors
;
557 buf
[j
++] = cpr
->missed_irqs
;
559 bnxt_sw_func_stats
[RX_TOTAL_DISCARDS
].counter
+=
560 le64_to_cpu(cpr
->hw_stats
->rx_discard_pkts
);
561 bnxt_sw_func_stats
[TX_TOTAL_DISCARDS
].counter
+=
562 le64_to_cpu(cpr
->hw_stats
->tx_discard_pkts
);
565 for (i
= 0; i
< BNXT_NUM_SW_FUNC_STATS
; i
++, j
++)
566 buf
[j
] = bnxt_sw_func_stats
[i
].counter
;
569 if (bp
->flags
& BNXT_FLAG_PORT_STATS
) {
570 __le64
*port_stats
= (__le64
*)bp
->hw_rx_port_stats
;
572 for (i
= 0; i
< BNXT_NUM_PORT_STATS
; i
++, j
++) {
573 buf
[j
] = le64_to_cpu(*(port_stats
+
574 bnxt_port_stats_arr
[i
].offset
));
577 if (bp
->flags
& BNXT_FLAG_PORT_STATS_EXT
) {
578 __le64
*rx_port_stats_ext
= (__le64
*)bp
->hw_rx_port_stats_ext
;
579 __le64
*tx_port_stats_ext
= (__le64
*)bp
->hw_tx_port_stats_ext
;
581 for (i
= 0; i
< bp
->fw_rx_stats_ext_size
; i
++, j
++) {
582 buf
[j
] = le64_to_cpu(*(rx_port_stats_ext
+
583 bnxt_port_stats_ext_arr
[i
].offset
));
585 for (i
= 0; i
< bp
->fw_tx_stats_ext_size
; i
++, j
++) {
586 buf
[j
] = le64_to_cpu(*(tx_port_stats_ext
+
587 bnxt_tx_port_stats_ext_arr
[i
].offset
));
589 if (bp
->pri2cos_valid
) {
590 for (i
= 0; i
< 8; i
++, j
++) {
591 long n
= bnxt_rx_bytes_pri_arr
[i
].base_off
+
594 buf
[j
] = le64_to_cpu(*(rx_port_stats_ext
+ n
));
596 for (i
= 0; i
< 8; i
++, j
++) {
597 long n
= bnxt_rx_pkts_pri_arr
[i
].base_off
+
600 buf
[j
] = le64_to_cpu(*(rx_port_stats_ext
+ n
));
602 for (i
= 0; i
< 8; i
++, j
++) {
603 long n
= bnxt_tx_bytes_pri_arr
[i
].base_off
+
606 buf
[j
] = le64_to_cpu(*(tx_port_stats_ext
+ n
));
608 for (i
= 0; i
< 8; i
++, j
++) {
609 long n
= bnxt_tx_pkts_pri_arr
[i
].base_off
+
612 buf
[j
] = le64_to_cpu(*(tx_port_stats_ext
+ n
));
616 if (bp
->flags
& BNXT_FLAG_PCIE_STATS
) {
617 __le64
*pcie_stats
= (__le64
*)bp
->hw_pcie_stats
;
619 for (i
= 0; i
< BNXT_NUM_PCIE_STATS
; i
++, j
++) {
620 buf
[j
] = le64_to_cpu(*(pcie_stats
+
621 bnxt_pcie_stats_arr
[i
].offset
));
626 static void bnxt_get_strings(struct net_device
*dev
, u32 stringset
, u8
*buf
)
628 struct bnxt
*bp
= netdev_priv(dev
);
629 static const char * const *str
;
634 for (i
= 0; i
< bp
->cp_nr_rings
; i
++) {
635 num_str
= ARRAY_SIZE(bnxt_ring_stats_str
);
636 for (j
= 0; j
< num_str
; j
++) {
637 sprintf(buf
, "[%d]: %s", i
,
638 bnxt_ring_stats_str
[j
]);
639 buf
+= ETH_GSTRING_LEN
;
641 if (!BNXT_SUPPORTS_TPA(bp
))
644 if (bp
->max_tpa_v2
) {
645 num_str
= ARRAY_SIZE(bnxt_ring_tpa2_stats_str
);
646 str
= bnxt_ring_tpa2_stats_str
;
648 num_str
= ARRAY_SIZE(bnxt_ring_tpa_stats_str
);
649 str
= bnxt_ring_tpa_stats_str
;
651 for (j
= 0; j
< num_str
; j
++) {
652 sprintf(buf
, "[%d]: %s", i
, str
[j
]);
653 buf
+= ETH_GSTRING_LEN
;
656 num_str
= ARRAY_SIZE(bnxt_ring_sw_stats_str
);
657 for (j
= 0; j
< num_str
; j
++) {
658 sprintf(buf
, "[%d]: %s", i
,
659 bnxt_ring_sw_stats_str
[j
]);
660 buf
+= ETH_GSTRING_LEN
;
663 for (i
= 0; i
< BNXT_NUM_SW_FUNC_STATS
; i
++) {
664 strcpy(buf
, bnxt_sw_func_stats
[i
].string
);
665 buf
+= ETH_GSTRING_LEN
;
668 if (bp
->flags
& BNXT_FLAG_PORT_STATS
) {
669 for (i
= 0; i
< BNXT_NUM_PORT_STATS
; i
++) {
670 strcpy(buf
, bnxt_port_stats_arr
[i
].string
);
671 buf
+= ETH_GSTRING_LEN
;
674 if (bp
->flags
& BNXT_FLAG_PORT_STATS_EXT
) {
675 for (i
= 0; i
< bp
->fw_rx_stats_ext_size
; i
++) {
676 strcpy(buf
, bnxt_port_stats_ext_arr
[i
].string
);
677 buf
+= ETH_GSTRING_LEN
;
679 for (i
= 0; i
< bp
->fw_tx_stats_ext_size
; i
++) {
681 bnxt_tx_port_stats_ext_arr
[i
].string
);
682 buf
+= ETH_GSTRING_LEN
;
684 if (bp
->pri2cos_valid
) {
685 for (i
= 0; i
< 8; i
++) {
687 bnxt_rx_bytes_pri_arr
[i
].string
);
688 buf
+= ETH_GSTRING_LEN
;
690 for (i
= 0; i
< 8; i
++) {
692 bnxt_rx_pkts_pri_arr
[i
].string
);
693 buf
+= ETH_GSTRING_LEN
;
695 for (i
= 0; i
< 8; i
++) {
697 bnxt_tx_bytes_pri_arr
[i
].string
);
698 buf
+= ETH_GSTRING_LEN
;
700 for (i
= 0; i
< 8; i
++) {
702 bnxt_tx_pkts_pri_arr
[i
].string
);
703 buf
+= ETH_GSTRING_LEN
;
707 if (bp
->flags
& BNXT_FLAG_PCIE_STATS
) {
708 for (i
= 0; i
< BNXT_NUM_PCIE_STATS
; i
++) {
709 strcpy(buf
, bnxt_pcie_stats_arr
[i
].string
);
710 buf
+= ETH_GSTRING_LEN
;
716 memcpy(buf
, bp
->test_info
->string
,
717 bp
->num_tests
* ETH_GSTRING_LEN
);
720 netdev_err(bp
->dev
, "bnxt_get_strings invalid request %x\n",
726 static void bnxt_get_ringparam(struct net_device
*dev
,
727 struct ethtool_ringparam
*ering
)
729 struct bnxt
*bp
= netdev_priv(dev
);
731 ering
->rx_max_pending
= BNXT_MAX_RX_DESC_CNT
;
732 ering
->rx_jumbo_max_pending
= BNXT_MAX_RX_JUM_DESC_CNT
;
733 ering
->tx_max_pending
= BNXT_MAX_TX_DESC_CNT
;
735 ering
->rx_pending
= bp
->rx_ring_size
;
736 ering
->rx_jumbo_pending
= bp
->rx_agg_ring_size
;
737 ering
->tx_pending
= bp
->tx_ring_size
;
740 static int bnxt_set_ringparam(struct net_device
*dev
,
741 struct ethtool_ringparam
*ering
)
743 struct bnxt
*bp
= netdev_priv(dev
);
745 if ((ering
->rx_pending
> BNXT_MAX_RX_DESC_CNT
) ||
746 (ering
->tx_pending
> BNXT_MAX_TX_DESC_CNT
) ||
747 (ering
->tx_pending
< BNXT_MIN_TX_DESC_CNT
))
750 if (netif_running(dev
))
751 bnxt_close_nic(bp
, false, false);
753 bp
->rx_ring_size
= ering
->rx_pending
;
754 bp
->tx_ring_size
= ering
->tx_pending
;
755 bnxt_set_ring_params(bp
);
757 if (netif_running(dev
))
758 return bnxt_open_nic(bp
, false, false);
763 static void bnxt_get_channels(struct net_device
*dev
,
764 struct ethtool_channels
*channel
)
766 struct bnxt
*bp
= netdev_priv(dev
);
767 struct bnxt_hw_resc
*hw_resc
= &bp
->hw_resc
;
768 int max_rx_rings
, max_tx_rings
, tcs
;
769 int max_tx_sch_inputs
;
771 /* Get the most up-to-date max_tx_sch_inputs. */
772 if (netif_running(dev
) && BNXT_NEW_RM(bp
))
773 bnxt_hwrm_func_resc_qcaps(bp
, false);
774 max_tx_sch_inputs
= hw_resc
->max_tx_sch_inputs
;
776 bnxt_get_max_rings(bp
, &max_rx_rings
, &max_tx_rings
, true);
777 if (max_tx_sch_inputs
)
778 max_tx_rings
= min_t(int, max_tx_rings
, max_tx_sch_inputs
);
779 channel
->max_combined
= min_t(int, max_rx_rings
, max_tx_rings
);
781 if (bnxt_get_max_rings(bp
, &max_rx_rings
, &max_tx_rings
, false)) {
785 if (max_tx_sch_inputs
)
786 max_tx_rings
= min_t(int, max_tx_rings
, max_tx_sch_inputs
);
788 tcs
= netdev_get_num_tc(dev
);
792 channel
->max_rx
= max_rx_rings
;
793 channel
->max_tx
= max_tx_rings
;
794 channel
->max_other
= 0;
795 if (bp
->flags
& BNXT_FLAG_SHARED_RINGS
) {
796 channel
->combined_count
= bp
->rx_nr_rings
;
797 if (BNXT_CHIP_TYPE_NITRO_A0(bp
))
798 channel
->combined_count
--;
800 if (!BNXT_CHIP_TYPE_NITRO_A0(bp
)) {
801 channel
->rx_count
= bp
->rx_nr_rings
;
802 channel
->tx_count
= bp
->tx_nr_rings_per_tc
;
807 static int bnxt_set_channels(struct net_device
*dev
,
808 struct ethtool_channels
*channel
)
810 struct bnxt
*bp
= netdev_priv(dev
);
811 int req_tx_rings
, req_rx_rings
, tcs
;
816 if (channel
->other_count
)
819 if (!channel
->combined_count
&&
820 (!channel
->rx_count
|| !channel
->tx_count
))
823 if (channel
->combined_count
&&
824 (channel
->rx_count
|| channel
->tx_count
))
827 if (BNXT_CHIP_TYPE_NITRO_A0(bp
) && (channel
->rx_count
||
831 if (channel
->combined_count
)
834 tcs
= netdev_get_num_tc(dev
);
836 req_tx_rings
= sh
? channel
->combined_count
: channel
->tx_count
;
837 req_rx_rings
= sh
? channel
->combined_count
: channel
->rx_count
;
838 if (bp
->tx_nr_rings_xdp
) {
840 netdev_err(dev
, "Only combined mode supported when XDP is enabled.\n");
843 tx_xdp
= req_rx_rings
;
845 rc
= bnxt_check_rings(bp
, req_tx_rings
, req_rx_rings
, sh
, tcs
, tx_xdp
);
847 netdev_warn(dev
, "Unable to allocate the requested rings\n");
851 if (netif_running(dev
)) {
853 /* TODO CHIMP_FW: Send message to all VF's
857 rc
= bnxt_close_nic(bp
, true, false);
859 netdev_err(bp
->dev
, "Set channel failure rc :%x\n",
866 bp
->flags
|= BNXT_FLAG_SHARED_RINGS
;
867 bp
->rx_nr_rings
= channel
->combined_count
;
868 bp
->tx_nr_rings_per_tc
= channel
->combined_count
;
870 bp
->flags
&= ~BNXT_FLAG_SHARED_RINGS
;
871 bp
->rx_nr_rings
= channel
->rx_count
;
872 bp
->tx_nr_rings_per_tc
= channel
->tx_count
;
874 bp
->tx_nr_rings_xdp
= tx_xdp
;
875 bp
->tx_nr_rings
= bp
->tx_nr_rings_per_tc
+ tx_xdp
;
877 bp
->tx_nr_rings
= bp
->tx_nr_rings_per_tc
* tcs
+ tx_xdp
;
879 bp
->cp_nr_rings
= sh
? max_t(int, bp
->tx_nr_rings
, bp
->rx_nr_rings
) :
880 bp
->tx_nr_rings
+ bp
->rx_nr_rings
;
882 /* After changing number of rx channels, update NTUPLE feature. */
883 netdev_update_features(dev
);
884 if (netif_running(dev
)) {
885 rc
= bnxt_open_nic(bp
, true, false);
886 if ((!rc
) && BNXT_PF(bp
)) {
887 /* TODO CHIMP_FW: Send message to all VF's
892 rc
= bnxt_reserve_rings(bp
, true);
898 #ifdef CONFIG_RFS_ACCEL
899 static int bnxt_grxclsrlall(struct bnxt
*bp
, struct ethtool_rxnfc
*cmd
,
904 cmd
->data
= bp
->ntp_fltr_count
;
905 for (i
= 0; i
< BNXT_NTP_FLTR_HASH_SIZE
; i
++) {
906 struct hlist_head
*head
;
907 struct bnxt_ntuple_filter
*fltr
;
909 head
= &bp
->ntp_fltr_hash_tbl
[i
];
911 hlist_for_each_entry_rcu(fltr
, head
, hash
) {
912 if (j
== cmd
->rule_cnt
)
914 rule_locs
[j
++] = fltr
->sw_id
;
917 if (j
== cmd
->rule_cnt
)
924 static int bnxt_grxclsrule(struct bnxt
*bp
, struct ethtool_rxnfc
*cmd
)
926 struct ethtool_rx_flow_spec
*fs
=
927 (struct ethtool_rx_flow_spec
*)&cmd
->fs
;
928 struct bnxt_ntuple_filter
*fltr
;
929 struct flow_keys
*fkeys
;
932 if (fs
->location
>= BNXT_NTP_FLTR_MAX_FLTR
)
935 for (i
= 0; i
< BNXT_NTP_FLTR_HASH_SIZE
; i
++) {
936 struct hlist_head
*head
;
938 head
= &bp
->ntp_fltr_hash_tbl
[i
];
940 hlist_for_each_entry_rcu(fltr
, head
, hash
) {
941 if (fltr
->sw_id
== fs
->location
)
949 fkeys
= &fltr
->fkeys
;
950 if (fkeys
->basic
.n_proto
== htons(ETH_P_IP
)) {
951 if (fkeys
->basic
.ip_proto
== IPPROTO_TCP
)
952 fs
->flow_type
= TCP_V4_FLOW
;
953 else if (fkeys
->basic
.ip_proto
== IPPROTO_UDP
)
954 fs
->flow_type
= UDP_V4_FLOW
;
958 fs
->h_u
.tcp_ip4_spec
.ip4src
= fkeys
->addrs
.v4addrs
.src
;
959 fs
->m_u
.tcp_ip4_spec
.ip4src
= cpu_to_be32(~0);
961 fs
->h_u
.tcp_ip4_spec
.ip4dst
= fkeys
->addrs
.v4addrs
.dst
;
962 fs
->m_u
.tcp_ip4_spec
.ip4dst
= cpu_to_be32(~0);
964 fs
->h_u
.tcp_ip4_spec
.psrc
= fkeys
->ports
.src
;
965 fs
->m_u
.tcp_ip4_spec
.psrc
= cpu_to_be16(~0);
967 fs
->h_u
.tcp_ip4_spec
.pdst
= fkeys
->ports
.dst
;
968 fs
->m_u
.tcp_ip4_spec
.pdst
= cpu_to_be16(~0);
972 if (fkeys
->basic
.ip_proto
== IPPROTO_TCP
)
973 fs
->flow_type
= TCP_V6_FLOW
;
974 else if (fkeys
->basic
.ip_proto
== IPPROTO_UDP
)
975 fs
->flow_type
= UDP_V6_FLOW
;
979 *(struct in6_addr
*)&fs
->h_u
.tcp_ip6_spec
.ip6src
[0] =
980 fkeys
->addrs
.v6addrs
.src
;
981 *(struct in6_addr
*)&fs
->h_u
.tcp_ip6_spec
.ip6dst
[0] =
982 fkeys
->addrs
.v6addrs
.dst
;
983 for (i
= 0; i
< 4; i
++) {
984 fs
->m_u
.tcp_ip6_spec
.ip6src
[i
] = cpu_to_be32(~0);
985 fs
->m_u
.tcp_ip6_spec
.ip6dst
[i
] = cpu_to_be32(~0);
987 fs
->h_u
.tcp_ip6_spec
.psrc
= fkeys
->ports
.src
;
988 fs
->m_u
.tcp_ip6_spec
.psrc
= cpu_to_be16(~0);
990 fs
->h_u
.tcp_ip6_spec
.pdst
= fkeys
->ports
.dst
;
991 fs
->m_u
.tcp_ip6_spec
.pdst
= cpu_to_be16(~0);
994 fs
->ring_cookie
= fltr
->rxq
;
1004 static u64
get_ethtool_ipv4_rss(struct bnxt
*bp
)
1006 if (bp
->rss_hash_cfg
& VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4
)
1007 return RXH_IP_SRC
| RXH_IP_DST
;
1011 static u64
get_ethtool_ipv6_rss(struct bnxt
*bp
)
1013 if (bp
->rss_hash_cfg
& VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6
)
1014 return RXH_IP_SRC
| RXH_IP_DST
;
1018 static int bnxt_grxfh(struct bnxt
*bp
, struct ethtool_rxnfc
*cmd
)
1021 switch (cmd
->flow_type
) {
1023 if (bp
->rss_hash_cfg
& VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4
)
1024 cmd
->data
|= RXH_IP_SRC
| RXH_IP_DST
|
1025 RXH_L4_B_0_1
| RXH_L4_B_2_3
;
1026 cmd
->data
|= get_ethtool_ipv4_rss(bp
);
1029 if (bp
->rss_hash_cfg
& VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4
)
1030 cmd
->data
|= RXH_IP_SRC
| RXH_IP_DST
|
1031 RXH_L4_B_0_1
| RXH_L4_B_2_3
;
1034 case AH_ESP_V4_FLOW
:
1038 cmd
->data
|= get_ethtool_ipv4_rss(bp
);
1042 if (bp
->rss_hash_cfg
& VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6
)
1043 cmd
->data
|= RXH_IP_SRC
| RXH_IP_DST
|
1044 RXH_L4_B_0_1
| RXH_L4_B_2_3
;
1045 cmd
->data
|= get_ethtool_ipv6_rss(bp
);
1048 if (bp
->rss_hash_cfg
& VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6
)
1049 cmd
->data
|= RXH_IP_SRC
| RXH_IP_DST
|
1050 RXH_L4_B_0_1
| RXH_L4_B_2_3
;
1053 case AH_ESP_V6_FLOW
:
1057 cmd
->data
|= get_ethtool_ipv6_rss(bp
);
1063 #define RXH_4TUPLE (RXH_IP_SRC | RXH_IP_DST | RXH_L4_B_0_1 | RXH_L4_B_2_3)
1064 #define RXH_2TUPLE (RXH_IP_SRC | RXH_IP_DST)
1066 static int bnxt_srxfh(struct bnxt
*bp
, struct ethtool_rxnfc
*cmd
)
1068 u32 rss_hash_cfg
= bp
->rss_hash_cfg
;
1071 if (cmd
->data
== RXH_4TUPLE
)
1073 else if (cmd
->data
== RXH_2TUPLE
)
1075 else if (!cmd
->data
)
1080 if (cmd
->flow_type
== TCP_V4_FLOW
) {
1081 rss_hash_cfg
&= ~VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4
;
1083 rss_hash_cfg
|= VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4
;
1084 } else if (cmd
->flow_type
== UDP_V4_FLOW
) {
1085 if (tuple
== 4 && !(bp
->flags
& BNXT_FLAG_UDP_RSS_CAP
))
1087 rss_hash_cfg
&= ~VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4
;
1089 rss_hash_cfg
|= VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4
;
1090 } else if (cmd
->flow_type
== TCP_V6_FLOW
) {
1091 rss_hash_cfg
&= ~VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6
;
1093 rss_hash_cfg
|= VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6
;
1094 } else if (cmd
->flow_type
== UDP_V6_FLOW
) {
1095 if (tuple
== 4 && !(bp
->flags
& BNXT_FLAG_UDP_RSS_CAP
))
1097 rss_hash_cfg
&= ~VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6
;
1099 rss_hash_cfg
|= VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6
;
1100 } else if (tuple
== 4) {
1104 switch (cmd
->flow_type
) {
1108 case AH_ESP_V4_FLOW
:
1113 rss_hash_cfg
|= VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4
;
1115 rss_hash_cfg
&= ~VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4
;
1121 case AH_ESP_V6_FLOW
:
1126 rss_hash_cfg
|= VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6
;
1128 rss_hash_cfg
&= ~VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6
;
1132 if (bp
->rss_hash_cfg
== rss_hash_cfg
)
1135 bp
->rss_hash_cfg
= rss_hash_cfg
;
1136 if (netif_running(bp
->dev
)) {
1137 bnxt_close_nic(bp
, false, false);
1138 rc
= bnxt_open_nic(bp
, false, false);
1143 static int bnxt_get_rxnfc(struct net_device
*dev
, struct ethtool_rxnfc
*cmd
,
1146 struct bnxt
*bp
= netdev_priv(dev
);
1150 #ifdef CONFIG_RFS_ACCEL
1151 case ETHTOOL_GRXRINGS
:
1152 cmd
->data
= bp
->rx_nr_rings
;
1155 case ETHTOOL_GRXCLSRLCNT
:
1156 cmd
->rule_cnt
= bp
->ntp_fltr_count
;
1157 cmd
->data
= BNXT_NTP_FLTR_MAX_FLTR
;
1160 case ETHTOOL_GRXCLSRLALL
:
1161 rc
= bnxt_grxclsrlall(bp
, cmd
, (u32
*)rule_locs
);
1164 case ETHTOOL_GRXCLSRULE
:
1165 rc
= bnxt_grxclsrule(bp
, cmd
);
1170 rc
= bnxt_grxfh(bp
, cmd
);
1181 static int bnxt_set_rxnfc(struct net_device
*dev
, struct ethtool_rxnfc
*cmd
)
1183 struct bnxt
*bp
= netdev_priv(dev
);
1188 rc
= bnxt_srxfh(bp
, cmd
);
1198 static u32
bnxt_get_rxfh_indir_size(struct net_device
*dev
)
1200 return HW_HASH_INDEX_SIZE
;
1203 static u32
bnxt_get_rxfh_key_size(struct net_device
*dev
)
1205 return HW_HASH_KEY_SIZE
;
1208 static int bnxt_get_rxfh(struct net_device
*dev
, u32
*indir
, u8
*key
,
1211 struct bnxt
*bp
= netdev_priv(dev
);
1212 struct bnxt_vnic_info
*vnic
;
1216 *hfunc
= ETH_RSS_HASH_TOP
;
1221 vnic
= &bp
->vnic_info
[0];
1222 if (indir
&& vnic
->rss_table
) {
1223 for (i
= 0; i
< HW_HASH_INDEX_SIZE
; i
++)
1224 indir
[i
] = le16_to_cpu(vnic
->rss_table
[i
]);
1227 if (key
&& vnic
->rss_hash_key
)
1228 memcpy(key
, vnic
->rss_hash_key
, HW_HASH_KEY_SIZE
);
1233 static void bnxt_get_drvinfo(struct net_device
*dev
,
1234 struct ethtool_drvinfo
*info
)
1236 struct bnxt
*bp
= netdev_priv(dev
);
1238 strlcpy(info
->driver
, DRV_MODULE_NAME
, sizeof(info
->driver
));
1239 strlcpy(info
->version
, DRV_MODULE_VERSION
, sizeof(info
->version
));
1240 strlcpy(info
->fw_version
, bp
->fw_ver_str
, sizeof(info
->fw_version
));
1241 strlcpy(info
->bus_info
, pci_name(bp
->pdev
), sizeof(info
->bus_info
));
1242 info
->n_stats
= bnxt_get_num_stats(bp
);
1243 info
->testinfo_len
= bp
->num_tests
;
1244 /* TODO CHIMP_FW: eeprom dump details */
1245 info
->eedump_len
= 0;
1246 /* TODO CHIMP FW: reg dump details */
1247 info
->regdump_len
= 0;
1250 static void bnxt_get_wol(struct net_device
*dev
, struct ethtool_wolinfo
*wol
)
1252 struct bnxt
*bp
= netdev_priv(dev
);
1256 memset(&wol
->sopass
, 0, sizeof(wol
->sopass
));
1257 if (bp
->flags
& BNXT_FLAG_WOL_CAP
) {
1258 wol
->supported
= WAKE_MAGIC
;
1260 wol
->wolopts
= WAKE_MAGIC
;
1264 static int bnxt_set_wol(struct net_device
*dev
, struct ethtool_wolinfo
*wol
)
1266 struct bnxt
*bp
= netdev_priv(dev
);
1268 if (wol
->wolopts
& ~WAKE_MAGIC
)
1271 if (wol
->wolopts
& WAKE_MAGIC
) {
1272 if (!(bp
->flags
& BNXT_FLAG_WOL_CAP
))
1275 if (bnxt_hwrm_alloc_wol_fltr(bp
))
1281 if (bnxt_hwrm_free_wol_fltr(bp
))
1289 u32
_bnxt_fw_to_ethtool_adv_spds(u16 fw_speeds
, u8 fw_pause
)
1293 /* TODO: support 25GB, 40GB, 50GB with different cable type */
1294 /* set the advertised speeds */
1295 if (fw_speeds
& BNXT_LINK_SPEED_MSK_100MB
)
1296 speed_mask
|= ADVERTISED_100baseT_Full
;
1297 if (fw_speeds
& BNXT_LINK_SPEED_MSK_1GB
)
1298 speed_mask
|= ADVERTISED_1000baseT_Full
;
1299 if (fw_speeds
& BNXT_LINK_SPEED_MSK_2_5GB
)
1300 speed_mask
|= ADVERTISED_2500baseX_Full
;
1301 if (fw_speeds
& BNXT_LINK_SPEED_MSK_10GB
)
1302 speed_mask
|= ADVERTISED_10000baseT_Full
;
1303 if (fw_speeds
& BNXT_LINK_SPEED_MSK_40GB
)
1304 speed_mask
|= ADVERTISED_40000baseCR4_Full
;
1306 if ((fw_pause
& BNXT_LINK_PAUSE_BOTH
) == BNXT_LINK_PAUSE_BOTH
)
1307 speed_mask
|= ADVERTISED_Pause
;
1308 else if (fw_pause
& BNXT_LINK_PAUSE_TX
)
1309 speed_mask
|= ADVERTISED_Asym_Pause
;
1310 else if (fw_pause
& BNXT_LINK_PAUSE_RX
)
1311 speed_mask
|= ADVERTISED_Pause
| ADVERTISED_Asym_Pause
;
1316 #define BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings, name)\
1318 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_100MB) \
1319 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
1321 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_1GB) \
1322 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
1324 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_10GB) \
1325 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
1327 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_25GB) \
1328 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
1329 25000baseCR_Full); \
1330 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_40GB) \
1331 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
1332 40000baseCR4_Full);\
1333 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_50GB) \
1334 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
1335 50000baseCR2_Full);\
1336 if ((fw_speeds) & BNXT_LINK_SPEED_MSK_100GB) \
1337 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
1338 100000baseCR4_Full);\
1339 if ((fw_pause) & BNXT_LINK_PAUSE_RX) { \
1340 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
1342 if (!((fw_pause) & BNXT_LINK_PAUSE_TX)) \
1343 ethtool_link_ksettings_add_link_mode( \
1344 lk_ksettings, name, Asym_Pause);\
1345 } else if ((fw_pause) & BNXT_LINK_PAUSE_TX) { \
1346 ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
1351 #define BNXT_ETHTOOL_TO_FW_SPDS(fw_speeds, lk_ksettings, name) \
1353 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
1355 ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
1357 (fw_speeds) |= BNXT_LINK_SPEED_MSK_100MB; \
1358 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
1359 1000baseT_Full) || \
1360 ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
1362 (fw_speeds) |= BNXT_LINK_SPEED_MSK_1GB; \
1363 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
1365 (fw_speeds) |= BNXT_LINK_SPEED_MSK_10GB; \
1366 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
1367 25000baseCR_Full)) \
1368 (fw_speeds) |= BNXT_LINK_SPEED_MSK_25GB; \
1369 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
1370 40000baseCR4_Full)) \
1371 (fw_speeds) |= BNXT_LINK_SPEED_MSK_40GB; \
1372 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
1373 50000baseCR2_Full)) \
1374 (fw_speeds) |= BNXT_LINK_SPEED_MSK_50GB; \
1375 if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
1376 100000baseCR4_Full)) \
1377 (fw_speeds) |= BNXT_LINK_SPEED_MSK_100GB; \
1380 static void bnxt_fw_to_ethtool_advertised_spds(struct bnxt_link_info
*link_info
,
1381 struct ethtool_link_ksettings
*lk_ksettings
)
1383 u16 fw_speeds
= link_info
->advertising
;
1386 if (link_info
->autoneg
& BNXT_AUTONEG_FLOW_CTRL
)
1387 fw_pause
= link_info
->auto_pause_setting
;
1389 BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds
, fw_pause
, lk_ksettings
, advertising
);
1392 static void bnxt_fw_to_ethtool_lp_adv(struct bnxt_link_info
*link_info
,
1393 struct ethtool_link_ksettings
*lk_ksettings
)
1395 u16 fw_speeds
= link_info
->lp_auto_link_speeds
;
1398 if (link_info
->autoneg
& BNXT_AUTONEG_FLOW_CTRL
)
1399 fw_pause
= link_info
->lp_pause
;
1401 BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds
, fw_pause
, lk_ksettings
,
1405 static void bnxt_fw_to_ethtool_support_spds(struct bnxt_link_info
*link_info
,
1406 struct ethtool_link_ksettings
*lk_ksettings
)
1408 u16 fw_speeds
= link_info
->support_speeds
;
1410 BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds
, 0, lk_ksettings
, supported
);
1412 ethtool_link_ksettings_add_link_mode(lk_ksettings
, supported
, Pause
);
1413 ethtool_link_ksettings_add_link_mode(lk_ksettings
, supported
,
1416 if (link_info
->support_auto_speeds
)
1417 ethtool_link_ksettings_add_link_mode(lk_ksettings
, supported
,
1421 u32
bnxt_fw_to_ethtool_speed(u16 fw_link_speed
)
1423 switch (fw_link_speed
) {
1424 case BNXT_LINK_SPEED_100MB
:
1426 case BNXT_LINK_SPEED_1GB
:
1428 case BNXT_LINK_SPEED_2_5GB
:
1430 case BNXT_LINK_SPEED_10GB
:
1432 case BNXT_LINK_SPEED_20GB
:
1434 case BNXT_LINK_SPEED_25GB
:
1436 case BNXT_LINK_SPEED_40GB
:
1438 case BNXT_LINK_SPEED_50GB
:
1440 case BNXT_LINK_SPEED_100GB
:
1441 return SPEED_100000
;
1443 return SPEED_UNKNOWN
;
1447 static int bnxt_get_link_ksettings(struct net_device
*dev
,
1448 struct ethtool_link_ksettings
*lk_ksettings
)
1450 struct bnxt
*bp
= netdev_priv(dev
);
1451 struct bnxt_link_info
*link_info
= &bp
->link_info
;
1452 struct ethtool_link_settings
*base
= &lk_ksettings
->base
;
1455 ethtool_link_ksettings_zero_link_mode(lk_ksettings
, supported
);
1456 mutex_lock(&bp
->link_lock
);
1457 bnxt_fw_to_ethtool_support_spds(link_info
, lk_ksettings
);
1459 ethtool_link_ksettings_zero_link_mode(lk_ksettings
, advertising
);
1460 if (link_info
->autoneg
) {
1461 bnxt_fw_to_ethtool_advertised_spds(link_info
, lk_ksettings
);
1462 ethtool_link_ksettings_add_link_mode(lk_ksettings
,
1463 advertising
, Autoneg
);
1464 base
->autoneg
= AUTONEG_ENABLE
;
1465 if (link_info
->phy_link_status
== BNXT_LINK_LINK
)
1466 bnxt_fw_to_ethtool_lp_adv(link_info
, lk_ksettings
);
1467 ethtool_speed
= bnxt_fw_to_ethtool_speed(link_info
->link_speed
);
1468 if (!netif_carrier_ok(dev
))
1469 base
->duplex
= DUPLEX_UNKNOWN
;
1470 else if (link_info
->duplex
& BNXT_LINK_DUPLEX_FULL
)
1471 base
->duplex
= DUPLEX_FULL
;
1473 base
->duplex
= DUPLEX_HALF
;
1475 base
->autoneg
= AUTONEG_DISABLE
;
1477 bnxt_fw_to_ethtool_speed(link_info
->req_link_speed
);
1478 base
->duplex
= DUPLEX_HALF
;
1479 if (link_info
->req_duplex
== BNXT_LINK_DUPLEX_FULL
)
1480 base
->duplex
= DUPLEX_FULL
;
1482 base
->speed
= ethtool_speed
;
1484 base
->port
= PORT_NONE
;
1485 if (link_info
->media_type
== PORT_PHY_QCFG_RESP_MEDIA_TYPE_TP
) {
1486 base
->port
= PORT_TP
;
1487 ethtool_link_ksettings_add_link_mode(lk_ksettings
, supported
,
1489 ethtool_link_ksettings_add_link_mode(lk_ksettings
, advertising
,
1492 ethtool_link_ksettings_add_link_mode(lk_ksettings
, supported
,
1494 ethtool_link_ksettings_add_link_mode(lk_ksettings
, advertising
,
1497 if (link_info
->media_type
== PORT_PHY_QCFG_RESP_MEDIA_TYPE_DAC
)
1498 base
->port
= PORT_DA
;
1499 else if (link_info
->media_type
==
1500 PORT_PHY_QCFG_RESP_MEDIA_TYPE_FIBRE
)
1501 base
->port
= PORT_FIBRE
;
1503 base
->phy_address
= link_info
->phy_addr
;
1504 mutex_unlock(&bp
->link_lock
);
1509 static u32
bnxt_get_fw_speed(struct net_device
*dev
, u32 ethtool_speed
)
1511 struct bnxt
*bp
= netdev_priv(dev
);
1512 struct bnxt_link_info
*link_info
= &bp
->link_info
;
1513 u16 support_spds
= link_info
->support_speeds
;
1516 switch (ethtool_speed
) {
1518 if (support_spds
& BNXT_LINK_SPEED_MSK_100MB
)
1519 fw_speed
= PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_100MB
;
1522 if (support_spds
& BNXT_LINK_SPEED_MSK_1GB
)
1523 fw_speed
= PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_1GB
;
1526 if (support_spds
& BNXT_LINK_SPEED_MSK_2_5GB
)
1527 fw_speed
= PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_2_5GB
;
1530 if (support_spds
& BNXT_LINK_SPEED_MSK_10GB
)
1531 fw_speed
= PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_10GB
;
1534 if (support_spds
& BNXT_LINK_SPEED_MSK_20GB
)
1535 fw_speed
= PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_20GB
;
1538 if (support_spds
& BNXT_LINK_SPEED_MSK_25GB
)
1539 fw_speed
= PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_25GB
;
1542 if (support_spds
& BNXT_LINK_SPEED_MSK_40GB
)
1543 fw_speed
= PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_40GB
;
1546 if (support_spds
& BNXT_LINK_SPEED_MSK_50GB
)
1547 fw_speed
= PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_50GB
;
1550 if (support_spds
& BNXT_LINK_SPEED_MSK_100GB
)
1551 fw_speed
= PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_100GB
;
1554 netdev_err(dev
, "unsupported speed!\n");
1560 u16
bnxt_get_fw_auto_link_speeds(u32 advertising
)
1562 u16 fw_speed_mask
= 0;
1564 /* only support autoneg at speed 100, 1000, and 10000 */
1565 if (advertising
& (ADVERTISED_100baseT_Full
|
1566 ADVERTISED_100baseT_Half
)) {
1567 fw_speed_mask
|= BNXT_LINK_SPEED_MSK_100MB
;
1569 if (advertising
& (ADVERTISED_1000baseT_Full
|
1570 ADVERTISED_1000baseT_Half
)) {
1571 fw_speed_mask
|= BNXT_LINK_SPEED_MSK_1GB
;
1573 if (advertising
& ADVERTISED_10000baseT_Full
)
1574 fw_speed_mask
|= BNXT_LINK_SPEED_MSK_10GB
;
1576 if (advertising
& ADVERTISED_40000baseCR4_Full
)
1577 fw_speed_mask
|= BNXT_LINK_SPEED_MSK_40GB
;
1579 return fw_speed_mask
;
1582 static int bnxt_set_link_ksettings(struct net_device
*dev
,
1583 const struct ethtool_link_ksettings
*lk_ksettings
)
1585 struct bnxt
*bp
= netdev_priv(dev
);
1586 struct bnxt_link_info
*link_info
= &bp
->link_info
;
1587 const struct ethtool_link_settings
*base
= &lk_ksettings
->base
;
1588 bool set_pause
= false;
1589 u16 fw_advertising
= 0;
1593 if (!BNXT_SINGLE_PF(bp
))
1596 mutex_lock(&bp
->link_lock
);
1597 if (base
->autoneg
== AUTONEG_ENABLE
) {
1598 BNXT_ETHTOOL_TO_FW_SPDS(fw_advertising
, lk_ksettings
,
1600 link_info
->autoneg
|= BNXT_AUTONEG_SPEED
;
1601 if (!fw_advertising
)
1602 link_info
->advertising
= link_info
->support_auto_speeds
;
1604 link_info
->advertising
= fw_advertising
;
1605 /* any change to autoneg will cause link change, therefore the
1606 * driver should put back the original pause setting in autoneg
1611 u8 phy_type
= link_info
->phy_type
;
1613 if (phy_type
== PORT_PHY_QCFG_RESP_PHY_TYPE_BASET
||
1614 phy_type
== PORT_PHY_QCFG_RESP_PHY_TYPE_BASETE
||
1615 link_info
->media_type
== PORT_PHY_QCFG_RESP_MEDIA_TYPE_TP
) {
1616 netdev_err(dev
, "10GBase-T devices must autoneg\n");
1618 goto set_setting_exit
;
1620 if (base
->duplex
== DUPLEX_HALF
) {
1621 netdev_err(dev
, "HALF DUPLEX is not supported!\n");
1623 goto set_setting_exit
;
1625 speed
= base
->speed
;
1626 fw_speed
= bnxt_get_fw_speed(dev
, speed
);
1629 goto set_setting_exit
;
1631 link_info
->req_link_speed
= fw_speed
;
1632 link_info
->req_duplex
= BNXT_LINK_DUPLEX_FULL
;
1633 link_info
->autoneg
= 0;
1634 link_info
->advertising
= 0;
1637 if (netif_running(dev
))
1638 rc
= bnxt_hwrm_set_link_setting(bp
, set_pause
, false);
1641 mutex_unlock(&bp
->link_lock
);
1645 static void bnxt_get_pauseparam(struct net_device
*dev
,
1646 struct ethtool_pauseparam
*epause
)
1648 struct bnxt
*bp
= netdev_priv(dev
);
1649 struct bnxt_link_info
*link_info
= &bp
->link_info
;
1653 epause
->autoneg
= !!(link_info
->autoneg
& BNXT_AUTONEG_FLOW_CTRL
);
1654 epause
->rx_pause
= !!(link_info
->req_flow_ctrl
& BNXT_LINK_PAUSE_RX
);
1655 epause
->tx_pause
= !!(link_info
->req_flow_ctrl
& BNXT_LINK_PAUSE_TX
);
1658 static int bnxt_set_pauseparam(struct net_device
*dev
,
1659 struct ethtool_pauseparam
*epause
)
1662 struct bnxt
*bp
= netdev_priv(dev
);
1663 struct bnxt_link_info
*link_info
= &bp
->link_info
;
1665 if (!BNXT_SINGLE_PF(bp
))
1668 mutex_lock(&bp
->link_lock
);
1669 if (epause
->autoneg
) {
1670 if (!(link_info
->autoneg
& BNXT_AUTONEG_SPEED
)) {
1675 link_info
->autoneg
|= BNXT_AUTONEG_FLOW_CTRL
;
1676 link_info
->req_flow_ctrl
= 0;
1678 /* when transition from auto pause to force pause,
1679 * force a link change
1681 if (link_info
->autoneg
& BNXT_AUTONEG_FLOW_CTRL
)
1682 link_info
->force_link_chng
= true;
1683 link_info
->autoneg
&= ~BNXT_AUTONEG_FLOW_CTRL
;
1684 link_info
->req_flow_ctrl
= 0;
1686 if (epause
->rx_pause
)
1687 link_info
->req_flow_ctrl
|= BNXT_LINK_PAUSE_RX
;
1689 if (epause
->tx_pause
)
1690 link_info
->req_flow_ctrl
|= BNXT_LINK_PAUSE_TX
;
1692 if (netif_running(dev
))
1693 rc
= bnxt_hwrm_set_pause(bp
);
1696 mutex_unlock(&bp
->link_lock
);
1700 static u32
bnxt_get_link(struct net_device
*dev
)
1702 struct bnxt
*bp
= netdev_priv(dev
);
1704 /* TODO: handle MF, VF, driver close case */
1705 return bp
->link_info
.link_up
;
1708 static void bnxt_print_admin_err(struct bnxt
*bp
)
1710 netdev_info(bp
->dev
, "PF does not have admin privileges to flash or reset the device\n");
1713 static int bnxt_find_nvram_item(struct net_device
*dev
, u16 type
, u16 ordinal
,
1714 u16 ext
, u16
*index
, u32
*item_length
,
1717 static int bnxt_flash_nvram(struct net_device
*dev
,
1725 struct bnxt
*bp
= netdev_priv(dev
);
1727 struct hwrm_nvm_write_input req
= {0};
1728 dma_addr_t dma_handle
;
1731 bnxt_hwrm_cmd_hdr_init(bp
, &req
, HWRM_NVM_WRITE
, -1, -1);
1733 req
.dir_type
= cpu_to_le16(dir_type
);
1734 req
.dir_ordinal
= cpu_to_le16(dir_ordinal
);
1735 req
.dir_ext
= cpu_to_le16(dir_ext
);
1736 req
.dir_attr
= cpu_to_le16(dir_attr
);
1737 req
.dir_data_length
= cpu_to_le32(data_len
);
1739 kmem
= dma_alloc_coherent(&bp
->pdev
->dev
, data_len
, &dma_handle
,
1742 netdev_err(dev
, "dma_alloc_coherent failure, length = %u\n",
1743 (unsigned)data_len
);
1746 memcpy(kmem
, data
, data_len
);
1747 req
.host_src_addr
= cpu_to_le64(dma_handle
);
1749 rc
= hwrm_send_message(bp
, &req
, sizeof(req
), FLASH_NVRAM_TIMEOUT
);
1750 dma_free_coherent(&bp
->pdev
->dev
, data_len
, kmem
, dma_handle
);
1753 bnxt_print_admin_err(bp
);
1757 static int bnxt_firmware_reset(struct net_device
*dev
,
1760 struct hwrm_fw_reset_input req
= {0};
1761 struct bnxt
*bp
= netdev_priv(dev
);
1764 bnxt_hwrm_cmd_hdr_init(bp
, &req
, HWRM_FW_RESET
, -1, -1);
1766 /* TODO: Address self-reset of APE/KONG/BONO/TANG or ungraceful reset */
1767 /* (e.g. when firmware isn't already running) */
1769 case BNX_DIR_TYPE_CHIMP_PATCH
:
1770 case BNX_DIR_TYPE_BOOTCODE
:
1771 case BNX_DIR_TYPE_BOOTCODE_2
:
1772 req
.embedded_proc_type
= FW_RESET_REQ_EMBEDDED_PROC_TYPE_BOOT
;
1773 /* Self-reset ChiMP upon next PCIe reset: */
1774 req
.selfrst_status
= FW_RESET_REQ_SELFRST_STATUS_SELFRSTPCIERST
;
1776 case BNX_DIR_TYPE_APE_FW
:
1777 case BNX_DIR_TYPE_APE_PATCH
:
1778 req
.embedded_proc_type
= FW_RESET_REQ_EMBEDDED_PROC_TYPE_MGMT
;
1779 /* Self-reset APE upon next PCIe reset: */
1780 req
.selfrst_status
= FW_RESET_REQ_SELFRST_STATUS_SELFRSTPCIERST
;
1782 case BNX_DIR_TYPE_KONG_FW
:
1783 case BNX_DIR_TYPE_KONG_PATCH
:
1784 req
.embedded_proc_type
=
1785 FW_RESET_REQ_EMBEDDED_PROC_TYPE_NETCTRL
;
1787 case BNX_DIR_TYPE_BONO_FW
:
1788 case BNX_DIR_TYPE_BONO_PATCH
:
1789 req
.embedded_proc_type
= FW_RESET_REQ_EMBEDDED_PROC_TYPE_ROCE
;
1791 case BNXT_FW_RESET_CHIP
:
1792 req
.embedded_proc_type
= FW_RESET_REQ_EMBEDDED_PROC_TYPE_CHIP
;
1793 req
.selfrst_status
= FW_RESET_REQ_SELFRST_STATUS_SELFRSTASAP
;
1795 case BNXT_FW_RESET_AP
:
1796 req
.embedded_proc_type
= FW_RESET_REQ_EMBEDDED_PROC_TYPE_AP
;
1802 rc
= hwrm_send_message(bp
, &req
, sizeof(req
), HWRM_CMD_TIMEOUT
);
1804 bnxt_print_admin_err(bp
);
1808 static int bnxt_flash_firmware(struct net_device
*dev
,
1817 struct bnxt_fw_header
*header
= (struct bnxt_fw_header
*)fw_data
;
1820 case BNX_DIR_TYPE_BOOTCODE
:
1821 case BNX_DIR_TYPE_BOOTCODE_2
:
1822 code_type
= CODE_BOOT
;
1824 case BNX_DIR_TYPE_CHIMP_PATCH
:
1825 code_type
= CODE_CHIMP_PATCH
;
1827 case BNX_DIR_TYPE_APE_FW
:
1828 code_type
= CODE_MCTP_PASSTHRU
;
1830 case BNX_DIR_TYPE_APE_PATCH
:
1831 code_type
= CODE_APE_PATCH
;
1833 case BNX_DIR_TYPE_KONG_FW
:
1834 code_type
= CODE_KONG_FW
;
1836 case BNX_DIR_TYPE_KONG_PATCH
:
1837 code_type
= CODE_KONG_PATCH
;
1839 case BNX_DIR_TYPE_BONO_FW
:
1840 code_type
= CODE_BONO_FW
;
1842 case BNX_DIR_TYPE_BONO_PATCH
:
1843 code_type
= CODE_BONO_PATCH
;
1846 netdev_err(dev
, "Unsupported directory entry type: %u\n",
1850 if (fw_size
< sizeof(struct bnxt_fw_header
)) {
1851 netdev_err(dev
, "Invalid firmware file size: %u\n",
1852 (unsigned int)fw_size
);
1855 if (header
->signature
!= cpu_to_le32(BNXT_FIRMWARE_BIN_SIGNATURE
)) {
1856 netdev_err(dev
, "Invalid firmware signature: %08X\n",
1857 le32_to_cpu(header
->signature
));
1860 if (header
->code_type
!= code_type
) {
1861 netdev_err(dev
, "Expected firmware type: %d, read: %d\n",
1862 code_type
, header
->code_type
);
1865 if (header
->device
!= DEVICE_CUMULUS_FAMILY
) {
1866 netdev_err(dev
, "Expected firmware device family %d, read: %d\n",
1867 DEVICE_CUMULUS_FAMILY
, header
->device
);
1870 /* Confirm the CRC32 checksum of the file: */
1871 stored_crc
= le32_to_cpu(*(__le32
*)(fw_data
+ fw_size
-
1872 sizeof(stored_crc
)));
1873 calculated_crc
= ~crc32(~0, fw_data
, fw_size
- sizeof(stored_crc
));
1874 if (calculated_crc
!= stored_crc
) {
1875 netdev_err(dev
, "Firmware file CRC32 checksum (%08lX) does not match calculated checksum (%08lX)\n",
1876 (unsigned long)stored_crc
,
1877 (unsigned long)calculated_crc
);
1880 rc
= bnxt_flash_nvram(dev
, dir_type
, BNX_DIR_ORDINAL_FIRST
,
1881 0, 0, fw_data
, fw_size
);
1882 if (rc
== 0) /* Firmware update successful */
1883 rc
= bnxt_firmware_reset(dev
, dir_type
);
1888 static int bnxt_flash_microcode(struct net_device
*dev
,
1893 struct bnxt_ucode_trailer
*trailer
;
1898 if (fw_size
< sizeof(struct bnxt_ucode_trailer
)) {
1899 netdev_err(dev
, "Invalid microcode file size: %u\n",
1900 (unsigned int)fw_size
);
1903 trailer
= (struct bnxt_ucode_trailer
*)(fw_data
+ (fw_size
-
1905 if (trailer
->sig
!= cpu_to_le32(BNXT_UCODE_TRAILER_SIGNATURE
)) {
1906 netdev_err(dev
, "Invalid microcode trailer signature: %08X\n",
1907 le32_to_cpu(trailer
->sig
));
1910 if (le16_to_cpu(trailer
->dir_type
) != dir_type
) {
1911 netdev_err(dev
, "Expected microcode type: %d, read: %d\n",
1912 dir_type
, le16_to_cpu(trailer
->dir_type
));
1915 if (le16_to_cpu(trailer
->trailer_length
) <
1916 sizeof(struct bnxt_ucode_trailer
)) {
1917 netdev_err(dev
, "Invalid microcode trailer length: %d\n",
1918 le16_to_cpu(trailer
->trailer_length
));
1922 /* Confirm the CRC32 checksum of the file: */
1923 stored_crc
= le32_to_cpu(*(__le32
*)(fw_data
+ fw_size
-
1924 sizeof(stored_crc
)));
1925 calculated_crc
= ~crc32(~0, fw_data
, fw_size
- sizeof(stored_crc
));
1926 if (calculated_crc
!= stored_crc
) {
1928 "CRC32 (%08lX) does not match calculated: %08lX\n",
1929 (unsigned long)stored_crc
,
1930 (unsigned long)calculated_crc
);
1933 rc
= bnxt_flash_nvram(dev
, dir_type
, BNX_DIR_ORDINAL_FIRST
,
1934 0, 0, fw_data
, fw_size
);
1939 static bool bnxt_dir_type_is_ape_bin_format(u16 dir_type
)
1942 case BNX_DIR_TYPE_CHIMP_PATCH
:
1943 case BNX_DIR_TYPE_BOOTCODE
:
1944 case BNX_DIR_TYPE_BOOTCODE_2
:
1945 case BNX_DIR_TYPE_APE_FW
:
1946 case BNX_DIR_TYPE_APE_PATCH
:
1947 case BNX_DIR_TYPE_KONG_FW
:
1948 case BNX_DIR_TYPE_KONG_PATCH
:
1949 case BNX_DIR_TYPE_BONO_FW
:
1950 case BNX_DIR_TYPE_BONO_PATCH
:
1957 static bool bnxt_dir_type_is_other_exec_format(u16 dir_type
)
1960 case BNX_DIR_TYPE_AVS
:
1961 case BNX_DIR_TYPE_EXP_ROM_MBA
:
1962 case BNX_DIR_TYPE_PCIE
:
1963 case BNX_DIR_TYPE_TSCF_UCODE
:
1964 case BNX_DIR_TYPE_EXT_PHY
:
1965 case BNX_DIR_TYPE_CCM
:
1966 case BNX_DIR_TYPE_ISCSI_BOOT
:
1967 case BNX_DIR_TYPE_ISCSI_BOOT_IPV6
:
1968 case BNX_DIR_TYPE_ISCSI_BOOT_IPV4N6
:
1975 static bool bnxt_dir_type_is_executable(u16 dir_type
)
1977 return bnxt_dir_type_is_ape_bin_format(dir_type
) ||
1978 bnxt_dir_type_is_other_exec_format(dir_type
);
1981 static int bnxt_flash_firmware_from_file(struct net_device
*dev
,
1983 const char *filename
)
1985 const struct firmware
*fw
;
1988 rc
= request_firmware(&fw
, filename
, &dev
->dev
);
1990 netdev_err(dev
, "Error %d requesting firmware file: %s\n",
1994 if (bnxt_dir_type_is_ape_bin_format(dir_type
) == true)
1995 rc
= bnxt_flash_firmware(dev
, dir_type
, fw
->data
, fw
->size
);
1996 else if (bnxt_dir_type_is_other_exec_format(dir_type
) == true)
1997 rc
= bnxt_flash_microcode(dev
, dir_type
, fw
->data
, fw
->size
);
1999 rc
= bnxt_flash_nvram(dev
, dir_type
, BNX_DIR_ORDINAL_FIRST
,
2000 0, 0, fw
->data
, fw
->size
);
2001 release_firmware(fw
);
2005 static int bnxt_flash_package_from_file(struct net_device
*dev
,
2006 char *filename
, u32 install_type
)
2008 struct bnxt
*bp
= netdev_priv(dev
);
2009 struct hwrm_nvm_install_update_output
*resp
= bp
->hwrm_cmd_resp_addr
;
2010 struct hwrm_nvm_install_update_input install
= {0};
2011 const struct firmware
*fw
;
2016 bnxt_hwrm_fw_set_time(bp
);
2018 if (bnxt_find_nvram_item(dev
, BNX_DIR_TYPE_UPDATE
,
2019 BNX_DIR_ORDINAL_FIRST
, BNX_DIR_EXT_NONE
,
2020 &index
, &item_len
, NULL
) != 0) {
2021 netdev_err(dev
, "PKG update area not created in nvram\n");
2025 rc
= request_firmware(&fw
, filename
, &dev
->dev
);
2027 netdev_err(dev
, "PKG error %d requesting file: %s\n",
2032 if (fw
->size
> item_len
) {
2033 netdev_err(dev
, "PKG insufficient update area in nvram: %lu",
2034 (unsigned long)fw
->size
);
2037 dma_addr_t dma_handle
;
2039 struct hwrm_nvm_modify_input modify
= {0};
2041 bnxt_hwrm_cmd_hdr_init(bp
, &modify
, HWRM_NVM_MODIFY
, -1, -1);
2043 modify
.dir_idx
= cpu_to_le16(index
);
2044 modify
.len
= cpu_to_le32(fw
->size
);
2046 kmem
= dma_alloc_coherent(&bp
->pdev
->dev
, fw
->size
,
2047 &dma_handle
, GFP_KERNEL
);
2050 "dma_alloc_coherent failure, length = %u\n",
2051 (unsigned int)fw
->size
);
2054 memcpy(kmem
, fw
->data
, fw
->size
);
2055 modify
.host_src_addr
= cpu_to_le64(dma_handle
);
2057 rc
= hwrm_send_message(bp
, &modify
, sizeof(modify
),
2058 FLASH_PACKAGE_TIMEOUT
);
2059 dma_free_coherent(&bp
->pdev
->dev
, fw
->size
, kmem
,
2063 release_firmware(fw
);
2067 if ((install_type
& 0xffff) == 0)
2068 install_type
>>= 16;
2069 bnxt_hwrm_cmd_hdr_init(bp
, &install
, HWRM_NVM_INSTALL_UPDATE
, -1, -1);
2070 install
.install_type
= cpu_to_le32(install_type
);
2072 mutex_lock(&bp
->hwrm_cmd_lock
);
2073 rc
= _hwrm_send_message(bp
, &install
, sizeof(install
),
2074 INSTALL_PACKAGE_TIMEOUT
);
2076 u8 error_code
= ((struct hwrm_err_output
*)resp
)->cmd_err
;
2078 if (resp
->error_code
&& error_code
==
2079 NVM_INSTALL_UPDATE_CMD_ERR_CODE_FRAG_ERR
) {
2080 install
.flags
|= cpu_to_le16(
2081 NVM_INSTALL_UPDATE_REQ_FLAGS_ALLOWED_TO_DEFRAG
);
2082 rc
= _hwrm_send_message(bp
, &install
, sizeof(install
),
2083 INSTALL_PACKAGE_TIMEOUT
);
2086 goto flash_pkg_exit
;
2090 netdev_err(dev
, "PKG install error = %d, problem_item = %d\n",
2091 (s8
)resp
->result
, (int)resp
->problem_item
);
2095 mutex_unlock(&bp
->hwrm_cmd_lock
);
2098 bnxt_print_admin_err(bp
);
2102 static int bnxt_flash_device(struct net_device
*dev
,
2103 struct ethtool_flash
*flash
)
2105 if (!BNXT_PF((struct bnxt
*)netdev_priv(dev
))) {
2106 netdev_err(dev
, "flashdev not supported from a virtual function\n");
2110 if (flash
->region
== ETHTOOL_FLASH_ALL_REGIONS
||
2111 flash
->region
> 0xffff)
2112 return bnxt_flash_package_from_file(dev
, flash
->data
,
2115 return bnxt_flash_firmware_from_file(dev
, flash
->region
, flash
->data
);
2118 static int nvm_get_dir_info(struct net_device
*dev
, u32
*entries
, u32
*length
)
2120 struct bnxt
*bp
= netdev_priv(dev
);
2122 struct hwrm_nvm_get_dir_info_input req
= {0};
2123 struct hwrm_nvm_get_dir_info_output
*output
= bp
->hwrm_cmd_resp_addr
;
2125 bnxt_hwrm_cmd_hdr_init(bp
, &req
, HWRM_NVM_GET_DIR_INFO
, -1, -1);
2127 mutex_lock(&bp
->hwrm_cmd_lock
);
2128 rc
= _hwrm_send_message(bp
, &req
, sizeof(req
), HWRM_CMD_TIMEOUT
);
2130 *entries
= le32_to_cpu(output
->entries
);
2131 *length
= le32_to_cpu(output
->entry_length
);
2133 mutex_unlock(&bp
->hwrm_cmd_lock
);
2137 static int bnxt_get_eeprom_len(struct net_device
*dev
)
2139 struct bnxt
*bp
= netdev_priv(dev
);
2144 /* The -1 return value allows the entire 32-bit range of offsets to be
2145 * passed via the ethtool command-line utility.
2150 static int bnxt_get_nvram_directory(struct net_device
*dev
, u32 len
, u8
*data
)
2152 struct bnxt
*bp
= netdev_priv(dev
);
2158 dma_addr_t dma_handle
;
2159 struct hwrm_nvm_get_dir_entries_input req
= {0};
2161 rc
= nvm_get_dir_info(dev
, &dir_entries
, &entry_length
);
2165 if (!dir_entries
|| !entry_length
)
2168 /* Insert 2 bytes of directory info (count and size of entries) */
2172 *data
++ = dir_entries
;
2173 *data
++ = entry_length
;
2175 memset(data
, 0xff, len
);
2177 buflen
= dir_entries
* entry_length
;
2178 buf
= dma_alloc_coherent(&bp
->pdev
->dev
, buflen
, &dma_handle
,
2181 netdev_err(dev
, "dma_alloc_coherent failure, length = %u\n",
2185 bnxt_hwrm_cmd_hdr_init(bp
, &req
, HWRM_NVM_GET_DIR_ENTRIES
, -1, -1);
2186 req
.host_dest_addr
= cpu_to_le64(dma_handle
);
2187 rc
= hwrm_send_message(bp
, &req
, sizeof(req
), HWRM_CMD_TIMEOUT
);
2189 memcpy(data
, buf
, len
> buflen
? buflen
: len
);
2190 dma_free_coherent(&bp
->pdev
->dev
, buflen
, buf
, dma_handle
);
2194 static int bnxt_get_nvram_item(struct net_device
*dev
, u32 index
, u32 offset
,
2195 u32 length
, u8
*data
)
2197 struct bnxt
*bp
= netdev_priv(dev
);
2200 dma_addr_t dma_handle
;
2201 struct hwrm_nvm_read_input req
= {0};
2206 buf
= dma_alloc_coherent(&bp
->pdev
->dev
, length
, &dma_handle
,
2209 netdev_err(dev
, "dma_alloc_coherent failure, length = %u\n",
2213 bnxt_hwrm_cmd_hdr_init(bp
, &req
, HWRM_NVM_READ
, -1, -1);
2214 req
.host_dest_addr
= cpu_to_le64(dma_handle
);
2215 req
.dir_idx
= cpu_to_le16(index
);
2216 req
.offset
= cpu_to_le32(offset
);
2217 req
.len
= cpu_to_le32(length
);
2219 rc
= hwrm_send_message(bp
, &req
, sizeof(req
), HWRM_CMD_TIMEOUT
);
2221 memcpy(data
, buf
, length
);
2222 dma_free_coherent(&bp
->pdev
->dev
, length
, buf
, dma_handle
);
2226 static int bnxt_find_nvram_item(struct net_device
*dev
, u16 type
, u16 ordinal
,
2227 u16 ext
, u16
*index
, u32
*item_length
,
2230 struct bnxt
*bp
= netdev_priv(dev
);
2232 struct hwrm_nvm_find_dir_entry_input req
= {0};
2233 struct hwrm_nvm_find_dir_entry_output
*output
= bp
->hwrm_cmd_resp_addr
;
2235 bnxt_hwrm_cmd_hdr_init(bp
, &req
, HWRM_NVM_FIND_DIR_ENTRY
, -1, -1);
2238 req
.dir_type
= cpu_to_le16(type
);
2239 req
.dir_ordinal
= cpu_to_le16(ordinal
);
2240 req
.dir_ext
= cpu_to_le16(ext
);
2241 req
.opt_ordinal
= NVM_FIND_DIR_ENTRY_REQ_OPT_ORDINAL_EQ
;
2242 mutex_lock(&bp
->hwrm_cmd_lock
);
2243 rc
= _hwrm_send_message_silent(bp
, &req
, sizeof(req
), HWRM_CMD_TIMEOUT
);
2246 *index
= le16_to_cpu(output
->dir_idx
);
2248 *item_length
= le32_to_cpu(output
->dir_item_length
);
2250 *data_length
= le32_to_cpu(output
->dir_data_length
);
2252 mutex_unlock(&bp
->hwrm_cmd_lock
);
2256 static char *bnxt_parse_pkglog(int desired_field
, u8
*data
, size_t datalen
)
2258 char *retval
= NULL
;
2265 /* null-terminate the log data (removing last '\n'): */
2266 data
[datalen
- 1] = 0;
2267 for (p
= data
; *p
!= 0; p
++) {
2270 while (*p
!= 0 && *p
!= '\n') {
2272 while (*p
!= 0 && *p
!= '\t' && *p
!= '\n')
2274 if (field
== desired_field
)
2289 static void bnxt_get_pkgver(struct net_device
*dev
)
2291 struct bnxt
*bp
= netdev_priv(dev
);
2298 if (bnxt_find_nvram_item(dev
, BNX_DIR_TYPE_PKG_LOG
,
2299 BNX_DIR_ORDINAL_FIRST
, BNX_DIR_EXT_NONE
,
2300 &index
, NULL
, &pkglen
) != 0)
2303 pkgbuf
= kzalloc(pkglen
, GFP_KERNEL
);
2305 dev_err(&bp
->pdev
->dev
, "Unable to allocate memory for pkg version, length = %u\n",
2310 if (bnxt_get_nvram_item(dev
, index
, 0, pkglen
, pkgbuf
))
2313 pkgver
= bnxt_parse_pkglog(BNX_PKG_LOG_FIELD_IDX_PKG_VERSION
, pkgbuf
,
2315 if (pkgver
&& *pkgver
!= 0 && isdigit(*pkgver
)) {
2316 len
= strlen(bp
->fw_ver_str
);
2317 snprintf(bp
->fw_ver_str
+ len
, FW_VER_STR_LEN
- len
- 1,
2324 static int bnxt_get_eeprom(struct net_device
*dev
,
2325 struct ethtool_eeprom
*eeprom
,
2331 if (eeprom
->offset
== 0) /* special offset value to get directory */
2332 return bnxt_get_nvram_directory(dev
, eeprom
->len
, data
);
2334 index
= eeprom
->offset
>> 24;
2335 offset
= eeprom
->offset
& 0xffffff;
2338 netdev_err(dev
, "unsupported index value: %d\n", index
);
2342 return bnxt_get_nvram_item(dev
, index
- 1, offset
, eeprom
->len
, data
);
2345 static int bnxt_erase_nvram_directory(struct net_device
*dev
, u8 index
)
2347 struct bnxt
*bp
= netdev_priv(dev
);
2348 struct hwrm_nvm_erase_dir_entry_input req
= {0};
2350 bnxt_hwrm_cmd_hdr_init(bp
, &req
, HWRM_NVM_ERASE_DIR_ENTRY
, -1, -1);
2351 req
.dir_idx
= cpu_to_le16(index
);
2352 return hwrm_send_message(bp
, &req
, sizeof(req
), HWRM_CMD_TIMEOUT
);
2355 static int bnxt_set_eeprom(struct net_device
*dev
,
2356 struct ethtool_eeprom
*eeprom
,
2359 struct bnxt
*bp
= netdev_priv(dev
);
2361 u16 type
, ext
, ordinal
, attr
;
2364 netdev_err(dev
, "NVM write not supported from a virtual function\n");
2368 type
= eeprom
->magic
>> 16;
2370 if (type
== 0xffff) { /* special value for directory operations */
2371 index
= eeprom
->magic
& 0xff;
2372 dir_op
= eeprom
->magic
>> 8;
2376 case 0x0e: /* erase */
2377 if (eeprom
->offset
!= ~eeprom
->magic
)
2379 return bnxt_erase_nvram_directory(dev
, index
- 1);
2385 /* Create or re-write an NVM item: */
2386 if (bnxt_dir_type_is_executable(type
) == true)
2388 ext
= eeprom
->magic
& 0xffff;
2389 ordinal
= eeprom
->offset
>> 16;
2390 attr
= eeprom
->offset
& 0xffff;
2392 return bnxt_flash_nvram(dev
, type
, ordinal
, ext
, attr
, data
,
2396 static int bnxt_set_eee(struct net_device
*dev
, struct ethtool_eee
*edata
)
2398 struct bnxt
*bp
= netdev_priv(dev
);
2399 struct ethtool_eee
*eee
= &bp
->eee
;
2400 struct bnxt_link_info
*link_info
= &bp
->link_info
;
2404 if (!BNXT_SINGLE_PF(bp
))
2407 if (!(bp
->flags
& BNXT_FLAG_EEE_CAP
))
2410 mutex_lock(&bp
->link_lock
);
2411 advertising
= _bnxt_fw_to_ethtool_adv_spds(link_info
->advertising
, 0);
2412 if (!edata
->eee_enabled
)
2415 if (!(link_info
->autoneg
& BNXT_AUTONEG_SPEED
)) {
2416 netdev_warn(dev
, "EEE requires autoneg\n");
2420 if (edata
->tx_lpi_enabled
) {
2421 if (bp
->lpi_tmr_hi
&& (edata
->tx_lpi_timer
> bp
->lpi_tmr_hi
||
2422 edata
->tx_lpi_timer
< bp
->lpi_tmr_lo
)) {
2423 netdev_warn(dev
, "Valid LPI timer range is %d and %d microsecs\n",
2424 bp
->lpi_tmr_lo
, bp
->lpi_tmr_hi
);
2427 } else if (!bp
->lpi_tmr_hi
) {
2428 edata
->tx_lpi_timer
= eee
->tx_lpi_timer
;
2431 if (!edata
->advertised
) {
2432 edata
->advertised
= advertising
& eee
->supported
;
2433 } else if (edata
->advertised
& ~advertising
) {
2434 netdev_warn(dev
, "EEE advertised %x must be a subset of autoneg advertised speeds %x\n",
2435 edata
->advertised
, advertising
);
2440 eee
->advertised
= edata
->advertised
;
2441 eee
->tx_lpi_enabled
= edata
->tx_lpi_enabled
;
2442 eee
->tx_lpi_timer
= edata
->tx_lpi_timer
;
2444 eee
->eee_enabled
= edata
->eee_enabled
;
2446 if (netif_running(dev
))
2447 rc
= bnxt_hwrm_set_link_setting(bp
, false, true);
2450 mutex_unlock(&bp
->link_lock
);
2454 static int bnxt_get_eee(struct net_device
*dev
, struct ethtool_eee
*edata
)
2456 struct bnxt
*bp
= netdev_priv(dev
);
2458 if (!(bp
->flags
& BNXT_FLAG_EEE_CAP
))
2462 if (!bp
->eee
.eee_enabled
) {
2463 /* Preserve tx_lpi_timer so that the last value will be used
2464 * by default when it is re-enabled.
2466 edata
->advertised
= 0;
2467 edata
->tx_lpi_enabled
= 0;
2470 if (!bp
->eee
.eee_active
)
2471 edata
->lp_advertised
= 0;
2476 static int bnxt_read_sfp_module_eeprom_info(struct bnxt
*bp
, u16 i2c_addr
,
2477 u16 page_number
, u16 start_addr
,
2478 u16 data_length
, u8
*buf
)
2480 struct hwrm_port_phy_i2c_read_input req
= {0};
2481 struct hwrm_port_phy_i2c_read_output
*output
= bp
->hwrm_cmd_resp_addr
;
2482 int rc
, byte_offset
= 0;
2484 bnxt_hwrm_cmd_hdr_init(bp
, &req
, HWRM_PORT_PHY_I2C_READ
, -1, -1);
2485 req
.i2c_slave_addr
= i2c_addr
;
2486 req
.page_number
= cpu_to_le16(page_number
);
2487 req
.port_id
= cpu_to_le16(bp
->pf
.port_id
);
2491 xfer_size
= min_t(u16
, data_length
, BNXT_MAX_PHY_I2C_RESP_SIZE
);
2492 data_length
-= xfer_size
;
2493 req
.page_offset
= cpu_to_le16(start_addr
+ byte_offset
);
2494 req
.data_length
= xfer_size
;
2495 req
.enables
= cpu_to_le32(start_addr
+ byte_offset
?
2496 PORT_PHY_I2C_READ_REQ_ENABLES_PAGE_OFFSET
: 0);
2497 mutex_lock(&bp
->hwrm_cmd_lock
);
2498 rc
= _hwrm_send_message(bp
, &req
, sizeof(req
),
2501 memcpy(buf
+ byte_offset
, output
->data
, xfer_size
);
2502 mutex_unlock(&bp
->hwrm_cmd_lock
);
2503 byte_offset
+= xfer_size
;
2504 } while (!rc
&& data_length
> 0);
2509 static int bnxt_get_module_info(struct net_device
*dev
,
2510 struct ethtool_modinfo
*modinfo
)
2512 u8 data
[SFF_DIAG_SUPPORT_OFFSET
+ 1];
2513 struct bnxt
*bp
= netdev_priv(dev
);
2516 /* No point in going further if phy status indicates
2517 * module is not inserted or if it is powered down or
2518 * if it is of type 10GBase-T
2520 if (bp
->link_info
.module_status
>
2521 PORT_PHY_QCFG_RESP_MODULE_STATUS_WARNINGMSG
)
2524 /* This feature is not supported in older firmware versions */
2525 if (bp
->hwrm_spec_code
< 0x10202)
2528 rc
= bnxt_read_sfp_module_eeprom_info(bp
, I2C_DEV_ADDR_A0
, 0, 0,
2529 SFF_DIAG_SUPPORT_OFFSET
+ 1,
2532 u8 module_id
= data
[0];
2533 u8 diag_supported
= data
[SFF_DIAG_SUPPORT_OFFSET
];
2535 switch (module_id
) {
2536 case SFF_MODULE_ID_SFP
:
2537 modinfo
->type
= ETH_MODULE_SFF_8472
;
2538 modinfo
->eeprom_len
= ETH_MODULE_SFF_8472_LEN
;
2539 if (!diag_supported
)
2540 modinfo
->eeprom_len
= ETH_MODULE_SFF_8436_LEN
;
2542 case SFF_MODULE_ID_QSFP
:
2543 case SFF_MODULE_ID_QSFP_PLUS
:
2544 modinfo
->type
= ETH_MODULE_SFF_8436
;
2545 modinfo
->eeprom_len
= ETH_MODULE_SFF_8436_LEN
;
2547 case SFF_MODULE_ID_QSFP28
:
2548 modinfo
->type
= ETH_MODULE_SFF_8636
;
2549 modinfo
->eeprom_len
= ETH_MODULE_SFF_8636_LEN
;
2559 static int bnxt_get_module_eeprom(struct net_device
*dev
,
2560 struct ethtool_eeprom
*eeprom
,
2563 struct bnxt
*bp
= netdev_priv(dev
);
2564 u16 start
= eeprom
->offset
, length
= eeprom
->len
;
2567 memset(data
, 0, eeprom
->len
);
2569 /* Read A0 portion of the EEPROM */
2570 if (start
< ETH_MODULE_SFF_8436_LEN
) {
2571 if (start
+ eeprom
->len
> ETH_MODULE_SFF_8436_LEN
)
2572 length
= ETH_MODULE_SFF_8436_LEN
- start
;
2573 rc
= bnxt_read_sfp_module_eeprom_info(bp
, I2C_DEV_ADDR_A0
, 0,
2574 start
, length
, data
);
2579 length
= eeprom
->len
- length
;
2582 /* Read A2 portion of the EEPROM */
2584 start
-= ETH_MODULE_SFF_8436_LEN
;
2585 rc
= bnxt_read_sfp_module_eeprom_info(bp
, I2C_DEV_ADDR_A2
, 0,
2586 start
, length
, data
);
2591 static int bnxt_nway_reset(struct net_device
*dev
)
2595 struct bnxt
*bp
= netdev_priv(dev
);
2596 struct bnxt_link_info
*link_info
= &bp
->link_info
;
2598 if (!BNXT_SINGLE_PF(bp
))
2601 if (!(link_info
->autoneg
& BNXT_AUTONEG_SPEED
))
2604 if (netif_running(dev
))
2605 rc
= bnxt_hwrm_set_link_setting(bp
, true, false);
2610 static int bnxt_set_phys_id(struct net_device
*dev
,
2611 enum ethtool_phys_id_state state
)
2613 struct hwrm_port_led_cfg_input req
= {0};
2614 struct bnxt
*bp
= netdev_priv(dev
);
2615 struct bnxt_pf_info
*pf
= &bp
->pf
;
2616 struct bnxt_led_cfg
*led_cfg
;
2621 if (!bp
->num_leds
|| BNXT_VF(bp
))
2624 if (state
== ETHTOOL_ID_ACTIVE
) {
2625 led_state
= PORT_LED_CFG_REQ_LED0_STATE_BLINKALT
;
2626 duration
= cpu_to_le16(500);
2627 } else if (state
== ETHTOOL_ID_INACTIVE
) {
2628 led_state
= PORT_LED_CFG_REQ_LED1_STATE_DEFAULT
;
2629 duration
= cpu_to_le16(0);
2633 bnxt_hwrm_cmd_hdr_init(bp
, &req
, HWRM_PORT_LED_CFG
, -1, -1);
2634 req
.port_id
= cpu_to_le16(pf
->port_id
);
2635 req
.num_leds
= bp
->num_leds
;
2636 led_cfg
= (struct bnxt_led_cfg
*)&req
.led0_id
;
2637 for (i
= 0; i
< bp
->num_leds
; i
++, led_cfg
++) {
2638 req
.enables
|= BNXT_LED_DFLT_ENABLES(i
);
2639 led_cfg
->led_id
= bp
->leds
[i
].led_id
;
2640 led_cfg
->led_state
= led_state
;
2641 led_cfg
->led_blink_on
= duration
;
2642 led_cfg
->led_blink_off
= duration
;
2643 led_cfg
->led_group_id
= bp
->leds
[i
].led_group_id
;
2645 rc
= hwrm_send_message(bp
, &req
, sizeof(req
), HWRM_CMD_TIMEOUT
);
2649 static int bnxt_hwrm_selftest_irq(struct bnxt
*bp
, u16 cmpl_ring
)
2651 struct hwrm_selftest_irq_input req
= {0};
2653 bnxt_hwrm_cmd_hdr_init(bp
, &req
, HWRM_SELFTEST_IRQ
, cmpl_ring
, -1);
2654 return hwrm_send_message(bp
, &req
, sizeof(req
), HWRM_CMD_TIMEOUT
);
2657 static int bnxt_test_irq(struct bnxt
*bp
)
2661 for (i
= 0; i
< bp
->cp_nr_rings
; i
++) {
2662 u16 cmpl_ring
= bp
->grp_info
[i
].cp_fw_ring_id
;
2665 rc
= bnxt_hwrm_selftest_irq(bp
, cmpl_ring
);
2672 static int bnxt_hwrm_mac_loopback(struct bnxt
*bp
, bool enable
)
2674 struct hwrm_port_mac_cfg_input req
= {0};
2676 bnxt_hwrm_cmd_hdr_init(bp
, &req
, HWRM_PORT_MAC_CFG
, -1, -1);
2678 req
.enables
= cpu_to_le32(PORT_MAC_CFG_REQ_ENABLES_LPBK
);
2680 req
.lpbk
= PORT_MAC_CFG_REQ_LPBK_LOCAL
;
2682 req
.lpbk
= PORT_MAC_CFG_REQ_LPBK_NONE
;
2683 return hwrm_send_message(bp
, &req
, sizeof(req
), HWRM_CMD_TIMEOUT
);
2686 static int bnxt_query_force_speeds(struct bnxt
*bp
, u16
*force_speeds
)
2688 struct hwrm_port_phy_qcaps_output
*resp
= bp
->hwrm_cmd_resp_addr
;
2689 struct hwrm_port_phy_qcaps_input req
= {0};
2692 bnxt_hwrm_cmd_hdr_init(bp
, &req
, HWRM_PORT_PHY_QCAPS
, -1, -1);
2693 mutex_lock(&bp
->hwrm_cmd_lock
);
2694 rc
= _hwrm_send_message(bp
, &req
, sizeof(req
), HWRM_CMD_TIMEOUT
);
2696 *force_speeds
= le16_to_cpu(resp
->supported_speeds_force_mode
);
2698 mutex_unlock(&bp
->hwrm_cmd_lock
);
2702 static int bnxt_disable_an_for_lpbk(struct bnxt
*bp
,
2703 struct hwrm_port_phy_cfg_input
*req
)
2705 struct bnxt_link_info
*link_info
= &bp
->link_info
;
2710 if (!link_info
->autoneg
)
2713 rc
= bnxt_query_force_speeds(bp
, &fw_advertising
);
2717 fw_speed
= PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_1GB
;
2718 if (netif_carrier_ok(bp
->dev
))
2719 fw_speed
= bp
->link_info
.link_speed
;
2720 else if (fw_advertising
& BNXT_LINK_SPEED_MSK_10GB
)
2721 fw_speed
= PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_10GB
;
2722 else if (fw_advertising
& BNXT_LINK_SPEED_MSK_25GB
)
2723 fw_speed
= PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_25GB
;
2724 else if (fw_advertising
& BNXT_LINK_SPEED_MSK_40GB
)
2725 fw_speed
= PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_40GB
;
2726 else if (fw_advertising
& BNXT_LINK_SPEED_MSK_50GB
)
2727 fw_speed
= PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_50GB
;
2729 req
->force_link_speed
= cpu_to_le16(fw_speed
);
2730 req
->flags
|= cpu_to_le32(PORT_PHY_CFG_REQ_FLAGS_FORCE
|
2731 PORT_PHY_CFG_REQ_FLAGS_RESET_PHY
);
2732 rc
= hwrm_send_message(bp
, req
, sizeof(*req
), HWRM_CMD_TIMEOUT
);
2734 req
->force_link_speed
= cpu_to_le16(0);
2738 static int bnxt_hwrm_phy_loopback(struct bnxt
*bp
, bool enable
, bool ext
)
2740 struct hwrm_port_phy_cfg_input req
= {0};
2742 bnxt_hwrm_cmd_hdr_init(bp
, &req
, HWRM_PORT_PHY_CFG
, -1, -1);
2745 bnxt_disable_an_for_lpbk(bp
, &req
);
2747 req
.lpbk
= PORT_PHY_CFG_REQ_LPBK_EXTERNAL
;
2749 req
.lpbk
= PORT_PHY_CFG_REQ_LPBK_LOCAL
;
2751 req
.lpbk
= PORT_PHY_CFG_REQ_LPBK_NONE
;
2753 req
.enables
= cpu_to_le32(PORT_PHY_CFG_REQ_ENABLES_LPBK
);
2754 return hwrm_send_message(bp
, &req
, sizeof(req
), HWRM_CMD_TIMEOUT
);
2757 static int bnxt_rx_loopback(struct bnxt
*bp
, struct bnxt_cp_ring_info
*cpr
,
2758 u32 raw_cons
, int pkt_size
)
2760 struct bnxt_napi
*bnapi
= cpr
->bnapi
;
2761 struct bnxt_rx_ring_info
*rxr
;
2762 struct bnxt_sw_rx_bd
*rx_buf
;
2763 struct rx_cmp
*rxcmp
;
2769 rxr
= bnapi
->rx_ring
;
2770 cp_cons
= RING_CMP(raw_cons
);
2771 rxcmp
= (struct rx_cmp
*)
2772 &cpr
->cp_desc_ring
[CP_RING(cp_cons
)][CP_IDX(cp_cons
)];
2773 cons
= rxcmp
->rx_cmp_opaque
;
2774 rx_buf
= &rxr
->rx_buf_ring
[cons
];
2775 data
= rx_buf
->data_ptr
;
2776 len
= le32_to_cpu(rxcmp
->rx_cmp_len_flags_type
) >> RX_CMP_LEN_SHIFT
;
2777 if (len
!= pkt_size
)
2780 if (!ether_addr_equal(data
+ i
, bnapi
->bp
->dev
->dev_addr
))
2783 for ( ; i
< pkt_size
; i
++) {
2784 if (data
[i
] != (u8
)(i
& 0xff))
2790 static int bnxt_poll_loopback(struct bnxt
*bp
, struct bnxt_cp_ring_info
*cpr
,
2793 struct tx_cmp
*txcmp
;
2799 raw_cons
= cpr
->cp_raw_cons
;
2800 for (i
= 0; i
< 200; i
++) {
2801 cons
= RING_CMP(raw_cons
);
2802 txcmp
= &cpr
->cp_desc_ring
[CP_RING(cons
)][CP_IDX(cons
)];
2804 if (!TX_CMP_VALID(txcmp
, raw_cons
)) {
2809 /* The valid test of the entry must be done first before
2810 * reading any further.
2813 if (TX_CMP_TYPE(txcmp
) == CMP_TYPE_RX_L2_CMP
) {
2814 rc
= bnxt_rx_loopback(bp
, cpr
, raw_cons
, pkt_size
);
2815 raw_cons
= NEXT_RAW_CMP(raw_cons
);
2816 raw_cons
= NEXT_RAW_CMP(raw_cons
);
2819 raw_cons
= NEXT_RAW_CMP(raw_cons
);
2821 cpr
->cp_raw_cons
= raw_cons
;
2825 static int bnxt_run_loopback(struct bnxt
*bp
)
2827 struct bnxt_tx_ring_info
*txr
= &bp
->tx_ring
[0];
2828 struct bnxt_rx_ring_info
*rxr
= &bp
->rx_ring
[0];
2829 struct bnxt_cp_ring_info
*cpr
;
2830 int pkt_size
, i
= 0;
2831 struct sk_buff
*skb
;
2836 cpr
= &rxr
->bnapi
->cp_ring
;
2837 if (bp
->flags
& BNXT_FLAG_CHIP_P5
)
2838 cpr
= cpr
->cp_ring_arr
[BNXT_RX_HDL
];
2839 pkt_size
= min(bp
->dev
->mtu
+ ETH_HLEN
, bp
->rx_copy_thresh
);
2840 skb
= netdev_alloc_skb(bp
->dev
, pkt_size
);
2843 data
= skb_put(skb
, pkt_size
);
2844 eth_broadcast_addr(data
);
2846 ether_addr_copy(&data
[i
], bp
->dev
->dev_addr
);
2848 for ( ; i
< pkt_size
; i
++)
2849 data
[i
] = (u8
)(i
& 0xff);
2851 map
= dma_map_single(&bp
->pdev
->dev
, skb
->data
, pkt_size
,
2853 if (dma_mapping_error(&bp
->pdev
->dev
, map
)) {
2857 bnxt_xmit_bd(bp
, txr
, map
, pkt_size
);
2859 /* Sync BD data before updating doorbell */
2862 bnxt_db_write(bp
, &txr
->tx_db
, txr
->tx_prod
);
2863 rc
= bnxt_poll_loopback(bp
, cpr
, pkt_size
);
2865 dma_unmap_single(&bp
->pdev
->dev
, map
, pkt_size
, PCI_DMA_TODEVICE
);
2870 static int bnxt_run_fw_tests(struct bnxt
*bp
, u8 test_mask
, u8
*test_results
)
2872 struct hwrm_selftest_exec_output
*resp
= bp
->hwrm_cmd_resp_addr
;
2873 struct hwrm_selftest_exec_input req
= {0};
2876 bnxt_hwrm_cmd_hdr_init(bp
, &req
, HWRM_SELFTEST_EXEC
, -1, -1);
2877 mutex_lock(&bp
->hwrm_cmd_lock
);
2878 resp
->test_success
= 0;
2879 req
.flags
= test_mask
;
2880 rc
= _hwrm_send_message(bp
, &req
, sizeof(req
), bp
->test_info
->timeout
);
2881 *test_results
= resp
->test_success
;
2882 mutex_unlock(&bp
->hwrm_cmd_lock
);
2886 #define BNXT_DRV_TESTS 4
2887 #define BNXT_MACLPBK_TEST_IDX (bp->num_tests - BNXT_DRV_TESTS)
2888 #define BNXT_PHYLPBK_TEST_IDX (BNXT_MACLPBK_TEST_IDX + 1)
2889 #define BNXT_EXTLPBK_TEST_IDX (BNXT_MACLPBK_TEST_IDX + 2)
2890 #define BNXT_IRQ_TEST_IDX (BNXT_MACLPBK_TEST_IDX + 3)
2892 static void bnxt_self_test(struct net_device
*dev
, struct ethtool_test
*etest
,
2895 struct bnxt
*bp
= netdev_priv(dev
);
2896 bool do_ext_lpbk
= false;
2897 bool offline
= false;
2898 u8 test_results
= 0;
2902 if (!bp
->num_tests
|| !BNXT_SINGLE_PF(bp
))
2904 memset(buf
, 0, sizeof(u64
) * bp
->num_tests
);
2905 if (!netif_running(dev
)) {
2906 etest
->flags
|= ETH_TEST_FL_FAILED
;
2910 if ((etest
->flags
& ETH_TEST_FL_EXTERNAL_LB
) &&
2911 (bp
->test_info
->flags
& BNXT_TEST_FL_EXT_LPBK
))
2914 if (etest
->flags
& ETH_TEST_FL_OFFLINE
) {
2915 if (bp
->pf
.active_vfs
) {
2916 etest
->flags
|= ETH_TEST_FL_FAILED
;
2917 netdev_warn(dev
, "Offline tests cannot be run with active VFs\n");
2923 for (i
= 0; i
< bp
->num_tests
- BNXT_DRV_TESTS
; i
++) {
2924 u8 bit_val
= 1 << i
;
2926 if (!(bp
->test_info
->offline_mask
& bit_val
))
2927 test_mask
|= bit_val
;
2929 test_mask
|= bit_val
;
2932 bnxt_run_fw_tests(bp
, test_mask
, &test_results
);
2934 rc
= bnxt_close_nic(bp
, false, false);
2937 bnxt_run_fw_tests(bp
, test_mask
, &test_results
);
2939 buf
[BNXT_MACLPBK_TEST_IDX
] = 1;
2940 bnxt_hwrm_mac_loopback(bp
, true);
2942 rc
= bnxt_half_open_nic(bp
);
2944 bnxt_hwrm_mac_loopback(bp
, false);
2945 etest
->flags
|= ETH_TEST_FL_FAILED
;
2948 if (bnxt_run_loopback(bp
))
2949 etest
->flags
|= ETH_TEST_FL_FAILED
;
2951 buf
[BNXT_MACLPBK_TEST_IDX
] = 0;
2953 bnxt_hwrm_mac_loopback(bp
, false);
2954 bnxt_hwrm_phy_loopback(bp
, true, false);
2956 if (bnxt_run_loopback(bp
)) {
2957 buf
[BNXT_PHYLPBK_TEST_IDX
] = 1;
2958 etest
->flags
|= ETH_TEST_FL_FAILED
;
2961 etest
->flags
|= ETH_TEST_FL_EXTERNAL_LB_DONE
;
2962 bnxt_hwrm_phy_loopback(bp
, true, true);
2964 if (bnxt_run_loopback(bp
)) {
2965 buf
[BNXT_EXTLPBK_TEST_IDX
] = 1;
2966 etest
->flags
|= ETH_TEST_FL_FAILED
;
2969 bnxt_hwrm_phy_loopback(bp
, false, false);
2970 bnxt_half_close_nic(bp
);
2971 rc
= bnxt_open_nic(bp
, false, true);
2973 if (rc
|| bnxt_test_irq(bp
)) {
2974 buf
[BNXT_IRQ_TEST_IDX
] = 1;
2975 etest
->flags
|= ETH_TEST_FL_FAILED
;
2977 for (i
= 0; i
< bp
->num_tests
- BNXT_DRV_TESTS
; i
++) {
2978 u8 bit_val
= 1 << i
;
2980 if ((test_mask
& bit_val
) && !(test_results
& bit_val
)) {
2982 etest
->flags
|= ETH_TEST_FL_FAILED
;
2987 static int bnxt_reset(struct net_device
*dev
, u32
*flags
)
2989 struct bnxt
*bp
= netdev_priv(dev
);
2993 netdev_err(dev
, "Reset is not supported from a VF\n");
2997 if (pci_vfs_assigned(bp
->pdev
)) {
2999 "Reset not allowed when VFs are assigned to VMs\n");
3003 if (*flags
== ETH_RESET_ALL
) {
3004 /* This feature is not supported in older firmware versions */
3005 if (bp
->hwrm_spec_code
< 0x10803)
3008 rc
= bnxt_firmware_reset(dev
, BNXT_FW_RESET_CHIP
);
3010 netdev_info(dev
, "Reset request successful. Reload driver to complete reset\n");
3013 } else if (*flags
== ETH_RESET_AP
) {
3014 /* This feature is not supported in older firmware versions */
3015 if (bp
->hwrm_spec_code
< 0x10803)
3018 rc
= bnxt_firmware_reset(dev
, BNXT_FW_RESET_AP
);
3020 netdev_info(dev
, "Reset Application Processor request successful.\n");
3030 static int bnxt_hwrm_dbg_dma_data(struct bnxt
*bp
, void *msg
, int msg_len
,
3031 struct bnxt_hwrm_dbg_dma_info
*info
)
3033 struct hwrm_dbg_cmn_output
*cmn_resp
= bp
->hwrm_cmd_resp_addr
;
3034 struct hwrm_dbg_cmn_input
*cmn_req
= msg
;
3035 __le16
*seq_ptr
= msg
+ info
->seq_off
;
3036 u16 seq
= 0, len
, segs_off
;
3037 void *resp
= cmn_resp
;
3038 dma_addr_t dma_handle
;
3042 dma_buf
= dma_alloc_coherent(&bp
->pdev
->dev
, info
->dma_len
, &dma_handle
,
3047 segs_off
= offsetof(struct hwrm_dbg_coredump_list_output
,
3049 cmn_req
->host_dest_addr
= cpu_to_le64(dma_handle
);
3050 cmn_req
->host_buf_len
= cpu_to_le32(info
->dma_len
);
3051 mutex_lock(&bp
->hwrm_cmd_lock
);
3053 *seq_ptr
= cpu_to_le16(seq
);
3054 rc
= _hwrm_send_message(bp
, msg
, msg_len
, HWRM_CMD_TIMEOUT
);
3058 len
= le16_to_cpu(*((__le16
*)(resp
+ info
->data_len_off
)));
3060 cmn_req
->req_type
== cpu_to_le16(HWRM_DBG_COREDUMP_LIST
)) {
3061 info
->segs
= le16_to_cpu(*((__le16
*)(resp
+
3068 info
->dest_buf_size
= info
->segs
*
3069 sizeof(struct coredump_segment_record
);
3070 info
->dest_buf
= kmalloc(info
->dest_buf_size
,
3072 if (!info
->dest_buf
) {
3078 if (info
->dest_buf
) {
3079 if ((info
->seg_start
+ off
+ len
) <=
3080 BNXT_COREDUMP_BUF_LEN(info
->buf_len
)) {
3081 memcpy(info
->dest_buf
+ off
, dma_buf
, len
);
3088 if (cmn_req
->req_type
==
3089 cpu_to_le16(HWRM_DBG_COREDUMP_RETRIEVE
))
3090 info
->dest_buf_size
+= len
;
3092 if (!(cmn_resp
->flags
& HWRM_DBG_CMN_FLAGS_MORE
))
3098 mutex_unlock(&bp
->hwrm_cmd_lock
);
3099 dma_free_coherent(&bp
->pdev
->dev
, info
->dma_len
, dma_buf
, dma_handle
);
3103 static int bnxt_hwrm_dbg_coredump_list(struct bnxt
*bp
,
3104 struct bnxt_coredump
*coredump
)
3106 struct hwrm_dbg_coredump_list_input req
= {0};
3107 struct bnxt_hwrm_dbg_dma_info info
= {NULL
};
3110 bnxt_hwrm_cmd_hdr_init(bp
, &req
, HWRM_DBG_COREDUMP_LIST
, -1, -1);
3112 info
.dma_len
= COREDUMP_LIST_BUF_LEN
;
3113 info
.seq_off
= offsetof(struct hwrm_dbg_coredump_list_input
, seq_no
);
3114 info
.data_len_off
= offsetof(struct hwrm_dbg_coredump_list_output
,
3117 rc
= bnxt_hwrm_dbg_dma_data(bp
, &req
, sizeof(req
), &info
);
3119 coredump
->data
= info
.dest_buf
;
3120 coredump
->data_size
= info
.dest_buf_size
;
3121 coredump
->total_segs
= info
.segs
;
3126 static int bnxt_hwrm_dbg_coredump_initiate(struct bnxt
*bp
, u16 component_id
,
3129 struct hwrm_dbg_coredump_initiate_input req
= {0};
3131 bnxt_hwrm_cmd_hdr_init(bp
, &req
, HWRM_DBG_COREDUMP_INITIATE
, -1, -1);
3132 req
.component_id
= cpu_to_le16(component_id
);
3133 req
.segment_id
= cpu_to_le16(segment_id
);
3135 return hwrm_send_message(bp
, &req
, sizeof(req
), HWRM_COREDUMP_TIMEOUT
);
3138 static int bnxt_hwrm_dbg_coredump_retrieve(struct bnxt
*bp
, u16 component_id
,
3139 u16 segment_id
, u32
*seg_len
,
3140 void *buf
, u32 buf_len
, u32 offset
)
3142 struct hwrm_dbg_coredump_retrieve_input req
= {0};
3143 struct bnxt_hwrm_dbg_dma_info info
= {NULL
};
3146 bnxt_hwrm_cmd_hdr_init(bp
, &req
, HWRM_DBG_COREDUMP_RETRIEVE
, -1, -1);
3147 req
.component_id
= cpu_to_le16(component_id
);
3148 req
.segment_id
= cpu_to_le16(segment_id
);
3150 info
.dma_len
= COREDUMP_RETRIEVE_BUF_LEN
;
3151 info
.seq_off
= offsetof(struct hwrm_dbg_coredump_retrieve_input
,
3153 info
.data_len_off
= offsetof(struct hwrm_dbg_coredump_retrieve_output
,
3156 info
.dest_buf
= buf
+ offset
;
3157 info
.buf_len
= buf_len
;
3158 info
.seg_start
= offset
;
3161 rc
= bnxt_hwrm_dbg_dma_data(bp
, &req
, sizeof(req
), &info
);
3163 *seg_len
= info
.dest_buf_size
;
3169 bnxt_fill_coredump_seg_hdr(struct bnxt
*bp
,
3170 struct bnxt_coredump_segment_hdr
*seg_hdr
,
3171 struct coredump_segment_record
*seg_rec
, u32 seg_len
,
3172 int status
, u32 duration
, u32 instance
)
3174 memset(seg_hdr
, 0, sizeof(*seg_hdr
));
3175 memcpy(seg_hdr
->signature
, "sEgM", 4);
3177 seg_hdr
->component_id
= (__force __le32
)seg_rec
->component_id
;
3178 seg_hdr
->segment_id
= (__force __le32
)seg_rec
->segment_id
;
3179 seg_hdr
->low_version
= seg_rec
->version_low
;
3180 seg_hdr
->high_version
= seg_rec
->version_hi
;
3182 /* For hwrm_ver_get response Component id = 2
3183 * and Segment id = 0
3185 seg_hdr
->component_id
= cpu_to_le32(2);
3186 seg_hdr
->segment_id
= 0;
3188 seg_hdr
->function_id
= cpu_to_le16(bp
->pdev
->devfn
);
3189 seg_hdr
->length
= cpu_to_le32(seg_len
);
3190 seg_hdr
->status
= cpu_to_le32(status
);
3191 seg_hdr
->duration
= cpu_to_le32(duration
);
3192 seg_hdr
->data_offset
= cpu_to_le32(sizeof(*seg_hdr
));
3193 seg_hdr
->instance
= cpu_to_le32(instance
);
3197 bnxt_fill_coredump_record(struct bnxt
*bp
, struct bnxt_coredump_record
*record
,
3198 time64_t start
, s16 start_utc
, u16 total_segs
,
3201 time64_t end
= ktime_get_real_seconds();
3202 u32 os_ver_major
= 0, os_ver_minor
= 0;
3205 time64_to_tm(start
, 0, &tm
);
3206 memset(record
, 0, sizeof(*record
));
3207 memcpy(record
->signature
, "cOrE", 4);
3209 record
->low_version
= 0;
3210 record
->high_version
= 1;
3211 record
->asic_state
= 0;
3212 strlcpy(record
->system_name
, utsname()->nodename
,
3213 sizeof(record
->system_name
));
3214 record
->year
= cpu_to_le16(tm
.tm_year
+ 1900);
3215 record
->month
= cpu_to_le16(tm
.tm_mon
+ 1);
3216 record
->day
= cpu_to_le16(tm
.tm_mday
);
3217 record
->hour
= cpu_to_le16(tm
.tm_hour
);
3218 record
->minute
= cpu_to_le16(tm
.tm_min
);
3219 record
->second
= cpu_to_le16(tm
.tm_sec
);
3220 record
->utc_bias
= cpu_to_le16(start_utc
);
3221 strcpy(record
->commandline
, "ethtool -w");
3222 record
->total_segments
= cpu_to_le32(total_segs
);
3224 sscanf(utsname()->release
, "%u.%u", &os_ver_major
, &os_ver_minor
);
3225 record
->os_ver_major
= cpu_to_le32(os_ver_major
);
3226 record
->os_ver_minor
= cpu_to_le32(os_ver_minor
);
3228 strlcpy(record
->os_name
, utsname()->sysname
, 32);
3229 time64_to_tm(end
, 0, &tm
);
3230 record
->end_year
= cpu_to_le16(tm
.tm_year
+ 1900);
3231 record
->end_month
= cpu_to_le16(tm
.tm_mon
+ 1);
3232 record
->end_day
= cpu_to_le16(tm
.tm_mday
);
3233 record
->end_hour
= cpu_to_le16(tm
.tm_hour
);
3234 record
->end_minute
= cpu_to_le16(tm
.tm_min
);
3235 record
->end_second
= cpu_to_le16(tm
.tm_sec
);
3236 record
->end_utc_bias
= cpu_to_le16(sys_tz
.tz_minuteswest
* 60);
3237 record
->asic_id1
= cpu_to_le32(bp
->chip_num
<< 16 |
3238 bp
->ver_resp
.chip_rev
<< 8 |
3239 bp
->ver_resp
.chip_metal
);
3240 record
->asic_id2
= 0;
3241 record
->coredump_status
= cpu_to_le32(status
);
3242 record
->ioctl_low_version
= 0;
3243 record
->ioctl_high_version
= 0;
3246 static int bnxt_get_coredump(struct bnxt
*bp
, void *buf
, u32
*dump_len
)
3248 u32 ver_get_resp_len
= sizeof(struct hwrm_ver_get_output
);
3249 u32 offset
= 0, seg_hdr_len
, seg_record_len
, buf_len
= 0;
3250 struct coredump_segment_record
*seg_record
= NULL
;
3251 struct bnxt_coredump_segment_hdr seg_hdr
;
3252 struct bnxt_coredump coredump
= {NULL
};
3253 time64_t start_time
;
3258 buf_len
= *dump_len
;
3260 start_time
= ktime_get_real_seconds();
3261 start_utc
= sys_tz
.tz_minuteswest
* 60;
3262 seg_hdr_len
= sizeof(seg_hdr
);
3264 /* First segment should be hwrm_ver_get response */
3265 *dump_len
= seg_hdr_len
+ ver_get_resp_len
;
3267 bnxt_fill_coredump_seg_hdr(bp
, &seg_hdr
, NULL
, ver_get_resp_len
,
3269 memcpy(buf
+ offset
, &seg_hdr
, seg_hdr_len
);
3270 offset
+= seg_hdr_len
;
3271 memcpy(buf
+ offset
, &bp
->ver_resp
, ver_get_resp_len
);
3272 offset
+= ver_get_resp_len
;
3275 rc
= bnxt_hwrm_dbg_coredump_list(bp
, &coredump
);
3277 netdev_err(bp
->dev
, "Failed to get coredump segment list\n");
3281 *dump_len
+= seg_hdr_len
* coredump
.total_segs
;
3283 seg_record
= (struct coredump_segment_record
*)coredump
.data
;
3284 seg_record_len
= sizeof(*seg_record
);
3286 for (i
= 0; i
< coredump
.total_segs
; i
++) {
3287 u16 comp_id
= le16_to_cpu(seg_record
->component_id
);
3288 u16 seg_id
= le16_to_cpu(seg_record
->segment_id
);
3289 u32 duration
= 0, seg_len
= 0;
3290 unsigned long start
, end
;
3292 if (buf
&& ((offset
+ seg_hdr_len
) >
3293 BNXT_COREDUMP_BUF_LEN(buf_len
))) {
3300 rc
= bnxt_hwrm_dbg_coredump_initiate(bp
, comp_id
, seg_id
);
3303 "Failed to initiate coredump for seg = %d\n",
3304 seg_record
->segment_id
);
3308 /* Write segment data into the buffer */
3309 rc
= bnxt_hwrm_dbg_coredump_retrieve(bp
, comp_id
, seg_id
,
3310 &seg_len
, buf
, buf_len
,
3311 offset
+ seg_hdr_len
);
3312 if (rc
&& rc
== -ENOBUFS
)
3316 "Failed to retrieve coredump for seg = %d\n",
3317 seg_record
->segment_id
);
3321 duration
= jiffies_to_msecs(end
- start
);
3322 bnxt_fill_coredump_seg_hdr(bp
, &seg_hdr
, seg_record
, seg_len
,
3326 /* Write segment header into the buffer */
3327 memcpy(buf
+ offset
, &seg_hdr
, seg_hdr_len
);
3328 offset
+= seg_hdr_len
+ seg_len
;
3331 *dump_len
+= seg_len
;
3333 (struct coredump_segment_record
*)((u8
*)seg_record
+
3339 bnxt_fill_coredump_record(bp
, buf
+ offset
, start_time
,
3340 start_utc
, coredump
.total_segs
+ 1,
3342 kfree(coredump
.data
);
3343 *dump_len
+= sizeof(struct bnxt_coredump_record
);
3345 netdev_err(bp
->dev
, "Firmware returned large coredump buffer");
3349 static int bnxt_get_dump_flag(struct net_device
*dev
, struct ethtool_dump
*dump
)
3351 struct bnxt
*bp
= netdev_priv(dev
);
3353 if (bp
->hwrm_spec_code
< 0x10801)
3356 dump
->version
= bp
->ver_resp
.hwrm_fw_maj_8b
<< 24 |
3357 bp
->ver_resp
.hwrm_fw_min_8b
<< 16 |
3358 bp
->ver_resp
.hwrm_fw_bld_8b
<< 8 |
3359 bp
->ver_resp
.hwrm_fw_rsvd_8b
;
3361 return bnxt_get_coredump(bp
, NULL
, &dump
->len
);
3364 static int bnxt_get_dump_data(struct net_device
*dev
, struct ethtool_dump
*dump
,
3367 struct bnxt
*bp
= netdev_priv(dev
);
3369 if (bp
->hwrm_spec_code
< 0x10801)
3372 memset(buf
, 0, dump
->len
);
3374 return bnxt_get_coredump(bp
, buf
, &dump
->len
);
3377 void bnxt_ethtool_init(struct bnxt
*bp
)
3379 struct hwrm_selftest_qlist_output
*resp
= bp
->hwrm_cmd_resp_addr
;
3380 struct hwrm_selftest_qlist_input req
= {0};
3381 struct bnxt_test_info
*test_info
;
3382 struct net_device
*dev
= bp
->dev
;
3385 if (!(bp
->fw_cap
& BNXT_FW_CAP_PKG_VER
))
3386 bnxt_get_pkgver(dev
);
3389 if (bp
->hwrm_spec_code
< 0x10704 || !BNXT_SINGLE_PF(bp
))
3392 bnxt_hwrm_cmd_hdr_init(bp
, &req
, HWRM_SELFTEST_QLIST
, -1, -1);
3393 mutex_lock(&bp
->hwrm_cmd_lock
);
3394 rc
= _hwrm_send_message(bp
, &req
, sizeof(req
), HWRM_CMD_TIMEOUT
);
3396 goto ethtool_init_exit
;
3398 test_info
= bp
->test_info
;
3400 test_info
= kzalloc(sizeof(*bp
->test_info
), GFP_KERNEL
);
3402 goto ethtool_init_exit
;
3404 bp
->test_info
= test_info
;
3405 bp
->num_tests
= resp
->num_tests
+ BNXT_DRV_TESTS
;
3406 if (bp
->num_tests
> BNXT_MAX_TEST
)
3407 bp
->num_tests
= BNXT_MAX_TEST
;
3409 test_info
->offline_mask
= resp
->offline_tests
;
3410 test_info
->timeout
= le16_to_cpu(resp
->test_timeout
);
3411 if (!test_info
->timeout
)
3412 test_info
->timeout
= HWRM_CMD_TIMEOUT
;
3413 for (i
= 0; i
< bp
->num_tests
; i
++) {
3414 char *str
= test_info
->string
[i
];
3415 char *fw_str
= resp
->test0_name
+ i
* 32;
3417 if (i
== BNXT_MACLPBK_TEST_IDX
) {
3418 strcpy(str
, "Mac loopback test (offline)");
3419 } else if (i
== BNXT_PHYLPBK_TEST_IDX
) {
3420 strcpy(str
, "Phy loopback test (offline)");
3421 } else if (i
== BNXT_EXTLPBK_TEST_IDX
) {
3422 strcpy(str
, "Ext loopback test (offline)");
3423 } else if (i
== BNXT_IRQ_TEST_IDX
) {
3424 strcpy(str
, "Interrupt_test (offline)");
3426 strlcpy(str
, fw_str
, ETH_GSTRING_LEN
);
3427 strncat(str
, " test", ETH_GSTRING_LEN
- strlen(str
));
3428 if (test_info
->offline_mask
& (1 << i
))
3429 strncat(str
, " (offline)",
3430 ETH_GSTRING_LEN
- strlen(str
));
3432 strncat(str
, " (online)",
3433 ETH_GSTRING_LEN
- strlen(str
));
3438 mutex_unlock(&bp
->hwrm_cmd_lock
);
3441 void bnxt_ethtool_free(struct bnxt
*bp
)
3443 kfree(bp
->test_info
);
3444 bp
->test_info
= NULL
;
3447 const struct ethtool_ops bnxt_ethtool_ops
= {
3448 .get_link_ksettings
= bnxt_get_link_ksettings
,
3449 .set_link_ksettings
= bnxt_set_link_ksettings
,
3450 .get_pauseparam
= bnxt_get_pauseparam
,
3451 .set_pauseparam
= bnxt_set_pauseparam
,
3452 .get_drvinfo
= bnxt_get_drvinfo
,
3453 .get_wol
= bnxt_get_wol
,
3454 .set_wol
= bnxt_set_wol
,
3455 .get_coalesce
= bnxt_get_coalesce
,
3456 .set_coalesce
= bnxt_set_coalesce
,
3457 .get_msglevel
= bnxt_get_msglevel
,
3458 .set_msglevel
= bnxt_set_msglevel
,
3459 .get_sset_count
= bnxt_get_sset_count
,
3460 .get_strings
= bnxt_get_strings
,
3461 .get_ethtool_stats
= bnxt_get_ethtool_stats
,
3462 .set_ringparam
= bnxt_set_ringparam
,
3463 .get_ringparam
= bnxt_get_ringparam
,
3464 .get_channels
= bnxt_get_channels
,
3465 .set_channels
= bnxt_set_channels
,
3466 .get_rxnfc
= bnxt_get_rxnfc
,
3467 .set_rxnfc
= bnxt_set_rxnfc
,
3468 .get_rxfh_indir_size
= bnxt_get_rxfh_indir_size
,
3469 .get_rxfh_key_size
= bnxt_get_rxfh_key_size
,
3470 .get_rxfh
= bnxt_get_rxfh
,
3471 .flash_device
= bnxt_flash_device
,
3472 .get_eeprom_len
= bnxt_get_eeprom_len
,
3473 .get_eeprom
= bnxt_get_eeprom
,
3474 .set_eeprom
= bnxt_set_eeprom
,
3475 .get_link
= bnxt_get_link
,
3476 .get_eee
= bnxt_get_eee
,
3477 .set_eee
= bnxt_set_eee
,
3478 .get_module_info
= bnxt_get_module_info
,
3479 .get_module_eeprom
= bnxt_get_module_eeprom
,
3480 .nway_reset
= bnxt_nway_reset
,
3481 .set_phys_id
= bnxt_set_phys_id
,
3482 .self_test
= bnxt_self_test
,
3483 .reset
= bnxt_reset
,
3484 .get_dump_flag
= bnxt_get_dump_flag
,
3485 .get_dump_data
= bnxt_get_dump_data
,