1 // SPDX-License-Identifier: GPL-2.0-only
3 * Linux network driver for QLogic BR-series Converged Network Adapter.
6 * Copyright (c) 2005-2014 Brocade Communications Systems, Inc.
7 * Copyright (c) 2014-2015 QLogic Corporation
16 /* IOC local definitions */
18 /* Asic specific macros : see bfa_hw_cb.c and bfa_hw_ct.c for details. */
20 #define bfa_ioc_firmware_lock(__ioc) \
21 ((__ioc)->ioc_hwif->ioc_firmware_lock(__ioc))
22 #define bfa_ioc_firmware_unlock(__ioc) \
23 ((__ioc)->ioc_hwif->ioc_firmware_unlock(__ioc))
24 #define bfa_ioc_reg_init(__ioc) ((__ioc)->ioc_hwif->ioc_reg_init(__ioc))
25 #define bfa_ioc_map_port(__ioc) ((__ioc)->ioc_hwif->ioc_map_port(__ioc))
26 #define bfa_ioc_notify_fail(__ioc) \
27 ((__ioc)->ioc_hwif->ioc_notify_fail(__ioc))
28 #define bfa_ioc_sync_start(__ioc) \
29 ((__ioc)->ioc_hwif->ioc_sync_start(__ioc))
30 #define bfa_ioc_sync_join(__ioc) \
31 ((__ioc)->ioc_hwif->ioc_sync_join(__ioc))
32 #define bfa_ioc_sync_leave(__ioc) \
33 ((__ioc)->ioc_hwif->ioc_sync_leave(__ioc))
34 #define bfa_ioc_sync_ack(__ioc) \
35 ((__ioc)->ioc_hwif->ioc_sync_ack(__ioc))
36 #define bfa_ioc_sync_complete(__ioc) \
37 ((__ioc)->ioc_hwif->ioc_sync_complete(__ioc))
38 #define bfa_ioc_set_cur_ioc_fwstate(__ioc, __fwstate) \
39 ((__ioc)->ioc_hwif->ioc_set_fwstate(__ioc, __fwstate))
40 #define bfa_ioc_get_cur_ioc_fwstate(__ioc) \
41 ((__ioc)->ioc_hwif->ioc_get_fwstate(__ioc))
42 #define bfa_ioc_set_alt_ioc_fwstate(__ioc, __fwstate) \
43 ((__ioc)->ioc_hwif->ioc_set_alt_fwstate(__ioc, __fwstate))
45 static bool bfa_nw_auto_recover
= true;
48 * forward declarations
50 static void bfa_ioc_hw_sem_init(struct bfa_ioc
*ioc
);
51 static void bfa_ioc_hw_sem_get(struct bfa_ioc
*ioc
);
52 static void bfa_ioc_hw_sem_get_cancel(struct bfa_ioc
*ioc
);
53 static void bfa_ioc_hwinit(struct bfa_ioc
*ioc
, bool force
);
54 static void bfa_ioc_poll_fwinit(struct bfa_ioc
*ioc
);
55 static void bfa_ioc_send_enable(struct bfa_ioc
*ioc
);
56 static void bfa_ioc_send_disable(struct bfa_ioc
*ioc
);
57 static void bfa_ioc_send_getattr(struct bfa_ioc
*ioc
);
58 static void bfa_ioc_hb_monitor(struct bfa_ioc
*ioc
);
59 static void bfa_ioc_hb_stop(struct bfa_ioc
*ioc
);
60 static void bfa_ioc_reset(struct bfa_ioc
*ioc
, bool force
);
61 static void bfa_ioc_mbox_poll(struct bfa_ioc
*ioc
);
62 static void bfa_ioc_mbox_flush(struct bfa_ioc
*ioc
);
63 static void bfa_ioc_recover(struct bfa_ioc
*ioc
);
64 static void bfa_ioc_event_notify(struct bfa_ioc
*, enum bfa_ioc_event
);
65 static void bfa_ioc_disable_comp(struct bfa_ioc
*ioc
);
66 static void bfa_ioc_lpu_stop(struct bfa_ioc
*ioc
);
67 static void bfa_nw_ioc_debug_save_ftrc(struct bfa_ioc
*ioc
);
68 static void bfa_ioc_fail_notify(struct bfa_ioc
*ioc
);
69 static void bfa_ioc_pf_enabled(struct bfa_ioc
*ioc
);
70 static void bfa_ioc_pf_disabled(struct bfa_ioc
*ioc
);
71 static void bfa_ioc_pf_failed(struct bfa_ioc
*ioc
);
72 static void bfa_ioc_pf_hwfailed(struct bfa_ioc
*ioc
);
73 static void bfa_ioc_pf_fwmismatch(struct bfa_ioc
*ioc
);
74 static enum bfa_status
bfa_ioc_boot(struct bfa_ioc
*ioc
,
75 enum bfi_fwboot_type boot_type
, u32 boot_param
);
76 static u32
bfa_ioc_smem_pgnum(struct bfa_ioc
*ioc
, u32 fmaddr
);
77 static void bfa_ioc_get_adapter_serial_num(struct bfa_ioc
*ioc
,
79 static void bfa_ioc_get_adapter_fw_ver(struct bfa_ioc
*ioc
,
81 static void bfa_ioc_get_pci_chip_rev(struct bfa_ioc
*ioc
,
83 static void bfa_ioc_get_adapter_optrom_ver(struct bfa_ioc
*ioc
,
85 static void bfa_ioc_get_adapter_manufacturer(struct bfa_ioc
*ioc
,
87 static void bfa_ioc_get_adapter_model(struct bfa_ioc
*ioc
, char *model
);
88 static u64
bfa_ioc_get_pwwn(struct bfa_ioc
*ioc
);
90 /* IOC state machine definitions/declarations */
92 IOC_E_RESET
= 1, /*!< IOC reset request */
93 IOC_E_ENABLE
= 2, /*!< IOC enable request */
94 IOC_E_DISABLE
= 3, /*!< IOC disable request */
95 IOC_E_DETACH
= 4, /*!< driver detach cleanup */
96 IOC_E_ENABLED
= 5, /*!< f/w enabled */
97 IOC_E_FWRSP_GETATTR
= 6, /*!< IOC get attribute response */
98 IOC_E_DISABLED
= 7, /*!< f/w disabled */
99 IOC_E_PFFAILED
= 8, /*!< failure notice by iocpf sm */
100 IOC_E_HBFAIL
= 9, /*!< heartbeat failure */
101 IOC_E_HWERROR
= 10, /*!< hardware error interrupt */
102 IOC_E_TIMEOUT
= 11, /*!< timeout */
103 IOC_E_HWFAILED
= 12, /*!< PCI mapping failure notice */
106 bfa_fsm_state_decl(bfa_ioc
, uninit
, struct bfa_ioc
, enum ioc_event
);
107 bfa_fsm_state_decl(bfa_ioc
, reset
, struct bfa_ioc
, enum ioc_event
);
108 bfa_fsm_state_decl(bfa_ioc
, enabling
, struct bfa_ioc
, enum ioc_event
);
109 bfa_fsm_state_decl(bfa_ioc
, getattr
, struct bfa_ioc
, enum ioc_event
);
110 bfa_fsm_state_decl(bfa_ioc
, op
, struct bfa_ioc
, enum ioc_event
);
111 bfa_fsm_state_decl(bfa_ioc
, fail_retry
, struct bfa_ioc
, enum ioc_event
);
112 bfa_fsm_state_decl(bfa_ioc
, fail
, struct bfa_ioc
, enum ioc_event
);
113 bfa_fsm_state_decl(bfa_ioc
, disabling
, struct bfa_ioc
, enum ioc_event
);
114 bfa_fsm_state_decl(bfa_ioc
, disabled
, struct bfa_ioc
, enum ioc_event
);
115 bfa_fsm_state_decl(bfa_ioc
, hwfail
, struct bfa_ioc
, enum ioc_event
);
117 static struct bfa_sm_table ioc_sm_table
[] = {
118 {BFA_SM(bfa_ioc_sm_uninit
), BFA_IOC_UNINIT
},
119 {BFA_SM(bfa_ioc_sm_reset
), BFA_IOC_RESET
},
120 {BFA_SM(bfa_ioc_sm_enabling
), BFA_IOC_ENABLING
},
121 {BFA_SM(bfa_ioc_sm_getattr
), BFA_IOC_GETATTR
},
122 {BFA_SM(bfa_ioc_sm_op
), BFA_IOC_OPERATIONAL
},
123 {BFA_SM(bfa_ioc_sm_fail_retry
), BFA_IOC_INITFAIL
},
124 {BFA_SM(bfa_ioc_sm_fail
), BFA_IOC_FAIL
},
125 {BFA_SM(bfa_ioc_sm_disabling
), BFA_IOC_DISABLING
},
126 {BFA_SM(bfa_ioc_sm_disabled
), BFA_IOC_DISABLED
},
127 {BFA_SM(bfa_ioc_sm_hwfail
), BFA_IOC_HWFAIL
},
131 * Forward declareations for iocpf state machine
133 static void bfa_iocpf_enable(struct bfa_ioc
*ioc
);
134 static void bfa_iocpf_disable(struct bfa_ioc
*ioc
);
135 static void bfa_iocpf_fail(struct bfa_ioc
*ioc
);
136 static void bfa_iocpf_initfail(struct bfa_ioc
*ioc
);
137 static void bfa_iocpf_getattrfail(struct bfa_ioc
*ioc
);
138 static void bfa_iocpf_stop(struct bfa_ioc
*ioc
);
140 /* IOCPF state machine events */
142 IOCPF_E_ENABLE
= 1, /*!< IOCPF enable request */
143 IOCPF_E_DISABLE
= 2, /*!< IOCPF disable request */
144 IOCPF_E_STOP
= 3, /*!< stop on driver detach */
145 IOCPF_E_FWREADY
= 4, /*!< f/w initialization done */
146 IOCPF_E_FWRSP_ENABLE
= 5, /*!< enable f/w response */
147 IOCPF_E_FWRSP_DISABLE
= 6, /*!< disable f/w response */
148 IOCPF_E_FAIL
= 7, /*!< failure notice by ioc sm */
149 IOCPF_E_INITFAIL
= 8, /*!< init fail notice by ioc sm */
150 IOCPF_E_GETATTRFAIL
= 9, /*!< init fail notice by ioc sm */
151 IOCPF_E_SEMLOCKED
= 10, /*!< h/w semaphore is locked */
152 IOCPF_E_TIMEOUT
= 11, /*!< f/w response timeout */
153 IOCPF_E_SEM_ERROR
= 12, /*!< h/w sem mapping error */
157 enum bfa_iocpf_state
{
158 BFA_IOCPF_RESET
= 1, /*!< IOC is in reset state */
159 BFA_IOCPF_SEMWAIT
= 2, /*!< Waiting for IOC h/w semaphore */
160 BFA_IOCPF_HWINIT
= 3, /*!< IOC h/w is being initialized */
161 BFA_IOCPF_READY
= 4, /*!< IOCPF is initialized */
162 BFA_IOCPF_INITFAIL
= 5, /*!< IOCPF failed */
163 BFA_IOCPF_FAIL
= 6, /*!< IOCPF failed */
164 BFA_IOCPF_DISABLING
= 7, /*!< IOCPF is being disabled */
165 BFA_IOCPF_DISABLED
= 8, /*!< IOCPF is disabled */
166 BFA_IOCPF_FWMISMATCH
= 9, /*!< IOC f/w different from drivers */
169 bfa_fsm_state_decl(bfa_iocpf
, reset
, struct bfa_iocpf
, enum iocpf_event
);
170 bfa_fsm_state_decl(bfa_iocpf
, fwcheck
, struct bfa_iocpf
, enum iocpf_event
);
171 bfa_fsm_state_decl(bfa_iocpf
, mismatch
, struct bfa_iocpf
, enum iocpf_event
);
172 bfa_fsm_state_decl(bfa_iocpf
, semwait
, struct bfa_iocpf
, enum iocpf_event
);
173 bfa_fsm_state_decl(bfa_iocpf
, hwinit
, struct bfa_iocpf
, enum iocpf_event
);
174 bfa_fsm_state_decl(bfa_iocpf
, enabling
, struct bfa_iocpf
, enum iocpf_event
);
175 bfa_fsm_state_decl(bfa_iocpf
, ready
, struct bfa_iocpf
, enum iocpf_event
);
176 bfa_fsm_state_decl(bfa_iocpf
, initfail_sync
, struct bfa_iocpf
,
178 bfa_fsm_state_decl(bfa_iocpf
, initfail
, struct bfa_iocpf
, enum iocpf_event
);
179 bfa_fsm_state_decl(bfa_iocpf
, fail_sync
, struct bfa_iocpf
, enum iocpf_event
);
180 bfa_fsm_state_decl(bfa_iocpf
, fail
, struct bfa_iocpf
, enum iocpf_event
);
181 bfa_fsm_state_decl(bfa_iocpf
, disabling
, struct bfa_iocpf
, enum iocpf_event
);
182 bfa_fsm_state_decl(bfa_iocpf
, disabling_sync
, struct bfa_iocpf
,
184 bfa_fsm_state_decl(bfa_iocpf
, disabled
, struct bfa_iocpf
, enum iocpf_event
);
186 static struct bfa_sm_table iocpf_sm_table
[] = {
187 {BFA_SM(bfa_iocpf_sm_reset
), BFA_IOCPF_RESET
},
188 {BFA_SM(bfa_iocpf_sm_fwcheck
), BFA_IOCPF_FWMISMATCH
},
189 {BFA_SM(bfa_iocpf_sm_mismatch
), BFA_IOCPF_FWMISMATCH
},
190 {BFA_SM(bfa_iocpf_sm_semwait
), BFA_IOCPF_SEMWAIT
},
191 {BFA_SM(bfa_iocpf_sm_hwinit
), BFA_IOCPF_HWINIT
},
192 {BFA_SM(bfa_iocpf_sm_enabling
), BFA_IOCPF_HWINIT
},
193 {BFA_SM(bfa_iocpf_sm_ready
), BFA_IOCPF_READY
},
194 {BFA_SM(bfa_iocpf_sm_initfail_sync
), BFA_IOCPF_INITFAIL
},
195 {BFA_SM(bfa_iocpf_sm_initfail
), BFA_IOCPF_INITFAIL
},
196 {BFA_SM(bfa_iocpf_sm_fail_sync
), BFA_IOCPF_FAIL
},
197 {BFA_SM(bfa_iocpf_sm_fail
), BFA_IOCPF_FAIL
},
198 {BFA_SM(bfa_iocpf_sm_disabling
), BFA_IOCPF_DISABLING
},
199 {BFA_SM(bfa_iocpf_sm_disabling_sync
), BFA_IOCPF_DISABLING
},
200 {BFA_SM(bfa_iocpf_sm_disabled
), BFA_IOCPF_DISABLED
},
203 /* IOC State Machine */
205 /* Beginning state. IOC uninit state. */
207 bfa_ioc_sm_uninit_entry(struct bfa_ioc
*ioc
)
211 /* IOC is in uninit state. */
213 bfa_ioc_sm_uninit(struct bfa_ioc
*ioc
, enum ioc_event event
)
217 bfa_fsm_set_state(ioc
, bfa_ioc_sm_reset
);
225 /* Reset entry actions -- initialize state machine */
227 bfa_ioc_sm_reset_entry(struct bfa_ioc
*ioc
)
229 bfa_fsm_set_state(&ioc
->iocpf
, bfa_iocpf_sm_reset
);
232 /* IOC is in reset state. */
234 bfa_ioc_sm_reset(struct bfa_ioc
*ioc
, enum ioc_event event
)
238 bfa_fsm_set_state(ioc
, bfa_ioc_sm_enabling
);
242 bfa_ioc_disable_comp(ioc
);
246 bfa_fsm_set_state(ioc
, bfa_ioc_sm_uninit
);
255 bfa_ioc_sm_enabling_entry(struct bfa_ioc
*ioc
)
257 bfa_iocpf_enable(ioc
);
260 /* Host IOC function is being enabled, awaiting response from firmware.
261 * Semaphore is acquired.
264 bfa_ioc_sm_enabling(struct bfa_ioc
*ioc
, enum ioc_event event
)
268 bfa_fsm_set_state(ioc
, bfa_ioc_sm_getattr
);
272 /* !!! fall through !!! */
274 ioc
->cbfn
->enable_cbfn(ioc
->bfa
, BFA_STATUS_IOC_FAILURE
);
275 bfa_fsm_set_state(ioc
, bfa_ioc_sm_fail
);
276 if (event
!= IOC_E_PFFAILED
)
277 bfa_iocpf_initfail(ioc
);
281 ioc
->cbfn
->enable_cbfn(ioc
->bfa
, BFA_STATUS_IOC_FAILURE
);
282 bfa_fsm_set_state(ioc
, bfa_ioc_sm_hwfail
);
286 bfa_fsm_set_state(ioc
, bfa_ioc_sm_disabling
);
290 bfa_fsm_set_state(ioc
, bfa_ioc_sm_uninit
);
302 /* Semaphore should be acquired for version check. */
304 bfa_ioc_sm_getattr_entry(struct bfa_ioc
*ioc
)
306 mod_timer(&ioc
->ioc_timer
, jiffies
+
307 msecs_to_jiffies(BFA_IOC_TOV
));
308 bfa_ioc_send_getattr(ioc
);
311 /* IOC configuration in progress. Timer is active. */
313 bfa_ioc_sm_getattr(struct bfa_ioc
*ioc
, enum ioc_event event
)
316 case IOC_E_FWRSP_GETATTR
:
317 del_timer(&ioc
->ioc_timer
);
318 bfa_fsm_set_state(ioc
, bfa_ioc_sm_op
);
323 del_timer(&ioc
->ioc_timer
);
326 ioc
->cbfn
->enable_cbfn(ioc
->bfa
, BFA_STATUS_IOC_FAILURE
);
327 bfa_fsm_set_state(ioc
, bfa_ioc_sm_fail
);
328 if (event
!= IOC_E_PFFAILED
)
329 bfa_iocpf_getattrfail(ioc
);
333 del_timer(&ioc
->ioc_timer
);
334 bfa_fsm_set_state(ioc
, bfa_ioc_sm_disabling
);
346 bfa_ioc_sm_op_entry(struct bfa_ioc
*ioc
)
348 ioc
->cbfn
->enable_cbfn(ioc
->bfa
, BFA_STATUS_OK
);
349 bfa_ioc_event_notify(ioc
, BFA_IOC_E_ENABLED
);
350 bfa_ioc_hb_monitor(ioc
);
354 bfa_ioc_sm_op(struct bfa_ioc
*ioc
, enum ioc_event event
)
361 bfa_ioc_hb_stop(ioc
);
362 bfa_fsm_set_state(ioc
, bfa_ioc_sm_disabling
);
367 bfa_ioc_hb_stop(ioc
);
368 /* !!! fall through !!! */
370 if (ioc
->iocpf
.auto_recover
)
371 bfa_fsm_set_state(ioc
, bfa_ioc_sm_fail_retry
);
373 bfa_fsm_set_state(ioc
, bfa_ioc_sm_fail
);
375 bfa_ioc_fail_notify(ioc
);
377 if (event
!= IOC_E_PFFAILED
)
387 bfa_ioc_sm_disabling_entry(struct bfa_ioc
*ioc
)
389 bfa_iocpf_disable(ioc
);
392 /* IOC is being disabled */
394 bfa_ioc_sm_disabling(struct bfa_ioc
*ioc
, enum ioc_event event
)
398 bfa_fsm_set_state(ioc
, bfa_ioc_sm_disabled
);
403 * No state change. Will move to disabled state
404 * after iocpf sm completes failure processing and
405 * moves to disabled state.
411 bfa_fsm_set_state(ioc
, bfa_ioc_sm_hwfail
);
412 bfa_ioc_disable_comp(ioc
);
420 /* IOC disable completion entry. */
422 bfa_ioc_sm_disabled_entry(struct bfa_ioc
*ioc
)
424 bfa_ioc_disable_comp(ioc
);
428 bfa_ioc_sm_disabled(struct bfa_ioc
*ioc
, enum ioc_event event
)
432 bfa_fsm_set_state(ioc
, bfa_ioc_sm_enabling
);
436 ioc
->cbfn
->disable_cbfn(ioc
->bfa
);
440 bfa_fsm_set_state(ioc
, bfa_ioc_sm_uninit
);
450 bfa_ioc_sm_fail_retry_entry(struct bfa_ioc
*ioc
)
454 /* Hardware initialization retry. */
456 bfa_ioc_sm_fail_retry(struct bfa_ioc
*ioc
, enum ioc_event event
)
460 bfa_fsm_set_state(ioc
, bfa_ioc_sm_getattr
);
466 * Initialization retry failed.
468 ioc
->cbfn
->enable_cbfn(ioc
->bfa
, BFA_STATUS_IOC_FAILURE
);
469 bfa_fsm_set_state(ioc
, bfa_ioc_sm_fail
);
470 if (event
!= IOC_E_PFFAILED
)
471 bfa_iocpf_initfail(ioc
);
475 ioc
->cbfn
->enable_cbfn(ioc
->bfa
, BFA_STATUS_IOC_FAILURE
);
476 bfa_fsm_set_state(ioc
, bfa_ioc_sm_hwfail
);
483 bfa_fsm_set_state(ioc
, bfa_ioc_sm_disabling
);
487 bfa_fsm_set_state(ioc
, bfa_ioc_sm_uninit
);
497 bfa_ioc_sm_fail_entry(struct bfa_ioc
*ioc
)
503 bfa_ioc_sm_fail(struct bfa_ioc
*ioc
, enum ioc_event event
)
507 ioc
->cbfn
->enable_cbfn(ioc
->bfa
, BFA_STATUS_IOC_FAILURE
);
511 bfa_fsm_set_state(ioc
, bfa_ioc_sm_disabling
);
515 bfa_fsm_set_state(ioc
, bfa_ioc_sm_uninit
);
520 /* HB failure notification, ignore. */
529 bfa_ioc_sm_hwfail_entry(struct bfa_ioc
*ioc
)
535 bfa_ioc_sm_hwfail(struct bfa_ioc
*ioc
, enum ioc_event event
)
540 ioc
->cbfn
->enable_cbfn(ioc
->bfa
, BFA_STATUS_IOC_FAILURE
);
544 ioc
->cbfn
->disable_cbfn(ioc
->bfa
);
548 bfa_fsm_set_state(ioc
, bfa_ioc_sm_uninit
);
556 /* IOCPF State Machine */
558 /* Reset entry actions -- initialize state machine */
560 bfa_iocpf_sm_reset_entry(struct bfa_iocpf
*iocpf
)
562 iocpf
->fw_mismatch_notified
= false;
563 iocpf
->auto_recover
= bfa_nw_auto_recover
;
566 /* Beginning state. IOC is in reset state. */
568 bfa_iocpf_sm_reset(struct bfa_iocpf
*iocpf
, enum iocpf_event event
)
572 bfa_fsm_set_state(iocpf
, bfa_iocpf_sm_fwcheck
);
583 /* Semaphore should be acquired for version check. */
585 bfa_iocpf_sm_fwcheck_entry(struct bfa_iocpf
*iocpf
)
587 bfa_ioc_hw_sem_init(iocpf
->ioc
);
588 bfa_ioc_hw_sem_get(iocpf
->ioc
);
591 /* Awaiting h/w semaphore to continue with version check. */
593 bfa_iocpf_sm_fwcheck(struct bfa_iocpf
*iocpf
, enum iocpf_event event
)
595 struct bfa_ioc
*ioc
= iocpf
->ioc
;
598 case IOCPF_E_SEMLOCKED
:
599 if (bfa_ioc_firmware_lock(ioc
)) {
600 if (bfa_ioc_sync_start(ioc
)) {
601 bfa_ioc_sync_join(ioc
);
602 bfa_fsm_set_state(iocpf
, bfa_iocpf_sm_hwinit
);
604 bfa_ioc_firmware_unlock(ioc
);
605 bfa_nw_ioc_hw_sem_release(ioc
);
606 mod_timer(&ioc
->sem_timer
, jiffies
+
607 msecs_to_jiffies(BFA_IOC_HWSEM_TOV
));
610 bfa_nw_ioc_hw_sem_release(ioc
);
611 bfa_fsm_set_state(iocpf
, bfa_iocpf_sm_mismatch
);
615 case IOCPF_E_SEM_ERROR
:
616 bfa_fsm_set_state(iocpf
, bfa_iocpf_sm_fail
);
617 bfa_ioc_pf_hwfailed(ioc
);
620 case IOCPF_E_DISABLE
:
621 bfa_ioc_hw_sem_get_cancel(ioc
);
622 bfa_fsm_set_state(iocpf
, bfa_iocpf_sm_reset
);
623 bfa_ioc_pf_disabled(ioc
);
627 bfa_ioc_hw_sem_get_cancel(ioc
);
628 bfa_fsm_set_state(iocpf
, bfa_iocpf_sm_reset
);
636 /* Notify enable completion callback */
638 bfa_iocpf_sm_mismatch_entry(struct bfa_iocpf
*iocpf
)
640 /* Call only the first time sm enters fwmismatch state. */
641 if (!iocpf
->fw_mismatch_notified
)
642 bfa_ioc_pf_fwmismatch(iocpf
->ioc
);
644 iocpf
->fw_mismatch_notified
= true;
645 mod_timer(&(iocpf
->ioc
)->iocpf_timer
, jiffies
+
646 msecs_to_jiffies(BFA_IOC_TOV
));
649 /* Awaiting firmware version match. */
651 bfa_iocpf_sm_mismatch(struct bfa_iocpf
*iocpf
, enum iocpf_event event
)
653 struct bfa_ioc
*ioc
= iocpf
->ioc
;
656 case IOCPF_E_TIMEOUT
:
657 bfa_fsm_set_state(iocpf
, bfa_iocpf_sm_fwcheck
);
660 case IOCPF_E_DISABLE
:
661 del_timer(&ioc
->iocpf_timer
);
662 bfa_fsm_set_state(iocpf
, bfa_iocpf_sm_reset
);
663 bfa_ioc_pf_disabled(ioc
);
667 del_timer(&ioc
->iocpf_timer
);
668 bfa_fsm_set_state(iocpf
, bfa_iocpf_sm_reset
);
676 /* Request for semaphore. */
678 bfa_iocpf_sm_semwait_entry(struct bfa_iocpf
*iocpf
)
680 bfa_ioc_hw_sem_get(iocpf
->ioc
);
683 /* Awaiting semaphore for h/w initialzation. */
685 bfa_iocpf_sm_semwait(struct bfa_iocpf
*iocpf
, enum iocpf_event event
)
687 struct bfa_ioc
*ioc
= iocpf
->ioc
;
690 case IOCPF_E_SEMLOCKED
:
691 if (bfa_ioc_sync_complete(ioc
)) {
692 bfa_ioc_sync_join(ioc
);
693 bfa_fsm_set_state(iocpf
, bfa_iocpf_sm_hwinit
);
695 bfa_nw_ioc_hw_sem_release(ioc
);
696 mod_timer(&ioc
->sem_timer
, jiffies
+
697 msecs_to_jiffies(BFA_IOC_HWSEM_TOV
));
701 case IOCPF_E_SEM_ERROR
:
702 bfa_fsm_set_state(iocpf
, bfa_iocpf_sm_fail
);
703 bfa_ioc_pf_hwfailed(ioc
);
706 case IOCPF_E_DISABLE
:
707 bfa_ioc_hw_sem_get_cancel(ioc
);
708 bfa_fsm_set_state(iocpf
, bfa_iocpf_sm_disabling_sync
);
717 bfa_iocpf_sm_hwinit_entry(struct bfa_iocpf
*iocpf
)
719 iocpf
->poll_time
= 0;
720 bfa_ioc_reset(iocpf
->ioc
, false);
723 /* Hardware is being initialized. Interrupts are enabled.
724 * Holding hardware semaphore lock.
727 bfa_iocpf_sm_hwinit(struct bfa_iocpf
*iocpf
, enum iocpf_event event
)
729 struct bfa_ioc
*ioc
= iocpf
->ioc
;
732 case IOCPF_E_FWREADY
:
733 bfa_fsm_set_state(iocpf
, bfa_iocpf_sm_enabling
);
736 case IOCPF_E_TIMEOUT
:
737 bfa_nw_ioc_hw_sem_release(ioc
);
738 bfa_ioc_pf_failed(ioc
);
739 bfa_fsm_set_state(iocpf
, bfa_iocpf_sm_initfail_sync
);
742 case IOCPF_E_DISABLE
:
743 del_timer(&ioc
->iocpf_timer
);
744 bfa_ioc_sync_leave(ioc
);
745 bfa_nw_ioc_hw_sem_release(ioc
);
746 bfa_fsm_set_state(iocpf
, bfa_iocpf_sm_disabled
);
755 bfa_iocpf_sm_enabling_entry(struct bfa_iocpf
*iocpf
)
757 mod_timer(&(iocpf
->ioc
)->iocpf_timer
, jiffies
+
758 msecs_to_jiffies(BFA_IOC_TOV
));
760 * Enable Interrupts before sending fw IOC ENABLE cmd.
762 iocpf
->ioc
->cbfn
->reset_cbfn(iocpf
->ioc
->bfa
);
763 bfa_ioc_send_enable(iocpf
->ioc
);
766 /* Host IOC function is being enabled, awaiting response from firmware.
767 * Semaphore is acquired.
770 bfa_iocpf_sm_enabling(struct bfa_iocpf
*iocpf
, enum iocpf_event event
)
772 struct bfa_ioc
*ioc
= iocpf
->ioc
;
775 case IOCPF_E_FWRSP_ENABLE
:
776 del_timer(&ioc
->iocpf_timer
);
777 bfa_nw_ioc_hw_sem_release(ioc
);
778 bfa_fsm_set_state(iocpf
, bfa_iocpf_sm_ready
);
781 case IOCPF_E_INITFAIL
:
782 del_timer(&ioc
->iocpf_timer
);
785 case IOCPF_E_TIMEOUT
:
786 bfa_nw_ioc_hw_sem_release(ioc
);
787 if (event
== IOCPF_E_TIMEOUT
)
788 bfa_ioc_pf_failed(ioc
);
789 bfa_fsm_set_state(iocpf
, bfa_iocpf_sm_initfail_sync
);
792 case IOCPF_E_DISABLE
:
793 del_timer(&ioc
->iocpf_timer
);
794 bfa_nw_ioc_hw_sem_release(ioc
);
795 bfa_fsm_set_state(iocpf
, bfa_iocpf_sm_disabling
);
804 bfa_iocpf_sm_ready_entry(struct bfa_iocpf
*iocpf
)
806 bfa_ioc_pf_enabled(iocpf
->ioc
);
810 bfa_iocpf_sm_ready(struct bfa_iocpf
*iocpf
, enum iocpf_event event
)
813 case IOCPF_E_DISABLE
:
814 bfa_fsm_set_state(iocpf
, bfa_iocpf_sm_disabling
);
817 case IOCPF_E_GETATTRFAIL
:
818 bfa_fsm_set_state(iocpf
, bfa_iocpf_sm_initfail_sync
);
822 bfa_fsm_set_state(iocpf
, bfa_iocpf_sm_fail_sync
);
831 bfa_iocpf_sm_disabling_entry(struct bfa_iocpf
*iocpf
)
833 mod_timer(&(iocpf
->ioc
)->iocpf_timer
, jiffies
+
834 msecs_to_jiffies(BFA_IOC_TOV
));
835 bfa_ioc_send_disable(iocpf
->ioc
);
838 /* IOC is being disabled */
840 bfa_iocpf_sm_disabling(struct bfa_iocpf
*iocpf
, enum iocpf_event event
)
842 struct bfa_ioc
*ioc
= iocpf
->ioc
;
845 case IOCPF_E_FWRSP_DISABLE
:
846 del_timer(&ioc
->iocpf_timer
);
847 bfa_fsm_set_state(iocpf
, bfa_iocpf_sm_disabling_sync
);
851 del_timer(&ioc
->iocpf_timer
);
854 case IOCPF_E_TIMEOUT
:
855 bfa_ioc_set_cur_ioc_fwstate(ioc
, BFI_IOC_FAIL
);
856 bfa_fsm_set_state(iocpf
, bfa_iocpf_sm_disabling_sync
);
859 case IOCPF_E_FWRSP_ENABLE
:
868 bfa_iocpf_sm_disabling_sync_entry(struct bfa_iocpf
*iocpf
)
870 bfa_ioc_hw_sem_get(iocpf
->ioc
);
873 /* IOC hb ack request is being removed. */
875 bfa_iocpf_sm_disabling_sync(struct bfa_iocpf
*iocpf
, enum iocpf_event event
)
877 struct bfa_ioc
*ioc
= iocpf
->ioc
;
880 case IOCPF_E_SEMLOCKED
:
881 bfa_ioc_sync_leave(ioc
);
882 bfa_nw_ioc_hw_sem_release(ioc
);
883 bfa_fsm_set_state(iocpf
, bfa_iocpf_sm_disabled
);
886 case IOCPF_E_SEM_ERROR
:
887 bfa_fsm_set_state(iocpf
, bfa_iocpf_sm_fail
);
888 bfa_ioc_pf_hwfailed(ioc
);
899 /* IOC disable completion entry. */
901 bfa_iocpf_sm_disabled_entry(struct bfa_iocpf
*iocpf
)
903 bfa_ioc_mbox_flush(iocpf
->ioc
);
904 bfa_ioc_pf_disabled(iocpf
->ioc
);
908 bfa_iocpf_sm_disabled(struct bfa_iocpf
*iocpf
, enum iocpf_event event
)
910 struct bfa_ioc
*ioc
= iocpf
->ioc
;
914 bfa_fsm_set_state(iocpf
, bfa_iocpf_sm_semwait
);
918 bfa_ioc_firmware_unlock(ioc
);
919 bfa_fsm_set_state(iocpf
, bfa_iocpf_sm_reset
);
928 bfa_iocpf_sm_initfail_sync_entry(struct bfa_iocpf
*iocpf
)
930 bfa_nw_ioc_debug_save_ftrc(iocpf
->ioc
);
931 bfa_ioc_hw_sem_get(iocpf
->ioc
);
934 /* Hardware initialization failed. */
936 bfa_iocpf_sm_initfail_sync(struct bfa_iocpf
*iocpf
, enum iocpf_event event
)
938 struct bfa_ioc
*ioc
= iocpf
->ioc
;
941 case IOCPF_E_SEMLOCKED
:
942 bfa_ioc_notify_fail(ioc
);
943 bfa_ioc_sync_leave(ioc
);
944 bfa_ioc_set_cur_ioc_fwstate(ioc
, BFI_IOC_FAIL
);
945 bfa_nw_ioc_hw_sem_release(ioc
);
946 bfa_fsm_set_state(iocpf
, bfa_iocpf_sm_initfail
);
949 case IOCPF_E_SEM_ERROR
:
950 bfa_fsm_set_state(iocpf
, bfa_iocpf_sm_fail
);
951 bfa_ioc_pf_hwfailed(ioc
);
954 case IOCPF_E_DISABLE
:
955 bfa_ioc_hw_sem_get_cancel(ioc
);
956 bfa_fsm_set_state(iocpf
, bfa_iocpf_sm_disabling_sync
);
960 bfa_ioc_hw_sem_get_cancel(ioc
);
961 bfa_ioc_firmware_unlock(ioc
);
962 bfa_fsm_set_state(iocpf
, bfa_iocpf_sm_reset
);
974 bfa_iocpf_sm_initfail_entry(struct bfa_iocpf
*iocpf
)
978 /* Hardware initialization failed. */
980 bfa_iocpf_sm_initfail(struct bfa_iocpf
*iocpf
, enum iocpf_event event
)
982 struct bfa_ioc
*ioc
= iocpf
->ioc
;
985 case IOCPF_E_DISABLE
:
986 bfa_fsm_set_state(iocpf
, bfa_iocpf_sm_disabled
);
990 bfa_ioc_firmware_unlock(ioc
);
991 bfa_fsm_set_state(iocpf
, bfa_iocpf_sm_reset
);
1000 bfa_iocpf_sm_fail_sync_entry(struct bfa_iocpf
*iocpf
)
1003 * Mark IOC as failed in hardware and stop firmware.
1005 bfa_ioc_lpu_stop(iocpf
->ioc
);
1008 * Flush any queued up mailbox requests.
1010 bfa_ioc_mbox_flush(iocpf
->ioc
);
1011 bfa_ioc_hw_sem_get(iocpf
->ioc
);
1014 /* IOC is in failed state. */
1016 bfa_iocpf_sm_fail_sync(struct bfa_iocpf
*iocpf
, enum iocpf_event event
)
1018 struct bfa_ioc
*ioc
= iocpf
->ioc
;
1021 case IOCPF_E_SEMLOCKED
:
1022 bfa_ioc_sync_ack(ioc
);
1023 bfa_ioc_notify_fail(ioc
);
1024 if (!iocpf
->auto_recover
) {
1025 bfa_ioc_sync_leave(ioc
);
1026 bfa_ioc_set_cur_ioc_fwstate(ioc
, BFI_IOC_FAIL
);
1027 bfa_nw_ioc_hw_sem_release(ioc
);
1028 bfa_fsm_set_state(iocpf
, bfa_iocpf_sm_fail
);
1030 if (bfa_ioc_sync_complete(ioc
))
1031 bfa_fsm_set_state(iocpf
, bfa_iocpf_sm_hwinit
);
1033 bfa_nw_ioc_hw_sem_release(ioc
);
1034 bfa_fsm_set_state(iocpf
, bfa_iocpf_sm_semwait
);
1039 case IOCPF_E_SEM_ERROR
:
1040 bfa_fsm_set_state(iocpf
, bfa_iocpf_sm_fail
);
1041 bfa_ioc_pf_hwfailed(ioc
);
1044 case IOCPF_E_DISABLE
:
1045 bfa_ioc_hw_sem_get_cancel(ioc
);
1046 bfa_fsm_set_state(iocpf
, bfa_iocpf_sm_disabling_sync
);
1053 bfa_sm_fault(event
);
1058 bfa_iocpf_sm_fail_entry(struct bfa_iocpf
*iocpf
)
1062 /* IOC is in failed state. */
1064 bfa_iocpf_sm_fail(struct bfa_iocpf
*iocpf
, enum iocpf_event event
)
1067 case IOCPF_E_DISABLE
:
1068 bfa_fsm_set_state(iocpf
, bfa_iocpf_sm_disabled
);
1072 bfa_sm_fault(event
);
1076 /* BFA IOC private functions */
1078 /* Notify common modules registered for notification. */
1080 bfa_ioc_event_notify(struct bfa_ioc
*ioc
, enum bfa_ioc_event event
)
1082 struct bfa_ioc_notify
*notify
;
1084 list_for_each_entry(notify
, &ioc
->notify_q
, qe
)
1085 notify
->cbfn(notify
->cbarg
, event
);
1089 bfa_ioc_disable_comp(struct bfa_ioc
*ioc
)
1091 ioc
->cbfn
->disable_cbfn(ioc
->bfa
);
1092 bfa_ioc_event_notify(ioc
, BFA_IOC_E_DISABLED
);
1096 bfa_nw_ioc_sem_get(void __iomem
*sem_reg
)
1100 #define BFA_SEM_SPINCNT 3000
1102 r32
= readl(sem_reg
);
1104 while ((r32
& 1) && (cnt
< BFA_SEM_SPINCNT
)) {
1107 r32
= readl(sem_reg
);
1117 bfa_nw_ioc_sem_release(void __iomem
*sem_reg
)
1123 /* Clear fwver hdr */
1125 bfa_ioc_fwver_clear(struct bfa_ioc
*ioc
)
1127 u32 pgnum
, pgoff
, loff
= 0;
1130 pgnum
= PSS_SMEM_PGNUM(ioc
->ioc_regs
.smem_pg0
, loff
);
1131 pgoff
= PSS_SMEM_PGOFF(loff
);
1132 writel(pgnum
, ioc
->ioc_regs
.host_page_num_fn
);
1134 for (i
= 0; i
< (sizeof(struct bfi_ioc_image_hdr
) / sizeof(u32
)); i
++) {
1135 writel(0, ioc
->ioc_regs
.smem_page_start
+ loff
);
1136 loff
+= sizeof(u32
);
1142 bfa_ioc_hw_sem_init(struct bfa_ioc
*ioc
)
1144 struct bfi_ioc_image_hdr fwhdr
;
1147 /* Spin on init semaphore to serialize. */
1148 r32
= readl(ioc
->ioc_regs
.ioc_init_sem_reg
);
1151 r32
= readl(ioc
->ioc_regs
.ioc_init_sem_reg
);
1154 fwstate
= bfa_ioc_get_cur_ioc_fwstate(ioc
);
1155 if (fwstate
== BFI_IOC_UNINIT
) {
1156 writel(1, ioc
->ioc_regs
.ioc_init_sem_reg
);
1160 bfa_nw_ioc_fwver_get(ioc
, &fwhdr
);
1162 if (swab32(fwhdr
.exec
) == BFI_FWBOOT_TYPE_NORMAL
) {
1163 writel(1, ioc
->ioc_regs
.ioc_init_sem_reg
);
1167 bfa_ioc_fwver_clear(ioc
);
1168 bfa_ioc_set_cur_ioc_fwstate(ioc
, BFI_IOC_UNINIT
);
1169 bfa_ioc_set_alt_ioc_fwstate(ioc
, BFI_IOC_UNINIT
);
1172 * Try to lock and then unlock the semaphore.
1174 readl(ioc
->ioc_regs
.ioc_sem_reg
);
1175 writel(1, ioc
->ioc_regs
.ioc_sem_reg
);
1177 /* Unlock init semaphore */
1178 writel(1, ioc
->ioc_regs
.ioc_init_sem_reg
);
1182 bfa_ioc_hw_sem_get(struct bfa_ioc
*ioc
)
1187 * First read to the semaphore register will return 0, subsequent reads
1188 * will return 1. Semaphore is released by writing 1 to the register
1190 r32
= readl(ioc
->ioc_regs
.ioc_sem_reg
);
1192 bfa_fsm_send_event(&ioc
->iocpf
, IOCPF_E_SEM_ERROR
);
1196 bfa_fsm_send_event(&ioc
->iocpf
, IOCPF_E_SEMLOCKED
);
1200 mod_timer(&ioc
->sem_timer
, jiffies
+
1201 msecs_to_jiffies(BFA_IOC_HWSEM_TOV
));
1205 bfa_nw_ioc_hw_sem_release(struct bfa_ioc
*ioc
)
1207 writel(1, ioc
->ioc_regs
.ioc_sem_reg
);
1211 bfa_ioc_hw_sem_get_cancel(struct bfa_ioc
*ioc
)
1213 del_timer(&ioc
->sem_timer
);
1216 /* Initialize LPU local memory (aka secondary memory / SRAM) */
1218 bfa_ioc_lmem_init(struct bfa_ioc
*ioc
)
1222 #define PSS_LMEM_INIT_TIME 10000
1224 pss_ctl
= readl(ioc
->ioc_regs
.pss_ctl_reg
);
1225 pss_ctl
&= ~__PSS_LMEM_RESET
;
1226 pss_ctl
|= __PSS_LMEM_INIT_EN
;
1229 * i2c workaround 12.5khz clock
1231 pss_ctl
|= __PSS_I2C_CLK_DIV(3UL);
1232 writel(pss_ctl
, ioc
->ioc_regs
.pss_ctl_reg
);
1235 * wait for memory initialization to be complete
1239 pss_ctl
= readl(ioc
->ioc_regs
.pss_ctl_reg
);
1241 } while (!(pss_ctl
& __PSS_LMEM_INIT_DONE
) && (i
< PSS_LMEM_INIT_TIME
));
1244 * If memory initialization is not successful, IOC timeout will catch
1247 BUG_ON(!(pss_ctl
& __PSS_LMEM_INIT_DONE
));
1249 pss_ctl
&= ~(__PSS_LMEM_INIT_DONE
| __PSS_LMEM_INIT_EN
);
1250 writel(pss_ctl
, ioc
->ioc_regs
.pss_ctl_reg
);
1254 bfa_ioc_lpu_start(struct bfa_ioc
*ioc
)
1259 * Take processor out of reset.
1261 pss_ctl
= readl(ioc
->ioc_regs
.pss_ctl_reg
);
1262 pss_ctl
&= ~__PSS_LPU0_RESET
;
1264 writel(pss_ctl
, ioc
->ioc_regs
.pss_ctl_reg
);
1268 bfa_ioc_lpu_stop(struct bfa_ioc
*ioc
)
1273 * Put processors in reset.
1275 pss_ctl
= readl(ioc
->ioc_regs
.pss_ctl_reg
);
1276 pss_ctl
|= (__PSS_LPU0_RESET
| __PSS_LPU1_RESET
);
1278 writel(pss_ctl
, ioc
->ioc_regs
.pss_ctl_reg
);
1281 /* Get driver and firmware versions. */
1283 bfa_nw_ioc_fwver_get(struct bfa_ioc
*ioc
, struct bfi_ioc_image_hdr
*fwhdr
)
1288 u32
*fwsig
= (u32
*) fwhdr
;
1290 pgnum
= bfa_ioc_smem_pgnum(ioc
, loff
);
1291 writel(pgnum
, ioc
->ioc_regs
.host_page_num_fn
);
1293 for (i
= 0; i
< (sizeof(struct bfi_ioc_image_hdr
) / sizeof(u32
));
1296 swab32(readl(loff
+ ioc
->ioc_regs
.smem_page_start
));
1297 loff
+= sizeof(u32
);
1302 bfa_ioc_fwver_md5_check(struct bfi_ioc_image_hdr
*fwhdr_1
,
1303 struct bfi_ioc_image_hdr
*fwhdr_2
)
1307 for (i
= 0; i
< BFI_IOC_MD5SUM_SZ
; i
++) {
1308 if (fwhdr_1
->md5sum
[i
] != fwhdr_2
->md5sum
[i
])
1315 /* Returns TRUE if major minor and maintenance are same.
1316 * If patch version are same, check for MD5 Checksum to be same.
1319 bfa_ioc_fw_ver_compatible(struct bfi_ioc_image_hdr
*drv_fwhdr
,
1320 struct bfi_ioc_image_hdr
*fwhdr_to_cmp
)
1322 if (drv_fwhdr
->signature
!= fwhdr_to_cmp
->signature
)
1324 if (drv_fwhdr
->fwver
.major
!= fwhdr_to_cmp
->fwver
.major
)
1326 if (drv_fwhdr
->fwver
.minor
!= fwhdr_to_cmp
->fwver
.minor
)
1328 if (drv_fwhdr
->fwver
.maint
!= fwhdr_to_cmp
->fwver
.maint
)
1330 if (drv_fwhdr
->fwver
.patch
== fwhdr_to_cmp
->fwver
.patch
&&
1331 drv_fwhdr
->fwver
.phase
== fwhdr_to_cmp
->fwver
.phase
&&
1332 drv_fwhdr
->fwver
.build
== fwhdr_to_cmp
->fwver
.build
)
1333 return bfa_ioc_fwver_md5_check(drv_fwhdr
, fwhdr_to_cmp
);
1339 bfa_ioc_flash_fwver_valid(struct bfi_ioc_image_hdr
*flash_fwhdr
)
1341 if (flash_fwhdr
->fwver
.major
== 0 || flash_fwhdr
->fwver
.major
== 0xFF)
1348 fwhdr_is_ga(struct bfi_ioc_image_hdr
*fwhdr
)
1350 if (fwhdr
->fwver
.phase
== 0 &&
1351 fwhdr
->fwver
.build
== 0)
1357 /* Returns TRUE if both are compatible and patch of fwhdr_to_cmp is better. */
1358 static enum bfi_ioc_img_ver_cmp
1359 bfa_ioc_fw_ver_patch_cmp(struct bfi_ioc_image_hdr
*base_fwhdr
,
1360 struct bfi_ioc_image_hdr
*fwhdr_to_cmp
)
1362 if (!bfa_ioc_fw_ver_compatible(base_fwhdr
, fwhdr_to_cmp
))
1363 return BFI_IOC_IMG_VER_INCOMP
;
1365 if (fwhdr_to_cmp
->fwver
.patch
> base_fwhdr
->fwver
.patch
)
1366 return BFI_IOC_IMG_VER_BETTER
;
1367 else if (fwhdr_to_cmp
->fwver
.patch
< base_fwhdr
->fwver
.patch
)
1368 return BFI_IOC_IMG_VER_OLD
;
1370 /* GA takes priority over internal builds of the same patch stream.
1371 * At this point major minor maint and patch numbers are same.
1373 if (fwhdr_is_ga(base_fwhdr
))
1374 if (fwhdr_is_ga(fwhdr_to_cmp
))
1375 return BFI_IOC_IMG_VER_SAME
;
1377 return BFI_IOC_IMG_VER_OLD
;
1379 if (fwhdr_is_ga(fwhdr_to_cmp
))
1380 return BFI_IOC_IMG_VER_BETTER
;
1382 if (fwhdr_to_cmp
->fwver
.phase
> base_fwhdr
->fwver
.phase
)
1383 return BFI_IOC_IMG_VER_BETTER
;
1384 else if (fwhdr_to_cmp
->fwver
.phase
< base_fwhdr
->fwver
.phase
)
1385 return BFI_IOC_IMG_VER_OLD
;
1387 if (fwhdr_to_cmp
->fwver
.build
> base_fwhdr
->fwver
.build
)
1388 return BFI_IOC_IMG_VER_BETTER
;
1389 else if (fwhdr_to_cmp
->fwver
.build
< base_fwhdr
->fwver
.build
)
1390 return BFI_IOC_IMG_VER_OLD
;
1392 /* All Version Numbers are equal.
1393 * Md5 check to be done as a part of compatibility check.
1395 return BFI_IOC_IMG_VER_SAME
;
1398 /* register definitions */
1399 #define FLI_CMD_REG 0x0001d000
1400 #define FLI_WRDATA_REG 0x0001d00c
1401 #define FLI_RDDATA_REG 0x0001d010
1402 #define FLI_ADDR_REG 0x0001d004
1403 #define FLI_DEV_STATUS_REG 0x0001d014
1405 #define BFA_FLASH_FIFO_SIZE 128 /* fifo size */
1406 #define BFA_FLASH_CHECK_MAX 10000 /* max # of status check */
1407 #define BFA_FLASH_BLOCKING_OP_MAX 1000000 /* max # of blocking op check */
1408 #define BFA_FLASH_WIP_MASK 0x01 /* write in progress bit mask */
1410 #define NFC_STATE_RUNNING 0x20000001
1411 #define NFC_STATE_PAUSED 0x00004560
1412 #define NFC_VER_VALID 0x147
1414 enum bfa_flash_cmd
{
1415 BFA_FLASH_FAST_READ
= 0x0b, /* fast read */
1416 BFA_FLASH_WRITE_ENABLE
= 0x06, /* write enable */
1417 BFA_FLASH_SECTOR_ERASE
= 0xd8, /* sector erase */
1418 BFA_FLASH_WRITE
= 0x02, /* write */
1419 BFA_FLASH_READ_STATUS
= 0x05, /* read status */
1422 /* hardware error definition */
1423 enum bfa_flash_err
{
1424 BFA_FLASH_NOT_PRESENT
= -1, /*!< flash not present */
1425 BFA_FLASH_UNINIT
= -2, /*!< flash not initialized */
1426 BFA_FLASH_BAD
= -3, /*!< flash bad */
1427 BFA_FLASH_BUSY
= -4, /*!< flash busy */
1428 BFA_FLASH_ERR_CMD_ACT
= -5, /*!< command active never cleared */
1429 BFA_FLASH_ERR_FIFO_CNT
= -6, /*!< fifo count never cleared */
1430 BFA_FLASH_ERR_WIP
= -7, /*!< write-in-progress never cleared */
1431 BFA_FLASH_ERR_TIMEOUT
= -8, /*!< fli timeout */
1432 BFA_FLASH_ERR_LEN
= -9, /*!< invalid length */
1435 /* flash command register data structure */
1436 union bfa_flash_cmd_reg
{
1457 /* flash device status register data structure */
1458 union bfa_flash_dev_status_reg
{
1481 /* flash address register data structure */
1482 union bfa_flash_addr_reg
{
1495 /* Flash raw private functions */
1497 bfa_flash_set_cmd(void __iomem
*pci_bar
, u8 wr_cnt
,
1498 u8 rd_cnt
, u8 ad_cnt
, u8 op
)
1500 union bfa_flash_cmd_reg cmd
;
1504 cmd
.r
.write_cnt
= wr_cnt
;
1505 cmd
.r
.read_cnt
= rd_cnt
;
1506 cmd
.r
.addr_cnt
= ad_cnt
;
1508 writel(cmd
.i
, (pci_bar
+ FLI_CMD_REG
));
1512 bfa_flash_set_addr(void __iomem
*pci_bar
, u32 address
)
1514 union bfa_flash_addr_reg addr
;
1516 addr
.r
.addr
= address
& 0x00ffffff;
1518 writel(addr
.i
, (pci_bar
+ FLI_ADDR_REG
));
1522 bfa_flash_cmd_act_check(void __iomem
*pci_bar
)
1524 union bfa_flash_cmd_reg cmd
;
1526 cmd
.i
= readl(pci_bar
+ FLI_CMD_REG
);
1529 return BFA_FLASH_ERR_CMD_ACT
;
1534 /* Flush FLI data fifo. */
1536 bfa_flash_fifo_flush(void __iomem
*pci_bar
)
1540 union bfa_flash_dev_status_reg dev_status
;
1542 dev_status
.i
= readl(pci_bar
+ FLI_DEV_STATUS_REG
);
1544 if (!dev_status
.r
.fifo_cnt
)
1547 /* fifo counter in terms of words */
1548 for (i
= 0; i
< dev_status
.r
.fifo_cnt
; i
++)
1549 t
= readl(pci_bar
+ FLI_RDDATA_REG
);
1551 /* Check the device status. It may take some time. */
1552 for (i
= 0; i
< BFA_FLASH_CHECK_MAX
; i
++) {
1553 dev_status
.i
= readl(pci_bar
+ FLI_DEV_STATUS_REG
);
1554 if (!dev_status
.r
.fifo_cnt
)
1558 if (dev_status
.r
.fifo_cnt
)
1559 return BFA_FLASH_ERR_FIFO_CNT
;
1564 /* Read flash status. */
1566 bfa_flash_status_read(void __iomem
*pci_bar
)
1568 union bfa_flash_dev_status_reg dev_status
;
1573 status
= bfa_flash_fifo_flush(pci_bar
);
1577 bfa_flash_set_cmd(pci_bar
, 0, 4, 0, BFA_FLASH_READ_STATUS
);
1579 for (i
= 0; i
< BFA_FLASH_CHECK_MAX
; i
++) {
1580 status
= bfa_flash_cmd_act_check(pci_bar
);
1588 dev_status
.i
= readl(pci_bar
+ FLI_DEV_STATUS_REG
);
1589 if (!dev_status
.r
.fifo_cnt
)
1590 return BFA_FLASH_BUSY
;
1592 ret_status
= readl(pci_bar
+ FLI_RDDATA_REG
);
1595 status
= bfa_flash_fifo_flush(pci_bar
);
1602 /* Start flash read operation. */
1604 bfa_flash_read_start(void __iomem
*pci_bar
, u32 offset
, u32 len
,
1609 /* len must be mutiple of 4 and not exceeding fifo size */
1610 if (len
== 0 || len
> BFA_FLASH_FIFO_SIZE
|| (len
& 0x03) != 0)
1611 return BFA_FLASH_ERR_LEN
;
1614 status
= bfa_flash_status_read(pci_bar
);
1615 if (status
== BFA_FLASH_BUSY
)
1616 status
= bfa_flash_status_read(pci_bar
);
1621 /* check if write-in-progress bit is cleared */
1622 if (status
& BFA_FLASH_WIP_MASK
)
1623 return BFA_FLASH_ERR_WIP
;
1625 bfa_flash_set_addr(pci_bar
, offset
);
1627 bfa_flash_set_cmd(pci_bar
, 0, (u8
)len
, 4, BFA_FLASH_FAST_READ
);
1632 /* Check flash read operation. */
1634 bfa_flash_read_check(void __iomem
*pci_bar
)
1636 if (bfa_flash_cmd_act_check(pci_bar
))
1642 /* End flash read operation. */
1644 bfa_flash_read_end(void __iomem
*pci_bar
, u32 len
, char *buf
)
1648 /* read data fifo up to 32 words */
1649 for (i
= 0; i
< len
; i
+= 4) {
1650 u32 w
= readl(pci_bar
+ FLI_RDDATA_REG
);
1651 *((u32
*)(buf
+ i
)) = swab32(w
);
1654 bfa_flash_fifo_flush(pci_bar
);
1657 /* Perform flash raw read. */
1659 #define FLASH_BLOCKING_OP_MAX 500
1660 #define FLASH_SEM_LOCK_REG 0x18820
1663 bfa_raw_sem_get(void __iomem
*bar
)
1667 locked
= readl(bar
+ FLASH_SEM_LOCK_REG
);
1672 static enum bfa_status
1673 bfa_flash_sem_get(void __iomem
*bar
)
1675 u32 n
= FLASH_BLOCKING_OP_MAX
;
1677 while (!bfa_raw_sem_get(bar
)) {
1679 return BFA_STATUS_BADFLASH
;
1682 return BFA_STATUS_OK
;
1686 bfa_flash_sem_put(void __iomem
*bar
)
1688 writel(0, (bar
+ FLASH_SEM_LOCK_REG
));
1691 static enum bfa_status
1692 bfa_flash_raw_read(void __iomem
*pci_bar
, u32 offset
, char *buf
,
1697 u32 off
, l
, s
, residue
, fifo_sz
;
1701 fifo_sz
= BFA_FLASH_FIFO_SIZE
;
1702 status
= bfa_flash_sem_get(pci_bar
);
1703 if (status
!= BFA_STATUS_OK
)
1709 l
= (n
+ 1) * fifo_sz
- s
;
1713 status
= bfa_flash_read_start(pci_bar
, offset
+ off
, l
,
1716 bfa_flash_sem_put(pci_bar
);
1717 return BFA_STATUS_FAILED
;
1720 n
= BFA_FLASH_BLOCKING_OP_MAX
;
1721 while (bfa_flash_read_check(pci_bar
)) {
1723 bfa_flash_sem_put(pci_bar
);
1724 return BFA_STATUS_FAILED
;
1728 bfa_flash_read_end(pci_bar
, l
, &buf
[off
]);
1733 bfa_flash_sem_put(pci_bar
);
1735 return BFA_STATUS_OK
;
1738 #define BFA_FLASH_PART_FWIMG_ADDR 0x100000 /* fw image address */
1740 static enum bfa_status
1741 bfa_nw_ioc_flash_img_get_chnk(struct bfa_ioc
*ioc
, u32 off
,
1744 return bfa_flash_raw_read(ioc
->pcidev
.pci_bar_kva
,
1745 BFA_FLASH_PART_FWIMG_ADDR
+ (off
* sizeof(u32
)),
1746 (char *)fwimg
, BFI_FLASH_CHUNK_SZ
);
1749 static enum bfi_ioc_img_ver_cmp
1750 bfa_ioc_flash_fwver_cmp(struct bfa_ioc
*ioc
,
1751 struct bfi_ioc_image_hdr
*base_fwhdr
)
1753 struct bfi_ioc_image_hdr
*flash_fwhdr
;
1754 enum bfa_status status
;
1755 u32 fwimg
[BFI_FLASH_CHUNK_SZ_WORDS
];
1757 status
= bfa_nw_ioc_flash_img_get_chnk(ioc
, 0, fwimg
);
1758 if (status
!= BFA_STATUS_OK
)
1759 return BFI_IOC_IMG_VER_INCOMP
;
1761 flash_fwhdr
= (struct bfi_ioc_image_hdr
*)fwimg
;
1762 if (bfa_ioc_flash_fwver_valid(flash_fwhdr
))
1763 return bfa_ioc_fw_ver_patch_cmp(base_fwhdr
, flash_fwhdr
);
1765 return BFI_IOC_IMG_VER_INCOMP
;
1769 * Returns TRUE if driver is willing to work with current smem f/w version.
1772 bfa_nw_ioc_fwver_cmp(struct bfa_ioc
*ioc
, struct bfi_ioc_image_hdr
*fwhdr
)
1774 struct bfi_ioc_image_hdr
*drv_fwhdr
;
1775 enum bfi_ioc_img_ver_cmp smem_flash_cmp
, drv_smem_cmp
;
1777 drv_fwhdr
= (struct bfi_ioc_image_hdr
*)
1778 bfa_cb_image_get_chunk(bfa_ioc_asic_gen(ioc
), 0);
1780 /* If smem is incompatible or old, driver should not work with it. */
1781 drv_smem_cmp
= bfa_ioc_fw_ver_patch_cmp(drv_fwhdr
, fwhdr
);
1782 if (drv_smem_cmp
== BFI_IOC_IMG_VER_INCOMP
||
1783 drv_smem_cmp
== BFI_IOC_IMG_VER_OLD
) {
1787 /* IF Flash has a better F/W than smem do not work with smem.
1788 * If smem f/w == flash f/w, as smem f/w not old | incmp, work with it.
1789 * If Flash is old or incomp work with smem iff smem f/w == drv f/w.
1791 smem_flash_cmp
= bfa_ioc_flash_fwver_cmp(ioc
, fwhdr
);
1793 if (smem_flash_cmp
== BFI_IOC_IMG_VER_BETTER
)
1795 else if (smem_flash_cmp
== BFI_IOC_IMG_VER_SAME
)
1798 return (drv_smem_cmp
== BFI_IOC_IMG_VER_SAME
) ?
1802 /* Return true if current running version is valid. Firmware signature and
1803 * execution context (driver/bios) must match.
1806 bfa_ioc_fwver_valid(struct bfa_ioc
*ioc
, u32 boot_env
)
1808 struct bfi_ioc_image_hdr fwhdr
;
1810 bfa_nw_ioc_fwver_get(ioc
, &fwhdr
);
1811 if (swab32(fwhdr
.bootenv
) != boot_env
)
1814 return bfa_nw_ioc_fwver_cmp(ioc
, &fwhdr
);
1817 /* Conditionally flush any pending message from firmware at start. */
1819 bfa_ioc_msgflush(struct bfa_ioc
*ioc
)
1823 r32
= readl(ioc
->ioc_regs
.lpu_mbox_cmd
);
1825 writel(1, ioc
->ioc_regs
.lpu_mbox_cmd
);
1829 bfa_ioc_hwinit(struct bfa_ioc
*ioc
, bool force
)
1831 enum bfi_ioc_state ioc_fwstate
;
1835 ioc_fwstate
= bfa_ioc_get_cur_ioc_fwstate(ioc
);
1838 ioc_fwstate
= BFI_IOC_UNINIT
;
1840 boot_env
= BFI_FWBOOT_ENV_OS
;
1843 * check if firmware is valid
1845 fwvalid
= (ioc_fwstate
== BFI_IOC_UNINIT
) ?
1846 false : bfa_ioc_fwver_valid(ioc
, boot_env
);
1849 if (bfa_ioc_boot(ioc
, BFI_FWBOOT_TYPE_NORMAL
, boot_env
) ==
1851 bfa_ioc_poll_fwinit(ioc
);
1857 * If hardware initialization is in progress (initialized by other IOC),
1858 * just wait for an initialization completion interrupt.
1860 if (ioc_fwstate
== BFI_IOC_INITING
) {
1861 bfa_ioc_poll_fwinit(ioc
);
1866 * If IOC function is disabled and firmware version is same,
1867 * just re-enable IOC.
1869 if (ioc_fwstate
== BFI_IOC_DISABLED
|| ioc_fwstate
== BFI_IOC_OP
) {
1871 * When using MSI-X any pending firmware ready event should
1872 * be flushed. Otherwise MSI-X interrupts are not delivered.
1874 bfa_ioc_msgflush(ioc
);
1875 bfa_fsm_send_event(&ioc
->iocpf
, IOCPF_E_FWREADY
);
1880 * Initialize the h/w for any other states.
1882 if (bfa_ioc_boot(ioc
, BFI_FWBOOT_TYPE_NORMAL
, boot_env
) ==
1884 bfa_ioc_poll_fwinit(ioc
);
1888 bfa_nw_ioc_timeout(struct bfa_ioc
*ioc
)
1890 bfa_fsm_send_event(ioc
, IOC_E_TIMEOUT
);
1894 bfa_ioc_mbox_send(struct bfa_ioc
*ioc
, void *ioc_msg
, int len
)
1896 u32
*msgp
= (u32
*) ioc_msg
;
1899 BUG_ON(!(len
<= BFI_IOC_MSGLEN_MAX
));
1902 * first write msg to mailbox registers
1904 for (i
= 0; i
< len
/ sizeof(u32
); i
++)
1905 writel(cpu_to_le32(msgp
[i
]),
1906 ioc
->ioc_regs
.hfn_mbox
+ i
* sizeof(u32
));
1908 for (; i
< BFI_IOC_MSGLEN_MAX
/ sizeof(u32
); i
++)
1909 writel(0, ioc
->ioc_regs
.hfn_mbox
+ i
* sizeof(u32
));
1912 * write 1 to mailbox CMD to trigger LPU event
1914 writel(1, ioc
->ioc_regs
.hfn_mbox_cmd
);
1915 (void) readl(ioc
->ioc_regs
.hfn_mbox_cmd
);
1919 bfa_ioc_send_enable(struct bfa_ioc
*ioc
)
1921 struct bfi_ioc_ctrl_req enable_req
;
1923 bfi_h2i_set(enable_req
.mh
, BFI_MC_IOC
, BFI_IOC_H2I_ENABLE_REQ
,
1924 bfa_ioc_portid(ioc
));
1925 enable_req
.clscode
= htons(ioc
->clscode
);
1926 enable_req
.rsvd
= htons(0);
1927 /* overflow in 2106 */
1928 enable_req
.tv_sec
= ntohl(ktime_get_real_seconds());
1929 bfa_ioc_mbox_send(ioc
, &enable_req
, sizeof(struct bfi_ioc_ctrl_req
));
1933 bfa_ioc_send_disable(struct bfa_ioc
*ioc
)
1935 struct bfi_ioc_ctrl_req disable_req
;
1937 bfi_h2i_set(disable_req
.mh
, BFI_MC_IOC
, BFI_IOC_H2I_DISABLE_REQ
,
1938 bfa_ioc_portid(ioc
));
1939 disable_req
.clscode
= htons(ioc
->clscode
);
1940 disable_req
.rsvd
= htons(0);
1941 /* overflow in 2106 */
1942 disable_req
.tv_sec
= ntohl(ktime_get_real_seconds());
1943 bfa_ioc_mbox_send(ioc
, &disable_req
, sizeof(struct bfi_ioc_ctrl_req
));
1947 bfa_ioc_send_getattr(struct bfa_ioc
*ioc
)
1949 struct bfi_ioc_getattr_req attr_req
;
1951 bfi_h2i_set(attr_req
.mh
, BFI_MC_IOC
, BFI_IOC_H2I_GETATTR_REQ
,
1952 bfa_ioc_portid(ioc
));
1953 bfa_dma_be_addr_set(attr_req
.attr_addr
, ioc
->attr_dma
.pa
);
1954 bfa_ioc_mbox_send(ioc
, &attr_req
, sizeof(attr_req
));
1958 bfa_nw_ioc_hb_check(struct bfa_ioc
*ioc
)
1962 hb_count
= readl(ioc
->ioc_regs
.heartbeat
);
1963 if (ioc
->hb_count
== hb_count
) {
1964 bfa_ioc_recover(ioc
);
1967 ioc
->hb_count
= hb_count
;
1970 bfa_ioc_mbox_poll(ioc
);
1971 mod_timer(&ioc
->hb_timer
, jiffies
+
1972 msecs_to_jiffies(BFA_IOC_HB_TOV
));
1976 bfa_ioc_hb_monitor(struct bfa_ioc
*ioc
)
1978 ioc
->hb_count
= readl(ioc
->ioc_regs
.heartbeat
);
1979 mod_timer(&ioc
->hb_timer
, jiffies
+
1980 msecs_to_jiffies(BFA_IOC_HB_TOV
));
1984 bfa_ioc_hb_stop(struct bfa_ioc
*ioc
)
1986 del_timer(&ioc
->hb_timer
);
1989 /* Initiate a full firmware download. */
1990 static enum bfa_status
1991 bfa_ioc_download_fw(struct bfa_ioc
*ioc
, u32 boot_type
,
2001 u32 fwimg_buf
[BFI_FLASH_CHUNK_SZ_WORDS
];
2002 enum bfa_status status
;
2004 if (boot_env
== BFI_FWBOOT_ENV_OS
&&
2005 boot_type
== BFI_FWBOOT_TYPE_FLASH
) {
2006 fwimg_size
= BFI_FLASH_IMAGE_SZ
/sizeof(u32
);
2008 status
= bfa_nw_ioc_flash_img_get_chnk(ioc
,
2009 BFA_IOC_FLASH_CHUNK_ADDR(chunkno
), fwimg_buf
);
2010 if (status
!= BFA_STATUS_OK
)
2015 fwimg_size
= bfa_cb_image_get_size(bfa_ioc_asic_gen(ioc
));
2016 fwimg
= bfa_cb_image_get_chunk(bfa_ioc_asic_gen(ioc
),
2017 BFA_IOC_FLASH_CHUNK_ADDR(chunkno
));
2020 pgnum
= bfa_ioc_smem_pgnum(ioc
, loff
);
2022 writel(pgnum
, ioc
->ioc_regs
.host_page_num_fn
);
2024 for (i
= 0; i
< fwimg_size
; i
++) {
2025 if (BFA_IOC_FLASH_CHUNK_NO(i
) != chunkno
) {
2026 chunkno
= BFA_IOC_FLASH_CHUNK_NO(i
);
2027 if (boot_env
== BFI_FWBOOT_ENV_OS
&&
2028 boot_type
== BFI_FWBOOT_TYPE_FLASH
) {
2029 status
= bfa_nw_ioc_flash_img_get_chnk(ioc
,
2030 BFA_IOC_FLASH_CHUNK_ADDR(chunkno
),
2032 if (status
!= BFA_STATUS_OK
)
2037 fwimg
= bfa_cb_image_get_chunk(
2038 bfa_ioc_asic_gen(ioc
),
2039 BFA_IOC_FLASH_CHUNK_ADDR(chunkno
));
2046 writel(swab32(fwimg
[BFA_IOC_FLASH_OFFSET_IN_CHUNK(i
)]),
2047 ioc
->ioc_regs
.smem_page_start
+ loff
);
2049 loff
+= sizeof(u32
);
2052 * handle page offset wrap around
2054 loff
= PSS_SMEM_PGOFF(loff
);
2058 ioc
->ioc_regs
.host_page_num_fn
);
2062 writel(bfa_ioc_smem_pgnum(ioc
, 0),
2063 ioc
->ioc_regs
.host_page_num_fn
);
2066 * Set boot type, env and device mode at the end.
2068 if (boot_env
== BFI_FWBOOT_ENV_OS
&&
2069 boot_type
== BFI_FWBOOT_TYPE_FLASH
) {
2070 boot_type
= BFI_FWBOOT_TYPE_NORMAL
;
2072 asicmode
= BFI_FWBOOT_DEVMODE(ioc
->asic_gen
, ioc
->asic_mode
,
2073 ioc
->port0_mode
, ioc
->port1_mode
);
2074 writel(asicmode
, ((ioc
->ioc_regs
.smem_page_start
)
2075 + BFI_FWBOOT_DEVMODE_OFF
));
2076 writel(boot_type
, ((ioc
->ioc_regs
.smem_page_start
)
2077 + (BFI_FWBOOT_TYPE_OFF
)));
2078 writel(boot_env
, ((ioc
->ioc_regs
.smem_page_start
)
2079 + (BFI_FWBOOT_ENV_OFF
)));
2080 return BFA_STATUS_OK
;
2084 bfa_ioc_reset(struct bfa_ioc
*ioc
, bool force
)
2086 bfa_ioc_hwinit(ioc
, force
);
2089 /* BFA ioc enable reply by firmware */
2091 bfa_ioc_enable_reply(struct bfa_ioc
*ioc
, enum bfa_mode port_mode
,
2094 struct bfa_iocpf
*iocpf
= &ioc
->iocpf
;
2096 ioc
->port_mode
= ioc
->port_mode_cfg
= port_mode
;
2097 ioc
->ad_cap_bm
= cap_bm
;
2098 bfa_fsm_send_event(iocpf
, IOCPF_E_FWRSP_ENABLE
);
2101 /* Update BFA configuration from firmware configuration. */
2103 bfa_ioc_getattr_reply(struct bfa_ioc
*ioc
)
2105 struct bfi_ioc_attr
*attr
= ioc
->attr
;
2107 attr
->adapter_prop
= ntohl(attr
->adapter_prop
);
2108 attr
->card_type
= ntohl(attr
->card_type
);
2109 attr
->maxfrsize
= ntohs(attr
->maxfrsize
);
2111 bfa_fsm_send_event(ioc
, IOC_E_FWRSP_GETATTR
);
2114 /* Attach time initialization of mbox logic. */
2116 bfa_ioc_mbox_attach(struct bfa_ioc
*ioc
)
2118 struct bfa_ioc_mbox_mod
*mod
= &ioc
->mbox_mod
;
2121 INIT_LIST_HEAD(&mod
->cmd_q
);
2122 for (mc
= 0; mc
< BFI_MC_MAX
; mc
++) {
2123 mod
->mbhdlr
[mc
].cbfn
= NULL
;
2124 mod
->mbhdlr
[mc
].cbarg
= ioc
->bfa
;
2128 /* Mbox poll timer -- restarts any pending mailbox requests. */
2130 bfa_ioc_mbox_poll(struct bfa_ioc
*ioc
)
2132 struct bfa_ioc_mbox_mod
*mod
= &ioc
->mbox_mod
;
2133 struct bfa_mbox_cmd
*cmd
;
2134 bfa_mbox_cmd_cbfn_t cbfn
;
2139 * If no command pending, do nothing
2141 if (list_empty(&mod
->cmd_q
))
2145 * If previous command is not yet fetched by firmware, do nothing
2147 stat
= readl(ioc
->ioc_regs
.hfn_mbox_cmd
);
2152 * Enqueue command to firmware.
2154 cmd
= list_first_entry(&mod
->cmd_q
, struct bfa_mbox_cmd
, qe
);
2156 bfa_ioc_mbox_send(ioc
, cmd
->msg
, sizeof(cmd
->msg
));
2159 * Give a callback to the client, indicating that the command is sent
2169 /* Cleanup any pending requests. */
2171 bfa_ioc_mbox_flush(struct bfa_ioc
*ioc
)
2173 struct bfa_ioc_mbox_mod
*mod
= &ioc
->mbox_mod
;
2174 struct bfa_mbox_cmd
*cmd
;
2176 while (!list_empty(&mod
->cmd_q
)) {
2177 cmd
= list_first_entry(&mod
->cmd_q
, struct bfa_mbox_cmd
, qe
);
2183 * bfa_nw_ioc_smem_read - Read data from SMEM to host through PCI memmap
2185 * @ioc: memory for IOC
2186 * @tbuf: app memory to store data from smem
2187 * @soff: smem offset
2188 * @sz: size of smem in bytes
2191 bfa_nw_ioc_smem_read(struct bfa_ioc
*ioc
, void *tbuf
, u32 soff
, u32 sz
)
2193 u32 pgnum
, loff
, r32
;
2197 pgnum
= PSS_SMEM_PGNUM(ioc
->ioc_regs
.smem_pg0
, soff
);
2198 loff
= PSS_SMEM_PGOFF(soff
);
2201 * Hold semaphore to serialize pll init and fwtrc.
2203 if (!bfa_nw_ioc_sem_get(ioc
->ioc_regs
.ioc_init_sem_reg
))
2206 writel(pgnum
, ioc
->ioc_regs
.host_page_num_fn
);
2208 len
= sz
/sizeof(u32
);
2209 for (i
= 0; i
< len
; i
++) {
2210 r32
= swab32(readl(loff
+ ioc
->ioc_regs
.smem_page_start
));
2211 buf
[i
] = be32_to_cpu(r32
);
2212 loff
+= sizeof(u32
);
2215 * handle page offset wrap around
2217 loff
= PSS_SMEM_PGOFF(loff
);
2220 writel(pgnum
, ioc
->ioc_regs
.host_page_num_fn
);
2224 writel(PSS_SMEM_PGNUM(ioc
->ioc_regs
.smem_pg0
, 0),
2225 ioc
->ioc_regs
.host_page_num_fn
);
2230 readl(ioc
->ioc_regs
.ioc_init_sem_reg
);
2231 writel(1, ioc
->ioc_regs
.ioc_init_sem_reg
);
2235 /* Retrieve saved firmware trace from a prior IOC failure. */
2237 bfa_nw_ioc_debug_fwtrc(struct bfa_ioc
*ioc
, void *trcdata
, int *trclen
)
2239 u32 loff
= BFI_IOC_TRC_OFF
+ BNA_DBG_FWTRC_LEN
* ioc
->port_id
;
2240 int tlen
, status
= 0;
2243 if (tlen
> BNA_DBG_FWTRC_LEN
)
2244 tlen
= BNA_DBG_FWTRC_LEN
;
2246 status
= bfa_nw_ioc_smem_read(ioc
, trcdata
, loff
, tlen
);
2251 /* Save firmware trace if configured. */
2253 bfa_nw_ioc_debug_save_ftrc(struct bfa_ioc
*ioc
)
2257 if (ioc
->dbg_fwsave_once
) {
2258 ioc
->dbg_fwsave_once
= false;
2259 if (ioc
->dbg_fwsave_len
) {
2260 tlen
= ioc
->dbg_fwsave_len
;
2261 bfa_nw_ioc_debug_fwtrc(ioc
, ioc
->dbg_fwsave
, &tlen
);
2266 /* Retrieve saved firmware trace from a prior IOC failure. */
2268 bfa_nw_ioc_debug_fwsave(struct bfa_ioc
*ioc
, void *trcdata
, int *trclen
)
2272 if (ioc
->dbg_fwsave_len
== 0)
2273 return BFA_STATUS_ENOFSAVE
;
2276 if (tlen
> ioc
->dbg_fwsave_len
)
2277 tlen
= ioc
->dbg_fwsave_len
;
2279 memcpy(trcdata
, ioc
->dbg_fwsave
, tlen
);
2281 return BFA_STATUS_OK
;
2285 bfa_ioc_fail_notify(struct bfa_ioc
*ioc
)
2288 * Notify driver and common modules registered for notification.
2290 ioc
->cbfn
->hbfail_cbfn(ioc
->bfa
);
2291 bfa_ioc_event_notify(ioc
, BFA_IOC_E_FAILED
);
2292 bfa_nw_ioc_debug_save_ftrc(ioc
);
2295 /* IOCPF to IOC interface */
2297 bfa_ioc_pf_enabled(struct bfa_ioc
*ioc
)
2299 bfa_fsm_send_event(ioc
, IOC_E_ENABLED
);
2303 bfa_ioc_pf_disabled(struct bfa_ioc
*ioc
)
2305 bfa_fsm_send_event(ioc
, IOC_E_DISABLED
);
2309 bfa_ioc_pf_failed(struct bfa_ioc
*ioc
)
2311 bfa_fsm_send_event(ioc
, IOC_E_PFFAILED
);
2315 bfa_ioc_pf_hwfailed(struct bfa_ioc
*ioc
)
2317 bfa_fsm_send_event(ioc
, IOC_E_HWFAILED
);
2321 bfa_ioc_pf_fwmismatch(struct bfa_ioc
*ioc
)
2324 * Provide enable completion callback and AEN notification.
2326 ioc
->cbfn
->enable_cbfn(ioc
->bfa
, BFA_STATUS_IOC_FAILURE
);
2330 static enum bfa_status
2331 bfa_ioc_pll_init(struct bfa_ioc
*ioc
)
2334 * Hold semaphore so that nobody can access the chip during init.
2336 bfa_nw_ioc_sem_get(ioc
->ioc_regs
.ioc_init_sem_reg
);
2338 bfa_ioc_pll_init_asic(ioc
);
2340 ioc
->pllinit
= true;
2342 /* Initialize LMEM */
2343 bfa_ioc_lmem_init(ioc
);
2346 * release semaphore.
2348 bfa_nw_ioc_sem_release(ioc
->ioc_regs
.ioc_init_sem_reg
);
2350 return BFA_STATUS_OK
;
2353 /* Interface used by diag module to do firmware boot with memory test
2354 * as the entry vector.
2356 static enum bfa_status
2357 bfa_ioc_boot(struct bfa_ioc
*ioc
, enum bfi_fwboot_type boot_type
,
2360 struct bfi_ioc_image_hdr
*drv_fwhdr
;
2361 enum bfa_status status
;
2362 bfa_ioc_stats(ioc
, ioc_boots
);
2364 if (bfa_ioc_pll_init(ioc
) != BFA_STATUS_OK
)
2365 return BFA_STATUS_FAILED
;
2366 if (boot_env
== BFI_FWBOOT_ENV_OS
&&
2367 boot_type
== BFI_FWBOOT_TYPE_NORMAL
) {
2368 drv_fwhdr
= (struct bfi_ioc_image_hdr
*)
2369 bfa_cb_image_get_chunk(bfa_ioc_asic_gen(ioc
), 0);
2370 /* Work with Flash iff flash f/w is better than driver f/w.
2371 * Otherwise push drivers firmware.
2373 if (bfa_ioc_flash_fwver_cmp(ioc
, drv_fwhdr
) ==
2374 BFI_IOC_IMG_VER_BETTER
)
2375 boot_type
= BFI_FWBOOT_TYPE_FLASH
;
2379 * Initialize IOC state of all functions on a chip reset.
2381 if (boot_type
== BFI_FWBOOT_TYPE_MEMTEST
) {
2382 bfa_ioc_set_cur_ioc_fwstate(ioc
, BFI_IOC_MEMTEST
);
2383 bfa_ioc_set_alt_ioc_fwstate(ioc
, BFI_IOC_MEMTEST
);
2385 bfa_ioc_set_cur_ioc_fwstate(ioc
, BFI_IOC_INITING
);
2386 bfa_ioc_set_alt_ioc_fwstate(ioc
, BFI_IOC_INITING
);
2389 bfa_ioc_msgflush(ioc
);
2390 status
= bfa_ioc_download_fw(ioc
, boot_type
, boot_env
);
2391 if (status
== BFA_STATUS_OK
)
2392 bfa_ioc_lpu_start(ioc
);
2394 bfa_fsm_send_event(&ioc
->iocpf
, IOCPF_E_TIMEOUT
);
2399 /* Enable/disable IOC failure auto recovery. */
2401 bfa_nw_ioc_auto_recover(bool auto_recover
)
2403 bfa_nw_auto_recover
= auto_recover
;
2407 bfa_ioc_msgget(struct bfa_ioc
*ioc
, void *mbmsg
)
2413 r32
= readl(ioc
->ioc_regs
.lpu_mbox_cmd
);
2420 for (i
= 0; i
< (sizeof(union bfi_ioc_i2h_msg_u
) / sizeof(u32
));
2422 r32
= readl(ioc
->ioc_regs
.lpu_mbox
+
2424 msgp
[i
] = htonl(r32
);
2428 * turn off mailbox interrupt by clearing mailbox status
2430 writel(1, ioc
->ioc_regs
.lpu_mbox_cmd
);
2431 readl(ioc
->ioc_regs
.lpu_mbox_cmd
);
2437 bfa_ioc_isr(struct bfa_ioc
*ioc
, struct bfi_mbmsg
*m
)
2439 union bfi_ioc_i2h_msg_u
*msg
;
2440 struct bfa_iocpf
*iocpf
= &ioc
->iocpf
;
2442 msg
= (union bfi_ioc_i2h_msg_u
*) m
;
2444 bfa_ioc_stats(ioc
, ioc_isrs
);
2446 switch (msg
->mh
.msg_id
) {
2447 case BFI_IOC_I2H_HBEAT
:
2450 case BFI_IOC_I2H_ENABLE_REPLY
:
2451 bfa_ioc_enable_reply(ioc
,
2452 (enum bfa_mode
)msg
->fw_event
.port_mode
,
2453 msg
->fw_event
.cap_bm
);
2456 case BFI_IOC_I2H_DISABLE_REPLY
:
2457 bfa_fsm_send_event(iocpf
, IOCPF_E_FWRSP_DISABLE
);
2460 case BFI_IOC_I2H_GETATTR_REPLY
:
2461 bfa_ioc_getattr_reply(ioc
);
2470 * bfa_nw_ioc_attach - IOC attach time initialization and setup.
2472 * @ioc: memory for IOC
2473 * @bfa: driver instance structure
2476 bfa_nw_ioc_attach(struct bfa_ioc
*ioc
, void *bfa
, struct bfa_ioc_cbfn
*cbfn
)
2480 ioc
->fcmode
= false;
2481 ioc
->pllinit
= false;
2482 ioc
->dbg_fwsave_once
= true;
2483 ioc
->iocpf
.ioc
= ioc
;
2485 bfa_ioc_mbox_attach(ioc
);
2486 INIT_LIST_HEAD(&ioc
->notify_q
);
2488 bfa_fsm_set_state(ioc
, bfa_ioc_sm_uninit
);
2489 bfa_fsm_send_event(ioc
, IOC_E_RESET
);
2492 /* Driver detach time IOC cleanup. */
2494 bfa_nw_ioc_detach(struct bfa_ioc
*ioc
)
2496 bfa_fsm_send_event(ioc
, IOC_E_DETACH
);
2498 /* Done with detach, empty the notify_q. */
2499 INIT_LIST_HEAD(&ioc
->notify_q
);
2503 * bfa_nw_ioc_pci_init - Setup IOC PCI properties.
2505 * @pcidev: PCI device information for this IOC
2508 bfa_nw_ioc_pci_init(struct bfa_ioc
*ioc
, struct bfa_pcidev
*pcidev
,
2509 enum bfi_pcifn_class clscode
)
2511 ioc
->clscode
= clscode
;
2512 ioc
->pcidev
= *pcidev
;
2515 * Initialize IOC and device personality
2517 ioc
->port0_mode
= ioc
->port1_mode
= BFI_PORT_MODE_FC
;
2518 ioc
->asic_mode
= BFI_ASIC_MODE_FC
;
2520 switch (pcidev
->device_id
) {
2521 case PCI_DEVICE_ID_BROCADE_CT
:
2522 ioc
->asic_gen
= BFI_ASIC_GEN_CT
;
2523 ioc
->port0_mode
= ioc
->port1_mode
= BFI_PORT_MODE_ETH
;
2524 ioc
->asic_mode
= BFI_ASIC_MODE_ETH
;
2525 ioc
->port_mode
= ioc
->port_mode_cfg
= BFA_MODE_CNA
;
2526 ioc
->ad_cap_bm
= BFA_CM_CNA
;
2529 case BFA_PCI_DEVICE_ID_CT2
:
2530 ioc
->asic_gen
= BFI_ASIC_GEN_CT2
;
2531 if (clscode
== BFI_PCIFN_CLASS_FC
&&
2532 pcidev
->ssid
== BFA_PCI_CT2_SSID_FC
) {
2533 ioc
->asic_mode
= BFI_ASIC_MODE_FC16
;
2535 ioc
->port_mode
= ioc
->port_mode_cfg
= BFA_MODE_HBA
;
2536 ioc
->ad_cap_bm
= BFA_CM_HBA
;
2538 ioc
->port0_mode
= ioc
->port1_mode
= BFI_PORT_MODE_ETH
;
2539 ioc
->asic_mode
= BFI_ASIC_MODE_ETH
;
2540 if (pcidev
->ssid
== BFA_PCI_CT2_SSID_FCoE
) {
2542 ioc
->port_mode_cfg
= BFA_MODE_CNA
;
2543 ioc
->ad_cap_bm
= BFA_CM_CNA
;
2546 ioc
->port_mode_cfg
= BFA_MODE_NIC
;
2547 ioc
->ad_cap_bm
= BFA_CM_NIC
;
2557 * Set asic specific interfaces.
2559 if (ioc
->asic_gen
== BFI_ASIC_GEN_CT
)
2560 bfa_nw_ioc_set_ct_hwif(ioc
);
2562 WARN_ON(ioc
->asic_gen
!= BFI_ASIC_GEN_CT2
);
2563 bfa_nw_ioc_set_ct2_hwif(ioc
);
2564 bfa_nw_ioc_ct2_poweron(ioc
);
2567 bfa_ioc_map_port(ioc
);
2568 bfa_ioc_reg_init(ioc
);
2572 * bfa_nw_ioc_mem_claim - Initialize IOC dma memory
2574 * @dm_kva: kernel virtual address of IOC dma memory
2575 * @dm_pa: physical address of IOC dma memory
2578 bfa_nw_ioc_mem_claim(struct bfa_ioc
*ioc
, u8
*dm_kva
, u64 dm_pa
)
2581 * dma memory for firmware attribute
2583 ioc
->attr_dma
.kva
= dm_kva
;
2584 ioc
->attr_dma
.pa
= dm_pa
;
2585 ioc
->attr
= (struct bfi_ioc_attr
*) dm_kva
;
2588 /* Return size of dma memory required. */
2590 bfa_nw_ioc_meminfo(void)
2592 return roundup(sizeof(struct bfi_ioc_attr
), BFA_DMA_ALIGN_SZ
);
2596 bfa_nw_ioc_enable(struct bfa_ioc
*ioc
)
2598 bfa_ioc_stats(ioc
, ioc_enables
);
2599 ioc
->dbg_fwsave_once
= true;
2601 bfa_fsm_send_event(ioc
, IOC_E_ENABLE
);
2605 bfa_nw_ioc_disable(struct bfa_ioc
*ioc
)
2607 bfa_ioc_stats(ioc
, ioc_disables
);
2608 bfa_fsm_send_event(ioc
, IOC_E_DISABLE
);
2611 /* Initialize memory for saving firmware trace. */
2613 bfa_nw_ioc_debug_memclaim(struct bfa_ioc
*ioc
, void *dbg_fwsave
)
2615 ioc
->dbg_fwsave
= dbg_fwsave
;
2616 ioc
->dbg_fwsave_len
= ioc
->iocpf
.auto_recover
? BNA_DBG_FWTRC_LEN
: 0;
2620 bfa_ioc_smem_pgnum(struct bfa_ioc
*ioc
, u32 fmaddr
)
2622 return PSS_SMEM_PGNUM(ioc
->ioc_regs
.smem_pg0
, fmaddr
);
2625 /* Register mailbox message handler function, to be called by common modules */
2627 bfa_nw_ioc_mbox_regisr(struct bfa_ioc
*ioc
, enum bfi_mclass mc
,
2628 bfa_ioc_mbox_mcfunc_t cbfn
, void *cbarg
)
2630 struct bfa_ioc_mbox_mod
*mod
= &ioc
->mbox_mod
;
2632 mod
->mbhdlr
[mc
].cbfn
= cbfn
;
2633 mod
->mbhdlr
[mc
].cbarg
= cbarg
;
2637 * bfa_nw_ioc_mbox_queue - Queue a mailbox command request to firmware.
2639 * @ioc: IOC instance
2640 * @cmd: Mailbox command
2642 * Waits if mailbox is busy. Responsibility of caller to serialize
2645 bfa_nw_ioc_mbox_queue(struct bfa_ioc
*ioc
, struct bfa_mbox_cmd
*cmd
,
2646 bfa_mbox_cmd_cbfn_t cbfn
, void *cbarg
)
2648 struct bfa_ioc_mbox_mod
*mod
= &ioc
->mbox_mod
;
2655 * If a previous command is pending, queue new command
2657 if (!list_empty(&mod
->cmd_q
)) {
2658 list_add_tail(&cmd
->qe
, &mod
->cmd_q
);
2663 * If mailbox is busy, queue command for poll timer
2665 stat
= readl(ioc
->ioc_regs
.hfn_mbox_cmd
);
2667 list_add_tail(&cmd
->qe
, &mod
->cmd_q
);
2672 * mailbox is free -- queue command to firmware
2674 bfa_ioc_mbox_send(ioc
, cmd
->msg
, sizeof(cmd
->msg
));
2679 /* Handle mailbox interrupts */
2681 bfa_nw_ioc_mbox_isr(struct bfa_ioc
*ioc
)
2683 struct bfa_ioc_mbox_mod
*mod
= &ioc
->mbox_mod
;
2687 if (bfa_ioc_msgget(ioc
, &m
)) {
2689 * Treat IOC message class as special.
2691 mc
= m
.mh
.msg_class
;
2692 if (mc
== BFI_MC_IOC
) {
2693 bfa_ioc_isr(ioc
, &m
);
2697 if ((mc
>= BFI_MC_MAX
) || (mod
->mbhdlr
[mc
].cbfn
== NULL
))
2700 mod
->mbhdlr
[mc
].cbfn(mod
->mbhdlr
[mc
].cbarg
, &m
);
2703 bfa_ioc_lpu_read_stat(ioc
);
2706 * Try to send pending mailbox commands
2708 bfa_ioc_mbox_poll(ioc
);
2712 bfa_nw_ioc_error_isr(struct bfa_ioc
*ioc
)
2714 bfa_ioc_stats(ioc
, ioc_hbfails
);
2715 bfa_ioc_stats_hb_count(ioc
, ioc
->hb_count
);
2716 bfa_fsm_send_event(ioc
, IOC_E_HWERROR
);
2719 /* return true if IOC is disabled */
2721 bfa_nw_ioc_is_disabled(struct bfa_ioc
*ioc
)
2723 return bfa_fsm_cmp_state(ioc
, bfa_ioc_sm_disabling
) ||
2724 bfa_fsm_cmp_state(ioc
, bfa_ioc_sm_disabled
);
2727 /* return true if IOC is operational */
2729 bfa_nw_ioc_is_operational(struct bfa_ioc
*ioc
)
2731 return bfa_fsm_cmp_state(ioc
, bfa_ioc_sm_op
);
2734 /* Add to IOC heartbeat failure notification queue. To be used by common
2735 * modules such as cee, port, diag.
2738 bfa_nw_ioc_notify_register(struct bfa_ioc
*ioc
,
2739 struct bfa_ioc_notify
*notify
)
2741 list_add_tail(¬ify
->qe
, &ioc
->notify_q
);
2744 #define BFA_MFG_NAME "QLogic"
2746 bfa_ioc_get_adapter_attr(struct bfa_ioc
*ioc
,
2747 struct bfa_adapter_attr
*ad_attr
)
2749 struct bfi_ioc_attr
*ioc_attr
;
2751 ioc_attr
= ioc
->attr
;
2753 bfa_ioc_get_adapter_serial_num(ioc
, ad_attr
->serial_num
);
2754 bfa_ioc_get_adapter_fw_ver(ioc
, ad_attr
->fw_ver
);
2755 bfa_ioc_get_adapter_optrom_ver(ioc
, ad_attr
->optrom_ver
);
2756 bfa_ioc_get_adapter_manufacturer(ioc
, ad_attr
->manufacturer
);
2757 memcpy(&ad_attr
->vpd
, &ioc_attr
->vpd
,
2758 sizeof(struct bfa_mfg_vpd
));
2760 ad_attr
->nports
= bfa_ioc_get_nports(ioc
);
2761 ad_attr
->max_speed
= bfa_ioc_speed_sup(ioc
);
2763 bfa_ioc_get_adapter_model(ioc
, ad_attr
->model
);
2764 /* For now, model descr uses same model string */
2765 bfa_ioc_get_adapter_model(ioc
, ad_attr
->model_descr
);
2767 ad_attr
->card_type
= ioc_attr
->card_type
;
2768 ad_attr
->is_mezz
= bfa_mfg_is_mezz(ioc_attr
->card_type
);
2770 if (BFI_ADAPTER_IS_SPECIAL(ioc_attr
->adapter_prop
))
2771 ad_attr
->prototype
= 1;
2773 ad_attr
->prototype
= 0;
2775 ad_attr
->pwwn
= bfa_ioc_get_pwwn(ioc
);
2776 bfa_nw_ioc_get_mac(ioc
, ad_attr
->mac
);
2778 ad_attr
->pcie_gen
= ioc_attr
->pcie_gen
;
2779 ad_attr
->pcie_lanes
= ioc_attr
->pcie_lanes
;
2780 ad_attr
->pcie_lanes_orig
= ioc_attr
->pcie_lanes_orig
;
2781 ad_attr
->asic_rev
= ioc_attr
->asic_rev
;
2783 bfa_ioc_get_pci_chip_rev(ioc
, ad_attr
->hw_ver
);
2786 static enum bfa_ioc_type
2787 bfa_ioc_get_type(struct bfa_ioc
*ioc
)
2789 if (ioc
->clscode
== BFI_PCIFN_CLASS_ETH
)
2790 return BFA_IOC_TYPE_LL
;
2792 BUG_ON(!(ioc
->clscode
== BFI_PCIFN_CLASS_FC
));
2794 return (ioc
->attr
->port_mode
== BFI_PORT_MODE_FC
)
2795 ? BFA_IOC_TYPE_FC
: BFA_IOC_TYPE_FCoE
;
2799 bfa_ioc_get_adapter_serial_num(struct bfa_ioc
*ioc
, char *serial_num
)
2802 (void *)ioc
->attr
->brcd_serialnum
,
2803 BFA_ADAPTER_SERIAL_NUM_LEN
);
2807 bfa_ioc_get_adapter_fw_ver(struct bfa_ioc
*ioc
, char *fw_ver
)
2809 memcpy(fw_ver
, ioc
->attr
->fw_version
, BFA_VERSION_LEN
);
2813 bfa_ioc_get_pci_chip_rev(struct bfa_ioc
*ioc
, char *chip_rev
)
2815 BUG_ON(!(chip_rev
));
2817 memset(chip_rev
, 0, BFA_IOC_CHIP_REV_LEN
);
2823 chip_rev
[4] = ioc
->attr
->asic_rev
;
2828 bfa_ioc_get_adapter_optrom_ver(struct bfa_ioc
*ioc
, char *optrom_ver
)
2830 memcpy(optrom_ver
, ioc
->attr
->optrom_version
,
2835 bfa_ioc_get_adapter_manufacturer(struct bfa_ioc
*ioc
, char *manufacturer
)
2837 strncpy(manufacturer
, BFA_MFG_NAME
, BFA_ADAPTER_MFG_NAME_LEN
);
2841 bfa_ioc_get_adapter_model(struct bfa_ioc
*ioc
, char *model
)
2843 struct bfi_ioc_attr
*ioc_attr
;
2846 memset(model
, 0, BFA_ADAPTER_MODEL_NAME_LEN
);
2848 ioc_attr
= ioc
->attr
;
2850 snprintf(model
, BFA_ADAPTER_MODEL_NAME_LEN
, "%s-%u",
2851 BFA_MFG_NAME
, ioc_attr
->card_type
);
2854 static enum bfa_ioc_state
2855 bfa_ioc_get_state(struct bfa_ioc
*ioc
)
2857 enum bfa_iocpf_state iocpf_st
;
2858 enum bfa_ioc_state ioc_st
= bfa_sm_to_state(ioc_sm_table
, ioc
->fsm
);
2860 if (ioc_st
== BFA_IOC_ENABLING
||
2861 ioc_st
== BFA_IOC_FAIL
|| ioc_st
== BFA_IOC_INITFAIL
) {
2863 iocpf_st
= bfa_sm_to_state(iocpf_sm_table
, ioc
->iocpf
.fsm
);
2866 case BFA_IOCPF_SEMWAIT
:
2867 ioc_st
= BFA_IOC_SEMWAIT
;
2870 case BFA_IOCPF_HWINIT
:
2871 ioc_st
= BFA_IOC_HWINIT
;
2874 case BFA_IOCPF_FWMISMATCH
:
2875 ioc_st
= BFA_IOC_FWMISMATCH
;
2878 case BFA_IOCPF_FAIL
:
2879 ioc_st
= BFA_IOC_FAIL
;
2882 case BFA_IOCPF_INITFAIL
:
2883 ioc_st
= BFA_IOC_INITFAIL
;
2894 bfa_nw_ioc_get_attr(struct bfa_ioc
*ioc
, struct bfa_ioc_attr
*ioc_attr
)
2896 memset((void *)ioc_attr
, 0, sizeof(struct bfa_ioc_attr
));
2898 ioc_attr
->state
= bfa_ioc_get_state(ioc
);
2899 ioc_attr
->port_id
= bfa_ioc_portid(ioc
);
2900 ioc_attr
->port_mode
= ioc
->port_mode
;
2902 ioc_attr
->port_mode_cfg
= ioc
->port_mode_cfg
;
2903 ioc_attr
->cap_bm
= ioc
->ad_cap_bm
;
2905 ioc_attr
->ioc_type
= bfa_ioc_get_type(ioc
);
2907 bfa_ioc_get_adapter_attr(ioc
, &ioc_attr
->adapter_attr
);
2909 ioc_attr
->pci_attr
.device_id
= bfa_ioc_devid(ioc
);
2910 ioc_attr
->pci_attr
.pcifn
= bfa_ioc_pcifn(ioc
);
2911 ioc_attr
->def_fn
= bfa_ioc_is_default(ioc
);
2912 bfa_ioc_get_pci_chip_rev(ioc
, ioc_attr
->pci_attr
.chip_rev
);
2917 bfa_ioc_get_pwwn(struct bfa_ioc
*ioc
)
2919 return ioc
->attr
->pwwn
;
2923 bfa_nw_ioc_get_mac(struct bfa_ioc
*ioc
, u8
*mac
)
2925 ether_addr_copy(mac
, ioc
->attr
->mac
);
2928 /* Firmware failure detected. Start recovery actions. */
2930 bfa_ioc_recover(struct bfa_ioc
*ioc
)
2932 pr_crit("Heart Beat of IOC has failed\n");
2933 bfa_ioc_stats(ioc
, ioc_hbfails
);
2934 bfa_ioc_stats_hb_count(ioc
, ioc
->hb_count
);
2935 bfa_fsm_send_event(ioc
, IOC_E_HBFAIL
);
2938 /* BFA IOC PF private functions */
2941 bfa_iocpf_enable(struct bfa_ioc
*ioc
)
2943 bfa_fsm_send_event(&ioc
->iocpf
, IOCPF_E_ENABLE
);
2947 bfa_iocpf_disable(struct bfa_ioc
*ioc
)
2949 bfa_fsm_send_event(&ioc
->iocpf
, IOCPF_E_DISABLE
);
2953 bfa_iocpf_fail(struct bfa_ioc
*ioc
)
2955 bfa_fsm_send_event(&ioc
->iocpf
, IOCPF_E_FAIL
);
2959 bfa_iocpf_initfail(struct bfa_ioc
*ioc
)
2961 bfa_fsm_send_event(&ioc
->iocpf
, IOCPF_E_INITFAIL
);
2965 bfa_iocpf_getattrfail(struct bfa_ioc
*ioc
)
2967 bfa_fsm_send_event(&ioc
->iocpf
, IOCPF_E_GETATTRFAIL
);
2971 bfa_iocpf_stop(struct bfa_ioc
*ioc
)
2973 bfa_fsm_send_event(&ioc
->iocpf
, IOCPF_E_STOP
);
2977 bfa_nw_iocpf_timeout(struct bfa_ioc
*ioc
)
2979 enum bfa_iocpf_state iocpf_st
;
2981 iocpf_st
= bfa_sm_to_state(iocpf_sm_table
, ioc
->iocpf
.fsm
);
2983 if (iocpf_st
== BFA_IOCPF_HWINIT
)
2984 bfa_ioc_poll_fwinit(ioc
);
2986 bfa_fsm_send_event(&ioc
->iocpf
, IOCPF_E_TIMEOUT
);
2990 bfa_nw_iocpf_sem_timeout(struct bfa_ioc
*ioc
)
2992 bfa_ioc_hw_sem_get(ioc
);
2996 bfa_ioc_poll_fwinit(struct bfa_ioc
*ioc
)
2998 u32 fwstate
= bfa_ioc_get_cur_ioc_fwstate(ioc
);
3000 if (fwstate
== BFI_IOC_DISABLED
) {
3001 bfa_fsm_send_event(&ioc
->iocpf
, IOCPF_E_FWREADY
);
3005 if (ioc
->iocpf
.poll_time
>= BFA_IOC_TOV
) {
3006 bfa_fsm_send_event(&ioc
->iocpf
, IOCPF_E_TIMEOUT
);
3008 ioc
->iocpf
.poll_time
+= BFA_IOC_POLL_TOV
;
3009 mod_timer(&ioc
->iocpf_timer
, jiffies
+
3010 msecs_to_jiffies(BFA_IOC_POLL_TOV
));
3015 * Flash module specific
3019 * FLASH DMA buffer should be big enough to hold both MFG block and
3020 * asic block(64k) at the same time and also should be 2k aligned to
3021 * avoid write segement to cross sector boundary.
3023 #define BFA_FLASH_SEG_SZ 2048
3024 #define BFA_FLASH_DMA_BUF_SZ \
3025 roundup(0x010000 + sizeof(struct bfa_mfg_block), BFA_FLASH_SEG_SZ)
3028 bfa_flash_cb(struct bfa_flash
*flash
)
3032 flash
->cbfn(flash
->cbarg
, flash
->status
);
3036 bfa_flash_notify(void *cbarg
, enum bfa_ioc_event event
)
3038 struct bfa_flash
*flash
= cbarg
;
3041 case BFA_IOC_E_DISABLED
:
3042 case BFA_IOC_E_FAILED
:
3043 if (flash
->op_busy
) {
3044 flash
->status
= BFA_STATUS_IOC_FAILURE
;
3045 flash
->cbfn(flash
->cbarg
, flash
->status
);
3055 * Send flash write request.
3058 bfa_flash_write_send(struct bfa_flash
*flash
)
3060 struct bfi_flash_write_req
*msg
=
3061 (struct bfi_flash_write_req
*) flash
->mb
.msg
;
3064 msg
->type
= be32_to_cpu(flash
->type
);
3065 msg
->instance
= flash
->instance
;
3066 msg
->offset
= be32_to_cpu(flash
->addr_off
+ flash
->offset
);
3067 len
= (flash
->residue
< BFA_FLASH_DMA_BUF_SZ
) ?
3068 flash
->residue
: BFA_FLASH_DMA_BUF_SZ
;
3069 msg
->length
= be32_to_cpu(len
);
3071 /* indicate if it's the last msg of the whole write operation */
3072 msg
->last
= (len
== flash
->residue
) ? 1 : 0;
3074 bfi_h2i_set(msg
->mh
, BFI_MC_FLASH
, BFI_FLASH_H2I_WRITE_REQ
,
3075 bfa_ioc_portid(flash
->ioc
));
3076 bfa_alen_set(&msg
->alen
, len
, flash
->dbuf_pa
);
3077 memcpy(flash
->dbuf_kva
, flash
->ubuf
+ flash
->offset
, len
);
3078 bfa_nw_ioc_mbox_queue(flash
->ioc
, &flash
->mb
, NULL
, NULL
);
3080 flash
->residue
-= len
;
3081 flash
->offset
+= len
;
3085 * bfa_flash_read_send - Send flash read request.
3087 * @cbarg: callback argument
3090 bfa_flash_read_send(void *cbarg
)
3092 struct bfa_flash
*flash
= cbarg
;
3093 struct bfi_flash_read_req
*msg
=
3094 (struct bfi_flash_read_req
*) flash
->mb
.msg
;
3097 msg
->type
= be32_to_cpu(flash
->type
);
3098 msg
->instance
= flash
->instance
;
3099 msg
->offset
= be32_to_cpu(flash
->addr_off
+ flash
->offset
);
3100 len
= (flash
->residue
< BFA_FLASH_DMA_BUF_SZ
) ?
3101 flash
->residue
: BFA_FLASH_DMA_BUF_SZ
;
3102 msg
->length
= be32_to_cpu(len
);
3103 bfi_h2i_set(msg
->mh
, BFI_MC_FLASH
, BFI_FLASH_H2I_READ_REQ
,
3104 bfa_ioc_portid(flash
->ioc
));
3105 bfa_alen_set(&msg
->alen
, len
, flash
->dbuf_pa
);
3106 bfa_nw_ioc_mbox_queue(flash
->ioc
, &flash
->mb
, NULL
, NULL
);
3110 * bfa_flash_intr - Process flash response messages upon receiving interrupts.
3112 * @flasharg: flash structure
3113 * @msg: message structure
3116 bfa_flash_intr(void *flasharg
, struct bfi_mbmsg
*msg
)
3118 struct bfa_flash
*flash
= flasharg
;
3122 struct bfi_flash_query_rsp
*query
;
3123 struct bfi_flash_write_rsp
*write
;
3124 struct bfi_flash_read_rsp
*read
;
3125 struct bfi_mbmsg
*msg
;
3130 /* receiving response after ioc failure */
3131 if (!flash
->op_busy
&& msg
->mh
.msg_id
!= BFI_FLASH_I2H_EVENT
)
3134 switch (msg
->mh
.msg_id
) {
3135 case BFI_FLASH_I2H_QUERY_RSP
:
3136 status
= be32_to_cpu(m
.query
->status
);
3137 if (status
== BFA_STATUS_OK
) {
3139 struct bfa_flash_attr
*attr
, *f
;
3141 attr
= (struct bfa_flash_attr
*) flash
->ubuf
;
3142 f
= (struct bfa_flash_attr
*) flash
->dbuf_kva
;
3143 attr
->status
= be32_to_cpu(f
->status
);
3144 attr
->npart
= be32_to_cpu(f
->npart
);
3145 for (i
= 0; i
< attr
->npart
; i
++) {
3146 attr
->part
[i
].part_type
=
3147 be32_to_cpu(f
->part
[i
].part_type
);
3148 attr
->part
[i
].part_instance
=
3149 be32_to_cpu(f
->part
[i
].part_instance
);
3150 attr
->part
[i
].part_off
=
3151 be32_to_cpu(f
->part
[i
].part_off
);
3152 attr
->part
[i
].part_size
=
3153 be32_to_cpu(f
->part
[i
].part_size
);
3154 attr
->part
[i
].part_len
=
3155 be32_to_cpu(f
->part
[i
].part_len
);
3156 attr
->part
[i
].part_status
=
3157 be32_to_cpu(f
->part
[i
].part_status
);
3160 flash
->status
= status
;
3161 bfa_flash_cb(flash
);
3163 case BFI_FLASH_I2H_WRITE_RSP
:
3164 status
= be32_to_cpu(m
.write
->status
);
3165 if (status
!= BFA_STATUS_OK
|| flash
->residue
== 0) {
3166 flash
->status
= status
;
3167 bfa_flash_cb(flash
);
3169 bfa_flash_write_send(flash
);
3171 case BFI_FLASH_I2H_READ_RSP
:
3172 status
= be32_to_cpu(m
.read
->status
);
3173 if (status
!= BFA_STATUS_OK
) {
3174 flash
->status
= status
;
3175 bfa_flash_cb(flash
);
3177 u32 len
= be32_to_cpu(m
.read
->length
);
3178 memcpy(flash
->ubuf
+ flash
->offset
,
3179 flash
->dbuf_kva
, len
);
3180 flash
->residue
-= len
;
3181 flash
->offset
+= len
;
3182 if (flash
->residue
== 0) {
3183 flash
->status
= status
;
3184 bfa_flash_cb(flash
);
3186 bfa_flash_read_send(flash
);
3189 case BFI_FLASH_I2H_BOOT_VER_RSP
:
3190 case BFI_FLASH_I2H_EVENT
:
3198 * Flash memory info API.
3201 bfa_nw_flash_meminfo(void)
3203 return roundup(BFA_FLASH_DMA_BUF_SZ
, BFA_DMA_ALIGN_SZ
);
3207 * bfa_nw_flash_attach - Flash attach API.
3209 * @flash: flash structure
3210 * @ioc: ioc structure
3211 * @dev: device structure
3214 bfa_nw_flash_attach(struct bfa_flash
*flash
, struct bfa_ioc
*ioc
, void *dev
)
3218 flash
->cbarg
= NULL
;
3221 bfa_nw_ioc_mbox_regisr(flash
->ioc
, BFI_MC_FLASH
, bfa_flash_intr
, flash
);
3222 bfa_ioc_notify_init(&flash
->ioc_notify
, bfa_flash_notify
, flash
);
3223 list_add_tail(&flash
->ioc_notify
.qe
, &flash
->ioc
->notify_q
);
3227 * bfa_nw_flash_memclaim - Claim memory for flash
3229 * @flash: flash structure
3230 * @dm_kva: pointer to virtual memory address
3231 * @dm_pa: physical memory address
3234 bfa_nw_flash_memclaim(struct bfa_flash
*flash
, u8
*dm_kva
, u64 dm_pa
)
3236 flash
->dbuf_kva
= dm_kva
;
3237 flash
->dbuf_pa
= dm_pa
;
3238 memset(flash
->dbuf_kva
, 0, BFA_FLASH_DMA_BUF_SZ
);
3239 dm_kva
+= roundup(BFA_FLASH_DMA_BUF_SZ
, BFA_DMA_ALIGN_SZ
);
3240 dm_pa
+= roundup(BFA_FLASH_DMA_BUF_SZ
, BFA_DMA_ALIGN_SZ
);
3244 * bfa_nw_flash_get_attr - Get flash attribute.
3246 * @flash: flash structure
3247 * @attr: flash attribute structure
3248 * @cbfn: callback function
3249 * @cbarg: callback argument
3254 bfa_nw_flash_get_attr(struct bfa_flash
*flash
, struct bfa_flash_attr
*attr
,
3255 bfa_cb_flash cbfn
, void *cbarg
)
3257 struct bfi_flash_query_req
*msg
=
3258 (struct bfi_flash_query_req
*) flash
->mb
.msg
;
3260 if (!bfa_nw_ioc_is_operational(flash
->ioc
))
3261 return BFA_STATUS_IOC_NON_OP
;
3264 return BFA_STATUS_DEVBUSY
;
3268 flash
->cbarg
= cbarg
;
3269 flash
->ubuf
= (u8
*) attr
;
3271 bfi_h2i_set(msg
->mh
, BFI_MC_FLASH
, BFI_FLASH_H2I_QUERY_REQ
,
3272 bfa_ioc_portid(flash
->ioc
));
3273 bfa_alen_set(&msg
->alen
, sizeof(struct bfa_flash_attr
), flash
->dbuf_pa
);
3274 bfa_nw_ioc_mbox_queue(flash
->ioc
, &flash
->mb
, NULL
, NULL
);
3276 return BFA_STATUS_OK
;
3280 * bfa_nw_flash_update_part - Update flash partition.
3282 * @flash: flash structure
3283 * @type: flash partition type
3284 * @instance: flash partition instance
3285 * @buf: update data buffer
3286 * @len: data buffer length
3287 * @offset: offset relative to the partition starting address
3288 * @cbfn: callback function
3289 * @cbarg: callback argument
3294 bfa_nw_flash_update_part(struct bfa_flash
*flash
, u32 type
, u8 instance
,
3295 void *buf
, u32 len
, u32 offset
,
3296 bfa_cb_flash cbfn
, void *cbarg
)
3298 if (!bfa_nw_ioc_is_operational(flash
->ioc
))
3299 return BFA_STATUS_IOC_NON_OP
;
3302 * 'len' must be in word (4-byte) boundary
3304 if (!len
|| (len
& 0x03))
3305 return BFA_STATUS_FLASH_BAD_LEN
;
3307 if (type
== BFA_FLASH_PART_MFG
)
3308 return BFA_STATUS_EINVAL
;
3311 return BFA_STATUS_DEVBUSY
;
3315 flash
->cbarg
= cbarg
;
3317 flash
->instance
= instance
;
3318 flash
->residue
= len
;
3320 flash
->addr_off
= offset
;
3323 bfa_flash_write_send(flash
);
3325 return BFA_STATUS_OK
;
3329 * bfa_nw_flash_read_part - Read flash partition.
3331 * @flash: flash structure
3332 * @type: flash partition type
3333 * @instance: flash partition instance
3334 * @buf: read data buffer
3335 * @len: data buffer length
3336 * @offset: offset relative to the partition starting address
3337 * @cbfn: callback function
3338 * @cbarg: callback argument
3343 bfa_nw_flash_read_part(struct bfa_flash
*flash
, u32 type
, u8 instance
,
3344 void *buf
, u32 len
, u32 offset
,
3345 bfa_cb_flash cbfn
, void *cbarg
)
3347 if (!bfa_nw_ioc_is_operational(flash
->ioc
))
3348 return BFA_STATUS_IOC_NON_OP
;
3351 * 'len' must be in word (4-byte) boundary
3353 if (!len
|| (len
& 0x03))
3354 return BFA_STATUS_FLASH_BAD_LEN
;
3357 return BFA_STATUS_DEVBUSY
;
3361 flash
->cbarg
= cbarg
;
3363 flash
->instance
= instance
;
3364 flash
->residue
= len
;
3366 flash
->addr_off
= offset
;
3369 bfa_flash_read_send(flash
);
3371 return BFA_STATUS_OK
;