2 * Copyright (C) 2015 Cavium, Inc.
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of version 2 of the GNU General Public License
6 * as published by the Free Software Foundation.
12 #include <linux/netdevice.h>
13 #include <linux/interrupt.h>
14 #include <linux/pci.h>
15 #include "thunder_bgx.h"
18 #define PCI_DEVICE_ID_THUNDER_NIC_PF 0xA01E
19 #define PCI_DEVICE_ID_THUNDER_PASS1_NIC_VF 0x0011
20 #define PCI_DEVICE_ID_THUNDER_NIC_VF 0xA034
21 #define PCI_DEVICE_ID_THUNDER_BGX 0xA026
24 #define PCI_CFG_REG_BAR_NUM 0
25 #define PCI_MSIX_REG_BAR_NUM 4
27 /* NIC SRIOV VF count */
28 #define MAX_NUM_VFS_SUPPORTED 128
29 #define DEFAULT_NUM_VF_ENABLED 8
31 #define NIC_TNS_BYPASS_MODE 0
32 #define NIC_TNS_MODE 1
35 #define NIC_SRIOV_ENABLED BIT(0)
37 /* Min/Max packet size */
38 #define NIC_HW_MIN_FRS 64
39 #define NIC_HW_MAX_FRS 9200 /* 9216 max packet including FCS */
42 #define NIC_MAX_PKIND 16
45 /* Receive channel configuration in TNS bypass mode
46 * Below is configuration in TNS bypass mode
47 * BGX0-LMAC0-CHAN0 - VNIC CHAN0
48 * BGX0-LMAC1-CHAN0 - VNIC CHAN16
50 * BGX1-LMAC0-CHAN0 - VNIC CHAN128
52 * BGX1-LMAC3-CHAN0 - VNIC CHAN174
54 #define NIC_INTF_COUNT 2 /* Interfaces btw VNIC and TNS/BGX */
55 #define NIC_CHANS_PER_INF 128
56 #define NIC_MAX_CHANS (NIC_INTF_COUNT * NIC_CHANS_PER_INF)
57 #define NIC_CPI_COUNT 2048 /* No of channel parse indices */
59 /* TNS bypass mode: 1-1 mapping between VNIC and BGX:LMAC */
60 #define NIC_MAX_BGX MAX_BGX_PER_CN88XX
61 #define NIC_CPI_PER_BGX (NIC_CPI_COUNT / NIC_MAX_BGX)
62 #define NIC_MAX_CPI_PER_LMAC 64 /* Max when CPI_ALG is IP diffserv */
63 #define NIC_RSSI_PER_BGX (NIC_RSSI_COUNT / NIC_MAX_BGX)
66 #define NIC_MAX_TL4 1024
67 #define NIC_MAX_TL4_SHAPERS 256 /* 1 shaper for 4 TL4s */
68 #define NIC_MAX_TL3 256
69 #define NIC_MAX_TL3_SHAPERS 64 /* 1 shaper for 4 TL3s */
70 #define NIC_MAX_TL2 64
71 #define NIC_MAX_TL2_SHAPERS 2 /* 1 shaper for 32 TL2s */
75 #define NIC_TL2_PER_BGX 32
76 #define NIC_TL4_PER_BGX (NIC_MAX_TL4 / NIC_MAX_BGX)
77 #define NIC_TL4_PER_LMAC (NIC_MAX_TL4 / NIC_CHANS_PER_INF)
79 /* NIC VF Interrupts */
80 #define NICVF_INTR_CQ 0
81 #define NICVF_INTR_SQ 1
82 #define NICVF_INTR_RBDR 2
83 #define NICVF_INTR_PKT_DROP 3
84 #define NICVF_INTR_TCP_TIMER 4
85 #define NICVF_INTR_MBOX 5
86 #define NICVF_INTR_QS_ERR 6
88 #define NICVF_INTR_CQ_SHIFT 0
89 #define NICVF_INTR_SQ_SHIFT 8
90 #define NICVF_INTR_RBDR_SHIFT 16
91 #define NICVF_INTR_PKT_DROP_SHIFT 20
92 #define NICVF_INTR_TCP_TIMER_SHIFT 21
93 #define NICVF_INTR_MBOX_SHIFT 22
94 #define NICVF_INTR_QS_ERR_SHIFT 23
96 #define NICVF_INTR_CQ_MASK (0xFF << NICVF_INTR_CQ_SHIFT)
97 #define NICVF_INTR_SQ_MASK (0xFF << NICVF_INTR_SQ_SHIFT)
98 #define NICVF_INTR_RBDR_MASK (0x03 << NICVF_INTR_RBDR_SHIFT)
99 #define NICVF_INTR_PKT_DROP_MASK BIT(NICVF_INTR_PKT_DROP_SHIFT)
100 #define NICVF_INTR_TCP_TIMER_MASK BIT(NICVF_INTR_TCP_TIMER_SHIFT)
101 #define NICVF_INTR_MBOX_MASK BIT(NICVF_INTR_MBOX_SHIFT)
102 #define NICVF_INTR_QS_ERR_MASK BIT(NICVF_INTR_QS_ERR_SHIFT)
104 /* MSI-X interrupts */
105 #define NIC_PF_MSIX_VECTORS 10
106 #define NIC_VF_MSIX_VECTORS 20
108 #define NIC_PF_INTR_ID_ECC0_SBE 0
109 #define NIC_PF_INTR_ID_ECC0_DBE 1
110 #define NIC_PF_INTR_ID_ECC1_SBE 2
111 #define NIC_PF_INTR_ID_ECC1_DBE 3
112 #define NIC_PF_INTR_ID_ECC2_SBE 4
113 #define NIC_PF_INTR_ID_ECC2_DBE 5
114 #define NIC_PF_INTR_ID_ECC3_SBE 6
115 #define NIC_PF_INTR_ID_ECC3_DBE 7
116 #define NIC_PF_INTR_ID_MBOX0 8
117 #define NIC_PF_INTR_ID_MBOX1 9
119 /* Global timer for CQ timer thresh interrupts
120 * Calculated for SCLK of 700Mhz
121 * value written should be a 1/16th of what is expected
123 * 1 tick per 0.025usec
125 #define NICPF_CLK_PER_INT_TICK 1
127 /* Time to wait before we decide that a SQ is stuck.
129 * Since both pkt rx and tx notifications are done with same CQ,
130 * when packets are being received at very high rate (eg: L2 forwarding)
131 * then freeing transmitted skbs will be delayed and watchdog
132 * will kick in, resetting interface. Hence keeping this value high.
134 #define NICVF_TX_TIMEOUT (50 * HZ)
136 struct nicvf_cq_poll
{
138 u8 cq_idx
; /* Completion queue index */
139 struct napi_struct napi
;
142 #define NIC_RSSI_COUNT 4096 /* Total no of RSS indices */
143 #define NIC_MAX_RSS_HASH_BITS 8
144 #define NIC_MAX_RSS_IDR_TBL_SIZE (1 << NIC_MAX_RSS_HASH_BITS)
145 #define RSS_HASH_KEY_SIZE 5 /* 320 bit key */
147 struct nicvf_rss_info
{
149 #define RSS_L2_EXTENDED_HASH_ENA BIT(0)
150 #define RSS_IP_HASH_ENA BIT(1)
151 #define RSS_TCP_HASH_ENA BIT(2)
152 #define RSS_TCP_SYN_DIS BIT(3)
153 #define RSS_UDP_HASH_ENA BIT(4)
154 #define RSS_L4_EXTENDED_HASH_ENA BIT(5)
155 #define RSS_ROCE_ENA BIT(6)
156 #define RSS_L3_BI_DIRECTION_ENA BIT(7)
157 #define RSS_L4_BI_DIRECTION_ENA BIT(8)
161 u8 ind_tbl
[NIC_MAX_RSS_IDR_TBL_SIZE
];
162 u64 key
[RSS_HASH_KEY_SIZE
];
163 } ____cacheline_aligned_in_smp
;
165 enum rx_stats_reg_offset
{
178 RX_DRP_L3BCAST
= 0xc,
179 RX_DRP_L3MCAST
= 0xd,
183 enum tx_stats_reg_offset
{
192 struct nicvf_hw_stats
{
200 u64 rx_drop_red_bytes
;
202 u64 rx_drop_overrun_bytes
;
205 u64 rx_drop_l3_bcast
;
206 u64 rx_drop_l3_mcast
;
207 u64 rx_bgx_truncated_pkts
;
212 u64 rx_l2_hdr_malformed
;
215 u64 rx_l2_len_mismatch
;
219 u64 rx_ip_hdr_malformed
;
220 u64 rx_ip_payload_malformed
;
227 u64 rx_tcp_flag_errs
;
228 u64 rx_tcp_offset_errs
;
230 u64 rx_truncated_pkts
;
233 u64 tx_ucast_frames_ok
;
234 u64 tx_bcast_frames_ok
;
235 u64 tx_mcast_frames_ok
;
239 struct nicvf_drv_stats
{
260 struct nicvf
*pnicvf
;
261 struct net_device
*netdev
;
262 struct pci_dev
*pdev
;
267 u8 loopback_supported
:1;
269 struct queue_set
*qs
;
270 #define MAX_SQS_PER_VF_SINGLE_NODE 5
271 #define MAX_SQS_PER_VF 11
273 u8 sqs_count
; /* Secondary Qset count */
274 struct nicvf
*snicvf
[MAX_SQS_PER_VF
];
278 void __iomem
*reg_base
;
282 struct page
*rb_page
;
285 bool rb_work_scheduled
;
286 struct delayed_work rbdr_work
;
287 struct tasklet_struct rbdr_task
;
288 struct tasklet_struct qs_err_task
;
289 struct tasklet_struct cq_task
;
290 struct nicvf_cq_poll
*napi
[8];
291 struct nicvf_rss_info rss_info
;
293 /* Interrupt coalescing settings */
294 u32 cq_coalesce_usecs
;
297 struct nicvf_hw_stats hw_stats
;
298 struct nicvf_drv_stats drv_stats
;
299 struct bgx_stats bgx_stats
;
300 struct work_struct reset_task
;
305 struct msix_entry msix_entries
[NIC_VF_MSIX_VECTORS
];
306 char irq_name
[NIC_VF_MSIX_VECTORS
][20];
307 bool irq_allocated
[NIC_VF_MSIX_VECTORS
];
309 /* VF <-> PF mailbox communication */
312 bool set_mac_pending
;
313 } ____cacheline_aligned_in_smp
;
315 /* PF <--> VF Mailbox communication
316 * Eight 64bit registers are shared between PF and VF.
317 * Separate set for each VF.
318 * Writing '1' into last register mbx7 means end of message.
321 /* PF <--> VF mailbox communication */
322 #define NIC_PF_VF_MAILBOX_SIZE 2
323 #define NIC_MBOX_MSG_TIMEOUT 2000 /* ms */
325 /* Mailbox message types */
326 #define NIC_MBOX_MSG_READY 0x01 /* Is PF ready to rcv msgs */
327 #define NIC_MBOX_MSG_ACK 0x02 /* ACK the message received */
328 #define NIC_MBOX_MSG_NACK 0x03 /* NACK the message received */
329 #define NIC_MBOX_MSG_QS_CFG 0x04 /* Configure Qset */
330 #define NIC_MBOX_MSG_RQ_CFG 0x05 /* Configure receive queue */
331 #define NIC_MBOX_MSG_SQ_CFG 0x06 /* Configure Send queue */
332 #define NIC_MBOX_MSG_RQ_DROP_CFG 0x07 /* Configure receive queue */
333 #define NIC_MBOX_MSG_SET_MAC 0x08 /* Add MAC ID to DMAC filter */
334 #define NIC_MBOX_MSG_SET_MAX_FRS 0x09 /* Set max frame size */
335 #define NIC_MBOX_MSG_CPI_CFG 0x0A /* Config CPI, RSSI */
336 #define NIC_MBOX_MSG_RSS_SIZE 0x0B /* Get RSS indir_tbl size */
337 #define NIC_MBOX_MSG_RSS_CFG 0x0C /* Config RSS table */
338 #define NIC_MBOX_MSG_RSS_CFG_CONT 0x0D /* RSS config continuation */
339 #define NIC_MBOX_MSG_RQ_BP_CFG 0x0E /* RQ backpressure config */
340 #define NIC_MBOX_MSG_RQ_SW_SYNC 0x0F /* Flush inflight pkts to RQ */
341 #define NIC_MBOX_MSG_BGX_STATS 0x10 /* Get stats from BGX */
342 #define NIC_MBOX_MSG_BGX_LINK_CHANGE 0x11 /* BGX:LMAC link status */
343 #define NIC_MBOX_MSG_ALLOC_SQS 0x12 /* Allocate secondary Qset */
344 #define NIC_MBOX_MSG_NICVF_PTR 0x13 /* Send nicvf ptr to PF */
345 #define NIC_MBOX_MSG_PNICVF_PTR 0x14 /* Get primary qset nicvf ptr */
346 #define NIC_MBOX_MSG_SNICVF_PTR 0x15 /* Send sqet nicvf ptr to PVF */
347 #define NIC_MBOX_MSG_LOOPBACK 0x16 /* Set interface in loopback */
348 #define NIC_MBOX_MSG_CFG_DONE 0xF0 /* VF configuration done */
349 #define NIC_MBOX_MSG_SHUTDOWN 0xF1 /* VF is being shutdown */
357 u8 loopback_supported
:1;
358 u8 mac_addr
[ETH_ALEN
];
361 /* Qset configuration */
369 /* Receive queue configuration */
377 /* Send queue configuration */
386 /* Set VF's MAC address */
390 u8 mac_addr
[ETH_ALEN
];
393 /* Set Maximum frame size */
400 /* Set CPI algorithm type */
408 /* Get RSS table size */
415 /* Set RSS configuration */
422 #define RSS_IND_TBL_LEN_PER_MBX_MSG 8
423 u8 ind_tbl
[RSS_IND_TBL_LEN_PER_MBX_MSG
];
426 struct bgx_stats_msg
{
434 /* Physical interface link status */
435 struct bgx_link_status
{
442 /* Get Extra Qset IDs */
457 /* Set interface in loopback mode */
458 struct set_loopback
{
464 /* 128 bit shared memory between PF and each VF */
466 struct { u8 msg
; } msg
;
467 struct nic_cfg_msg nic_cfg
;
468 struct qs_cfg_msg qs
;
469 struct rq_cfg_msg rq
;
470 struct sq_cfg_msg sq
;
471 struct set_mac_msg mac
;
472 struct set_frs_msg frs
;
473 struct cpi_cfg_msg cpi_cfg
;
474 struct rss_sz_msg rss_size
;
475 struct rss_cfg_msg rss_cfg
;
476 struct bgx_stats_msg bgx_stats
;
477 struct bgx_link_status link_status
;
478 struct sqs_alloc sqs_alloc
;
479 struct nicvf_ptr nicvf
;
480 struct set_loopback lbk
;
483 #define NIC_NODE_ID_MASK 0x03
484 #define NIC_NODE_ID_SHIFT 44
486 static inline int nic_get_node_id(struct pci_dev
*pdev
)
488 u64 addr
= pci_resource_start(pdev
, PCI_CFG_REG_BAR_NUM
);
489 return ((addr
>> NIC_NODE_ID_SHIFT
) & NIC_NODE_ID_MASK
);
492 int nicvf_set_real_num_queues(struct net_device
*netdev
,
493 int tx_queues
, int rx_queues
);
494 int nicvf_open(struct net_device
*netdev
);
495 int nicvf_stop(struct net_device
*netdev
);
496 int nicvf_send_msg_to_pf(struct nicvf
*vf
, union nic_mbx
*mbx
);
497 void nicvf_config_rss(struct nicvf
*nic
);
498 void nicvf_set_rss_key(struct nicvf
*nic
);
499 void nicvf_set_ethtool_ops(struct net_device
*netdev
);
500 void nicvf_update_stats(struct nicvf
*nic
);
501 void nicvf_update_lmac_stats(struct nicvf
*nic
);