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[mirror_ubuntu-artful-kernel.git] / drivers / net / ethernet / cavium / thunder / nicvf_main.c
1 /*
2 * Copyright (C) 2015 Cavium, Inc.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of version 2 of the GNU General Public License
6 * as published by the Free Software Foundation.
7 */
8
9 #include <linux/module.h>
10 #include <linux/interrupt.h>
11 #include <linux/pci.h>
12 #include <linux/netdevice.h>
13 #include <linux/if_vlan.h>
14 #include <linux/etherdevice.h>
15 #include <linux/ethtool.h>
16 #include <linux/log2.h>
17 #include <linux/prefetch.h>
18 #include <linux/irq.h>
19
20 #include "nic_reg.h"
21 #include "nic.h"
22 #include "nicvf_queues.h"
23 #include "thunder_bgx.h"
24
25 #define DRV_NAME "thunder-nicvf"
26 #define DRV_VERSION "1.0"
27
28 /* Supported devices */
29 static const struct pci_device_id nicvf_id_table[] = {
30 { PCI_DEVICE_SUB(PCI_VENDOR_ID_CAVIUM,
31 PCI_DEVICE_ID_THUNDER_NIC_VF,
32 PCI_VENDOR_ID_CAVIUM, 0xA134) },
33 { PCI_DEVICE_SUB(PCI_VENDOR_ID_CAVIUM,
34 PCI_DEVICE_ID_THUNDER_PASS1_NIC_VF,
35 PCI_VENDOR_ID_CAVIUM, 0xA11E) },
36 { 0, } /* end of table */
37 };
38
39 MODULE_AUTHOR("Sunil Goutham");
40 MODULE_DESCRIPTION("Cavium Thunder NIC Virtual Function Driver");
41 MODULE_LICENSE("GPL v2");
42 MODULE_VERSION(DRV_VERSION);
43 MODULE_DEVICE_TABLE(pci, nicvf_id_table);
44
45 static int debug = 0x00;
46 module_param(debug, int, 0644);
47 MODULE_PARM_DESC(debug, "Debug message level bitmap");
48
49 static int cpi_alg = CPI_ALG_NONE;
50 module_param(cpi_alg, int, S_IRUGO);
51 MODULE_PARM_DESC(cpi_alg,
52 "PFC algorithm (0=none, 1=VLAN, 2=VLAN16, 3=IP Diffserv)");
53
54 static inline u8 nicvf_netdev_qidx(struct nicvf *nic, u8 qidx)
55 {
56 if (nic->sqs_mode)
57 return qidx + ((nic->sqs_id + 1) * MAX_CMP_QUEUES_PER_QS);
58 else
59 return qidx;
60 }
61
62 static inline void nicvf_set_rx_frame_cnt(struct nicvf *nic,
63 struct sk_buff *skb)
64 {
65 if (skb->len <= 64)
66 nic->drv_stats.rx_frames_64++;
67 else if (skb->len <= 127)
68 nic->drv_stats.rx_frames_127++;
69 else if (skb->len <= 255)
70 nic->drv_stats.rx_frames_255++;
71 else if (skb->len <= 511)
72 nic->drv_stats.rx_frames_511++;
73 else if (skb->len <= 1023)
74 nic->drv_stats.rx_frames_1023++;
75 else if (skb->len <= 1518)
76 nic->drv_stats.rx_frames_1518++;
77 else
78 nic->drv_stats.rx_frames_jumbo++;
79 }
80
81 /* The Cavium ThunderX network controller can *only* be found in SoCs
82 * containing the ThunderX ARM64 CPU implementation. All accesses to the device
83 * registers on this platform are implicitly strongly ordered with respect
84 * to memory accesses. So writeq_relaxed() and readq_relaxed() are safe to use
85 * with no memory barriers in this driver. The readq()/writeq() functions add
86 * explicit ordering operation which in this case are redundant, and only
87 * add overhead.
88 */
89
90 /* Register read/write APIs */
91 void nicvf_reg_write(struct nicvf *nic, u64 offset, u64 val)
92 {
93 writeq_relaxed(val, nic->reg_base + offset);
94 }
95
96 u64 nicvf_reg_read(struct nicvf *nic, u64 offset)
97 {
98 return readq_relaxed(nic->reg_base + offset);
99 }
100
101 void nicvf_queue_reg_write(struct nicvf *nic, u64 offset,
102 u64 qidx, u64 val)
103 {
104 void __iomem *addr = nic->reg_base + offset;
105
106 writeq_relaxed(val, addr + (qidx << NIC_Q_NUM_SHIFT));
107 }
108
109 u64 nicvf_queue_reg_read(struct nicvf *nic, u64 offset, u64 qidx)
110 {
111 void __iomem *addr = nic->reg_base + offset;
112
113 return readq_relaxed(addr + (qidx << NIC_Q_NUM_SHIFT));
114 }
115
116 /* VF -> PF mailbox communication */
117 static void nicvf_write_to_mbx(struct nicvf *nic, union nic_mbx *mbx)
118 {
119 u64 *msg = (u64 *)mbx;
120
121 nicvf_reg_write(nic, NIC_VF_PF_MAILBOX_0_1 + 0, msg[0]);
122 nicvf_reg_write(nic, NIC_VF_PF_MAILBOX_0_1 + 8, msg[1]);
123 }
124
125 int nicvf_send_msg_to_pf(struct nicvf *nic, union nic_mbx *mbx)
126 {
127 int timeout = NIC_MBOX_MSG_TIMEOUT;
128 int sleep = 10;
129
130 nic->pf_acked = false;
131 nic->pf_nacked = false;
132
133 nicvf_write_to_mbx(nic, mbx);
134
135 /* Wait for previous message to be acked, timeout 2sec */
136 while (!nic->pf_acked) {
137 if (nic->pf_nacked)
138 return -EINVAL;
139 msleep(sleep);
140 if (nic->pf_acked)
141 break;
142 timeout -= sleep;
143 if (!timeout) {
144 netdev_err(nic->netdev,
145 "PF didn't ack to mbox msg %d from VF%d\n",
146 (mbx->msg.msg & 0xFF), nic->vf_id);
147 return -EBUSY;
148 }
149 }
150 return 0;
151 }
152
153 /* Checks if VF is able to comminicate with PF
154 * and also gets the VNIC number this VF is associated to.
155 */
156 static int nicvf_check_pf_ready(struct nicvf *nic)
157 {
158 union nic_mbx mbx = {};
159
160 mbx.msg.msg = NIC_MBOX_MSG_READY;
161 if (nicvf_send_msg_to_pf(nic, &mbx)) {
162 netdev_err(nic->netdev,
163 "PF didn't respond to READY msg\n");
164 return 0;
165 }
166
167 return 1;
168 }
169
170 static void nicvf_read_bgx_stats(struct nicvf *nic, struct bgx_stats_msg *bgx)
171 {
172 if (bgx->rx)
173 nic->bgx_stats.rx_stats[bgx->idx] = bgx->stats;
174 else
175 nic->bgx_stats.tx_stats[bgx->idx] = bgx->stats;
176 }
177
178 static void nicvf_handle_mbx_intr(struct nicvf *nic)
179 {
180 union nic_mbx mbx = {};
181 u64 *mbx_data;
182 u64 mbx_addr;
183 int i;
184
185 mbx_addr = NIC_VF_PF_MAILBOX_0_1;
186 mbx_data = (u64 *)&mbx;
187
188 for (i = 0; i < NIC_PF_VF_MAILBOX_SIZE; i++) {
189 *mbx_data = nicvf_reg_read(nic, mbx_addr);
190 mbx_data++;
191 mbx_addr += sizeof(u64);
192 }
193
194 netdev_dbg(nic->netdev, "Mbox message: msg: 0x%x\n", mbx.msg.msg);
195 switch (mbx.msg.msg) {
196 case NIC_MBOX_MSG_READY:
197 nic->pf_acked = true;
198 nic->vf_id = mbx.nic_cfg.vf_id & 0x7F;
199 nic->tns_mode = mbx.nic_cfg.tns_mode & 0x7F;
200 nic->node = mbx.nic_cfg.node_id;
201 if (!nic->set_mac_pending)
202 ether_addr_copy(nic->netdev->dev_addr,
203 mbx.nic_cfg.mac_addr);
204 nic->sqs_mode = mbx.nic_cfg.sqs_mode;
205 nic->loopback_supported = mbx.nic_cfg.loopback_supported;
206 nic->link_up = false;
207 nic->duplex = 0;
208 nic->speed = 0;
209 break;
210 case NIC_MBOX_MSG_ACK:
211 nic->pf_acked = true;
212 break;
213 case NIC_MBOX_MSG_NACK:
214 nic->pf_nacked = true;
215 break;
216 case NIC_MBOX_MSG_RSS_SIZE:
217 nic->rss_info.rss_size = mbx.rss_size.ind_tbl_size;
218 nic->pf_acked = true;
219 break;
220 case NIC_MBOX_MSG_BGX_STATS:
221 nicvf_read_bgx_stats(nic, &mbx.bgx_stats);
222 nic->pf_acked = true;
223 break;
224 case NIC_MBOX_MSG_BGX_LINK_CHANGE:
225 nic->pf_acked = true;
226 nic->link_up = mbx.link_status.link_up;
227 nic->duplex = mbx.link_status.duplex;
228 nic->speed = mbx.link_status.speed;
229 if (nic->link_up) {
230 netdev_info(nic->netdev, "%s: Link is Up %d Mbps %s\n",
231 nic->netdev->name, nic->speed,
232 nic->duplex == DUPLEX_FULL ?
233 "Full duplex" : "Half duplex");
234 netif_carrier_on(nic->netdev);
235 netif_tx_start_all_queues(nic->netdev);
236 } else {
237 netdev_info(nic->netdev, "%s: Link is Down\n",
238 nic->netdev->name);
239 netif_carrier_off(nic->netdev);
240 netif_tx_stop_all_queues(nic->netdev);
241 }
242 break;
243 case NIC_MBOX_MSG_ALLOC_SQS:
244 nic->sqs_count = mbx.sqs_alloc.qs_count;
245 nic->pf_acked = true;
246 break;
247 case NIC_MBOX_MSG_SNICVF_PTR:
248 /* Primary VF: make note of secondary VF's pointer
249 * to be used while packet transmission.
250 */
251 nic->snicvf[mbx.nicvf.sqs_id] =
252 (struct nicvf *)mbx.nicvf.nicvf;
253 nic->pf_acked = true;
254 break;
255 case NIC_MBOX_MSG_PNICVF_PTR:
256 /* Secondary VF/Qset: make note of primary VF's pointer
257 * to be used while packet reception, to handover packet
258 * to primary VF's netdev.
259 */
260 nic->pnicvf = (struct nicvf *)mbx.nicvf.nicvf;
261 nic->pf_acked = true;
262 break;
263 default:
264 netdev_err(nic->netdev,
265 "Invalid message from PF, msg 0x%x\n", mbx.msg.msg);
266 break;
267 }
268 nicvf_clear_intr(nic, NICVF_INTR_MBOX, 0);
269 }
270
271 static int nicvf_hw_set_mac_addr(struct nicvf *nic, struct net_device *netdev)
272 {
273 union nic_mbx mbx = {};
274
275 mbx.mac.msg = NIC_MBOX_MSG_SET_MAC;
276 mbx.mac.vf_id = nic->vf_id;
277 ether_addr_copy(mbx.mac.mac_addr, netdev->dev_addr);
278
279 return nicvf_send_msg_to_pf(nic, &mbx);
280 }
281
282 static void nicvf_config_cpi(struct nicvf *nic)
283 {
284 union nic_mbx mbx = {};
285
286 mbx.cpi_cfg.msg = NIC_MBOX_MSG_CPI_CFG;
287 mbx.cpi_cfg.vf_id = nic->vf_id;
288 mbx.cpi_cfg.cpi_alg = nic->cpi_alg;
289 mbx.cpi_cfg.rq_cnt = nic->qs->rq_cnt;
290
291 nicvf_send_msg_to_pf(nic, &mbx);
292 }
293
294 static void nicvf_get_rss_size(struct nicvf *nic)
295 {
296 union nic_mbx mbx = {};
297
298 mbx.rss_size.msg = NIC_MBOX_MSG_RSS_SIZE;
299 mbx.rss_size.vf_id = nic->vf_id;
300 nicvf_send_msg_to_pf(nic, &mbx);
301 }
302
303 void nicvf_config_rss(struct nicvf *nic)
304 {
305 union nic_mbx mbx = {};
306 struct nicvf_rss_info *rss = &nic->rss_info;
307 int ind_tbl_len = rss->rss_size;
308 int i, nextq = 0;
309
310 mbx.rss_cfg.vf_id = nic->vf_id;
311 mbx.rss_cfg.hash_bits = rss->hash_bits;
312 while (ind_tbl_len) {
313 mbx.rss_cfg.tbl_offset = nextq;
314 mbx.rss_cfg.tbl_len = min(ind_tbl_len,
315 RSS_IND_TBL_LEN_PER_MBX_MSG);
316 mbx.rss_cfg.msg = mbx.rss_cfg.tbl_offset ?
317 NIC_MBOX_MSG_RSS_CFG_CONT : NIC_MBOX_MSG_RSS_CFG;
318
319 for (i = 0; i < mbx.rss_cfg.tbl_len; i++)
320 mbx.rss_cfg.ind_tbl[i] = rss->ind_tbl[nextq++];
321
322 nicvf_send_msg_to_pf(nic, &mbx);
323
324 ind_tbl_len -= mbx.rss_cfg.tbl_len;
325 }
326 }
327
328 void nicvf_set_rss_key(struct nicvf *nic)
329 {
330 struct nicvf_rss_info *rss = &nic->rss_info;
331 u64 key_addr = NIC_VNIC_RSS_KEY_0_4;
332 int idx;
333
334 for (idx = 0; idx < RSS_HASH_KEY_SIZE; idx++) {
335 nicvf_reg_write(nic, key_addr, rss->key[idx]);
336 key_addr += sizeof(u64);
337 }
338 }
339
340 static int nicvf_rss_init(struct nicvf *nic)
341 {
342 struct nicvf_rss_info *rss = &nic->rss_info;
343 int idx;
344
345 nicvf_get_rss_size(nic);
346
347 if (cpi_alg != CPI_ALG_NONE) {
348 rss->enable = false;
349 rss->hash_bits = 0;
350 return 0;
351 }
352
353 rss->enable = true;
354
355 /* Using the HW reset value for now */
356 rss->key[0] = 0xFEED0BADFEED0BADULL;
357 rss->key[1] = 0xFEED0BADFEED0BADULL;
358 rss->key[2] = 0xFEED0BADFEED0BADULL;
359 rss->key[3] = 0xFEED0BADFEED0BADULL;
360 rss->key[4] = 0xFEED0BADFEED0BADULL;
361
362 nicvf_set_rss_key(nic);
363
364 rss->cfg = RSS_IP_HASH_ENA | RSS_TCP_HASH_ENA | RSS_UDP_HASH_ENA;
365 nicvf_reg_write(nic, NIC_VNIC_RSS_CFG, rss->cfg);
366
367 rss->hash_bits = ilog2(rounddown_pow_of_two(rss->rss_size));
368
369 for (idx = 0; idx < rss->rss_size; idx++)
370 rss->ind_tbl[idx] = ethtool_rxfh_indir_default(idx,
371 nic->rx_queues);
372 nicvf_config_rss(nic);
373 return 1;
374 }
375
376 /* Request PF to allocate additional Qsets */
377 static void nicvf_request_sqs(struct nicvf *nic)
378 {
379 union nic_mbx mbx = {};
380 int sqs;
381 int sqs_count = nic->sqs_count;
382 int rx_queues = 0, tx_queues = 0;
383
384 /* Only primary VF should request */
385 if (nic->sqs_mode || !nic->sqs_count)
386 return;
387
388 mbx.sqs_alloc.msg = NIC_MBOX_MSG_ALLOC_SQS;
389 mbx.sqs_alloc.vf_id = nic->vf_id;
390 mbx.sqs_alloc.qs_count = nic->sqs_count;
391 if (nicvf_send_msg_to_pf(nic, &mbx)) {
392 /* No response from PF */
393 nic->sqs_count = 0;
394 return;
395 }
396
397 /* Return if no Secondary Qsets available */
398 if (!nic->sqs_count)
399 return;
400
401 if (nic->rx_queues > MAX_RCV_QUEUES_PER_QS)
402 rx_queues = nic->rx_queues - MAX_RCV_QUEUES_PER_QS;
403 if (nic->tx_queues > MAX_SND_QUEUES_PER_QS)
404 tx_queues = nic->tx_queues - MAX_SND_QUEUES_PER_QS;
405
406 /* Set no of Rx/Tx queues in each of the SQsets */
407 for (sqs = 0; sqs < nic->sqs_count; sqs++) {
408 mbx.nicvf.msg = NIC_MBOX_MSG_SNICVF_PTR;
409 mbx.nicvf.vf_id = nic->vf_id;
410 mbx.nicvf.sqs_id = sqs;
411 nicvf_send_msg_to_pf(nic, &mbx);
412
413 nic->snicvf[sqs]->sqs_id = sqs;
414 if (rx_queues > MAX_RCV_QUEUES_PER_QS) {
415 nic->snicvf[sqs]->qs->rq_cnt = MAX_RCV_QUEUES_PER_QS;
416 rx_queues -= MAX_RCV_QUEUES_PER_QS;
417 } else {
418 nic->snicvf[sqs]->qs->rq_cnt = rx_queues;
419 rx_queues = 0;
420 }
421
422 if (tx_queues > MAX_SND_QUEUES_PER_QS) {
423 nic->snicvf[sqs]->qs->sq_cnt = MAX_SND_QUEUES_PER_QS;
424 tx_queues -= MAX_SND_QUEUES_PER_QS;
425 } else {
426 nic->snicvf[sqs]->qs->sq_cnt = tx_queues;
427 tx_queues = 0;
428 }
429
430 nic->snicvf[sqs]->qs->cq_cnt =
431 max(nic->snicvf[sqs]->qs->rq_cnt, nic->snicvf[sqs]->qs->sq_cnt);
432
433 /* Initialize secondary Qset's queues and its interrupts */
434 nicvf_open(nic->snicvf[sqs]->netdev);
435 }
436
437 /* Update stack with actual Rx/Tx queue count allocated */
438 if (sqs_count != nic->sqs_count)
439 nicvf_set_real_num_queues(nic->netdev,
440 nic->tx_queues, nic->rx_queues);
441 }
442
443 /* Send this Qset's nicvf pointer to PF.
444 * PF inturn sends primary VF's nicvf struct to secondary Qsets/VFs
445 * so that packets received by these Qsets can use primary VF's netdev
446 */
447 static void nicvf_send_vf_struct(struct nicvf *nic)
448 {
449 union nic_mbx mbx = {};
450
451 mbx.nicvf.msg = NIC_MBOX_MSG_NICVF_PTR;
452 mbx.nicvf.sqs_mode = nic->sqs_mode;
453 mbx.nicvf.nicvf = (u64)nic;
454 nicvf_send_msg_to_pf(nic, &mbx);
455 }
456
457 static void nicvf_get_primary_vf_struct(struct nicvf *nic)
458 {
459 union nic_mbx mbx = {};
460
461 mbx.nicvf.msg = NIC_MBOX_MSG_PNICVF_PTR;
462 nicvf_send_msg_to_pf(nic, &mbx);
463 }
464
465 int nicvf_set_real_num_queues(struct net_device *netdev,
466 int tx_queues, int rx_queues)
467 {
468 int err = 0;
469
470 err = netif_set_real_num_tx_queues(netdev, tx_queues);
471 if (err) {
472 netdev_err(netdev,
473 "Failed to set no of Tx queues: %d\n", tx_queues);
474 return err;
475 }
476
477 err = netif_set_real_num_rx_queues(netdev, rx_queues);
478 if (err)
479 netdev_err(netdev,
480 "Failed to set no of Rx queues: %d\n", rx_queues);
481 return err;
482 }
483
484 static int nicvf_init_resources(struct nicvf *nic)
485 {
486 int err;
487 union nic_mbx mbx = {};
488
489 mbx.msg.msg = NIC_MBOX_MSG_CFG_DONE;
490
491 /* Enable Qset */
492 nicvf_qset_config(nic, true);
493
494 /* Initialize queues and HW for data transfer */
495 err = nicvf_config_data_transfer(nic, true);
496 if (err) {
497 netdev_err(nic->netdev,
498 "Failed to alloc/config VF's QSet resources\n");
499 return err;
500 }
501
502 /* Send VF config done msg to PF */
503 nicvf_write_to_mbx(nic, &mbx);
504
505 return 0;
506 }
507
508 static void nicvf_snd_pkt_handler(struct net_device *netdev,
509 struct cmp_queue *cq,
510 struct cqe_send_t *cqe_tx, int cqe_type)
511 {
512 struct sk_buff *skb = NULL;
513 struct nicvf *nic = netdev_priv(netdev);
514 struct snd_queue *sq;
515 struct sq_hdr_subdesc *hdr;
516
517 sq = &nic->qs->sq[cqe_tx->sq_idx];
518
519 hdr = (struct sq_hdr_subdesc *)GET_SQ_DESC(sq, cqe_tx->sqe_ptr);
520 if (hdr->subdesc_type != SQ_DESC_TYPE_HEADER)
521 return;
522
523 netdev_dbg(nic->netdev,
524 "%s Qset #%d SQ #%d SQ ptr #%d subdesc count %d\n",
525 __func__, cqe_tx->sq_qs, cqe_tx->sq_idx,
526 cqe_tx->sqe_ptr, hdr->subdesc_cnt);
527
528 nicvf_put_sq_desc(sq, hdr->subdesc_cnt + 1);
529 nicvf_check_cqe_tx_errs(nic, cq, cqe_tx);
530 skb = (struct sk_buff *)sq->skbuff[cqe_tx->sqe_ptr];
531 /* For TSO offloaded packets only one head SKB needs to be freed */
532 if (skb) {
533 prefetch(skb);
534 dev_consume_skb_any(skb);
535 sq->skbuff[cqe_tx->sqe_ptr] = (u64)NULL;
536 }
537 }
538
539 static inline void nicvf_set_rxhash(struct net_device *netdev,
540 struct cqe_rx_t *cqe_rx,
541 struct sk_buff *skb)
542 {
543 u8 hash_type;
544 u32 hash;
545
546 if (!(netdev->features & NETIF_F_RXHASH))
547 return;
548
549 switch (cqe_rx->rss_alg) {
550 case RSS_ALG_TCP_IP:
551 case RSS_ALG_UDP_IP:
552 hash_type = PKT_HASH_TYPE_L4;
553 hash = cqe_rx->rss_tag;
554 break;
555 case RSS_ALG_IP:
556 hash_type = PKT_HASH_TYPE_L3;
557 hash = cqe_rx->rss_tag;
558 break;
559 default:
560 hash_type = PKT_HASH_TYPE_NONE;
561 hash = 0;
562 }
563
564 skb_set_hash(skb, hash, hash_type);
565 }
566
567 static void nicvf_rcv_pkt_handler(struct net_device *netdev,
568 struct napi_struct *napi,
569 struct cmp_queue *cq,
570 struct cqe_rx_t *cqe_rx, int cqe_type)
571 {
572 struct sk_buff *skb;
573 struct nicvf *nic = netdev_priv(netdev);
574 int err = 0;
575 int rq_idx;
576
577 rq_idx = nicvf_netdev_qidx(nic, cqe_rx->rq_idx);
578
579 if (nic->sqs_mode) {
580 /* Use primary VF's 'nicvf' struct */
581 nic = nic->pnicvf;
582 netdev = nic->netdev;
583 }
584
585 /* Check for errors */
586 err = nicvf_check_cqe_rx_errs(nic, cq, cqe_rx);
587 if (err && !cqe_rx->rb_cnt)
588 return;
589
590 skb = nicvf_get_rcv_skb(nic, cqe_rx);
591 if (!skb) {
592 netdev_dbg(nic->netdev, "Packet not received\n");
593 return;
594 }
595
596 if (netif_msg_pktdata(nic)) {
597 netdev_info(nic->netdev, "%s: skb 0x%p, len=%d\n", netdev->name,
598 skb, skb->len);
599 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_OFFSET, 16, 1,
600 skb->data, skb->len, true);
601 }
602
603 /* If error packet, drop it here */
604 if (err) {
605 dev_kfree_skb_any(skb);
606 return;
607 }
608
609 nicvf_set_rx_frame_cnt(nic, skb);
610
611 nicvf_set_rxhash(netdev, cqe_rx, skb);
612
613 skb_record_rx_queue(skb, rq_idx);
614 if (netdev->hw_features & NETIF_F_RXCSUM) {
615 /* HW by default verifies TCP/UDP/SCTP checksums */
616 skb->ip_summed = CHECKSUM_UNNECESSARY;
617 } else {
618 skb_checksum_none_assert(skb);
619 }
620
621 skb->protocol = eth_type_trans(skb, netdev);
622
623 /* Check for stripped VLAN */
624 if (cqe_rx->vlan_found && cqe_rx->vlan_stripped)
625 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
626 ntohs((__force __be16)cqe_rx->vlan_tci));
627
628 if (napi && (netdev->features & NETIF_F_GRO))
629 napi_gro_receive(napi, skb);
630 else
631 netif_receive_skb(skb);
632 }
633
634 static int nicvf_cq_intr_handler(struct net_device *netdev, u8 cq_idx,
635 struct napi_struct *napi, int budget)
636 {
637 int processed_cqe, work_done = 0, tx_done = 0;
638 int cqe_count, cqe_head;
639 struct nicvf *nic = netdev_priv(netdev);
640 struct queue_set *qs = nic->qs;
641 struct cmp_queue *cq = &qs->cq[cq_idx];
642 struct cqe_rx_t *cq_desc;
643 struct netdev_queue *txq;
644
645 spin_lock_bh(&cq->lock);
646 loop:
647 processed_cqe = 0;
648 /* Get no of valid CQ entries to process */
649 cqe_count = nicvf_queue_reg_read(nic, NIC_QSET_CQ_0_7_STATUS, cq_idx);
650 cqe_count &= CQ_CQE_COUNT;
651 if (!cqe_count)
652 goto done;
653
654 /* Get head of the valid CQ entries */
655 cqe_head = nicvf_queue_reg_read(nic, NIC_QSET_CQ_0_7_HEAD, cq_idx) >> 9;
656 cqe_head &= 0xFFFF;
657
658 netdev_dbg(nic->netdev, "%s CQ%d cqe_count %d cqe_head %d\n",
659 __func__, cq_idx, cqe_count, cqe_head);
660 while (processed_cqe < cqe_count) {
661 /* Get the CQ descriptor */
662 cq_desc = (struct cqe_rx_t *)GET_CQ_DESC(cq, cqe_head);
663 cqe_head++;
664 cqe_head &= (cq->dmem.q_len - 1);
665 /* Initiate prefetch for next descriptor */
666 prefetch((struct cqe_rx_t *)GET_CQ_DESC(cq, cqe_head));
667
668 if ((work_done >= budget) && napi &&
669 (cq_desc->cqe_type != CQE_TYPE_SEND)) {
670 break;
671 }
672
673 netdev_dbg(nic->netdev, "CQ%d cq_desc->cqe_type %d\n",
674 cq_idx, cq_desc->cqe_type);
675 switch (cq_desc->cqe_type) {
676 case CQE_TYPE_RX:
677 nicvf_rcv_pkt_handler(netdev, napi, cq,
678 cq_desc, CQE_TYPE_RX);
679 work_done++;
680 break;
681 case CQE_TYPE_SEND:
682 nicvf_snd_pkt_handler(netdev, cq,
683 (void *)cq_desc, CQE_TYPE_SEND);
684 tx_done++;
685 break;
686 case CQE_TYPE_INVALID:
687 case CQE_TYPE_RX_SPLIT:
688 case CQE_TYPE_RX_TCP:
689 case CQE_TYPE_SEND_PTP:
690 /* Ignore for now */
691 break;
692 }
693 processed_cqe++;
694 }
695 netdev_dbg(nic->netdev,
696 "%s CQ%d processed_cqe %d work_done %d budget %d\n",
697 __func__, cq_idx, processed_cqe, work_done, budget);
698
699 /* Ring doorbell to inform H/W to reuse processed CQEs */
700 nicvf_queue_reg_write(nic, NIC_QSET_CQ_0_7_DOOR,
701 cq_idx, processed_cqe);
702
703 if ((work_done < budget) && napi)
704 goto loop;
705
706 done:
707 /* Wakeup TXQ if its stopped earlier due to SQ full */
708 if (tx_done) {
709 netdev = nic->pnicvf->netdev;
710 txq = netdev_get_tx_queue(netdev,
711 nicvf_netdev_qidx(nic, cq_idx));
712 nic = nic->pnicvf;
713 if (netif_tx_queue_stopped(txq) && netif_carrier_ok(netdev)) {
714 netif_tx_start_queue(txq);
715 nic->drv_stats.txq_wake++;
716 if (netif_msg_tx_err(nic))
717 netdev_warn(netdev,
718 "%s: Transmit queue wakeup SQ%d\n",
719 netdev->name, cq_idx);
720 }
721 }
722
723 spin_unlock_bh(&cq->lock);
724 return work_done;
725 }
726
727 static int nicvf_poll(struct napi_struct *napi, int budget)
728 {
729 u64 cq_head;
730 int work_done = 0;
731 struct net_device *netdev = napi->dev;
732 struct nicvf *nic = netdev_priv(netdev);
733 struct nicvf_cq_poll *cq;
734
735 cq = container_of(napi, struct nicvf_cq_poll, napi);
736 work_done = nicvf_cq_intr_handler(netdev, cq->cq_idx, napi, budget);
737
738 if (work_done < budget) {
739 /* Slow packet rate, exit polling */
740 napi_complete(napi);
741 /* Re-enable interrupts */
742 cq_head = nicvf_queue_reg_read(nic, NIC_QSET_CQ_0_7_HEAD,
743 cq->cq_idx);
744 nicvf_clear_intr(nic, NICVF_INTR_CQ, cq->cq_idx);
745 nicvf_queue_reg_write(nic, NIC_QSET_CQ_0_7_HEAD,
746 cq->cq_idx, cq_head);
747 nicvf_enable_intr(nic, NICVF_INTR_CQ, cq->cq_idx);
748 }
749 return work_done;
750 }
751
752 /* Qset error interrupt handler
753 *
754 * As of now only CQ errors are handled
755 */
756 static void nicvf_handle_qs_err(unsigned long data)
757 {
758 struct nicvf *nic = (struct nicvf *)data;
759 struct queue_set *qs = nic->qs;
760 int qidx;
761 u64 status;
762
763 netif_tx_disable(nic->netdev);
764
765 /* Check if it is CQ err */
766 for (qidx = 0; qidx < qs->cq_cnt; qidx++) {
767 status = nicvf_queue_reg_read(nic, NIC_QSET_CQ_0_7_STATUS,
768 qidx);
769 if (!(status & CQ_ERR_MASK))
770 continue;
771 /* Process already queued CQEs and reconfig CQ */
772 nicvf_disable_intr(nic, NICVF_INTR_CQ, qidx);
773 nicvf_sq_disable(nic, qidx);
774 nicvf_cq_intr_handler(nic->netdev, qidx, NULL, 0);
775 nicvf_cmp_queue_config(nic, qs, qidx, true);
776 nicvf_sq_free_used_descs(nic->netdev, &qs->sq[qidx], qidx);
777 nicvf_sq_enable(nic, &qs->sq[qidx], qidx);
778
779 nicvf_enable_intr(nic, NICVF_INTR_CQ, qidx);
780 }
781
782 netif_tx_start_all_queues(nic->netdev);
783 /* Re-enable Qset error interrupt */
784 nicvf_enable_intr(nic, NICVF_INTR_QS_ERR, 0);
785 }
786
787 static void nicvf_dump_intr_status(struct nicvf *nic)
788 {
789 if (netif_msg_intr(nic))
790 netdev_info(nic->netdev, "%s: interrupt status 0x%llx\n",
791 nic->netdev->name, nicvf_reg_read(nic, NIC_VF_INT));
792 }
793
794 static irqreturn_t nicvf_misc_intr_handler(int irq, void *nicvf_irq)
795 {
796 struct nicvf *nic = (struct nicvf *)nicvf_irq;
797 u64 intr;
798
799 nicvf_dump_intr_status(nic);
800
801 intr = nicvf_reg_read(nic, NIC_VF_INT);
802 /* Check for spurious interrupt */
803 if (!(intr & NICVF_INTR_MBOX_MASK))
804 return IRQ_HANDLED;
805
806 nicvf_handle_mbx_intr(nic);
807
808 return IRQ_HANDLED;
809 }
810
811 static irqreturn_t nicvf_intr_handler(int irq, void *cq_irq)
812 {
813 struct nicvf_cq_poll *cq_poll = (struct nicvf_cq_poll *)cq_irq;
814 struct nicvf *nic = cq_poll->nicvf;
815 int qidx = cq_poll->cq_idx;
816
817 nicvf_dump_intr_status(nic);
818
819 /* Disable interrupts */
820 nicvf_disable_intr(nic, NICVF_INTR_CQ, qidx);
821
822 /* Schedule NAPI */
823 napi_schedule(&cq_poll->napi);
824
825 /* Clear interrupt */
826 nicvf_clear_intr(nic, NICVF_INTR_CQ, qidx);
827
828 return IRQ_HANDLED;
829 }
830
831 static irqreturn_t nicvf_rbdr_intr_handler(int irq, void *nicvf_irq)
832 {
833 struct nicvf *nic = (struct nicvf *)nicvf_irq;
834 u8 qidx;
835
836
837 nicvf_dump_intr_status(nic);
838
839 /* Disable RBDR interrupt and schedule softirq */
840 for (qidx = 0; qidx < nic->qs->rbdr_cnt; qidx++) {
841 if (!nicvf_is_intr_enabled(nic, NICVF_INTR_RBDR, qidx))
842 continue;
843 nicvf_disable_intr(nic, NICVF_INTR_RBDR, qidx);
844 tasklet_hi_schedule(&nic->rbdr_task);
845 /* Clear interrupt */
846 nicvf_clear_intr(nic, NICVF_INTR_RBDR, qidx);
847 }
848
849 return IRQ_HANDLED;
850 }
851
852 static irqreturn_t nicvf_qs_err_intr_handler(int irq, void *nicvf_irq)
853 {
854 struct nicvf *nic = (struct nicvf *)nicvf_irq;
855
856 nicvf_dump_intr_status(nic);
857
858 /* Disable Qset err interrupt and schedule softirq */
859 nicvf_disable_intr(nic, NICVF_INTR_QS_ERR, 0);
860 tasklet_hi_schedule(&nic->qs_err_task);
861 nicvf_clear_intr(nic, NICVF_INTR_QS_ERR, 0);
862
863 return IRQ_HANDLED;
864 }
865
866 static int nicvf_enable_msix(struct nicvf *nic)
867 {
868 int ret, vec;
869
870 nic->num_vec = NIC_VF_MSIX_VECTORS;
871
872 for (vec = 0; vec < nic->num_vec; vec++)
873 nic->msix_entries[vec].entry = vec;
874
875 ret = pci_enable_msix(nic->pdev, nic->msix_entries, nic->num_vec);
876 if (ret) {
877 netdev_err(nic->netdev,
878 "Req for #%d msix vectors failed\n", nic->num_vec);
879 return 0;
880 }
881 nic->msix_enabled = 1;
882 return 1;
883 }
884
885 static void nicvf_disable_msix(struct nicvf *nic)
886 {
887 if (nic->msix_enabled) {
888 pci_disable_msix(nic->pdev);
889 nic->msix_enabled = 0;
890 nic->num_vec = 0;
891 }
892 }
893
894 static int nicvf_register_interrupts(struct nicvf *nic)
895 {
896 int irq, ret = 0;
897 int vector;
898
899 for_each_cq_irq(irq)
900 sprintf(nic->irq_name[irq], "NICVF%d CQ%d",
901 nic->vf_id, irq);
902
903 for_each_sq_irq(irq)
904 sprintf(nic->irq_name[irq], "NICVF%d SQ%d",
905 nic->vf_id, irq - NICVF_INTR_ID_SQ);
906
907 for_each_rbdr_irq(irq)
908 sprintf(nic->irq_name[irq], "NICVF%d RBDR%d",
909 nic->vf_id, irq - NICVF_INTR_ID_RBDR);
910
911 /* Register CQ interrupts */
912 for (irq = 0; irq < nic->qs->cq_cnt; irq++) {
913 vector = nic->msix_entries[irq].vector;
914 ret = request_irq(vector, nicvf_intr_handler,
915 0, nic->irq_name[irq], nic->napi[irq]);
916 if (ret)
917 goto err;
918 nic->irq_allocated[irq] = true;
919 }
920
921 /* Register RBDR interrupt */
922 for (irq = NICVF_INTR_ID_RBDR;
923 irq < (NICVF_INTR_ID_RBDR + nic->qs->rbdr_cnt); irq++) {
924 vector = nic->msix_entries[irq].vector;
925 ret = request_irq(vector, nicvf_rbdr_intr_handler,
926 0, nic->irq_name[irq], nic);
927 if (ret)
928 goto err;
929 nic->irq_allocated[irq] = true;
930 }
931
932 /* Register QS error interrupt */
933 sprintf(nic->irq_name[NICVF_INTR_ID_QS_ERR],
934 "NICVF%d Qset error", nic->vf_id);
935 irq = NICVF_INTR_ID_QS_ERR;
936 ret = request_irq(nic->msix_entries[irq].vector,
937 nicvf_qs_err_intr_handler,
938 0, nic->irq_name[irq], nic);
939 if (!ret)
940 nic->irq_allocated[irq] = true;
941
942 err:
943 if (ret)
944 netdev_err(nic->netdev, "request_irq failed, vector %d\n", irq);
945
946 return ret;
947 }
948
949 static void nicvf_unregister_interrupts(struct nicvf *nic)
950 {
951 int irq;
952
953 /* Free registered interrupts */
954 for (irq = 0; irq < nic->num_vec; irq++) {
955 if (!nic->irq_allocated[irq])
956 continue;
957
958 if (irq < NICVF_INTR_ID_SQ)
959 free_irq(nic->msix_entries[irq].vector, nic->napi[irq]);
960 else
961 free_irq(nic->msix_entries[irq].vector, nic);
962
963 nic->irq_allocated[irq] = false;
964 }
965
966 /* Disable MSI-X */
967 nicvf_disable_msix(nic);
968 }
969
970 /* Initialize MSIX vectors and register MISC interrupt.
971 * Send READY message to PF to check if its alive
972 */
973 static int nicvf_register_misc_interrupt(struct nicvf *nic)
974 {
975 int ret = 0;
976 int irq = NICVF_INTR_ID_MISC;
977
978 /* Return if mailbox interrupt is already registered */
979 if (nic->msix_enabled)
980 return 0;
981
982 /* Enable MSI-X */
983 if (!nicvf_enable_msix(nic))
984 return 1;
985
986 sprintf(nic->irq_name[irq], "%s Mbox", "NICVF");
987 /* Register Misc interrupt */
988 ret = request_irq(nic->msix_entries[irq].vector,
989 nicvf_misc_intr_handler, 0, nic->irq_name[irq], nic);
990
991 if (ret)
992 return ret;
993 nic->irq_allocated[irq] = true;
994
995 /* Enable mailbox interrupt */
996 nicvf_enable_intr(nic, NICVF_INTR_MBOX, 0);
997
998 /* Check if VF is able to communicate with PF */
999 if (!nicvf_check_pf_ready(nic)) {
1000 nicvf_disable_intr(nic, NICVF_INTR_MBOX, 0);
1001 nicvf_unregister_interrupts(nic);
1002 return 1;
1003 }
1004
1005 return 0;
1006 }
1007
1008 static netdev_tx_t nicvf_xmit(struct sk_buff *skb, struct net_device *netdev)
1009 {
1010 struct nicvf *nic = netdev_priv(netdev);
1011 int qid = skb_get_queue_mapping(skb);
1012 struct netdev_queue *txq = netdev_get_tx_queue(netdev, qid);
1013
1014 /* Check for minimum packet length */
1015 if (skb->len <= ETH_HLEN) {
1016 dev_kfree_skb(skb);
1017 return NETDEV_TX_OK;
1018 }
1019
1020 if (!netif_tx_queue_stopped(txq) && !nicvf_sq_append_skb(nic, skb)) {
1021 netif_tx_stop_queue(txq);
1022 nic->drv_stats.txq_stop++;
1023 if (netif_msg_tx_err(nic))
1024 netdev_warn(netdev,
1025 "%s: Transmit ring full, stopping SQ%d\n",
1026 netdev->name, qid);
1027 return NETDEV_TX_BUSY;
1028 }
1029
1030 return NETDEV_TX_OK;
1031 }
1032
1033 static inline void nicvf_free_cq_poll(struct nicvf *nic)
1034 {
1035 struct nicvf_cq_poll *cq_poll;
1036 int qidx;
1037
1038 for (qidx = 0; qidx < nic->qs->cq_cnt; qidx++) {
1039 cq_poll = nic->napi[qidx];
1040 if (!cq_poll)
1041 continue;
1042 nic->napi[qidx] = NULL;
1043 kfree(cq_poll);
1044 }
1045 }
1046
1047 int nicvf_stop(struct net_device *netdev)
1048 {
1049 int irq, qidx;
1050 struct nicvf *nic = netdev_priv(netdev);
1051 struct queue_set *qs = nic->qs;
1052 struct nicvf_cq_poll *cq_poll = NULL;
1053 union nic_mbx mbx = {};
1054
1055 mbx.msg.msg = NIC_MBOX_MSG_SHUTDOWN;
1056 nicvf_send_msg_to_pf(nic, &mbx);
1057
1058 netif_carrier_off(netdev);
1059 netif_tx_stop_all_queues(nic->netdev);
1060
1061 /* Teardown secondary qsets first */
1062 if (!nic->sqs_mode) {
1063 for (qidx = 0; qidx < nic->sqs_count; qidx++) {
1064 if (!nic->snicvf[qidx])
1065 continue;
1066 nicvf_stop(nic->snicvf[qidx]->netdev);
1067 nic->snicvf[qidx] = NULL;
1068 }
1069 }
1070
1071 /* Disable RBDR & QS error interrupts */
1072 for (qidx = 0; qidx < qs->rbdr_cnt; qidx++) {
1073 nicvf_disable_intr(nic, NICVF_INTR_RBDR, qidx);
1074 nicvf_clear_intr(nic, NICVF_INTR_RBDR, qidx);
1075 }
1076 nicvf_disable_intr(nic, NICVF_INTR_QS_ERR, 0);
1077 nicvf_clear_intr(nic, NICVF_INTR_QS_ERR, 0);
1078
1079 /* Wait for pending IRQ handlers to finish */
1080 for (irq = 0; irq < nic->num_vec; irq++)
1081 synchronize_irq(nic->msix_entries[irq].vector);
1082
1083 tasklet_kill(&nic->rbdr_task);
1084 tasklet_kill(&nic->qs_err_task);
1085 if (nic->rb_work_scheduled)
1086 cancel_delayed_work_sync(&nic->rbdr_work);
1087
1088 for (qidx = 0; qidx < nic->qs->cq_cnt; qidx++) {
1089 cq_poll = nic->napi[qidx];
1090 if (!cq_poll)
1091 continue;
1092 napi_synchronize(&cq_poll->napi);
1093 /* CQ intr is enabled while napi_complete,
1094 * so disable it now
1095 */
1096 nicvf_disable_intr(nic, NICVF_INTR_CQ, qidx);
1097 nicvf_clear_intr(nic, NICVF_INTR_CQ, qidx);
1098 napi_disable(&cq_poll->napi);
1099 netif_napi_del(&cq_poll->napi);
1100 }
1101
1102 netif_tx_disable(netdev);
1103
1104 /* Free resources */
1105 nicvf_config_data_transfer(nic, false);
1106
1107 /* Disable HW Qset */
1108 nicvf_qset_config(nic, false);
1109
1110 /* disable mailbox interrupt */
1111 nicvf_disable_intr(nic, NICVF_INTR_MBOX, 0);
1112
1113 nicvf_unregister_interrupts(nic);
1114
1115 nicvf_free_cq_poll(nic);
1116
1117 /* Clear multiqset info */
1118 nic->pnicvf = nic;
1119 nic->sqs_count = 0;
1120
1121 return 0;
1122 }
1123
1124 int nicvf_open(struct net_device *netdev)
1125 {
1126 int err, qidx;
1127 struct nicvf *nic = netdev_priv(netdev);
1128 struct queue_set *qs = nic->qs;
1129 struct nicvf_cq_poll *cq_poll = NULL;
1130
1131 nic->mtu = netdev->mtu;
1132
1133 netif_carrier_off(netdev);
1134
1135 err = nicvf_register_misc_interrupt(nic);
1136 if (err)
1137 return err;
1138
1139 /* Register NAPI handler for processing CQEs */
1140 for (qidx = 0; qidx < qs->cq_cnt; qidx++) {
1141 cq_poll = kzalloc(sizeof(*cq_poll), GFP_KERNEL);
1142 if (!cq_poll) {
1143 err = -ENOMEM;
1144 goto napi_del;
1145 }
1146 cq_poll->cq_idx = qidx;
1147 cq_poll->nicvf = nic;
1148 netif_napi_add(netdev, &cq_poll->napi, nicvf_poll,
1149 NAPI_POLL_WEIGHT);
1150 napi_enable(&cq_poll->napi);
1151 nic->napi[qidx] = cq_poll;
1152 }
1153
1154 /* Check if we got MAC address from PF or else generate a radom MAC */
1155 if (is_zero_ether_addr(netdev->dev_addr)) {
1156 eth_hw_addr_random(netdev);
1157 nicvf_hw_set_mac_addr(nic, netdev);
1158 }
1159
1160 if (nic->set_mac_pending) {
1161 nic->set_mac_pending = false;
1162 nicvf_hw_set_mac_addr(nic, netdev);
1163 }
1164
1165 /* Init tasklet for handling Qset err interrupt */
1166 tasklet_init(&nic->qs_err_task, nicvf_handle_qs_err,
1167 (unsigned long)nic);
1168
1169 /* Init RBDR tasklet which will refill RBDR */
1170 tasklet_init(&nic->rbdr_task, nicvf_rbdr_task,
1171 (unsigned long)nic);
1172 INIT_DELAYED_WORK(&nic->rbdr_work, nicvf_rbdr_work);
1173
1174 /* Configure CPI alorithm */
1175 nic->cpi_alg = cpi_alg;
1176 if (!nic->sqs_mode)
1177 nicvf_config_cpi(nic);
1178
1179 nicvf_request_sqs(nic);
1180 if (nic->sqs_mode)
1181 nicvf_get_primary_vf_struct(nic);
1182
1183 /* Configure receive side scaling */
1184 if (!nic->sqs_mode)
1185 nicvf_rss_init(nic);
1186
1187 err = nicvf_register_interrupts(nic);
1188 if (err)
1189 goto cleanup;
1190
1191 /* Initialize the queues */
1192 err = nicvf_init_resources(nic);
1193 if (err)
1194 goto cleanup;
1195
1196 /* Make sure queue initialization is written */
1197 wmb();
1198
1199 nicvf_reg_write(nic, NIC_VF_INT, -1);
1200 /* Enable Qset err interrupt */
1201 nicvf_enable_intr(nic, NICVF_INTR_QS_ERR, 0);
1202
1203 /* Enable completion queue interrupt */
1204 for (qidx = 0; qidx < qs->cq_cnt; qidx++)
1205 nicvf_enable_intr(nic, NICVF_INTR_CQ, qidx);
1206
1207 /* Enable RBDR threshold interrupt */
1208 for (qidx = 0; qidx < qs->rbdr_cnt; qidx++)
1209 nicvf_enable_intr(nic, NICVF_INTR_RBDR, qidx);
1210
1211 nic->drv_stats.txq_stop = 0;
1212 nic->drv_stats.txq_wake = 0;
1213
1214 netif_carrier_on(netdev);
1215 netif_tx_start_all_queues(netdev);
1216
1217 return 0;
1218 cleanup:
1219 nicvf_disable_intr(nic, NICVF_INTR_MBOX, 0);
1220 nicvf_unregister_interrupts(nic);
1221 tasklet_kill(&nic->qs_err_task);
1222 tasklet_kill(&nic->rbdr_task);
1223 napi_del:
1224 for (qidx = 0; qidx < qs->cq_cnt; qidx++) {
1225 cq_poll = nic->napi[qidx];
1226 if (!cq_poll)
1227 continue;
1228 napi_disable(&cq_poll->napi);
1229 netif_napi_del(&cq_poll->napi);
1230 }
1231 nicvf_free_cq_poll(nic);
1232 return err;
1233 }
1234
1235 static int nicvf_update_hw_max_frs(struct nicvf *nic, int mtu)
1236 {
1237 union nic_mbx mbx = {};
1238
1239 mbx.frs.msg = NIC_MBOX_MSG_SET_MAX_FRS;
1240 mbx.frs.max_frs = mtu;
1241 mbx.frs.vf_id = nic->vf_id;
1242
1243 return nicvf_send_msg_to_pf(nic, &mbx);
1244 }
1245
1246 static int nicvf_change_mtu(struct net_device *netdev, int new_mtu)
1247 {
1248 struct nicvf *nic = netdev_priv(netdev);
1249
1250 if (new_mtu > NIC_HW_MAX_FRS)
1251 return -EINVAL;
1252
1253 if (new_mtu < NIC_HW_MIN_FRS)
1254 return -EINVAL;
1255
1256 if (nicvf_update_hw_max_frs(nic, new_mtu))
1257 return -EINVAL;
1258 netdev->mtu = new_mtu;
1259 nic->mtu = new_mtu;
1260
1261 return 0;
1262 }
1263
1264 static int nicvf_set_mac_address(struct net_device *netdev, void *p)
1265 {
1266 struct sockaddr *addr = p;
1267 struct nicvf *nic = netdev_priv(netdev);
1268
1269 if (!is_valid_ether_addr(addr->sa_data))
1270 return -EADDRNOTAVAIL;
1271
1272 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1273
1274 if (nic->msix_enabled) {
1275 if (nicvf_hw_set_mac_addr(nic, netdev))
1276 return -EBUSY;
1277 } else {
1278 nic->set_mac_pending = true;
1279 }
1280
1281 return 0;
1282 }
1283
1284 void nicvf_update_lmac_stats(struct nicvf *nic)
1285 {
1286 int stat = 0;
1287 union nic_mbx mbx = {};
1288
1289 if (!netif_running(nic->netdev))
1290 return;
1291
1292 mbx.bgx_stats.msg = NIC_MBOX_MSG_BGX_STATS;
1293 mbx.bgx_stats.vf_id = nic->vf_id;
1294 /* Rx stats */
1295 mbx.bgx_stats.rx = 1;
1296 while (stat < BGX_RX_STATS_COUNT) {
1297 mbx.bgx_stats.idx = stat;
1298 if (nicvf_send_msg_to_pf(nic, &mbx))
1299 return;
1300 stat++;
1301 }
1302
1303 stat = 0;
1304
1305 /* Tx stats */
1306 mbx.bgx_stats.rx = 0;
1307 while (stat < BGX_TX_STATS_COUNT) {
1308 mbx.bgx_stats.idx = stat;
1309 if (nicvf_send_msg_to_pf(nic, &mbx))
1310 return;
1311 stat++;
1312 }
1313 }
1314
1315 void nicvf_update_stats(struct nicvf *nic)
1316 {
1317 int qidx;
1318 struct nicvf_hw_stats *stats = &nic->hw_stats;
1319 struct nicvf_drv_stats *drv_stats = &nic->drv_stats;
1320 struct queue_set *qs = nic->qs;
1321
1322 #define GET_RX_STATS(reg) \
1323 nicvf_reg_read(nic, NIC_VNIC_RX_STAT_0_13 | (reg << 3))
1324 #define GET_TX_STATS(reg) \
1325 nicvf_reg_read(nic, NIC_VNIC_TX_STAT_0_4 | (reg << 3))
1326
1327 stats->rx_bytes = GET_RX_STATS(RX_OCTS);
1328 stats->rx_ucast_frames = GET_RX_STATS(RX_UCAST);
1329 stats->rx_bcast_frames = GET_RX_STATS(RX_BCAST);
1330 stats->rx_mcast_frames = GET_RX_STATS(RX_MCAST);
1331 stats->rx_fcs_errors = GET_RX_STATS(RX_FCS);
1332 stats->rx_l2_errors = GET_RX_STATS(RX_L2ERR);
1333 stats->rx_drop_red = GET_RX_STATS(RX_RED);
1334 stats->rx_drop_red_bytes = GET_RX_STATS(RX_RED_OCTS);
1335 stats->rx_drop_overrun = GET_RX_STATS(RX_ORUN);
1336 stats->rx_drop_overrun_bytes = GET_RX_STATS(RX_ORUN_OCTS);
1337 stats->rx_drop_bcast = GET_RX_STATS(RX_DRP_BCAST);
1338 stats->rx_drop_mcast = GET_RX_STATS(RX_DRP_MCAST);
1339 stats->rx_drop_l3_bcast = GET_RX_STATS(RX_DRP_L3BCAST);
1340 stats->rx_drop_l3_mcast = GET_RX_STATS(RX_DRP_L3MCAST);
1341
1342 stats->tx_bytes_ok = GET_TX_STATS(TX_OCTS);
1343 stats->tx_ucast_frames_ok = GET_TX_STATS(TX_UCAST);
1344 stats->tx_bcast_frames_ok = GET_TX_STATS(TX_BCAST);
1345 stats->tx_mcast_frames_ok = GET_TX_STATS(TX_MCAST);
1346 stats->tx_drops = GET_TX_STATS(TX_DROP);
1347
1348 drv_stats->tx_frames_ok = stats->tx_ucast_frames_ok +
1349 stats->tx_bcast_frames_ok +
1350 stats->tx_mcast_frames_ok;
1351 drv_stats->rx_drops = stats->rx_drop_red +
1352 stats->rx_drop_overrun;
1353 drv_stats->tx_drops = stats->tx_drops;
1354
1355 /* Update RQ and SQ stats */
1356 for (qidx = 0; qidx < qs->rq_cnt; qidx++)
1357 nicvf_update_rq_stats(nic, qidx);
1358 for (qidx = 0; qidx < qs->sq_cnt; qidx++)
1359 nicvf_update_sq_stats(nic, qidx);
1360 }
1361
1362 static struct rtnl_link_stats64 *nicvf_get_stats64(struct net_device *netdev,
1363 struct rtnl_link_stats64 *stats)
1364 {
1365 struct nicvf *nic = netdev_priv(netdev);
1366 struct nicvf_hw_stats *hw_stats = &nic->hw_stats;
1367 struct nicvf_drv_stats *drv_stats = &nic->drv_stats;
1368
1369 nicvf_update_stats(nic);
1370
1371 stats->rx_bytes = hw_stats->rx_bytes;
1372 stats->rx_packets = drv_stats->rx_frames_ok;
1373 stats->rx_dropped = drv_stats->rx_drops;
1374 stats->multicast = hw_stats->rx_mcast_frames;
1375
1376 stats->tx_bytes = hw_stats->tx_bytes_ok;
1377 stats->tx_packets = drv_stats->tx_frames_ok;
1378 stats->tx_dropped = drv_stats->tx_drops;
1379
1380 return stats;
1381 }
1382
1383 static void nicvf_tx_timeout(struct net_device *dev)
1384 {
1385 struct nicvf *nic = netdev_priv(dev);
1386
1387 if (netif_msg_tx_err(nic))
1388 netdev_warn(dev, "%s: Transmit timed out, resetting\n",
1389 dev->name);
1390
1391 schedule_work(&nic->reset_task);
1392 }
1393
1394 static void nicvf_reset_task(struct work_struct *work)
1395 {
1396 struct nicvf *nic;
1397
1398 nic = container_of(work, struct nicvf, reset_task);
1399
1400 if (!netif_running(nic->netdev))
1401 return;
1402
1403 nicvf_stop(nic->netdev);
1404 nicvf_open(nic->netdev);
1405 nic->netdev->trans_start = jiffies;
1406 }
1407
1408 static int nicvf_config_loopback(struct nicvf *nic,
1409 netdev_features_t features)
1410 {
1411 union nic_mbx mbx = {};
1412
1413 mbx.lbk.msg = NIC_MBOX_MSG_LOOPBACK;
1414 mbx.lbk.vf_id = nic->vf_id;
1415 mbx.lbk.enable = (features & NETIF_F_LOOPBACK) != 0;
1416
1417 return nicvf_send_msg_to_pf(nic, &mbx);
1418 }
1419
1420 static netdev_features_t nicvf_fix_features(struct net_device *netdev,
1421 netdev_features_t features)
1422 {
1423 struct nicvf *nic = netdev_priv(netdev);
1424
1425 if ((features & NETIF_F_LOOPBACK) &&
1426 netif_running(netdev) && !nic->loopback_supported)
1427 features &= ~NETIF_F_LOOPBACK;
1428
1429 return features;
1430 }
1431
1432 static int nicvf_set_features(struct net_device *netdev,
1433 netdev_features_t features)
1434 {
1435 struct nicvf *nic = netdev_priv(netdev);
1436 netdev_features_t changed = features ^ netdev->features;
1437
1438 if (changed & NETIF_F_HW_VLAN_CTAG_RX)
1439 nicvf_config_vlan_stripping(nic, features);
1440
1441 if ((changed & NETIF_F_LOOPBACK) && netif_running(netdev))
1442 return nicvf_config_loopback(nic, features);
1443
1444 return 0;
1445 }
1446
1447 static const struct net_device_ops nicvf_netdev_ops = {
1448 .ndo_open = nicvf_open,
1449 .ndo_stop = nicvf_stop,
1450 .ndo_start_xmit = nicvf_xmit,
1451 .ndo_change_mtu = nicvf_change_mtu,
1452 .ndo_set_mac_address = nicvf_set_mac_address,
1453 .ndo_get_stats64 = nicvf_get_stats64,
1454 .ndo_tx_timeout = nicvf_tx_timeout,
1455 .ndo_fix_features = nicvf_fix_features,
1456 .ndo_set_features = nicvf_set_features,
1457 };
1458
1459 static int nicvf_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1460 {
1461 struct device *dev = &pdev->dev;
1462 struct net_device *netdev;
1463 struct nicvf *nic;
1464 int err, qcount;
1465
1466 err = pci_enable_device(pdev);
1467 if (err) {
1468 dev_err(dev, "Failed to enable PCI device\n");
1469 return err;
1470 }
1471
1472 err = pci_request_regions(pdev, DRV_NAME);
1473 if (err) {
1474 dev_err(dev, "PCI request regions failed 0x%x\n", err);
1475 goto err_disable_device;
1476 }
1477
1478 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(48));
1479 if (err) {
1480 dev_err(dev, "Unable to get usable DMA configuration\n");
1481 goto err_release_regions;
1482 }
1483
1484 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(48));
1485 if (err) {
1486 dev_err(dev, "unable to get 48-bit DMA for consistent allocations\n");
1487 goto err_release_regions;
1488 }
1489
1490 qcount = MAX_CMP_QUEUES_PER_QS;
1491
1492 /* Restrict multiqset support only for host bound VFs */
1493 if (pdev->is_virtfn) {
1494 /* Set max number of queues per VF */
1495 qcount = roundup(num_online_cpus(), MAX_CMP_QUEUES_PER_QS);
1496 qcount = min(qcount,
1497 (MAX_SQS_PER_VF + 1) * MAX_CMP_QUEUES_PER_QS);
1498 }
1499
1500 netdev = alloc_etherdev_mqs(sizeof(struct nicvf), qcount, qcount);
1501 if (!netdev) {
1502 err = -ENOMEM;
1503 goto err_release_regions;
1504 }
1505
1506 pci_set_drvdata(pdev, netdev);
1507
1508 SET_NETDEV_DEV(netdev, &pdev->dev);
1509
1510 nic = netdev_priv(netdev);
1511 nic->netdev = netdev;
1512 nic->pdev = pdev;
1513 nic->pnicvf = nic;
1514 nic->max_queues = qcount;
1515
1516 /* MAP VF's configuration registers */
1517 nic->reg_base = pcim_iomap(pdev, PCI_CFG_REG_BAR_NUM, 0);
1518 if (!nic->reg_base) {
1519 dev_err(dev, "Cannot map config register space, aborting\n");
1520 err = -ENOMEM;
1521 goto err_free_netdev;
1522 }
1523
1524 err = nicvf_set_qset_resources(nic);
1525 if (err)
1526 goto err_free_netdev;
1527
1528 /* Check if PF is alive and get MAC address for this VF */
1529 err = nicvf_register_misc_interrupt(nic);
1530 if (err)
1531 goto err_free_netdev;
1532
1533 nicvf_send_vf_struct(nic);
1534
1535 /* Check if this VF is in QS only mode */
1536 if (nic->sqs_mode)
1537 return 0;
1538
1539 err = nicvf_set_real_num_queues(netdev, nic->tx_queues, nic->rx_queues);
1540 if (err)
1541 goto err_unregister_interrupts;
1542
1543 netdev->hw_features = (NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_SG |
1544 NETIF_F_TSO | NETIF_F_GRO |
1545 NETIF_F_HW_VLAN_CTAG_RX);
1546
1547 netdev->hw_features |= NETIF_F_RXHASH;
1548
1549 netdev->features |= netdev->hw_features;
1550 netdev->hw_features |= NETIF_F_LOOPBACK;
1551
1552 netdev->vlan_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_TSO;
1553
1554 netdev->netdev_ops = &nicvf_netdev_ops;
1555 netdev->watchdog_timeo = NICVF_TX_TIMEOUT;
1556
1557 INIT_WORK(&nic->reset_task, nicvf_reset_task);
1558
1559 err = register_netdev(netdev);
1560 if (err) {
1561 dev_err(dev, "Failed to register netdevice\n");
1562 goto err_unregister_interrupts;
1563 }
1564
1565 nic->msg_enable = debug;
1566
1567 nicvf_set_ethtool_ops(netdev);
1568
1569 return 0;
1570
1571 err_unregister_interrupts:
1572 nicvf_unregister_interrupts(nic);
1573 err_free_netdev:
1574 pci_set_drvdata(pdev, NULL);
1575 free_netdev(netdev);
1576 err_release_regions:
1577 pci_release_regions(pdev);
1578 err_disable_device:
1579 pci_disable_device(pdev);
1580 return err;
1581 }
1582
1583 static void nicvf_remove(struct pci_dev *pdev)
1584 {
1585 struct net_device *netdev = pci_get_drvdata(pdev);
1586 struct nicvf *nic = netdev_priv(netdev);
1587 struct net_device *pnetdev = nic->pnicvf->netdev;
1588
1589 /* Check if this Qset is assigned to different VF.
1590 * If yes, clean primary and all secondary Qsets.
1591 */
1592 if (pnetdev && (pnetdev->reg_state == NETREG_REGISTERED))
1593 unregister_netdev(pnetdev);
1594 nicvf_unregister_interrupts(nic);
1595 pci_set_drvdata(pdev, NULL);
1596 free_netdev(netdev);
1597 pci_release_regions(pdev);
1598 pci_disable_device(pdev);
1599 }
1600
1601 static void nicvf_shutdown(struct pci_dev *pdev)
1602 {
1603 nicvf_remove(pdev);
1604 }
1605
1606 static struct pci_driver nicvf_driver = {
1607 .name = DRV_NAME,
1608 .id_table = nicvf_id_table,
1609 .probe = nicvf_probe,
1610 .remove = nicvf_remove,
1611 .shutdown = nicvf_shutdown,
1612 };
1613
1614 static int __init nicvf_init_module(void)
1615 {
1616 pr_info("%s, ver %s\n", DRV_NAME, DRV_VERSION);
1617
1618 return pci_register_driver(&nicvf_driver);
1619 }
1620
1621 static void __exit nicvf_cleanup_module(void)
1622 {
1623 pci_unregister_driver(&nicvf_driver);
1624 }
1625
1626 module_init(nicvf_init_module);
1627 module_exit(nicvf_cleanup_module);
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