2 * Copyright (C) 2005 - 2015 Emulex
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License version 2
7 * as published by the Free Software Foundation. The full GNU General
8 * Public License is included in this distribution in the file called COPYING.
10 * Contact Information:
11 * linux-drivers@emulex.com
15 * Costa Mesa, CA 92626
19 * The driver sends configuration and managements command requests to the
20 * firmware in the BE. These requests are communicated to the processor
21 * using Work Request Blocks (WRBs) submitted to the MCC-WRB ring or via one
22 * WRB inside a MAILBOX.
23 * The commands are serviced by the ARM processor in the BladeEngine's MPU.
32 #define MCC_WRB_EMBEDDED_MASK 1 /* bit 0 of dword 0*/
33 #define MCC_WRB_SGE_CNT_SHIFT 3 /* bits 3 - 7 of dword 0 */
34 #define MCC_WRB_SGE_CNT_MASK 0x1F /* bits 3 - 7 of dword 0 */
36 u32 embedded
; /* dword 0 */
37 u32 payload_length
; /* dword 1 */
38 u32 tag0
; /* dword 2 */
39 u32 tag1
; /* dword 3 */
40 u32 rsvd
; /* dword 4 */
42 u8 embedded_payload
[236]; /* used by embedded cmds */
43 struct be_sge sgl
[19]; /* used by non-embedded cmds */
47 #define CQE_FLAGS_VALID_MASK BIT(31)
48 #define CQE_FLAGS_ASYNC_MASK BIT(30)
49 #define CQE_FLAGS_COMPLETED_MASK BIT(28)
50 #define CQE_FLAGS_CONSUMED_MASK BIT(27)
52 /* Completion Status */
53 enum mcc_base_status
{
54 MCC_STATUS_SUCCESS
= 0,
55 MCC_STATUS_FAILED
= 1,
56 MCC_STATUS_ILLEGAL_REQUEST
= 2,
57 MCC_STATUS_ILLEGAL_FIELD
= 3,
58 MCC_STATUS_INSUFFICIENT_BUFFER
= 4,
59 MCC_STATUS_UNAUTHORIZED_REQUEST
= 5,
60 MCC_STATUS_NOT_SUPPORTED
= 66,
61 MCC_STATUS_FEATURE_NOT_SUPPORTED
= 68
64 /* Additional status */
65 enum mcc_addl_status
{
66 MCC_ADDL_STATUS_INSUFFICIENT_RESOURCES
= 0x16,
67 MCC_ADDL_STATUS_FLASH_IMAGE_CRC_MISMATCH
= 0x4d,
68 MCC_ADDL_STATUS_TOO_MANY_INTERFACES
= 0x4a,
69 MCC_ADDL_STATUS_INSUFFICIENT_VLANS
= 0xab
72 #define CQE_BASE_STATUS_MASK 0xFFFF
73 #define CQE_BASE_STATUS_SHIFT 0 /* bits 0 - 15 */
74 #define CQE_ADDL_STATUS_MASK 0xFF
75 #define CQE_ADDL_STATUS_SHIFT 16 /* bits 16 - 31 */
77 #define base_status(status) \
78 ((enum mcc_base_status) \
79 (status > 0 ? (status & CQE_BASE_STATUS_MASK) : 0))
80 #define addl_status(status) \
81 ((enum mcc_addl_status) \
82 (status > 0 ? (status >> CQE_ADDL_STATUS_SHIFT) & \
83 CQE_ADDL_STATUS_MASK : 0))
86 u32 status
; /* dword 0 */
87 u32 tag0
; /* dword 1 */
88 u32 tag1
; /* dword 2 */
89 u32 flags
; /* dword 3 */
92 /* When the async bit of mcc_compl flags is set, flags
93 * is interpreted as follows:
95 #define ASYNC_EVENT_CODE_SHIFT 8 /* bits 8 - 15 */
96 #define ASYNC_EVENT_CODE_MASK 0xFF
97 #define ASYNC_EVENT_TYPE_SHIFT 16
98 #define ASYNC_EVENT_TYPE_MASK 0xFF
99 #define ASYNC_EVENT_CODE_LINK_STATE 0x1
100 #define ASYNC_EVENT_CODE_GRP_5 0x5
101 #define ASYNC_EVENT_QOS_SPEED 0x1
102 #define ASYNC_EVENT_COS_PRIORITY 0x2
103 #define ASYNC_EVENT_PVID_STATE 0x3
104 #define ASYNC_EVENT_CODE_QNQ 0x6
105 #define ASYNC_DEBUG_EVENT_TYPE_QNQ 1
106 #define ASYNC_EVENT_CODE_SLIPORT 0x11
107 #define ASYNC_EVENT_PORT_MISCONFIG 0x9
108 #define ASYNC_EVENT_FW_CONTROL 0x5
114 #define LINK_STATUS_MASK 0x1
115 #define LOGICAL_LINK_STATUS_MASK 0x2
117 /* When the event code of compl->flags is link-state, the mcc_compl
118 * must be interpreted as follows
120 struct be_async_event_link_state
{
130 /* When the event code of compl->flags is GRP-5 and event_type is QOS_SPEED
131 * the mcc_compl must be interpreted as follows
133 struct be_async_event_grp5_qos_link_speed
{
141 /* When the event code of compl->flags is GRP5 and event type is
142 * CoS-Priority, the mcc_compl must be interpreted as follows
144 struct be_async_event_grp5_cos_priority
{
146 u8 available_priority_bmap
;
147 u8 reco_default_priority
;
154 /* When the event code of compl->flags is GRP5 and event type is
155 * PVID state, the mcc_compl must be interpreted as follows
157 struct be_async_event_grp5_pvid_state
{
166 /* async event indicating outer VLAN tag in QnQ */
167 struct be_async_event_qnq
{
168 u8 valid
; /* Indicates if outer VLAN is valid */
176 #define INCOMPATIBLE_SFP 0x3
177 /* async event indicating misconfigured port */
178 struct be_async_event_misconfig_port
{
179 u32 event_data_word1
;
180 u32 event_data_word2
;
185 #define BMC_FILT_BROADCAST_ARP BIT(0)
186 #define BMC_FILT_BROADCAST_DHCP_CLIENT BIT(1)
187 #define BMC_FILT_BROADCAST_DHCP_SERVER BIT(2)
188 #define BMC_FILT_BROADCAST_NET_BIOS BIT(3)
189 #define BMC_FILT_BROADCAST BIT(7)
190 #define BMC_FILT_MULTICAST_IPV6_NEIGH_ADVER BIT(8)
191 #define BMC_FILT_MULTICAST_IPV6_RA BIT(9)
192 #define BMC_FILT_MULTICAST_IPV6_RAS BIT(10)
193 #define BMC_FILT_MULTICAST BIT(15)
194 struct be_async_fw_control
{
195 u32 event_data_word1
;
196 u32 event_data_word2
;
198 u32 event_data_word4
;
201 struct be_mcc_mailbox
{
202 struct be_mcc_wrb wrb
;
203 struct be_mcc_compl
compl;
206 #define CMD_SUBSYSTEM_COMMON 0x1
207 #define CMD_SUBSYSTEM_ETH 0x3
208 #define CMD_SUBSYSTEM_LOWLEVEL 0xb
210 #define OPCODE_COMMON_NTWK_MAC_QUERY 1
211 #define OPCODE_COMMON_NTWK_MAC_SET 2
212 #define OPCODE_COMMON_NTWK_MULTICAST_SET 3
213 #define OPCODE_COMMON_NTWK_VLAN_CONFIG 4
214 #define OPCODE_COMMON_NTWK_LINK_STATUS_QUERY 5
215 #define OPCODE_COMMON_READ_FLASHROM 6
216 #define OPCODE_COMMON_WRITE_FLASHROM 7
217 #define OPCODE_COMMON_CQ_CREATE 12
218 #define OPCODE_COMMON_EQ_CREATE 13
219 #define OPCODE_COMMON_MCC_CREATE 21
220 #define OPCODE_COMMON_SET_QOS 28
221 #define OPCODE_COMMON_MCC_CREATE_EXT 90
222 #define OPCODE_COMMON_SEEPROM_READ 30
223 #define OPCODE_COMMON_GET_CNTL_ATTRIBUTES 32
224 #define OPCODE_COMMON_NTWK_RX_FILTER 34
225 #define OPCODE_COMMON_GET_FW_VERSION 35
226 #define OPCODE_COMMON_SET_FLOW_CONTROL 36
227 #define OPCODE_COMMON_GET_FLOW_CONTROL 37
228 #define OPCODE_COMMON_SET_FRAME_SIZE 39
229 #define OPCODE_COMMON_MODIFY_EQ_DELAY 41
230 #define OPCODE_COMMON_FIRMWARE_CONFIG 42
231 #define OPCODE_COMMON_NTWK_INTERFACE_CREATE 50
232 #define OPCODE_COMMON_NTWK_INTERFACE_DESTROY 51
233 #define OPCODE_COMMON_MCC_DESTROY 53
234 #define OPCODE_COMMON_CQ_DESTROY 54
235 #define OPCODE_COMMON_EQ_DESTROY 55
236 #define OPCODE_COMMON_QUERY_FIRMWARE_CONFIG 58
237 #define OPCODE_COMMON_NTWK_PMAC_ADD 59
238 #define OPCODE_COMMON_NTWK_PMAC_DEL 60
239 #define OPCODE_COMMON_FUNCTION_RESET 61
240 #define OPCODE_COMMON_MANAGE_FAT 68
241 #define OPCODE_COMMON_ENABLE_DISABLE_BEACON 69
242 #define OPCODE_COMMON_GET_BEACON_STATE 70
243 #define OPCODE_COMMON_READ_TRANSRECV_DATA 73
244 #define OPCODE_COMMON_GET_PORT_NAME 77
245 #define OPCODE_COMMON_SET_LOGICAL_LINK_CONFIG 80
246 #define OPCODE_COMMON_SET_INTERRUPT_ENABLE 89
247 #define OPCODE_COMMON_SET_FN_PRIVILEGES 100
248 #define OPCODE_COMMON_GET_PHY_DETAILS 102
249 #define OPCODE_COMMON_SET_DRIVER_FUNCTION_CAP 103
250 #define OPCODE_COMMON_GET_CNTL_ADDITIONAL_ATTRIBUTES 121
251 #define OPCODE_COMMON_GET_EXT_FAT_CAPABILITES 125
252 #define OPCODE_COMMON_SET_EXT_FAT_CAPABILITES 126
253 #define OPCODE_COMMON_GET_MAC_LIST 147
254 #define OPCODE_COMMON_SET_MAC_LIST 148
255 #define OPCODE_COMMON_GET_HSW_CONFIG 152
256 #define OPCODE_COMMON_GET_FUNC_CONFIG 160
257 #define OPCODE_COMMON_GET_PROFILE_CONFIG 164
258 #define OPCODE_COMMON_SET_PROFILE_CONFIG 165
259 #define OPCODE_COMMON_GET_ACTIVE_PROFILE 167
260 #define OPCODE_COMMON_SET_HSW_CONFIG 153
261 #define OPCODE_COMMON_GET_FN_PRIVILEGES 170
262 #define OPCODE_COMMON_READ_OBJECT 171
263 #define OPCODE_COMMON_WRITE_OBJECT 172
264 #define OPCODE_COMMON_DELETE_OBJECT 174
265 #define OPCODE_COMMON_MANAGE_IFACE_FILTERS 193
266 #define OPCODE_COMMON_GET_IFACE_LIST 194
267 #define OPCODE_COMMON_ENABLE_DISABLE_VF 196
269 #define OPCODE_ETH_RSS_CONFIG 1
270 #define OPCODE_ETH_ACPI_CONFIG 2
271 #define OPCODE_ETH_PROMISCUOUS 3
272 #define OPCODE_ETH_GET_STATISTICS 4
273 #define OPCODE_ETH_TX_CREATE 7
274 #define OPCODE_ETH_RX_CREATE 8
275 #define OPCODE_ETH_TX_DESTROY 9
276 #define OPCODE_ETH_RX_DESTROY 10
277 #define OPCODE_ETH_ACPI_WOL_MAGIC_CONFIG 12
278 #define OPCODE_ETH_GET_PPORT_STATS 18
280 #define OPCODE_LOWLEVEL_HOST_DDR_DMA 17
281 #define OPCODE_LOWLEVEL_LOOPBACK_TEST 18
282 #define OPCODE_LOWLEVEL_SET_LOOPBACK_MODE 19
284 struct be_cmd_req_hdr
{
285 u8 opcode
; /* dword 0 */
286 u8 subsystem
; /* dword 0 */
287 u8 port_number
; /* dword 0 */
288 u8 domain
; /* dword 0 */
289 u32 timeout
; /* dword 1 */
290 u32 request_length
; /* dword 2 */
291 u8 version
; /* dword 3 */
292 u8 rsvd
[3]; /* dword 3 */
295 #define RESP_HDR_INFO_OPCODE_SHIFT 0 /* bits 0 - 7 */
296 #define RESP_HDR_INFO_SUBSYS_SHIFT 8 /* bits 8 - 15 */
297 struct be_cmd_resp_hdr
{
298 u8 opcode
; /* dword 0 */
299 u8 subsystem
; /* dword 0 */
300 u8 rsvd
[2]; /* dword 0 */
301 u8 base_status
; /* dword 1 */
302 u8 addl_status
; /* dword 1 */
303 u8 rsvd1
[2]; /* dword 1 */
304 u32 response_length
; /* dword 2 */
305 u32 actual_resp_len
; /* dword 3 */
313 /**************************
314 * BE Command definitions *
315 **************************/
317 /* Pseudo amap definition in which each bit of the actual structure is defined
318 * as a byte: used to calculate offset/shift/mask of each field */
319 struct amap_eq_context
{
320 u8 cidx
[13]; /* dword 0*/
321 u8 rsvd0
[3]; /* dword 0*/
322 u8 epidx
[13]; /* dword 0*/
323 u8 valid
; /* dword 0*/
324 u8 rsvd1
; /* dword 0*/
325 u8 size
; /* dword 0*/
326 u8 pidx
[13]; /* dword 1*/
327 u8 rsvd2
[3]; /* dword 1*/
328 u8 pd
[10]; /* dword 1*/
329 u8 count
[3]; /* dword 1*/
330 u8 solevent
; /* dword 1*/
331 u8 stalled
; /* dword 1*/
332 u8 armed
; /* dword 1*/
333 u8 rsvd3
[4]; /* dword 2*/
334 u8 func
[8]; /* dword 2*/
335 u8 rsvd4
; /* dword 2*/
336 u8 delaymult
[10]; /* dword 2*/
337 u8 rsvd5
[2]; /* dword 2*/
338 u8 phase
[2]; /* dword 2*/
339 u8 nodelay
; /* dword 2*/
340 u8 rsvd6
[4]; /* dword 2*/
341 u8 rsvd7
[32]; /* dword 3*/
344 struct be_cmd_req_eq_create
{
345 struct be_cmd_req_hdr hdr
;
346 u16 num_pages
; /* sword */
347 u16 rsvd0
; /* sword */
348 u8 context
[sizeof(struct amap_eq_context
) / 8];
349 struct phys_addr pages
[8];
352 struct be_cmd_resp_eq_create
{
353 struct be_cmd_resp_hdr resp_hdr
;
354 u16 eq_id
; /* sword */
355 u16 msix_idx
; /* available only in v2 */
358 /******************** Mac query ***************************/
360 MAC_ADDRESS_TYPE_STORAGE
= 0x0,
361 MAC_ADDRESS_TYPE_NETWORK
= 0x1,
362 MAC_ADDRESS_TYPE_PD
= 0x2,
363 MAC_ADDRESS_TYPE_MANAGEMENT
= 0x3
371 struct be_cmd_req_mac_query
{
372 struct be_cmd_req_hdr hdr
;
379 struct be_cmd_resp_mac_query
{
380 struct be_cmd_resp_hdr hdr
;
384 /******************** PMac Add ***************************/
385 struct be_cmd_req_pmac_add
{
386 struct be_cmd_req_hdr hdr
;
388 u8 mac_address
[ETH_ALEN
];
392 struct be_cmd_resp_pmac_add
{
393 struct be_cmd_resp_hdr hdr
;
397 /******************** PMac Del ***************************/
398 struct be_cmd_req_pmac_del
{
399 struct be_cmd_req_hdr hdr
;
404 /******************** Create CQ ***************************/
405 /* Pseudo amap definition in which each bit of the actual structure is defined
406 * as a byte: used to calculate offset/shift/mask of each field */
407 struct amap_cq_context_be
{
408 u8 cidx
[11]; /* dword 0*/
409 u8 rsvd0
; /* dword 0*/
410 u8 coalescwm
[2]; /* dword 0*/
411 u8 nodelay
; /* dword 0*/
412 u8 epidx
[11]; /* dword 0*/
413 u8 rsvd1
; /* dword 0*/
414 u8 count
[2]; /* dword 0*/
415 u8 valid
; /* dword 0*/
416 u8 solevent
; /* dword 0*/
417 u8 eventable
; /* dword 0*/
418 u8 pidx
[11]; /* dword 1*/
419 u8 rsvd2
; /* dword 1*/
420 u8 pd
[10]; /* dword 1*/
421 u8 eqid
[8]; /* dword 1*/
422 u8 stalled
; /* dword 1*/
423 u8 armed
; /* dword 1*/
424 u8 rsvd3
[4]; /* dword 2*/
425 u8 func
[8]; /* dword 2*/
426 u8 rsvd4
[20]; /* dword 2*/
427 u8 rsvd5
[32]; /* dword 3*/
430 struct amap_cq_context_v2
{
431 u8 rsvd0
[12]; /* dword 0*/
432 u8 coalescwm
[2]; /* dword 0*/
433 u8 nodelay
; /* dword 0*/
434 u8 rsvd1
[12]; /* dword 0*/
435 u8 count
[2]; /* dword 0*/
436 u8 valid
; /* dword 0*/
437 u8 rsvd2
; /* dword 0*/
438 u8 eventable
; /* dword 0*/
439 u8 eqid
[16]; /* dword 1*/
440 u8 rsvd3
[15]; /* dword 1*/
441 u8 armed
; /* dword 1*/
442 u8 rsvd4
[32]; /* dword 2*/
443 u8 rsvd5
[32]; /* dword 3*/
446 struct be_cmd_req_cq_create
{
447 struct be_cmd_req_hdr hdr
;
451 u8 context
[sizeof(struct amap_cq_context_be
) / 8];
452 struct phys_addr pages
[8];
456 struct be_cmd_resp_cq_create
{
457 struct be_cmd_resp_hdr hdr
;
462 struct be_cmd_req_get_fat
{
463 struct be_cmd_req_hdr hdr
;
467 u32 data_buffer_size
;
471 struct be_cmd_resp_get_fat
{
472 struct be_cmd_resp_hdr hdr
;
480 /******************** Create MCCQ ***************************/
481 /* Pseudo amap definition in which each bit of the actual structure is defined
482 * as a byte: used to calculate offset/shift/mask of each field */
483 struct amap_mcc_context_be
{
498 struct amap_mcc_context_v1
{
504 u8 async_cq_valid
[1];
509 struct be_cmd_req_mcc_create
{
510 struct be_cmd_req_hdr hdr
;
513 u8 context
[sizeof(struct amap_mcc_context_be
) / 8];
514 struct phys_addr pages
[8];
517 struct be_cmd_req_mcc_ext_create
{
518 struct be_cmd_req_hdr hdr
;
521 u32 async_event_bitmap
[1];
522 u8 context
[sizeof(struct amap_mcc_context_v1
) / 8];
523 struct phys_addr pages
[8];
526 struct be_cmd_resp_mcc_create
{
527 struct be_cmd_resp_hdr hdr
;
532 /******************** Create TxQ ***************************/
533 #define BE_ETH_TX_RING_TYPE_STANDARD 2
534 #define BE_ULP1_NUM 1
536 struct be_cmd_req_eth_tx_create
{
537 struct be_cmd_req_hdr hdr
;
548 struct phys_addr pages
[8];
551 struct be_cmd_resp_eth_tx_create
{
552 struct be_cmd_resp_hdr hdr
;
559 /******************** Create RxQ ***************************/
560 struct be_cmd_req_eth_rx_create
{
561 struct be_cmd_req_hdr hdr
;
565 struct phys_addr pages
[2];
572 struct be_cmd_resp_eth_rx_create
{
573 struct be_cmd_resp_hdr hdr
;
579 /******************** Q Destroy ***************************/
580 /* Type of Queue to be destroyed */
589 struct be_cmd_req_q_destroy
{
590 struct be_cmd_req_hdr hdr
;
592 u16 bypass_flush
; /* valid only for rx q destroy */
595 /************ I/f Create (it's actually I/f Config Create)**********/
597 /* Capability flags for the i/f */
599 BE_IF_FLAGS_RSS
= 0x4,
600 BE_IF_FLAGS_PROMISCUOUS
= 0x8,
601 BE_IF_FLAGS_BROADCAST
= 0x10,
602 BE_IF_FLAGS_UNTAGGED
= 0x20,
603 BE_IF_FLAGS_ULP
= 0x40,
604 BE_IF_FLAGS_VLAN_PROMISCUOUS
= 0x80,
605 BE_IF_FLAGS_VLAN
= 0x100,
606 BE_IF_FLAGS_MCAST_PROMISCUOUS
= 0x200,
607 BE_IF_FLAGS_PASS_L2_ERRORS
= 0x400,
608 BE_IF_FLAGS_PASS_L3L4_ERRORS
= 0x800,
609 BE_IF_FLAGS_MULTICAST
= 0x1000,
610 BE_IF_FLAGS_DEFQ_RSS
= 0x1000000
613 #define BE_IF_CAP_FLAGS_WANT (BE_IF_FLAGS_RSS | BE_IF_FLAGS_PROMISCUOUS |\
614 BE_IF_FLAGS_BROADCAST | BE_IF_FLAGS_VLAN_PROMISCUOUS |\
615 BE_IF_FLAGS_VLAN | BE_IF_FLAGS_MCAST_PROMISCUOUS |\
616 BE_IF_FLAGS_PASS_L3L4_ERRORS | BE_IF_FLAGS_MULTICAST |\
617 BE_IF_FLAGS_UNTAGGED | BE_IF_FLAGS_DEFQ_RSS)
619 #define BE_IF_FLAGS_ALL_PROMISCUOUS (BE_IF_FLAGS_PROMISCUOUS | \
620 BE_IF_FLAGS_VLAN_PROMISCUOUS |\
621 BE_IF_FLAGS_MCAST_PROMISCUOUS)
623 /* An RX interface is an object with one or more MAC addresses and
624 * filtering capabilities. */
625 struct be_cmd_req_if_create
{
626 struct be_cmd_req_hdr hdr
;
627 u32 version
; /* ignore currently */
628 u32 capability_flags
;
630 u8 mac_addr
[ETH_ALEN
];
632 u8 pmac_invalid
; /* if set, don't attach the mac addr to the i/f */
633 u32 vlan_tag
; /* not used currently */
636 struct be_cmd_resp_if_create
{
637 struct be_cmd_resp_hdr hdr
;
642 /****** I/f Destroy(it's actually I/f Config Destroy )**********/
643 struct be_cmd_req_if_destroy
{
644 struct be_cmd_req_hdr hdr
;
648 /*************** HW Stats Get **********************************/
649 struct be_port_rxf_stats_v0
{
650 u32 rx_bytes_lsd
; /* dword 0*/
651 u32 rx_bytes_msd
; /* dword 1*/
652 u32 rx_total_frames
; /* dword 2*/
653 u32 rx_unicast_frames
; /* dword 3*/
654 u32 rx_multicast_frames
; /* dword 4*/
655 u32 rx_broadcast_frames
; /* dword 5*/
656 u32 rx_crc_errors
; /* dword 6*/
657 u32 rx_alignment_symbol_errors
; /* dword 7*/
658 u32 rx_pause_frames
; /* dword 8*/
659 u32 rx_control_frames
; /* dword 9*/
660 u32 rx_in_range_errors
; /* dword 10*/
661 u32 rx_out_range_errors
; /* dword 11*/
662 u32 rx_frame_too_long
; /* dword 12*/
663 u32 rx_address_filtered
; /* dword 13*/
664 u32 rx_vlan_filtered
; /* dword 14*/
665 u32 rx_dropped_too_small
; /* dword 15*/
666 u32 rx_dropped_too_short
; /* dword 16*/
667 u32 rx_dropped_header_too_small
; /* dword 17*/
668 u32 rx_dropped_tcp_length
; /* dword 18*/
669 u32 rx_dropped_runt
; /* dword 19*/
670 u32 rx_64_byte_packets
; /* dword 20*/
671 u32 rx_65_127_byte_packets
; /* dword 21*/
672 u32 rx_128_256_byte_packets
; /* dword 22*/
673 u32 rx_256_511_byte_packets
; /* dword 23*/
674 u32 rx_512_1023_byte_packets
; /* dword 24*/
675 u32 rx_1024_1518_byte_packets
; /* dword 25*/
676 u32 rx_1519_2047_byte_packets
; /* dword 26*/
677 u32 rx_2048_4095_byte_packets
; /* dword 27*/
678 u32 rx_4096_8191_byte_packets
; /* dword 28*/
679 u32 rx_8192_9216_byte_packets
; /* dword 29*/
680 u32 rx_ip_checksum_errs
; /* dword 30*/
681 u32 rx_tcp_checksum_errs
; /* dword 31*/
682 u32 rx_udp_checksum_errs
; /* dword 32*/
683 u32 rx_non_rss_packets
; /* dword 33*/
684 u32 rx_ipv4_packets
; /* dword 34*/
685 u32 rx_ipv6_packets
; /* dword 35*/
686 u32 rx_ipv4_bytes_lsd
; /* dword 36*/
687 u32 rx_ipv4_bytes_msd
; /* dword 37*/
688 u32 rx_ipv6_bytes_lsd
; /* dword 38*/
689 u32 rx_ipv6_bytes_msd
; /* dword 39*/
690 u32 rx_chute1_packets
; /* dword 40*/
691 u32 rx_chute2_packets
; /* dword 41*/
692 u32 rx_chute3_packets
; /* dword 42*/
693 u32 rx_management_packets
; /* dword 43*/
694 u32 rx_switched_unicast_packets
; /* dword 44*/
695 u32 rx_switched_multicast_packets
; /* dword 45*/
696 u32 rx_switched_broadcast_packets
; /* dword 46*/
697 u32 tx_bytes_lsd
; /* dword 47*/
698 u32 tx_bytes_msd
; /* dword 48*/
699 u32 tx_unicastframes
; /* dword 49*/
700 u32 tx_multicastframes
; /* dword 50*/
701 u32 tx_broadcastframes
; /* dword 51*/
702 u32 tx_pauseframes
; /* dword 52*/
703 u32 tx_controlframes
; /* dword 53*/
704 u32 tx_64_byte_packets
; /* dword 54*/
705 u32 tx_65_127_byte_packets
; /* dword 55*/
706 u32 tx_128_256_byte_packets
; /* dword 56*/
707 u32 tx_256_511_byte_packets
; /* dword 57*/
708 u32 tx_512_1023_byte_packets
; /* dword 58*/
709 u32 tx_1024_1518_byte_packets
; /* dword 59*/
710 u32 tx_1519_2047_byte_packets
; /* dword 60*/
711 u32 tx_2048_4095_byte_packets
; /* dword 61*/
712 u32 tx_4096_8191_byte_packets
; /* dword 62*/
713 u32 tx_8192_9216_byte_packets
; /* dword 63*/
714 u32 rx_fifo_overflow
; /* dword 64*/
715 u32 rx_input_fifo_overflow
; /* dword 65*/
718 struct be_rxf_stats_v0
{
719 struct be_port_rxf_stats_v0 port
[2];
720 u32 rx_drops_no_pbuf
; /* dword 132*/
721 u32 rx_drops_no_txpb
; /* dword 133*/
722 u32 rx_drops_no_erx_descr
; /* dword 134*/
723 u32 rx_drops_no_tpre_descr
; /* dword 135*/
724 u32 management_rx_port_packets
; /* dword 136*/
725 u32 management_rx_port_bytes
; /* dword 137*/
726 u32 management_rx_port_pause_frames
; /* dword 138*/
727 u32 management_rx_port_errors
; /* dword 139*/
728 u32 management_tx_port_packets
; /* dword 140*/
729 u32 management_tx_port_bytes
; /* dword 141*/
730 u32 management_tx_port_pause
; /* dword 142*/
731 u32 management_rx_port_rxfifo_overflow
; /* dword 143*/
732 u32 rx_drops_too_many_frags
; /* dword 144*/
733 u32 rx_drops_invalid_ring
; /* dword 145*/
734 u32 forwarded_packets
; /* dword 146*/
735 u32 rx_drops_mtu
; /* dword 147*/
737 u32 port0_jabber_events
;
738 u32 port1_jabber_events
;
742 struct be_erx_stats_v0
{
743 u32 rx_drops_no_fragments
[44]; /* dwordS 0 to 43*/
747 struct be_pmem_stats
{
752 struct be_hw_stats_v0
{
753 struct be_rxf_stats_v0 rxf
;
755 struct be_erx_stats_v0 erx
;
756 struct be_pmem_stats pmem
;
759 struct be_cmd_req_get_stats_v0
{
760 struct be_cmd_req_hdr hdr
;
761 u8 rsvd
[sizeof(struct be_hw_stats_v0
)];
764 struct be_cmd_resp_get_stats_v0
{
765 struct be_cmd_resp_hdr hdr
;
766 struct be_hw_stats_v0 hw_stats
;
769 struct lancer_pport_stats
{
772 u32 tx_unicast_packets_lo
;
773 u32 tx_unicast_packets_hi
;
774 u32 tx_multicast_packets_lo
;
775 u32 tx_multicast_packets_hi
;
776 u32 tx_broadcast_packets_lo
;
777 u32 tx_broadcast_packets_hi
;
780 u32 tx_unicast_bytes_lo
;
781 u32 tx_unicast_bytes_hi
;
782 u32 tx_multicast_bytes_lo
;
783 u32 tx_multicast_bytes_hi
;
784 u32 tx_broadcast_bytes_lo
;
785 u32 tx_broadcast_bytes_hi
;
790 u32 tx_pause_frames_lo
;
791 u32 tx_pause_frames_hi
;
792 u32 tx_pause_on_frames_lo
;
793 u32 tx_pause_on_frames_hi
;
794 u32 tx_pause_off_frames_lo
;
795 u32 tx_pause_off_frames_hi
;
796 u32 tx_internal_mac_errors_lo
;
797 u32 tx_internal_mac_errors_hi
;
798 u32 tx_control_frames_lo
;
799 u32 tx_control_frames_hi
;
800 u32 tx_packets_64_bytes_lo
;
801 u32 tx_packets_64_bytes_hi
;
802 u32 tx_packets_65_to_127_bytes_lo
;
803 u32 tx_packets_65_to_127_bytes_hi
;
804 u32 tx_packets_128_to_255_bytes_lo
;
805 u32 tx_packets_128_to_255_bytes_hi
;
806 u32 tx_packets_256_to_511_bytes_lo
;
807 u32 tx_packets_256_to_511_bytes_hi
;
808 u32 tx_packets_512_to_1023_bytes_lo
;
809 u32 tx_packets_512_to_1023_bytes_hi
;
810 u32 tx_packets_1024_to_1518_bytes_lo
;
811 u32 tx_packets_1024_to_1518_bytes_hi
;
812 u32 tx_packets_1519_to_2047_bytes_lo
;
813 u32 tx_packets_1519_to_2047_bytes_hi
;
814 u32 tx_packets_2048_to_4095_bytes_lo
;
815 u32 tx_packets_2048_to_4095_bytes_hi
;
816 u32 tx_packets_4096_to_8191_bytes_lo
;
817 u32 tx_packets_4096_to_8191_bytes_hi
;
818 u32 tx_packets_8192_to_9216_bytes_lo
;
819 u32 tx_packets_8192_to_9216_bytes_hi
;
820 u32 tx_lso_packets_lo
;
821 u32 tx_lso_packets_hi
;
824 u32 rx_unicast_packets_lo
;
825 u32 rx_unicast_packets_hi
;
826 u32 rx_multicast_packets_lo
;
827 u32 rx_multicast_packets_hi
;
828 u32 rx_broadcast_packets_lo
;
829 u32 rx_broadcast_packets_hi
;
832 u32 rx_unicast_bytes_lo
;
833 u32 rx_unicast_bytes_hi
;
834 u32 rx_multicast_bytes_lo
;
835 u32 rx_multicast_bytes_hi
;
836 u32 rx_broadcast_bytes_lo
;
837 u32 rx_broadcast_bytes_hi
;
838 u32 rx_unknown_protos
;
839 u32 rsvd_69
; /* Word 69 is reserved */
844 u32 rx_crc_errors_lo
;
845 u32 rx_crc_errors_hi
;
846 u32 rx_alignment_errors_lo
;
847 u32 rx_alignment_errors_hi
;
848 u32 rx_symbol_errors_lo
;
849 u32 rx_symbol_errors_hi
;
850 u32 rx_pause_frames_lo
;
851 u32 rx_pause_frames_hi
;
852 u32 rx_pause_on_frames_lo
;
853 u32 rx_pause_on_frames_hi
;
854 u32 rx_pause_off_frames_lo
;
855 u32 rx_pause_off_frames_hi
;
856 u32 rx_frames_too_long_lo
;
857 u32 rx_frames_too_long_hi
;
858 u32 rx_internal_mac_errors_lo
;
859 u32 rx_internal_mac_errors_hi
;
860 u32 rx_undersize_packets
;
861 u32 rx_oversize_packets
;
862 u32 rx_fragment_packets
;
864 u32 rx_control_frames_lo
;
865 u32 rx_control_frames_hi
;
866 u32 rx_control_frames_unknown_opcode_lo
;
867 u32 rx_control_frames_unknown_opcode_hi
;
868 u32 rx_in_range_errors
;
869 u32 rx_out_of_range_errors
;
870 u32 rx_address_filtered
;
871 u32 rx_vlan_filtered
;
872 u32 rx_dropped_too_small
;
873 u32 rx_dropped_too_short
;
874 u32 rx_dropped_header_too_small
;
875 u32 rx_dropped_invalid_tcp_length
;
877 u32 rx_ip_checksum_errors
;
878 u32 rx_tcp_checksum_errors
;
879 u32 rx_udp_checksum_errors
;
880 u32 rx_non_rss_packets
;
882 u32 rx_ipv4_packets_lo
;
883 u32 rx_ipv4_packets_hi
;
884 u32 rx_ipv6_packets_lo
;
885 u32 rx_ipv6_packets_hi
;
886 u32 rx_ipv4_bytes_lo
;
887 u32 rx_ipv4_bytes_hi
;
888 u32 rx_ipv6_bytes_lo
;
889 u32 rx_ipv6_bytes_hi
;
890 u32 rx_nic_packets_lo
;
891 u32 rx_nic_packets_hi
;
892 u32 rx_tcp_packets_lo
;
893 u32 rx_tcp_packets_hi
;
894 u32 rx_iscsi_packets_lo
;
895 u32 rx_iscsi_packets_hi
;
896 u32 rx_management_packets_lo
;
897 u32 rx_management_packets_hi
;
898 u32 rx_switched_unicast_packets_lo
;
899 u32 rx_switched_unicast_packets_hi
;
900 u32 rx_switched_multicast_packets_lo
;
901 u32 rx_switched_multicast_packets_hi
;
902 u32 rx_switched_broadcast_packets_lo
;
903 u32 rx_switched_broadcast_packets_hi
;
906 u32 rx_fifo_overflow
;
907 u32 rx_input_fifo_overflow
;
908 u32 rx_drops_too_many_frags_lo
;
909 u32 rx_drops_too_many_frags_hi
;
910 u32 rx_drops_invalid_queue
;
914 u32 rx_packets_64_bytes_lo
;
915 u32 rx_packets_64_bytes_hi
;
916 u32 rx_packets_65_to_127_bytes_lo
;
917 u32 rx_packets_65_to_127_bytes_hi
;
918 u32 rx_packets_128_to_255_bytes_lo
;
919 u32 rx_packets_128_to_255_bytes_hi
;
920 u32 rx_packets_256_to_511_bytes_lo
;
921 u32 rx_packets_256_to_511_bytes_hi
;
922 u32 rx_packets_512_to_1023_bytes_lo
;
923 u32 rx_packets_512_to_1023_bytes_hi
;
924 u32 rx_packets_1024_to_1518_bytes_lo
;
925 u32 rx_packets_1024_to_1518_bytes_hi
;
926 u32 rx_packets_1519_to_2047_bytes_lo
;
927 u32 rx_packets_1519_to_2047_bytes_hi
;
928 u32 rx_packets_2048_to_4095_bytes_lo
;
929 u32 rx_packets_2048_to_4095_bytes_hi
;
930 u32 rx_packets_4096_to_8191_bytes_lo
;
931 u32 rx_packets_4096_to_8191_bytes_hi
;
932 u32 rx_packets_8192_to_9216_bytes_lo
;
933 u32 rx_packets_8192_to_9216_bytes_hi
;
936 struct pport_stats_params
{
942 struct lancer_cmd_req_pport_stats
{
943 struct be_cmd_req_hdr hdr
;
945 struct pport_stats_params params
;
946 u8 rsvd
[sizeof(struct lancer_pport_stats
)];
950 struct lancer_cmd_resp_pport_stats
{
951 struct be_cmd_resp_hdr hdr
;
952 struct lancer_pport_stats pport_stats
;
955 static inline struct lancer_pport_stats
*
956 pport_stats_from_cmd(struct be_adapter
*adapter
)
958 struct lancer_cmd_resp_pport_stats
*cmd
= adapter
->stats_cmd
.va
;
959 return &cmd
->pport_stats
;
962 struct be_cmd_req_get_cntl_addnl_attribs
{
963 struct be_cmd_req_hdr hdr
;
967 struct be_cmd_resp_get_cntl_addnl_attribs
{
968 struct be_cmd_resp_hdr hdr
;
972 u8 on_die_temperature
; /* in degrees centigrade*/
976 struct be_cmd_req_vlan_config
{
977 struct be_cmd_req_hdr hdr
;
985 /******************* RX FILTER ******************************/
986 #define BE_MAX_MC 64 /* set mcast promisc if > 64 */
991 struct be_cmd_req_rx_filter
{
992 struct be_cmd_req_hdr hdr
;
993 u32 global_flags_mask
;
999 struct macaddr mcast_mac
[BE_MAX_MC
];
1002 /******************** Link Status Query *******************/
1003 struct be_cmd_req_link_status
{
1004 struct be_cmd_req_hdr hdr
;
1009 PHY_LINK_DUPLEX_NONE
= 0x0,
1010 PHY_LINK_DUPLEX_HALF
= 0x1,
1011 PHY_LINK_DUPLEX_FULL
= 0x2
1015 PHY_LINK_SPEED_ZERO
= 0x0, /* => No link */
1016 PHY_LINK_SPEED_10MBPS
= 0x1,
1017 PHY_LINK_SPEED_100MBPS
= 0x2,
1018 PHY_LINK_SPEED_1GBPS
= 0x3,
1019 PHY_LINK_SPEED_10GBPS
= 0x4,
1020 PHY_LINK_SPEED_20GBPS
= 0x5,
1021 PHY_LINK_SPEED_25GBPS
= 0x6,
1022 PHY_LINK_SPEED_40GBPS
= 0x7
1025 struct be_cmd_resp_link_status
{
1026 struct be_cmd_resp_hdr hdr
;
1034 u8 logical_link_status
;
1038 /******************** Port Identification ***************************/
1039 /* Identifies the type of port attached to NIC */
1040 struct be_cmd_req_port_type
{
1041 struct be_cmd_req_hdr hdr
;
1051 /* From SFF-8436 QSFP+ spec */
1052 #define QSFP_PLUS_CABLE_TYPE_OFFSET 0x83
1053 #define QSFP_PLUS_CR4_CABLE 0x8
1054 #define QSFP_PLUS_SR4_CABLE 0x4
1055 #define QSFP_PLUS_LR4_CABLE 0x2
1057 /* From SFF-8472 spec */
1058 #define SFP_PLUS_SFF_8472_COMP 0x5E
1059 #define SFP_PLUS_CABLE_TYPE_OFFSET 0x8
1060 #define SFP_PLUS_COPPER_CABLE 0x4
1061 #define SFP_VENDOR_NAME_OFFSET 0x14
1062 #define SFP_VENDOR_PN_OFFSET 0x28
1064 #define PAGE_DATA_LEN 256
1065 struct be_cmd_resp_port_type
{
1066 struct be_cmd_resp_hdr hdr
;
1069 u8 page_data
[PAGE_DATA_LEN
];
1072 /******************** Get FW Version *******************/
1073 struct be_cmd_req_get_fw_version
{
1074 struct be_cmd_req_hdr hdr
;
1075 u8 rsvd0
[FW_VER_LEN
];
1076 u8 rsvd1
[FW_VER_LEN
];
1079 struct be_cmd_resp_get_fw_version
{
1080 struct be_cmd_resp_hdr hdr
;
1081 u8 firmware_version_string
[FW_VER_LEN
];
1082 u8 fw_on_flash_version_string
[FW_VER_LEN
];
1085 /******************** Set Flow Contrl *******************/
1086 struct be_cmd_req_set_flow_control
{
1087 struct be_cmd_req_hdr hdr
;
1088 u16 tx_flow_control
;
1089 u16 rx_flow_control
;
1092 /******************** Get Flow Contrl *******************/
1093 struct be_cmd_req_get_flow_control
{
1094 struct be_cmd_req_hdr hdr
;
1098 struct be_cmd_resp_get_flow_control
{
1099 struct be_cmd_resp_hdr hdr
;
1100 u16 tx_flow_control
;
1101 u16 rx_flow_control
;
1104 /******************** Modify EQ Delay *******************/
1108 u32 delay_multiplier
;
1111 struct be_cmd_req_modify_eq_delay
{
1112 struct be_cmd_req_hdr hdr
;
1114 struct be_set_eqd set_eqd
[MAX_EVT_QS
];
1117 /******************** Get FW Config *******************/
1118 /* The HW can come up in either of the following multi-channel modes
1119 * based on the skew/IPL.
1121 #define RDMA_ENABLED 0x4
1122 #define QNQ_MODE 0x400
1123 #define VNIC_MODE 0x20000
1124 #define UMC_ENABLED 0x1000000
1125 struct be_cmd_req_query_fw_cfg
{
1126 struct be_cmd_req_hdr hdr
;
1130 struct be_cmd_resp_query_fw_cfg
{
1131 struct be_cmd_resp_hdr hdr
;
1132 u32 be_config_number
;
1140 /******************** RSS Config ****************************************/
1141 /* RSS type Input parameters used to compute RX hash
1142 * RSS_ENABLE_IPV4 SRC IPv4, DST IPv4
1143 * RSS_ENABLE_TCP_IPV4 SRC IPv4, DST IPv4, TCP SRC PORT, TCP DST PORT
1144 * RSS_ENABLE_IPV6 SRC IPv6, DST IPv6
1145 * RSS_ENABLE_TCP_IPV6 SRC IPv6, DST IPv6, TCP SRC PORT, TCP DST PORT
1146 * RSS_ENABLE_UDP_IPV4 SRC IPv4, DST IPv4, UDP SRC PORT, UDP DST PORT
1147 * RSS_ENABLE_UDP_IPV6 SRC IPv6, DST IPv6, UDP SRC PORT, UDP DST PORT
1149 * When multiple RSS types are enabled, HW picks the best hash policy
1150 * based on the type of the received packet.
1152 #define RSS_ENABLE_NONE 0x0
1153 #define RSS_ENABLE_IPV4 0x1
1154 #define RSS_ENABLE_TCP_IPV4 0x2
1155 #define RSS_ENABLE_IPV6 0x4
1156 #define RSS_ENABLE_TCP_IPV6 0x8
1157 #define RSS_ENABLE_UDP_IPV4 0x10
1158 #define RSS_ENABLE_UDP_IPV6 0x20
1160 #define L3_RSS_FLAGS (RXH_IP_DST | RXH_IP_SRC)
1161 #define L4_RSS_FLAGS (RXH_L4_B_0_1 | RXH_L4_B_2_3)
1163 struct be_cmd_req_rss_config
{
1164 struct be_cmd_req_hdr hdr
;
1167 u16 cpu_table_size_log2
;
1174 /******************** Port Beacon ***************************/
1176 #define BEACON_STATE_ENABLED 0x1
1177 #define BEACON_STATE_DISABLED 0x0
1179 struct be_cmd_req_enable_disable_beacon
{
1180 struct be_cmd_req_hdr hdr
;
1187 struct be_cmd_req_get_beacon_state
{
1188 struct be_cmd_req_hdr hdr
;
1194 struct be_cmd_resp_get_beacon_state
{
1195 struct be_cmd_resp_hdr resp_hdr
;
1200 /* Flashrom related descriptors */
1201 #define MAX_FLASH_COMP 32
1203 #define OPTYPE_ISCSI_ACTIVE 0
1204 #define OPTYPE_REDBOOT 1
1205 #define OPTYPE_BIOS 2
1206 #define OPTYPE_PXE_BIOS 3
1207 #define OPTYPE_OFFSET_SPECIFIED 7
1208 #define OPTYPE_FCOE_BIOS 8
1209 #define OPTYPE_ISCSI_BACKUP 9
1210 #define OPTYPE_FCOE_FW_ACTIVE 10
1211 #define OPTYPE_FCOE_FW_BACKUP 11
1212 #define OPTYPE_NCSI_FW 13
1213 #define OPTYPE_REDBOOT_DIR 18
1214 #define OPTYPE_REDBOOT_CONFIG 19
1215 #define OPTYPE_SH_PHY_FW 21
1216 #define OPTYPE_FLASHISM_JUMPVECTOR 22
1217 #define OPTYPE_UFI_DIR 23
1218 #define OPTYPE_PHY_FW 99
1220 #define FLASH_BIOS_IMAGE_MAX_SIZE_g2 262144 /* Max OPTION ROM image sz */
1221 #define FLASH_REDBOOT_IMAGE_MAX_SIZE_g2 262144 /* Max Redboot image sz */
1222 #define FLASH_IMAGE_MAX_SIZE_g2 1310720 /* Max firmware image size */
1224 #define FLASH_NCSI_IMAGE_MAX_SIZE_g3 262144
1225 #define FLASH_PHY_FW_IMAGE_MAX_SIZE_g3 262144
1226 #define FLASH_BIOS_IMAGE_MAX_SIZE_g3 524288 /* Max OPTION ROM image sz */
1227 #define FLASH_REDBOOT_IMAGE_MAX_SIZE_g3 1048576 /* Max Redboot image sz */
1228 #define FLASH_IMAGE_MAX_SIZE_g3 2097152 /* Max firmware image size */
1230 /* Offsets for components on Flash. */
1231 #define FLASH_REDBOOT_START_g2 0
1232 #define FLASH_FCoE_BIOS_START_g2 524288
1233 #define FLASH_iSCSI_PRIMARY_IMAGE_START_g2 1048576
1234 #define FLASH_iSCSI_BACKUP_IMAGE_START_g2 2359296
1235 #define FLASH_FCoE_PRIMARY_IMAGE_START_g2 3670016
1236 #define FLASH_FCoE_BACKUP_IMAGE_START_g2 4980736
1237 #define FLASH_iSCSI_BIOS_START_g2 7340032
1238 #define FLASH_PXE_BIOS_START_g2 7864320
1240 #define FLASH_REDBOOT_START_g3 262144
1241 #define FLASH_PHY_FW_START_g3 1310720
1242 #define FLASH_iSCSI_PRIMARY_IMAGE_START_g3 2097152
1243 #define FLASH_iSCSI_BACKUP_IMAGE_START_g3 4194304
1244 #define FLASH_FCoE_PRIMARY_IMAGE_START_g3 6291456
1245 #define FLASH_FCoE_BACKUP_IMAGE_START_g3 8388608
1246 #define FLASH_iSCSI_BIOS_START_g3 12582912
1247 #define FLASH_PXE_BIOS_START_g3 13107200
1248 #define FLASH_FCoE_BIOS_START_g3 13631488
1249 #define FLASH_NCSI_START_g3 15990784
1251 #define IMAGE_NCSI 16
1252 #define IMAGE_OPTION_ROM_PXE 32
1253 #define IMAGE_OPTION_ROM_FCoE 33
1254 #define IMAGE_OPTION_ROM_ISCSI 34
1255 #define IMAGE_FLASHISM_JUMPVECTOR 48
1256 #define IMAGE_FIRMWARE_iSCSI 160
1257 #define IMAGE_FIRMWARE_FCoE 162
1258 #define IMAGE_FIRMWARE_BACKUP_iSCSI 176
1259 #define IMAGE_FIRMWARE_BACKUP_FCoE 178
1260 #define IMAGE_FIRMWARE_PHY 192
1261 #define IMAGE_REDBOOT_DIR 208
1262 #define IMAGE_REDBOOT_CONFIG 209
1263 #define IMAGE_UFI_DIR 210
1264 #define IMAGE_BOOT_CODE 224
1266 struct controller_id
{
1274 unsigned long offset
;
1285 u8 image_version
[32];
1288 struct flash_file_hdr_g2
{
1292 struct controller_id cont_id
;
1300 /* First letter of the build version of the image */
1301 #define BLD_STR_UFI_TYPE_BE2 '2'
1302 #define BLD_STR_UFI_TYPE_BE3 '3'
1303 #define BLD_STR_UFI_TYPE_SH '4'
1305 struct flash_file_hdr_g3
{
1317 struct flash_section_hdr
{
1326 struct flash_section_hdr_g2
{
1335 struct flash_section_entry
{
1348 struct flash_section_info
{
1350 struct flash_section_hdr fsec_hdr
;
1351 struct flash_section_entry fsec_entry
[32];
1354 struct flash_section_info_g2
{
1356 struct flash_section_hdr_g2 fsec_hdr
;
1357 struct flash_section_entry fsec_entry
[32];
1360 /****************** Firmware Flash ******************/
1361 #define FLASHROM_OPER_FLASH 1
1362 #define FLASHROM_OPER_SAVE 2
1363 #define FLASHROM_OPER_REPORT 4
1364 #define FLASHROM_OPER_PHY_FLASH 9
1365 #define FLASHROM_OPER_PHY_SAVE 10
1367 struct flashrom_params
{
1374 struct be_cmd_write_flashrom
{
1375 struct be_cmd_req_hdr hdr
;
1376 struct flashrom_params params
;
1381 /* cmd to read flash crc */
1382 struct be_cmd_read_flash_crc
{
1383 struct be_cmd_req_hdr hdr
;
1384 struct flashrom_params params
;
1389 /**************** Lancer Firmware Flash ************/
1390 struct amap_lancer_write_obj_context
{
1391 u8 write_length
[24];
1396 struct lancer_cmd_req_write_object
{
1397 struct be_cmd_req_hdr hdr
;
1398 u8 context
[sizeof(struct amap_lancer_write_obj_context
) / 8];
1400 u8 object_name
[104];
1401 u32 descriptor_count
;
1407 #define LANCER_NO_RESET_NEEDED 0x00
1408 #define LANCER_FW_RESET_NEEDED 0x02
1409 struct lancer_cmd_resp_write_object
{
1414 u8 additional_status
;
1417 u32 actual_resp_len
;
1418 u32 actual_write_len
;
1423 /************************ Lancer Read FW info **************/
1424 #define LANCER_READ_FILE_CHUNK (32*1024)
1425 #define LANCER_READ_FILE_EOF_MASK 0x80000000
1427 #define LANCER_FW_DUMP_FILE "/dbg/dump.bin"
1428 #define LANCER_VPD_PF_FILE "/vpd/ntr_pf.vpd"
1429 #define LANCER_VPD_VF_FILE "/vpd/ntr_vf.vpd"
1431 struct lancer_cmd_req_read_object
{
1432 struct be_cmd_req_hdr hdr
;
1433 u32 desired_read_len
;
1435 u8 object_name
[104];
1436 u32 descriptor_count
;
1442 struct lancer_cmd_resp_read_object
{
1447 u8 additional_status
;
1450 u32 actual_resp_len
;
1451 u32 actual_read_len
;
1455 struct lancer_cmd_req_delete_object
{
1456 struct be_cmd_req_hdr hdr
;
1459 u8 object_name
[104];
1462 /************************ WOL *******************************/
1463 struct be_cmd_req_acpi_wol_magic_config
{
1464 struct be_cmd_req_hdr hdr
;
1470 struct be_cmd_req_acpi_wol_magic_config_v1
{
1471 struct be_cmd_req_hdr hdr
;
1480 struct be_cmd_resp_acpi_wol_magic_config_v1
{
1481 struct be_cmd_resp_hdr hdr
;
1488 #define BE_GET_WOL_CAP 2
1490 #define BE_WOL_CAP 0x1
1491 #define BE_PME_D0_CAP 0x8
1492 #define BE_PME_D1_CAP 0x10
1493 #define BE_PME_D2_CAP 0x20
1494 #define BE_PME_D3HOT_CAP 0x40
1495 #define BE_PME_D3COLD_CAP 0x80
1497 /********************** LoopBack test *********************/
1498 struct be_cmd_req_loopback_test
{
1499 struct be_cmd_req_hdr hdr
;
1508 struct be_cmd_resp_loopback_test
{
1509 struct be_cmd_resp_hdr resp_hdr
;
1517 struct be_cmd_req_set_lmode
{
1518 struct be_cmd_req_hdr hdr
;
1525 /********************** DDR DMA test *********************/
1526 struct be_cmd_req_ddrdma_test
{
1527 struct be_cmd_req_hdr hdr
;
1535 struct be_cmd_resp_ddrdma_test
{
1536 struct be_cmd_resp_hdr hdr
;
1544 /*********************** SEEPROM Read ***********************/
1546 #define BE_READ_SEEPROM_LEN 1024
1547 struct be_cmd_req_seeprom_read
{
1548 struct be_cmd_req_hdr hdr
;
1549 u8 rsvd0
[BE_READ_SEEPROM_LEN
];
1552 struct be_cmd_resp_seeprom_read
{
1553 struct be_cmd_req_hdr hdr
;
1554 u8 seeprom_data
[BE_READ_SEEPROM_LEN
];
1558 PHY_TYPE_CX4_10GB
= 0,
1561 PHY_TYPE_SFP_PLUS_10GB
,
1564 PHY_TYPE_BASET_10GB
,
1572 PHY_TYPE_DISABLED
= 255
1575 #define BE_SUPPORTED_SPEED_NONE 0
1576 #define BE_SUPPORTED_SPEED_10MBPS 1
1577 #define BE_SUPPORTED_SPEED_100MBPS 2
1578 #define BE_SUPPORTED_SPEED_1GBPS 4
1579 #define BE_SUPPORTED_SPEED_10GBPS 8
1580 #define BE_SUPPORTED_SPEED_20GBPS 0x10
1581 #define BE_SUPPORTED_SPEED_40GBPS 0x20
1583 #define BE_AN_EN 0x2
1584 #define BE_PAUSE_SYM_EN 0x80
1586 /* MAC speed valid values */
1587 #define SPEED_DEFAULT 0x0
1588 #define SPEED_FORCED_10GB 0x1
1589 #define SPEED_FORCED_1GB 0x2
1590 #define SPEED_AUTONEG_10GB 0x3
1591 #define SPEED_AUTONEG_1GB 0x4
1592 #define SPEED_AUTONEG_100MB 0x5
1593 #define SPEED_AUTONEG_10GB_1GB 0x6
1594 #define SPEED_AUTONEG_10GB_1GB_100MB 0x7
1595 #define SPEED_AUTONEG_1GB_100MB 0x8
1596 #define SPEED_AUTONEG_10MB 0x9
1597 #define SPEED_AUTONEG_1GB_100MB_10MB 0xa
1598 #define SPEED_AUTONEG_100MB_10MB 0xb
1599 #define SPEED_FORCED_100MB 0xc
1600 #define SPEED_FORCED_10MB 0xd
1602 struct be_cmd_req_get_phy_info
{
1603 struct be_cmd_req_hdr hdr
;
1607 struct be_phy_info
{
1611 u16 ext_phy_details
;
1613 u16 auto_speeds_supported
;
1614 u16 fixed_speeds_supported
;
1618 struct be_cmd_resp_get_phy_info
{
1619 struct be_cmd_req_hdr hdr
;
1620 struct be_phy_info phy_info
;
1623 /*********************** Set QOS ***********************/
1625 #define BE_QOS_BITS_NIC 1
1627 struct be_cmd_req_set_qos
{
1628 struct be_cmd_req_hdr hdr
;
1634 /*********************** Controller Attributes ***********************/
1635 struct mgmt_hba_attribs
{
1637 u8 controller_model_number
[32];
1644 struct mgmt_controller_attrib
{
1645 struct mgmt_hba_attribs hba_attribs
;
1649 struct be_cmd_req_cntl_attribs
{
1650 struct be_cmd_req_hdr hdr
;
1653 struct be_cmd_resp_cntl_attribs
{
1654 struct be_cmd_resp_hdr hdr
;
1655 struct mgmt_controller_attrib attribs
;
1658 /*********************** Set driver function ***********************/
1659 #define CAPABILITY_SW_TIMESTAMPS 2
1660 #define CAPABILITY_BE3_NATIVE_ERX_API 4
1662 struct be_cmd_req_set_func_cap
{
1663 struct be_cmd_req_hdr hdr
;
1664 u32 valid_cap_flags
;
1669 struct be_cmd_resp_set_func_cap
{
1670 struct be_cmd_resp_hdr hdr
;
1671 u32 valid_cap_flags
;
1676 /*********************** Function Privileges ***********************/
1678 BE_PRIV_DEFAULT
= 0x1,
1679 BE_PRIV_LNKQUERY
= 0x2,
1680 BE_PRIV_LNKSTATS
= 0x4,
1681 BE_PRIV_LNKMGMT
= 0x8,
1682 BE_PRIV_LNKDIAG
= 0x10,
1683 BE_PRIV_UTILQUERY
= 0x20,
1684 BE_PRIV_FILTMGMT
= 0x40,
1685 BE_PRIV_IFACEMGMT
= 0x80,
1686 BE_PRIV_VHADM
= 0x100,
1687 BE_PRIV_DEVCFG
= 0x200,
1688 BE_PRIV_DEVSEC
= 0x400
1690 #define MAX_PRIVILEGES (BE_PRIV_VHADM | BE_PRIV_DEVCFG | \
1692 #define MIN_PRIVILEGES BE_PRIV_DEFAULT
1694 struct be_cmd_priv_map
{
1700 struct be_cmd_req_get_fn_privileges
{
1701 struct be_cmd_req_hdr hdr
;
1705 struct be_cmd_resp_get_fn_privileges
{
1706 struct be_cmd_resp_hdr hdr
;
1710 struct be_cmd_req_set_fn_privileges
{
1711 struct be_cmd_req_hdr hdr
;
1712 u32 privileges
; /* Used by BE3, SH-R */
1713 u32 privileges_lancer
; /* Used by Lancer */
1716 /******************** GET/SET_MACLIST **************************/
1717 #define BE_MAX_MAC 64
1718 struct be_cmd_req_get_mac_list
{
1719 struct be_cmd_req_hdr hdr
;
1727 struct get_list_macaddr
{
1734 } __packed s_mac_id
;
1735 } __packed mac_addr_id
;
1738 struct be_cmd_resp_get_mac_list
{
1739 struct be_cmd_resp_hdr hdr
;
1740 struct get_list_macaddr fd_macaddr
; /* Factory default mac */
1741 struct get_list_macaddr macid_macaddr
; /* soft mac */
1743 u8 pseudo_mac_count
;
1746 /* perm override mac */
1747 struct get_list_macaddr macaddr_list
[BE_MAX_MAC
];
1750 struct be_cmd_req_set_mac_list
{
1751 struct be_cmd_req_hdr hdr
;
1755 struct macaddr mac
[BE_MAX_MAC
];
1758 /*********************** HSW Config ***********************/
1759 #define PORT_FWD_TYPE_VEPA 0x3
1760 #define PORT_FWD_TYPE_VEB 0x2
1762 #define ENABLE_MAC_SPOOFCHK 0x2
1763 #define DISABLE_MAC_SPOOFCHK 0x3
1765 struct amap_set_hsw_context
{
1766 u8 interface_id
[16];
1773 u8 port_fwd_type
[3];
1775 u8 vlan_spoofchk
[2];
1782 struct be_cmd_req_set_hsw_config
{
1783 struct be_cmd_req_hdr hdr
;
1784 u8 context
[sizeof(struct amap_set_hsw_context
) / 8];
1787 struct amap_get_hsw_req_context
{
1788 u8 interface_id
[16];
1794 struct amap_get_hsw_resp_context
{
1796 u8 port_fwd_type
[3];
1806 struct be_cmd_req_get_hsw_config
{
1807 struct be_cmd_req_hdr hdr
;
1808 u8 context
[sizeof(struct amap_get_hsw_req_context
) / 8];
1811 struct be_cmd_resp_get_hsw_config
{
1812 struct be_cmd_resp_hdr hdr
;
1813 u8 context
[sizeof(struct amap_get_hsw_resp_context
) / 8];
1817 /******************* get port names ***************/
1818 struct be_cmd_req_get_port_name
{
1819 struct be_cmd_req_hdr hdr
;
1823 struct be_cmd_resp_get_port_name
{
1824 struct be_cmd_req_hdr hdr
;
1828 /*************** HW Stats Get v1 **********************************/
1829 #define BE_TXP_SW_SZ 48
1830 struct be_port_rxf_stats_v1
{
1833 u32 rx_alignment_symbol_errors
;
1834 u32 rx_pause_frames
;
1835 u32 rx_priority_pause_frames
;
1836 u32 rx_control_frames
;
1837 u32 rx_in_range_errors
;
1838 u32 rx_out_range_errors
;
1839 u32 rx_frame_too_long
;
1840 u32 rx_address_filtered
;
1841 u32 rx_dropped_too_small
;
1842 u32 rx_dropped_too_short
;
1843 u32 rx_dropped_header_too_small
;
1844 u32 rx_dropped_tcp_length
;
1845 u32 rx_dropped_runt
;
1847 u32 rx_ip_checksum_errs
;
1848 u32 rx_tcp_checksum_errs
;
1849 u32 rx_udp_checksum_errs
;
1851 u32 rx_switched_unicast_packets
;
1852 u32 rx_switched_multicast_packets
;
1853 u32 rx_switched_broadcast_packets
;
1856 u32 tx_priority_pauseframes
;
1857 u32 tx_controlframes
;
1859 u32 rxpp_fifo_overflow_drop
;
1860 u32 rx_input_fifo_overflow_drop
;
1861 u32 pmem_fifo_overflow_drop
;
1867 struct be_rxf_stats_v1
{
1868 struct be_port_rxf_stats_v1 port
[4];
1870 u32 rx_drops_no_pbuf
;
1871 u32 rx_drops_no_txpb
;
1872 u32 rx_drops_no_erx_descr
;
1873 u32 rx_drops_no_tpre_descr
;
1875 u32 rx_drops_too_many_frags
;
1876 u32 rx_drops_invalid_ring
;
1877 u32 forwarded_packets
;
1882 struct be_erx_stats_v1
{
1883 u32 rx_drops_no_fragments
[68]; /* dwordS 0 to 67*/
1887 struct be_port_rxf_stats_v2
{
1889 u32 roce_bytes_received_lsd
;
1890 u32 roce_bytes_received_msd
;
1892 u32 roce_frames_received
;
1894 u32 rx_alignment_symbol_errors
;
1895 u32 rx_pause_frames
;
1896 u32 rx_priority_pause_frames
;
1897 u32 rx_control_frames
;
1898 u32 rx_in_range_errors
;
1899 u32 rx_out_range_errors
;
1900 u32 rx_frame_too_long
;
1901 u32 rx_address_filtered
;
1902 u32 rx_dropped_too_small
;
1903 u32 rx_dropped_too_short
;
1904 u32 rx_dropped_header_too_small
;
1905 u32 rx_dropped_tcp_length
;
1906 u32 rx_dropped_runt
;
1908 u32 rx_ip_checksum_errs
;
1909 u32 rx_tcp_checksum_errs
;
1910 u32 rx_udp_checksum_errs
;
1912 u32 rx_switched_unicast_packets
;
1913 u32 rx_switched_multicast_packets
;
1914 u32 rx_switched_broadcast_packets
;
1917 u32 tx_priority_pauseframes
;
1918 u32 tx_controlframes
;
1920 u32 rxpp_fifo_overflow_drop
;
1921 u32 rx_input_fifo_overflow_drop
;
1922 u32 pmem_fifo_overflow_drop
;
1925 u32 rx_drops_payload_size
;
1926 u32 rx_drops_clipped_header
;
1928 u32 roce_drops_payload_len
;
1933 struct be_rxf_stats_v2
{
1934 struct be_port_rxf_stats_v2 port
[4];
1936 u32 rx_drops_no_pbuf
;
1937 u32 rx_drops_no_txpb
;
1938 u32 rx_drops_no_erx_descr
;
1939 u32 rx_drops_no_tpre_descr
;
1941 u32 rx_drops_too_many_frags
;
1942 u32 rx_drops_invalid_ring
;
1943 u32 forwarded_packets
;
1948 struct be_hw_stats_v1
{
1949 struct be_rxf_stats_v1 rxf
;
1950 u32 rsvd0
[BE_TXP_SW_SZ
];
1951 struct be_erx_stats_v1 erx
;
1952 struct be_pmem_stats pmem
;
1956 struct be_cmd_req_get_stats_v1
{
1957 struct be_cmd_req_hdr hdr
;
1958 u8 rsvd
[sizeof(struct be_hw_stats_v1
)];
1961 struct be_cmd_resp_get_stats_v1
{
1962 struct be_cmd_resp_hdr hdr
;
1963 struct be_hw_stats_v1 hw_stats
;
1966 struct be_erx_stats_v2
{
1967 u32 rx_drops_no_fragments
[136]; /* dwordS 0 to 135*/
1971 struct be_hw_stats_v2
{
1972 struct be_rxf_stats_v2 rxf
;
1973 u32 rsvd0
[BE_TXP_SW_SZ
];
1974 struct be_erx_stats_v2 erx
;
1975 struct be_pmem_stats pmem
;
1979 struct be_cmd_req_get_stats_v2
{
1980 struct be_cmd_req_hdr hdr
;
1981 u8 rsvd
[sizeof(struct be_hw_stats_v2
)];
1984 struct be_cmd_resp_get_stats_v2
{
1985 struct be_cmd_resp_hdr hdr
;
1986 struct be_hw_stats_v2 hw_stats
;
1989 /************** get fat capabilites *******************/
1990 #define MAX_MODULES 27
1993 #define FW_LOG_LEVEL_DEFAULT 48
1994 #define FW_LOG_LEVEL_FATAL 64
1996 struct ext_fat_mode
{
2004 struct ext_fat_modules
{
2008 struct ext_fat_mode trace_lvl
[MAX_MODES
];
2011 struct be_fat_conf_params
{
2012 u32 max_log_entries
;
2020 struct ext_fat_modules module
[MAX_MODULES
];
2023 struct be_cmd_req_get_ext_fat_caps
{
2024 struct be_cmd_req_hdr hdr
;
2028 struct be_cmd_resp_get_ext_fat_caps
{
2029 struct be_cmd_resp_hdr hdr
;
2030 struct be_fat_conf_params get_params
;
2033 struct be_cmd_req_set_ext_fat_caps
{
2034 struct be_cmd_req_hdr hdr
;
2035 struct be_fat_conf_params set_params
;
2038 #define RESOURCE_DESC_SIZE_V0 72
2039 #define RESOURCE_DESC_SIZE_V1 88
2040 #define PCIE_RESOURCE_DESC_TYPE_V0 0x40
2041 #define NIC_RESOURCE_DESC_TYPE_V0 0x41
2042 #define PCIE_RESOURCE_DESC_TYPE_V1 0x50
2043 #define NIC_RESOURCE_DESC_TYPE_V1 0x51
2044 #define PORT_RESOURCE_DESC_TYPE_V1 0x55
2045 #define MAX_RESOURCE_DESC 264
2047 #define IF_CAPS_FLAGS_VALID_SHIFT 0 /* IF caps valid */
2048 #define VFT_SHIFT 3 /* VF template */
2049 #define IMM_SHIFT 6 /* Immediate */
2050 #define NOSV_SHIFT 7 /* No save */
2052 struct be_res_desc_hdr
{
2057 struct be_port_res_desc
{
2058 struct be_res_desc_hdr hdr
;
2065 #define NV_TYPE_MASK 0x3 /* bits 0-1 */
2066 #define NV_TYPE_DISABLED 1
2067 #define NV_TYPE_VXLAN 3
2068 #define SOCVID_SHIFT 2 /* Strip outer vlan */
2069 #define RCVID_SHIFT 4 /* Report vlan */
2072 __le16 nv_port
; /* vxlan/gre port */
2076 struct be_pcie_res_desc
{
2077 struct be_res_desc_hdr hdr
;
2093 struct be_nic_res_desc
{
2094 struct be_res_desc_hdr hdr
;
2097 #define QUN_SHIFT 4 /* QoS is in absolute units */
2103 u16 unicast_mac_count
;
2107 u16 mcast_mac_count
;
2120 u16 channel_id_param
;
2126 u16 tunnel_iface_count
;
2127 u16 direct_tenant_iface_count
;
2131 /************ Multi-Channel type ***********/
2142 /* Is BE in a multi-channel mode */
2143 static inline bool be_is_mc(struct be_adapter
*adapter
)
2145 return adapter
->mc_type
> MC_NONE
;
2148 struct be_cmd_req_get_func_config
{
2149 struct be_cmd_req_hdr hdr
;
2152 struct be_cmd_resp_get_func_config
{
2153 struct be_cmd_resp_hdr hdr
;
2155 u8 func_param
[MAX_RESOURCE_DESC
* RESOURCE_DESC_SIZE_V1
];
2163 struct be_cmd_req_get_profile_config
{
2164 struct be_cmd_req_hdr hdr
;
2166 #define ACTIVE_PROFILE_TYPE 0x2
2167 #define QUERY_MODIFIABLE_FIELDS_TYPE BIT(3)
2172 struct be_cmd_resp_get_profile_config
{
2173 struct be_cmd_resp_hdr hdr
;
2176 u8 func_param
[MAX_RESOURCE_DESC
* RESOURCE_DESC_SIZE_V1
];
2179 #define FIELD_MODIFIABLE 0xFFFF
2180 struct be_cmd_req_set_profile_config
{
2181 struct be_cmd_req_hdr hdr
;
2184 u8 desc
[2 * RESOURCE_DESC_SIZE_V1
];
2187 struct be_cmd_req_get_active_profile
{
2188 struct be_cmd_req_hdr hdr
;
2192 struct be_cmd_resp_get_active_profile
{
2193 struct be_cmd_resp_hdr hdr
;
2194 u16 active_profile_id
;
2195 u16 next_profile_id
;
2198 struct be_cmd_enable_disable_vf
{
2199 struct be_cmd_req_hdr hdr
;
2204 struct be_cmd_req_intr_set
{
2205 struct be_cmd_req_hdr hdr
;
2210 static inline bool check_privilege(struct be_adapter
*adapter
, u32 flags
)
2212 return flags
& adapter
->cmd_privileges
? true : false;
2215 /************** Get IFACE LIST *******************/
2222 struct be_cmd_req_get_iface_list
{
2223 struct be_cmd_req_hdr hdr
;
2226 struct be_cmd_resp_get_iface_list
{
2227 struct be_cmd_req_hdr hdr
;
2229 struct be_if_desc if_desc
;
2232 /*************** Set logical link ********************/
2233 #define PLINK_TRACK_SHIFT 8
2234 struct be_cmd_req_set_ll_link
{
2235 struct be_cmd_req_hdr hdr
;
2236 u32 link_config
; /* Bit 0: UP_DOWN, Bit 9: PLINK */
2239 /************** Manage IFACE Filters *******************/
2240 #define OP_CONVERT_NORMAL_TO_TUNNEL 0
2241 #define OP_CONVERT_TUNNEL_TO_NORMAL 1
2243 struct be_cmd_req_manage_iface_filters
{
2244 struct be_cmd_req_hdr hdr
;
2249 u32 tunnel_iface_id
;
2250 u32 target_iface_id
;
2256 u32 cap_control_flags
;
2259 int be_pci_fnum_get(struct be_adapter
*adapter
);
2260 int be_fw_wait_ready(struct be_adapter
*adapter
);
2261 int be_cmd_mac_addr_query(struct be_adapter
*adapter
, u8
*mac_addr
,
2262 bool permanent
, u32 if_handle
, u32 pmac_id
);
2263 int be_cmd_pmac_add(struct be_adapter
*adapter
, u8
*mac_addr
, u32 if_id
,
2264 u32
*pmac_id
, u32 domain
);
2265 int be_cmd_pmac_del(struct be_adapter
*adapter
, u32 if_id
, int pmac_id
,
2267 int be_cmd_if_create(struct be_adapter
*adapter
, u32 cap_flags
, u32 en_flags
,
2268 u32
*if_handle
, u32 domain
);
2269 int be_cmd_if_destroy(struct be_adapter
*adapter
, int if_handle
, u32 domain
);
2270 int be_cmd_eq_create(struct be_adapter
*adapter
, struct be_eq_obj
*eqo
);
2271 int be_cmd_cq_create(struct be_adapter
*adapter
, struct be_queue_info
*cq
,
2272 struct be_queue_info
*eq
, bool no_delay
,
2273 int num_cqe_dma_coalesce
);
2274 int be_cmd_mccq_create(struct be_adapter
*adapter
, struct be_queue_info
*mccq
,
2275 struct be_queue_info
*cq
);
2276 int be_cmd_txq_create(struct be_adapter
*adapter
, struct be_tx_obj
*txo
);
2277 int be_cmd_rxq_create(struct be_adapter
*adapter
, struct be_queue_info
*rxq
,
2278 u16 cq_id
, u16 frag_size
, u32 if_id
, u32 rss
, u8
*rss_id
);
2279 int be_cmd_q_destroy(struct be_adapter
*adapter
, struct be_queue_info
*q
,
2281 int be_cmd_rxq_destroy(struct be_adapter
*adapter
, struct be_queue_info
*q
);
2282 int be_cmd_link_status_query(struct be_adapter
*adapter
, u16
*link_speed
,
2283 u8
*link_status
, u32 dom
);
2284 int be_cmd_reset(struct be_adapter
*adapter
);
2285 int be_cmd_get_stats(struct be_adapter
*adapter
, struct be_dma_mem
*nonemb_cmd
);
2286 int lancer_cmd_get_pport_stats(struct be_adapter
*adapter
,
2287 struct be_dma_mem
*nonemb_cmd
);
2288 int be_cmd_get_fw_ver(struct be_adapter
*adapter
);
2289 int be_cmd_modify_eqd(struct be_adapter
*adapter
, struct be_set_eqd
*, int num
);
2290 int be_cmd_vlan_config(struct be_adapter
*adapter
, u32 if_id
, u16
*vtag_array
,
2291 u32 num
, u32 domain
);
2292 int be_cmd_rx_filter(struct be_adapter
*adapter
, u32 flags
, u32 status
);
2293 int be_cmd_set_flow_control(struct be_adapter
*adapter
, u32 tx_fc
, u32 rx_fc
);
2294 int be_cmd_get_flow_control(struct be_adapter
*adapter
, u32
*tx_fc
, u32
*rx_fc
);
2295 int be_cmd_query_fw_cfg(struct be_adapter
*adapter
);
2296 int be_cmd_reset_function(struct be_adapter
*adapter
);
2297 int be_cmd_rss_config(struct be_adapter
*adapter
, u8
*rsstable
,
2298 u32 rss_hash_opts
, u16 table_size
, const u8
*rss_hkey
);
2299 int be_process_mcc(struct be_adapter
*adapter
);
2300 int be_cmd_set_beacon_state(struct be_adapter
*adapter
, u8 port_num
, u8 beacon
,
2301 u8 status
, u8 state
);
2302 int be_cmd_get_beacon_state(struct be_adapter
*adapter
, u8 port_num
,
2304 int be_cmd_read_port_transceiver_data(struct be_adapter
*adapter
,
2305 u8 page_num
, u8
*data
);
2306 int be_cmd_query_cable_type(struct be_adapter
*adapter
);
2307 int be_cmd_query_sfp_info(struct be_adapter
*adapter
);
2308 int be_cmd_write_flashrom(struct be_adapter
*adapter
, struct be_dma_mem
*cmd
,
2309 u32 flash_oper
, u32 flash_opcode
, u32 img_offset
,
2311 int lancer_cmd_write_object(struct be_adapter
*adapter
, struct be_dma_mem
*cmd
,
2312 u32 data_size
, u32 data_offset
,
2313 const char *obj_name
, u32
*data_written
,
2314 u8
*change_status
, u8
*addn_status
);
2315 int lancer_cmd_read_object(struct be_adapter
*adapter
, struct be_dma_mem
*cmd
,
2316 u32 data_size
, u32 data_offset
, const char *obj_name
,
2317 u32
*data_read
, u32
*eof
, u8
*addn_status
);
2318 int lancer_cmd_delete_object(struct be_adapter
*adapter
, const char *obj_name
);
2319 int be_cmd_get_flash_crc(struct be_adapter
*adapter
, u8
*flashed_crc
,
2320 u16 img_optype
, u32 img_offset
, u32 crc_offset
);
2321 int be_cmd_enable_magic_wol(struct be_adapter
*adapter
, u8
*mac
,
2322 struct be_dma_mem
*nonemb_cmd
);
2323 int be_cmd_fw_init(struct be_adapter
*adapter
);
2324 int be_cmd_fw_clean(struct be_adapter
*adapter
);
2325 void be_async_mcc_enable(struct be_adapter
*adapter
);
2326 void be_async_mcc_disable(struct be_adapter
*adapter
);
2327 int be_cmd_loopback_test(struct be_adapter
*adapter
, u32 port_num
,
2328 u32 loopback_type
, u32 pkt_size
, u32 num_pkts
,
2330 int be_cmd_ddr_dma_test(struct be_adapter
*adapter
, u64 pattern
, u32 byte_cnt
,
2331 struct be_dma_mem
*cmd
);
2332 int be_cmd_get_seeprom_data(struct be_adapter
*adapter
,
2333 struct be_dma_mem
*nonemb_cmd
);
2334 int be_cmd_set_loopback(struct be_adapter
*adapter
, u8 port_num
,
2335 u8 loopback_type
, u8 enable
);
2336 int be_cmd_get_phy_info(struct be_adapter
*adapter
);
2337 int be_cmd_config_qos(struct be_adapter
*adapter
, u32 max_rate
,
2338 u16 link_speed
, u8 domain
);
2339 void be_detect_error(struct be_adapter
*adapter
);
2340 int be_cmd_get_die_temperature(struct be_adapter
*adapter
);
2341 int be_cmd_get_cntl_attributes(struct be_adapter
*adapter
);
2342 int be_cmd_req_native_mode(struct be_adapter
*adapter
);
2343 int be_cmd_get_reg_len(struct be_adapter
*adapter
, u32
*log_size
);
2344 int be_cmd_get_regs(struct be_adapter
*adapter
, u32 buf_len
, void *buf
);
2345 int be_cmd_get_fn_privileges(struct be_adapter
*adapter
, u32
*privilege
,
2347 int be_cmd_set_fn_privileges(struct be_adapter
*adapter
, u32 privileges
,
2349 int be_cmd_get_mac_from_list(struct be_adapter
*adapter
, u8
*mac
,
2350 bool *pmac_id_active
, u32
*pmac_id
,
2351 u32 if_handle
, u8 domain
);
2352 int be_cmd_get_active_mac(struct be_adapter
*adapter
, u32 pmac_id
, u8
*mac
,
2353 u32 if_handle
, bool active
, u32 domain
);
2354 int be_cmd_get_perm_mac(struct be_adapter
*adapter
, u8
*mac
);
2355 int be_cmd_set_mac_list(struct be_adapter
*adapter
, u8
*mac_array
, u8 mac_count
,
2357 int be_cmd_set_mac(struct be_adapter
*adapter
, u8
*mac
, int if_id
, u32 dom
);
2358 int be_cmd_set_hsw_config(struct be_adapter
*adapter
, u16 pvid
, u32 domain
,
2359 u16 intf_id
, u16 hsw_mode
, u8 spoofchk
);
2360 int be_cmd_get_hsw_config(struct be_adapter
*adapter
, u16
*pvid
, u32 domain
,
2361 u16 intf_id
, u8
*mode
, bool *spoofchk
);
2362 int be_cmd_get_acpi_wol_cap(struct be_adapter
*adapter
);
2363 int be_cmd_set_fw_log_level(struct be_adapter
*adapter
, u32 level
);
2364 int be_cmd_get_fw_log_level(struct be_adapter
*adapter
);
2365 int be_cmd_get_ext_fat_capabilites(struct be_adapter
*adapter
,
2366 struct be_dma_mem
*cmd
);
2367 int be_cmd_set_ext_fat_capabilites(struct be_adapter
*adapter
,
2368 struct be_dma_mem
*cmd
,
2369 struct be_fat_conf_params
*cfgs
);
2370 int lancer_physdev_ctrl(struct be_adapter
*adapter
, u32 mask
);
2371 int lancer_initiate_dump(struct be_adapter
*adapter
);
2372 int lancer_delete_dump(struct be_adapter
*adapter
);
2373 bool dump_present(struct be_adapter
*adapter
);
2374 int lancer_test_and_set_rdy_state(struct be_adapter
*adapter
);
2375 int be_cmd_query_port_name(struct be_adapter
*adapter
);
2376 int be_cmd_get_func_config(struct be_adapter
*adapter
,
2377 struct be_resources
*res
);
2378 int be_cmd_get_profile_config(struct be_adapter
*adapter
,
2379 struct be_resources
*res
, u8 query
, u8 domain
);
2380 int be_cmd_get_active_profile(struct be_adapter
*adapter
, u16
*profile
);
2381 int be_cmd_get_if_id(struct be_adapter
*adapter
, struct be_vf_cfg
*vf_cfg
,
2383 int be_cmd_enable_vf(struct be_adapter
*adapter
, u8 domain
);
2384 int be_cmd_intr_set(struct be_adapter
*adapter
, bool intr_enable
);
2385 int be_cmd_set_logical_link_config(struct be_adapter
*adapter
,
2386 int link_state
, u8 domain
);
2387 int be_cmd_set_vxlan_port(struct be_adapter
*adapter
, __be16 port
);
2388 int be_cmd_manage_iface(struct be_adapter
*adapter
, u32 iface
, u8 op
);
2389 int be_cmd_set_sriov_config(struct be_adapter
*adapter
,
2390 struct be_resources res
, u16 num_vfs
,