2 * Copyright (c) 2014-2015 Hisilicon Limited.
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
10 #include <linux/acpi.h>
11 #include <linux/device.h>
12 #include <linux/init.h>
13 #include <linux/interrupt.h>
14 #include <linux/kernel.h>
15 #include <linux/module.h>
16 #include <linux/netdevice.h>
17 #include <linux/mfd/syscon.h>
19 #include <linux/of_address.h>
20 #include <linux/of_irq.h>
21 #include <linux/of_platform.h>
22 #include <linux/platform_device.h>
23 #include <linux/vmalloc.h>
25 #include "hns_dsaf_mac.h"
26 #include "hns_dsaf_main.h"
27 #include "hns_dsaf_ppe.h"
28 #include "hns_dsaf_rcb.h"
29 #include "hns_dsaf_misc.h"
31 const char *g_dsaf_mode_match
[DSAF_MODE_MAX
] = {
32 [DSAF_MODE_DISABLE_2PORT_64VM
] = "2port-64vf",
33 [DSAF_MODE_DISABLE_6PORT_0VM
] = "6port-16rss",
34 [DSAF_MODE_DISABLE_6PORT_16VM
] = "6port-16vf",
35 [DSAF_MODE_DISABLE_SP
] = "single-port",
38 static const struct acpi_device_id hns_dsaf_acpi_match
[] = {
43 MODULE_DEVICE_TABLE(acpi
, hns_dsaf_acpi_match
);
45 int hns_dsaf_get_cfg(struct dsaf_device
*dsaf_dev
)
53 struct regmap
*syscon
;
55 struct device_node
*np
= dsaf_dev
->dev
->of_node
, *np_temp
;
56 struct platform_device
*pdev
= to_platform_device(dsaf_dev
->dev
);
58 if (dev_of_node(dsaf_dev
->dev
)) {
59 if (of_device_is_compatible(np
, "hisilicon,hns-dsaf-v1"))
60 dsaf_dev
->dsaf_ver
= AE_VERSION_1
;
62 dsaf_dev
->dsaf_ver
= AE_VERSION_2
;
63 } else if (is_acpi_node(dsaf_dev
->dev
->fwnode
)) {
64 if (acpi_dev_found(hns_dsaf_acpi_match
[0].id
))
65 dsaf_dev
->dsaf_ver
= AE_VERSION_1
;
66 else if (acpi_dev_found(hns_dsaf_acpi_match
[1].id
))
67 dsaf_dev
->dsaf_ver
= AE_VERSION_2
;
71 dev_err(dsaf_dev
->dev
, "cannot get cfg data from of or acpi\n");
75 ret
= device_property_read_string(dsaf_dev
->dev
, "mode", &mode_str
);
77 dev_err(dsaf_dev
->dev
, "get dsaf mode fail, ret=%d!\n", ret
);
80 for (i
= 0; i
< DSAF_MODE_MAX
; i
++) {
81 if (g_dsaf_mode_match
[i
] &&
82 !strcmp(mode_str
, g_dsaf_mode_match
[i
]))
85 if (i
>= DSAF_MODE_MAX
||
86 i
== DSAF_MODE_INVALID
|| i
== DSAF_MODE_ENABLE
) {
87 dev_err(dsaf_dev
->dev
,
88 "%s prs mode str fail!\n", dsaf_dev
->ae_dev
.name
);
91 dsaf_dev
->dsaf_mode
= (enum dsaf_mode
)i
;
93 if (dsaf_dev
->dsaf_mode
> DSAF_MODE_ENABLE
)
94 dsaf_dev
->dsaf_en
= HRD_DSAF_NO_DSAF_MODE
;
96 dsaf_dev
->dsaf_en
= HRD_DSAF_MODE
;
98 if ((i
== DSAF_MODE_ENABLE_16VM
) ||
99 (i
== DSAF_MODE_DISABLE_2PORT_8VM
) ||
100 (i
== DSAF_MODE_DISABLE_6PORT_2VM
))
101 dsaf_dev
->dsaf_tc_mode
= HRD_DSAF_8TC_MODE
;
103 dsaf_dev
->dsaf_tc_mode
= HRD_DSAF_4TC_MODE
;
105 if (dev_of_node(dsaf_dev
->dev
)) {
106 np_temp
= of_parse_phandle(np
, "subctrl-syscon", 0);
107 syscon
= syscon_node_to_regmap(np_temp
);
108 of_node_put(np_temp
);
109 if (IS_ERR_OR_NULL(syscon
)) {
110 res
= platform_get_resource(pdev
, IORESOURCE_MEM
,
113 dev_err(dsaf_dev
->dev
, "subctrl info is needed!\n");
117 dsaf_dev
->sc_base
= devm_ioremap_resource(&pdev
->dev
,
119 if (IS_ERR(dsaf_dev
->sc_base
))
120 return PTR_ERR(dsaf_dev
->sc_base
);
122 res
= platform_get_resource(pdev
, IORESOURCE_MEM
,
125 dev_err(dsaf_dev
->dev
, "serdes-ctrl info is needed!\n");
129 dsaf_dev
->sds_base
= devm_ioremap_resource(&pdev
->dev
,
131 if (IS_ERR(dsaf_dev
->sds_base
))
132 return PTR_ERR(dsaf_dev
->sds_base
);
134 dsaf_dev
->sub_ctrl
= syscon
;
138 res
= platform_get_resource_byname(pdev
, IORESOURCE_MEM
, "ppe-base");
140 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, res_idx
++);
142 dev_err(dsaf_dev
->dev
, "ppe-base info is needed!\n");
146 dsaf_dev
->ppe_base
= devm_ioremap_resource(&pdev
->dev
, res
);
147 if (IS_ERR(dsaf_dev
->ppe_base
))
148 return PTR_ERR(dsaf_dev
->ppe_base
);
149 dsaf_dev
->ppe_paddr
= res
->start
;
151 if (!HNS_DSAF_IS_DEBUG(dsaf_dev
)) {
152 res
= platform_get_resource_byname(pdev
, IORESOURCE_MEM
,
155 res
= platform_get_resource(pdev
, IORESOURCE_MEM
,
158 dev_err(dsaf_dev
->dev
,
159 "dsaf-base info is needed!\n");
163 dsaf_dev
->io_base
= devm_ioremap_resource(&pdev
->dev
, res
);
164 if (IS_ERR(dsaf_dev
->io_base
))
165 return PTR_ERR(dsaf_dev
->io_base
);
168 ret
= device_property_read_u32(dsaf_dev
->dev
, "desc-num", &desc_num
);
169 if (ret
< 0 || desc_num
< HNS_DSAF_MIN_DESC_CNT
||
170 desc_num
> HNS_DSAF_MAX_DESC_CNT
) {
171 dev_err(dsaf_dev
->dev
, "get desc-num(%d) fail, ret=%d!\n",
175 dsaf_dev
->desc_num
= desc_num
;
177 ret
= device_property_read_u32(dsaf_dev
->dev
, "reset-field-offset",
180 dev_dbg(dsaf_dev
->dev
,
181 "get reset-field-offset fail, ret=%d!\r\n", ret
);
183 dsaf_dev
->reset_offset
= reset_offset
;
185 ret
= device_property_read_u32(dsaf_dev
->dev
, "buf-size", &buf_size
);
187 dev_err(dsaf_dev
->dev
,
188 "get buf-size fail, ret=%d!\r\n", ret
);
191 dsaf_dev
->buf_size
= buf_size
;
193 dsaf_dev
->buf_size_type
= hns_rcb_buf_size2type(buf_size
);
194 if (dsaf_dev
->buf_size_type
< 0) {
195 dev_err(dsaf_dev
->dev
,
196 "buf_size(%d) is wrong!\n", buf_size
);
200 dsaf_dev
->misc_op
= hns_misc_op_get(dsaf_dev
);
201 if (!dsaf_dev
->misc_op
)
204 if (!dma_set_mask_and_coherent(dsaf_dev
->dev
, DMA_BIT_MASK(64ULL)))
205 dev_dbg(dsaf_dev
->dev
, "set mask to 64bit\n");
207 dev_err(dsaf_dev
->dev
, "set mask to 64bit fail!\n");
213 * hns_dsaf_sbm_link_sram_init_en - config dsaf_sbm_init_en
214 * @dsaf_id: dsa fabric id
216 static void hns_dsaf_sbm_link_sram_init_en(struct dsaf_device
*dsaf_dev
)
218 dsaf_set_dev_bit(dsaf_dev
, DSAF_CFG_0_REG
, DSAF_CFG_SBM_INIT_S
, 1);
222 * hns_dsaf_reg_cnt_clr_ce - config hns_dsaf_reg_cnt_clr_ce
223 * @dsaf_id: dsa fabric id
224 * @hns_dsaf_reg_cnt_clr_ce: config value
227 hns_dsaf_reg_cnt_clr_ce(struct dsaf_device
*dsaf_dev
, u32 reg_cnt_clr_ce
)
229 dsaf_set_dev_bit(dsaf_dev
, DSAF_DSA_REG_CNT_CLR_CE_REG
,
230 DSAF_CNT_CLR_CE_S
, reg_cnt_clr_ce
);
234 * hns_ppe_qid_cfg - config ppe qid
235 * @dsaf_id: dsa fabric id
236 * @pppe_qid_cfg: value array
239 hns_dsaf_ppe_qid_cfg(struct dsaf_device
*dsaf_dev
, u32 qid_cfg
)
243 for (i
= 0; i
< DSAF_COMM_CHN
; i
++) {
244 dsaf_set_dev_field(dsaf_dev
,
245 DSAF_PPE_QID_CFG_0_REG
+ 0x0004 * i
,
246 DSAF_PPE_QID_CFG_M
, DSAF_PPE_QID_CFG_S
,
251 static void hns_dsaf_mix_def_qid_cfg(struct dsaf_device
*dsaf_dev
)
253 u16 max_q_per_vf
, max_vfn
;
254 u32 q_id
, q_num_per_port
;
257 hns_rcb_get_queue_mode(dsaf_dev
->dsaf_mode
, &max_vfn
, &max_q_per_vf
);
258 q_num_per_port
= max_vfn
* max_q_per_vf
;
260 for (i
= 0, q_id
= 0; i
< DSAF_SERVICE_NW_NUM
; i
++) {
261 dsaf_set_dev_field(dsaf_dev
,
262 DSAF_MIX_DEF_QID_0_REG
+ 0x0004 * i
,
264 q_id
+= q_num_per_port
;
268 static void hns_dsaf_inner_qid_cfg(struct dsaf_device
*dsaf_dev
)
270 u16 max_q_per_vf
, max_vfn
;
271 u32 q_id
, q_num_per_port
;
274 if (AE_IS_VER1(dsaf_dev
->dsaf_ver
))
277 hns_rcb_get_queue_mode(dsaf_dev
->dsaf_mode
, &max_vfn
, &max_q_per_vf
);
278 q_num_per_port
= max_vfn
* max_q_per_vf
;
280 for (mac_id
= 0, q_id
= 0; mac_id
< DSAF_SERVICE_NW_NUM
; mac_id
++) {
281 dsaf_set_dev_field(dsaf_dev
,
282 DSAFV2_SERDES_LBK_0_REG
+ 4 * mac_id
,
283 DSAFV2_SERDES_LBK_QID_M
,
284 DSAFV2_SERDES_LBK_QID_S
,
286 q_id
+= q_num_per_port
;
291 * hns_dsaf_sw_port_type_cfg - cfg sw type
292 * @dsaf_id: dsa fabric id
293 * @psw_port_type: array
295 static void hns_dsaf_sw_port_type_cfg(struct dsaf_device
*dsaf_dev
,
296 enum dsaf_sw_port_type port_type
)
300 for (i
= 0; i
< DSAF_SW_PORT_NUM
; i
++) {
301 dsaf_set_dev_field(dsaf_dev
,
302 DSAF_SW_PORT_TYPE_0_REG
+ 0x0004 * i
,
303 DSAF_SW_PORT_TYPE_M
, DSAF_SW_PORT_TYPE_S
,
309 * hns_dsaf_stp_port_type_cfg - cfg stp type
310 * @dsaf_id: dsa fabric id
311 * @pstp_port_type: array
313 static void hns_dsaf_stp_port_type_cfg(struct dsaf_device
*dsaf_dev
,
314 enum dsaf_stp_port_type port_type
)
318 for (i
= 0; i
< DSAF_COMM_CHN
; i
++) {
319 dsaf_set_dev_field(dsaf_dev
,
320 DSAF_STP_PORT_TYPE_0_REG
+ 0x0004 * i
,
321 DSAF_STP_PORT_TYPE_M
, DSAF_STP_PORT_TYPE_S
,
326 #define HNS_DSAF_SBM_NUM(dev) \
327 (AE_IS_VER1((dev)->dsaf_ver) ? DSAF_SBM_NUM : DSAFV2_SBM_NUM)
329 * hns_dsaf_sbm_cfg - config sbm
330 * @dsaf_id: dsa fabric id
332 static void hns_dsaf_sbm_cfg(struct dsaf_device
*dsaf_dev
)
337 for (i
= 0; i
< HNS_DSAF_SBM_NUM(dsaf_dev
); i
++) {
338 o_sbm_cfg
= dsaf_read_dev(dsaf_dev
,
339 DSAF_SBM_CFG_REG_0_REG
+ 0x80 * i
);
340 dsaf_set_bit(o_sbm_cfg
, DSAF_SBM_CFG_EN_S
, 1);
341 dsaf_set_bit(o_sbm_cfg
, DSAF_SBM_CFG_SHCUT_EN_S
, 0);
342 dsaf_write_dev(dsaf_dev
,
343 DSAF_SBM_CFG_REG_0_REG
+ 0x80 * i
, o_sbm_cfg
);
348 * hns_dsaf_sbm_cfg_mib_en - config sbm
349 * @dsaf_id: dsa fabric id
351 static int hns_dsaf_sbm_cfg_mib_en(struct dsaf_device
*dsaf_dev
)
358 /* validate configure by setting SBM_CFG_MIB_EN bit from 0 to 1. */
359 for (i
= 0; i
< HNS_DSAF_SBM_NUM(dsaf_dev
); i
++) {
360 reg
= DSAF_SBM_CFG_REG_0_REG
+ 0x80 * i
;
361 dsaf_set_dev_bit(dsaf_dev
, reg
, DSAF_SBM_CFG_MIB_EN_S
, 0);
364 for (i
= 0; i
< HNS_DSAF_SBM_NUM(dsaf_dev
); i
++) {
365 reg
= DSAF_SBM_CFG_REG_0_REG
+ 0x80 * i
;
366 dsaf_set_dev_bit(dsaf_dev
, reg
, DSAF_SBM_CFG_MIB_EN_S
, 1);
369 /* waitint for all sbm enable finished */
370 for (i
= 0; i
< HNS_DSAF_SBM_NUM(dsaf_dev
); i
++) {
372 reg
= DSAF_SBM_CFG_REG_0_REG
+ 0x80 * i
;
375 sbm_cfg_mib_en
= dsaf_get_dev_bit(
376 dsaf_dev
, reg
, DSAF_SBM_CFG_MIB_EN_S
);
378 } while (sbm_cfg_mib_en
== 0 &&
379 read_cnt
< DSAF_CFG_READ_CNT
);
381 if (sbm_cfg_mib_en
== 0) {
382 dev_err(dsaf_dev
->dev
,
383 "sbm_cfg_mib_en fail,%s,sbm_num=%d\n",
384 dsaf_dev
->ae_dev
.name
, i
);
393 * hns_dsaf_sbm_bp_wl_cfg - config sbm
394 * @dsaf_id: dsa fabric id
396 static void hns_dsaf_sbm_bp_wl_cfg(struct dsaf_device
*dsaf_dev
)
403 for (i
= 0; i
< DSAF_XGE_NUM
; i
++) {
404 reg
= DSAF_SBM_BP_CFG_0_XGE_REG_0_REG
+ 0x80 * i
;
405 o_sbm_bp_cfg
= dsaf_read_dev(dsaf_dev
, reg
);
406 dsaf_set_field(o_sbm_bp_cfg
, DSAF_SBM_CFG0_COM_MAX_BUF_NUM_M
,
407 DSAF_SBM_CFG0_COM_MAX_BUF_NUM_S
, 512);
408 dsaf_set_field(o_sbm_bp_cfg
, DSAF_SBM_CFG0_VC0_MAX_BUF_NUM_M
,
409 DSAF_SBM_CFG0_VC0_MAX_BUF_NUM_S
, 0);
410 dsaf_set_field(o_sbm_bp_cfg
, DSAF_SBM_CFG0_VC1_MAX_BUF_NUM_M
,
411 DSAF_SBM_CFG0_VC1_MAX_BUF_NUM_S
, 0);
412 dsaf_write_dev(dsaf_dev
, reg
, o_sbm_bp_cfg
);
414 reg
= DSAF_SBM_BP_CFG_1_REG_0_REG
+ 0x80 * i
;
415 o_sbm_bp_cfg
= dsaf_read_dev(dsaf_dev
, reg
);
416 dsaf_set_field(o_sbm_bp_cfg
, DSAF_SBM_CFG1_TC4_MAX_BUF_NUM_M
,
417 DSAF_SBM_CFG1_TC4_MAX_BUF_NUM_S
, 0);
418 dsaf_set_field(o_sbm_bp_cfg
, DSAF_SBM_CFG1_TC0_MAX_BUF_NUM_M
,
419 DSAF_SBM_CFG1_TC0_MAX_BUF_NUM_S
, 0);
420 dsaf_write_dev(dsaf_dev
, reg
, o_sbm_bp_cfg
);
422 reg
= DSAF_SBM_BP_CFG_2_XGE_REG_0_REG
+ 0x80 * i
;
423 o_sbm_bp_cfg
= dsaf_read_dev(dsaf_dev
, reg
);
424 dsaf_set_field(o_sbm_bp_cfg
, DSAF_SBM_CFG2_SET_BUF_NUM_M
,
425 DSAF_SBM_CFG2_SET_BUF_NUM_S
, 104);
426 dsaf_set_field(o_sbm_bp_cfg
, DSAF_SBM_CFG2_RESET_BUF_NUM_M
,
427 DSAF_SBM_CFG2_RESET_BUF_NUM_S
, 128);
428 dsaf_write_dev(dsaf_dev
, reg
, o_sbm_bp_cfg
);
430 reg
= DSAF_SBM_BP_CFG_3_REG_0_REG
+ 0x80 * i
;
431 o_sbm_bp_cfg
= dsaf_read_dev(dsaf_dev
, reg
);
432 dsaf_set_field(o_sbm_bp_cfg
,
433 DSAF_SBM_CFG3_SET_BUF_NUM_NO_PFC_M
,
434 DSAF_SBM_CFG3_SET_BUF_NUM_NO_PFC_S
, 110);
435 dsaf_set_field(o_sbm_bp_cfg
,
436 DSAF_SBM_CFG3_RESET_BUF_NUM_NO_PFC_M
,
437 DSAF_SBM_CFG3_RESET_BUF_NUM_NO_PFC_S
, 160);
438 dsaf_write_dev(dsaf_dev
, reg
, o_sbm_bp_cfg
);
440 /* for no enable pfc mode */
441 reg
= DSAF_SBM_BP_CFG_4_REG_0_REG
+ 0x80 * i
;
442 o_sbm_bp_cfg
= dsaf_read_dev(dsaf_dev
, reg
);
443 dsaf_set_field(o_sbm_bp_cfg
,
444 DSAF_SBM_CFG3_SET_BUF_NUM_NO_PFC_M
,
445 DSAF_SBM_CFG3_SET_BUF_NUM_NO_PFC_S
, 128);
446 dsaf_set_field(o_sbm_bp_cfg
,
447 DSAF_SBM_CFG3_RESET_BUF_NUM_NO_PFC_M
,
448 DSAF_SBM_CFG3_RESET_BUF_NUM_NO_PFC_S
, 192);
449 dsaf_write_dev(dsaf_dev
, reg
, o_sbm_bp_cfg
);
453 for (i
= 0; i
< DSAF_COMM_CHN
; i
++) {
454 reg
= DSAF_SBM_BP_CFG_2_PPE_REG_0_REG
+ 0x80 * i
;
455 o_sbm_bp_cfg
= dsaf_read_dev(dsaf_dev
, reg
);
456 dsaf_set_field(o_sbm_bp_cfg
, DSAF_SBM_CFG2_SET_BUF_NUM_M
,
457 DSAF_SBM_CFG2_SET_BUF_NUM_S
, 10);
458 dsaf_set_field(o_sbm_bp_cfg
, DSAF_SBM_CFG2_RESET_BUF_NUM_M
,
459 DSAF_SBM_CFG2_RESET_BUF_NUM_S
, 12);
460 dsaf_write_dev(dsaf_dev
, reg
, o_sbm_bp_cfg
);
464 for (i
= 0; i
< DSAF_COMM_CHN
; i
++) {
465 reg
= DSAF_SBM_BP_CFG_2_ROCEE_REG_0_REG
+ 0x80 * i
;
466 o_sbm_bp_cfg
= dsaf_read_dev(dsaf_dev
, reg
);
467 dsaf_set_field(o_sbm_bp_cfg
, DSAF_SBM_CFG2_SET_BUF_NUM_M
,
468 DSAF_SBM_CFG2_SET_BUF_NUM_S
, 2);
469 dsaf_set_field(o_sbm_bp_cfg
, DSAF_SBM_CFG2_RESET_BUF_NUM_M
,
470 DSAF_SBM_CFG2_RESET_BUF_NUM_S
, 4);
471 dsaf_write_dev(dsaf_dev
, reg
, o_sbm_bp_cfg
);
475 static void hns_dsafv2_sbm_bp_wl_cfg(struct dsaf_device
*dsaf_dev
)
482 for (i
= 0; i
< DSAFV2_SBM_XGE_CHN
; i
++) {
483 reg
= DSAF_SBM_BP_CFG_0_XGE_REG_0_REG
+ 0x80 * i
;
484 o_sbm_bp_cfg
= dsaf_read_dev(dsaf_dev
, reg
);
485 dsaf_set_field(o_sbm_bp_cfg
, DSAFV2_SBM_CFG0_COM_MAX_BUF_NUM_M
,
486 DSAFV2_SBM_CFG0_COM_MAX_BUF_NUM_S
, 256);
487 dsaf_set_field(o_sbm_bp_cfg
, DSAFV2_SBM_CFG0_VC0_MAX_BUF_NUM_M
,
488 DSAFV2_SBM_CFG0_VC0_MAX_BUF_NUM_S
, 0);
489 dsaf_set_field(o_sbm_bp_cfg
, DSAFV2_SBM_CFG0_VC1_MAX_BUF_NUM_M
,
490 DSAFV2_SBM_CFG0_VC1_MAX_BUF_NUM_S
, 0);
491 dsaf_write_dev(dsaf_dev
, reg
, o_sbm_bp_cfg
);
493 reg
= DSAF_SBM_BP_CFG_1_REG_0_REG
+ 0x80 * i
;
494 o_sbm_bp_cfg
= dsaf_read_dev(dsaf_dev
, reg
);
495 dsaf_set_field(o_sbm_bp_cfg
, DSAFV2_SBM_CFG1_TC4_MAX_BUF_NUM_M
,
496 DSAFV2_SBM_CFG1_TC4_MAX_BUF_NUM_S
, 0);
497 dsaf_set_field(o_sbm_bp_cfg
, DSAFV2_SBM_CFG1_TC0_MAX_BUF_NUM_M
,
498 DSAFV2_SBM_CFG1_TC0_MAX_BUF_NUM_S
, 0);
499 dsaf_write_dev(dsaf_dev
, reg
, o_sbm_bp_cfg
);
501 reg
= DSAF_SBM_BP_CFG_2_XGE_REG_0_REG
+ 0x80 * i
;
502 o_sbm_bp_cfg
= dsaf_read_dev(dsaf_dev
, reg
);
503 dsaf_set_field(o_sbm_bp_cfg
, DSAFV2_SBM_CFG2_SET_BUF_NUM_M
,
504 DSAFV2_SBM_CFG2_SET_BUF_NUM_S
, 104);
505 dsaf_set_field(o_sbm_bp_cfg
, DSAFV2_SBM_CFG2_RESET_BUF_NUM_M
,
506 DSAFV2_SBM_CFG2_RESET_BUF_NUM_S
, 128);
507 dsaf_write_dev(dsaf_dev
, reg
, o_sbm_bp_cfg
);
509 reg
= DSAF_SBM_BP_CFG_3_REG_0_REG
+ 0x80 * i
;
510 o_sbm_bp_cfg
= dsaf_read_dev(dsaf_dev
, reg
);
511 dsaf_set_field(o_sbm_bp_cfg
,
512 DSAFV2_SBM_CFG3_SET_BUF_NUM_NO_PFC_M
,
513 DSAFV2_SBM_CFG3_SET_BUF_NUM_NO_PFC_S
, 48);
514 dsaf_set_field(o_sbm_bp_cfg
,
515 DSAFV2_SBM_CFG3_RESET_BUF_NUM_NO_PFC_M
,
516 DSAFV2_SBM_CFG3_RESET_BUF_NUM_NO_PFC_S
, 80);
517 dsaf_write_dev(dsaf_dev
, reg
, o_sbm_bp_cfg
);
519 /* for no enable pfc mode */
520 reg
= DSAF_SBM_BP_CFG_4_REG_0_REG
+ 0x80 * i
;
521 o_sbm_bp_cfg
= dsaf_read_dev(dsaf_dev
, reg
);
522 dsaf_set_field(o_sbm_bp_cfg
,
523 DSAFV2_SBM_CFG4_SET_BUF_NUM_NO_PFC_M
,
524 DSAFV2_SBM_CFG4_SET_BUF_NUM_NO_PFC_S
, 192);
525 dsaf_set_field(o_sbm_bp_cfg
,
526 DSAFV2_SBM_CFG4_RESET_BUF_NUM_NO_PFC_M
,
527 DSAFV2_SBM_CFG4_RESET_BUF_NUM_NO_PFC_S
, 240);
528 dsaf_write_dev(dsaf_dev
, reg
, o_sbm_bp_cfg
);
532 for (i
= 0; i
< DSAFV2_SBM_PPE_CHN
; i
++) {
533 reg
= DSAF_SBM_BP_CFG_2_PPE_REG_0_REG
+ 0x80 * i
;
534 o_sbm_bp_cfg
= dsaf_read_dev(dsaf_dev
, reg
);
535 dsaf_set_field(o_sbm_bp_cfg
,
536 DSAFV2_SBM_CFG2_PPE_SET_BUF_NUM_M
,
537 DSAFV2_SBM_CFG2_PPE_SET_BUF_NUM_S
, 2);
538 dsaf_set_field(o_sbm_bp_cfg
,
539 DSAFV2_SBM_CFG2_PPE_RESET_BUF_NUM_M
,
540 DSAFV2_SBM_CFG2_PPE_RESET_BUF_NUM_S
, 3);
541 dsaf_set_field(o_sbm_bp_cfg
,
542 DSAFV2_SBM_CFG2_PPE_CFG_USEFUL_NUM_M
,
543 DSAFV2_SBM_CFG2_PPE_CFG_USEFUL_NUM_S
, 52);
544 dsaf_write_dev(dsaf_dev
, reg
, o_sbm_bp_cfg
);
548 for (i
= 0; i
< DASFV2_ROCEE_CRD_NUM
; i
++) {
549 reg
= DSAFV2_SBM_BP_CFG_2_ROCEE_REG_0_REG
+ 0x80 * i
;
550 o_sbm_bp_cfg
= dsaf_read_dev(dsaf_dev
, reg
);
551 dsaf_set_field(o_sbm_bp_cfg
,
552 DSAFV2_SBM_CFG2_ROCEE_SET_BUF_NUM_M
,
553 DSAFV2_SBM_CFG2_ROCEE_SET_BUF_NUM_S
, 2);
554 dsaf_set_field(o_sbm_bp_cfg
,
555 DSAFV2_SBM_CFG2_ROCEE_RESET_BUF_NUM_M
,
556 DSAFV2_SBM_CFG2_ROCEE_RESET_BUF_NUM_S
, 4);
557 dsaf_write_dev(dsaf_dev
, reg
, o_sbm_bp_cfg
);
562 * hns_dsaf_voq_bp_all_thrd_cfg - voq
563 * @dsaf_id: dsa fabric id
565 static void hns_dsaf_voq_bp_all_thrd_cfg(struct dsaf_device
*dsaf_dev
)
570 for (i
= 0; i
< DSAF_VOQ_NUM
; i
++) {
571 voq_bp_all_thrd
= dsaf_read_dev(
572 dsaf_dev
, DSAF_VOQ_BP_ALL_THRD_0_REG
+ 0x40 * i
);
573 if (i
< DSAF_XGE_NUM
) {
574 dsaf_set_field(voq_bp_all_thrd
,
575 DSAF_VOQ_BP_ALL_DOWNTHRD_M
,
576 DSAF_VOQ_BP_ALL_DOWNTHRD_S
, 930);
577 dsaf_set_field(voq_bp_all_thrd
,
578 DSAF_VOQ_BP_ALL_UPTHRD_M
,
579 DSAF_VOQ_BP_ALL_UPTHRD_S
, 950);
581 dsaf_set_field(voq_bp_all_thrd
,
582 DSAF_VOQ_BP_ALL_DOWNTHRD_M
,
583 DSAF_VOQ_BP_ALL_DOWNTHRD_S
, 220);
584 dsaf_set_field(voq_bp_all_thrd
,
585 DSAF_VOQ_BP_ALL_UPTHRD_M
,
586 DSAF_VOQ_BP_ALL_UPTHRD_S
, 230);
589 dsaf_dev
, DSAF_VOQ_BP_ALL_THRD_0_REG
+ 0x40 * i
,
594 static void hns_dsaf_tbl_tcam_match_cfg(
595 struct dsaf_device
*dsaf_dev
,
596 struct dsaf_tbl_tcam_data
*ptbl_tcam_data
)
598 dsaf_write_dev(dsaf_dev
, DSAF_TBL_TCAM_MATCH_CFG_L_REG
,
599 ptbl_tcam_data
->tbl_tcam_data_low
);
600 dsaf_write_dev(dsaf_dev
, DSAF_TBL_TCAM_MATCH_CFG_H_REG
,
601 ptbl_tcam_data
->tbl_tcam_data_high
);
605 * hns_dsaf_tbl_tcam_data_cfg - tbl
606 * @dsaf_id: dsa fabric id
607 * @ptbl_tcam_data: addr
609 static void hns_dsaf_tbl_tcam_data_cfg(
610 struct dsaf_device
*dsaf_dev
,
611 struct dsaf_tbl_tcam_data
*ptbl_tcam_data
)
613 dsaf_write_dev(dsaf_dev
, DSAF_TBL_TCAM_LOW_0_REG
,
614 ptbl_tcam_data
->tbl_tcam_data_low
);
615 dsaf_write_dev(dsaf_dev
, DSAF_TBL_TCAM_HIGH_0_REG
,
616 ptbl_tcam_data
->tbl_tcam_data_high
);
620 * dsaf_tbl_tcam_mcast_cfg - tbl
621 * @dsaf_id: dsa fabric id
622 * @ptbl_tcam_mcast: addr
624 static void hns_dsaf_tbl_tcam_mcast_cfg(
625 struct dsaf_device
*dsaf_dev
,
626 struct dsaf_tbl_tcam_mcast_cfg
*mcast
)
630 mcast_cfg4
= dsaf_read_dev(dsaf_dev
, DSAF_TBL_TCAM_MCAST_CFG_4_0_REG
);
631 dsaf_set_bit(mcast_cfg4
, DSAF_TBL_MCAST_CFG4_ITEM_VLD_S
,
632 mcast
->tbl_mcast_item_vld
);
633 dsaf_set_bit(mcast_cfg4
, DSAF_TBL_MCAST_CFG4_OLD_EN_S
,
634 mcast
->tbl_mcast_old_en
);
635 dsaf_set_field(mcast_cfg4
, DSAF_TBL_MCAST_CFG4_VM128_112_M
,
636 DSAF_TBL_MCAST_CFG4_VM128_112_S
,
637 mcast
->tbl_mcast_port_msk
[4]);
638 dsaf_write_dev(dsaf_dev
, DSAF_TBL_TCAM_MCAST_CFG_4_0_REG
, mcast_cfg4
);
640 dsaf_write_dev(dsaf_dev
, DSAF_TBL_TCAM_MCAST_CFG_3_0_REG
,
641 mcast
->tbl_mcast_port_msk
[3]);
643 dsaf_write_dev(dsaf_dev
, DSAF_TBL_TCAM_MCAST_CFG_2_0_REG
,
644 mcast
->tbl_mcast_port_msk
[2]);
646 dsaf_write_dev(dsaf_dev
, DSAF_TBL_TCAM_MCAST_CFG_1_0_REG
,
647 mcast
->tbl_mcast_port_msk
[1]);
649 dsaf_write_dev(dsaf_dev
, DSAF_TBL_TCAM_MCAST_CFG_0_0_REG
,
650 mcast
->tbl_mcast_port_msk
[0]);
654 * hns_dsaf_tbl_tcam_ucast_cfg - tbl
655 * @dsaf_id: dsa fabric id
656 * @ptbl_tcam_ucast: addr
658 static void hns_dsaf_tbl_tcam_ucast_cfg(
659 struct dsaf_device
*dsaf_dev
,
660 struct dsaf_tbl_tcam_ucast_cfg
*tbl_tcam_ucast
)
664 ucast_cfg1
= dsaf_read_dev(dsaf_dev
, DSAF_TBL_TCAM_UCAST_CFG_0_REG
);
665 dsaf_set_bit(ucast_cfg1
, DSAF_TBL_UCAST_CFG1_MAC_DISCARD_S
,
666 tbl_tcam_ucast
->tbl_ucast_mac_discard
);
667 dsaf_set_bit(ucast_cfg1
, DSAF_TBL_UCAST_CFG1_ITEM_VLD_S
,
668 tbl_tcam_ucast
->tbl_ucast_item_vld
);
669 dsaf_set_bit(ucast_cfg1
, DSAF_TBL_UCAST_CFG1_OLD_EN_S
,
670 tbl_tcam_ucast
->tbl_ucast_old_en
);
671 dsaf_set_bit(ucast_cfg1
, DSAF_TBL_UCAST_CFG1_DVC_S
,
672 tbl_tcam_ucast
->tbl_ucast_dvc
);
673 dsaf_set_field(ucast_cfg1
, DSAF_TBL_UCAST_CFG1_OUT_PORT_M
,
674 DSAF_TBL_UCAST_CFG1_OUT_PORT_S
,
675 tbl_tcam_ucast
->tbl_ucast_out_port
);
676 dsaf_write_dev(dsaf_dev
, DSAF_TBL_TCAM_UCAST_CFG_0_REG
, ucast_cfg1
);
680 * hns_dsaf_tbl_line_cfg - tbl
681 * @dsaf_id: dsa fabric id
684 static void hns_dsaf_tbl_line_cfg(struct dsaf_device
*dsaf_dev
,
685 struct dsaf_tbl_line_cfg
*tbl_lin
)
689 tbl_line
= dsaf_read_dev(dsaf_dev
, DSAF_TBL_LIN_CFG_0_REG
);
690 dsaf_set_bit(tbl_line
, DSAF_TBL_LINE_CFG_MAC_DISCARD_S
,
691 tbl_lin
->tbl_line_mac_discard
);
692 dsaf_set_bit(tbl_line
, DSAF_TBL_LINE_CFG_DVC_S
,
693 tbl_lin
->tbl_line_dvc
);
694 dsaf_set_field(tbl_line
, DSAF_TBL_LINE_CFG_OUT_PORT_M
,
695 DSAF_TBL_LINE_CFG_OUT_PORT_S
,
696 tbl_lin
->tbl_line_out_port
);
697 dsaf_write_dev(dsaf_dev
, DSAF_TBL_LIN_CFG_0_REG
, tbl_line
);
701 * hns_dsaf_tbl_tcam_mcast_pul - tbl
702 * @dsaf_id: dsa fabric id
704 static void hns_dsaf_tbl_tcam_mcast_pul(struct dsaf_device
*dsaf_dev
)
708 o_tbl_pul
= dsaf_read_dev(dsaf_dev
, DSAF_TBL_PUL_0_REG
);
709 dsaf_set_bit(o_tbl_pul
, DSAF_TBL_PUL_MCAST_VLD_S
, 1);
710 dsaf_write_dev(dsaf_dev
, DSAF_TBL_PUL_0_REG
, o_tbl_pul
);
711 dsaf_set_bit(o_tbl_pul
, DSAF_TBL_PUL_MCAST_VLD_S
, 0);
712 dsaf_write_dev(dsaf_dev
, DSAF_TBL_PUL_0_REG
, o_tbl_pul
);
716 * hns_dsaf_tbl_line_pul - tbl
717 * @dsaf_id: dsa fabric id
719 static void hns_dsaf_tbl_line_pul(struct dsaf_device
*dsaf_dev
)
723 tbl_pul
= dsaf_read_dev(dsaf_dev
, DSAF_TBL_PUL_0_REG
);
724 dsaf_set_bit(tbl_pul
, DSAF_TBL_PUL_LINE_VLD_S
, 1);
725 dsaf_write_dev(dsaf_dev
, DSAF_TBL_PUL_0_REG
, tbl_pul
);
726 dsaf_set_bit(tbl_pul
, DSAF_TBL_PUL_LINE_VLD_S
, 0);
727 dsaf_write_dev(dsaf_dev
, DSAF_TBL_PUL_0_REG
, tbl_pul
);
731 * hns_dsaf_tbl_tcam_data_mcast_pul - tbl
732 * @dsaf_id: dsa fabric id
734 static void hns_dsaf_tbl_tcam_data_mcast_pul(
735 struct dsaf_device
*dsaf_dev
)
739 o_tbl_pul
= dsaf_read_dev(dsaf_dev
, DSAF_TBL_PUL_0_REG
);
740 dsaf_set_bit(o_tbl_pul
, DSAF_TBL_PUL_TCAM_DATA_VLD_S
, 1);
741 dsaf_set_bit(o_tbl_pul
, DSAF_TBL_PUL_MCAST_VLD_S
, 1);
742 dsaf_write_dev(dsaf_dev
, DSAF_TBL_PUL_0_REG
, o_tbl_pul
);
743 dsaf_set_bit(o_tbl_pul
, DSAF_TBL_PUL_TCAM_DATA_VLD_S
, 0);
744 dsaf_set_bit(o_tbl_pul
, DSAF_TBL_PUL_MCAST_VLD_S
, 0);
745 dsaf_write_dev(dsaf_dev
, DSAF_TBL_PUL_0_REG
, o_tbl_pul
);
749 * hns_dsaf_tbl_tcam_data_ucast_pul - tbl
750 * @dsaf_id: dsa fabric id
752 static void hns_dsaf_tbl_tcam_data_ucast_pul(
753 struct dsaf_device
*dsaf_dev
)
757 o_tbl_pul
= dsaf_read_dev(dsaf_dev
, DSAF_TBL_PUL_0_REG
);
758 dsaf_set_bit(o_tbl_pul
, DSAF_TBL_PUL_TCAM_DATA_VLD_S
, 1);
759 dsaf_set_bit(o_tbl_pul
, DSAF_TBL_PUL_UCAST_VLD_S
, 1);
760 dsaf_write_dev(dsaf_dev
, DSAF_TBL_PUL_0_REG
, o_tbl_pul
);
761 dsaf_set_bit(o_tbl_pul
, DSAF_TBL_PUL_TCAM_DATA_VLD_S
, 0);
762 dsaf_set_bit(o_tbl_pul
, DSAF_TBL_PUL_UCAST_VLD_S
, 0);
763 dsaf_write_dev(dsaf_dev
, DSAF_TBL_PUL_0_REG
, o_tbl_pul
);
766 void hns_dsaf_set_promisc_mode(struct dsaf_device
*dsaf_dev
, u32 en
)
768 if (AE_IS_VER1(dsaf_dev
->dsaf_ver
) && !HNS_DSAF_IS_DEBUG(dsaf_dev
))
769 dsaf_set_dev_bit(dsaf_dev
, DSAF_CFG_0_REG
,
770 DSAF_CFG_MIX_MODE_S
, !!en
);
774 * hns_dsaf_tbl_stat_en - tbl
775 * @dsaf_id: dsa fabric id
776 * @ptbl_stat_en: addr
778 static void hns_dsaf_tbl_stat_en(struct dsaf_device
*dsaf_dev
)
782 o_tbl_ctrl
= dsaf_read_dev(dsaf_dev
, DSAF_TBL_DFX_CTRL_0_REG
);
783 dsaf_set_bit(o_tbl_ctrl
, DSAF_TBL_DFX_LINE_LKUP_NUM_EN_S
, 1);
784 dsaf_set_bit(o_tbl_ctrl
, DSAF_TBL_DFX_UC_LKUP_NUM_EN_S
, 1);
785 dsaf_set_bit(o_tbl_ctrl
, DSAF_TBL_DFX_MC_LKUP_NUM_EN_S
, 1);
786 dsaf_set_bit(o_tbl_ctrl
, DSAF_TBL_DFX_BC_LKUP_NUM_EN_S
, 1);
787 dsaf_write_dev(dsaf_dev
, DSAF_TBL_DFX_CTRL_0_REG
, o_tbl_ctrl
);
791 * hns_dsaf_rocee_bp_en - rocee back press enable
792 * @dsaf_id: dsa fabric id
794 static void hns_dsaf_rocee_bp_en(struct dsaf_device
*dsaf_dev
)
796 if (AE_IS_VER1(dsaf_dev
->dsaf_ver
))
797 dsaf_set_dev_bit(dsaf_dev
, DSAF_XGE_CTRL_SIG_CFG_0_REG
,
798 DSAF_FC_XGE_TX_PAUSE_S
, 1);
801 /* set msk for dsaf exception irq*/
802 static void hns_dsaf_int_xge_msk_set(struct dsaf_device
*dsaf_dev
,
803 u32 chnn_num
, u32 mask_set
)
805 dsaf_write_dev(dsaf_dev
,
806 DSAF_XGE_INT_MSK_0_REG
+ 0x4 * chnn_num
, mask_set
);
809 static void hns_dsaf_int_ppe_msk_set(struct dsaf_device
*dsaf_dev
,
810 u32 chnn_num
, u32 msk_set
)
812 dsaf_write_dev(dsaf_dev
,
813 DSAF_PPE_INT_MSK_0_REG
+ 0x4 * chnn_num
, msk_set
);
816 static void hns_dsaf_int_rocee_msk_set(struct dsaf_device
*dsaf_dev
,
817 u32 chnn
, u32 msk_set
)
819 dsaf_write_dev(dsaf_dev
,
820 DSAF_ROCEE_INT_MSK_0_REG
+ 0x4 * chnn
, msk_set
);
824 hns_dsaf_int_tbl_msk_set(struct dsaf_device
*dsaf_dev
, u32 msk_set
)
826 dsaf_write_dev(dsaf_dev
, DSAF_TBL_INT_MSK_0_REG
, msk_set
);
829 /* clr dsaf exception irq*/
830 static void hns_dsaf_int_xge_src_clr(struct dsaf_device
*dsaf_dev
,
831 u32 chnn_num
, u32 int_src
)
833 dsaf_write_dev(dsaf_dev
,
834 DSAF_XGE_INT_SRC_0_REG
+ 0x4 * chnn_num
, int_src
);
837 static void hns_dsaf_int_ppe_src_clr(struct dsaf_device
*dsaf_dev
,
838 u32 chnn
, u32 int_src
)
840 dsaf_write_dev(dsaf_dev
,
841 DSAF_PPE_INT_SRC_0_REG
+ 0x4 * chnn
, int_src
);
844 static void hns_dsaf_int_rocee_src_clr(struct dsaf_device
*dsaf_dev
,
845 u32 chnn
, u32 int_src
)
847 dsaf_write_dev(dsaf_dev
,
848 DSAF_ROCEE_INT_SRC_0_REG
+ 0x4 * chnn
, int_src
);
851 static void hns_dsaf_int_tbl_src_clr(struct dsaf_device
*dsaf_dev
,
854 dsaf_write_dev(dsaf_dev
, DSAF_TBL_INT_SRC_0_REG
, int_src
);
858 * hns_dsaf_single_line_tbl_cfg - INT
859 * @dsaf_id: dsa fabric id
863 static void hns_dsaf_single_line_tbl_cfg(
864 struct dsaf_device
*dsaf_dev
,
865 u32 address
, struct dsaf_tbl_line_cfg
*ptbl_line
)
867 spin_lock_bh(&dsaf_dev
->tcam_lock
);
870 hns_dsaf_tbl_line_addr_cfg(dsaf_dev
, address
);
873 hns_dsaf_tbl_line_cfg(dsaf_dev
, ptbl_line
);
876 hns_dsaf_tbl_line_pul(dsaf_dev
);
878 spin_unlock_bh(&dsaf_dev
->tcam_lock
);
882 * hns_dsaf_tcam_uc_cfg - INT
883 * @dsaf_id: dsa fabric id
887 static void hns_dsaf_tcam_uc_cfg(
888 struct dsaf_device
*dsaf_dev
, u32 address
,
889 struct dsaf_tbl_tcam_data
*ptbl_tcam_data
,
890 struct dsaf_tbl_tcam_ucast_cfg
*ptbl_tcam_ucast
)
892 spin_lock_bh(&dsaf_dev
->tcam_lock
);
895 hns_dsaf_tbl_tcam_addr_cfg(dsaf_dev
, address
);
897 hns_dsaf_tbl_tcam_data_cfg(dsaf_dev
, ptbl_tcam_data
);
899 hns_dsaf_tbl_tcam_ucast_cfg(dsaf_dev
, ptbl_tcam_ucast
);
901 hns_dsaf_tbl_tcam_data_ucast_pul(dsaf_dev
);
903 spin_unlock_bh(&dsaf_dev
->tcam_lock
);
907 * hns_dsaf_tcam_mc_cfg - cfg the tcam for mc
908 * @dsaf_dev: dsa fabric device struct pointer
909 * @address: tcam index
910 * @ptbl_tcam_data: tcam data struct pointer
911 * @ptbl_tcam_mcast: tcam mask struct pointer, it must be null for HNSv1
913 static void hns_dsaf_tcam_mc_cfg(
914 struct dsaf_device
*dsaf_dev
, u32 address
,
915 struct dsaf_tbl_tcam_data
*ptbl_tcam_data
,
916 struct dsaf_tbl_tcam_data
*ptbl_tcam_mask
,
917 struct dsaf_tbl_tcam_mcast_cfg
*ptbl_tcam_mcast
)
919 spin_lock_bh(&dsaf_dev
->tcam_lock
);
922 hns_dsaf_tbl_tcam_addr_cfg(dsaf_dev
, address
);
924 hns_dsaf_tbl_tcam_data_cfg(dsaf_dev
, ptbl_tcam_data
);
926 hns_dsaf_tbl_tcam_mcast_cfg(dsaf_dev
, ptbl_tcam_mcast
);
927 /* Write Match Data */
929 hns_dsaf_tbl_tcam_match_cfg(dsaf_dev
, ptbl_tcam_mask
);
932 hns_dsaf_tbl_tcam_data_mcast_pul(dsaf_dev
);
934 spin_unlock_bh(&dsaf_dev
->tcam_lock
);
938 * hns_dsaf_tcam_mc_invld - INT
939 * @dsaf_id: dsa fabric id
942 static void hns_dsaf_tcam_mc_invld(struct dsaf_device
*dsaf_dev
, u32 address
)
944 spin_lock_bh(&dsaf_dev
->tcam_lock
);
947 hns_dsaf_tbl_tcam_addr_cfg(dsaf_dev
, address
);
950 dsaf_write_dev(dsaf_dev
, DSAF_TBL_TCAM_MCAST_CFG_0_0_REG
, 0);
951 dsaf_write_dev(dsaf_dev
, DSAF_TBL_TCAM_MCAST_CFG_1_0_REG
, 0);
952 dsaf_write_dev(dsaf_dev
, DSAF_TBL_TCAM_MCAST_CFG_2_0_REG
, 0);
953 dsaf_write_dev(dsaf_dev
, DSAF_TBL_TCAM_MCAST_CFG_3_0_REG
, 0);
954 dsaf_write_dev(dsaf_dev
, DSAF_TBL_TCAM_MCAST_CFG_4_0_REG
, 0);
957 hns_dsaf_tbl_tcam_mcast_pul(dsaf_dev
);
959 spin_unlock_bh(&dsaf_dev
->tcam_lock
);
962 void hns_dsaf_tcam_addr_get(struct dsaf_drv_tbl_tcam_key
*mac_key
, u8
*addr
)
964 addr
[0] = mac_key
->high
.bits
.mac_0
;
965 addr
[1] = mac_key
->high
.bits
.mac_1
;
966 addr
[2] = mac_key
->high
.bits
.mac_2
;
967 addr
[3] = mac_key
->high
.bits
.mac_3
;
968 addr
[4] = mac_key
->low
.bits
.mac_4
;
969 addr
[5] = mac_key
->low
.bits
.mac_5
;
973 * hns_dsaf_tcam_uc_get - INT
974 * @dsaf_id: dsa fabric id
979 static void hns_dsaf_tcam_uc_get(
980 struct dsaf_device
*dsaf_dev
, u32 address
,
981 struct dsaf_tbl_tcam_data
*ptbl_tcam_data
,
982 struct dsaf_tbl_tcam_ucast_cfg
*ptbl_tcam_ucast
)
987 spin_lock_bh(&dsaf_dev
->tcam_lock
);
990 hns_dsaf_tbl_tcam_addr_cfg(dsaf_dev
, address
);
992 /*read tcam item puls*/
993 hns_dsaf_tbl_tcam_load_pul(dsaf_dev
);
996 ptbl_tcam_data
->tbl_tcam_data_high
997 = dsaf_read_dev(dsaf_dev
, DSAF_TBL_TCAM_RDATA_HIGH_0_REG
);
998 ptbl_tcam_data
->tbl_tcam_data_low
999 = dsaf_read_dev(dsaf_dev
, DSAF_TBL_TCAM_RDATA_LOW_0_REG
);
1002 tcam_read_data0
= dsaf_read_dev(dsaf_dev
,
1003 DSAF_TBL_TCAM_RAM_RDATA0_0_REG
);
1004 tcam_read_data4
= dsaf_read_dev(dsaf_dev
,
1005 DSAF_TBL_TCAM_RAM_RDATA4_0_REG
);
1007 ptbl_tcam_ucast
->tbl_ucast_item_vld
1008 = dsaf_get_bit(tcam_read_data4
,
1009 DSAF_TBL_MCAST_CFG4_ITEM_VLD_S
);
1010 ptbl_tcam_ucast
->tbl_ucast_old_en
1011 = dsaf_get_bit(tcam_read_data4
, DSAF_TBL_MCAST_CFG4_OLD_EN_S
);
1012 ptbl_tcam_ucast
->tbl_ucast_mac_discard
1013 = dsaf_get_bit(tcam_read_data0
,
1014 DSAF_TBL_UCAST_CFG1_MAC_DISCARD_S
);
1015 ptbl_tcam_ucast
->tbl_ucast_out_port
1016 = dsaf_get_field(tcam_read_data0
,
1017 DSAF_TBL_UCAST_CFG1_OUT_PORT_M
,
1018 DSAF_TBL_UCAST_CFG1_OUT_PORT_S
);
1019 ptbl_tcam_ucast
->tbl_ucast_dvc
1020 = dsaf_get_bit(tcam_read_data0
, DSAF_TBL_UCAST_CFG1_DVC_S
);
1022 spin_unlock_bh(&dsaf_dev
->tcam_lock
);
1026 * hns_dsaf_tcam_mc_get - INT
1027 * @dsaf_id: dsa fabric id
1032 static void hns_dsaf_tcam_mc_get(
1033 struct dsaf_device
*dsaf_dev
, u32 address
,
1034 struct dsaf_tbl_tcam_data
*ptbl_tcam_data
,
1035 struct dsaf_tbl_tcam_mcast_cfg
*ptbl_tcam_mcast
)
1039 spin_lock_bh(&dsaf_dev
->tcam_lock
);
1042 hns_dsaf_tbl_tcam_addr_cfg(dsaf_dev
, address
);
1044 /*read tcam item puls*/
1045 hns_dsaf_tbl_tcam_load_pul(dsaf_dev
);
1048 ptbl_tcam_data
->tbl_tcam_data_high
=
1049 dsaf_read_dev(dsaf_dev
, DSAF_TBL_TCAM_RDATA_HIGH_0_REG
);
1050 ptbl_tcam_data
->tbl_tcam_data_low
=
1051 dsaf_read_dev(dsaf_dev
, DSAF_TBL_TCAM_RDATA_LOW_0_REG
);
1054 ptbl_tcam_mcast
->tbl_mcast_port_msk
[0] =
1055 dsaf_read_dev(dsaf_dev
, DSAF_TBL_TCAM_RAM_RDATA0_0_REG
);
1056 ptbl_tcam_mcast
->tbl_mcast_port_msk
[1] =
1057 dsaf_read_dev(dsaf_dev
, DSAF_TBL_TCAM_RAM_RDATA1_0_REG
);
1058 ptbl_tcam_mcast
->tbl_mcast_port_msk
[2] =
1059 dsaf_read_dev(dsaf_dev
, DSAF_TBL_TCAM_RAM_RDATA2_0_REG
);
1060 ptbl_tcam_mcast
->tbl_mcast_port_msk
[3] =
1061 dsaf_read_dev(dsaf_dev
, DSAF_TBL_TCAM_RAM_RDATA3_0_REG
);
1063 data_tmp
= dsaf_read_dev(dsaf_dev
, DSAF_TBL_TCAM_RAM_RDATA4_0_REG
);
1064 ptbl_tcam_mcast
->tbl_mcast_item_vld
=
1065 dsaf_get_bit(data_tmp
, DSAF_TBL_MCAST_CFG4_ITEM_VLD_S
);
1066 ptbl_tcam_mcast
->tbl_mcast_old_en
=
1067 dsaf_get_bit(data_tmp
, DSAF_TBL_MCAST_CFG4_OLD_EN_S
);
1068 ptbl_tcam_mcast
->tbl_mcast_port_msk
[4] =
1069 dsaf_get_field(data_tmp
, DSAF_TBL_MCAST_CFG4_VM128_112_M
,
1070 DSAF_TBL_MCAST_CFG4_VM128_112_S
);
1072 spin_unlock_bh(&dsaf_dev
->tcam_lock
);
1076 * hns_dsaf_tbl_line_init - INT
1077 * @dsaf_id: dsa fabric id
1079 static void hns_dsaf_tbl_line_init(struct dsaf_device
*dsaf_dev
)
1082 /* defaultly set all lineal mac table entry resulting discard */
1083 struct dsaf_tbl_line_cfg tbl_line
[] = {{1, 0, 0} };
1085 for (i
= 0; i
< DSAF_LINE_SUM
; i
++)
1086 hns_dsaf_single_line_tbl_cfg(dsaf_dev
, i
, tbl_line
);
1090 * hns_dsaf_tbl_tcam_init - INT
1091 * @dsaf_id: dsa fabric id
1093 static void hns_dsaf_tbl_tcam_init(struct dsaf_device
*dsaf_dev
)
1096 struct dsaf_tbl_tcam_data tcam_data
[] = {{0, 0} };
1097 struct dsaf_tbl_tcam_ucast_cfg tcam_ucast
[] = {{0, 0, 0, 0, 0} };
1100 for (i
= 0; i
< DSAF_TCAM_SUM
; i
++)
1101 hns_dsaf_tcam_uc_cfg(dsaf_dev
, i
, tcam_data
, tcam_ucast
);
1105 * hns_dsaf_pfc_en_cfg - dsaf pfc pause cfg
1106 * @mac_cb: mac contrl block
1108 static void hns_dsaf_pfc_en_cfg(struct dsaf_device
*dsaf_dev
,
1109 int mac_id
, int tc_en
)
1111 dsaf_write_dev(dsaf_dev
, DSAF_PFC_EN_0_REG
+ mac_id
* 4, tc_en
);
1114 static void hns_dsaf_set_pfc_pause(struct dsaf_device
*dsaf_dev
,
1115 int mac_id
, int tx_en
, int rx_en
)
1117 if (AE_IS_VER1(dsaf_dev
->dsaf_ver
)) {
1118 if (!tx_en
|| !rx_en
)
1119 dev_err(dsaf_dev
->dev
, "dsaf v1 can not close pfc!\n");
1124 dsaf_set_dev_bit(dsaf_dev
, DSAF_PAUSE_CFG_REG
+ mac_id
* 4,
1125 DSAF_PFC_PAUSE_RX_EN_B
, !!rx_en
);
1126 dsaf_set_dev_bit(dsaf_dev
, DSAF_PAUSE_CFG_REG
+ mac_id
* 4,
1127 DSAF_PFC_PAUSE_TX_EN_B
, !!tx_en
);
1130 int hns_dsaf_set_rx_mac_pause_en(struct dsaf_device
*dsaf_dev
, int mac_id
,
1133 if (AE_IS_VER1(dsaf_dev
->dsaf_ver
)) {
1135 dev_err(dsaf_dev
->dev
, "dsafv1 can't close rx_pause!\n");
1140 dsaf_set_dev_bit(dsaf_dev
, DSAF_PAUSE_CFG_REG
+ mac_id
* 4,
1141 DSAF_MAC_PAUSE_RX_EN_B
, !!en
);
1146 void hns_dsaf_get_rx_mac_pause_en(struct dsaf_device
*dsaf_dev
, int mac_id
,
1149 if (AE_IS_VER1(dsaf_dev
->dsaf_ver
))
1152 *en
= dsaf_get_dev_bit(dsaf_dev
,
1153 DSAF_PAUSE_CFG_REG
+ mac_id
* 4,
1154 DSAF_MAC_PAUSE_RX_EN_B
);
1158 * hns_dsaf_tbl_tcam_init - INT
1159 * @dsaf_id: dsa fabric id
1162 static void hns_dsaf_comm_init(struct dsaf_device
*dsaf_dev
)
1166 bool is_ver1
= AE_IS_VER1(dsaf_dev
->dsaf_ver
);
1168 o_dsaf_cfg
= dsaf_read_dev(dsaf_dev
, DSAF_CFG_0_REG
);
1169 dsaf_set_bit(o_dsaf_cfg
, DSAF_CFG_EN_S
, dsaf_dev
->dsaf_en
);
1170 dsaf_set_bit(o_dsaf_cfg
, DSAF_CFG_TC_MODE_S
, dsaf_dev
->dsaf_tc_mode
);
1171 dsaf_set_bit(o_dsaf_cfg
, DSAF_CFG_CRC_EN_S
, 0);
1172 dsaf_set_bit(o_dsaf_cfg
, DSAF_CFG_MIX_MODE_S
, 0);
1173 dsaf_set_bit(o_dsaf_cfg
, DSAF_CFG_LOCA_ADDR_EN_S
, 0);
1174 dsaf_write_dev(dsaf_dev
, DSAF_CFG_0_REG
, o_dsaf_cfg
);
1176 hns_dsaf_reg_cnt_clr_ce(dsaf_dev
, 1);
1177 hns_dsaf_stp_port_type_cfg(dsaf_dev
, DSAF_STP_PORT_TYPE_FORWARD
);
1179 /* set 22 queue per tx ppe engine, only used in switch mode */
1180 hns_dsaf_ppe_qid_cfg(dsaf_dev
, DSAF_DEFAUTL_QUEUE_NUM_PER_PPE
);
1182 /* set promisc def queue id */
1183 hns_dsaf_mix_def_qid_cfg(dsaf_dev
);
1185 /* set inner loopback queue id */
1186 hns_dsaf_inner_qid_cfg(dsaf_dev
);
1188 /* in non switch mode, set all port to access mode */
1189 hns_dsaf_sw_port_type_cfg(dsaf_dev
, DSAF_SW_PORT_TYPE_NON_VLAN
);
1191 /*set dsaf pfc to 0 for parseing rx pause*/
1192 for (i
= 0; i
< DSAF_COMM_CHN
; i
++) {
1193 hns_dsaf_pfc_en_cfg(dsaf_dev
, i
, 0);
1194 hns_dsaf_set_pfc_pause(dsaf_dev
, i
, is_ver1
, is_ver1
);
1197 /*msk and clr exception irqs */
1198 for (i
= 0; i
< DSAF_COMM_CHN
; i
++) {
1199 hns_dsaf_int_xge_src_clr(dsaf_dev
, i
, 0xfffffffful
);
1200 hns_dsaf_int_ppe_src_clr(dsaf_dev
, i
, 0xfffffffful
);
1201 hns_dsaf_int_rocee_src_clr(dsaf_dev
, i
, 0xfffffffful
);
1203 hns_dsaf_int_xge_msk_set(dsaf_dev
, i
, 0xfffffffful
);
1204 hns_dsaf_int_ppe_msk_set(dsaf_dev
, i
, 0xfffffffful
);
1205 hns_dsaf_int_rocee_msk_set(dsaf_dev
, i
, 0xfffffffful
);
1207 hns_dsaf_int_tbl_src_clr(dsaf_dev
, 0xfffffffful
);
1208 hns_dsaf_int_tbl_msk_set(dsaf_dev
, 0xfffffffful
);
1212 * hns_dsaf_inode_init - INT
1213 * @dsaf_id: dsa fabric id
1215 static void hns_dsaf_inode_init(struct dsaf_device
*dsaf_dev
)
1221 if (dsaf_dev
->dsaf_tc_mode
== HRD_DSAF_4TC_MODE
)
1222 tc_cfg
= HNS_DSAF_I4TC_CFG
;
1224 tc_cfg
= HNS_DSAF_I8TC_CFG
;
1226 if (AE_IS_VER1(dsaf_dev
->dsaf_ver
)) {
1227 for (i
= 0; i
< DSAF_INODE_NUM
; i
++) {
1228 reg
= DSAF_INODE_IN_PORT_NUM_0_REG
+ 0x80 * i
;
1229 dsaf_set_dev_field(dsaf_dev
, reg
,
1230 DSAF_INODE_IN_PORT_NUM_M
,
1231 DSAF_INODE_IN_PORT_NUM_S
,
1235 for (i
= 0; i
< DSAF_PORT_TYPE_NUM
; i
++) {
1236 reg
= DSAF_INODE_IN_PORT_NUM_0_REG
+ 0x80 * i
;
1237 dsaf_set_dev_field(dsaf_dev
, reg
,
1238 DSAF_INODE_IN_PORT_NUM_M
,
1239 DSAF_INODE_IN_PORT_NUM_S
, 0);
1240 dsaf_set_dev_field(dsaf_dev
, reg
,
1241 DSAFV2_INODE_IN_PORT1_NUM_M
,
1242 DSAFV2_INODE_IN_PORT1_NUM_S
, 1);
1243 dsaf_set_dev_field(dsaf_dev
, reg
,
1244 DSAFV2_INODE_IN_PORT2_NUM_M
,
1245 DSAFV2_INODE_IN_PORT2_NUM_S
, 2);
1246 dsaf_set_dev_field(dsaf_dev
, reg
,
1247 DSAFV2_INODE_IN_PORT3_NUM_M
,
1248 DSAFV2_INODE_IN_PORT3_NUM_S
, 3);
1249 dsaf_set_dev_field(dsaf_dev
, reg
,
1250 DSAFV2_INODE_IN_PORT4_NUM_M
,
1251 DSAFV2_INODE_IN_PORT4_NUM_S
, 4);
1252 dsaf_set_dev_field(dsaf_dev
, reg
,
1253 DSAFV2_INODE_IN_PORT5_NUM_M
,
1254 DSAFV2_INODE_IN_PORT5_NUM_S
, 5);
1257 for (i
= 0; i
< DSAF_INODE_NUM
; i
++) {
1258 reg
= DSAF_INODE_PRI_TC_CFG_0_REG
+ 0x80 * i
;
1259 dsaf_write_dev(dsaf_dev
, reg
, tc_cfg
);
1264 * hns_dsaf_sbm_init - INT
1265 * @dsaf_id: dsa fabric id
1267 static int hns_dsaf_sbm_init(struct dsaf_device
*dsaf_dev
)
1274 if (AE_IS_VER1(dsaf_dev
->dsaf_ver
)) {
1275 hns_dsaf_sbm_bp_wl_cfg(dsaf_dev
);
1276 finish_msk
= DSAF_SRAM_INIT_OVER_M
;
1278 hns_dsafv2_sbm_bp_wl_cfg(dsaf_dev
);
1279 finish_msk
= DSAFV2_SRAM_INIT_OVER_M
;
1282 /* enable sbm chanel, disable sbm chanel shcut function*/
1283 hns_dsaf_sbm_cfg(dsaf_dev
);
1285 /* enable sbm mib */
1286 ret
= hns_dsaf_sbm_cfg_mib_en(dsaf_dev
);
1288 dev_err(dsaf_dev
->dev
,
1289 "hns_dsaf_sbm_cfg_mib_en fail,%s, ret=%d\n",
1290 dsaf_dev
->ae_dev
.name
, ret
);
1294 /* enable sbm initial link sram */
1295 hns_dsaf_sbm_link_sram_init_en(dsaf_dev
);
1298 usleep_range(200, 210);/*udelay(200);*/
1299 flag
= dsaf_get_dev_field(dsaf_dev
, DSAF_SRAM_INIT_OVER_0_REG
,
1300 finish_msk
, DSAF_SRAM_INIT_OVER_S
);
1302 } while (flag
!= (finish_msk
>> DSAF_SRAM_INIT_OVER_S
) &&
1303 cnt
< DSAF_CFG_READ_CNT
);
1305 if (flag
!= (finish_msk
>> DSAF_SRAM_INIT_OVER_S
)) {
1306 dev_err(dsaf_dev
->dev
,
1307 "hns_dsaf_sbm_init fail %s, flag=%d, cnt=%d\n",
1308 dsaf_dev
->ae_dev
.name
, flag
, cnt
);
1312 hns_dsaf_rocee_bp_en(dsaf_dev
);
1318 * hns_dsaf_tbl_init - INT
1319 * @dsaf_id: dsa fabric id
1321 static void hns_dsaf_tbl_init(struct dsaf_device
*dsaf_dev
)
1323 hns_dsaf_tbl_stat_en(dsaf_dev
);
1325 hns_dsaf_tbl_tcam_init(dsaf_dev
);
1326 hns_dsaf_tbl_line_init(dsaf_dev
);
1330 * hns_dsaf_voq_init - INT
1331 * @dsaf_id: dsa fabric id
1333 static void hns_dsaf_voq_init(struct dsaf_device
*dsaf_dev
)
1335 hns_dsaf_voq_bp_all_thrd_cfg(dsaf_dev
);
1339 * hns_dsaf_init_hw - init dsa fabric hardware
1340 * @dsaf_dev: dsa fabric device struct pointer
1342 static int hns_dsaf_init_hw(struct dsaf_device
*dsaf_dev
)
1346 dev_dbg(dsaf_dev
->dev
,
1347 "hns_dsaf_init_hw begin %s !\n", dsaf_dev
->ae_dev
.name
);
1349 dsaf_dev
->misc_op
->dsaf_reset(dsaf_dev
, 0);
1351 dsaf_dev
->misc_op
->dsaf_reset(dsaf_dev
, 1);
1353 hns_dsaf_comm_init(dsaf_dev
);
1356 hns_dsaf_inode_init(dsaf_dev
);
1359 ret
= hns_dsaf_sbm_init(dsaf_dev
);
1364 hns_dsaf_tbl_init(dsaf_dev
);
1367 hns_dsaf_voq_init(dsaf_dev
);
1373 * hns_dsaf_remove_hw - uninit dsa fabric hardware
1374 * @dsaf_dev: dsa fabric device struct pointer
1376 static void hns_dsaf_remove_hw(struct dsaf_device
*dsaf_dev
)
1379 dsaf_dev
->misc_op
->dsaf_reset(dsaf_dev
, 0);
1383 * hns_dsaf_init - init dsa fabric
1384 * @dsaf_dev: dsa fabric device struct pointer
1385 * retuen 0 - success , negative --fail
1387 static int hns_dsaf_init(struct dsaf_device
*dsaf_dev
)
1389 struct dsaf_drv_priv
*priv
=
1390 (struct dsaf_drv_priv
*)hns_dsaf_dev_priv(dsaf_dev
);
1394 if (HNS_DSAF_IS_DEBUG(dsaf_dev
))
1397 if (AE_IS_VER1(dsaf_dev
->dsaf_ver
))
1398 dsaf_dev
->tcam_max_num
= DSAF_TCAM_SUM
;
1400 dsaf_dev
->tcam_max_num
=
1401 DSAF_TCAM_SUM
- DSAFV2_MAC_FUZZY_TCAM_NUM
;
1403 spin_lock_init(&dsaf_dev
->tcam_lock
);
1404 ret
= hns_dsaf_init_hw(dsaf_dev
);
1408 /* malloc mem for tcam mac key(vlan+mac) */
1409 priv
->soft_mac_tbl
= vzalloc(sizeof(*priv
->soft_mac_tbl
)
1411 if (!priv
->soft_mac_tbl
) {
1416 /*all entry invall */
1417 for (i
= 0; i
< DSAF_TCAM_SUM
; i
++)
1418 (priv
->soft_mac_tbl
+ i
)->index
= DSAF_INVALID_ENTRY_IDX
;
1423 hns_dsaf_remove_hw(dsaf_dev
);
1428 * hns_dsaf_free - free dsa fabric
1429 * @dsaf_dev: dsa fabric device struct pointer
1431 static void hns_dsaf_free(struct dsaf_device
*dsaf_dev
)
1433 struct dsaf_drv_priv
*priv
=
1434 (struct dsaf_drv_priv
*)hns_dsaf_dev_priv(dsaf_dev
);
1436 hns_dsaf_remove_hw(dsaf_dev
);
1438 /* free all mac mem */
1439 vfree(priv
->soft_mac_tbl
);
1440 priv
->soft_mac_tbl
= NULL
;
1444 * hns_dsaf_find_soft_mac_entry - find dsa fabric soft entry
1445 * @dsaf_dev: dsa fabric device struct pointer
1446 * @mac_key: mac entry struct pointer
1448 static u16
hns_dsaf_find_soft_mac_entry(
1449 struct dsaf_device
*dsaf_dev
,
1450 struct dsaf_drv_tbl_tcam_key
*mac_key
)
1452 struct dsaf_drv_priv
*priv
=
1453 (struct dsaf_drv_priv
*)hns_dsaf_dev_priv(dsaf_dev
);
1454 struct dsaf_drv_soft_mac_tbl
*soft_mac_entry
;
1457 soft_mac_entry
= priv
->soft_mac_tbl
;
1458 for (i
= 0; i
< dsaf_dev
->tcam_max_num
; i
++) {
1459 /* invall tab entry */
1460 if ((soft_mac_entry
->index
!= DSAF_INVALID_ENTRY_IDX
) &&
1461 (soft_mac_entry
->tcam_key
.high
.val
== mac_key
->high
.val
) &&
1462 (soft_mac_entry
->tcam_key
.low
.val
== mac_key
->low
.val
))
1463 /* return find result --soft index */
1464 return soft_mac_entry
->index
;
1468 return DSAF_INVALID_ENTRY_IDX
;
1472 * hns_dsaf_find_empty_mac_entry - search dsa fabric soft empty-entry
1473 * @dsaf_dev: dsa fabric device struct pointer
1475 static u16
hns_dsaf_find_empty_mac_entry(struct dsaf_device
*dsaf_dev
)
1477 struct dsaf_drv_priv
*priv
=
1478 (struct dsaf_drv_priv
*)hns_dsaf_dev_priv(dsaf_dev
);
1479 struct dsaf_drv_soft_mac_tbl
*soft_mac_entry
;
1482 soft_mac_entry
= priv
->soft_mac_tbl
;
1483 for (i
= 0; i
< dsaf_dev
->tcam_max_num
; i
++) {
1485 if (soft_mac_entry
->index
== DSAF_INVALID_ENTRY_IDX
)
1486 /* return find result --soft index */
1491 return DSAF_INVALID_ENTRY_IDX
;
1495 * hns_dsaf_set_mac_key - set mac key
1496 * @dsaf_dev: dsa fabric device struct pointer
1497 * @mac_key: tcam key pointer
1499 * @in_port_num: input port num
1502 static void hns_dsaf_set_mac_key(
1503 struct dsaf_device
*dsaf_dev
,
1504 struct dsaf_drv_tbl_tcam_key
*mac_key
, u16 vlan_id
, u8 in_port_num
,
1509 if (dsaf_dev
->dsaf_mode
<= DSAF_MODE_ENABLE
)
1510 /*DSAF mode : in port id fixed 0*/
1516 mac_key
->high
.bits
.mac_0
= addr
[0];
1517 mac_key
->high
.bits
.mac_1
= addr
[1];
1518 mac_key
->high
.bits
.mac_2
= addr
[2];
1519 mac_key
->high
.bits
.mac_3
= addr
[3];
1520 mac_key
->low
.bits
.mac_4
= addr
[4];
1521 mac_key
->low
.bits
.mac_5
= addr
[5];
1522 mac_key
->low
.bits
.port_vlan
= 0;
1523 dsaf_set_field(mac_key
->low
.bits
.port_vlan
, DSAF_TBL_TCAM_KEY_VLAN_M
,
1524 DSAF_TBL_TCAM_KEY_VLAN_S
, vlan_id
);
1525 dsaf_set_field(mac_key
->low
.bits
.port_vlan
, DSAF_TBL_TCAM_KEY_PORT_M
,
1526 DSAF_TBL_TCAM_KEY_PORT_S
, port
);
1528 mac_key
->low
.bits
.port_vlan
= le16_to_cpu(mac_key
->low
.bits
.port_vlan
);
1532 * hns_dsaf_set_mac_uc_entry - set mac uc-entry
1533 * @dsaf_dev: dsa fabric device struct pointer
1534 * @mac_entry: uc-mac entry
1536 int hns_dsaf_set_mac_uc_entry(
1537 struct dsaf_device
*dsaf_dev
,
1538 struct dsaf_drv_mac_single_dest_entry
*mac_entry
)
1540 u16 entry_index
= DSAF_INVALID_ENTRY_IDX
;
1541 struct dsaf_drv_tbl_tcam_key mac_key
;
1542 struct dsaf_tbl_tcam_ucast_cfg mac_data
;
1543 struct dsaf_drv_priv
*priv
=
1544 (struct dsaf_drv_priv
*)hns_dsaf_dev_priv(dsaf_dev
);
1545 struct dsaf_drv_soft_mac_tbl
*soft_mac_entry
= priv
->soft_mac_tbl
;
1546 struct dsaf_tbl_tcam_data tcam_data
;
1548 /* mac addr check */
1549 if (MAC_IS_ALL_ZEROS(mac_entry
->addr
) ||
1550 MAC_IS_BROADCAST(mac_entry
->addr
) ||
1551 MAC_IS_MULTICAST(mac_entry
->addr
)) {
1552 dev_err(dsaf_dev
->dev
, "set_uc %s Mac %pM err!\n",
1553 dsaf_dev
->ae_dev
.name
, mac_entry
->addr
);
1558 hns_dsaf_set_mac_key(dsaf_dev
, &mac_key
, mac_entry
->in_vlan_id
,
1559 mac_entry
->in_port_num
, mac_entry
->addr
);
1561 /* entry ie exist? */
1562 entry_index
= hns_dsaf_find_soft_mac_entry(dsaf_dev
, &mac_key
);
1563 if (entry_index
== DSAF_INVALID_ENTRY_IDX
) {
1564 /*if has not inv entry,find a empty entry */
1565 entry_index
= hns_dsaf_find_empty_mac_entry(dsaf_dev
);
1566 if (entry_index
== DSAF_INVALID_ENTRY_IDX
) {
1567 /* has not empty,return error */
1568 dev_err(dsaf_dev
->dev
,
1569 "set_uc_entry failed, %s Mac key(%#x:%#x)\n",
1570 dsaf_dev
->ae_dev
.name
,
1571 mac_key
.high
.val
, mac_key
.low
.val
);
1576 dev_dbg(dsaf_dev
->dev
,
1577 "set_uc_entry, %s Mac key(%#x:%#x) entry_index%d\n",
1578 dsaf_dev
->ae_dev
.name
, mac_key
.high
.val
,
1579 mac_key
.low
.val
, entry_index
);
1581 /* config hardware entry */
1582 mac_data
.tbl_ucast_item_vld
= 1;
1583 mac_data
.tbl_ucast_mac_discard
= 0;
1584 mac_data
.tbl_ucast_old_en
= 0;
1585 /* default config dvc to 0 */
1586 mac_data
.tbl_ucast_dvc
= 0;
1587 mac_data
.tbl_ucast_out_port
= mac_entry
->port_num
;
1588 tcam_data
.tbl_tcam_data_high
= cpu_to_le32(mac_key
.high
.val
);
1589 tcam_data
.tbl_tcam_data_low
= cpu_to_le32(mac_key
.low
.val
);
1591 hns_dsaf_tcam_uc_cfg(dsaf_dev
, entry_index
, &tcam_data
, &mac_data
);
1593 /* config software entry */
1594 soft_mac_entry
+= entry_index
;
1595 soft_mac_entry
->index
= entry_index
;
1596 soft_mac_entry
->tcam_key
.high
.val
= mac_key
.high
.val
;
1597 soft_mac_entry
->tcam_key
.low
.val
= mac_key
.low
.val
;
1602 int hns_dsaf_rm_mac_addr(
1603 struct dsaf_device
*dsaf_dev
,
1604 struct dsaf_drv_mac_single_dest_entry
*mac_entry
)
1606 u16 entry_index
= DSAF_INVALID_ENTRY_IDX
;
1607 struct dsaf_tbl_tcam_ucast_cfg mac_data
;
1608 struct dsaf_drv_tbl_tcam_key mac_key
;
1610 /* mac addr check */
1611 if (!is_valid_ether_addr(mac_entry
->addr
)) {
1612 dev_err(dsaf_dev
->dev
, "rm_uc_addr %s Mac %pM err!\n",
1613 dsaf_dev
->ae_dev
.name
, mac_entry
->addr
);
1618 hns_dsaf_set_mac_key(dsaf_dev
, &mac_key
, mac_entry
->in_vlan_id
,
1619 mac_entry
->in_port_num
, mac_entry
->addr
);
1621 entry_index
= hns_dsaf_find_soft_mac_entry(dsaf_dev
, &mac_key
);
1622 if (entry_index
== DSAF_INVALID_ENTRY_IDX
) {
1623 /* can not find the tcam entry, return 0 */
1624 dev_info(dsaf_dev
->dev
,
1625 "rm_uc_addr no tcam, %s Mac key(%#x:%#x)\n",
1626 dsaf_dev
->ae_dev
.name
,
1627 mac_key
.high
.val
, mac_key
.low
.val
);
1631 dev_dbg(dsaf_dev
->dev
,
1632 "rm_uc_addr, %s Mac key(%#x:%#x) entry_index%d\n",
1633 dsaf_dev
->ae_dev
.name
, mac_key
.high
.val
,
1634 mac_key
.low
.val
, entry_index
);
1636 hns_dsaf_tcam_uc_get(
1637 dsaf_dev
, entry_index
,
1638 (struct dsaf_tbl_tcam_data
*)&mac_key
,
1641 /* unicast entry not used locally should not clear */
1642 if (mac_entry
->port_num
!= mac_data
.tbl_ucast_out_port
)
1645 return hns_dsaf_del_mac_entry(dsaf_dev
,
1646 mac_entry
->in_vlan_id
,
1647 mac_entry
->in_port_num
,
1652 * hns_dsaf_set_mac_mc_entry - set mac mc-entry
1653 * @dsaf_dev: dsa fabric device struct pointer
1654 * @mac_entry: mc-mac entry
1656 int hns_dsaf_set_mac_mc_entry(
1657 struct dsaf_device
*dsaf_dev
,
1658 struct dsaf_drv_mac_multi_dest_entry
*mac_entry
)
1660 u16 entry_index
= DSAF_INVALID_ENTRY_IDX
;
1661 struct dsaf_drv_tbl_tcam_key mac_key
;
1662 struct dsaf_tbl_tcam_mcast_cfg mac_data
;
1663 struct dsaf_drv_priv
*priv
=
1664 (struct dsaf_drv_priv
*)hns_dsaf_dev_priv(dsaf_dev
);
1665 struct dsaf_drv_soft_mac_tbl
*soft_mac_entry
= priv
->soft_mac_tbl
;
1666 struct dsaf_drv_tbl_tcam_key tmp_mac_key
;
1667 struct dsaf_tbl_tcam_data tcam_data
;
1669 /* mac addr check */
1670 if (MAC_IS_ALL_ZEROS(mac_entry
->addr
)) {
1671 dev_err(dsaf_dev
->dev
, "set uc %s Mac %pM err!\n",
1672 dsaf_dev
->ae_dev
.name
, mac_entry
->addr
);
1677 hns_dsaf_set_mac_key(dsaf_dev
, &mac_key
,
1678 mac_entry
->in_vlan_id
,
1679 mac_entry
->in_port_num
, mac_entry
->addr
);
1681 /* entry ie exist? */
1682 entry_index
= hns_dsaf_find_soft_mac_entry(dsaf_dev
, &mac_key
);
1683 if (entry_index
== DSAF_INVALID_ENTRY_IDX
) {
1684 /*if hasnot, find enpty entry*/
1685 entry_index
= hns_dsaf_find_empty_mac_entry(dsaf_dev
);
1686 if (entry_index
== DSAF_INVALID_ENTRY_IDX
) {
1687 /*if hasnot empty, error*/
1688 dev_err(dsaf_dev
->dev
,
1689 "set_uc_entry failed, %s Mac key(%#x:%#x)\n",
1690 dsaf_dev
->ae_dev
.name
,
1691 mac_key
.high
.val
, mac_key
.low
.val
);
1695 /* config hardware entry */
1696 memset(mac_data
.tbl_mcast_port_msk
,
1697 0, sizeof(mac_data
.tbl_mcast_port_msk
));
1699 /* config hardware entry */
1700 hns_dsaf_tcam_mc_get(dsaf_dev
, entry_index
, &tcam_data
,
1703 tmp_mac_key
.high
.val
=
1704 le32_to_cpu(tcam_data
.tbl_tcam_data_high
);
1705 tmp_mac_key
.low
.val
= le32_to_cpu(tcam_data
.tbl_tcam_data_low
);
1707 mac_data
.tbl_mcast_old_en
= 0;
1708 mac_data
.tbl_mcast_item_vld
= 1;
1709 dsaf_set_field(mac_data
.tbl_mcast_port_msk
[0],
1710 0x3F, 0, mac_entry
->port_mask
[0]);
1712 dev_dbg(dsaf_dev
->dev
,
1713 "set_uc_entry, %s key(%#x:%#x) entry_index%d\n",
1714 dsaf_dev
->ae_dev
.name
, mac_key
.high
.val
,
1715 mac_key
.low
.val
, entry_index
);
1717 tcam_data
.tbl_tcam_data_high
= cpu_to_le32(mac_key
.high
.val
);
1718 tcam_data
.tbl_tcam_data_low
= cpu_to_le32(mac_key
.low
.val
);
1720 hns_dsaf_tcam_mc_cfg(dsaf_dev
, entry_index
, &tcam_data
, NULL
,
1723 /* config software entry */
1724 soft_mac_entry
+= entry_index
;
1725 soft_mac_entry
->index
= entry_index
;
1726 soft_mac_entry
->tcam_key
.high
.val
= mac_key
.high
.val
;
1727 soft_mac_entry
->tcam_key
.low
.val
= mac_key
.low
.val
;
1732 static void hns_dsaf_mc_mask_bit_clear(char *dst
, const char *src
)
1734 u16
*a
= (u16
*)dst
;
1735 const u16
*b
= (const u16
*)src
;
1743 * hns_dsaf_add_mac_mc_port - add mac mc-port
1744 * @dsaf_dev: dsa fabric device struct pointer
1745 * @mac_entry: mc-mac entry
1747 int hns_dsaf_add_mac_mc_port(struct dsaf_device
*dsaf_dev
,
1748 struct dsaf_drv_mac_single_dest_entry
*mac_entry
)
1750 u16 entry_index
= DSAF_INVALID_ENTRY_IDX
;
1751 struct dsaf_drv_tbl_tcam_key mac_key
;
1752 struct dsaf_drv_tbl_tcam_key mask_key
;
1753 struct dsaf_tbl_tcam_data
*pmask_key
= NULL
;
1754 struct dsaf_tbl_tcam_mcast_cfg mac_data
;
1755 struct dsaf_drv_priv
*priv
= hns_dsaf_dev_priv(dsaf_dev
);
1756 struct dsaf_drv_soft_mac_tbl
*soft_mac_entry
= priv
->soft_mac_tbl
;
1757 struct dsaf_drv_tbl_tcam_key tmp_mac_key
;
1758 struct dsaf_tbl_tcam_data tcam_data
;
1759 u8 mc_addr
[ETH_ALEN
];
1763 /*chechk mac addr */
1764 if (MAC_IS_ALL_ZEROS(mac_entry
->addr
)) {
1765 dev_err(dsaf_dev
->dev
, "set_entry failed,addr %pM!\n",
1770 ether_addr_copy(mc_addr
, mac_entry
->addr
);
1771 mc_mask
= dsaf_dev
->mac_cb
[mac_entry
->in_port_num
]->mc_mask
;
1772 if (!AE_IS_VER1(dsaf_dev
->dsaf_ver
)) {
1773 /* prepare for key data setting */
1774 hns_dsaf_mc_mask_bit_clear(mc_addr
, mc_mask
);
1776 /* config key mask */
1777 hns_dsaf_set_mac_key(dsaf_dev
, &mask_key
,
1782 mask_key
.high
.val
= le32_to_cpu(mask_key
.high
.val
);
1783 mask_key
.low
.val
= le32_to_cpu(mask_key
.low
.val
);
1785 pmask_key
= (struct dsaf_tbl_tcam_data
*)(&mask_key
);
1789 hns_dsaf_set_mac_key(
1790 dsaf_dev
, &mac_key
, mac_entry
->in_vlan_id
,
1791 mac_entry
->in_port_num
, mc_addr
);
1793 memset(&mac_data
, 0, sizeof(struct dsaf_tbl_tcam_mcast_cfg
));
1795 /* check if the tcam is exist */
1796 entry_index
= hns_dsaf_find_soft_mac_entry(dsaf_dev
, &mac_key
);
1797 if (entry_index
== DSAF_INVALID_ENTRY_IDX
) {
1798 /*if hasnot , find a empty*/
1799 entry_index
= hns_dsaf_find_empty_mac_entry(dsaf_dev
);
1800 if (entry_index
== DSAF_INVALID_ENTRY_IDX
) {
1801 /*if hasnot empty, error*/
1802 dev_err(dsaf_dev
->dev
,
1803 "set_uc_entry failed, %s Mac key(%#x:%#x)\n",
1804 dsaf_dev
->ae_dev
.name
, mac_key
.high
.val
,
1809 /* if exist, add in */
1810 hns_dsaf_tcam_mc_get(dsaf_dev
, entry_index
, &tcam_data
,
1813 tmp_mac_key
.high
.val
=
1814 le32_to_cpu(tcam_data
.tbl_tcam_data_high
);
1815 tmp_mac_key
.low
.val
= le32_to_cpu(tcam_data
.tbl_tcam_data_low
);
1818 /* config hardware entry */
1819 if (mac_entry
->port_num
< DSAF_SERVICE_NW_NUM
) {
1820 mskid
= mac_entry
->port_num
;
1821 } else if (mac_entry
->port_num
>= DSAF_BASE_INNER_PORT_NUM
) {
1822 mskid
= mac_entry
->port_num
-
1823 DSAF_BASE_INNER_PORT_NUM
+ DSAF_SERVICE_NW_NUM
;
1825 dev_err(dsaf_dev
->dev
,
1826 "%s,pnum(%d)error,key(%#x:%#x)\n",
1827 dsaf_dev
->ae_dev
.name
, mac_entry
->port_num
,
1828 mac_key
.high
.val
, mac_key
.low
.val
);
1831 dsaf_set_bit(mac_data
.tbl_mcast_port_msk
[mskid
/ 32], mskid
% 32, 1);
1832 mac_data
.tbl_mcast_old_en
= 0;
1833 mac_data
.tbl_mcast_item_vld
= 1;
1835 dev_dbg(dsaf_dev
->dev
,
1836 "set_uc_entry, %s Mac key(%#x:%#x) entry_index%d\n",
1837 dsaf_dev
->ae_dev
.name
, mac_key
.high
.val
,
1838 mac_key
.low
.val
, entry_index
);
1840 tcam_data
.tbl_tcam_data_high
= cpu_to_le32(mac_key
.high
.val
);
1841 tcam_data
.tbl_tcam_data_low
= cpu_to_le32(mac_key
.low
.val
);
1843 /* config mc entry with mask */
1844 hns_dsaf_tcam_mc_cfg(dsaf_dev
, entry_index
, &tcam_data
,
1845 pmask_key
, &mac_data
);
1847 /*config software entry */
1848 soft_mac_entry
+= entry_index
;
1849 soft_mac_entry
->index
= entry_index
;
1850 soft_mac_entry
->tcam_key
.high
.val
= mac_key
.high
.val
;
1851 soft_mac_entry
->tcam_key
.low
.val
= mac_key
.low
.val
;
1857 * hns_dsaf_del_mac_entry - del mac mc-port
1858 * @dsaf_dev: dsa fabric device struct pointer
1859 * @vlan_id: vlian id
1860 * @in_port_num: input port num
1863 int hns_dsaf_del_mac_entry(struct dsaf_device
*dsaf_dev
, u16 vlan_id
,
1864 u8 in_port_num
, u8
*addr
)
1866 u16 entry_index
= DSAF_INVALID_ENTRY_IDX
;
1867 struct dsaf_drv_tbl_tcam_key mac_key
;
1868 struct dsaf_drv_priv
*priv
=
1869 (struct dsaf_drv_priv
*)hns_dsaf_dev_priv(dsaf_dev
);
1870 struct dsaf_drv_soft_mac_tbl
*soft_mac_entry
= priv
->soft_mac_tbl
;
1873 if (MAC_IS_ALL_ZEROS(addr
) || MAC_IS_BROADCAST(addr
)) {
1874 dev_err(dsaf_dev
->dev
, "del_entry failed,addr %pM!\n",
1880 hns_dsaf_set_mac_key(dsaf_dev
, &mac_key
, vlan_id
, in_port_num
, addr
);
1883 entry_index
= hns_dsaf_find_soft_mac_entry(dsaf_dev
, &mac_key
);
1884 if (entry_index
== DSAF_INVALID_ENTRY_IDX
) {
1885 /*not exist, error */
1886 dev_err(dsaf_dev
->dev
,
1887 "del_mac_entry failed, %s Mac key(%#x:%#x)\n",
1888 dsaf_dev
->ae_dev
.name
,
1889 mac_key
.high
.val
, mac_key
.low
.val
);
1892 dev_dbg(dsaf_dev
->dev
,
1893 "del_mac_entry, %s Mac key(%#x:%#x) entry_index%d\n",
1894 dsaf_dev
->ae_dev
.name
, mac_key
.high
.val
,
1895 mac_key
.low
.val
, entry_index
);
1898 hns_dsaf_tcam_mc_invld(dsaf_dev
, entry_index
);
1901 soft_mac_entry
+= entry_index
;
1902 soft_mac_entry
->index
= DSAF_INVALID_ENTRY_IDX
;
1908 * hns_dsaf_del_mac_mc_port - del mac mc- port
1909 * @dsaf_dev: dsa fabric device struct pointer
1910 * @mac_entry: mac entry
1912 int hns_dsaf_del_mac_mc_port(struct dsaf_device
*dsaf_dev
,
1913 struct dsaf_drv_mac_single_dest_entry
*mac_entry
)
1915 u16 entry_index
= DSAF_INVALID_ENTRY_IDX
;
1916 struct dsaf_drv_tbl_tcam_key mac_key
;
1917 struct dsaf_drv_priv
*priv
= hns_dsaf_dev_priv(dsaf_dev
);
1918 struct dsaf_drv_soft_mac_tbl
*soft_mac_entry
= priv
->soft_mac_tbl
;
1921 struct dsaf_tbl_tcam_mcast_cfg mac_data
;
1922 struct dsaf_tbl_tcam_data tcam_data
;
1924 const u8 empty_msk
[sizeof(mac_data
.tbl_mcast_port_msk
)] = {0};
1925 struct dsaf_drv_tbl_tcam_key mask_key
, tmp_mac_key
;
1926 struct dsaf_tbl_tcam_data
*pmask_key
= NULL
;
1927 u8 mc_addr
[ETH_ALEN
];
1930 if (!(void *)mac_entry
) {
1931 dev_err(dsaf_dev
->dev
,
1932 "hns_dsaf_del_mac_mc_port mac_entry is NULL\n");
1937 if (MAC_IS_ALL_ZEROS(mac_entry
->addr
)) {
1938 dev_err(dsaf_dev
->dev
, "del_port failed, addr %pM!\n",
1943 /* always mask vlan_id field */
1944 ether_addr_copy(mc_addr
, mac_entry
->addr
);
1945 mc_mask
= dsaf_dev
->mac_cb
[mac_entry
->in_port_num
]->mc_mask
;
1947 if (!AE_IS_VER1(dsaf_dev
->dsaf_ver
)) {
1948 /* prepare for key data setting */
1949 hns_dsaf_mc_mask_bit_clear(mc_addr
, mc_mask
);
1951 /* config key mask */
1952 hns_dsaf_set_mac_key(dsaf_dev
, &mask_key
, 0x00, 0xff, mc_addr
);
1954 mask_key
.high
.val
= le32_to_cpu(mask_key
.high
.val
);
1955 mask_key
.low
.val
= le32_to_cpu(mask_key
.low
.val
);
1957 pmask_key
= (struct dsaf_tbl_tcam_data
*)(&mask_key
);
1961 vlan_id
= mac_entry
->in_vlan_id
;
1962 in_port_num
= mac_entry
->in_port_num
;
1965 hns_dsaf_set_mac_key(dsaf_dev
, &mac_key
, vlan_id
, in_port_num
, mc_addr
);
1967 /* check if the tcam entry is exist */
1968 entry_index
= hns_dsaf_find_soft_mac_entry(dsaf_dev
, &mac_key
);
1969 if (entry_index
== DSAF_INVALID_ENTRY_IDX
) {
1971 dev_err(dsaf_dev
->dev
,
1972 "find_soft_mac_entry failed, %s Mac key(%#x:%#x)\n",
1973 dsaf_dev
->ae_dev
.name
,
1974 mac_key
.high
.val
, mac_key
.low
.val
);
1978 dev_dbg(dsaf_dev
->dev
,
1979 "del_mac_mc_port, %s key(%#x:%#x) index%d\n",
1980 dsaf_dev
->ae_dev
.name
, mac_key
.high
.val
,
1981 mac_key
.low
.val
, entry_index
);
1984 hns_dsaf_tcam_mc_get(dsaf_dev
, entry_index
, &tcam_data
, &mac_data
);
1986 tmp_mac_key
.high
.val
= le32_to_cpu(tcam_data
.tbl_tcam_data_high
);
1987 tmp_mac_key
.low
.val
= le32_to_cpu(tcam_data
.tbl_tcam_data_low
);
1990 if (mac_entry
->port_num
< DSAF_SERVICE_NW_NUM
) {
1991 mskid
= mac_entry
->port_num
;
1992 } else if (mac_entry
->port_num
>= DSAF_BASE_INNER_PORT_NUM
) {
1993 mskid
= mac_entry
->port_num
-
1994 DSAF_BASE_INNER_PORT_NUM
+ DSAF_SERVICE_NW_NUM
;
1996 dev_err(dsaf_dev
->dev
,
1997 "%s,pnum(%d)error,key(%#x:%#x)\n",
1998 dsaf_dev
->ae_dev
.name
, mac_entry
->port_num
,
1999 mac_key
.high
.val
, mac_key
.low
.val
);
2002 dsaf_set_bit(mac_data
.tbl_mcast_port_msk
[mskid
/ 32], mskid
% 32, 0);
2004 /*check non port, do del entry */
2005 if (!memcmp(mac_data
.tbl_mcast_port_msk
, empty_msk
,
2006 sizeof(mac_data
.tbl_mcast_port_msk
))) {
2007 hns_dsaf_tcam_mc_invld(dsaf_dev
, entry_index
);
2009 /* del soft entry */
2010 soft_mac_entry
+= entry_index
;
2011 soft_mac_entry
->index
= DSAF_INVALID_ENTRY_IDX
;
2012 } else { /* not zero, just del port, update */
2013 tcam_data
.tbl_tcam_data_high
= cpu_to_le32(mac_key
.high
.val
);
2014 tcam_data
.tbl_tcam_data_low
= cpu_to_le32(mac_key
.low
.val
);
2016 hns_dsaf_tcam_mc_cfg(dsaf_dev
, entry_index
,
2018 pmask_key
, &mac_data
);
2024 int hns_dsaf_clr_mac_mc_port(struct dsaf_device
*dsaf_dev
, u8 mac_id
,
2027 struct dsaf_drv_priv
*priv
= hns_dsaf_dev_priv(dsaf_dev
);
2028 struct dsaf_drv_soft_mac_tbl
*soft_mac_entry
;
2029 struct dsaf_tbl_tcam_mcast_cfg mac_data
;
2032 if (HNS_DSAF_IS_DEBUG(dsaf_dev
))
2035 for (i
= 0; i
< DSAF_TCAM_SUM
- DSAFV2_MAC_FUZZY_TCAM_NUM
; i
++) {
2039 soft_mac_entry
= priv
->soft_mac_tbl
+ i
;
2041 hns_dsaf_tcam_addr_get(&soft_mac_entry
->tcam_key
, addr
);
2042 port
= dsaf_get_field(
2043 soft_mac_entry
->tcam_key
.low
.bits
.port_vlan
,
2044 DSAF_TBL_TCAM_KEY_PORT_M
,
2045 DSAF_TBL_TCAM_KEY_PORT_S
);
2046 /* check valid tcam mc entry */
2047 if (soft_mac_entry
->index
!= DSAF_INVALID_ENTRY_IDX
&&
2049 is_multicast_ether_addr(addr
) &&
2050 !is_broadcast_ether_addr(addr
)) {
2051 const u32 empty_msk
[DSAF_PORT_MSK_NUM
] = {0};
2052 struct dsaf_drv_mac_single_dest_entry mac_entry
;
2054 /* disable receiving of this multicast address for
2057 ether_addr_copy(mac_entry
.addr
, addr
);
2058 mac_entry
.in_vlan_id
= dsaf_get_field(
2059 soft_mac_entry
->tcam_key
.low
.bits
.port_vlan
,
2060 DSAF_TBL_TCAM_KEY_VLAN_M
,
2061 DSAF_TBL_TCAM_KEY_VLAN_S
);
2062 mac_entry
.in_port_num
= mac_id
;
2063 mac_entry
.port_num
= port_num
;
2064 if (hns_dsaf_del_mac_mc_port(dsaf_dev
, &mac_entry
)) {
2069 /* disable receiving of this multicast address for
2070 * the mac port if all VF are disable
2072 hns_dsaf_tcam_mc_get(dsaf_dev
, i
,
2073 (struct dsaf_tbl_tcam_data
*)
2074 (&soft_mac_entry
->tcam_key
),
2076 dsaf_set_bit(mac_data
.tbl_mcast_port_msk
[mac_id
/ 32],
2078 if (!memcmp(mac_data
.tbl_mcast_port_msk
, empty_msk
,
2079 sizeof(u32
) * DSAF_PORT_MSK_NUM
)) {
2080 mac_entry
.port_num
= mac_id
;
2081 if (hns_dsaf_del_mac_mc_port(dsaf_dev
,
2094 * hns_dsaf_get_mac_uc_entry - get mac uc entry
2095 * @dsaf_dev: dsa fabric device struct pointer
2096 * @mac_entry: mac entry
2098 int hns_dsaf_get_mac_uc_entry(struct dsaf_device
*dsaf_dev
,
2099 struct dsaf_drv_mac_single_dest_entry
*mac_entry
)
2101 u16 entry_index
= DSAF_INVALID_ENTRY_IDX
;
2102 struct dsaf_drv_tbl_tcam_key mac_key
;
2104 struct dsaf_tbl_tcam_ucast_cfg mac_data
;
2105 struct dsaf_tbl_tcam_data tcam_data
;
2108 if (MAC_IS_ALL_ZEROS(mac_entry
->addr
) ||
2109 MAC_IS_BROADCAST(mac_entry
->addr
)) {
2110 dev_err(dsaf_dev
->dev
, "get_entry failed,addr %pM\n",
2116 hns_dsaf_set_mac_key(dsaf_dev
, &mac_key
, mac_entry
->in_vlan_id
,
2117 mac_entry
->in_port_num
, mac_entry
->addr
);
2120 entry_index
= hns_dsaf_find_soft_mac_entry(dsaf_dev
, &mac_key
);
2121 if (entry_index
== DSAF_INVALID_ENTRY_IDX
) {
2122 /*find none, error */
2123 dev_err(dsaf_dev
->dev
,
2124 "get_uc_entry failed, %s Mac key(%#x:%#x)\n",
2125 dsaf_dev
->ae_dev
.name
,
2126 mac_key
.high
.val
, mac_key
.low
.val
);
2129 dev_dbg(dsaf_dev
->dev
,
2130 "get_uc_entry, %s Mac key(%#x:%#x) entry_index%d\n",
2131 dsaf_dev
->ae_dev
.name
, mac_key
.high
.val
,
2132 mac_key
.low
.val
, entry_index
);
2135 hns_dsaf_tcam_uc_get(dsaf_dev
, entry_index
, &tcam_data
, &mac_data
);
2137 mac_key
.high
.val
= le32_to_cpu(tcam_data
.tbl_tcam_data_high
);
2138 mac_key
.low
.val
= le32_to_cpu(tcam_data
.tbl_tcam_data_low
);
2140 mac_entry
->port_num
= mac_data
.tbl_ucast_out_port
;
2146 * hns_dsaf_get_mac_mc_entry - get mac mc entry
2147 * @dsaf_dev: dsa fabric device struct pointer
2148 * @mac_entry: mac entry
2150 int hns_dsaf_get_mac_mc_entry(struct dsaf_device
*dsaf_dev
,
2151 struct dsaf_drv_mac_multi_dest_entry
*mac_entry
)
2153 u16 entry_index
= DSAF_INVALID_ENTRY_IDX
;
2154 struct dsaf_drv_tbl_tcam_key mac_key
;
2156 struct dsaf_tbl_tcam_mcast_cfg mac_data
;
2157 struct dsaf_tbl_tcam_data tcam_data
;
2160 if (MAC_IS_ALL_ZEROS(mac_entry
->addr
) ||
2161 MAC_IS_BROADCAST(mac_entry
->addr
)) {
2162 dev_err(dsaf_dev
->dev
, "get_entry failed,addr %pM\n",
2168 hns_dsaf_set_mac_key(dsaf_dev
, &mac_key
, mac_entry
->in_vlan_id
,
2169 mac_entry
->in_port_num
, mac_entry
->addr
);
2172 entry_index
= hns_dsaf_find_soft_mac_entry(dsaf_dev
, &mac_key
);
2173 if (entry_index
== DSAF_INVALID_ENTRY_IDX
) {
2174 /* find none, error */
2175 dev_err(dsaf_dev
->dev
,
2176 "get_mac_uc_entry failed, %s Mac key(%#x:%#x)\n",
2177 dsaf_dev
->ae_dev
.name
, mac_key
.high
.val
,
2181 dev_dbg(dsaf_dev
->dev
,
2182 "get_mac_uc_entry, %s Mac key(%#x:%#x) entry_index%d\n",
2183 dsaf_dev
->ae_dev
.name
, mac_key
.high
.val
,
2184 mac_key
.low
.val
, entry_index
);
2187 hns_dsaf_tcam_mc_get(dsaf_dev
, entry_index
, &tcam_data
, &mac_data
);
2189 mac_key
.high
.val
= le32_to_cpu(tcam_data
.tbl_tcam_data_high
);
2190 mac_key
.low
.val
= le32_to_cpu(tcam_data
.tbl_tcam_data_low
);
2192 mac_entry
->port_mask
[0] = mac_data
.tbl_mcast_port_msk
[0] & 0x3F;
2197 * hns_dsaf_get_mac_entry_by_index - get mac entry by tab index
2198 * @dsaf_dev: dsa fabric device struct pointer
2199 * @entry_index: tab entry index
2200 * @mac_entry: mac entry
2202 int hns_dsaf_get_mac_entry_by_index(
2203 struct dsaf_device
*dsaf_dev
,
2204 u16 entry_index
, struct dsaf_drv_mac_multi_dest_entry
*mac_entry
)
2206 struct dsaf_drv_tbl_tcam_key mac_key
;
2208 struct dsaf_tbl_tcam_mcast_cfg mac_data
;
2209 struct dsaf_tbl_tcam_ucast_cfg mac_uc_data
;
2210 struct dsaf_tbl_tcam_data tcam_data
;
2211 char mac_addr
[ETH_ALEN
] = {0};
2213 if (entry_index
>= dsaf_dev
->tcam_max_num
) {
2214 /* find none, del error */
2215 dev_err(dsaf_dev
->dev
, "get_uc_entry failed, %s\n",
2216 dsaf_dev
->ae_dev
.name
);
2220 /* mc entry, do read opt */
2221 hns_dsaf_tcam_mc_get(dsaf_dev
, entry_index
, &tcam_data
, &mac_data
);
2223 mac_key
.high
.val
= le32_to_cpu(tcam_data
.tbl_tcam_data_high
);
2224 mac_key
.low
.val
= le32_to_cpu(tcam_data
.tbl_tcam_data_low
);
2226 mac_entry
->port_mask
[0] = mac_data
.tbl_mcast_port_msk
[0] & 0x3F;
2229 mac_addr
[0] = mac_key
.high
.bits
.mac_0
;
2230 mac_addr
[1] = mac_key
.high
.bits
.mac_1
;
2231 mac_addr
[2] = mac_key
.high
.bits
.mac_2
;
2232 mac_addr
[3] = mac_key
.high
.bits
.mac_3
;
2233 mac_addr
[4] = mac_key
.low
.bits
.mac_4
;
2234 mac_addr
[5] = mac_key
.low
.bits
.mac_5
;
2236 if (MAC_IS_MULTICAST((u8
*)mac_addr
) ||
2237 MAC_IS_L3_MULTICAST((u8
*)mac_addr
)) {
2240 /*is not mc, just uc... */
2241 hns_dsaf_tcam_uc_get(dsaf_dev
, entry_index
, &tcam_data
,
2244 mac_key
.high
.val
= le32_to_cpu(tcam_data
.tbl_tcam_data_high
);
2245 mac_key
.low
.val
= le32_to_cpu(tcam_data
.tbl_tcam_data_low
);
2247 mac_entry
->port_mask
[0] = (1 << mac_uc_data
.tbl_ucast_out_port
);
2253 static struct dsaf_device
*hns_dsaf_alloc_dev(struct device
*dev
,
2256 struct dsaf_device
*dsaf_dev
;
2258 dsaf_dev
= devm_kzalloc(dev
,
2259 sizeof(*dsaf_dev
) + sizeof_priv
, GFP_KERNEL
);
2260 if (unlikely(!dsaf_dev
)) {
2261 dsaf_dev
= ERR_PTR(-ENOMEM
);
2263 dsaf_dev
->dev
= dev
;
2264 dev_set_drvdata(dev
, dsaf_dev
);
2271 * hns_dsaf_free_dev - free dev mem
2272 * @dev: struct device pointer
2274 static void hns_dsaf_free_dev(struct dsaf_device
*dsaf_dev
)
2276 (void)dev_set_drvdata(dsaf_dev
->dev
, NULL
);
2280 * dsaf_pfc_unit_cnt - set pfc unit count
2281 * @dsaf_id: dsa fabric id
2282 * @pport_rate: value array
2283 * @pdsaf_pfc_unit_cnt: value array
2285 static void hns_dsaf_pfc_unit_cnt(struct dsaf_device
*dsaf_dev
, int mac_id
,
2286 enum dsaf_port_rate_mode rate
)
2291 case DSAF_PORT_RATE_10000
:
2292 unit_cnt
= HNS_DSAF_PFC_UNIT_CNT_FOR_XGE
;
2294 case DSAF_PORT_RATE_1000
:
2295 unit_cnt
= HNS_DSAF_PFC_UNIT_CNT_FOR_GE_1000
;
2297 case DSAF_PORT_RATE_2500
:
2298 unit_cnt
= HNS_DSAF_PFC_UNIT_CNT_FOR_GE_1000
;
2301 unit_cnt
= HNS_DSAF_PFC_UNIT_CNT_FOR_XGE
;
2304 dsaf_set_dev_field(dsaf_dev
,
2305 (DSAF_PFC_UNIT_CNT_0_REG
+ 0x4 * (u64
)mac_id
),
2306 DSAF_PFC_UNINT_CNT_M
, DSAF_PFC_UNINT_CNT_S
,
2311 * dsaf_port_work_rate_cfg - fifo
2312 * @dsaf_id: dsa fabric id
2315 void hns_dsaf_port_work_rate_cfg(struct dsaf_device
*dsaf_dev
, int mac_id
,
2316 enum dsaf_port_rate_mode rate_mode
)
2320 port_work_mode
= dsaf_read_dev(
2321 dsaf_dev
, DSAF_XGE_GE_WORK_MODE_0_REG
+ 0x4 * (u64
)mac_id
);
2323 if (rate_mode
== DSAF_PORT_RATE_10000
)
2324 dsaf_set_bit(port_work_mode
, DSAF_XGE_GE_WORK_MODE_S
, 1);
2326 dsaf_set_bit(port_work_mode
, DSAF_XGE_GE_WORK_MODE_S
, 0);
2328 dsaf_write_dev(dsaf_dev
,
2329 DSAF_XGE_GE_WORK_MODE_0_REG
+ 0x4 * (u64
)mac_id
,
2332 hns_dsaf_pfc_unit_cnt(dsaf_dev
, mac_id
, rate_mode
);
2336 * hns_dsaf_fix_mac_mode - dsaf modify mac mode
2337 * @mac_cb: mac contrl block
2339 void hns_dsaf_fix_mac_mode(struct hns_mac_cb
*mac_cb
)
2341 enum dsaf_port_rate_mode mode
;
2342 struct dsaf_device
*dsaf_dev
= mac_cb
->dsaf_dev
;
2343 int mac_id
= mac_cb
->mac_id
;
2345 if (mac_cb
->mac_type
!= HNAE_PORT_SERVICE
)
2347 if (mac_cb
->phy_if
== PHY_INTERFACE_MODE_XGMII
)
2348 mode
= DSAF_PORT_RATE_10000
;
2350 mode
= DSAF_PORT_RATE_1000
;
2352 hns_dsaf_port_work_rate_cfg(dsaf_dev
, mac_id
, mode
);
2355 static u32
hns_dsaf_get_inode_prio_reg(int index
)
2357 int base_index
, offset
;
2358 u32 base_addr
= DSAF_INODE_IN_PRIO_PAUSE_BASE_REG
;
2360 base_index
= (index
+ 1) / DSAF_REG_PER_ZONE
;
2361 offset
= (index
+ 1) % DSAF_REG_PER_ZONE
;
2363 return base_addr
+ DSAF_INODE_IN_PRIO_PAUSE_BASE_OFFSET
* base_index
+
2364 DSAF_INODE_IN_PRIO_PAUSE_OFFSET
* offset
;
2367 void hns_dsaf_update_stats(struct dsaf_device
*dsaf_dev
, u32 node_num
)
2369 struct dsaf_hw_stats
*hw_stats
2370 = &dsaf_dev
->hw_stats
[node_num
];
2371 bool is_ver1
= AE_IS_VER1(dsaf_dev
->dsaf_ver
);
2375 hw_stats
->pad_drop
+= dsaf_read_dev(dsaf_dev
,
2376 DSAF_INODE_PAD_DISCARD_NUM_0_REG
+ 0x80 * (u64
)node_num
);
2377 hw_stats
->man_pkts
+= dsaf_read_dev(dsaf_dev
,
2378 DSAF_INODE_FINAL_IN_MAN_NUM_0_REG
+ 0x80 * (u64
)node_num
);
2379 hw_stats
->rx_pkts
+= dsaf_read_dev(dsaf_dev
,
2380 DSAF_INODE_FINAL_IN_PKT_NUM_0_REG
+ 0x80 * (u64
)node_num
);
2381 hw_stats
->rx_pkt_id
+= dsaf_read_dev(dsaf_dev
,
2382 DSAF_INODE_SBM_PID_NUM_0_REG
+ 0x80 * (u64
)node_num
);
2384 reg_tmp
= is_ver1
? DSAF_INODE_FINAL_IN_PAUSE_NUM_0_REG
:
2385 DSAFV2_INODE_FINAL_IN_PAUSE_NUM_0_REG
;
2386 hw_stats
->rx_pause_frame
+=
2387 dsaf_read_dev(dsaf_dev
, reg_tmp
+ 0x80 * (u64
)node_num
);
2389 hw_stats
->release_buf_num
+= dsaf_read_dev(dsaf_dev
,
2390 DSAF_INODE_SBM_RELS_NUM_0_REG
+ 0x80 * (u64
)node_num
);
2391 hw_stats
->sbm_drop
+= dsaf_read_dev(dsaf_dev
,
2392 DSAF_INODE_SBM_DROP_NUM_0_REG
+ 0x80 * (u64
)node_num
);
2393 hw_stats
->crc_false
+= dsaf_read_dev(dsaf_dev
,
2394 DSAF_INODE_CRC_FALSE_NUM_0_REG
+ 0x80 * (u64
)node_num
);
2395 hw_stats
->bp_drop
+= dsaf_read_dev(dsaf_dev
,
2396 DSAF_INODE_BP_DISCARD_NUM_0_REG
+ 0x80 * (u64
)node_num
);
2397 hw_stats
->rslt_drop
+= dsaf_read_dev(dsaf_dev
,
2398 DSAF_INODE_RSLT_DISCARD_NUM_0_REG
+ 0x80 * (u64
)node_num
);
2399 hw_stats
->local_addr_false
+= dsaf_read_dev(dsaf_dev
,
2400 DSAF_INODE_LOCAL_ADDR_FALSE_NUM_0_REG
+ 0x80 * (u64
)node_num
);
2402 hw_stats
->vlan_drop
+= dsaf_read_dev(dsaf_dev
,
2403 DSAF_INODE_SW_VLAN_TAG_DISC_0_REG
+ 0x80 * (u64
)node_num
);
2404 hw_stats
->stp_drop
+= dsaf_read_dev(dsaf_dev
,
2405 DSAF_INODE_IN_DATA_STP_DISC_0_REG
+ 0x80 * (u64
)node_num
);
2407 /* pfc pause frame statistics stored in dsaf inode*/
2408 if ((node_num
< DSAF_SERVICE_NW_NUM
) && !is_ver1
) {
2409 for (i
= 0; i
< DSAF_PRIO_NR
; i
++) {
2410 reg_tmp
= hns_dsaf_get_inode_prio_reg(i
);
2411 hw_stats
->rx_pfc
[i
] += dsaf_read_dev(dsaf_dev
,
2412 reg_tmp
+ 0x4 * (u64
)node_num
);
2413 hw_stats
->tx_pfc
[i
] += dsaf_read_dev(dsaf_dev
,
2414 DSAF_XOD_XGE_PFC_PRIO_CNT_BASE_REG
+
2415 DSAF_XOD_XGE_PFC_PRIO_CNT_OFFSET
* i
+
2416 0xF0 * (u64
)node_num
);
2419 hw_stats
->tx_pkts
+= dsaf_read_dev(dsaf_dev
,
2420 DSAF_XOD_RCVPKT_CNT_0_REG
+ 0x90 * (u64
)node_num
);
2424 *hns_dsaf_get_regs - dump dsaf regs
2425 *@dsaf_dev: dsaf device
2426 *@data:data for value of regs
2428 void hns_dsaf_get_regs(struct dsaf_device
*ddev
, u32 port
, void *data
)
2434 bool is_ver1
= AE_IS_VER1(ddev
->dsaf_ver
);
2436 /* dsaf common registers */
2437 p
[0] = dsaf_read_dev(ddev
, DSAF_SRAM_INIT_OVER_0_REG
);
2438 p
[1] = dsaf_read_dev(ddev
, DSAF_CFG_0_REG
);
2439 p
[2] = dsaf_read_dev(ddev
, DSAF_ECC_ERR_INVERT_0_REG
);
2440 p
[3] = dsaf_read_dev(ddev
, DSAF_ABNORMAL_TIMEOUT_0_REG
);
2441 p
[4] = dsaf_read_dev(ddev
, DSAF_FSM_TIMEOUT_0_REG
);
2442 p
[5] = dsaf_read_dev(ddev
, DSAF_DSA_REG_CNT_CLR_CE_REG
);
2443 p
[6] = dsaf_read_dev(ddev
, DSAF_DSA_SBM_INF_FIFO_THRD_REG
);
2444 p
[7] = dsaf_read_dev(ddev
, DSAF_DSA_SRAM_1BIT_ECC_SEL_REG
);
2445 p
[8] = dsaf_read_dev(ddev
, DSAF_DSA_SRAM_1BIT_ECC_CNT_REG
);
2447 p
[9] = dsaf_read_dev(ddev
, DSAF_PFC_EN_0_REG
+ port
* 4);
2448 p
[10] = dsaf_read_dev(ddev
, DSAF_PFC_UNIT_CNT_0_REG
+ port
* 4);
2449 p
[11] = dsaf_read_dev(ddev
, DSAF_XGE_INT_MSK_0_REG
+ port
* 4);
2450 p
[12] = dsaf_read_dev(ddev
, DSAF_XGE_INT_SRC_0_REG
+ port
* 4);
2451 p
[13] = dsaf_read_dev(ddev
, DSAF_XGE_INT_STS_0_REG
+ port
* 4);
2452 p
[14] = dsaf_read_dev(ddev
, DSAF_XGE_INT_MSK_0_REG
+ port
* 4);
2453 p
[15] = dsaf_read_dev(ddev
, DSAF_PPE_INT_MSK_0_REG
+ port
* 4);
2454 p
[16] = dsaf_read_dev(ddev
, DSAF_ROCEE_INT_MSK_0_REG
+ port
* 4);
2455 p
[17] = dsaf_read_dev(ddev
, DSAF_XGE_INT_SRC_0_REG
+ port
* 4);
2456 p
[18] = dsaf_read_dev(ddev
, DSAF_PPE_INT_SRC_0_REG
+ port
* 4);
2457 p
[19] = dsaf_read_dev(ddev
, DSAF_ROCEE_INT_SRC_0_REG
+ port
* 4);
2458 p
[20] = dsaf_read_dev(ddev
, DSAF_XGE_INT_STS_0_REG
+ port
* 4);
2459 p
[21] = dsaf_read_dev(ddev
, DSAF_PPE_INT_STS_0_REG
+ port
* 4);
2460 p
[22] = dsaf_read_dev(ddev
, DSAF_ROCEE_INT_STS_0_REG
+ port
* 4);
2461 p
[23] = dsaf_read_dev(ddev
, DSAF_PPE_QID_CFG_0_REG
+ port
* 4);
2463 for (i
= 0; i
< DSAF_SW_PORT_NUM
; i
++)
2464 p
[24 + i
] = dsaf_read_dev(ddev
,
2465 DSAF_SW_PORT_TYPE_0_REG
+ i
* 4);
2467 p
[32] = dsaf_read_dev(ddev
, DSAF_MIX_DEF_QID_0_REG
+ port
* 4);
2469 for (i
= 0; i
< DSAF_SW_PORT_NUM
; i
++)
2470 p
[33 + i
] = dsaf_read_dev(ddev
,
2471 DSAF_PORT_DEF_VLAN_0_REG
+ i
* 4);
2473 for (i
= 0; i
< DSAF_TOTAL_QUEUE_NUM
; i
++)
2474 p
[41 + i
] = dsaf_read_dev(ddev
,
2475 DSAF_VM_DEF_VLAN_0_REG
+ i
* 4);
2477 /* dsaf inode registers */
2478 p
[170] = dsaf_read_dev(ddev
, DSAF_INODE_CUT_THROUGH_CFG_0_REG
);
2480 p
[171] = dsaf_read_dev(ddev
,
2481 DSAF_INODE_ECC_ERR_ADDR_0_REG
+ port
* 0x80);
2483 for (i
= 0; i
< DSAF_INODE_NUM
/ DSAF_COMM_CHN
; i
++) {
2484 j
= i
* DSAF_COMM_CHN
+ port
;
2485 p
[172 + i
] = dsaf_read_dev(ddev
,
2486 DSAF_INODE_IN_PORT_NUM_0_REG
+ j
* 0x80);
2487 p
[175 + i
] = dsaf_read_dev(ddev
,
2488 DSAF_INODE_PRI_TC_CFG_0_REG
+ j
* 0x80);
2489 p
[178 + i
] = dsaf_read_dev(ddev
,
2490 DSAF_INODE_BP_STATUS_0_REG
+ j
* 0x80);
2491 p
[181 + i
] = dsaf_read_dev(ddev
,
2492 DSAF_INODE_PAD_DISCARD_NUM_0_REG
+ j
* 0x80);
2493 p
[184 + i
] = dsaf_read_dev(ddev
,
2494 DSAF_INODE_FINAL_IN_MAN_NUM_0_REG
+ j
* 0x80);
2495 p
[187 + i
] = dsaf_read_dev(ddev
,
2496 DSAF_INODE_FINAL_IN_PKT_NUM_0_REG
+ j
* 0x80);
2497 p
[190 + i
] = dsaf_read_dev(ddev
,
2498 DSAF_INODE_SBM_PID_NUM_0_REG
+ j
* 0x80);
2499 reg_tmp
= is_ver1
? DSAF_INODE_FINAL_IN_PAUSE_NUM_0_REG
:
2500 DSAFV2_INODE_FINAL_IN_PAUSE_NUM_0_REG
;
2501 p
[193 + i
] = dsaf_read_dev(ddev
, reg_tmp
+ j
* 0x80);
2502 p
[196 + i
] = dsaf_read_dev(ddev
,
2503 DSAF_INODE_SBM_RELS_NUM_0_REG
+ j
* 0x80);
2504 p
[199 + i
] = dsaf_read_dev(ddev
,
2505 DSAF_INODE_SBM_DROP_NUM_0_REG
+ j
* 0x80);
2506 p
[202 + i
] = dsaf_read_dev(ddev
,
2507 DSAF_INODE_CRC_FALSE_NUM_0_REG
+ j
* 0x80);
2508 p
[205 + i
] = dsaf_read_dev(ddev
,
2509 DSAF_INODE_BP_DISCARD_NUM_0_REG
+ j
* 0x80);
2510 p
[208 + i
] = dsaf_read_dev(ddev
,
2511 DSAF_INODE_RSLT_DISCARD_NUM_0_REG
+ j
* 0x80);
2512 p
[211 + i
] = dsaf_read_dev(ddev
,
2513 DSAF_INODE_LOCAL_ADDR_FALSE_NUM_0_REG
+ j
* 0x80);
2514 p
[214 + i
] = dsaf_read_dev(ddev
,
2515 DSAF_INODE_VOQ_OVER_NUM_0_REG
+ j
* 0x80);
2516 p
[217 + i
] = dsaf_read_dev(ddev
,
2517 DSAF_INODE_BD_SAVE_STATUS_0_REG
+ j
* 4);
2518 p
[220 + i
] = dsaf_read_dev(ddev
,
2519 DSAF_INODE_BD_ORDER_STATUS_0_REG
+ j
* 4);
2520 p
[223 + i
] = dsaf_read_dev(ddev
,
2521 DSAF_INODE_SW_VLAN_TAG_DISC_0_REG
+ j
* 4);
2522 p
[224 + i
] = dsaf_read_dev(ddev
,
2523 DSAF_INODE_IN_DATA_STP_DISC_0_REG
+ j
* 4);
2526 p
[227] = dsaf_read_dev(ddev
, DSAF_INODE_GE_FC_EN_0_REG
+ port
* 4);
2528 for (i
= 0; i
< DSAF_INODE_NUM
/ DSAF_COMM_CHN
; i
++) {
2529 j
= i
* DSAF_COMM_CHN
+ port
;
2530 p
[228 + i
] = dsaf_read_dev(ddev
,
2531 DSAF_INODE_VC0_IN_PKT_NUM_0_REG
+ j
* 4);
2534 p
[231] = dsaf_read_dev(ddev
,
2535 DSAF_INODE_VC1_IN_PKT_NUM_0_REG
+ port
* 4);
2537 /* dsaf inode registers */
2538 for (i
= 0; i
< HNS_DSAF_SBM_NUM(ddev
) / DSAF_COMM_CHN
; i
++) {
2539 j
= i
* DSAF_COMM_CHN
+ port
;
2540 p
[232 + i
] = dsaf_read_dev(ddev
,
2541 DSAF_SBM_CFG_REG_0_REG
+ j
* 0x80);
2542 p
[235 + i
] = dsaf_read_dev(ddev
,
2543 DSAF_SBM_BP_CFG_0_XGE_REG_0_REG
+ j
* 0x80);
2544 p
[238 + i
] = dsaf_read_dev(ddev
,
2545 DSAF_SBM_BP_CFG_1_REG_0_REG
+ j
* 0x80);
2546 p
[241 + i
] = dsaf_read_dev(ddev
,
2547 DSAF_SBM_BP_CFG_2_XGE_REG_0_REG
+ j
* 0x80);
2548 p
[244 + i
] = dsaf_read_dev(ddev
,
2549 DSAF_SBM_FREE_CNT_0_0_REG
+ j
* 0x80);
2550 p
[245 + i
] = dsaf_read_dev(ddev
,
2551 DSAF_SBM_FREE_CNT_1_0_REG
+ j
* 0x80);
2552 p
[248 + i
] = dsaf_read_dev(ddev
,
2553 DSAF_SBM_BP_CNT_0_0_REG
+ j
* 0x80);
2554 p
[251 + i
] = dsaf_read_dev(ddev
,
2555 DSAF_SBM_BP_CNT_1_0_REG
+ j
* 0x80);
2556 p
[254 + i
] = dsaf_read_dev(ddev
,
2557 DSAF_SBM_BP_CNT_2_0_REG
+ j
* 0x80);
2558 p
[257 + i
] = dsaf_read_dev(ddev
,
2559 DSAF_SBM_BP_CNT_3_0_REG
+ j
* 0x80);
2560 p
[260 + i
] = dsaf_read_dev(ddev
,
2561 DSAF_SBM_INER_ST_0_REG
+ j
* 0x80);
2562 p
[263 + i
] = dsaf_read_dev(ddev
,
2563 DSAF_SBM_MIB_REQ_FAILED_TC_0_REG
+ j
* 0x80);
2564 p
[266 + i
] = dsaf_read_dev(ddev
,
2565 DSAF_SBM_LNK_INPORT_CNT_0_REG
+ j
* 0x80);
2566 p
[269 + i
] = dsaf_read_dev(ddev
,
2567 DSAF_SBM_LNK_DROP_CNT_0_REG
+ j
* 0x80);
2568 p
[272 + i
] = dsaf_read_dev(ddev
,
2569 DSAF_SBM_INF_OUTPORT_CNT_0_REG
+ j
* 0x80);
2570 p
[275 + i
] = dsaf_read_dev(ddev
,
2571 DSAF_SBM_LNK_INPORT_TC0_CNT_0_REG
+ j
* 0x80);
2572 p
[278 + i
] = dsaf_read_dev(ddev
,
2573 DSAF_SBM_LNK_INPORT_TC1_CNT_0_REG
+ j
* 0x80);
2574 p
[281 + i
] = dsaf_read_dev(ddev
,
2575 DSAF_SBM_LNK_INPORT_TC2_CNT_0_REG
+ j
* 0x80);
2576 p
[284 + i
] = dsaf_read_dev(ddev
,
2577 DSAF_SBM_LNK_INPORT_TC3_CNT_0_REG
+ j
* 0x80);
2578 p
[287 + i
] = dsaf_read_dev(ddev
,
2579 DSAF_SBM_LNK_INPORT_TC4_CNT_0_REG
+ j
* 0x80);
2580 p
[290 + i
] = dsaf_read_dev(ddev
,
2581 DSAF_SBM_LNK_INPORT_TC5_CNT_0_REG
+ j
* 0x80);
2582 p
[293 + i
] = dsaf_read_dev(ddev
,
2583 DSAF_SBM_LNK_INPORT_TC6_CNT_0_REG
+ j
* 0x80);
2584 p
[296 + i
] = dsaf_read_dev(ddev
,
2585 DSAF_SBM_LNK_INPORT_TC7_CNT_0_REG
+ j
* 0x80);
2586 p
[299 + i
] = dsaf_read_dev(ddev
,
2587 DSAF_SBM_LNK_REQ_CNT_0_REG
+ j
* 0x80);
2588 p
[302 + i
] = dsaf_read_dev(ddev
,
2589 DSAF_SBM_LNK_RELS_CNT_0_REG
+ j
* 0x80);
2590 p
[305 + i
] = dsaf_read_dev(ddev
,
2591 DSAF_SBM_BP_CFG_3_REG_0_REG
+ j
* 0x80);
2592 p
[308 + i
] = dsaf_read_dev(ddev
,
2593 DSAF_SBM_BP_CFG_4_REG_0_REG
+ j
* 0x80);
2596 /* dsaf onode registers */
2597 for (i
= 0; i
< DSAF_XOD_NUM
; i
++) {
2598 p
[311 + i
] = dsaf_read_dev(ddev
,
2599 DSAF_XOD_ETS_TSA_TC0_TC3_CFG_0_REG
+ i
* 0x90);
2600 p
[319 + i
] = dsaf_read_dev(ddev
,
2601 DSAF_XOD_ETS_TSA_TC4_TC7_CFG_0_REG
+ i
* 0x90);
2602 p
[327 + i
] = dsaf_read_dev(ddev
,
2603 DSAF_XOD_ETS_BW_TC0_TC3_CFG_0_REG
+ i
* 0x90);
2604 p
[335 + i
] = dsaf_read_dev(ddev
,
2605 DSAF_XOD_ETS_BW_TC4_TC7_CFG_0_REG
+ i
* 0x90);
2606 p
[343 + i
] = dsaf_read_dev(ddev
,
2607 DSAF_XOD_ETS_BW_OFFSET_CFG_0_REG
+ i
* 0x90);
2608 p
[351 + i
] = dsaf_read_dev(ddev
,
2609 DSAF_XOD_ETS_TOKEN_CFG_0_REG
+ i
* 0x90);
2612 p
[359] = dsaf_read_dev(ddev
, DSAF_XOD_PFS_CFG_0_0_REG
+ port
* 0x90);
2613 p
[360] = dsaf_read_dev(ddev
, DSAF_XOD_PFS_CFG_1_0_REG
+ port
* 0x90);
2614 p
[361] = dsaf_read_dev(ddev
, DSAF_XOD_PFS_CFG_2_0_REG
+ port
* 0x90);
2616 for (i
= 0; i
< DSAF_XOD_BIG_NUM
/ DSAF_COMM_CHN
; i
++) {
2617 j
= i
* DSAF_COMM_CHN
+ port
;
2618 p
[362 + i
] = dsaf_read_dev(ddev
,
2619 DSAF_XOD_GNT_L_0_REG
+ j
* 0x90);
2620 p
[365 + i
] = dsaf_read_dev(ddev
,
2621 DSAF_XOD_GNT_H_0_REG
+ j
* 0x90);
2622 p
[368 + i
] = dsaf_read_dev(ddev
,
2623 DSAF_XOD_CONNECT_STATE_0_REG
+ j
* 0x90);
2624 p
[371 + i
] = dsaf_read_dev(ddev
,
2625 DSAF_XOD_RCVPKT_CNT_0_REG
+ j
* 0x90);
2626 p
[374 + i
] = dsaf_read_dev(ddev
,
2627 DSAF_XOD_RCVTC0_CNT_0_REG
+ j
* 0x90);
2628 p
[377 + i
] = dsaf_read_dev(ddev
,
2629 DSAF_XOD_RCVTC1_CNT_0_REG
+ j
* 0x90);
2630 p
[380 + i
] = dsaf_read_dev(ddev
,
2631 DSAF_XOD_RCVTC2_CNT_0_REG
+ j
* 0x90);
2632 p
[383 + i
] = dsaf_read_dev(ddev
,
2633 DSAF_XOD_RCVTC3_CNT_0_REG
+ j
* 0x90);
2634 p
[386 + i
] = dsaf_read_dev(ddev
,
2635 DSAF_XOD_RCVVC0_CNT_0_REG
+ j
* 0x90);
2636 p
[389 + i
] = dsaf_read_dev(ddev
,
2637 DSAF_XOD_RCVVC1_CNT_0_REG
+ j
* 0x90);
2640 p
[392] = dsaf_read_dev(ddev
,
2641 DSAF_XOD_XGE_RCVIN0_CNT_0_REG
+ port
* 0x90);
2642 p
[393] = dsaf_read_dev(ddev
,
2643 DSAF_XOD_XGE_RCVIN1_CNT_0_REG
+ port
* 0x90);
2644 p
[394] = dsaf_read_dev(ddev
,
2645 DSAF_XOD_XGE_RCVIN2_CNT_0_REG
+ port
* 0x90);
2646 p
[395] = dsaf_read_dev(ddev
,
2647 DSAF_XOD_XGE_RCVIN3_CNT_0_REG
+ port
* 0x90);
2648 p
[396] = dsaf_read_dev(ddev
,
2649 DSAF_XOD_XGE_RCVIN4_CNT_0_REG
+ port
* 0x90);
2650 p
[397] = dsaf_read_dev(ddev
,
2651 DSAF_XOD_XGE_RCVIN5_CNT_0_REG
+ port
* 0x90);
2652 p
[398] = dsaf_read_dev(ddev
,
2653 DSAF_XOD_XGE_RCVIN6_CNT_0_REG
+ port
* 0x90);
2654 p
[399] = dsaf_read_dev(ddev
,
2655 DSAF_XOD_XGE_RCVIN7_CNT_0_REG
+ port
* 0x90);
2656 p
[400] = dsaf_read_dev(ddev
,
2657 DSAF_XOD_PPE_RCVIN0_CNT_0_REG
+ port
* 0x90);
2658 p
[401] = dsaf_read_dev(ddev
,
2659 DSAF_XOD_PPE_RCVIN1_CNT_0_REG
+ port
* 0x90);
2660 p
[402] = dsaf_read_dev(ddev
,
2661 DSAF_XOD_ROCEE_RCVIN0_CNT_0_REG
+ port
* 0x90);
2662 p
[403] = dsaf_read_dev(ddev
,
2663 DSAF_XOD_ROCEE_RCVIN1_CNT_0_REG
+ port
* 0x90);
2664 p
[404] = dsaf_read_dev(ddev
,
2665 DSAF_XOD_FIFO_STATUS_0_REG
+ port
* 0x90);
2667 /* dsaf voq registers */
2668 for (i
= 0; i
< DSAF_VOQ_NUM
/ DSAF_COMM_CHN
; i
++) {
2669 j
= (i
* DSAF_COMM_CHN
+ port
) * 0x90;
2670 p
[405 + i
] = dsaf_read_dev(ddev
,
2671 DSAF_VOQ_ECC_INVERT_EN_0_REG
+ j
);
2672 p
[408 + i
] = dsaf_read_dev(ddev
,
2673 DSAF_VOQ_SRAM_PKT_NUM_0_REG
+ j
);
2674 p
[411 + i
] = dsaf_read_dev(ddev
, DSAF_VOQ_IN_PKT_NUM_0_REG
+ j
);
2675 p
[414 + i
] = dsaf_read_dev(ddev
,
2676 DSAF_VOQ_OUT_PKT_NUM_0_REG
+ j
);
2677 p
[417 + i
] = dsaf_read_dev(ddev
,
2678 DSAF_VOQ_ECC_ERR_ADDR_0_REG
+ j
);
2679 p
[420 + i
] = dsaf_read_dev(ddev
, DSAF_VOQ_BP_STATUS_0_REG
+ j
);
2680 p
[423 + i
] = dsaf_read_dev(ddev
, DSAF_VOQ_SPUP_IDLE_0_REG
+ j
);
2681 p
[426 + i
] = dsaf_read_dev(ddev
,
2682 DSAF_VOQ_XGE_XOD_REQ_0_0_REG
+ j
);
2683 p
[429 + i
] = dsaf_read_dev(ddev
,
2684 DSAF_VOQ_XGE_XOD_REQ_1_0_REG
+ j
);
2685 p
[432 + i
] = dsaf_read_dev(ddev
,
2686 DSAF_VOQ_PPE_XOD_REQ_0_REG
+ j
);
2687 p
[435 + i
] = dsaf_read_dev(ddev
,
2688 DSAF_VOQ_ROCEE_XOD_REQ_0_REG
+ j
);
2689 p
[438 + i
] = dsaf_read_dev(ddev
,
2690 DSAF_VOQ_BP_ALL_THRD_0_REG
+ j
);
2693 /* dsaf tbl registers */
2694 p
[441] = dsaf_read_dev(ddev
, DSAF_TBL_CTRL_0_REG
);
2695 p
[442] = dsaf_read_dev(ddev
, DSAF_TBL_INT_MSK_0_REG
);
2696 p
[443] = dsaf_read_dev(ddev
, DSAF_TBL_INT_SRC_0_REG
);
2697 p
[444] = dsaf_read_dev(ddev
, DSAF_TBL_INT_STS_0_REG
);
2698 p
[445] = dsaf_read_dev(ddev
, DSAF_TBL_TCAM_ADDR_0_REG
);
2699 p
[446] = dsaf_read_dev(ddev
, DSAF_TBL_LINE_ADDR_0_REG
);
2700 p
[447] = dsaf_read_dev(ddev
, DSAF_TBL_TCAM_HIGH_0_REG
);
2701 p
[448] = dsaf_read_dev(ddev
, DSAF_TBL_TCAM_LOW_0_REG
);
2702 p
[449] = dsaf_read_dev(ddev
, DSAF_TBL_TCAM_MCAST_CFG_4_0_REG
);
2703 p
[450] = dsaf_read_dev(ddev
, DSAF_TBL_TCAM_MCAST_CFG_3_0_REG
);
2704 p
[451] = dsaf_read_dev(ddev
, DSAF_TBL_TCAM_MCAST_CFG_2_0_REG
);
2705 p
[452] = dsaf_read_dev(ddev
, DSAF_TBL_TCAM_MCAST_CFG_1_0_REG
);
2706 p
[453] = dsaf_read_dev(ddev
, DSAF_TBL_TCAM_MCAST_CFG_0_0_REG
);
2707 p
[454] = dsaf_read_dev(ddev
, DSAF_TBL_TCAM_UCAST_CFG_0_REG
);
2708 p
[455] = dsaf_read_dev(ddev
, DSAF_TBL_LIN_CFG_0_REG
);
2709 p
[456] = dsaf_read_dev(ddev
, DSAF_TBL_TCAM_RDATA_HIGH_0_REG
);
2710 p
[457] = dsaf_read_dev(ddev
, DSAF_TBL_TCAM_RDATA_LOW_0_REG
);
2711 p
[458] = dsaf_read_dev(ddev
, DSAF_TBL_TCAM_RAM_RDATA4_0_REG
);
2712 p
[459] = dsaf_read_dev(ddev
, DSAF_TBL_TCAM_RAM_RDATA3_0_REG
);
2713 p
[460] = dsaf_read_dev(ddev
, DSAF_TBL_TCAM_RAM_RDATA2_0_REG
);
2714 p
[461] = dsaf_read_dev(ddev
, DSAF_TBL_TCAM_RAM_RDATA1_0_REG
);
2715 p
[462] = dsaf_read_dev(ddev
, DSAF_TBL_TCAM_RAM_RDATA0_0_REG
);
2716 p
[463] = dsaf_read_dev(ddev
, DSAF_TBL_LIN_RDATA_0_REG
);
2718 for (i
= 0; i
< DSAF_SW_PORT_NUM
; i
++) {
2720 p
[464 + 2 * i
] = dsaf_read_dev(ddev
,
2721 DSAF_TBL_DA0_MIS_INFO1_0_REG
+ j
);
2722 p
[465 + 2 * i
] = dsaf_read_dev(ddev
,
2723 DSAF_TBL_DA0_MIS_INFO0_0_REG
+ j
);
2726 p
[480] = dsaf_read_dev(ddev
, DSAF_TBL_SA_MIS_INFO2_0_REG
);
2727 p
[481] = dsaf_read_dev(ddev
, DSAF_TBL_SA_MIS_INFO1_0_REG
);
2728 p
[482] = dsaf_read_dev(ddev
, DSAF_TBL_SA_MIS_INFO0_0_REG
);
2729 p
[483] = dsaf_read_dev(ddev
, DSAF_TBL_PUL_0_REG
);
2730 p
[484] = dsaf_read_dev(ddev
, DSAF_TBL_OLD_RSLT_0_REG
);
2731 p
[485] = dsaf_read_dev(ddev
, DSAF_TBL_OLD_SCAN_VAL_0_REG
);
2732 p
[486] = dsaf_read_dev(ddev
, DSAF_TBL_DFX_CTRL_0_REG
);
2733 p
[487] = dsaf_read_dev(ddev
, DSAF_TBL_DFX_STAT_0_REG
);
2734 p
[488] = dsaf_read_dev(ddev
, DSAF_TBL_DFX_STAT_2_0_REG
);
2735 p
[489] = dsaf_read_dev(ddev
, DSAF_TBL_LKUP_NUM_I_0_REG
);
2736 p
[490] = dsaf_read_dev(ddev
, DSAF_TBL_LKUP_NUM_O_0_REG
);
2737 p
[491] = dsaf_read_dev(ddev
, DSAF_TBL_UCAST_BCAST_MIS_INFO_0_0_REG
);
2739 /* dsaf other registers */
2740 p
[492] = dsaf_read_dev(ddev
, DSAF_INODE_FIFO_WL_0_REG
+ port
* 0x4);
2741 p
[493] = dsaf_read_dev(ddev
, DSAF_ONODE_FIFO_WL_0_REG
+ port
* 0x4);
2742 p
[494] = dsaf_read_dev(ddev
, DSAF_XGE_GE_WORK_MODE_0_REG
+ port
* 0x4);
2743 p
[495] = dsaf_read_dev(ddev
,
2744 DSAF_XGE_APP_RX_LINK_UP_0_REG
+ port
* 0x4);
2745 p
[496] = dsaf_read_dev(ddev
, DSAF_NETPORT_CTRL_SIG_0_REG
+ port
* 0x4);
2746 p
[497] = dsaf_read_dev(ddev
, DSAF_XGE_CTRL_SIG_CFG_0_REG
+ port
* 0x4);
2749 p
[498] = dsaf_read_dev(ddev
, DSAF_PAUSE_CFG_REG
+ port
* 0x4);
2751 /* mark end of dsaf regs */
2752 for (i
= 499; i
< 504; i
++)
2756 static char *hns_dsaf_get_node_stats_strings(char *data
, int node
,
2757 struct dsaf_device
*dsaf_dev
)
2761 bool is_ver1
= AE_IS_VER1(dsaf_dev
->dsaf_ver
);
2763 snprintf(buff
, ETH_GSTRING_LEN
, "innod%d_pad_drop_pkts", node
);
2764 buff
+= ETH_GSTRING_LEN
;
2765 snprintf(buff
, ETH_GSTRING_LEN
, "innod%d_manage_pkts", node
);
2766 buff
+= ETH_GSTRING_LEN
;
2767 snprintf(buff
, ETH_GSTRING_LEN
, "innod%d_rx_pkts", node
);
2768 buff
+= ETH_GSTRING_LEN
;
2769 snprintf(buff
, ETH_GSTRING_LEN
, "innod%d_rx_pkt_id", node
);
2770 buff
+= ETH_GSTRING_LEN
;
2771 snprintf(buff
, ETH_GSTRING_LEN
, "innod%d_rx_pause_frame", node
);
2772 buff
+= ETH_GSTRING_LEN
;
2773 snprintf(buff
, ETH_GSTRING_LEN
, "innod%d_release_buf_num", node
);
2774 buff
+= ETH_GSTRING_LEN
;
2775 snprintf(buff
, ETH_GSTRING_LEN
, "innod%d_sbm_drop_pkts", node
);
2776 buff
+= ETH_GSTRING_LEN
;
2777 snprintf(buff
, ETH_GSTRING_LEN
, "innod%d_crc_false_pkts", node
);
2778 buff
+= ETH_GSTRING_LEN
;
2779 snprintf(buff
, ETH_GSTRING_LEN
, "innod%d_bp_drop_pkts", node
);
2780 buff
+= ETH_GSTRING_LEN
;
2781 snprintf(buff
, ETH_GSTRING_LEN
, "innod%d_lookup_rslt_drop_pkts", node
);
2782 buff
+= ETH_GSTRING_LEN
;
2783 snprintf(buff
, ETH_GSTRING_LEN
, "innod%d_local_rslt_fail_pkts", node
);
2784 buff
+= ETH_GSTRING_LEN
;
2785 snprintf(buff
, ETH_GSTRING_LEN
, "innod%d_vlan_drop_pkts", node
);
2786 buff
+= ETH_GSTRING_LEN
;
2787 snprintf(buff
, ETH_GSTRING_LEN
, "innod%d_stp_drop_pkts", node
);
2788 buff
+= ETH_GSTRING_LEN
;
2789 if (node
< DSAF_SERVICE_NW_NUM
&& !is_ver1
) {
2790 for (i
= 0; i
< DSAF_PRIO_NR
; i
++) {
2791 snprintf(buff
+ 0 * ETH_GSTRING_LEN
* DSAF_PRIO_NR
,
2792 ETH_GSTRING_LEN
, "inod%d_pfc_prio%d_pkts",
2794 snprintf(buff
+ 1 * ETH_GSTRING_LEN
* DSAF_PRIO_NR
,
2795 ETH_GSTRING_LEN
, "onod%d_pfc_prio%d_pkts",
2797 buff
+= ETH_GSTRING_LEN
;
2799 buff
+= 1 * DSAF_PRIO_NR
* ETH_GSTRING_LEN
;
2801 snprintf(buff
, ETH_GSTRING_LEN
, "onnod%d_tx_pkts", node
);
2802 buff
+= ETH_GSTRING_LEN
;
2807 static u64
*hns_dsaf_get_node_stats(struct dsaf_device
*ddev
, u64
*data
,
2812 struct dsaf_hw_stats
*hw_stats
= &ddev
->hw_stats
[node_num
];
2813 bool is_ver1
= AE_IS_VER1(ddev
->dsaf_ver
);
2815 p
[0] = hw_stats
->pad_drop
;
2816 p
[1] = hw_stats
->man_pkts
;
2817 p
[2] = hw_stats
->rx_pkts
;
2818 p
[3] = hw_stats
->rx_pkt_id
;
2819 p
[4] = hw_stats
->rx_pause_frame
;
2820 p
[5] = hw_stats
->release_buf_num
;
2821 p
[6] = hw_stats
->sbm_drop
;
2822 p
[7] = hw_stats
->crc_false
;
2823 p
[8] = hw_stats
->bp_drop
;
2824 p
[9] = hw_stats
->rslt_drop
;
2825 p
[10] = hw_stats
->local_addr_false
;
2826 p
[11] = hw_stats
->vlan_drop
;
2827 p
[12] = hw_stats
->stp_drop
;
2828 if (node_num
< DSAF_SERVICE_NW_NUM
&& !is_ver1
) {
2829 for (i
= 0; i
< DSAF_PRIO_NR
; i
++) {
2830 p
[13 + i
+ 0 * DSAF_PRIO_NR
] = hw_stats
->rx_pfc
[i
];
2831 p
[13 + i
+ 1 * DSAF_PRIO_NR
] = hw_stats
->tx_pfc
[i
];
2833 p
[29] = hw_stats
->tx_pkts
;
2837 p
[13] = hw_stats
->tx_pkts
;
2842 *hns_dsaf_get_stats - get dsaf statistic
2844 *@data:statistic value
2847 void hns_dsaf_get_stats(struct dsaf_device
*ddev
, u64
*data
, int port
)
2850 int node_num
= port
;
2852 /* for ge/xge node info */
2853 p
= hns_dsaf_get_node_stats(ddev
, p
, node_num
);
2855 /* for ppe node info */
2856 node_num
= port
+ DSAF_PPE_INODE_BASE
;
2857 (void)hns_dsaf_get_node_stats(ddev
, p
, node_num
);
2861 *hns_dsaf_get_sset_count - get dsaf string set count
2862 *@stringset: type of values in data
2863 *return dsaf string name count
2865 int hns_dsaf_get_sset_count(struct dsaf_device
*dsaf_dev
, int stringset
)
2867 bool is_ver1
= AE_IS_VER1(dsaf_dev
->dsaf_ver
);
2869 if (stringset
== ETH_SS_STATS
) {
2871 return DSAF_STATIC_NUM
;
2873 return DSAF_V2_STATIC_NUM
;
2879 *hns_dsaf_get_strings - get dsaf string set
2880 *@stringset:srting set index
2881 *@data:strings name value
2884 void hns_dsaf_get_strings(int stringset
, u8
*data
, int port
,
2885 struct dsaf_device
*dsaf_dev
)
2887 char *buff
= (char *)data
;
2890 if (stringset
!= ETH_SS_STATS
)
2893 /* for ge/xge node info */
2894 buff
= hns_dsaf_get_node_stats_strings(buff
, node
, dsaf_dev
);
2896 /* for ppe node info */
2897 node
= port
+ DSAF_PPE_INODE_BASE
;
2898 (void)hns_dsaf_get_node_stats_strings(buff
, node
, dsaf_dev
);
2902 *hns_dsaf_get_sset_count - get dsaf regs count
2903 *return dsaf regs count
2905 int hns_dsaf_get_regs_count(void)
2907 return DSAF_DUMP_REGS_NUM
;
2910 /* Reserve the last TCAM entry for promisc support */
2911 #define dsaf_promisc_tcam_entry(port) \
2912 (DSAF_TCAM_SUM - DSAFV2_MAC_FUZZY_TCAM_NUM + (port))
2913 void hns_dsaf_set_promisc_tcam(struct dsaf_device
*dsaf_dev
,
2914 u32 port
, bool enable
)
2916 struct dsaf_drv_priv
*priv
= hns_dsaf_dev_priv(dsaf_dev
);
2917 struct dsaf_drv_soft_mac_tbl
*soft_mac_entry
= priv
->soft_mac_tbl
;
2919 struct dsaf_drv_tbl_tcam_key tbl_tcam_data
, tbl_tcam_mask
;
2920 struct dsaf_tbl_tcam_mcast_cfg mac_data
= {0};
2922 if ((AE_IS_VER1(dsaf_dev
->dsaf_ver
)) || HNS_DSAF_IS_DEBUG(dsaf_dev
))
2925 /* find the tcam entry index for promisc */
2926 entry_index
= dsaf_promisc_tcam_entry(port
);
2928 memset(&tbl_tcam_data
, 0, sizeof(tbl_tcam_data
));
2929 memset(&tbl_tcam_mask
, 0, sizeof(tbl_tcam_mask
));
2931 /* config key mask */
2933 dsaf_set_field(tbl_tcam_data
.low
.bits
.port_vlan
,
2934 DSAF_TBL_TCAM_KEY_PORT_M
,
2935 DSAF_TBL_TCAM_KEY_PORT_S
, port
);
2936 dsaf_set_field(tbl_tcam_mask
.low
.bits
.port_vlan
,
2937 DSAF_TBL_TCAM_KEY_PORT_M
,
2938 DSAF_TBL_TCAM_KEY_PORT_S
, 0xf);
2941 dsaf_set_bit(mac_data
.tbl_mcast_port_msk
[0],
2942 DSAF_SERVICE_NW_NUM
, true);
2943 mac_data
.tbl_mcast_item_vld
= true; /* item_vld bit */
2945 mac_data
.tbl_mcast_item_vld
= false; /* item_vld bit */
2948 dev_dbg(dsaf_dev
->dev
,
2949 "set_promisc_entry, %s Mac key(%#x:%#x) entry_index%d\n",
2950 dsaf_dev
->ae_dev
.name
, tbl_tcam_data
.high
.val
,
2951 tbl_tcam_data
.low
.val
, entry_index
);
2953 /* config promisc entry with mask */
2954 hns_dsaf_tcam_mc_cfg(dsaf_dev
, entry_index
,
2955 (struct dsaf_tbl_tcam_data
*)&tbl_tcam_data
,
2956 (struct dsaf_tbl_tcam_data
*)&tbl_tcam_mask
,
2959 /* config software entry */
2960 soft_mac_entry
+= entry_index
;
2961 soft_mac_entry
->index
= enable
? entry_index
: DSAF_INVALID_ENTRY_IDX
;
2965 * dsaf_probe - probo dsaf dev
2966 * @pdev: dasf platform device
2967 * retuen 0 - success , negative --fail
2969 static int hns_dsaf_probe(struct platform_device
*pdev
)
2971 struct dsaf_device
*dsaf_dev
;
2974 dsaf_dev
= hns_dsaf_alloc_dev(&pdev
->dev
, sizeof(struct dsaf_drv_priv
));
2975 if (IS_ERR(dsaf_dev
)) {
2976 ret
= PTR_ERR(dsaf_dev
);
2978 "dsaf_probe dsaf_alloc_dev failed, ret = %#x!\n", ret
);
2982 ret
= hns_dsaf_get_cfg(dsaf_dev
);
2986 ret
= hns_dsaf_init(dsaf_dev
);
2990 ret
= hns_mac_init(dsaf_dev
);
2994 ret
= hns_ppe_init(dsaf_dev
);
2998 ret
= hns_dsaf_ae_init(dsaf_dev
);
3005 hns_ppe_uninit(dsaf_dev
);
3008 hns_mac_uninit(dsaf_dev
);
3011 hns_dsaf_free(dsaf_dev
);
3014 hns_dsaf_free_dev(dsaf_dev
);
3020 * dsaf_remove - remove dsaf dev
3021 * @pdev: dasf platform device
3023 static int hns_dsaf_remove(struct platform_device
*pdev
)
3025 struct dsaf_device
*dsaf_dev
= dev_get_drvdata(&pdev
->dev
);
3027 hns_dsaf_ae_uninit(dsaf_dev
);
3029 hns_ppe_uninit(dsaf_dev
);
3031 hns_mac_uninit(dsaf_dev
);
3033 hns_dsaf_free(dsaf_dev
);
3035 hns_dsaf_free_dev(dsaf_dev
);
3040 static const struct of_device_id g_dsaf_match
[] = {
3041 {.compatible
= "hisilicon,hns-dsaf-v1"},
3042 {.compatible
= "hisilicon,hns-dsaf-v2"},
3045 MODULE_DEVICE_TABLE(of
, g_dsaf_match
);
3047 static struct platform_driver g_dsaf_driver
= {
3048 .probe
= hns_dsaf_probe
,
3049 .remove
= hns_dsaf_remove
,
3051 .name
= DSAF_DRV_NAME
,
3052 .of_match_table
= g_dsaf_match
,
3053 .acpi_match_table
= hns_dsaf_acpi_match
,
3057 module_platform_driver(g_dsaf_driver
);
3060 * hns_dsaf_roce_reset - reset dsaf and roce
3061 * @dsaf_fwnode: Pointer to framework node for the dasf
3062 * @enable: false - request reset , true - drop reset
3063 * retuen 0 - success , negative -fail
3065 int hns_dsaf_roce_reset(struct fwnode_handle
*dsaf_fwnode
, bool dereset
)
3067 struct dsaf_device
*dsaf_dev
;
3068 struct platform_device
*pdev
;
3073 const u32 port_map
[DSAF_ROCE_CREDIT_CHN
][DSAF_ROCE_CHAN_MODE_NUM
] = {
3074 {DSAF_ROCE_PORT_0
, DSAF_ROCE_PORT_0
, DSAF_ROCE_PORT_0
},
3075 {DSAF_ROCE_PORT_1
, DSAF_ROCE_PORT_0
, DSAF_ROCE_PORT_0
},
3076 {DSAF_ROCE_PORT_2
, DSAF_ROCE_PORT_1
, DSAF_ROCE_PORT_0
},
3077 {DSAF_ROCE_PORT_3
, DSAF_ROCE_PORT_1
, DSAF_ROCE_PORT_0
},
3078 {DSAF_ROCE_PORT_4
, DSAF_ROCE_PORT_2
, DSAF_ROCE_PORT_1
},
3079 {DSAF_ROCE_PORT_4
, DSAF_ROCE_PORT_2
, DSAF_ROCE_PORT_1
},
3080 {DSAF_ROCE_PORT_5
, DSAF_ROCE_PORT_3
, DSAF_ROCE_PORT_1
},
3081 {DSAF_ROCE_PORT_5
, DSAF_ROCE_PORT_3
, DSAF_ROCE_PORT_1
},
3083 const u32 sl_map
[DSAF_ROCE_CREDIT_CHN
][DSAF_ROCE_CHAN_MODE_NUM
] = {
3084 {DSAF_ROCE_SL_0
, DSAF_ROCE_SL_0
, DSAF_ROCE_SL_0
},
3085 {DSAF_ROCE_SL_0
, DSAF_ROCE_SL_1
, DSAF_ROCE_SL_1
},
3086 {DSAF_ROCE_SL_0
, DSAF_ROCE_SL_0
, DSAF_ROCE_SL_2
},
3087 {DSAF_ROCE_SL_0
, DSAF_ROCE_SL_1
, DSAF_ROCE_SL_3
},
3088 {DSAF_ROCE_SL_0
, DSAF_ROCE_SL_0
, DSAF_ROCE_SL_0
},
3089 {DSAF_ROCE_SL_1
, DSAF_ROCE_SL_1
, DSAF_ROCE_SL_1
},
3090 {DSAF_ROCE_SL_0
, DSAF_ROCE_SL_0
, DSAF_ROCE_SL_2
},
3091 {DSAF_ROCE_SL_1
, DSAF_ROCE_SL_1
, DSAF_ROCE_SL_3
},
3094 /* find the platform device corresponding to fwnode */
3095 if (is_of_node(dsaf_fwnode
)) {
3096 pdev
= of_find_device_by_node(to_of_node(dsaf_fwnode
));
3097 } else if (is_acpi_device_node(dsaf_fwnode
)) {
3098 pdev
= hns_dsaf_find_platform_device(dsaf_fwnode
);
3100 pr_err("fwnode is neither OF or ACPI type\n");
3104 /* check if we were a success in fetching pdev */
3106 pr_err("couldn't find platform device for node\n");
3110 /* retrieve the dsaf_device from the driver data */
3111 dsaf_dev
= dev_get_drvdata(&pdev
->dev
);
3113 dev_err(&pdev
->dev
, "dsaf_dev is NULL\n");
3117 /* now, make sure we are running on compatible SoC */
3118 if (AE_IS_VER1(dsaf_dev
->dsaf_ver
)) {
3119 dev_err(dsaf_dev
->dev
, "%s v1 chip doesn't support RoCE!\n",
3120 dsaf_dev
->ae_dev
.name
);
3124 /* do reset or de-reset according to the flag */
3126 /* reset rocee-channels in dsaf and rocee */
3127 dsaf_dev
->misc_op
->hns_dsaf_srst_chns(dsaf_dev
, DSAF_CHNS_MASK
,
3129 dsaf_dev
->misc_op
->hns_dsaf_roce_srst(dsaf_dev
, false);
3131 /* configure dsaf tx roce correspond to port map and sl map */
3132 mp
= dsaf_read_dev(dsaf_dev
, DSAF_ROCE_PORT_MAP_REG
);
3133 for (i
= 0; i
< DSAF_ROCE_CREDIT_CHN
; i
++)
3134 dsaf_set_field(mp
, 7 << i
* 3, i
* 3,
3135 port_map
[i
][DSAF_ROCE_6PORT_MODE
]);
3136 dsaf_set_field(mp
, 3 << i
* 3, i
* 3, 0);
3137 dsaf_write_dev(dsaf_dev
, DSAF_ROCE_PORT_MAP_REG
, mp
);
3139 sl
= dsaf_read_dev(dsaf_dev
, DSAF_ROCE_SL_MAP_REG
);
3140 for (i
= 0; i
< DSAF_ROCE_CREDIT_CHN
; i
++)
3141 dsaf_set_field(sl
, 3 << i
* 2, i
* 2,
3142 sl_map
[i
][DSAF_ROCE_6PORT_MODE
]);
3143 dsaf_write_dev(dsaf_dev
, DSAF_ROCE_SL_MAP_REG
, sl
);
3145 /* de-reset rocee-channels in dsaf and rocee */
3146 dsaf_dev
->misc_op
->hns_dsaf_srst_chns(dsaf_dev
, DSAF_CHNS_MASK
,
3148 msleep(SRST_TIME_INTERVAL
);
3149 dsaf_dev
->misc_op
->hns_dsaf_roce_srst(dsaf_dev
, true);
3151 /* enable dsaf channel rocee credit */
3152 credit
= dsaf_read_dev(dsaf_dev
, DSAF_SBM_ROCEE_CFG_REG_REG
);
3153 dsaf_set_bit(credit
, DSAF_SBM_ROCEE_CFG_CRD_EN_B
, 0);
3154 dsaf_write_dev(dsaf_dev
, DSAF_SBM_ROCEE_CFG_REG_REG
, credit
);
3156 dsaf_set_bit(credit
, DSAF_SBM_ROCEE_CFG_CRD_EN_B
, 1);
3157 dsaf_write_dev(dsaf_dev
, DSAF_SBM_ROCEE_CFG_REG_REG
, credit
);
3161 EXPORT_SYMBOL(hns_dsaf_roce_reset
);
3163 MODULE_LICENSE("GPL");
3164 MODULE_AUTHOR("Huawei Tech. Co., Ltd.");
3165 MODULE_DESCRIPTION("HNS DSAF driver");
3166 MODULE_VERSION(DSAF_MOD_VERSION
);