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1 // SPDX-License-Identifier: GPL-2.0+
2 // Copyright (c) 2016-2017 Hisilicon Limited.
3
4 #ifndef __HNAE3_H
5 #define __HNAE3_H
6
7 /* Names used in this framework:
8 * ae handle (handle):
9 * a set of queues provided by AE
10 * ring buffer queue (rbq):
11 * the channel between upper layer and the AE, can do tx and rx
12 * ring:
13 * a tx or rx channel within a rbq
14 * ring description (desc):
15 * an element in the ring with packet information
16 * buffer:
17 * a memory region referred by desc with the full packet payload
18 *
19 * "num" means a static number set as a parameter, "count" mean a dynamic
20 * number set while running
21 * "cb" means control block
22 */
23
24 #include <linux/acpi.h>
25 #include <linux/dcbnl.h>
26 #include <linux/delay.h>
27 #include <linux/device.h>
28 #include <linux/module.h>
29 #include <linux/netdevice.h>
30 #include <linux/pci.h>
31 #include <linux/types.h>
32
33 #define HNAE3_MOD_VERSION "1.0"
34
35 /* Device IDs */
36 #define HNAE3_DEV_ID_GE 0xA220
37 #define HNAE3_DEV_ID_25GE 0xA221
38 #define HNAE3_DEV_ID_25GE_RDMA 0xA222
39 #define HNAE3_DEV_ID_25GE_RDMA_MACSEC 0xA223
40 #define HNAE3_DEV_ID_50GE_RDMA 0xA224
41 #define HNAE3_DEV_ID_50GE_RDMA_MACSEC 0xA225
42 #define HNAE3_DEV_ID_100G_RDMA_MACSEC 0xA226
43 #define HNAE3_DEV_ID_100G_VF 0xA22E
44 #define HNAE3_DEV_ID_100G_RDMA_DCB_PFC_VF 0xA22F
45
46 #define HNAE3_CLASS_NAME_SIZE 16
47
48 #define HNAE3_DEV_INITED_B 0x0
49 #define HNAE3_DEV_SUPPORT_ROCE_B 0x1
50 #define HNAE3_DEV_SUPPORT_DCB_B 0x2
51 #define HNAE3_KNIC_CLIENT_INITED_B 0x3
52 #define HNAE3_UNIC_CLIENT_INITED_B 0x4
53 #define HNAE3_ROCE_CLIENT_INITED_B 0x5
54 #define HNAE3_DEV_SUPPORT_FD_B 0x6
55 #define HNAE3_DEV_SUPPORT_GRO_B 0x7
56
57 #define HNAE3_DEV_SUPPORT_ROCE_DCB_BITS (BIT(HNAE3_DEV_SUPPORT_DCB_B) |\
58 BIT(HNAE3_DEV_SUPPORT_ROCE_B))
59
60 #define hnae3_dev_roce_supported(hdev) \
61 hnae3_get_bit(hdev->ae_dev->flag, HNAE3_DEV_SUPPORT_ROCE_B)
62
63 #define hnae3_dev_dcb_supported(hdev) \
64 hnae3_get_bit(hdev->ae_dev->flag, HNAE3_DEV_SUPPORT_DCB_B)
65
66 #define hnae3_dev_fd_supported(hdev) \
67 hnae3_get_bit((hdev)->ae_dev->flag, HNAE3_DEV_SUPPORT_FD_B)
68
69 #define hnae3_dev_gro_supported(hdev) \
70 hnae3_get_bit((hdev)->ae_dev->flag, HNAE3_DEV_SUPPORT_GRO_B)
71
72 #define ring_ptr_move_fw(ring, p) \
73 ((ring)->p = ((ring)->p + 1) % (ring)->desc_num)
74 #define ring_ptr_move_bw(ring, p) \
75 ((ring)->p = ((ring)->p - 1 + (ring)->desc_num) % (ring)->desc_num)
76
77 enum hns_desc_type {
78 DESC_TYPE_SKB,
79 DESC_TYPE_PAGE,
80 };
81
82 struct hnae3_handle;
83
84 struct hnae3_queue {
85 void __iomem *io_base;
86 struct hnae3_ae_algo *ae_algo;
87 struct hnae3_handle *handle;
88 int tqp_index; /* index in a handle */
89 u32 buf_size; /* size for hnae_desc->addr, preset by AE */
90 u16 desc_num; /* total number of desc */
91 };
92
93 /*hnae3 loop mode*/
94 enum hnae3_loop {
95 HNAE3_LOOP_APP,
96 HNAE3_LOOP_SERIAL_SERDES,
97 HNAE3_LOOP_PARALLEL_SERDES,
98 HNAE3_LOOP_PHY,
99 HNAE3_LOOP_NONE,
100 };
101
102 enum hnae3_client_type {
103 HNAE3_CLIENT_KNIC,
104 HNAE3_CLIENT_UNIC,
105 HNAE3_CLIENT_ROCE,
106 };
107
108 enum hnae3_dev_type {
109 HNAE3_DEV_KNIC,
110 HNAE3_DEV_UNIC,
111 };
112
113 /* mac media type */
114 enum hnae3_media_type {
115 HNAE3_MEDIA_TYPE_UNKNOWN,
116 HNAE3_MEDIA_TYPE_FIBER,
117 HNAE3_MEDIA_TYPE_COPPER,
118 HNAE3_MEDIA_TYPE_BACKPLANE,
119 HNAE3_MEDIA_TYPE_NONE,
120 };
121
122 enum hnae3_reset_notify_type {
123 HNAE3_UP_CLIENT,
124 HNAE3_DOWN_CLIENT,
125 HNAE3_INIT_CLIENT,
126 HNAE3_UNINIT_CLIENT,
127 };
128
129 enum hnae3_reset_type {
130 HNAE3_VF_RESET,
131 HNAE3_VF_FUNC_RESET,
132 HNAE3_VF_PF_FUNC_RESET,
133 HNAE3_VF_FULL_RESET,
134 HNAE3_FLR_RESET,
135 HNAE3_FUNC_RESET,
136 HNAE3_CORE_RESET,
137 HNAE3_GLOBAL_RESET,
138 HNAE3_IMP_RESET,
139 HNAE3_NONE_RESET,
140 };
141
142 enum hnae3_flr_state {
143 HNAE3_FLR_DOWN,
144 HNAE3_FLR_DONE,
145 };
146
147 struct hnae3_vector_info {
148 u8 __iomem *io_addr;
149 int vector;
150 };
151
152 #define HNAE3_RING_TYPE_B 0
153 #define HNAE3_RING_TYPE_TX 0
154 #define HNAE3_RING_TYPE_RX 1
155 #define HNAE3_RING_GL_IDX_S 0
156 #define HNAE3_RING_GL_IDX_M GENMASK(1, 0)
157 #define HNAE3_RING_GL_RX 0
158 #define HNAE3_RING_GL_TX 1
159
160 struct hnae3_ring_chain_node {
161 struct hnae3_ring_chain_node *next;
162 u32 tqp_index;
163 u32 flag;
164 u32 int_gl_idx;
165 };
166
167 #define HNAE3_IS_TX_RING(node) \
168 (((node)->flag & (1 << HNAE3_RING_TYPE_B)) == HNAE3_RING_TYPE_TX)
169
170 struct hnae3_client_ops {
171 int (*init_instance)(struct hnae3_handle *handle);
172 void (*uninit_instance)(struct hnae3_handle *handle, bool reset);
173 void (*link_status_change)(struct hnae3_handle *handle, bool state);
174 int (*setup_tc)(struct hnae3_handle *handle, u8 tc);
175 int (*reset_notify)(struct hnae3_handle *handle,
176 enum hnae3_reset_notify_type type);
177 enum hnae3_reset_type (*process_hw_error)(struct hnae3_handle *handle);
178 };
179
180 #define HNAE3_CLIENT_NAME_LENGTH 16
181 struct hnae3_client {
182 char name[HNAE3_CLIENT_NAME_LENGTH];
183 unsigned long state;
184 enum hnae3_client_type type;
185 const struct hnae3_client_ops *ops;
186 struct list_head node;
187 };
188
189 struct hnae3_ae_dev {
190 struct pci_dev *pdev;
191 const struct hnae3_ae_ops *ops;
192 struct list_head node;
193 u32 flag;
194 enum hnae3_dev_type dev_type;
195 enum hnae3_reset_type reset_type;
196 void *priv;
197 };
198
199 /* This struct defines the operation on the handle.
200 *
201 * init_ae_dev(): (mandatory)
202 * Get PF configure from pci_dev and initialize PF hardware
203 * uninit_ae_dev()
204 * Disable PF device and release PF resource
205 * register_client
206 * Register client to ae_dev
207 * unregister_client()
208 * Unregister client from ae_dev
209 * start()
210 * Enable the hardware
211 * stop()
212 * Disable the hardware
213 * start_client()
214 * Inform the hclge that client has been started
215 * stop_client()
216 * Inform the hclge that client has been stopped
217 * get_status()
218 * Get the carrier state of the back channel of the handle, 1 for ok, 0 for
219 * non-ok
220 * get_ksettings_an_result()
221 * Get negotiation status,speed and duplex
222 * update_speed_duplex_h()
223 * Update hardware speed and duplex
224 * get_media_type()
225 * Get media type of MAC
226 * adjust_link()
227 * Adjust link status
228 * set_loopback()
229 * Set loopback
230 * set_promisc_mode
231 * Set promisc mode
232 * set_mtu()
233 * set mtu
234 * get_pauseparam()
235 * get tx and rx of pause frame use
236 * set_pauseparam()
237 * set tx and rx of pause frame use
238 * set_autoneg()
239 * set auto autonegotiation of pause frame use
240 * get_autoneg()
241 * get auto autonegotiation of pause frame use
242 * get_coalesce_usecs()
243 * get usecs to delay a TX interrupt after a packet is sent
244 * get_rx_max_coalesced_frames()
245 * get Maximum number of packets to be sent before a TX interrupt.
246 * set_coalesce_usecs()
247 * set usecs to delay a TX interrupt after a packet is sent
248 * set_coalesce_frames()
249 * set Maximum number of packets to be sent before a TX interrupt.
250 * get_mac_addr()
251 * get mac address
252 * set_mac_addr()
253 * set mac address
254 * add_uc_addr
255 * Add unicast addr to mac table
256 * rm_uc_addr
257 * Remove unicast addr from mac table
258 * set_mc_addr()
259 * Set multicast address
260 * add_mc_addr
261 * Add multicast address to mac table
262 * rm_mc_addr
263 * Remove multicast address from mac table
264 * update_stats()
265 * Update Old network device statistics
266 * get_ethtool_stats()
267 * Get ethtool network device statistics
268 * get_strings()
269 * Get a set of strings that describe the requested objects
270 * get_sset_count()
271 * Get number of strings that @get_strings will write
272 * update_led_status()
273 * Update the led status
274 * set_led_id()
275 * Set led id
276 * get_regs()
277 * Get regs dump
278 * get_regs_len()
279 * Get the len of the regs dump
280 * get_rss_key_size()
281 * Get rss key size
282 * get_rss_indir_size()
283 * Get rss indirection table size
284 * get_rss()
285 * Get rss table
286 * set_rss()
287 * Set rss table
288 * get_tc_size()
289 * Get tc size of handle
290 * get_vector()
291 * Get vector number and vector information
292 * put_vector()
293 * Put the vector in hdev
294 * map_ring_to_vector()
295 * Map rings to vector
296 * unmap_ring_from_vector()
297 * Unmap rings from vector
298 * reset_queue()
299 * Reset queue
300 * get_fw_version()
301 * Get firmware version
302 * get_mdix_mode()
303 * Get media typr of phy
304 * enable_vlan_filter()
305 * Enable vlan filter
306 * set_vlan_filter()
307 * Set vlan filter config of Ports
308 * set_vf_vlan_filter()
309 * Set vlan filter config of vf
310 * enable_hw_strip_rxvtag()
311 * Enable/disable hardware strip vlan tag of packets received
312 */
313 struct hnae3_ae_ops {
314 int (*init_ae_dev)(struct hnae3_ae_dev *ae_dev);
315 void (*uninit_ae_dev)(struct hnae3_ae_dev *ae_dev);
316 void (*flr_prepare)(struct hnae3_ae_dev *ae_dev);
317 void (*flr_done)(struct hnae3_ae_dev *ae_dev);
318 int (*init_client_instance)(struct hnae3_client *client,
319 struct hnae3_ae_dev *ae_dev);
320 void (*uninit_client_instance)(struct hnae3_client *client,
321 struct hnae3_ae_dev *ae_dev);
322 int (*start)(struct hnae3_handle *handle);
323 void (*stop)(struct hnae3_handle *handle);
324 int (*client_start)(struct hnae3_handle *handle);
325 void (*client_stop)(struct hnae3_handle *handle);
326 int (*get_status)(struct hnae3_handle *handle);
327 void (*get_ksettings_an_result)(struct hnae3_handle *handle,
328 u8 *auto_neg, u32 *speed, u8 *duplex);
329
330 int (*update_speed_duplex_h)(struct hnae3_handle *handle);
331 int (*cfg_mac_speed_dup_h)(struct hnae3_handle *handle, int speed,
332 u8 duplex);
333
334 void (*get_media_type)(struct hnae3_handle *handle, u8 *media_type);
335 void (*adjust_link)(struct hnae3_handle *handle, int speed, int duplex);
336 int (*set_loopback)(struct hnae3_handle *handle,
337 enum hnae3_loop loop_mode, bool en);
338
339 int (*set_promisc_mode)(struct hnae3_handle *handle, bool en_uc_pmc,
340 bool en_mc_pmc);
341 int (*set_mtu)(struct hnae3_handle *handle, int new_mtu);
342
343 void (*get_pauseparam)(struct hnae3_handle *handle,
344 u32 *auto_neg, u32 *rx_en, u32 *tx_en);
345 int (*set_pauseparam)(struct hnae3_handle *handle,
346 u32 auto_neg, u32 rx_en, u32 tx_en);
347
348 int (*set_autoneg)(struct hnae3_handle *handle, bool enable);
349 int (*get_autoneg)(struct hnae3_handle *handle);
350
351 void (*get_coalesce_usecs)(struct hnae3_handle *handle,
352 u32 *tx_usecs, u32 *rx_usecs);
353 void (*get_rx_max_coalesced_frames)(struct hnae3_handle *handle,
354 u32 *tx_frames, u32 *rx_frames);
355 int (*set_coalesce_usecs)(struct hnae3_handle *handle, u32 timeout);
356 int (*set_coalesce_frames)(struct hnae3_handle *handle,
357 u32 coalesce_frames);
358 void (*get_coalesce_range)(struct hnae3_handle *handle,
359 u32 *tx_frames_low, u32 *rx_frames_low,
360 u32 *tx_frames_high, u32 *rx_frames_high,
361 u32 *tx_usecs_low, u32 *rx_usecs_low,
362 u32 *tx_usecs_high, u32 *rx_usecs_high);
363
364 void (*get_mac_addr)(struct hnae3_handle *handle, u8 *p);
365 int (*set_mac_addr)(struct hnae3_handle *handle, void *p,
366 bool is_first);
367 int (*do_ioctl)(struct hnae3_handle *handle,
368 struct ifreq *ifr, int cmd);
369 int (*add_uc_addr)(struct hnae3_handle *handle,
370 const unsigned char *addr);
371 int (*rm_uc_addr)(struct hnae3_handle *handle,
372 const unsigned char *addr);
373 int (*set_mc_addr)(struct hnae3_handle *handle, void *addr);
374 int (*add_mc_addr)(struct hnae3_handle *handle,
375 const unsigned char *addr);
376 int (*rm_mc_addr)(struct hnae3_handle *handle,
377 const unsigned char *addr);
378 void (*set_tso_stats)(struct hnae3_handle *handle, int enable);
379 void (*update_stats)(struct hnae3_handle *handle,
380 struct net_device_stats *net_stats);
381 void (*get_stats)(struct hnae3_handle *handle, u64 *data);
382
383 void (*get_strings)(struct hnae3_handle *handle,
384 u32 stringset, u8 *data);
385 int (*get_sset_count)(struct hnae3_handle *handle, int stringset);
386
387 void (*get_regs)(struct hnae3_handle *handle, u32 *version,
388 void *data);
389 int (*get_regs_len)(struct hnae3_handle *handle);
390
391 u32 (*get_rss_key_size)(struct hnae3_handle *handle);
392 u32 (*get_rss_indir_size)(struct hnae3_handle *handle);
393 int (*get_rss)(struct hnae3_handle *handle, u32 *indir, u8 *key,
394 u8 *hfunc);
395 int (*set_rss)(struct hnae3_handle *handle, const u32 *indir,
396 const u8 *key, const u8 hfunc);
397 int (*set_rss_tuple)(struct hnae3_handle *handle,
398 struct ethtool_rxnfc *cmd);
399 int (*get_rss_tuple)(struct hnae3_handle *handle,
400 struct ethtool_rxnfc *cmd);
401
402 int (*get_tc_size)(struct hnae3_handle *handle);
403
404 int (*get_vector)(struct hnae3_handle *handle, u16 vector_num,
405 struct hnae3_vector_info *vector_info);
406 int (*put_vector)(struct hnae3_handle *handle, int vector_num);
407 int (*map_ring_to_vector)(struct hnae3_handle *handle,
408 int vector_num,
409 struct hnae3_ring_chain_node *vr_chain);
410 int (*unmap_ring_from_vector)(struct hnae3_handle *handle,
411 int vector_num,
412 struct hnae3_ring_chain_node *vr_chain);
413
414 int (*reset_queue)(struct hnae3_handle *handle, u16 queue_id);
415 u32 (*get_fw_version)(struct hnae3_handle *handle);
416 void (*get_mdix_mode)(struct hnae3_handle *handle,
417 u8 *tp_mdix_ctrl, u8 *tp_mdix);
418
419 void (*enable_vlan_filter)(struct hnae3_handle *handle, bool enable);
420 int (*set_vlan_filter)(struct hnae3_handle *handle, __be16 proto,
421 u16 vlan_id, bool is_kill);
422 int (*set_vf_vlan_filter)(struct hnae3_handle *handle, int vfid,
423 u16 vlan, u8 qos, __be16 proto);
424 int (*enable_hw_strip_rxvtag)(struct hnae3_handle *handle, bool enable);
425 void (*reset_event)(struct pci_dev *pdev, struct hnae3_handle *handle);
426 void (*set_default_reset_request)(struct hnae3_ae_dev *ae_dev,
427 enum hnae3_reset_type rst_type);
428 void (*get_channels)(struct hnae3_handle *handle,
429 struct ethtool_channels *ch);
430 void (*get_tqps_and_rss_info)(struct hnae3_handle *h,
431 u16 *alloc_tqps, u16 *max_rss_size);
432 int (*set_channels)(struct hnae3_handle *handle, u32 new_tqps_num);
433 void (*get_flowctrl_adv)(struct hnae3_handle *handle,
434 u32 *flowctrl_adv);
435 int (*set_led_id)(struct hnae3_handle *handle,
436 enum ethtool_phys_id_state status);
437 void (*get_link_mode)(struct hnae3_handle *handle,
438 unsigned long *supported,
439 unsigned long *advertising);
440 int (*add_fd_entry)(struct hnae3_handle *handle,
441 struct ethtool_rxnfc *cmd);
442 int (*del_fd_entry)(struct hnae3_handle *handle,
443 struct ethtool_rxnfc *cmd);
444 void (*del_all_fd_entries)(struct hnae3_handle *handle,
445 bool clear_list);
446 int (*get_fd_rule_cnt)(struct hnae3_handle *handle,
447 struct ethtool_rxnfc *cmd);
448 int (*get_fd_rule_info)(struct hnae3_handle *handle,
449 struct ethtool_rxnfc *cmd);
450 int (*get_fd_all_rules)(struct hnae3_handle *handle,
451 struct ethtool_rxnfc *cmd, u32 *rule_locs);
452 int (*restore_fd_rules)(struct hnae3_handle *handle);
453 void (*enable_fd)(struct hnae3_handle *handle, bool enable);
454 int (*dbg_run_cmd)(struct hnae3_handle *handle, char *cmd_buf);
455 pci_ers_result_t (*process_hw_error)(struct hnae3_ae_dev *ae_dev);
456 bool (*get_hw_reset_stat)(struct hnae3_handle *handle);
457 bool (*ae_dev_resetting)(struct hnae3_handle *handle);
458 unsigned long (*ae_dev_reset_cnt)(struct hnae3_handle *handle);
459 };
460
461 struct hnae3_dcb_ops {
462 /* IEEE 802.1Qaz std */
463 int (*ieee_getets)(struct hnae3_handle *, struct ieee_ets *);
464 int (*ieee_setets)(struct hnae3_handle *, struct ieee_ets *);
465 int (*ieee_getpfc)(struct hnae3_handle *, struct ieee_pfc *);
466 int (*ieee_setpfc)(struct hnae3_handle *, struct ieee_pfc *);
467
468 /* DCBX configuration */
469 u8 (*getdcbx)(struct hnae3_handle *);
470 u8 (*setdcbx)(struct hnae3_handle *, u8);
471
472 int (*map_update)(struct hnae3_handle *);
473 int (*setup_tc)(struct hnae3_handle *, u8, u8 *);
474 };
475
476 struct hnae3_ae_algo {
477 const struct hnae3_ae_ops *ops;
478 struct list_head node;
479 const struct pci_device_id *pdev_id_table;
480 };
481
482 #define HNAE3_INT_NAME_LEN (IFNAMSIZ + 16)
483 #define HNAE3_ITR_COUNTDOWN_START 100
484
485 struct hnae3_tc_info {
486 u16 tqp_offset; /* TQP offset from base TQP */
487 u16 tqp_count; /* Total TQPs */
488 u8 tc; /* TC index */
489 bool enable; /* If this TC is enable or not */
490 };
491
492 #define HNAE3_MAX_TC 8
493 #define HNAE3_MAX_USER_PRIO 8
494 struct hnae3_knic_private_info {
495 struct net_device *netdev; /* Set by KNIC client when init instance */
496 u16 rss_size; /* Allocated RSS queues */
497 u16 rx_buf_len;
498 u16 num_desc;
499
500 u8 num_tc; /* Total number of enabled TCs */
501 u8 prio_tc[HNAE3_MAX_USER_PRIO]; /* TC indexed by prio */
502 struct hnae3_tc_info tc_info[HNAE3_MAX_TC]; /* Idx of array is HW TC */
503
504 u16 num_tqps; /* total number of TQPs in this handle */
505 struct hnae3_queue **tqp; /* array base of all TQPs in this instance */
506 const struct hnae3_dcb_ops *dcb_ops;
507
508 u16 int_rl_setting;
509 enum pkt_hash_types rss_type;
510 };
511
512 struct hnae3_roce_private_info {
513 struct net_device *netdev;
514 void __iomem *roce_io_base;
515 int base_vector;
516 int num_vectors;
517
518 /* The below attributes defined for RoCE client, hnae3 gives
519 * initial values to them, and RoCE client can modify and use
520 * them.
521 */
522 unsigned long reset_state;
523 unsigned long instance_state;
524 unsigned long state;
525 };
526
527 struct hnae3_unic_private_info {
528 struct net_device *netdev;
529 u16 rx_buf_len;
530 u16 num_desc;
531 u16 num_tqps; /* total number of tqps in this handle */
532 struct hnae3_queue **tqp; /* array base of all TQPs of this instance */
533 };
534
535 #define HNAE3_SUPPORT_APP_LOOPBACK BIT(0)
536 #define HNAE3_SUPPORT_PHY_LOOPBACK BIT(1)
537 #define HNAE3_SUPPORT_SERDES_SERIAL_LOOPBACK BIT(2)
538 #define HNAE3_SUPPORT_VF BIT(3)
539 #define HNAE3_SUPPORT_SERDES_PARALLEL_LOOPBACK BIT(4)
540
541 #define HNAE3_USER_UPE BIT(0) /* unicast promisc enabled by user */
542 #define HNAE3_USER_MPE BIT(1) /* mulitcast promisc enabled by user */
543 #define HNAE3_BPE BIT(2) /* broadcast promisc enable */
544 #define HNAE3_OVERFLOW_UPE BIT(3) /* unicast mac vlan overflow */
545 #define HNAE3_OVERFLOW_MPE BIT(4) /* multicast mac vlan overflow */
546 #define HNAE3_VLAN_FLTR BIT(5) /* enable vlan filter */
547 #define HNAE3_UPE (HNAE3_USER_UPE | HNAE3_OVERFLOW_UPE)
548 #define HNAE3_MPE (HNAE3_USER_MPE | HNAE3_OVERFLOW_MPE)
549
550 struct hnae3_handle {
551 struct hnae3_client *client;
552 struct pci_dev *pdev;
553 void *priv;
554 struct hnae3_ae_algo *ae_algo; /* the class who provides this handle */
555 u64 flags; /* Indicate the capabilities for this handle*/
556
557 union {
558 struct net_device *netdev; /* first member */
559 struct hnae3_knic_private_info kinfo;
560 struct hnae3_unic_private_info uinfo;
561 struct hnae3_roce_private_info rinfo;
562 };
563
564 u32 numa_node_mask; /* for multi-chip support */
565
566 u8 netdev_flags;
567 struct dentry *hnae3_dbgfs;
568 };
569
570 #define hnae3_set_field(origin, mask, shift, val) \
571 do { \
572 (origin) &= (~(mask)); \
573 (origin) |= ((val) << (shift)) & (mask); \
574 } while (0)
575 #define hnae3_get_field(origin, mask, shift) (((origin) & (mask)) >> (shift))
576
577 #define hnae3_set_bit(origin, shift, val) \
578 hnae3_set_field((origin), (0x1 << (shift)), (shift), (val))
579 #define hnae3_get_bit(origin, shift) \
580 hnae3_get_field((origin), (0x1 << (shift)), (shift))
581
582 void hnae3_register_ae_dev(struct hnae3_ae_dev *ae_dev);
583 void hnae3_unregister_ae_dev(struct hnae3_ae_dev *ae_dev);
584
585 void hnae3_unregister_ae_algo(struct hnae3_ae_algo *ae_algo);
586 void hnae3_register_ae_algo(struct hnae3_ae_algo *ae_algo);
587
588 void hnae3_unregister_client(struct hnae3_client *client);
589 int hnae3_register_client(struct hnae3_client *client);
590
591 void hnae3_set_client_init_flag(struct hnae3_client *client,
592 struct hnae3_ae_dev *ae_dev, int inited);
593 #endif