drivers/net/ethernet/hisilicon/hns3/hnae3.h

   1 /*
   2  * Copyright (c) 2016-2017 Hisilicon Limited.
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License as published by
   6  * the Free Software Foundation; either version 2 of the License, or
   7  * (at your option) any later version.
   8  */
   9
  10 #ifndef __HNAE3_H
  11 #define __HNAE3_H
  12
  13 /* Names used in this framework:
  14  *      ae handle (handle):
  15  *        a set of queues provided by AE
  16  *      ring buffer queue (rbq):
  17  *        the channel between upper layer and the AE, can do tx and rx
  18  *      ring:
  19  *        a tx or rx channel within a rbq
  20  *      ring description (desc):
  21  *        an element in the ring with packet information
  22  *      buffer:
  23  *        a memory region referred by desc with the full packet payload
  24  *
  25  * "num" means a static number set as a parameter, "count" mean a dynamic
  26  *   number set while running
  27  * "cb" means control block
  28  */
  29
  30 #include <linux/acpi.h>
  31 #include <linux/dcbnl.h>
  32 #include <linux/delay.h>
  33 #include <linux/device.h>
  34 #include <linux/module.h>
  35 #include <linux/netdevice.h>
  36 #include <linux/pci.h>
  37 #include <linux/types.h>
  38
  39 /* Device IDs */
  40 #define HNAE3_DEV_ID_GE                         0xA220
  41 #define HNAE3_DEV_ID_25GE                       0xA221
  42 #define HNAE3_DEV_ID_25GE_RDMA                  0xA222
  43 #define HNAE3_DEV_ID_25GE_RDMA_MACSEC           0xA223
  44 #define HNAE3_DEV_ID_50GE_RDMA                  0xA224
  45 #define HNAE3_DEV_ID_50GE_RDMA_MACSEC           0xA225
  46 #define HNAE3_DEV_ID_100G_RDMA_MACSEC           0xA226
  47 #define HNAE3_DEV_ID_100G_VF                    0xA22E
  48 #define HNAE3_DEV_ID_100G_RDMA_DCB_PFC_VF       0xA22F
  49
  50 #define HNAE3_CLASS_NAME_SIZE 16
  51
  52 #define HNAE3_DEV_INITED_B                      0x0
  53 #define HNAE3_DEV_SUPPORT_ROCE_B                0x1
  54 #define HNAE3_DEV_SUPPORT_DCB_B                 0x2
  55
  56 #define HNAE3_DEV_SUPPORT_ROCE_DCB_BITS (BIT(HNAE3_DEV_SUPPORT_DCB_B) |\
  57                 BIT(HNAE3_DEV_SUPPORT_ROCE_B))
  58
  59 #define hnae3_dev_roce_supported(hdev) \
  60         hnae_get_bit(hdev->ae_dev->flag, HNAE3_DEV_SUPPORT_ROCE_B)
  61
  62 #define hnae3_dev_dcb_supported(hdev) \
  63         hnae_get_bit(hdev->ae_dev->flag, HNAE3_DEV_SUPPORT_DCB_B)
  64
  65 #define ring_ptr_move_fw(ring, p) \
  66         ((ring)->p = ((ring)->p + 1) % (ring)->desc_num)
  67 #define ring_ptr_move_bw(ring, p) \
  68         ((ring)->p = ((ring)->p - 1 + (ring)->desc_num) % (ring)->desc_num)
  69
  70 enum hns_desc_type {
  71         DESC_TYPE_SKB,
  72         DESC_TYPE_PAGE,
  73 };
  74
  75 struct hnae3_handle;
  76
  77 struct hnae3_queue {
  78         void __iomem *io_base;
  79         struct hnae3_ae_algo *ae_algo;
  80         struct hnae3_handle *handle;
  81         int tqp_index;  /* index in a handle */
  82         u32 buf_size;   /* size for hnae_desc->addr, preset by AE */
  83         u16 desc_num;   /* total number of desc */
  84 };
  85
  86 /*hnae3 loop mode*/
  87 enum hnae3_loop {
  88         HNAE3_MAC_INTER_LOOP_MAC,
  89         HNAE3_MAC_INTER_LOOP_SERDES,
  90         HNAE3_MAC_INTER_LOOP_PHY,
  91         HNAE3_MAC_LOOP_NONE,
  92 };
  93
  94 enum hnae3_client_type {
  95         HNAE3_CLIENT_KNIC,
  96         HNAE3_CLIENT_UNIC,
  97         HNAE3_CLIENT_ROCE,
  98 };
  99
 100 enum hnae3_dev_type {
 101         HNAE3_DEV_KNIC,
 102         HNAE3_DEV_UNIC,
 103 };
 104
 105 /* mac media type */
 106 enum hnae3_media_type {
 107         HNAE3_MEDIA_TYPE_UNKNOWN,
 108         HNAE3_MEDIA_TYPE_FIBER,
 109         HNAE3_MEDIA_TYPE_COPPER,
 110         HNAE3_MEDIA_TYPE_BACKPLANE,
 111 };
 112
 113 enum hnae3_reset_notify_type {
 114         HNAE3_UP_CLIENT,
 115         HNAE3_DOWN_CLIENT,
 116         HNAE3_INIT_CLIENT,
 117         HNAE3_UNINIT_CLIENT,
 118 };
 119
 120 enum hnae3_reset_type {
 121         HNAE3_FUNC_RESET,
 122         HNAE3_CORE_RESET,
 123         HNAE3_GLOBAL_RESET,
 124         HNAE3_IMP_RESET,
 125         HNAE3_NONE_RESET,
 126 };
 127
 128 struct hnae3_vector_info {
 129         u8 __iomem *io_addr;
 130         int vector;
 131 };
 132
 133 #define HNAE3_RING_TYPE_B 0
 134 #define HNAE3_RING_TYPE_TX 0
 135 #define HNAE3_RING_TYPE_RX 1
 136
 137 struct hnae3_ring_chain_node {
 138         struct hnae3_ring_chain_node *next;
 139         u32 tqp_index;
 140         u32 flag;
 141 };
 142
 143 #define HNAE3_IS_TX_RING(node) \
 144         (((node)->flag & (1 << HNAE3_RING_TYPE_B)) == HNAE3_RING_TYPE_TX)
 145
 146 struct hnae3_client_ops {
 147         int (*init_instance)(struct hnae3_handle *handle);
 148         void (*uninit_instance)(struct hnae3_handle *handle, bool reset);
 149         void (*link_status_change)(struct hnae3_handle *handle, bool state);
 150         int (*setup_tc)(struct hnae3_handle *handle, u8 tc);
 151         int (*reset_notify)(struct hnae3_handle *handle,
 152                             enum hnae3_reset_notify_type type);
 153 };
 154
 155 #define HNAE3_CLIENT_NAME_LENGTH 16
 156 struct hnae3_client {
 157         char name[HNAE3_CLIENT_NAME_LENGTH];
 158         u16 version;
 159         unsigned long state;
 160         enum hnae3_client_type type;
 161         const struct hnae3_client_ops *ops;
 162         struct list_head node;
 163 };
 164
 165 struct hnae3_ae_dev {
 166         struct pci_dev *pdev;
 167         const struct hnae3_ae_ops *ops;
 168         struct list_head node;
 169         u32 flag;
 170         enum hnae3_dev_type dev_type;
 171         void *priv;
 172 };
 173
 174 /* This struct defines the operation on the handle.
 175  *
 176  * init_ae_dev(): (mandatory)
 177  *   Get PF configure from pci_dev and initialize PF hardware
 178  * uninit_ae_dev()
 179  *   Disable PF device and release PF resource
 180  * register_client
 181  *   Register client to ae_dev
 182  * unregister_client()
 183  *   Unregister client from ae_dev
 184  * start()
 185  *   Enable the hardware
 186  * stop()
 187  *   Disable the hardware
 188  * get_status()
 189  *   Get the carrier state of the back channel of the handle, 1 for ok, 0 for
 190  *   non-ok
 191  * get_ksettings_an_result()
 192  *   Get negotiation status,speed and duplex
 193  * update_speed_duplex_h()
 194  *   Update hardware speed and duplex
 195  * get_media_type()
 196  *   Get media type of MAC
 197  * adjust_link()
 198  *   Adjust link status
 199  * set_loopback()
 200  *   Set loopback
 201  * set_promisc_mode
 202  *   Set promisc mode
 203  * set_mtu()
 204  *   set mtu
 205  * get_pauseparam()
 206  *   get tx and rx of pause frame use
 207  * set_pauseparam()
 208  *   set tx and rx of pause frame use
 209  * set_autoneg()
 210  *   set auto autonegotiation of pause frame use
 211  * get_autoneg()
 212  *   get auto autonegotiation of pause frame use
 213  * get_coalesce_usecs()
 214  *   get usecs to delay a TX interrupt after a packet is sent
 215  * get_rx_max_coalesced_frames()
 216  *   get Maximum number of packets to be sent before a TX interrupt.
 217  * set_coalesce_usecs()
 218  *   set usecs to delay a TX interrupt after a packet is sent
 219  * set_coalesce_frames()
 220  *   set Maximum number of packets to be sent before a TX interrupt.
 221  * get_mac_addr()
 222  *   get mac address
 223  * set_mac_addr()
 224  *   set mac address
 225  * add_uc_addr
 226  *   Add unicast addr to mac table
 227  * rm_uc_addr
 228  *   Remove unicast addr from mac table
 229  * set_mc_addr()
 230  *   Set multicast address
 231  * add_mc_addr
 232  *   Add multicast address to mac table
 233  * rm_mc_addr
 234  *   Remove multicast address from mac table
 235  * update_stats()
 236  *   Update Old network device statistics
 237  * get_ethtool_stats()
 238  *   Get ethtool network device statistics
 239  * get_strings()
 240  *   Get a set of strings that describe the requested objects
 241  * get_sset_count()
 242  *   Get number of strings that @get_strings will write
 243  * update_led_status()
 244  *   Update the led status
 245  * set_led_id()
 246  *   Set led id
 247  * get_regs()
 248  *   Get regs dump
 249  * get_regs_len()
 250  *   Get the len of the regs dump
 251  * get_rss_key_size()
 252  *   Get rss key size
 253  * get_rss_indir_size()
 254  *   Get rss indirection table size
 255  * get_rss()
 256  *   Get rss table
 257  * set_rss()
 258  *   Set rss table
 259  * get_tc_size()
 260  *   Get tc size of handle
 261  * get_vector()
 262  *   Get vector number and vector information
 263  * map_ring_to_vector()
 264  *   Map rings to vector
 265  * unmap_ring_from_vector()
 266  *   Unmap rings from vector
 267  * add_tunnel_udp()
 268  *   Add tunnel information to hardware
 269  * del_tunnel_udp()
 270  *   Delete tunnel information from hardware
 271  * reset_queue()
 272  *   Reset queue
 273  * get_fw_version()
 274  *   Get firmware version
 275  * get_mdix_mode()
 276  *   Get media typr of phy
 277  * set_vlan_filter()
 278  *   Set vlan filter config of Ports
 279  * set_vf_vlan_filter()
 280  *   Set vlan filter config of vf
 281  */
 282 struct hnae3_ae_ops {
 283         int (*init_ae_dev)(struct hnae3_ae_dev *ae_dev);
 284         void (*uninit_ae_dev)(struct hnae3_ae_dev *ae_dev);
 285
 286         int (*init_client_instance)(struct hnae3_client *client,
 287                                     struct hnae3_ae_dev *ae_dev);
 288         void (*uninit_client_instance)(struct hnae3_client *client,
 289                                        struct hnae3_ae_dev *ae_dev);
 290         int (*start)(struct hnae3_handle *handle);
 291         void (*stop)(struct hnae3_handle *handle);
 292         int (*get_status)(struct hnae3_handle *handle);
 293         void (*get_ksettings_an_result)(struct hnae3_handle *handle,
 294                                         u8 *auto_neg, u32 *speed, u8 *duplex);
 295
 296         int (*update_speed_duplex_h)(struct hnae3_handle *handle);
 297         int (*cfg_mac_speed_dup_h)(struct hnae3_handle *handle, int speed,
 298                                    u8 duplex);
 299
 300         void (*get_media_type)(struct hnae3_handle *handle, u8 *media_type);
 301         void (*adjust_link)(struct hnae3_handle *handle, int speed, int duplex);
 302         int (*set_loopback)(struct hnae3_handle *handle,
 303                             enum hnae3_loop loop_mode, bool en);
 304
 305         void (*set_promisc_mode)(struct hnae3_handle *handle, u32 en);
 306         int (*set_mtu)(struct hnae3_handle *handle, int new_mtu);
 307
 308         void (*get_pauseparam)(struct hnae3_handle *handle,
 309                                u32 *auto_neg, u32 *rx_en, u32 *tx_en);
 310         int (*set_pauseparam)(struct hnae3_handle *handle,
 311                               u32 auto_neg, u32 rx_en, u32 tx_en);
 312
 313         int (*set_autoneg)(struct hnae3_handle *handle, bool enable);
 314         int (*get_autoneg)(struct hnae3_handle *handle);
 315
 316         void (*get_coalesce_usecs)(struct hnae3_handle *handle,
 317                                    u32 *tx_usecs, u32 *rx_usecs);
 318         void (*get_rx_max_coalesced_frames)(struct hnae3_handle *handle,
 319                                             u32 *tx_frames, u32 *rx_frames);
 320         int (*set_coalesce_usecs)(struct hnae3_handle *handle, u32 timeout);
 321         int (*set_coalesce_frames)(struct hnae3_handle *handle,
 322                                    u32 coalesce_frames);
 323         void (*get_coalesce_range)(struct hnae3_handle *handle,
 324                                    u32 *tx_frames_low, u32 *rx_frames_low,
 325                                    u32 *tx_frames_high, u32 *rx_frames_high,
 326                                    u32 *tx_usecs_low, u32 *rx_usecs_low,
 327                                    u32 *tx_usecs_high, u32 *rx_usecs_high);
 328
 329         void (*get_mac_addr)(struct hnae3_handle *handle, u8 *p);
 330         int (*set_mac_addr)(struct hnae3_handle *handle, void *p);
 331         int (*add_uc_addr)(struct hnae3_handle *handle,
 332                            const unsigned char *addr);
 333         int (*rm_uc_addr)(struct hnae3_handle *handle,
 334                           const unsigned char *addr);
 335         int (*set_mc_addr)(struct hnae3_handle *handle, void *addr);
 336         int (*add_mc_addr)(struct hnae3_handle *handle,
 337                            const unsigned char *addr);
 338         int (*rm_mc_addr)(struct hnae3_handle *handle,
 339                           const unsigned char *addr);
 340
 341         void (*set_tso_stats)(struct hnae3_handle *handle, int enable);
 342         void (*update_stats)(struct hnae3_handle *handle,
 343                              struct net_device_stats *net_stats);
 344         void (*get_stats)(struct hnae3_handle *handle, u64 *data);
 345
 346         void (*get_strings)(struct hnae3_handle *handle,
 347                             u32 stringset, u8 *data);
 348         int (*get_sset_count)(struct hnae3_handle *handle, int stringset);
 349
 350         void (*get_regs)(struct hnae3_handle *handle, void *data);
 351         int (*get_regs_len)(struct hnae3_handle *handle);
 352
 353         u32 (*get_rss_key_size)(struct hnae3_handle *handle);
 354         u32 (*get_rss_indir_size)(struct hnae3_handle *handle);
 355         int (*get_rss)(struct hnae3_handle *handle, u32 *indir, u8 *key,
 356                        u8 *hfunc);
 357         int (*set_rss)(struct hnae3_handle *handle, const u32 *indir,
 358                        const u8 *key, const u8 hfunc);
 359         int (*set_rss_tuple)(struct hnae3_handle *handle,
 360                              struct ethtool_rxnfc *cmd);
 361         int (*get_rss_tuple)(struct hnae3_handle *handle,
 362                              struct ethtool_rxnfc *cmd);
 363
 364         int (*get_tc_size)(struct hnae3_handle *handle);
 365
 366         int (*get_vector)(struct hnae3_handle *handle, u16 vector_num,
 367                           struct hnae3_vector_info *vector_info);
 368         int (*map_ring_to_vector)(struct hnae3_handle *handle,
 369                                   int vector_num,
 370                                   struct hnae3_ring_chain_node *vr_chain);
 371         int (*unmap_ring_from_vector)(struct hnae3_handle *handle,
 372                                       int vector_num,
 373                                       struct hnae3_ring_chain_node *vr_chain);
 374
 375         int (*add_tunnel_udp)(struct hnae3_handle *handle, u16 port_num);
 376         int (*del_tunnel_udp)(struct hnae3_handle *handle, u16 port_num);
 377
 378         void (*reset_queue)(struct hnae3_handle *handle, u16 queue_id);
 379         u32 (*get_fw_version)(struct hnae3_handle *handle);
 380         void (*get_mdix_mode)(struct hnae3_handle *handle,
 381                               u8 *tp_mdix_ctrl, u8 *tp_mdix);
 382
 383         int (*set_vlan_filter)(struct hnae3_handle *handle, __be16 proto,
 384                                u16 vlan_id, bool is_kill);
 385         int (*set_vf_vlan_filter)(struct hnae3_handle *handle, int vfid,
 386                                   u16 vlan, u8 qos, __be16 proto);
 387         void (*reset_event)(struct hnae3_handle *handle,
 388                             enum hnae3_reset_type reset);
 389 };
 390
 391 struct hnae3_dcb_ops {
 392         /* IEEE 802.1Qaz std */
 393         int (*ieee_getets)(struct hnae3_handle *, struct ieee_ets *);
 394         int (*ieee_setets)(struct hnae3_handle *, struct ieee_ets *);
 395         int (*ieee_getpfc)(struct hnae3_handle *, struct ieee_pfc *);
 396         int (*ieee_setpfc)(struct hnae3_handle *, struct ieee_pfc *);
 397
 398         /* DCBX configuration */
 399         u8   (*getdcbx)(struct hnae3_handle *);
 400         u8   (*setdcbx)(struct hnae3_handle *, u8);
 401
 402         int (*map_update)(struct hnae3_handle *);
 403         int (*setup_tc)(struct hnae3_handle *, u8, u8 *);
 404 };
 405
 406 struct hnae3_ae_algo {
 407         const struct hnae3_ae_ops *ops;
 408         struct list_head node;
 409         char name[HNAE3_CLASS_NAME_SIZE];
 410         const struct pci_device_id *pdev_id_table;
 411 };
 412
 413 #define HNAE3_INT_NAME_LEN        (IFNAMSIZ + 16)
 414 #define HNAE3_ITR_COUNTDOWN_START 100
 415
 416 struct hnae3_tc_info {
 417         u16     tqp_offset;     /* TQP offset from base TQP */
 418         u16     tqp_count;      /* Total TQPs */
 419         u8      tc;             /* TC index */
 420         bool    enable;         /* If this TC is enable or not */
 421 };
 422
 423 #define HNAE3_MAX_TC            8
 424 #define HNAE3_MAX_USER_PRIO     8
 425 struct hnae3_knic_private_info {
 426         struct net_device *netdev; /* Set by KNIC client when init instance */
 427         u16 rss_size;              /* Allocated RSS queues */
 428         u16 rx_buf_len;
 429         u16 num_desc;
 430
 431         u8 num_tc;                 /* Total number of enabled TCs */
 432         u8 prio_tc[HNAE3_MAX_USER_PRIO];  /* TC indexed by prio */
 433         struct hnae3_tc_info tc_info[HNAE3_MAX_TC]; /* Idx of array is HW TC */
 434
 435         u16 num_tqps;             /* total number of TQPs in this handle */
 436         struct hnae3_queue **tqp;  /* array base of all TQPs in this instance */
 437         const struct hnae3_dcb_ops *dcb_ops;
 438 };
 439
 440 struct hnae3_roce_private_info {
 441         struct net_device *netdev;
 442         void __iomem *roce_io_base;
 443         int base_vector;
 444         int num_vectors;
 445 };
 446
 447 struct hnae3_unic_private_info {
 448         struct net_device *netdev;
 449         u16 rx_buf_len;
 450         u16 num_desc;
 451         u16 num_tqps;   /* total number of tqps in this handle */
 452         struct hnae3_queue **tqp;  /* array base of all TQPs of this instance */
 453 };
 454
 455 #define HNAE3_SUPPORT_MAC_LOOPBACK    BIT(0)
 456 #define HNAE3_SUPPORT_PHY_LOOPBACK    BIT(1)
 457 #define HNAE3_SUPPORT_SERDES_LOOPBACK BIT(2)
 458 #define HNAE3_SUPPORT_VF              BIT(3)
 459
 460 struct hnae3_handle {
 461         struct hnae3_client *client;
 462         struct pci_dev *pdev;
 463         void *priv;
 464         struct hnae3_ae_algo *ae_algo;  /* the class who provides this handle */
 465         u64 flags; /* Indicate the capabilities for this handle*/
 466
 467         union {
 468                 struct net_device *netdev; /* first member */
 469                 struct hnae3_knic_private_info kinfo;
 470                 struct hnae3_unic_private_info uinfo;
 471                 struct hnae3_roce_private_info rinfo;
 472         };
 473
 474         u32 numa_node_mask;     /* for multi-chip support */
 475 };
 476
 477 #define hnae_set_field(origin, mask, shift, val) \
 478         do { \
 479                 (origin) &= (~(mask)); \
 480                 (origin) |= ((val) << (shift)) & (mask); \
 481         } while (0)
 482 #define hnae_get_field(origin, mask, shift) (((origin) & (mask)) >> (shift))
 483
 484 #define hnae_set_bit(origin, shift, val) \
 485         hnae_set_field((origin), (0x1 << (shift)), (shift), (val))
 486 #define hnae_get_bit(origin, shift) \
 487         hnae_get_field((origin), (0x1 << (shift)), (shift))
 488
 489 int hnae3_register_ae_dev(struct hnae3_ae_dev *ae_dev);
 490 void hnae3_unregister_ae_dev(struct hnae3_ae_dev *ae_dev);
 491
 492 void hnae3_unregister_ae_algo(struct hnae3_ae_algo *ae_algo);
 493 int hnae3_register_ae_algo(struct hnae3_ae_algo *ae_algo);
 494
 495 void hnae3_unregister_client(struct hnae3_client *client);
 496 int hnae3_register_client(struct hnae3_client *client);
 497 #endif