drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /* Copyright (c) 2018-2019 Hisilicon Limited. */
   3
   4 #include <linux/debugfs.h>
   5 #include <linux/device.h>
   6
   7 #include "hnae3.h"
   8 #include "hns3_enet.h"
   9
  10 #define HNS3_DBG_READ_LEN 256
  11 #define HNS3_DBG_WRITE_LEN 1024
  12
  13 static struct dentry *hns3_dbgfs_root;
  14
  15 static int hns3_dbg_queue_info(struct hnae3_handle *h,
  16                                const char *cmd_buf)
  17 {
  18         struct hns3_nic_priv *priv = h->priv;
  19         struct hns3_enet_ring *ring;
  20         u32 base_add_l, base_add_h;
  21         u32 queue_num, queue_max;
  22         u32 value, i = 0;
  23         int cnt;
  24
  25         if (!priv->ring) {
  26                 dev_err(&h->pdev->dev, "priv->ring is NULL\n");
  27                 return -EFAULT;
  28         }
  29
  30         queue_max = h->kinfo.num_tqps;
  31         cnt = kstrtouint(&cmd_buf[11], 0, &queue_num);
  32         if (cnt)
  33                 queue_num = 0;
  34         else
  35                 queue_max = queue_num + 1;
  36
  37         dev_info(&h->pdev->dev, "queue info\n");
  38
  39         if (queue_num >= h->kinfo.num_tqps) {
  40                 dev_err(&h->pdev->dev,
  41                         "Queue number(%u) is out of range(0-%u)\n", queue_num,
  42                         h->kinfo.num_tqps - 1);
  43                 return -EINVAL;
  44         }
  45
  46         for (i = queue_num; i < queue_max; i++) {
  47                 /* Each cycle needs to determine whether the instance is reset,
  48                  * to prevent reference to invalid memory. And need to ensure
  49                  * that the following code is executed within 100ms.
  50                  */
  51                 if (!test_bit(HNS3_NIC_STATE_INITED, &priv->state) ||
  52                     test_bit(HNS3_NIC_STATE_RESETTING, &priv->state))
  53                         return -EPERM;
  54
  55                 ring = &priv->ring[(u32)(i + h->kinfo.num_tqps)];
  56                 base_add_h = readl_relaxed(ring->tqp->io_base +
  57                                            HNS3_RING_RX_RING_BASEADDR_H_REG);
  58                 base_add_l = readl_relaxed(ring->tqp->io_base +
  59                                            HNS3_RING_RX_RING_BASEADDR_L_REG);
  60                 dev_info(&h->pdev->dev, "RX(%u) BASE ADD: 0x%08x%08x\n", i,
  61                          base_add_h, base_add_l);
  62
  63                 value = readl_relaxed(ring->tqp->io_base +
  64                                       HNS3_RING_RX_RING_BD_NUM_REG);
  65                 dev_info(&h->pdev->dev, "RX(%u) RING BD NUM: %u\n", i, value);
  66
  67                 value = readl_relaxed(ring->tqp->io_base +
  68                                       HNS3_RING_RX_RING_BD_LEN_REG);
  69                 dev_info(&h->pdev->dev, "RX(%u) RING BD LEN: %u\n", i, value);
  70
  71                 value = readl_relaxed(ring->tqp->io_base +
  72                                       HNS3_RING_RX_RING_TAIL_REG);
  73                 dev_info(&h->pdev->dev, "RX(%u) RING TAIL: %u\n", i, value);
  74
  75                 value = readl_relaxed(ring->tqp->io_base +
  76                                       HNS3_RING_RX_RING_HEAD_REG);
  77                 dev_info(&h->pdev->dev, "RX(%u) RING HEAD: %u\n", i, value);
  78
  79                 value = readl_relaxed(ring->tqp->io_base +
  80                                       HNS3_RING_RX_RING_FBDNUM_REG);
  81                 dev_info(&h->pdev->dev, "RX(%u) RING FBDNUM: %u\n", i, value);
  82
  83                 value = readl_relaxed(ring->tqp->io_base +
  84                                       HNS3_RING_RX_RING_PKTNUM_RECORD_REG);
  85                 dev_info(&h->pdev->dev, "RX(%u) RING PKTNUM: %u\n", i, value);
  86
  87                 ring = &priv->ring[i];
  88                 base_add_h = readl_relaxed(ring->tqp->io_base +
  89                                            HNS3_RING_TX_RING_BASEADDR_H_REG);
  90                 base_add_l = readl_relaxed(ring->tqp->io_base +
  91                                            HNS3_RING_TX_RING_BASEADDR_L_REG);
  92                 dev_info(&h->pdev->dev, "TX(%u) BASE ADD: 0x%08x%08x\n", i,
  93                          base_add_h, base_add_l);
  94
  95                 value = readl_relaxed(ring->tqp->io_base +
  96                                       HNS3_RING_TX_RING_BD_NUM_REG);
  97                 dev_info(&h->pdev->dev, "TX(%u) RING BD NUM: %u\n", i, value);
  98
  99                 value = readl_relaxed(ring->tqp->io_base +
 100                                       HNS3_RING_TX_RING_TC_REG);
 101                 dev_info(&h->pdev->dev, "TX(%u) RING TC: %u\n", i, value);
 102
 103                 value = readl_relaxed(ring->tqp->io_base +
 104                                       HNS3_RING_TX_RING_TAIL_REG);
 105                 dev_info(&h->pdev->dev, "TX(%u) RING TAIL: %u\n", i, value);
 106
 107                 value = readl_relaxed(ring->tqp->io_base +
 108                                       HNS3_RING_TX_RING_HEAD_REG);
 109                 dev_info(&h->pdev->dev, "TX(%u) RING HEAD: %u\n", i, value);
 110
 111                 value = readl_relaxed(ring->tqp->io_base +
 112                                       HNS3_RING_TX_RING_FBDNUM_REG);
 113                 dev_info(&h->pdev->dev, "TX(%u) RING FBDNUM: %u\n", i, value);
 114
 115                 value = readl_relaxed(ring->tqp->io_base +
 116                                       HNS3_RING_TX_RING_OFFSET_REG);
 117                 dev_info(&h->pdev->dev, "TX(%u) RING OFFSET: %u\n", i, value);
 118
 119                 value = readl_relaxed(ring->tqp->io_base +
 120                                       HNS3_RING_TX_RING_PKTNUM_RECORD_REG);
 121                 dev_info(&h->pdev->dev, "TX(%u) RING PKTNUM: %u\n\n", i,
 122                          value);
 123         }
 124
 125         return 0;
 126 }
 127
 128 static int hns3_dbg_queue_map(struct hnae3_handle *h)
 129 {
 130         struct hns3_nic_priv *priv = h->priv;
 131         int i;
 132
 133         if (!h->ae_algo->ops->get_global_queue_id)
 134                 return -EOPNOTSUPP;
 135
 136         dev_info(&h->pdev->dev, "map info for queue id and vector id\n");
 137         dev_info(&h->pdev->dev,
 138                  "local queue id | global queue id | vector id\n");
 139         for (i = 0; i < h->kinfo.num_tqps; i++) {
 140                 u16 global_qid;
 141
 142                 global_qid = h->ae_algo->ops->get_global_queue_id(h, i);
 143                 if (!priv->ring || !priv->ring[i].tqp_vector)
 144                         continue;
 145
 146                 dev_info(&h->pdev->dev,
 147                          "      %4d            %4d            %4d\n",
 148                          i, global_qid, priv->ring[i].tqp_vector->vector_irq);
 149         }
 150
 151         return 0;
 152 }
 153
 154 static int hns3_dbg_bd_info(struct hnae3_handle *h, const char *cmd_buf)
 155 {
 156         struct hns3_nic_priv *priv = h->priv;
 157         struct hns3_desc *rx_desc, *tx_desc;
 158         struct device *dev = &h->pdev->dev;
 159         struct hns3_enet_ring *ring;
 160         u32 tx_index, rx_index;
 161         u32 q_num, value;
 162         dma_addr_t addr;
 163         int cnt;
 164
 165         cnt = sscanf(&cmd_buf[8], "%u %u", &q_num, &tx_index);
 166         if (cnt == 2) {
 167                 rx_index = tx_index;
 168         } else if (cnt != 1) {
 169                 dev_err(dev, "bd info: bad command string, cnt=%d\n", cnt);
 170                 return -EINVAL;
 171         }
 172
 173         if (q_num >= h->kinfo.num_tqps) {
 174                 dev_err(dev, "Queue number(%u) is out of range(0-%u)\n", q_num,
 175                         h->kinfo.num_tqps - 1);
 176                 return -EINVAL;
 177         }
 178
 179         ring  = &priv->ring[q_num];
 180         value = readl_relaxed(ring->tqp->io_base + HNS3_RING_TX_RING_TAIL_REG);
 181         tx_index = (cnt == 1) ? value : tx_index;
 182
 183         if (tx_index >= ring->desc_num) {
 184                 dev_err(dev, "bd index(%u) is out of range(0-%u)\n", tx_index,
 185                         ring->desc_num - 1);
 186                 return -EINVAL;
 187         }
 188
 189         tx_desc = &ring->desc[tx_index];
 190         addr = le64_to_cpu(tx_desc->addr);
 191         dev_info(dev, "TX Queue Num: %u, BD Index: %u\n", q_num, tx_index);
 192         dev_info(dev, "(TX)addr: %pad\n", &addr);
 193         dev_info(dev, "(TX)vlan_tag: %u\n", le16_to_cpu(tx_desc->tx.vlan_tag));
 194         dev_info(dev, "(TX)send_size: %u\n",
 195                  le16_to_cpu(tx_desc->tx.send_size));
 196         dev_info(dev, "(TX)vlan_tso: %u\n", tx_desc->tx.type_cs_vlan_tso);
 197         dev_info(dev, "(TX)l2_len: %u\n", tx_desc->tx.l2_len);
 198         dev_info(dev, "(TX)l3_len: %u\n", tx_desc->tx.l3_len);
 199         dev_info(dev, "(TX)l4_len: %u\n", tx_desc->tx.l4_len);
 200         dev_info(dev, "(TX)vlan_tag: %u\n",
 201                  le16_to_cpu(tx_desc->tx.outer_vlan_tag));
 202         dev_info(dev, "(TX)tv: %u\n", le16_to_cpu(tx_desc->tx.tv));
 203         dev_info(dev, "(TX)vlan_msec: %u\n", tx_desc->tx.ol_type_vlan_msec);
 204         dev_info(dev, "(TX)ol2_len: %u\n", tx_desc->tx.ol2_len);
 205         dev_info(dev, "(TX)ol3_len: %u\n", tx_desc->tx.ol3_len);
 206         dev_info(dev, "(TX)ol4_len: %u\n", tx_desc->tx.ol4_len);
 207         dev_info(dev, "(TX)paylen: %u\n", le32_to_cpu(tx_desc->tx.paylen));
 208         dev_info(dev, "(TX)vld_ra_ri: %u\n",
 209                  le16_to_cpu(tx_desc->tx.bdtp_fe_sc_vld_ra_ri));
 210         dev_info(dev, "(TX)mss: %u\n", le16_to_cpu(tx_desc->tx.mss));
 211
 212         ring  = &priv->ring[q_num + h->kinfo.num_tqps];
 213         value = readl_relaxed(ring->tqp->io_base + HNS3_RING_RX_RING_TAIL_REG);
 214         rx_index = (cnt == 1) ? value : tx_index;
 215         rx_desc  = &ring->desc[rx_index];
 216
 217         addr = le64_to_cpu(rx_desc->addr);
 218         dev_info(dev, "RX Queue Num: %u, BD Index: %u\n", q_num, rx_index);
 219         dev_info(dev, "(RX)addr: %pad\n", &addr);
 220         dev_info(dev, "(RX)l234_info: %u\n",
 221                  le32_to_cpu(rx_desc->rx.l234_info));
 222         dev_info(dev, "(RX)pkt_len: %u\n", le16_to_cpu(rx_desc->rx.pkt_len));
 223         dev_info(dev, "(RX)size: %u\n", le16_to_cpu(rx_desc->rx.size));
 224         dev_info(dev, "(RX)rss_hash: %u\n", le32_to_cpu(rx_desc->rx.rss_hash));
 225         dev_info(dev, "(RX)fd_id: %u\n", le16_to_cpu(rx_desc->rx.fd_id));
 226         dev_info(dev, "(RX)vlan_tag: %u\n", le16_to_cpu(rx_desc->rx.vlan_tag));
 227         dev_info(dev, "(RX)o_dm_vlan_id_fb: %u\n",
 228                  le16_to_cpu(rx_desc->rx.o_dm_vlan_id_fb));
 229         dev_info(dev, "(RX)ot_vlan_tag: %u\n",
 230                  le16_to_cpu(rx_desc->rx.ot_vlan_tag));
 231         dev_info(dev, "(RX)bd_base_info: %u\n",
 232                  le32_to_cpu(rx_desc->rx.bd_base_info));
 233
 234         return 0;
 235 }
 236
 237 static void hns3_dbg_help(struct hnae3_handle *h)
 238 {
 239 #define HNS3_DBG_BUF_LEN 256
 240
 241         char printf_buf[HNS3_DBG_BUF_LEN];
 242
 243         dev_info(&h->pdev->dev, "available commands\n");
 244         dev_info(&h->pdev->dev, "queue info <number>\n");
 245         dev_info(&h->pdev->dev, "queue map\n");
 246         dev_info(&h->pdev->dev, "bd info <q_num> <bd index>\n");
 247
 248         if (!hns3_is_phys_func(h->pdev))
 249                 return;
 250
 251         dev_info(&h->pdev->dev, "dump fd tcam\n");
 252         dev_info(&h->pdev->dev, "dump tc\n");
 253         dev_info(&h->pdev->dev, "dump tm map <q_num>\n");
 254         dev_info(&h->pdev->dev, "dump tm\n");
 255         dev_info(&h->pdev->dev, "dump qos pause cfg\n");
 256         dev_info(&h->pdev->dev, "dump qos pri map\n");
 257         dev_info(&h->pdev->dev, "dump qos buf cfg\n");
 258         dev_info(&h->pdev->dev, "dump mng tbl\n");
 259         dev_info(&h->pdev->dev, "dump reset info\n");
 260         dev_info(&h->pdev->dev, "dump m7 info\n");
 261         dev_info(&h->pdev->dev, "dump ncl_config <offset> <length>(in hex)\n");
 262         dev_info(&h->pdev->dev, "dump mac tnl status\n");
 263
 264         memset(printf_buf, 0, HNS3_DBG_BUF_LEN);
 265         strncat(printf_buf, "dump reg [[bios common] [ssu <port_id>]",
 266                 HNS3_DBG_BUF_LEN - 1);
 267         strncat(printf_buf + strlen(printf_buf),
 268                 " [igu egu <port_id>] [rpu <tc_queue_num>]",
 269                 HNS3_DBG_BUF_LEN - strlen(printf_buf) - 1);
 270         strncat(printf_buf + strlen(printf_buf),
 271                 " [rtc] [ppp] [rcb] [tqp <queue_num>]]\n",
 272                 HNS3_DBG_BUF_LEN - strlen(printf_buf) - 1);
 273         dev_info(&h->pdev->dev, "%s", printf_buf);
 274
 275         memset(printf_buf, 0, HNS3_DBG_BUF_LEN);
 276         strncat(printf_buf, "dump reg dcb <port_id> <pri_id> <pg_id>",
 277                 HNS3_DBG_BUF_LEN - 1);
 278         strncat(printf_buf + strlen(printf_buf), " <rq_id> <nq_id> <qset_id>\n",
 279                 HNS3_DBG_BUF_LEN - strlen(printf_buf) - 1);
 280         dev_info(&h->pdev->dev, "%s", printf_buf);
 281 }
 282
 283 static ssize_t hns3_dbg_cmd_read(struct file *filp, char __user *buffer,
 284                                  size_t count, loff_t *ppos)
 285 {
 286         int uncopy_bytes;
 287         char *buf;
 288         int len;
 289
 290         if (*ppos != 0)
 291                 return 0;
 292
 293         if (count < HNS3_DBG_READ_LEN)
 294                 return -ENOSPC;
 295
 296         buf = kzalloc(HNS3_DBG_READ_LEN, GFP_KERNEL);
 297         if (!buf)
 298                 return -ENOMEM;
 299
 300         len = snprintf(buf, HNS3_DBG_READ_LEN, "%s\n",
 301                        "Please echo help to cmd to get help information");
 302         uncopy_bytes = copy_to_user(buffer, buf, len);
 303
 304         kfree(buf);
 305
 306         if (uncopy_bytes)
 307                 return -EFAULT;
 308
 309         return (*ppos = len);
 310 }
 311
 312 static ssize_t hns3_dbg_cmd_write(struct file *filp, const char __user *buffer,
 313                                   size_t count, loff_t *ppos)
 314 {
 315         struct hnae3_handle *handle = filp->private_data;
 316         struct hns3_nic_priv *priv  = handle->priv;
 317         char *cmd_buf, *cmd_buf_tmp;
 318         int uncopied_bytes;
 319         int ret = 0;
 320
 321         if (*ppos != 0)
 322                 return 0;
 323
 324         /* Judge if the instance is being reset. */
 325         if (!test_bit(HNS3_NIC_STATE_INITED, &priv->state) ||
 326             test_bit(HNS3_NIC_STATE_RESETTING, &priv->state))
 327                 return 0;
 328
 329         if (count > HNS3_DBG_WRITE_LEN)
 330                 return -ENOSPC;
 331
 332         cmd_buf = kzalloc(count + 1, GFP_KERNEL);
 333         if (!cmd_buf)
 334                 return count;
 335
 336         uncopied_bytes = copy_from_user(cmd_buf, buffer, count);
 337         if (uncopied_bytes) {
 338                 kfree(cmd_buf);
 339                 return -EFAULT;
 340         }
 341
 342         cmd_buf[count] = '\0';
 343
 344         cmd_buf_tmp = strchr(cmd_buf, '\n');
 345         if (cmd_buf_tmp) {
 346                 *cmd_buf_tmp = '\0';
 347                 count = cmd_buf_tmp - cmd_buf + 1;
 348         }
 349
 350         if (strncmp(cmd_buf, "help", 4) == 0)
 351                 hns3_dbg_help(handle);
 352         else if (strncmp(cmd_buf, "queue info", 10) == 0)
 353                 ret = hns3_dbg_queue_info(handle, cmd_buf);
 354         else if (strncmp(cmd_buf, "queue map", 9) == 0)
 355                 ret = hns3_dbg_queue_map(handle);
 356         else if (strncmp(cmd_buf, "bd info", 7) == 0)
 357                 ret = hns3_dbg_bd_info(handle, cmd_buf);
 358         else if (handle->ae_algo->ops->dbg_run_cmd)
 359                 ret = handle->ae_algo->ops->dbg_run_cmd(handle, cmd_buf);
 360         else
 361                 ret = -EOPNOTSUPP;
 362
 363         if (ret)
 364                 hns3_dbg_help(handle);
 365
 366         kfree(cmd_buf);
 367         cmd_buf = NULL;
 368
 369         return count;
 370 }
 371
 372 static const struct file_operations hns3_dbg_cmd_fops = {
 373         .owner = THIS_MODULE,
 374         .open  = simple_open,
 375         .read  = hns3_dbg_cmd_read,
 376         .write = hns3_dbg_cmd_write,
 377 };
 378
 379 void hns3_dbg_init(struct hnae3_handle *handle)
 380 {
 381         const char *name = pci_name(handle->pdev);
 382
 383         handle->hnae3_dbgfs = debugfs_create_dir(name, hns3_dbgfs_root);
 384
 385         debugfs_create_file("cmd", 0600, handle->hnae3_dbgfs, handle,
 386                             &hns3_dbg_cmd_fops);
 387 }
 388
 389 void hns3_dbg_uninit(struct hnae3_handle *handle)
 390 {
 391         debugfs_remove_recursive(handle->hnae3_dbgfs);
 392         handle->hnae3_dbgfs = NULL;
 393 }
 394
 395 void hns3_dbg_register_debugfs(const char *debugfs_dir_name)
 396 {
 397         hns3_dbgfs_root = debugfs_create_dir(debugfs_dir_name, NULL);
 398 }
 399
 400 void hns3_dbg_unregister_debugfs(void)
 401 {
 402         debugfs_remove_recursive(hns3_dbgfs_root);
 403         hns3_dbgfs_root = NULL;
 404 }