1 // SPDX-License-Identifier: GPL-2.0+
2 // Copyright (c) 2016-2017 Hisilicon Limited.
4 #include <linux/dma-mapping.h>
5 #include <linux/etherdevice.h>
6 #include <linux/interrupt.h>
7 #include <linux/if_vlan.h>
9 #include <linux/ipv6.h>
10 #include <linux/module.h>
11 #include <linux/pci.h>
12 #include <linux/skbuff.h>
13 #include <linux/sctp.h>
14 #include <linux/vermagic.h>
16 #include <net/pkt_cls.h>
17 #include <net/vxlan.h>
20 #include "hns3_enet.h"
22 static void hns3_clear_all_ring(struct hnae3_handle
*h
);
23 static void hns3_force_clear_all_rx_ring(struct hnae3_handle
*h
);
25 static const char hns3_driver_name
[] = "hns3";
26 const char hns3_driver_version
[] = VERMAGIC_STRING
;
27 static const char hns3_driver_string
[] =
28 "Hisilicon Ethernet Network Driver for Hip08 Family";
29 static const char hns3_copyright
[] = "Copyright (c) 2017 Huawei Corporation.";
30 static struct hnae3_client client
;
32 /* hns3_pci_tbl - PCI Device ID Table
34 * Last entry must be all 0s
36 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
37 * Class, Class Mask, private data (not used) }
39 static const struct pci_device_id hns3_pci_tbl
[] = {
40 {PCI_VDEVICE(HUAWEI
, HNAE3_DEV_ID_GE
), 0},
41 {PCI_VDEVICE(HUAWEI
, HNAE3_DEV_ID_25GE
), 0},
42 {PCI_VDEVICE(HUAWEI
, HNAE3_DEV_ID_25GE_RDMA
),
43 HNAE3_DEV_SUPPORT_ROCE_DCB_BITS
},
44 {PCI_VDEVICE(HUAWEI
, HNAE3_DEV_ID_25GE_RDMA_MACSEC
),
45 HNAE3_DEV_SUPPORT_ROCE_DCB_BITS
},
46 {PCI_VDEVICE(HUAWEI
, HNAE3_DEV_ID_50GE_RDMA
),
47 HNAE3_DEV_SUPPORT_ROCE_DCB_BITS
},
48 {PCI_VDEVICE(HUAWEI
, HNAE3_DEV_ID_50GE_RDMA_MACSEC
),
49 HNAE3_DEV_SUPPORT_ROCE_DCB_BITS
},
50 {PCI_VDEVICE(HUAWEI
, HNAE3_DEV_ID_100G_RDMA_MACSEC
),
51 HNAE3_DEV_SUPPORT_ROCE_DCB_BITS
},
52 {PCI_VDEVICE(HUAWEI
, HNAE3_DEV_ID_100G_VF
), 0},
53 {PCI_VDEVICE(HUAWEI
, HNAE3_DEV_ID_100G_RDMA_DCB_PFC_VF
),
54 HNAE3_DEV_SUPPORT_ROCE_DCB_BITS
},
55 /* required last entry */
58 MODULE_DEVICE_TABLE(pci
, hns3_pci_tbl
);
60 static irqreturn_t
hns3_irq_handle(int irq
, void *vector
)
62 struct hns3_enet_tqp_vector
*tqp_vector
= vector
;
64 napi_schedule(&tqp_vector
->napi
);
69 /* This callback function is used to set affinity changes to the irq affinity
70 * masks when the irq_set_affinity_notifier function is used.
72 static void hns3_nic_irq_affinity_notify(struct irq_affinity_notify
*notify
,
73 const cpumask_t
*mask
)
75 struct hns3_enet_tqp_vector
*tqp_vectors
=
76 container_of(notify
, struct hns3_enet_tqp_vector
,
79 tqp_vectors
->affinity_mask
= *mask
;
82 static void hns3_nic_irq_affinity_release(struct kref
*ref
)
86 static void hns3_nic_uninit_irq(struct hns3_nic_priv
*priv
)
88 struct hns3_enet_tqp_vector
*tqp_vectors
;
91 for (i
= 0; i
< priv
->vector_num
; i
++) {
92 tqp_vectors
= &priv
->tqp_vector
[i
];
94 if (tqp_vectors
->irq_init_flag
!= HNS3_VECTOR_INITED
)
97 /* clear the affinity notifier and affinity mask */
98 irq_set_affinity_notifier(tqp_vectors
->vector_irq
, NULL
);
99 irq_set_affinity_hint(tqp_vectors
->vector_irq
, NULL
);
101 /* release the irq resource */
102 free_irq(tqp_vectors
->vector_irq
, tqp_vectors
);
103 tqp_vectors
->irq_init_flag
= HNS3_VECTOR_NOT_INITED
;
107 static int hns3_nic_init_irq(struct hns3_nic_priv
*priv
)
109 struct hns3_enet_tqp_vector
*tqp_vectors
;
110 int txrx_int_idx
= 0;
116 for (i
= 0; i
< priv
->vector_num
; i
++) {
117 tqp_vectors
= &priv
->tqp_vector
[i
];
119 if (tqp_vectors
->irq_init_flag
== HNS3_VECTOR_INITED
)
122 if (tqp_vectors
->tx_group
.ring
&& tqp_vectors
->rx_group
.ring
) {
123 snprintf(tqp_vectors
->name
, HNAE3_INT_NAME_LEN
- 1,
124 "%s-%s-%d", priv
->netdev
->name
, "TxRx",
127 } else if (tqp_vectors
->rx_group
.ring
) {
128 snprintf(tqp_vectors
->name
, HNAE3_INT_NAME_LEN
- 1,
129 "%s-%s-%d", priv
->netdev
->name
, "Rx",
131 } else if (tqp_vectors
->tx_group
.ring
) {
132 snprintf(tqp_vectors
->name
, HNAE3_INT_NAME_LEN
- 1,
133 "%s-%s-%d", priv
->netdev
->name
, "Tx",
136 /* Skip this unused q_vector */
140 tqp_vectors
->name
[HNAE3_INT_NAME_LEN
- 1] = '\0';
142 ret
= request_irq(tqp_vectors
->vector_irq
, hns3_irq_handle
, 0,
146 netdev_err(priv
->netdev
, "request irq(%d) fail\n",
147 tqp_vectors
->vector_irq
);
151 tqp_vectors
->affinity_notify
.notify
=
152 hns3_nic_irq_affinity_notify
;
153 tqp_vectors
->affinity_notify
.release
=
154 hns3_nic_irq_affinity_release
;
155 irq_set_affinity_notifier(tqp_vectors
->vector_irq
,
156 &tqp_vectors
->affinity_notify
);
157 irq_set_affinity_hint(tqp_vectors
->vector_irq
,
158 &tqp_vectors
->affinity_mask
);
160 tqp_vectors
->irq_init_flag
= HNS3_VECTOR_INITED
;
166 static void hns3_mask_vector_irq(struct hns3_enet_tqp_vector
*tqp_vector
,
169 writel(mask_en
, tqp_vector
->mask_addr
);
172 static void hns3_vector_enable(struct hns3_enet_tqp_vector
*tqp_vector
)
174 napi_enable(&tqp_vector
->napi
);
177 hns3_mask_vector_irq(tqp_vector
, 1);
180 static void hns3_vector_disable(struct hns3_enet_tqp_vector
*tqp_vector
)
183 hns3_mask_vector_irq(tqp_vector
, 0);
185 disable_irq(tqp_vector
->vector_irq
);
186 napi_disable(&tqp_vector
->napi
);
189 void hns3_set_vector_coalesce_rl(struct hns3_enet_tqp_vector
*tqp_vector
,
192 u32 rl_reg
= hns3_rl_usec_to_reg(rl_value
);
194 /* this defines the configuration for RL (Interrupt Rate Limiter).
195 * Rl defines rate of interrupts i.e. number of interrupts-per-second
196 * GL and RL(Rate Limiter) are 2 ways to acheive interrupt coalescing
199 if (rl_reg
> 0 && !tqp_vector
->tx_group
.coal
.gl_adapt_enable
&&
200 !tqp_vector
->rx_group
.coal
.gl_adapt_enable
)
201 /* According to the hardware, the range of rl_reg is
202 * 0-59 and the unit is 4.
204 rl_reg
|= HNS3_INT_RL_ENABLE_MASK
;
206 writel(rl_reg
, tqp_vector
->mask_addr
+ HNS3_VECTOR_RL_OFFSET
);
209 void hns3_set_vector_coalesce_rx_gl(struct hns3_enet_tqp_vector
*tqp_vector
,
212 u32 rx_gl_reg
= hns3_gl_usec_to_reg(gl_value
);
214 writel(rx_gl_reg
, tqp_vector
->mask_addr
+ HNS3_VECTOR_GL0_OFFSET
);
217 void hns3_set_vector_coalesce_tx_gl(struct hns3_enet_tqp_vector
*tqp_vector
,
220 u32 tx_gl_reg
= hns3_gl_usec_to_reg(gl_value
);
222 writel(tx_gl_reg
, tqp_vector
->mask_addr
+ HNS3_VECTOR_GL1_OFFSET
);
225 static void hns3_vector_gl_rl_init(struct hns3_enet_tqp_vector
*tqp_vector
,
226 struct hns3_nic_priv
*priv
)
228 struct hnae3_handle
*h
= priv
->ae_handle
;
230 /* initialize the configuration for interrupt coalescing.
231 * 1. GL (Interrupt Gap Limiter)
232 * 2. RL (Interrupt Rate Limiter)
235 /* Default: enable interrupt coalescing self-adaptive and GL */
236 tqp_vector
->tx_group
.coal
.gl_adapt_enable
= 1;
237 tqp_vector
->rx_group
.coal
.gl_adapt_enable
= 1;
239 tqp_vector
->tx_group
.coal
.int_gl
= HNS3_INT_GL_50K
;
240 tqp_vector
->rx_group
.coal
.int_gl
= HNS3_INT_GL_50K
;
242 /* Default: disable RL */
243 h
->kinfo
.int_rl_setting
= 0;
245 tqp_vector
->int_adapt_down
= HNS3_INT_ADAPT_DOWN_START
;
246 tqp_vector
->rx_group
.coal
.flow_level
= HNS3_FLOW_LOW
;
247 tqp_vector
->tx_group
.coal
.flow_level
= HNS3_FLOW_LOW
;
250 static void hns3_vector_gl_rl_init_hw(struct hns3_enet_tqp_vector
*tqp_vector
,
251 struct hns3_nic_priv
*priv
)
253 struct hnae3_handle
*h
= priv
->ae_handle
;
255 hns3_set_vector_coalesce_tx_gl(tqp_vector
,
256 tqp_vector
->tx_group
.coal
.int_gl
);
257 hns3_set_vector_coalesce_rx_gl(tqp_vector
,
258 tqp_vector
->rx_group
.coal
.int_gl
);
259 hns3_set_vector_coalesce_rl(tqp_vector
, h
->kinfo
.int_rl_setting
);
262 static int hns3_nic_set_real_num_queue(struct net_device
*netdev
)
264 struct hnae3_handle
*h
= hns3_get_handle(netdev
);
265 struct hnae3_knic_private_info
*kinfo
= &h
->kinfo
;
266 unsigned int queue_size
= kinfo
->rss_size
* kinfo
->num_tc
;
269 if (kinfo
->num_tc
<= 1) {
270 netdev_reset_tc(netdev
);
272 ret
= netdev_set_num_tc(netdev
, kinfo
->num_tc
);
275 "netdev_set_num_tc fail, ret=%d!\n", ret
);
279 for (i
= 0; i
< HNAE3_MAX_TC
; i
++) {
280 if (!kinfo
->tc_info
[i
].enable
)
283 netdev_set_tc_queue(netdev
,
284 kinfo
->tc_info
[i
].tc
,
285 kinfo
->tc_info
[i
].tqp_count
,
286 kinfo
->tc_info
[i
].tqp_offset
);
290 ret
= netif_set_real_num_tx_queues(netdev
, queue_size
);
293 "netif_set_real_num_tx_queues fail, ret=%d!\n",
298 ret
= netif_set_real_num_rx_queues(netdev
, queue_size
);
301 "netif_set_real_num_rx_queues fail, ret=%d!\n", ret
);
308 static u16
hns3_get_max_available_channels(struct hnae3_handle
*h
)
310 u16 free_tqps
, max_rss_size
, max_tqps
;
312 h
->ae_algo
->ops
->get_tqps_and_rss_info(h
, &free_tqps
, &max_rss_size
);
313 max_tqps
= h
->kinfo
.num_tc
* max_rss_size
;
315 return min_t(u16
, max_tqps
, (free_tqps
+ h
->kinfo
.num_tqps
));
318 static int hns3_nic_net_up(struct net_device
*netdev
)
320 struct hns3_nic_priv
*priv
= netdev_priv(netdev
);
321 struct hnae3_handle
*h
= priv
->ae_handle
;
325 ret
= hns3_nic_reset_all_ring(h
);
329 /* get irq resource for all vectors */
330 ret
= hns3_nic_init_irq(priv
);
332 netdev_err(netdev
, "hns init irq failed! ret=%d\n", ret
);
336 /* enable the vectors */
337 for (i
= 0; i
< priv
->vector_num
; i
++)
338 hns3_vector_enable(&priv
->tqp_vector
[i
]);
340 /* start the ae_dev */
341 ret
= h
->ae_algo
->ops
->start
? h
->ae_algo
->ops
->start(h
) : 0;
345 clear_bit(HNS3_NIC_STATE_DOWN
, &priv
->state
);
350 for (j
= i
- 1; j
>= 0; j
--)
351 hns3_vector_disable(&priv
->tqp_vector
[j
]);
353 hns3_nic_uninit_irq(priv
);
358 static int hns3_nic_net_open(struct net_device
*netdev
)
360 struct hns3_nic_priv
*priv
= netdev_priv(netdev
);
361 struct hnae3_handle
*h
= hns3_get_handle(netdev
);
362 struct hnae3_knic_private_info
*kinfo
;
365 netif_carrier_off(netdev
);
367 ret
= hns3_nic_set_real_num_queue(netdev
);
371 ret
= hns3_nic_net_up(netdev
);
374 "hns net up fail, ret=%d!\n", ret
);
379 for (i
= 0; i
< HNAE3_MAX_USER_PRIO
; i
++) {
380 netdev_set_prio_tc_map(netdev
, i
,
384 priv
->ae_handle
->last_reset_time
= jiffies
;
388 static void hns3_nic_net_down(struct net_device
*netdev
)
390 struct hns3_nic_priv
*priv
= netdev_priv(netdev
);
391 const struct hnae3_ae_ops
*ops
;
394 if (test_and_set_bit(HNS3_NIC_STATE_DOWN
, &priv
->state
))
397 /* disable vectors */
398 for (i
= 0; i
< priv
->vector_num
; i
++)
399 hns3_vector_disable(&priv
->tqp_vector
[i
]);
402 ops
= priv
->ae_handle
->ae_algo
->ops
;
404 ops
->stop(priv
->ae_handle
);
406 /* free irq resources */
407 hns3_nic_uninit_irq(priv
);
409 hns3_clear_all_ring(priv
->ae_handle
);
412 static int hns3_nic_net_stop(struct net_device
*netdev
)
414 netif_tx_stop_all_queues(netdev
);
415 netif_carrier_off(netdev
);
417 hns3_nic_net_down(netdev
);
422 static int hns3_nic_uc_sync(struct net_device
*netdev
,
423 const unsigned char *addr
)
425 struct hnae3_handle
*h
= hns3_get_handle(netdev
);
427 if (h
->ae_algo
->ops
->add_uc_addr
)
428 return h
->ae_algo
->ops
->add_uc_addr(h
, addr
);
433 static int hns3_nic_uc_unsync(struct net_device
*netdev
,
434 const unsigned char *addr
)
436 struct hnae3_handle
*h
= hns3_get_handle(netdev
);
438 if (h
->ae_algo
->ops
->rm_uc_addr
)
439 return h
->ae_algo
->ops
->rm_uc_addr(h
, addr
);
444 static int hns3_nic_mc_sync(struct net_device
*netdev
,
445 const unsigned char *addr
)
447 struct hnae3_handle
*h
= hns3_get_handle(netdev
);
449 if (h
->ae_algo
->ops
->add_mc_addr
)
450 return h
->ae_algo
->ops
->add_mc_addr(h
, addr
);
455 static int hns3_nic_mc_unsync(struct net_device
*netdev
,
456 const unsigned char *addr
)
458 struct hnae3_handle
*h
= hns3_get_handle(netdev
);
460 if (h
->ae_algo
->ops
->rm_mc_addr
)
461 return h
->ae_algo
->ops
->rm_mc_addr(h
, addr
);
466 static void hns3_nic_set_rx_mode(struct net_device
*netdev
)
468 struct hnae3_handle
*h
= hns3_get_handle(netdev
);
470 if (h
->ae_algo
->ops
->set_promisc_mode
) {
471 if (netdev
->flags
& IFF_PROMISC
)
472 h
->ae_algo
->ops
->set_promisc_mode(h
, true, true);
473 else if (netdev
->flags
& IFF_ALLMULTI
)
474 h
->ae_algo
->ops
->set_promisc_mode(h
, false, true);
476 h
->ae_algo
->ops
->set_promisc_mode(h
, false, false);
478 if (__dev_uc_sync(netdev
, hns3_nic_uc_sync
, hns3_nic_uc_unsync
))
479 netdev_err(netdev
, "sync uc address fail\n");
480 if (netdev
->flags
& IFF_MULTICAST
) {
481 if (__dev_mc_sync(netdev
, hns3_nic_mc_sync
, hns3_nic_mc_unsync
))
482 netdev_err(netdev
, "sync mc address fail\n");
484 if (h
->ae_algo
->ops
->update_mta_status
)
485 h
->ae_algo
->ops
->update_mta_status(h
);
489 static int hns3_set_tso(struct sk_buff
*skb
, u32
*paylen
,
490 u16
*mss
, u32
*type_cs_vlan_tso
)
492 u32 l4_offset
, hdr_len
;
493 union l3_hdr_info l3
;
494 union l4_hdr_info l4
;
498 if (!skb_is_gso(skb
))
501 ret
= skb_cow_head(skb
, 0);
505 l3
.hdr
= skb_network_header(skb
);
506 l4
.hdr
= skb_transport_header(skb
);
508 /* Software should clear the IPv4's checksum field when tso is
511 if (l3
.v4
->version
== 4)
515 if (skb_shinfo(skb
)->gso_type
& (SKB_GSO_GRE
|
518 SKB_GSO_UDP_TUNNEL_CSUM
)) {
519 if ((!(skb_shinfo(skb
)->gso_type
&
521 (skb_shinfo(skb
)->gso_type
&
522 SKB_GSO_UDP_TUNNEL_CSUM
)) {
523 /* Software should clear the udp's checksum
524 * field when tso is needed.
528 /* reset l3&l4 pointers from outer to inner headers */
529 l3
.hdr
= skb_inner_network_header(skb
);
530 l4
.hdr
= skb_inner_transport_header(skb
);
532 /* Software should clear the IPv4's checksum field when
535 if (l3
.v4
->version
== 4)
539 /* normal or tunnel packet*/
540 l4_offset
= l4
.hdr
- skb
->data
;
541 hdr_len
= (l4
.tcp
->doff
* 4) + l4_offset
;
543 /* remove payload length from inner pseudo checksum when tso*/
544 l4_paylen
= skb
->len
- l4_offset
;
545 csum_replace_by_diff(&l4
.tcp
->check
,
546 (__force __wsum
)htonl(l4_paylen
));
548 /* find the txbd field values */
549 *paylen
= skb
->len
- hdr_len
;
550 hnae3_set_bit(*type_cs_vlan_tso
,
553 /* get MSS for TSO */
554 *mss
= skb_shinfo(skb
)->gso_size
;
559 static int hns3_get_l4_protocol(struct sk_buff
*skb
, u8
*ol4_proto
,
567 unsigned char *l4_hdr
;
568 unsigned char *exthdr
;
572 /* find outer header point */
573 l3
.hdr
= skb_network_header(skb
);
574 l4_hdr
= skb_transport_header(skb
);
576 if (skb
->protocol
== htons(ETH_P_IPV6
)) {
577 exthdr
= l3
.hdr
+ sizeof(*l3
.v6
);
578 l4_proto_tmp
= l3
.v6
->nexthdr
;
579 if (l4_hdr
!= exthdr
)
580 ipv6_skip_exthdr(skb
, exthdr
- skb
->data
,
581 &l4_proto_tmp
, &frag_off
);
582 } else if (skb
->protocol
== htons(ETH_P_IP
)) {
583 l4_proto_tmp
= l3
.v4
->protocol
;
588 *ol4_proto
= l4_proto_tmp
;
591 if (!skb
->encapsulation
) {
596 /* find inner header point */
597 l3
.hdr
= skb_inner_network_header(skb
);
598 l4_hdr
= skb_inner_transport_header(skb
);
600 if (l3
.v6
->version
== 6) {
601 exthdr
= l3
.hdr
+ sizeof(*l3
.v6
);
602 l4_proto_tmp
= l3
.v6
->nexthdr
;
603 if (l4_hdr
!= exthdr
)
604 ipv6_skip_exthdr(skb
, exthdr
- skb
->data
,
605 &l4_proto_tmp
, &frag_off
);
606 } else if (l3
.v4
->version
== 4) {
607 l4_proto_tmp
= l3
.v4
->protocol
;
610 *il4_proto
= l4_proto_tmp
;
615 static void hns3_set_l2l3l4_len(struct sk_buff
*skb
, u8 ol4_proto
,
616 u8 il4_proto
, u32
*type_cs_vlan_tso
,
617 u32
*ol_type_vlan_len_msec
)
627 struct gre_base_hdr
*gre
;
630 unsigned char *l2_hdr
;
631 u8 l4_proto
= ol4_proto
;
638 l3
.hdr
= skb_network_header(skb
);
639 l4
.hdr
= skb_transport_header(skb
);
641 /* compute L2 header size for normal packet, defined in 2 Bytes */
642 l2_len
= l3
.hdr
- skb
->data
;
643 hnae3_set_field(*type_cs_vlan_tso
, HNS3_TXD_L2LEN_M
,
644 HNS3_TXD_L2LEN_S
, l2_len
>> 1);
647 if (skb
->encapsulation
) {
648 /* compute OL2 header size, defined in 2 Bytes */
650 hnae3_set_field(*ol_type_vlan_len_msec
,
652 HNS3_TXD_L2LEN_S
, ol2_len
>> 1);
654 /* compute OL3 header size, defined in 4 Bytes */
655 ol3_len
= l4
.hdr
- l3
.hdr
;
656 hnae3_set_field(*ol_type_vlan_len_msec
, HNS3_TXD_L3LEN_M
,
657 HNS3_TXD_L3LEN_S
, ol3_len
>> 2);
659 /* MAC in UDP, MAC in GRE (0x6558)*/
660 if ((ol4_proto
== IPPROTO_UDP
) || (ol4_proto
== IPPROTO_GRE
)) {
661 /* switch MAC header ptr from outer to inner header.*/
662 l2_hdr
= skb_inner_mac_header(skb
);
664 /* compute OL4 header size, defined in 4 Bytes. */
665 ol4_len
= l2_hdr
- l4
.hdr
;
666 hnae3_set_field(*ol_type_vlan_len_msec
,
667 HNS3_TXD_L4LEN_M
, HNS3_TXD_L4LEN_S
,
670 /* switch IP header ptr from outer to inner header */
671 l3
.hdr
= skb_inner_network_header(skb
);
673 /* compute inner l2 header size, defined in 2 Bytes. */
674 l2_len
= l3
.hdr
- l2_hdr
;
675 hnae3_set_field(*type_cs_vlan_tso
, HNS3_TXD_L2LEN_M
,
676 HNS3_TXD_L2LEN_S
, l2_len
>> 1);
678 /* skb packet types not supported by hardware,
679 * txbd len fild doesn't be filled.
684 /* switch L4 header pointer from outer to inner */
685 l4
.hdr
= skb_inner_transport_header(skb
);
687 l4_proto
= il4_proto
;
690 /* compute inner(/normal) L3 header size, defined in 4 Bytes */
691 l3_len
= l4
.hdr
- l3
.hdr
;
692 hnae3_set_field(*type_cs_vlan_tso
, HNS3_TXD_L3LEN_M
,
693 HNS3_TXD_L3LEN_S
, l3_len
>> 2);
695 /* compute inner(/normal) L4 header size, defined in 4 Bytes */
698 hnae3_set_field(*type_cs_vlan_tso
, HNS3_TXD_L4LEN_M
,
699 HNS3_TXD_L4LEN_S
, l4
.tcp
->doff
);
702 hnae3_set_field(*type_cs_vlan_tso
, HNS3_TXD_L4LEN_M
,
704 (sizeof(struct sctphdr
) >> 2));
707 hnae3_set_field(*type_cs_vlan_tso
, HNS3_TXD_L4LEN_M
,
709 (sizeof(struct udphdr
) >> 2));
712 /* skb packet types not supported by hardware,
713 * txbd len fild doesn't be filled.
719 /* when skb->encapsulation is 0, skb->ip_summed is CHECKSUM_PARTIAL
720 * and it is udp packet, which has a dest port as the IANA assigned.
721 * the hardware is expected to do the checksum offload, but the
722 * hardware will not do the checksum offload when udp dest port is
725 static bool hns3_tunnel_csum_bug(struct sk_buff
*skb
)
727 #define IANA_VXLAN_PORT 4789
731 struct gre_base_hdr
*gre
;
735 l4
.hdr
= skb_transport_header(skb
);
737 if (!(!skb
->encapsulation
&& l4
.udp
->dest
== htons(IANA_VXLAN_PORT
)))
740 skb_checksum_help(skb
);
745 static int hns3_set_l3l4_type_csum(struct sk_buff
*skb
, u8 ol4_proto
,
746 u8 il4_proto
, u32
*type_cs_vlan_tso
,
747 u32
*ol_type_vlan_len_msec
)
754 u32 l4_proto
= ol4_proto
;
756 l3
.hdr
= skb_network_header(skb
);
758 /* define OL3 type and tunnel type(OL4).*/
759 if (skb
->encapsulation
) {
760 /* define outer network header type.*/
761 if (skb
->protocol
== htons(ETH_P_IP
)) {
763 hnae3_set_field(*ol_type_vlan_len_msec
,
766 HNS3_OL3T_IPV4_CSUM
);
768 hnae3_set_field(*ol_type_vlan_len_msec
,
771 HNS3_OL3T_IPV4_NO_CSUM
);
773 } else if (skb
->protocol
== htons(ETH_P_IPV6
)) {
774 hnae3_set_field(*ol_type_vlan_len_msec
, HNS3_TXD_OL3T_M
,
775 HNS3_TXD_OL3T_S
, HNS3_OL3T_IPV6
);
778 /* define tunnel type(OL4).*/
781 hnae3_set_field(*ol_type_vlan_len_msec
,
784 HNS3_TUN_MAC_IN_UDP
);
787 hnae3_set_field(*ol_type_vlan_len_msec
,
793 /* drop the skb tunnel packet if hardware don't support,
794 * because hardware can't calculate csum when TSO.
799 /* the stack computes the IP header already,
800 * driver calculate l4 checksum when not TSO.
802 skb_checksum_help(skb
);
806 l3
.hdr
= skb_inner_network_header(skb
);
807 l4_proto
= il4_proto
;
810 if (l3
.v4
->version
== 4) {
811 hnae3_set_field(*type_cs_vlan_tso
, HNS3_TXD_L3T_M
,
812 HNS3_TXD_L3T_S
, HNS3_L3T_IPV4
);
814 /* the stack computes the IP header already, the only time we
815 * need the hardware to recompute it is in the case of TSO.
818 hnae3_set_bit(*type_cs_vlan_tso
, HNS3_TXD_L3CS_B
, 1);
819 } else if (l3
.v6
->version
== 6) {
820 hnae3_set_field(*type_cs_vlan_tso
, HNS3_TXD_L3T_M
,
821 HNS3_TXD_L3T_S
, HNS3_L3T_IPV6
);
826 hnae3_set_bit(*type_cs_vlan_tso
, HNS3_TXD_L4CS_B
, 1);
827 hnae3_set_field(*type_cs_vlan_tso
,
833 if (hns3_tunnel_csum_bug(skb
))
836 hnae3_set_bit(*type_cs_vlan_tso
, HNS3_TXD_L4CS_B
, 1);
837 hnae3_set_field(*type_cs_vlan_tso
,
843 hnae3_set_bit(*type_cs_vlan_tso
, HNS3_TXD_L4CS_B
, 1);
844 hnae3_set_field(*type_cs_vlan_tso
,
850 /* drop the skb tunnel packet if hardware don't support,
851 * because hardware can't calculate csum when TSO.
856 /* the stack computes the IP header already,
857 * driver calculate l4 checksum when not TSO.
859 skb_checksum_help(skb
);
866 static void hns3_set_txbd_baseinfo(u16
*bdtp_fe_sc_vld_ra_ri
, int frag_end
)
868 /* Config bd buffer end */
869 hnae3_set_field(*bdtp_fe_sc_vld_ra_ri
, HNS3_TXD_BDTYPE_M
,
870 HNS3_TXD_BDTYPE_S
, 0);
871 hnae3_set_bit(*bdtp_fe_sc_vld_ra_ri
, HNS3_TXD_FE_B
, !!frag_end
);
872 hnae3_set_bit(*bdtp_fe_sc_vld_ra_ri
, HNS3_TXD_VLD_B
, 1);
873 hnae3_set_field(*bdtp_fe_sc_vld_ra_ri
, HNS3_TXD_SC_M
, HNS3_TXD_SC_S
, 0);
876 static int hns3_fill_desc_vtags(struct sk_buff
*skb
,
877 struct hns3_enet_ring
*tx_ring
,
878 u32
*inner_vlan_flag
,
883 #define HNS3_TX_VLAN_PRIO_SHIFT 13
885 if (skb
->protocol
== htons(ETH_P_8021Q
) &&
886 !(tx_ring
->tqp
->handle
->kinfo
.netdev
->features
&
887 NETIF_F_HW_VLAN_CTAG_TX
)) {
888 /* When HW VLAN acceleration is turned off, and the stack
889 * sets the protocol to 802.1q, the driver just need to
890 * set the protocol to the encapsulated ethertype.
892 skb
->protocol
= vlan_get_protocol(skb
);
896 if (skb_vlan_tag_present(skb
)) {
899 vlan_tag
= skb_vlan_tag_get(skb
);
900 vlan_tag
|= (skb
->priority
& 0x7) << HNS3_TX_VLAN_PRIO_SHIFT
;
902 /* Based on hw strategy, use out_vtag in two layer tag case,
903 * and use inner_vtag in one tag case.
905 if (skb
->protocol
== htons(ETH_P_8021Q
)) {
906 hnae3_set_bit(*out_vlan_flag
, HNS3_TXD_OVLAN_B
, 1);
907 *out_vtag
= vlan_tag
;
909 hnae3_set_bit(*inner_vlan_flag
, HNS3_TXD_VLAN_B
, 1);
910 *inner_vtag
= vlan_tag
;
912 } else if (skb
->protocol
== htons(ETH_P_8021Q
)) {
913 struct vlan_ethhdr
*vhdr
;
916 rc
= skb_cow_head(skb
, 0);
919 vhdr
= (struct vlan_ethhdr
*)skb
->data
;
920 vhdr
->h_vlan_TCI
|= cpu_to_be16((skb
->priority
& 0x7)
921 << HNS3_TX_VLAN_PRIO_SHIFT
);
924 skb
->protocol
= vlan_get_protocol(skb
);
928 static int hns3_fill_desc(struct hns3_enet_ring
*ring
, void *priv
,
929 int size
, dma_addr_t dma
, int frag_end
,
930 enum hns_desc_type type
)
932 struct hns3_desc_cb
*desc_cb
= &ring
->desc_cb
[ring
->next_to_use
];
933 struct hns3_desc
*desc
= &ring
->desc
[ring
->next_to_use
];
934 u32 ol_type_vlan_len_msec
= 0;
935 u16 bdtp_fe_sc_vld_ra_ri
= 0;
936 u32 type_cs_vlan_tso
= 0;
946 /* The txbd's baseinfo of DESC_TYPE_PAGE & DESC_TYPE_SKB */
947 desc_cb
->priv
= priv
;
948 desc_cb
->length
= size
;
950 desc_cb
->type
= type
;
952 /* now, fill the descriptor */
953 desc
->addr
= cpu_to_le64(dma
);
954 desc
->tx
.send_size
= cpu_to_le16((u16
)size
);
955 hns3_set_txbd_baseinfo(&bdtp_fe_sc_vld_ra_ri
, frag_end
);
956 desc
->tx
.bdtp_fe_sc_vld_ra_ri
= cpu_to_le16(bdtp_fe_sc_vld_ra_ri
);
958 if (type
== DESC_TYPE_SKB
) {
959 skb
= (struct sk_buff
*)priv
;
962 ret
= hns3_fill_desc_vtags(skb
, ring
, &type_cs_vlan_tso
,
963 &ol_type_vlan_len_msec
,
964 &inner_vtag
, &out_vtag
);
968 if (skb
->ip_summed
== CHECKSUM_PARTIAL
) {
969 skb_reset_mac_len(skb
);
971 ret
= hns3_get_l4_protocol(skb
, &ol4_proto
, &il4_proto
);
974 hns3_set_l2l3l4_len(skb
, ol4_proto
, il4_proto
,
976 &ol_type_vlan_len_msec
);
977 ret
= hns3_set_l3l4_type_csum(skb
, ol4_proto
, il4_proto
,
979 &ol_type_vlan_len_msec
);
983 ret
= hns3_set_tso(skb
, &paylen
, &mss
,
990 desc
->tx
.ol_type_vlan_len_msec
=
991 cpu_to_le32(ol_type_vlan_len_msec
);
992 desc
->tx
.type_cs_vlan_tso_len
=
993 cpu_to_le32(type_cs_vlan_tso
);
994 desc
->tx
.paylen
= cpu_to_le32(paylen
);
995 desc
->tx
.mss
= cpu_to_le16(mss
);
996 desc
->tx
.vlan_tag
= cpu_to_le16(inner_vtag
);
997 desc
->tx
.outer_vlan_tag
= cpu_to_le16(out_vtag
);
1000 /* move ring pointer to next.*/
1001 ring_ptr_move_fw(ring
, next_to_use
);
1006 static int hns3_fill_desc_tso(struct hns3_enet_ring
*ring
, void *priv
,
1007 int size
, dma_addr_t dma
, int frag_end
,
1008 enum hns_desc_type type
)
1010 unsigned int frag_buf_num
;
1015 frag_buf_num
= (size
+ HNS3_MAX_BD_SIZE
- 1) / HNS3_MAX_BD_SIZE
;
1016 sizeoflast
= size
% HNS3_MAX_BD_SIZE
;
1017 sizeoflast
= sizeoflast
? sizeoflast
: HNS3_MAX_BD_SIZE
;
1019 /* When the frag size is bigger than hardware, split this frag */
1020 for (k
= 0; k
< frag_buf_num
; k
++) {
1021 ret
= hns3_fill_desc(ring
, priv
,
1022 (k
== frag_buf_num
- 1) ?
1023 sizeoflast
: HNS3_MAX_BD_SIZE
,
1024 dma
+ HNS3_MAX_BD_SIZE
* k
,
1025 frag_end
&& (k
== frag_buf_num
- 1) ? 1 : 0,
1026 (type
== DESC_TYPE_SKB
&& !k
) ?
1027 DESC_TYPE_SKB
: DESC_TYPE_PAGE
);
1035 static int hns3_nic_maybe_stop_tso(struct sk_buff
**out_skb
, int *bnum
,
1036 struct hns3_enet_ring
*ring
)
1038 struct sk_buff
*skb
= *out_skb
;
1039 struct skb_frag_struct
*frag
;
1046 size
= skb_headlen(skb
);
1047 buf_num
= (size
+ HNS3_MAX_BD_SIZE
- 1) / HNS3_MAX_BD_SIZE
;
1049 frag_num
= skb_shinfo(skb
)->nr_frags
;
1050 for (i
= 0; i
< frag_num
; i
++) {
1051 frag
= &skb_shinfo(skb
)->frags
[i
];
1052 size
= skb_frag_size(frag
);
1054 (size
+ HNS3_MAX_BD_SIZE
- 1) / HNS3_MAX_BD_SIZE
;
1055 if (bdnum_for_frag
> HNS3_MAX_BD_PER_FRAG
)
1058 buf_num
+= bdnum_for_frag
;
1061 if (buf_num
> ring_space(ring
))
1068 static int hns3_nic_maybe_stop_tx(struct sk_buff
**out_skb
, int *bnum
,
1069 struct hns3_enet_ring
*ring
)
1071 struct sk_buff
*skb
= *out_skb
;
1074 /* No. of segments (plus a header) */
1075 buf_num
= skb_shinfo(skb
)->nr_frags
+ 1;
1077 if (unlikely(ring_space(ring
) < buf_num
))
1085 static void hns_nic_dma_unmap(struct hns3_enet_ring
*ring
, int next_to_use_orig
)
1087 struct device
*dev
= ring_to_dev(ring
);
1090 for (i
= 0; i
< ring
->desc_num
; i
++) {
1091 /* check if this is where we started */
1092 if (ring
->next_to_use
== next_to_use_orig
)
1095 /* unmap the descriptor dma address */
1096 if (ring
->desc_cb
[ring
->next_to_use
].type
== DESC_TYPE_SKB
)
1097 dma_unmap_single(dev
,
1098 ring
->desc_cb
[ring
->next_to_use
].dma
,
1099 ring
->desc_cb
[ring
->next_to_use
].length
,
1103 ring
->desc_cb
[ring
->next_to_use
].dma
,
1104 ring
->desc_cb
[ring
->next_to_use
].length
,
1108 ring_ptr_move_bw(ring
, next_to_use
);
1112 netdev_tx_t
hns3_nic_net_xmit(struct sk_buff
*skb
, struct net_device
*netdev
)
1114 struct hns3_nic_priv
*priv
= netdev_priv(netdev
);
1115 struct hns3_nic_ring_data
*ring_data
=
1116 &tx_ring_data(priv
, skb
->queue_mapping
);
1117 struct hns3_enet_ring
*ring
= ring_data
->ring
;
1118 struct device
*dev
= priv
->dev
;
1119 struct netdev_queue
*dev_queue
;
1120 struct skb_frag_struct
*frag
;
1121 int next_to_use_head
;
1122 int next_to_use_frag
;
1130 /* Prefetch the data used later */
1131 prefetch(skb
->data
);
1133 switch (priv
->ops
.maybe_stop_tx(&skb
, &buf_num
, ring
)) {
1135 u64_stats_update_begin(&ring
->syncp
);
1136 ring
->stats
.tx_busy
++;
1137 u64_stats_update_end(&ring
->syncp
);
1139 goto out_net_tx_busy
;
1141 u64_stats_update_begin(&ring
->syncp
);
1142 ring
->stats
.sw_err_cnt
++;
1143 u64_stats_update_end(&ring
->syncp
);
1144 netdev_err(netdev
, "no memory to xmit!\n");
1151 /* No. of segments (plus a header) */
1152 seg_num
= skb_shinfo(skb
)->nr_frags
+ 1;
1153 /* Fill the first part */
1154 size
= skb_headlen(skb
);
1156 next_to_use_head
= ring
->next_to_use
;
1158 dma
= dma_map_single(dev
, skb
->data
, size
, DMA_TO_DEVICE
);
1159 if (dma_mapping_error(dev
, dma
)) {
1160 netdev_err(netdev
, "TX head DMA map failed\n");
1161 ring
->stats
.sw_err_cnt
++;
1165 ret
= priv
->ops
.fill_desc(ring
, skb
, size
, dma
, seg_num
== 1 ? 1 : 0,
1168 goto head_dma_map_err
;
1170 next_to_use_frag
= ring
->next_to_use
;
1171 /* Fill the fragments */
1172 for (i
= 1; i
< seg_num
; i
++) {
1173 frag
= &skb_shinfo(skb
)->frags
[i
- 1];
1174 size
= skb_frag_size(frag
);
1175 dma
= skb_frag_dma_map(dev
, frag
, 0, size
, DMA_TO_DEVICE
);
1176 if (dma_mapping_error(dev
, dma
)) {
1177 netdev_err(netdev
, "TX frag(%d) DMA map failed\n", i
);
1178 ring
->stats
.sw_err_cnt
++;
1179 goto frag_dma_map_err
;
1181 ret
= priv
->ops
.fill_desc(ring
, skb_frag_page(frag
), size
, dma
,
1182 seg_num
- 1 == i
? 1 : 0,
1186 goto frag_dma_map_err
;
1189 /* Complete translate all packets */
1190 dev_queue
= netdev_get_tx_queue(netdev
, ring_data
->queue_index
);
1191 netdev_tx_sent_queue(dev_queue
, skb
->len
);
1193 wmb(); /* Commit all data before submit */
1195 hnae3_queue_xmit(ring
->tqp
, buf_num
);
1197 return NETDEV_TX_OK
;
1200 hns_nic_dma_unmap(ring
, next_to_use_frag
);
1203 hns_nic_dma_unmap(ring
, next_to_use_head
);
1206 dev_kfree_skb_any(skb
);
1207 return NETDEV_TX_OK
;
1210 netif_stop_subqueue(netdev
, ring_data
->queue_index
);
1211 smp_mb(); /* Commit all data before submit */
1213 return NETDEV_TX_BUSY
;
1216 static int hns3_nic_net_set_mac_address(struct net_device
*netdev
, void *p
)
1218 struct hnae3_handle
*h
= hns3_get_handle(netdev
);
1219 struct sockaddr
*mac_addr
= p
;
1222 if (!mac_addr
|| !is_valid_ether_addr((const u8
*)mac_addr
->sa_data
))
1223 return -EADDRNOTAVAIL
;
1225 if (ether_addr_equal(netdev
->dev_addr
, mac_addr
->sa_data
)) {
1226 netdev_info(netdev
, "already using mac address %pM\n",
1231 ret
= h
->ae_algo
->ops
->set_mac_addr(h
, mac_addr
->sa_data
, false);
1233 netdev_err(netdev
, "set_mac_address fail, ret=%d!\n", ret
);
1237 ether_addr_copy(netdev
->dev_addr
, mac_addr
->sa_data
);
1242 static int hns3_nic_do_ioctl(struct net_device
*netdev
,
1243 struct ifreq
*ifr
, int cmd
)
1245 struct hnae3_handle
*h
= hns3_get_handle(netdev
);
1247 if (!netif_running(netdev
))
1250 if (!h
->ae_algo
->ops
->do_ioctl
)
1253 return h
->ae_algo
->ops
->do_ioctl(h
, ifr
, cmd
);
1256 static int hns3_nic_set_features(struct net_device
*netdev
,
1257 netdev_features_t features
)
1259 netdev_features_t changed
= netdev
->features
^ features
;
1260 struct hns3_nic_priv
*priv
= netdev_priv(netdev
);
1261 struct hnae3_handle
*h
= priv
->ae_handle
;
1264 if (changed
& (NETIF_F_TSO
| NETIF_F_TSO6
)) {
1265 if (features
& (NETIF_F_TSO
| NETIF_F_TSO6
)) {
1266 priv
->ops
.fill_desc
= hns3_fill_desc_tso
;
1267 priv
->ops
.maybe_stop_tx
= hns3_nic_maybe_stop_tso
;
1269 priv
->ops
.fill_desc
= hns3_fill_desc
;
1270 priv
->ops
.maybe_stop_tx
= hns3_nic_maybe_stop_tx
;
1274 if ((changed
& NETIF_F_HW_VLAN_CTAG_FILTER
) &&
1275 h
->ae_algo
->ops
->enable_vlan_filter
) {
1276 if (features
& NETIF_F_HW_VLAN_CTAG_FILTER
)
1277 h
->ae_algo
->ops
->enable_vlan_filter(h
, true);
1279 h
->ae_algo
->ops
->enable_vlan_filter(h
, false);
1282 if ((changed
& NETIF_F_HW_VLAN_CTAG_RX
) &&
1283 h
->ae_algo
->ops
->enable_hw_strip_rxvtag
) {
1284 if (features
& NETIF_F_HW_VLAN_CTAG_RX
)
1285 ret
= h
->ae_algo
->ops
->enable_hw_strip_rxvtag(h
, true);
1287 ret
= h
->ae_algo
->ops
->enable_hw_strip_rxvtag(h
, false);
1293 netdev
->features
= features
;
1297 static void hns3_nic_get_stats64(struct net_device
*netdev
,
1298 struct rtnl_link_stats64
*stats
)
1300 struct hns3_nic_priv
*priv
= netdev_priv(netdev
);
1301 int queue_num
= priv
->ae_handle
->kinfo
.num_tqps
;
1302 struct hnae3_handle
*handle
= priv
->ae_handle
;
1303 struct hns3_enet_ring
*ring
;
1313 if (test_bit(HNS3_NIC_STATE_DOWN
, &priv
->state
))
1316 handle
->ae_algo
->ops
->update_stats(handle
, &netdev
->stats
);
1318 for (idx
= 0; idx
< queue_num
; idx
++) {
1319 /* fetch the tx stats */
1320 ring
= priv
->ring_data
[idx
].ring
;
1322 start
= u64_stats_fetch_begin_irq(&ring
->syncp
);
1323 tx_bytes
+= ring
->stats
.tx_bytes
;
1324 tx_pkts
+= ring
->stats
.tx_pkts
;
1325 tx_drop
+= ring
->stats
.tx_busy
;
1326 tx_drop
+= ring
->stats
.sw_err_cnt
;
1327 } while (u64_stats_fetch_retry_irq(&ring
->syncp
, start
));
1329 /* fetch the rx stats */
1330 ring
= priv
->ring_data
[idx
+ queue_num
].ring
;
1332 start
= u64_stats_fetch_begin_irq(&ring
->syncp
);
1333 rx_bytes
+= ring
->stats
.rx_bytes
;
1334 rx_pkts
+= ring
->stats
.rx_pkts
;
1335 rx_drop
+= ring
->stats
.non_vld_descs
;
1336 rx_drop
+= ring
->stats
.err_pkt_len
;
1337 rx_drop
+= ring
->stats
.l2_err
;
1338 } while (u64_stats_fetch_retry_irq(&ring
->syncp
, start
));
1341 stats
->tx_bytes
= tx_bytes
;
1342 stats
->tx_packets
= tx_pkts
;
1343 stats
->rx_bytes
= rx_bytes
;
1344 stats
->rx_packets
= rx_pkts
;
1346 stats
->rx_errors
= netdev
->stats
.rx_errors
;
1347 stats
->multicast
= netdev
->stats
.multicast
;
1348 stats
->rx_length_errors
= netdev
->stats
.rx_length_errors
;
1349 stats
->rx_crc_errors
= netdev
->stats
.rx_crc_errors
;
1350 stats
->rx_missed_errors
= netdev
->stats
.rx_missed_errors
;
1352 stats
->tx_errors
= netdev
->stats
.tx_errors
;
1353 stats
->rx_dropped
= rx_drop
+ netdev
->stats
.rx_dropped
;
1354 stats
->tx_dropped
= tx_drop
+ netdev
->stats
.tx_dropped
;
1355 stats
->collisions
= netdev
->stats
.collisions
;
1356 stats
->rx_over_errors
= netdev
->stats
.rx_over_errors
;
1357 stats
->rx_frame_errors
= netdev
->stats
.rx_frame_errors
;
1358 stats
->rx_fifo_errors
= netdev
->stats
.rx_fifo_errors
;
1359 stats
->tx_aborted_errors
= netdev
->stats
.tx_aborted_errors
;
1360 stats
->tx_carrier_errors
= netdev
->stats
.tx_carrier_errors
;
1361 stats
->tx_fifo_errors
= netdev
->stats
.tx_fifo_errors
;
1362 stats
->tx_heartbeat_errors
= netdev
->stats
.tx_heartbeat_errors
;
1363 stats
->tx_window_errors
= netdev
->stats
.tx_window_errors
;
1364 stats
->rx_compressed
= netdev
->stats
.rx_compressed
;
1365 stats
->tx_compressed
= netdev
->stats
.tx_compressed
;
1368 static int hns3_setup_tc(struct net_device
*netdev
, void *type_data
)
1370 struct tc_mqprio_qopt_offload
*mqprio_qopt
= type_data
;
1371 struct hnae3_handle
*h
= hns3_get_handle(netdev
);
1372 struct hnae3_knic_private_info
*kinfo
= &h
->kinfo
;
1373 u8
*prio_tc
= mqprio_qopt
->qopt
.prio_tc_map
;
1374 u8 tc
= mqprio_qopt
->qopt
.num_tc
;
1375 u16 mode
= mqprio_qopt
->mode
;
1376 u8 hw
= mqprio_qopt
->qopt
.hw
;
1380 if (!((hw
== TC_MQPRIO_HW_OFFLOAD_TCS
&&
1381 mode
== TC_MQPRIO_MODE_CHANNEL
) || (!hw
&& tc
== 0)))
1384 if (tc
> HNAE3_MAX_TC
)
1390 if_running
= netif_running(netdev
);
1392 hns3_nic_net_stop(netdev
);
1396 ret
= (kinfo
->dcb_ops
&& kinfo
->dcb_ops
->setup_tc
) ?
1397 kinfo
->dcb_ops
->setup_tc(h
, tc
, prio_tc
) : -EOPNOTSUPP
;
1401 ret
= hns3_nic_set_real_num_queue(netdev
);
1405 hns3_nic_net_open(netdev
);
1410 static int hns3_nic_setup_tc(struct net_device
*dev
, enum tc_setup_type type
,
1413 if (type
!= TC_SETUP_QDISC_MQPRIO
)
1416 return hns3_setup_tc(dev
, type_data
);
1419 static int hns3_vlan_rx_add_vid(struct net_device
*netdev
,
1420 __be16 proto
, u16 vid
)
1422 struct hnae3_handle
*h
= hns3_get_handle(netdev
);
1423 struct hns3_nic_priv
*priv
= netdev_priv(netdev
);
1426 if (h
->ae_algo
->ops
->set_vlan_filter
)
1427 ret
= h
->ae_algo
->ops
->set_vlan_filter(h
, proto
, vid
, false);
1430 set_bit(vid
, priv
->active_vlans
);
1435 static int hns3_vlan_rx_kill_vid(struct net_device
*netdev
,
1436 __be16 proto
, u16 vid
)
1438 struct hnae3_handle
*h
= hns3_get_handle(netdev
);
1439 struct hns3_nic_priv
*priv
= netdev_priv(netdev
);
1442 if (h
->ae_algo
->ops
->set_vlan_filter
)
1443 ret
= h
->ae_algo
->ops
->set_vlan_filter(h
, proto
, vid
, true);
1446 clear_bit(vid
, priv
->active_vlans
);
1451 static void hns3_restore_vlan(struct net_device
*netdev
)
1453 struct hns3_nic_priv
*priv
= netdev_priv(netdev
);
1457 for_each_set_bit(vid
, priv
->active_vlans
, VLAN_N_VID
) {
1458 ret
= hns3_vlan_rx_add_vid(netdev
, htons(ETH_P_8021Q
), vid
);
1460 netdev_warn(netdev
, "Restore vlan: %d filter, ret:%d\n",
1465 static int hns3_ndo_set_vf_vlan(struct net_device
*netdev
, int vf
, u16 vlan
,
1466 u8 qos
, __be16 vlan_proto
)
1468 struct hnae3_handle
*h
= hns3_get_handle(netdev
);
1471 if (h
->ae_algo
->ops
->set_vf_vlan_filter
)
1472 ret
= h
->ae_algo
->ops
->set_vf_vlan_filter(h
, vf
, vlan
,
1478 static int hns3_nic_change_mtu(struct net_device
*netdev
, int new_mtu
)
1480 struct hnae3_handle
*h
= hns3_get_handle(netdev
);
1481 bool if_running
= netif_running(netdev
);
1484 if (!h
->ae_algo
->ops
->set_mtu
)
1487 /* if this was called with netdev up then bring netdevice down */
1489 (void)hns3_nic_net_stop(netdev
);
1493 ret
= h
->ae_algo
->ops
->set_mtu(h
, new_mtu
);
1495 netdev_err(netdev
, "failed to change MTU in hardware %d\n",
1500 netdev
->mtu
= new_mtu
;
1502 /* if the netdev was running earlier, bring it up again */
1503 if (if_running
&& hns3_nic_net_open(netdev
))
1509 static bool hns3_get_tx_timeo_queue_info(struct net_device
*ndev
)
1511 struct hns3_nic_priv
*priv
= netdev_priv(ndev
);
1512 struct hns3_enet_ring
*tx_ring
= NULL
;
1513 int timeout_queue
= 0;
1514 int hw_head
, hw_tail
;
1517 /* Find the stopped queue the same way the stack does */
1518 for (i
= 0; i
< ndev
->real_num_tx_queues
; i
++) {
1519 struct netdev_queue
*q
;
1520 unsigned long trans_start
;
1522 q
= netdev_get_tx_queue(ndev
, i
);
1523 trans_start
= q
->trans_start
;
1524 if (netif_xmit_stopped(q
) &&
1526 (trans_start
+ ndev
->watchdog_timeo
))) {
1532 if (i
== ndev
->num_tx_queues
) {
1534 "no netdev TX timeout queue found, timeout count: %llu\n",
1535 priv
->tx_timeout_count
);
1539 tx_ring
= priv
->ring_data
[timeout_queue
].ring
;
1541 hw_head
= readl_relaxed(tx_ring
->tqp
->io_base
+
1542 HNS3_RING_TX_RING_HEAD_REG
);
1543 hw_tail
= readl_relaxed(tx_ring
->tqp
->io_base
+
1544 HNS3_RING_TX_RING_TAIL_REG
);
1546 "tx_timeout count: %llu, queue id: %d, SW_NTU: 0x%x, SW_NTC: 0x%x, HW_HEAD: 0x%x, HW_TAIL: 0x%x, INT: 0x%x\n",
1547 priv
->tx_timeout_count
,
1549 tx_ring
->next_to_use
,
1550 tx_ring
->next_to_clean
,
1553 readl(tx_ring
->tqp_vector
->mask_addr
));
1558 static void hns3_nic_net_timeout(struct net_device
*ndev
)
1560 struct hns3_nic_priv
*priv
= netdev_priv(ndev
);
1561 struct hnae3_handle
*h
= priv
->ae_handle
;
1563 if (!hns3_get_tx_timeo_queue_info(ndev
))
1566 priv
->tx_timeout_count
++;
1568 if (time_before(jiffies
, (h
->last_reset_time
+ ndev
->watchdog_timeo
)))
1571 /* request the reset */
1572 if (h
->ae_algo
->ops
->reset_event
)
1573 h
->ae_algo
->ops
->reset_event(h
);
1576 static const struct net_device_ops hns3_nic_netdev_ops
= {
1577 .ndo_open
= hns3_nic_net_open
,
1578 .ndo_stop
= hns3_nic_net_stop
,
1579 .ndo_start_xmit
= hns3_nic_net_xmit
,
1580 .ndo_tx_timeout
= hns3_nic_net_timeout
,
1581 .ndo_set_mac_address
= hns3_nic_net_set_mac_address
,
1582 .ndo_do_ioctl
= hns3_nic_do_ioctl
,
1583 .ndo_change_mtu
= hns3_nic_change_mtu
,
1584 .ndo_set_features
= hns3_nic_set_features
,
1585 .ndo_get_stats64
= hns3_nic_get_stats64
,
1586 .ndo_setup_tc
= hns3_nic_setup_tc
,
1587 .ndo_set_rx_mode
= hns3_nic_set_rx_mode
,
1588 .ndo_vlan_rx_add_vid
= hns3_vlan_rx_add_vid
,
1589 .ndo_vlan_rx_kill_vid
= hns3_vlan_rx_kill_vid
,
1590 .ndo_set_vf_vlan
= hns3_ndo_set_vf_vlan
,
1593 static bool hns3_is_phys_func(struct pci_dev
*pdev
)
1595 u32 dev_id
= pdev
->device
;
1598 case HNAE3_DEV_ID_GE
:
1599 case HNAE3_DEV_ID_25GE
:
1600 case HNAE3_DEV_ID_25GE_RDMA
:
1601 case HNAE3_DEV_ID_25GE_RDMA_MACSEC
:
1602 case HNAE3_DEV_ID_50GE_RDMA
:
1603 case HNAE3_DEV_ID_50GE_RDMA_MACSEC
:
1604 case HNAE3_DEV_ID_100G_RDMA_MACSEC
:
1606 case HNAE3_DEV_ID_100G_VF
:
1607 case HNAE3_DEV_ID_100G_RDMA_DCB_PFC_VF
:
1610 dev_warn(&pdev
->dev
, "un-recognized pci device-id %d",
1617 static void hns3_disable_sriov(struct pci_dev
*pdev
)
1619 /* If our VFs are assigned we cannot shut down SR-IOV
1620 * without causing issues, so just leave the hardware
1621 * available but disabled
1623 if (pci_vfs_assigned(pdev
)) {
1624 dev_warn(&pdev
->dev
,
1625 "disabling driver while VFs are assigned\n");
1629 pci_disable_sriov(pdev
);
1632 /* hns3_probe - Device initialization routine
1633 * @pdev: PCI device information struct
1634 * @ent: entry in hns3_pci_tbl
1636 * hns3_probe initializes a PF identified by a pci_dev structure.
1637 * The OS initialization, configuring of the PF private structure,
1638 * and a hardware reset occur.
1640 * Returns 0 on success, negative on failure
1642 static int hns3_probe(struct pci_dev
*pdev
, const struct pci_device_id
*ent
)
1644 struct hnae3_ae_dev
*ae_dev
;
1647 ae_dev
= devm_kzalloc(&pdev
->dev
, sizeof(*ae_dev
),
1654 ae_dev
->pdev
= pdev
;
1655 ae_dev
->flag
= ent
->driver_data
;
1656 ae_dev
->dev_type
= HNAE3_DEV_KNIC
;
1657 pci_set_drvdata(pdev
, ae_dev
);
1659 hnae3_register_ae_dev(ae_dev
);
1664 /* hns3_remove - Device removal routine
1665 * @pdev: PCI device information struct
1667 static void hns3_remove(struct pci_dev
*pdev
)
1669 struct hnae3_ae_dev
*ae_dev
= pci_get_drvdata(pdev
);
1671 if (hns3_is_phys_func(pdev
) && IS_ENABLED(CONFIG_PCI_IOV
))
1672 hns3_disable_sriov(pdev
);
1674 hnae3_unregister_ae_dev(ae_dev
);
1678 * hns3_pci_sriov_configure
1679 * @pdev: pointer to a pci_dev structure
1680 * @num_vfs: number of VFs to allocate
1682 * Enable or change the number of VFs. Called when the user updates the number
1685 static int hns3_pci_sriov_configure(struct pci_dev
*pdev
, int num_vfs
)
1689 if (!(hns3_is_phys_func(pdev
) && IS_ENABLED(CONFIG_PCI_IOV
))) {
1690 dev_warn(&pdev
->dev
, "Can not config SRIOV\n");
1695 ret
= pci_enable_sriov(pdev
, num_vfs
);
1697 dev_err(&pdev
->dev
, "SRIOV enable failed %d\n", ret
);
1700 } else if (!pci_vfs_assigned(pdev
)) {
1701 pci_disable_sriov(pdev
);
1703 dev_warn(&pdev
->dev
,
1704 "Unable to free VFs because some are assigned to VMs.\n");
1710 static void hns3_shutdown(struct pci_dev
*pdev
)
1712 struct hnae3_ae_dev
*ae_dev
= pci_get_drvdata(pdev
);
1714 hnae3_unregister_ae_dev(ae_dev
);
1715 devm_kfree(&pdev
->dev
, ae_dev
);
1716 pci_set_drvdata(pdev
, NULL
);
1718 if (system_state
== SYSTEM_POWER_OFF
)
1719 pci_set_power_state(pdev
, PCI_D3hot
);
1722 static struct pci_driver hns3_driver
= {
1723 .name
= hns3_driver_name
,
1724 .id_table
= hns3_pci_tbl
,
1725 .probe
= hns3_probe
,
1726 .remove
= hns3_remove
,
1727 .shutdown
= hns3_shutdown
,
1728 .sriov_configure
= hns3_pci_sriov_configure
,
1731 /* set default feature to hns3 */
1732 static void hns3_set_default_feature(struct net_device
*netdev
)
1734 struct hnae3_handle
*h
= hns3_get_handle(netdev
);
1735 struct pci_dev
*pdev
= h
->pdev
;
1737 netdev
->priv_flags
|= IFF_UNICAST_FLT
;
1739 netdev
->hw_enc_features
|= NETIF_F_IP_CSUM
| NETIF_F_IPV6_CSUM
|
1740 NETIF_F_RXCSUM
| NETIF_F_SG
| NETIF_F_GSO
|
1741 NETIF_F_GRO
| NETIF_F_TSO
| NETIF_F_TSO6
| NETIF_F_GSO_GRE
|
1742 NETIF_F_GSO_GRE_CSUM
| NETIF_F_GSO_UDP_TUNNEL
|
1743 NETIF_F_GSO_UDP_TUNNEL_CSUM
;
1745 netdev
->hw_enc_features
|= NETIF_F_TSO_MANGLEID
;
1747 netdev
->gso_partial_features
|= NETIF_F_GSO_GRE_CSUM
;
1749 netdev
->features
|= NETIF_F_IP_CSUM
| NETIF_F_IPV6_CSUM
|
1750 NETIF_F_HW_VLAN_CTAG_FILTER
|
1751 NETIF_F_HW_VLAN_CTAG_TX
| NETIF_F_HW_VLAN_CTAG_RX
|
1752 NETIF_F_RXCSUM
| NETIF_F_SG
| NETIF_F_GSO
|
1753 NETIF_F_GRO
| NETIF_F_TSO
| NETIF_F_TSO6
| NETIF_F_GSO_GRE
|
1754 NETIF_F_GSO_GRE_CSUM
| NETIF_F_GSO_UDP_TUNNEL
|
1755 NETIF_F_GSO_UDP_TUNNEL_CSUM
;
1757 netdev
->vlan_features
|=
1758 NETIF_F_IP_CSUM
| NETIF_F_IPV6_CSUM
| NETIF_F_RXCSUM
|
1759 NETIF_F_SG
| NETIF_F_GSO
| NETIF_F_GRO
|
1760 NETIF_F_TSO
| NETIF_F_TSO6
| NETIF_F_GSO_GRE
|
1761 NETIF_F_GSO_GRE_CSUM
| NETIF_F_GSO_UDP_TUNNEL
|
1762 NETIF_F_GSO_UDP_TUNNEL_CSUM
;
1764 netdev
->hw_features
|= NETIF_F_IP_CSUM
| NETIF_F_IPV6_CSUM
|
1765 NETIF_F_HW_VLAN_CTAG_TX
| NETIF_F_HW_VLAN_CTAG_RX
|
1766 NETIF_F_RXCSUM
| NETIF_F_SG
| NETIF_F_GSO
|
1767 NETIF_F_GRO
| NETIF_F_TSO
| NETIF_F_TSO6
| NETIF_F_GSO_GRE
|
1768 NETIF_F_GSO_GRE_CSUM
| NETIF_F_GSO_UDP_TUNNEL
|
1769 NETIF_F_GSO_UDP_TUNNEL_CSUM
;
1771 if (pdev
->revision
!= 0x20)
1772 netdev
->hw_features
|= NETIF_F_HW_VLAN_CTAG_FILTER
;
1775 static int hns3_alloc_buffer(struct hns3_enet_ring
*ring
,
1776 struct hns3_desc_cb
*cb
)
1778 unsigned int order
= hnae3_page_order(ring
);
1781 p
= dev_alloc_pages(order
);
1786 cb
->page_offset
= 0;
1788 cb
->buf
= page_address(p
);
1789 cb
->length
= hnae3_page_size(ring
);
1790 cb
->type
= DESC_TYPE_PAGE
;
1795 static void hns3_free_buffer(struct hns3_enet_ring
*ring
,
1796 struct hns3_desc_cb
*cb
)
1798 if (cb
->type
== DESC_TYPE_SKB
)
1799 dev_kfree_skb_any((struct sk_buff
*)cb
->priv
);
1800 else if (!HNAE3_IS_TX_RING(ring
))
1801 put_page((struct page
*)cb
->priv
);
1802 memset(cb
, 0, sizeof(*cb
));
1805 static int hns3_map_buffer(struct hns3_enet_ring
*ring
, struct hns3_desc_cb
*cb
)
1807 cb
->dma
= dma_map_page(ring_to_dev(ring
), cb
->priv
, 0,
1808 cb
->length
, ring_to_dma_dir(ring
));
1810 if (dma_mapping_error(ring_to_dev(ring
), cb
->dma
))
1816 static void hns3_unmap_buffer(struct hns3_enet_ring
*ring
,
1817 struct hns3_desc_cb
*cb
)
1819 if (cb
->type
== DESC_TYPE_SKB
)
1820 dma_unmap_single(ring_to_dev(ring
), cb
->dma
, cb
->length
,
1821 ring_to_dma_dir(ring
));
1823 dma_unmap_page(ring_to_dev(ring
), cb
->dma
, cb
->length
,
1824 ring_to_dma_dir(ring
));
1827 static void hns3_buffer_detach(struct hns3_enet_ring
*ring
, int i
)
1829 hns3_unmap_buffer(ring
, &ring
->desc_cb
[i
]);
1830 ring
->desc
[i
].addr
= 0;
1833 static void hns3_free_buffer_detach(struct hns3_enet_ring
*ring
, int i
)
1835 struct hns3_desc_cb
*cb
= &ring
->desc_cb
[i
];
1837 if (!ring
->desc_cb
[i
].dma
)
1840 hns3_buffer_detach(ring
, i
);
1841 hns3_free_buffer(ring
, cb
);
1844 static void hns3_free_buffers(struct hns3_enet_ring
*ring
)
1848 for (i
= 0; i
< ring
->desc_num
; i
++)
1849 hns3_free_buffer_detach(ring
, i
);
1852 /* free desc along with its attached buffer */
1853 static void hns3_free_desc(struct hns3_enet_ring
*ring
)
1855 int size
= ring
->desc_num
* sizeof(ring
->desc
[0]);
1857 hns3_free_buffers(ring
);
1860 dma_free_coherent(ring_to_dev(ring
), size
,
1861 ring
->desc
, ring
->desc_dma_addr
);
1866 static int hns3_alloc_desc(struct hns3_enet_ring
*ring
)
1868 int size
= ring
->desc_num
* sizeof(ring
->desc
[0]);
1870 ring
->desc
= dma_zalloc_coherent(ring_to_dev(ring
), size
,
1871 &ring
->desc_dma_addr
,
1879 static int hns3_reserve_buffer_map(struct hns3_enet_ring
*ring
,
1880 struct hns3_desc_cb
*cb
)
1884 ret
= hns3_alloc_buffer(ring
, cb
);
1888 ret
= hns3_map_buffer(ring
, cb
);
1895 hns3_free_buffer(ring
, cb
);
1900 static int hns3_alloc_buffer_attach(struct hns3_enet_ring
*ring
, int i
)
1902 int ret
= hns3_reserve_buffer_map(ring
, &ring
->desc_cb
[i
]);
1907 ring
->desc
[i
].addr
= cpu_to_le64(ring
->desc_cb
[i
].dma
);
1912 /* Allocate memory for raw pkg, and map with dma */
1913 static int hns3_alloc_ring_buffers(struct hns3_enet_ring
*ring
)
1917 for (i
= 0; i
< ring
->desc_num
; i
++) {
1918 ret
= hns3_alloc_buffer_attach(ring
, i
);
1920 goto out_buffer_fail
;
1926 for (j
= i
- 1; j
>= 0; j
--)
1927 hns3_free_buffer_detach(ring
, j
);
1931 /* detach a in-used buffer and replace with a reserved one */
1932 static void hns3_replace_buffer(struct hns3_enet_ring
*ring
, int i
,
1933 struct hns3_desc_cb
*res_cb
)
1935 hns3_unmap_buffer(ring
, &ring
->desc_cb
[i
]);
1936 ring
->desc_cb
[i
] = *res_cb
;
1937 ring
->desc
[i
].addr
= cpu_to_le64(ring
->desc_cb
[i
].dma
);
1938 ring
->desc
[i
].rx
.bd_base_info
= 0;
1941 static void hns3_reuse_buffer(struct hns3_enet_ring
*ring
, int i
)
1943 ring
->desc_cb
[i
].reuse_flag
= 0;
1944 ring
->desc
[i
].addr
= cpu_to_le64(ring
->desc_cb
[i
].dma
1945 + ring
->desc_cb
[i
].page_offset
);
1946 ring
->desc
[i
].rx
.bd_base_info
= 0;
1949 static void hns3_nic_reclaim_one_desc(struct hns3_enet_ring
*ring
, int *bytes
,
1952 struct hns3_desc_cb
*desc_cb
= &ring
->desc_cb
[ring
->next_to_clean
];
1954 (*pkts
) += (desc_cb
->type
== DESC_TYPE_SKB
);
1955 (*bytes
) += desc_cb
->length
;
1956 /* desc_cb will be cleaned, after hnae3_free_buffer_detach*/
1957 hns3_free_buffer_detach(ring
, ring
->next_to_clean
);
1959 ring_ptr_move_fw(ring
, next_to_clean
);
1962 static int is_valid_clean_head(struct hns3_enet_ring
*ring
, int h
)
1964 int u
= ring
->next_to_use
;
1965 int c
= ring
->next_to_clean
;
1967 if (unlikely(h
> ring
->desc_num
))
1970 return u
> c
? (h
> c
&& h
<= u
) : (h
> c
|| h
<= u
);
1973 void hns3_clean_tx_ring(struct hns3_enet_ring
*ring
)
1975 struct net_device
*netdev
= ring
->tqp
->handle
->kinfo
.netdev
;
1976 struct netdev_queue
*dev_queue
;
1980 head
= readl_relaxed(ring
->tqp
->io_base
+ HNS3_RING_TX_RING_HEAD_REG
);
1981 rmb(); /* Make sure head is ready before touch any data */
1983 if (is_ring_empty(ring
) || head
== ring
->next_to_clean
)
1984 return; /* no data to poll */
1986 if (unlikely(!is_valid_clean_head(ring
, head
))) {
1987 netdev_err(netdev
, "wrong head (%d, %d-%d)\n", head
,
1988 ring
->next_to_use
, ring
->next_to_clean
);
1990 u64_stats_update_begin(&ring
->syncp
);
1991 ring
->stats
.io_err_cnt
++;
1992 u64_stats_update_end(&ring
->syncp
);
1998 while (head
!= ring
->next_to_clean
) {
1999 hns3_nic_reclaim_one_desc(ring
, &bytes
, &pkts
);
2000 /* Issue prefetch for next Tx descriptor */
2001 prefetch(&ring
->desc_cb
[ring
->next_to_clean
]);
2004 ring
->tqp_vector
->tx_group
.total_bytes
+= bytes
;
2005 ring
->tqp_vector
->tx_group
.total_packets
+= pkts
;
2007 u64_stats_update_begin(&ring
->syncp
);
2008 ring
->stats
.tx_bytes
+= bytes
;
2009 ring
->stats
.tx_pkts
+= pkts
;
2010 u64_stats_update_end(&ring
->syncp
);
2012 dev_queue
= netdev_get_tx_queue(netdev
, ring
->tqp
->tqp_index
);
2013 netdev_tx_completed_queue(dev_queue
, pkts
, bytes
);
2015 if (unlikely(pkts
&& netif_carrier_ok(netdev
) &&
2016 (ring_space(ring
) > HNS3_MAX_BD_PER_PKT
))) {
2017 /* Make sure that anybody stopping the queue after this
2018 * sees the new next_to_clean.
2021 if (netif_tx_queue_stopped(dev_queue
)) {
2022 netif_tx_wake_queue(dev_queue
);
2023 ring
->stats
.restart_queue
++;
2028 static int hns3_desc_unused(struct hns3_enet_ring
*ring
)
2030 int ntc
= ring
->next_to_clean
;
2031 int ntu
= ring
->next_to_use
;
2033 return ((ntc
>= ntu
) ? 0 : ring
->desc_num
) + ntc
- ntu
;
2037 hns3_nic_alloc_rx_buffers(struct hns3_enet_ring
*ring
, int cleand_count
)
2039 struct hns3_desc_cb
*desc_cb
;
2040 struct hns3_desc_cb res_cbs
;
2043 for (i
= 0; i
< cleand_count
; i
++) {
2044 desc_cb
= &ring
->desc_cb
[ring
->next_to_use
];
2045 if (desc_cb
->reuse_flag
) {
2046 u64_stats_update_begin(&ring
->syncp
);
2047 ring
->stats
.reuse_pg_cnt
++;
2048 u64_stats_update_end(&ring
->syncp
);
2050 hns3_reuse_buffer(ring
, ring
->next_to_use
);
2052 ret
= hns3_reserve_buffer_map(ring
, &res_cbs
);
2054 u64_stats_update_begin(&ring
->syncp
);
2055 ring
->stats
.sw_err_cnt
++;
2056 u64_stats_update_end(&ring
->syncp
);
2058 netdev_err(ring
->tqp
->handle
->kinfo
.netdev
,
2059 "hnae reserve buffer map failed.\n");
2062 hns3_replace_buffer(ring
, ring
->next_to_use
, &res_cbs
);
2065 ring_ptr_move_fw(ring
, next_to_use
);
2068 wmb(); /* Make all data has been write before submit */
2069 writel_relaxed(i
, ring
->tqp
->io_base
+ HNS3_RING_RX_RING_HEAD_REG
);
2072 static void hns3_nic_reuse_page(struct sk_buff
*skb
, int i
,
2073 struct hns3_enet_ring
*ring
, int pull_len
,
2074 struct hns3_desc_cb
*desc_cb
)
2076 struct hns3_desc
*desc
;
2082 twobufs
= ((PAGE_SIZE
< 8192) &&
2083 hnae3_buf_size(ring
) == HNS3_BUFFER_SIZE_2048
);
2085 desc
= &ring
->desc
[ring
->next_to_clean
];
2086 size
= le16_to_cpu(desc
->rx
.size
);
2088 truesize
= hnae3_buf_size(ring
);
2091 last_offset
= hnae3_page_size(ring
) - hnae3_buf_size(ring
);
2093 skb_add_rx_frag(skb
, i
, desc_cb
->priv
, desc_cb
->page_offset
+ pull_len
,
2094 size
- pull_len
, truesize
);
2096 /* Avoid re-using remote pages,flag default unreuse */
2097 if (unlikely(page_to_nid(desc_cb
->priv
) != numa_node_id()))
2101 /* If we are only owner of page we can reuse it */
2102 if (likely(page_count(desc_cb
->priv
) == 1)) {
2103 /* Flip page offset to other buffer */
2104 desc_cb
->page_offset
^= truesize
;
2106 desc_cb
->reuse_flag
= 1;
2107 /* bump ref count on page before it is given*/
2108 get_page(desc_cb
->priv
);
2113 /* Move offset up to the next cache line */
2114 desc_cb
->page_offset
+= truesize
;
2116 if (desc_cb
->page_offset
<= last_offset
) {
2117 desc_cb
->reuse_flag
= 1;
2118 /* Bump ref count on page before it is given*/
2119 get_page(desc_cb
->priv
);
2123 static void hns3_rx_checksum(struct hns3_enet_ring
*ring
, struct sk_buff
*skb
,
2124 struct hns3_desc
*desc
)
2126 struct net_device
*netdev
= ring
->tqp
->handle
->kinfo
.netdev
;
2127 int l3_type
, l4_type
;
2132 bd_base_info
= le32_to_cpu(desc
->rx
.bd_base_info
);
2133 l234info
= le32_to_cpu(desc
->rx
.l234_info
);
2135 skb
->ip_summed
= CHECKSUM_NONE
;
2137 skb_checksum_none_assert(skb
);
2139 if (!(netdev
->features
& NETIF_F_RXCSUM
))
2142 /* check if hardware has done checksum */
2143 if (!hnae3_get_bit(bd_base_info
, HNS3_RXD_L3L4P_B
))
2146 if (unlikely(hnae3_get_bit(l234info
, HNS3_RXD_L3E_B
) ||
2147 hnae3_get_bit(l234info
, HNS3_RXD_L4E_B
) ||
2148 hnae3_get_bit(l234info
, HNS3_RXD_OL3E_B
) ||
2149 hnae3_get_bit(l234info
, HNS3_RXD_OL4E_B
))) {
2150 netdev_err(netdev
, "L3/L4 error pkt\n");
2151 u64_stats_update_begin(&ring
->syncp
);
2152 ring
->stats
.l3l4_csum_err
++;
2153 u64_stats_update_end(&ring
->syncp
);
2158 l3_type
= hnae3_get_field(l234info
, HNS3_RXD_L3ID_M
,
2160 l4_type
= hnae3_get_field(l234info
, HNS3_RXD_L4ID_M
,
2163 ol4_type
= hnae3_get_field(l234info
, HNS3_RXD_OL4ID_M
,
2166 case HNS3_OL4_TYPE_MAC_IN_UDP
:
2167 case HNS3_OL4_TYPE_NVGRE
:
2168 skb
->csum_level
= 1;
2170 case HNS3_OL4_TYPE_NO_TUN
:
2171 /* Can checksum ipv4 or ipv6 + UDP/TCP/SCTP packets */
2172 if ((l3_type
== HNS3_L3_TYPE_IPV4
||
2173 l3_type
== HNS3_L3_TYPE_IPV6
) &&
2174 (l4_type
== HNS3_L4_TYPE_UDP
||
2175 l4_type
== HNS3_L4_TYPE_TCP
||
2176 l4_type
== HNS3_L4_TYPE_SCTP
))
2177 skb
->ip_summed
= CHECKSUM_UNNECESSARY
;
2182 static void hns3_rx_skb(struct hns3_enet_ring
*ring
, struct sk_buff
*skb
)
2184 napi_gro_receive(&ring
->tqp_vector
->napi
, skb
);
2187 static u16
hns3_parse_vlan_tag(struct hns3_enet_ring
*ring
,
2188 struct hns3_desc
*desc
, u32 l234info
)
2190 struct pci_dev
*pdev
= ring
->tqp
->handle
->pdev
;
2193 if (pdev
->revision
== 0x20) {
2194 vlan_tag
= le16_to_cpu(desc
->rx
.ot_vlan_tag
);
2195 if (!(vlan_tag
& VLAN_VID_MASK
))
2196 vlan_tag
= le16_to_cpu(desc
->rx
.vlan_tag
);
2201 #define HNS3_STRP_OUTER_VLAN 0x1
2202 #define HNS3_STRP_INNER_VLAN 0x2
2204 switch (hnae3_get_field(l234info
, HNS3_RXD_STRP_TAGP_M
,
2205 HNS3_RXD_STRP_TAGP_S
)) {
2206 case HNS3_STRP_OUTER_VLAN
:
2207 vlan_tag
= le16_to_cpu(desc
->rx
.ot_vlan_tag
);
2209 case HNS3_STRP_INNER_VLAN
:
2210 vlan_tag
= le16_to_cpu(desc
->rx
.vlan_tag
);
2220 static int hns3_handle_rx_bd(struct hns3_enet_ring
*ring
,
2221 struct sk_buff
**out_skb
, int *out_bnum
)
2223 struct net_device
*netdev
= ring
->tqp
->handle
->kinfo
.netdev
;
2224 struct hns3_desc_cb
*desc_cb
;
2225 struct hns3_desc
*desc
;
2226 struct sk_buff
*skb
;
2234 desc
= &ring
->desc
[ring
->next_to_clean
];
2235 desc_cb
= &ring
->desc_cb
[ring
->next_to_clean
];
2239 length
= le16_to_cpu(desc
->rx
.size
);
2240 bd_base_info
= le32_to_cpu(desc
->rx
.bd_base_info
);
2242 /* Check valid BD */
2243 if (unlikely(!hnae3_get_bit(bd_base_info
, HNS3_RXD_VLD_B
)))
2246 va
= (unsigned char *)desc_cb
->buf
+ desc_cb
->page_offset
;
2248 /* Prefetch first cache line of first page
2249 * Idea is to cache few bytes of the header of the packet. Our L1 Cache
2250 * line size is 64B so need to prefetch twice to make it 128B. But in
2251 * actual we can have greater size of caches with 128B Level 1 cache
2252 * lines. In such a case, single fetch would suffice to cache in the
2253 * relevant part of the header.
2256 #if L1_CACHE_BYTES < 128
2257 prefetch(va
+ L1_CACHE_BYTES
);
2260 skb
= *out_skb
= napi_alloc_skb(&ring
->tqp_vector
->napi
,
2262 if (unlikely(!skb
)) {
2263 netdev_err(netdev
, "alloc rx skb fail\n");
2265 u64_stats_update_begin(&ring
->syncp
);
2266 ring
->stats
.sw_err_cnt
++;
2267 u64_stats_update_end(&ring
->syncp
);
2272 prefetchw(skb
->data
);
2275 if (length
<= HNS3_RX_HEAD_SIZE
) {
2276 memcpy(__skb_put(skb
, length
), va
, ALIGN(length
, sizeof(long)));
2278 /* We can reuse buffer as-is, just make sure it is local */
2279 if (likely(page_to_nid(desc_cb
->priv
) == numa_node_id()))
2280 desc_cb
->reuse_flag
= 1;
2281 else /* This page cannot be reused so discard it */
2282 put_page(desc_cb
->priv
);
2284 ring_ptr_move_fw(ring
, next_to_clean
);
2286 u64_stats_update_begin(&ring
->syncp
);
2287 ring
->stats
.seg_pkt_cnt
++;
2288 u64_stats_update_end(&ring
->syncp
);
2290 pull_len
= eth_get_headlen(va
, HNS3_RX_HEAD_SIZE
);
2292 memcpy(__skb_put(skb
, pull_len
), va
,
2293 ALIGN(pull_len
, sizeof(long)));
2295 hns3_nic_reuse_page(skb
, 0, ring
, pull_len
, desc_cb
);
2296 ring_ptr_move_fw(ring
, next_to_clean
);
2298 while (!hnae3_get_bit(bd_base_info
, HNS3_RXD_FE_B
)) {
2299 desc
= &ring
->desc
[ring
->next_to_clean
];
2300 desc_cb
= &ring
->desc_cb
[ring
->next_to_clean
];
2301 bd_base_info
= le32_to_cpu(desc
->rx
.bd_base_info
);
2302 hns3_nic_reuse_page(skb
, bnum
, ring
, 0, desc_cb
);
2303 ring_ptr_move_fw(ring
, next_to_clean
);
2310 l234info
= le32_to_cpu(desc
->rx
.l234_info
);
2312 /* Based on hw strategy, the tag offloaded will be stored at
2313 * ot_vlan_tag in two layer tag case, and stored at vlan_tag
2314 * in one layer tag case.
2316 if (netdev
->features
& NETIF_F_HW_VLAN_CTAG_RX
) {
2319 vlan_tag
= hns3_parse_vlan_tag(ring
, desc
, l234info
);
2320 if (vlan_tag
& VLAN_VID_MASK
)
2321 __vlan_hwaccel_put_tag(skb
,
2326 if (unlikely(!hnae3_get_bit(bd_base_info
, HNS3_RXD_VLD_B
))) {
2327 netdev_err(netdev
, "no valid bd,%016llx,%016llx\n",
2328 ((u64
*)desc
)[0], ((u64
*)desc
)[1]);
2329 u64_stats_update_begin(&ring
->syncp
);
2330 ring
->stats
.non_vld_descs
++;
2331 u64_stats_update_end(&ring
->syncp
);
2333 dev_kfree_skb_any(skb
);
2337 if (unlikely((!desc
->rx
.pkt_len
) ||
2338 hnae3_get_bit(l234info
, HNS3_RXD_TRUNCAT_B
))) {
2339 netdev_err(netdev
, "truncated pkt\n");
2340 u64_stats_update_begin(&ring
->syncp
);
2341 ring
->stats
.err_pkt_len
++;
2342 u64_stats_update_end(&ring
->syncp
);
2344 dev_kfree_skb_any(skb
);
2348 if (unlikely(hnae3_get_bit(l234info
, HNS3_RXD_L2E_B
))) {
2349 netdev_err(netdev
, "L2 error pkt\n");
2350 u64_stats_update_begin(&ring
->syncp
);
2351 ring
->stats
.l2_err
++;
2352 u64_stats_update_end(&ring
->syncp
);
2354 dev_kfree_skb_any(skb
);
2358 u64_stats_update_begin(&ring
->syncp
);
2359 ring
->stats
.rx_pkts
++;
2360 ring
->stats
.rx_bytes
+= skb
->len
;
2361 u64_stats_update_end(&ring
->syncp
);
2363 ring
->tqp_vector
->rx_group
.total_bytes
+= skb
->len
;
2365 hns3_rx_checksum(ring
, skb
, desc
);
2369 int hns3_clean_rx_ring(
2370 struct hns3_enet_ring
*ring
, int budget
,
2371 void (*rx_fn
)(struct hns3_enet_ring
*, struct sk_buff
*))
2373 #define RCB_NOF_ALLOC_RX_BUFF_ONCE 16
2374 struct net_device
*netdev
= ring
->tqp
->handle
->kinfo
.netdev
;
2375 int recv_pkts
, recv_bds
, clean_count
, err
;
2376 int unused_count
= hns3_desc_unused(ring
);
2377 struct sk_buff
*skb
= NULL
;
2380 num
= readl_relaxed(ring
->tqp
->io_base
+ HNS3_RING_RX_RING_FBDNUM_REG
);
2381 rmb(); /* Make sure num taken effect before the other data is touched */
2383 recv_pkts
= 0, recv_bds
= 0, clean_count
= 0;
2384 num
-= unused_count
;
2386 while (recv_pkts
< budget
&& recv_bds
< num
) {
2387 /* Reuse or realloc buffers */
2388 if (clean_count
+ unused_count
>= RCB_NOF_ALLOC_RX_BUFF_ONCE
) {
2389 hns3_nic_alloc_rx_buffers(ring
,
2390 clean_count
+ unused_count
);
2392 unused_count
= hns3_desc_unused(ring
);
2396 err
= hns3_handle_rx_bd(ring
, &skb
, &bnum
);
2397 if (unlikely(!skb
)) /* This fault cannot be repaired */
2401 clean_count
+= bnum
;
2402 if (unlikely(err
)) { /* Do jump the err */
2407 /* Do update ip stack process */
2408 skb
->protocol
= eth_type_trans(skb
, netdev
);
2415 /* Make all data has been write before submit */
2416 if (clean_count
+ unused_count
> 0)
2417 hns3_nic_alloc_rx_buffers(ring
,
2418 clean_count
+ unused_count
);
2423 static bool hns3_get_new_int_gl(struct hns3_enet_ring_group
*ring_group
)
2425 struct hns3_enet_tqp_vector
*tqp_vector
=
2426 ring_group
->ring
->tqp_vector
;
2427 enum hns3_flow_level_range new_flow_level
;
2428 int packets_per_msecs
;
2429 int bytes_per_msecs
;
2433 if (!ring_group
->coal
.int_gl
|| !tqp_vector
->last_jiffies
)
2436 if (ring_group
->total_packets
== 0) {
2437 ring_group
->coal
.int_gl
= HNS3_INT_GL_50K
;
2438 ring_group
->coal
.flow_level
= HNS3_FLOW_LOW
;
2442 /* Simple throttlerate management
2443 * 0-10MB/s lower (50000 ints/s)
2444 * 10-20MB/s middle (20000 ints/s)
2445 * 20-1249MB/s high (18000 ints/s)
2446 * > 40000pps ultra (8000 ints/s)
2448 new_flow_level
= ring_group
->coal
.flow_level
;
2449 new_int_gl
= ring_group
->coal
.int_gl
;
2451 jiffies_to_msecs(jiffies
- tqp_vector
->last_jiffies
);
2453 if (!time_passed_ms
)
2456 do_div(ring_group
->total_packets
, time_passed_ms
);
2457 packets_per_msecs
= ring_group
->total_packets
;
2459 do_div(ring_group
->total_bytes
, time_passed_ms
);
2460 bytes_per_msecs
= ring_group
->total_bytes
;
2462 #define HNS3_RX_LOW_BYTE_RATE 10000
2463 #define HNS3_RX_MID_BYTE_RATE 20000
2465 switch (new_flow_level
) {
2467 if (bytes_per_msecs
> HNS3_RX_LOW_BYTE_RATE
)
2468 new_flow_level
= HNS3_FLOW_MID
;
2471 if (bytes_per_msecs
> HNS3_RX_MID_BYTE_RATE
)
2472 new_flow_level
= HNS3_FLOW_HIGH
;
2473 else if (bytes_per_msecs
<= HNS3_RX_LOW_BYTE_RATE
)
2474 new_flow_level
= HNS3_FLOW_LOW
;
2476 case HNS3_FLOW_HIGH
:
2477 case HNS3_FLOW_ULTRA
:
2479 if (bytes_per_msecs
<= HNS3_RX_MID_BYTE_RATE
)
2480 new_flow_level
= HNS3_FLOW_MID
;
2484 #define HNS3_RX_ULTRA_PACKET_RATE 40
2486 if (packets_per_msecs
> HNS3_RX_ULTRA_PACKET_RATE
&&
2487 &tqp_vector
->rx_group
== ring_group
)
2488 new_flow_level
= HNS3_FLOW_ULTRA
;
2490 switch (new_flow_level
) {
2492 new_int_gl
= HNS3_INT_GL_50K
;
2495 new_int_gl
= HNS3_INT_GL_20K
;
2497 case HNS3_FLOW_HIGH
:
2498 new_int_gl
= HNS3_INT_GL_18K
;
2500 case HNS3_FLOW_ULTRA
:
2501 new_int_gl
= HNS3_INT_GL_8K
;
2507 ring_group
->total_bytes
= 0;
2508 ring_group
->total_packets
= 0;
2509 ring_group
->coal
.flow_level
= new_flow_level
;
2510 if (new_int_gl
!= ring_group
->coal
.int_gl
) {
2511 ring_group
->coal
.int_gl
= new_int_gl
;
2517 static void hns3_update_new_int_gl(struct hns3_enet_tqp_vector
*tqp_vector
)
2519 struct hns3_enet_ring_group
*rx_group
= &tqp_vector
->rx_group
;
2520 struct hns3_enet_ring_group
*tx_group
= &tqp_vector
->tx_group
;
2521 bool rx_update
, tx_update
;
2523 if (tqp_vector
->int_adapt_down
> 0) {
2524 tqp_vector
->int_adapt_down
--;
2528 if (rx_group
->coal
.gl_adapt_enable
) {
2529 rx_update
= hns3_get_new_int_gl(rx_group
);
2531 hns3_set_vector_coalesce_rx_gl(tqp_vector
,
2532 rx_group
->coal
.int_gl
);
2535 if (tx_group
->coal
.gl_adapt_enable
) {
2536 tx_update
= hns3_get_new_int_gl(&tqp_vector
->tx_group
);
2538 hns3_set_vector_coalesce_tx_gl(tqp_vector
,
2539 tx_group
->coal
.int_gl
);
2542 tqp_vector
->last_jiffies
= jiffies
;
2543 tqp_vector
->int_adapt_down
= HNS3_INT_ADAPT_DOWN_START
;
2546 static int hns3_nic_common_poll(struct napi_struct
*napi
, int budget
)
2548 struct hns3_enet_ring
*ring
;
2549 int rx_pkt_total
= 0;
2551 struct hns3_enet_tqp_vector
*tqp_vector
=
2552 container_of(napi
, struct hns3_enet_tqp_vector
, napi
);
2553 bool clean_complete
= true;
2556 /* Since the actual Tx work is minimal, we can give the Tx a larger
2557 * budget and be more aggressive about cleaning up the Tx descriptors.
2559 hns3_for_each_ring(ring
, tqp_vector
->tx_group
)
2560 hns3_clean_tx_ring(ring
);
2562 /* make sure rx ring budget not smaller than 1 */
2563 rx_budget
= max(budget
/ tqp_vector
->num_tqps
, 1);
2565 hns3_for_each_ring(ring
, tqp_vector
->rx_group
) {
2566 int rx_cleaned
= hns3_clean_rx_ring(ring
, rx_budget
,
2569 if (rx_cleaned
>= rx_budget
)
2570 clean_complete
= false;
2572 rx_pkt_total
+= rx_cleaned
;
2575 tqp_vector
->rx_group
.total_packets
+= rx_pkt_total
;
2577 if (!clean_complete
)
2580 napi_complete(napi
);
2581 hns3_update_new_int_gl(tqp_vector
);
2582 hns3_mask_vector_irq(tqp_vector
, 1);
2584 return rx_pkt_total
;
2587 static int hns3_get_vector_ring_chain(struct hns3_enet_tqp_vector
*tqp_vector
,
2588 struct hnae3_ring_chain_node
*head
)
2590 struct pci_dev
*pdev
= tqp_vector
->handle
->pdev
;
2591 struct hnae3_ring_chain_node
*cur_chain
= head
;
2592 struct hnae3_ring_chain_node
*chain
;
2593 struct hns3_enet_ring
*tx_ring
;
2594 struct hns3_enet_ring
*rx_ring
;
2596 tx_ring
= tqp_vector
->tx_group
.ring
;
2598 cur_chain
->tqp_index
= tx_ring
->tqp
->tqp_index
;
2599 hnae3_set_bit(cur_chain
->flag
, HNAE3_RING_TYPE_B
,
2600 HNAE3_RING_TYPE_TX
);
2601 hnae3_set_field(cur_chain
->int_gl_idx
, HNAE3_RING_GL_IDX_M
,
2602 HNAE3_RING_GL_IDX_S
, HNAE3_RING_GL_TX
);
2604 cur_chain
->next
= NULL
;
2606 while (tx_ring
->next
) {
2607 tx_ring
= tx_ring
->next
;
2609 chain
= devm_kzalloc(&pdev
->dev
, sizeof(*chain
),
2614 cur_chain
->next
= chain
;
2615 chain
->tqp_index
= tx_ring
->tqp
->tqp_index
;
2616 hnae3_set_bit(chain
->flag
, HNAE3_RING_TYPE_B
,
2617 HNAE3_RING_TYPE_TX
);
2618 hnae3_set_field(chain
->int_gl_idx
,
2619 HNAE3_RING_GL_IDX_M
,
2620 HNAE3_RING_GL_IDX_S
,
2627 rx_ring
= tqp_vector
->rx_group
.ring
;
2628 if (!tx_ring
&& rx_ring
) {
2629 cur_chain
->next
= NULL
;
2630 cur_chain
->tqp_index
= rx_ring
->tqp
->tqp_index
;
2631 hnae3_set_bit(cur_chain
->flag
, HNAE3_RING_TYPE_B
,
2632 HNAE3_RING_TYPE_RX
);
2633 hnae3_set_field(cur_chain
->int_gl_idx
, HNAE3_RING_GL_IDX_M
,
2634 HNAE3_RING_GL_IDX_S
, HNAE3_RING_GL_RX
);
2636 rx_ring
= rx_ring
->next
;
2640 chain
= devm_kzalloc(&pdev
->dev
, sizeof(*chain
), GFP_KERNEL
);
2644 cur_chain
->next
= chain
;
2645 chain
->tqp_index
= rx_ring
->tqp
->tqp_index
;
2646 hnae3_set_bit(chain
->flag
, HNAE3_RING_TYPE_B
,
2647 HNAE3_RING_TYPE_RX
);
2648 hnae3_set_field(chain
->int_gl_idx
, HNAE3_RING_GL_IDX_M
,
2649 HNAE3_RING_GL_IDX_S
, HNAE3_RING_GL_RX
);
2653 rx_ring
= rx_ring
->next
;
2659 static void hns3_free_vector_ring_chain(struct hns3_enet_tqp_vector
*tqp_vector
,
2660 struct hnae3_ring_chain_node
*head
)
2662 struct pci_dev
*pdev
= tqp_vector
->handle
->pdev
;
2663 struct hnae3_ring_chain_node
*chain_tmp
, *chain
;
2668 chain_tmp
= chain
->next
;
2669 devm_kfree(&pdev
->dev
, chain
);
2674 static void hns3_add_ring_to_group(struct hns3_enet_ring_group
*group
,
2675 struct hns3_enet_ring
*ring
)
2677 ring
->next
= group
->ring
;
2683 static void hns3_nic_set_cpumask(struct hns3_nic_priv
*priv
)
2685 struct pci_dev
*pdev
= priv
->ae_handle
->pdev
;
2686 struct hns3_enet_tqp_vector
*tqp_vector
;
2687 int num_vectors
= priv
->vector_num
;
2691 numa_node
= dev_to_node(&pdev
->dev
);
2693 for (vector_i
= 0; vector_i
< num_vectors
; vector_i
++) {
2694 tqp_vector
= &priv
->tqp_vector
[vector_i
];
2695 cpumask_set_cpu(cpumask_local_spread(vector_i
, numa_node
),
2696 &tqp_vector
->affinity_mask
);
2700 static int hns3_nic_init_vector_data(struct hns3_nic_priv
*priv
)
2702 struct hnae3_ring_chain_node vector_ring_chain
;
2703 struct hnae3_handle
*h
= priv
->ae_handle
;
2704 struct hns3_enet_tqp_vector
*tqp_vector
;
2708 hns3_nic_set_cpumask(priv
);
2710 for (i
= 0; i
< priv
->vector_num
; i
++) {
2711 tqp_vector
= &priv
->tqp_vector
[i
];
2712 hns3_vector_gl_rl_init_hw(tqp_vector
, priv
);
2713 tqp_vector
->num_tqps
= 0;
2716 for (i
= 0; i
< h
->kinfo
.num_tqps
; i
++) {
2717 u16 vector_i
= i
% priv
->vector_num
;
2718 u16 tqp_num
= h
->kinfo
.num_tqps
;
2720 tqp_vector
= &priv
->tqp_vector
[vector_i
];
2722 hns3_add_ring_to_group(&tqp_vector
->tx_group
,
2723 priv
->ring_data
[i
].ring
);
2725 hns3_add_ring_to_group(&tqp_vector
->rx_group
,
2726 priv
->ring_data
[i
+ tqp_num
].ring
);
2728 priv
->ring_data
[i
].ring
->tqp_vector
= tqp_vector
;
2729 priv
->ring_data
[i
+ tqp_num
].ring
->tqp_vector
= tqp_vector
;
2730 tqp_vector
->num_tqps
++;
2733 for (i
= 0; i
< priv
->vector_num
; i
++) {
2734 tqp_vector
= &priv
->tqp_vector
[i
];
2736 tqp_vector
->rx_group
.total_bytes
= 0;
2737 tqp_vector
->rx_group
.total_packets
= 0;
2738 tqp_vector
->tx_group
.total_bytes
= 0;
2739 tqp_vector
->tx_group
.total_packets
= 0;
2740 tqp_vector
->handle
= h
;
2742 ret
= hns3_get_vector_ring_chain(tqp_vector
,
2743 &vector_ring_chain
);
2747 ret
= h
->ae_algo
->ops
->map_ring_to_vector(h
,
2748 tqp_vector
->vector_irq
, &vector_ring_chain
);
2750 hns3_free_vector_ring_chain(tqp_vector
, &vector_ring_chain
);
2755 netif_napi_add(priv
->netdev
, &tqp_vector
->napi
,
2756 hns3_nic_common_poll
, NAPI_POLL_WEIGHT
);
2762 static int hns3_nic_alloc_vector_data(struct hns3_nic_priv
*priv
)
2764 struct hnae3_handle
*h
= priv
->ae_handle
;
2765 struct hns3_enet_tqp_vector
*tqp_vector
;
2766 struct hnae3_vector_info
*vector
;
2767 struct pci_dev
*pdev
= h
->pdev
;
2768 u16 tqp_num
= h
->kinfo
.num_tqps
;
2773 /* RSS size, cpu online and vector_num should be the same */
2774 /* Should consider 2p/4p later */
2775 vector_num
= min_t(u16
, num_online_cpus(), tqp_num
);
2776 vector
= devm_kcalloc(&pdev
->dev
, vector_num
, sizeof(*vector
),
2781 vector_num
= h
->ae_algo
->ops
->get_vector(h
, vector_num
, vector
);
2783 priv
->vector_num
= vector_num
;
2784 priv
->tqp_vector
= (struct hns3_enet_tqp_vector
*)
2785 devm_kcalloc(&pdev
->dev
, vector_num
, sizeof(*priv
->tqp_vector
),
2787 if (!priv
->tqp_vector
) {
2792 for (i
= 0; i
< priv
->vector_num
; i
++) {
2793 tqp_vector
= &priv
->tqp_vector
[i
];
2794 tqp_vector
->idx
= i
;
2795 tqp_vector
->mask_addr
= vector
[i
].io_addr
;
2796 tqp_vector
->vector_irq
= vector
[i
].vector
;
2797 hns3_vector_gl_rl_init(tqp_vector
, priv
);
2801 devm_kfree(&pdev
->dev
, vector
);
2805 static void hns3_clear_ring_group(struct hns3_enet_ring_group
*group
)
2811 static int hns3_nic_uninit_vector_data(struct hns3_nic_priv
*priv
)
2813 struct hnae3_ring_chain_node vector_ring_chain
;
2814 struct hnae3_handle
*h
= priv
->ae_handle
;
2815 struct hns3_enet_tqp_vector
*tqp_vector
;
2818 for (i
= 0; i
< priv
->vector_num
; i
++) {
2819 tqp_vector
= &priv
->tqp_vector
[i
];
2821 ret
= hns3_get_vector_ring_chain(tqp_vector
,
2822 &vector_ring_chain
);
2826 ret
= h
->ae_algo
->ops
->unmap_ring_from_vector(h
,
2827 tqp_vector
->vector_irq
, &vector_ring_chain
);
2831 hns3_free_vector_ring_chain(tqp_vector
, &vector_ring_chain
);
2833 if (priv
->tqp_vector
[i
].irq_init_flag
== HNS3_VECTOR_INITED
) {
2834 (void)irq_set_affinity_hint(
2835 priv
->tqp_vector
[i
].vector_irq
,
2837 free_irq(priv
->tqp_vector
[i
].vector_irq
,
2838 &priv
->tqp_vector
[i
]);
2841 priv
->ring_data
[i
].ring
->irq_init_flag
= HNS3_VECTOR_NOT_INITED
;
2842 hns3_clear_ring_group(&tqp_vector
->rx_group
);
2843 hns3_clear_ring_group(&tqp_vector
->tx_group
);
2844 netif_napi_del(&priv
->tqp_vector
[i
].napi
);
2850 static int hns3_nic_dealloc_vector_data(struct hns3_nic_priv
*priv
)
2852 struct hnae3_handle
*h
= priv
->ae_handle
;
2853 struct pci_dev
*pdev
= h
->pdev
;
2856 for (i
= 0; i
< priv
->vector_num
; i
++) {
2857 struct hns3_enet_tqp_vector
*tqp_vector
;
2859 tqp_vector
= &priv
->tqp_vector
[i
];
2860 ret
= h
->ae_algo
->ops
->put_vector(h
, tqp_vector
->vector_irq
);
2865 devm_kfree(&pdev
->dev
, priv
->tqp_vector
);
2869 static int hns3_ring_get_cfg(struct hnae3_queue
*q
, struct hns3_nic_priv
*priv
,
2872 struct hns3_nic_ring_data
*ring_data
= priv
->ring_data
;
2873 int queue_num
= priv
->ae_handle
->kinfo
.num_tqps
;
2874 struct pci_dev
*pdev
= priv
->ae_handle
->pdev
;
2875 struct hns3_enet_ring
*ring
;
2877 ring
= devm_kzalloc(&pdev
->dev
, sizeof(*ring
), GFP_KERNEL
);
2881 if (ring_type
== HNAE3_RING_TYPE_TX
) {
2882 ring_data
[q
->tqp_index
].ring
= ring
;
2883 ring_data
[q
->tqp_index
].queue_index
= q
->tqp_index
;
2884 ring
->io_base
= (u8 __iomem
*)q
->io_base
+ HNS3_TX_REG_OFFSET
;
2886 ring_data
[q
->tqp_index
+ queue_num
].ring
= ring
;
2887 ring_data
[q
->tqp_index
+ queue_num
].queue_index
= q
->tqp_index
;
2888 ring
->io_base
= q
->io_base
;
2891 hnae3_set_bit(ring
->flag
, HNAE3_RING_TYPE_B
, ring_type
);
2895 ring
->desc_cb
= NULL
;
2896 ring
->dev
= priv
->dev
;
2897 ring
->desc_dma_addr
= 0;
2898 ring
->buf_size
= q
->buf_size
;
2899 ring
->desc_num
= q
->desc_num
;
2900 ring
->next_to_use
= 0;
2901 ring
->next_to_clean
= 0;
2906 static int hns3_queue_to_ring(struct hnae3_queue
*tqp
,
2907 struct hns3_nic_priv
*priv
)
2911 ret
= hns3_ring_get_cfg(tqp
, priv
, HNAE3_RING_TYPE_TX
);
2915 ret
= hns3_ring_get_cfg(tqp
, priv
, HNAE3_RING_TYPE_RX
);
2922 static int hns3_get_ring_config(struct hns3_nic_priv
*priv
)
2924 struct hnae3_handle
*h
= priv
->ae_handle
;
2925 struct pci_dev
*pdev
= h
->pdev
;
2928 priv
->ring_data
= devm_kzalloc(&pdev
->dev
, h
->kinfo
.num_tqps
*
2929 sizeof(*priv
->ring_data
) * 2,
2931 if (!priv
->ring_data
)
2934 for (i
= 0; i
< h
->kinfo
.num_tqps
; i
++) {
2935 ret
= hns3_queue_to_ring(h
->kinfo
.tqp
[i
], priv
);
2942 devm_kfree(&pdev
->dev
, priv
->ring_data
);
2946 static void hns3_put_ring_config(struct hns3_nic_priv
*priv
)
2948 struct hnae3_handle
*h
= priv
->ae_handle
;
2951 for (i
= 0; i
< h
->kinfo
.num_tqps
; i
++) {
2952 devm_kfree(priv
->dev
, priv
->ring_data
[i
].ring
);
2953 devm_kfree(priv
->dev
,
2954 priv
->ring_data
[i
+ h
->kinfo
.num_tqps
].ring
);
2956 devm_kfree(priv
->dev
, priv
->ring_data
);
2959 static int hns3_alloc_ring_memory(struct hns3_enet_ring
*ring
)
2963 if (ring
->desc_num
<= 0 || ring
->buf_size
<= 0)
2966 ring
->desc_cb
= kcalloc(ring
->desc_num
, sizeof(ring
->desc_cb
[0]),
2968 if (!ring
->desc_cb
) {
2973 ret
= hns3_alloc_desc(ring
);
2975 goto out_with_desc_cb
;
2977 if (!HNAE3_IS_TX_RING(ring
)) {
2978 ret
= hns3_alloc_ring_buffers(ring
);
2986 hns3_free_desc(ring
);
2988 kfree(ring
->desc_cb
);
2989 ring
->desc_cb
= NULL
;
2994 static void hns3_fini_ring(struct hns3_enet_ring
*ring
)
2996 hns3_free_desc(ring
);
2997 kfree(ring
->desc_cb
);
2998 ring
->desc_cb
= NULL
;
2999 ring
->next_to_clean
= 0;
3000 ring
->next_to_use
= 0;
3003 static int hns3_buf_size2type(u32 buf_size
)
3009 bd_size_type
= HNS3_BD_SIZE_512_TYPE
;
3012 bd_size_type
= HNS3_BD_SIZE_1024_TYPE
;
3015 bd_size_type
= HNS3_BD_SIZE_2048_TYPE
;
3018 bd_size_type
= HNS3_BD_SIZE_4096_TYPE
;
3021 bd_size_type
= HNS3_BD_SIZE_2048_TYPE
;
3024 return bd_size_type
;
3027 static void hns3_init_ring_hw(struct hns3_enet_ring
*ring
)
3029 dma_addr_t dma
= ring
->desc_dma_addr
;
3030 struct hnae3_queue
*q
= ring
->tqp
;
3032 if (!HNAE3_IS_TX_RING(ring
)) {
3033 hns3_write_dev(q
, HNS3_RING_RX_RING_BASEADDR_L_REG
,
3035 hns3_write_dev(q
, HNS3_RING_RX_RING_BASEADDR_H_REG
,
3036 (u32
)((dma
>> 31) >> 1));
3038 hns3_write_dev(q
, HNS3_RING_RX_RING_BD_LEN_REG
,
3039 hns3_buf_size2type(ring
->buf_size
));
3040 hns3_write_dev(q
, HNS3_RING_RX_RING_BD_NUM_REG
,
3041 ring
->desc_num
/ 8 - 1);
3044 hns3_write_dev(q
, HNS3_RING_TX_RING_BASEADDR_L_REG
,
3046 hns3_write_dev(q
, HNS3_RING_TX_RING_BASEADDR_H_REG
,
3047 (u32
)((dma
>> 31) >> 1));
3049 hns3_write_dev(q
, HNS3_RING_TX_RING_BD_NUM_REG
,
3050 ring
->desc_num
/ 8 - 1);
3054 static void hns3_init_tx_ring_tc(struct hns3_nic_priv
*priv
)
3056 struct hnae3_knic_private_info
*kinfo
= &priv
->ae_handle
->kinfo
;
3059 for (i
= 0; i
< HNAE3_MAX_TC
; i
++) {
3060 struct hnae3_tc_info
*tc_info
= &kinfo
->tc_info
[i
];
3063 if (!tc_info
->enable
)
3066 for (j
= 0; j
< tc_info
->tqp_count
; j
++) {
3067 struct hnae3_queue
*q
;
3069 q
= priv
->ring_data
[tc_info
->tqp_offset
+ j
].ring
->tqp
;
3070 hns3_write_dev(q
, HNS3_RING_TX_RING_TC_REG
,
3076 int hns3_init_all_ring(struct hns3_nic_priv
*priv
)
3078 struct hnae3_handle
*h
= priv
->ae_handle
;
3079 int ring_num
= h
->kinfo
.num_tqps
* 2;
3083 for (i
= 0; i
< ring_num
; i
++) {
3084 ret
= hns3_alloc_ring_memory(priv
->ring_data
[i
].ring
);
3087 "Alloc ring memory fail! ret=%d\n", ret
);
3088 goto out_when_alloc_ring_memory
;
3091 u64_stats_init(&priv
->ring_data
[i
].ring
->syncp
);
3096 out_when_alloc_ring_memory
:
3097 for (j
= i
- 1; j
>= 0; j
--)
3098 hns3_fini_ring(priv
->ring_data
[j
].ring
);
3103 int hns3_uninit_all_ring(struct hns3_nic_priv
*priv
)
3105 struct hnae3_handle
*h
= priv
->ae_handle
;
3108 for (i
= 0; i
< h
->kinfo
.num_tqps
; i
++) {
3109 if (h
->ae_algo
->ops
->reset_queue
)
3110 h
->ae_algo
->ops
->reset_queue(h
, i
);
3112 hns3_fini_ring(priv
->ring_data
[i
].ring
);
3113 hns3_fini_ring(priv
->ring_data
[i
+ h
->kinfo
.num_tqps
].ring
);
3118 /* Set mac addr if it is configured. or leave it to the AE driver */
3119 static void hns3_init_mac_addr(struct net_device
*netdev
, bool init
)
3121 struct hns3_nic_priv
*priv
= netdev_priv(netdev
);
3122 struct hnae3_handle
*h
= priv
->ae_handle
;
3123 u8 mac_addr_temp
[ETH_ALEN
];
3125 if (h
->ae_algo
->ops
->get_mac_addr
&& init
) {
3126 h
->ae_algo
->ops
->get_mac_addr(h
, mac_addr_temp
);
3127 ether_addr_copy(netdev
->dev_addr
, mac_addr_temp
);
3130 /* Check if the MAC address is valid, if not get a random one */
3131 if (!is_valid_ether_addr(netdev
->dev_addr
)) {
3132 eth_hw_addr_random(netdev
);
3133 dev_warn(priv
->dev
, "using random MAC address %pM\n",
3137 if (h
->ae_algo
->ops
->set_mac_addr
)
3138 h
->ae_algo
->ops
->set_mac_addr(h
, netdev
->dev_addr
, true);
3142 static void hns3_uninit_mac_addr(struct net_device
*netdev
)
3144 struct hns3_nic_priv
*priv
= netdev_priv(netdev
);
3145 struct hnae3_handle
*h
= priv
->ae_handle
;
3147 if (h
->ae_algo
->ops
->rm_uc_addr
)
3148 h
->ae_algo
->ops
->rm_uc_addr(h
, netdev
->dev_addr
);
3151 static void hns3_nic_set_priv_ops(struct net_device
*netdev
)
3153 struct hns3_nic_priv
*priv
= netdev_priv(netdev
);
3155 if ((netdev
->features
& NETIF_F_TSO
) ||
3156 (netdev
->features
& NETIF_F_TSO6
)) {
3157 priv
->ops
.fill_desc
= hns3_fill_desc_tso
;
3158 priv
->ops
.maybe_stop_tx
= hns3_nic_maybe_stop_tso
;
3160 priv
->ops
.fill_desc
= hns3_fill_desc
;
3161 priv
->ops
.maybe_stop_tx
= hns3_nic_maybe_stop_tx
;
3165 static int hns3_client_init(struct hnae3_handle
*handle
)
3167 struct pci_dev
*pdev
= handle
->pdev
;
3168 struct hns3_nic_priv
*priv
;
3169 struct net_device
*netdev
;
3172 netdev
= alloc_etherdev_mq(sizeof(struct hns3_nic_priv
),
3173 hns3_get_max_available_channels(handle
));
3177 priv
= netdev_priv(netdev
);
3178 priv
->dev
= &pdev
->dev
;
3179 priv
->netdev
= netdev
;
3180 priv
->ae_handle
= handle
;
3181 priv
->ae_handle
->last_reset_time
= jiffies
;
3182 priv
->tx_timeout_count
= 0;
3184 handle
->kinfo
.netdev
= netdev
;
3185 handle
->priv
= (void *)priv
;
3187 hns3_init_mac_addr(netdev
, true);
3189 hns3_set_default_feature(netdev
);
3191 netdev
->watchdog_timeo
= HNS3_TX_TIMEOUT
;
3192 netdev
->priv_flags
|= IFF_UNICAST_FLT
;
3193 netdev
->netdev_ops
= &hns3_nic_netdev_ops
;
3194 SET_NETDEV_DEV(netdev
, &pdev
->dev
);
3195 hns3_ethtool_set_ops(netdev
);
3196 hns3_nic_set_priv_ops(netdev
);
3198 /* Carrier off reporting is important to ethtool even BEFORE open */
3199 netif_carrier_off(netdev
);
3201 if (handle
->flags
& HNAE3_SUPPORT_VF
)
3202 handle
->reset_level
= HNAE3_VF_RESET
;
3204 handle
->reset_level
= HNAE3_FUNC_RESET
;
3206 ret
= hns3_get_ring_config(priv
);
3209 goto out_get_ring_cfg
;
3212 ret
= hns3_nic_alloc_vector_data(priv
);
3215 goto out_alloc_vector_data
;
3218 ret
= hns3_nic_init_vector_data(priv
);
3221 goto out_init_vector_data
;
3224 ret
= hns3_init_all_ring(priv
);
3227 goto out_init_ring_data
;
3230 ret
= register_netdev(netdev
);
3232 dev_err(priv
->dev
, "probe register netdev fail!\n");
3233 goto out_reg_netdev_fail
;
3236 hns3_dcbnl_setup(handle
);
3238 /* MTU range: (ETH_MIN_MTU(kernel default) - 9706) */
3239 netdev
->max_mtu
= HNS3_MAX_MTU
- (ETH_HLEN
+ ETH_FCS_LEN
+ VLAN_HLEN
);
3243 out_reg_netdev_fail
:
3245 (void)hns3_nic_uninit_vector_data(priv
);
3246 out_init_vector_data
:
3247 hns3_nic_dealloc_vector_data(priv
);
3248 out_alloc_vector_data
:
3249 priv
->ring_data
= NULL
;
3251 priv
->ae_handle
= NULL
;
3252 free_netdev(netdev
);
3256 static void hns3_client_uninit(struct hnae3_handle
*handle
, bool reset
)
3258 struct net_device
*netdev
= handle
->kinfo
.netdev
;
3259 struct hns3_nic_priv
*priv
= netdev_priv(netdev
);
3262 if (netdev
->reg_state
!= NETREG_UNINITIALIZED
)
3263 unregister_netdev(netdev
);
3265 hns3_force_clear_all_rx_ring(handle
);
3267 ret
= hns3_nic_uninit_vector_data(priv
);
3269 netdev_err(netdev
, "uninit vector error\n");
3271 ret
= hns3_nic_dealloc_vector_data(priv
);
3273 netdev_err(netdev
, "dealloc vector error\n");
3275 ret
= hns3_uninit_all_ring(priv
);
3277 netdev_err(netdev
, "uninit ring error\n");
3279 hns3_put_ring_config(priv
);
3281 priv
->ring_data
= NULL
;
3283 hns3_uninit_mac_addr(netdev
);
3285 free_netdev(netdev
);
3288 static void hns3_link_status_change(struct hnae3_handle
*handle
, bool linkup
)
3290 struct net_device
*netdev
= handle
->kinfo
.netdev
;
3296 netif_carrier_on(netdev
);
3297 netif_tx_wake_all_queues(netdev
);
3298 netdev_info(netdev
, "link up\n");
3300 netif_carrier_off(netdev
);
3301 netif_tx_stop_all_queues(netdev
);
3302 netdev_info(netdev
, "link down\n");
3306 static int hns3_client_setup_tc(struct hnae3_handle
*handle
, u8 tc
)
3308 struct hnae3_knic_private_info
*kinfo
= &handle
->kinfo
;
3309 struct net_device
*ndev
= kinfo
->netdev
;
3313 if (tc
> HNAE3_MAX_TC
)
3319 if_running
= netif_running(ndev
);
3322 (void)hns3_nic_net_stop(ndev
);
3326 ret
= (kinfo
->dcb_ops
&& kinfo
->dcb_ops
->map_update
) ?
3327 kinfo
->dcb_ops
->map_update(handle
) : -EOPNOTSUPP
;
3331 ret
= hns3_nic_set_real_num_queue(ndev
);
3335 (void)hns3_nic_net_open(ndev
);
3340 static void hns3_recover_hw_addr(struct net_device
*ndev
)
3342 struct netdev_hw_addr_list
*list
;
3343 struct netdev_hw_addr
*ha
, *tmp
;
3345 /* go through and sync uc_addr entries to the device */
3347 list_for_each_entry_safe(ha
, tmp
, &list
->list
, list
)
3348 hns3_nic_uc_sync(ndev
, ha
->addr
);
3350 /* go through and sync mc_addr entries to the device */
3352 list_for_each_entry_safe(ha
, tmp
, &list
->list
, list
)
3353 hns3_nic_mc_sync(ndev
, ha
->addr
);
3356 static void hns3_clear_tx_ring(struct hns3_enet_ring
*ring
)
3358 while (ring
->next_to_clean
!= ring
->next_to_use
) {
3359 ring
->desc
[ring
->next_to_clean
].tx
.bdtp_fe_sc_vld_ra_ri
= 0;
3360 hns3_free_buffer_detach(ring
, ring
->next_to_clean
);
3361 ring_ptr_move_fw(ring
, next_to_clean
);
3365 static int hns3_clear_rx_ring(struct hns3_enet_ring
*ring
)
3367 struct hns3_desc_cb res_cbs
;
3370 while (ring
->next_to_use
!= ring
->next_to_clean
) {
3371 /* When a buffer is not reused, it's memory has been
3372 * freed in hns3_handle_rx_bd or will be freed by
3373 * stack, so we need to replace the buffer here.
3375 if (!ring
->desc_cb
[ring
->next_to_use
].reuse_flag
) {
3376 ret
= hns3_reserve_buffer_map(ring
, &res_cbs
);
3378 u64_stats_update_begin(&ring
->syncp
);
3379 ring
->stats
.sw_err_cnt
++;
3380 u64_stats_update_end(&ring
->syncp
);
3381 /* if alloc new buffer fail, exit directly
3382 * and reclear in up flow.
3384 netdev_warn(ring
->tqp
->handle
->kinfo
.netdev
,
3385 "reserve buffer map failed, ret = %d\n",
3389 hns3_replace_buffer(ring
, ring
->next_to_use
,
3392 ring_ptr_move_fw(ring
, next_to_use
);
3398 static void hns3_force_clear_rx_ring(struct hns3_enet_ring
*ring
)
3400 while (ring
->next_to_use
!= ring
->next_to_clean
) {
3401 /* When a buffer is not reused, it's memory has been
3402 * freed in hns3_handle_rx_bd or will be freed by
3403 * stack, so only need to unmap the buffer here.
3405 if (!ring
->desc_cb
[ring
->next_to_use
].reuse_flag
) {
3406 hns3_unmap_buffer(ring
,
3407 &ring
->desc_cb
[ring
->next_to_use
]);
3408 ring
->desc_cb
[ring
->next_to_use
].dma
= 0;
3411 ring_ptr_move_fw(ring
, next_to_use
);
3415 static void hns3_force_clear_all_rx_ring(struct hnae3_handle
*h
)
3417 struct net_device
*ndev
= h
->kinfo
.netdev
;
3418 struct hns3_nic_priv
*priv
= netdev_priv(ndev
);
3419 struct hns3_enet_ring
*ring
;
3422 for (i
= 0; i
< h
->kinfo
.num_tqps
; i
++) {
3423 ring
= priv
->ring_data
[i
+ h
->kinfo
.num_tqps
].ring
;
3424 hns3_force_clear_rx_ring(ring
);
3428 static void hns3_clear_all_ring(struct hnae3_handle
*h
)
3430 struct net_device
*ndev
= h
->kinfo
.netdev
;
3431 struct hns3_nic_priv
*priv
= netdev_priv(ndev
);
3434 for (i
= 0; i
< h
->kinfo
.num_tqps
; i
++) {
3435 struct netdev_queue
*dev_queue
;
3436 struct hns3_enet_ring
*ring
;
3438 ring
= priv
->ring_data
[i
].ring
;
3439 hns3_clear_tx_ring(ring
);
3440 dev_queue
= netdev_get_tx_queue(ndev
,
3441 priv
->ring_data
[i
].queue_index
);
3442 netdev_tx_reset_queue(dev_queue
);
3444 ring
= priv
->ring_data
[i
+ h
->kinfo
.num_tqps
].ring
;
3445 /* Continue to clear other rings even if clearing some
3448 hns3_clear_rx_ring(ring
);
3452 int hns3_nic_reset_all_ring(struct hnae3_handle
*h
)
3454 struct net_device
*ndev
= h
->kinfo
.netdev
;
3455 struct hns3_nic_priv
*priv
= netdev_priv(ndev
);
3456 struct hns3_enet_ring
*rx_ring
;
3460 for (i
= 0; i
< h
->kinfo
.num_tqps
; i
++) {
3461 h
->ae_algo
->ops
->reset_queue(h
, i
);
3462 hns3_init_ring_hw(priv
->ring_data
[i
].ring
);
3464 /* We need to clear tx ring here because self test will
3465 * use the ring and will not run down before up
3467 hns3_clear_tx_ring(priv
->ring_data
[i
].ring
);
3468 priv
->ring_data
[i
].ring
->next_to_clean
= 0;
3469 priv
->ring_data
[i
].ring
->next_to_use
= 0;
3471 rx_ring
= priv
->ring_data
[i
+ h
->kinfo
.num_tqps
].ring
;
3472 hns3_init_ring_hw(rx_ring
);
3473 ret
= hns3_clear_rx_ring(rx_ring
);
3477 /* We can not know the hardware head and tail when this
3478 * function is called in reset flow, so we reuse all desc.
3480 for (j
= 0; j
< rx_ring
->desc_num
; j
++)
3481 hns3_reuse_buffer(rx_ring
, j
);
3483 rx_ring
->next_to_clean
= 0;
3484 rx_ring
->next_to_use
= 0;
3487 hns3_init_tx_ring_tc(priv
);
3492 static int hns3_reset_notify_down_enet(struct hnae3_handle
*handle
)
3494 struct hnae3_knic_private_info
*kinfo
= &handle
->kinfo
;
3495 struct net_device
*ndev
= kinfo
->netdev
;
3497 if (!netif_running(ndev
))
3500 return hns3_nic_net_stop(ndev
);
3503 static int hns3_reset_notify_up_enet(struct hnae3_handle
*handle
)
3505 struct hnae3_knic_private_info
*kinfo
= &handle
->kinfo
;
3508 if (netif_running(kinfo
->netdev
)) {
3509 ret
= hns3_nic_net_up(kinfo
->netdev
);
3511 netdev_err(kinfo
->netdev
,
3512 "hns net up fail, ret=%d!\n", ret
);
3515 handle
->last_reset_time
= jiffies
;
3521 static int hns3_reset_notify_init_enet(struct hnae3_handle
*handle
)
3523 struct net_device
*netdev
= handle
->kinfo
.netdev
;
3524 struct hns3_nic_priv
*priv
= netdev_priv(netdev
);
3527 hns3_init_mac_addr(netdev
, false);
3528 hns3_nic_set_rx_mode(netdev
);
3529 hns3_recover_hw_addr(netdev
);
3531 /* Hardware table is only clear when pf resets */
3532 if (!(handle
->flags
& HNAE3_SUPPORT_VF
))
3533 hns3_restore_vlan(netdev
);
3535 /* Carrier off reporting is important to ethtool even BEFORE open */
3536 netif_carrier_off(netdev
);
3538 ret
= hns3_nic_init_vector_data(priv
);
3542 ret
= hns3_init_all_ring(priv
);
3544 hns3_nic_uninit_vector_data(priv
);
3545 priv
->ring_data
= NULL
;
3551 static int hns3_reset_notify_uninit_enet(struct hnae3_handle
*handle
)
3553 struct net_device
*netdev
= handle
->kinfo
.netdev
;
3554 struct hns3_nic_priv
*priv
= netdev_priv(netdev
);
3557 hns3_force_clear_all_rx_ring(handle
);
3559 ret
= hns3_nic_uninit_vector_data(priv
);
3561 netdev_err(netdev
, "uninit vector error\n");
3565 ret
= hns3_uninit_all_ring(priv
);
3567 netdev_err(netdev
, "uninit ring error\n");
3569 hns3_uninit_mac_addr(netdev
);
3574 static int hns3_reset_notify(struct hnae3_handle
*handle
,
3575 enum hnae3_reset_notify_type type
)
3580 case HNAE3_UP_CLIENT
:
3581 ret
= hns3_reset_notify_up_enet(handle
);
3583 case HNAE3_DOWN_CLIENT
:
3584 ret
= hns3_reset_notify_down_enet(handle
);
3586 case HNAE3_INIT_CLIENT
:
3587 ret
= hns3_reset_notify_init_enet(handle
);
3589 case HNAE3_UNINIT_CLIENT
:
3590 ret
= hns3_reset_notify_uninit_enet(handle
);
3599 static void hns3_restore_coal(struct hns3_nic_priv
*priv
,
3600 struct hns3_enet_coalesce
*tx
,
3601 struct hns3_enet_coalesce
*rx
)
3603 u16 vector_num
= priv
->vector_num
;
3606 for (i
= 0; i
< vector_num
; i
++) {
3607 memcpy(&priv
->tqp_vector
[i
].tx_group
.coal
, tx
,
3608 sizeof(struct hns3_enet_coalesce
));
3609 memcpy(&priv
->tqp_vector
[i
].rx_group
.coal
, rx
,
3610 sizeof(struct hns3_enet_coalesce
));
3614 static int hns3_modify_tqp_num(struct net_device
*netdev
, u16 new_tqp_num
,
3615 struct hns3_enet_coalesce
*tx
,
3616 struct hns3_enet_coalesce
*rx
)
3618 struct hns3_nic_priv
*priv
= netdev_priv(netdev
);
3619 struct hnae3_handle
*h
= hns3_get_handle(netdev
);
3622 ret
= h
->ae_algo
->ops
->set_channels(h
, new_tqp_num
);
3626 ret
= hns3_get_ring_config(priv
);
3630 ret
= hns3_nic_alloc_vector_data(priv
);
3632 goto err_alloc_vector
;
3634 hns3_restore_coal(priv
, tx
, rx
);
3636 ret
= hns3_nic_init_vector_data(priv
);
3638 goto err_uninit_vector
;
3640 ret
= hns3_init_all_ring(priv
);
3647 hns3_put_ring_config(priv
);
3649 hns3_nic_uninit_vector_data(priv
);
3651 hns3_nic_dealloc_vector_data(priv
);
3655 static int hns3_adjust_tqps_num(u8 num_tc
, u32 new_tqp_num
)
3657 return (new_tqp_num
/ num_tc
) * num_tc
;
3660 int hns3_set_channels(struct net_device
*netdev
,
3661 struct ethtool_channels
*ch
)
3663 struct hns3_nic_priv
*priv
= netdev_priv(netdev
);
3664 struct hnae3_handle
*h
= hns3_get_handle(netdev
);
3665 struct hnae3_knic_private_info
*kinfo
= &h
->kinfo
;
3666 struct hns3_enet_coalesce tx_coal
, rx_coal
;
3667 bool if_running
= netif_running(netdev
);
3668 u32 new_tqp_num
= ch
->combined_count
;
3672 if (ch
->rx_count
|| ch
->tx_count
)
3675 if (new_tqp_num
> hns3_get_max_available_channels(h
) ||
3676 new_tqp_num
< kinfo
->num_tc
) {
3677 dev_err(&netdev
->dev
,
3678 "Change tqps fail, the tqp range is from %d to %d",
3680 hns3_get_max_available_channels(h
));
3684 new_tqp_num
= hns3_adjust_tqps_num(kinfo
->num_tc
, new_tqp_num
);
3685 if (kinfo
->num_tqps
== new_tqp_num
)
3689 hns3_nic_net_stop(netdev
);
3691 ret
= hns3_nic_uninit_vector_data(priv
);
3693 dev_err(&netdev
->dev
,
3694 "Unbind vector with tqp fail, nothing is changed");
3698 /* Changing the tqp num may also change the vector num,
3699 * ethtool only support setting and querying one coal
3700 * configuation for now, so save the vector 0' coal
3701 * configuation here in order to restore it.
3703 memcpy(&tx_coal
, &priv
->tqp_vector
[0].tx_group
.coal
,
3704 sizeof(struct hns3_enet_coalesce
));
3705 memcpy(&rx_coal
, &priv
->tqp_vector
[0].rx_group
.coal
,
3706 sizeof(struct hns3_enet_coalesce
));
3708 hns3_nic_dealloc_vector_data(priv
);
3710 hns3_uninit_all_ring(priv
);
3711 hns3_put_ring_config(priv
);
3713 org_tqp_num
= h
->kinfo
.num_tqps
;
3714 ret
= hns3_modify_tqp_num(netdev
, new_tqp_num
, &tx_coal
, &rx_coal
);
3716 ret
= hns3_modify_tqp_num(netdev
, org_tqp_num
,
3717 &tx_coal
, &rx_coal
);
3719 /* If revert to old tqp failed, fatal error occurred */
3720 dev_err(&netdev
->dev
,
3721 "Revert to old tqp num fail, ret=%d", ret
);
3724 dev_info(&netdev
->dev
,
3725 "Change tqp num fail, Revert to old tqp num");
3730 hns3_nic_net_open(netdev
);
3735 static const struct hnae3_client_ops client_ops
= {
3736 .init_instance
= hns3_client_init
,
3737 .uninit_instance
= hns3_client_uninit
,
3738 .link_status_change
= hns3_link_status_change
,
3739 .setup_tc
= hns3_client_setup_tc
,
3740 .reset_notify
= hns3_reset_notify
,
3743 /* hns3_init_module - Driver registration routine
3744 * hns3_init_module is the first routine called when the driver is
3745 * loaded. All it does is register with the PCI subsystem.
3747 static int __init
hns3_init_module(void)
3751 pr_info("%s: %s - version\n", hns3_driver_name
, hns3_driver_string
);
3752 pr_info("%s: %s\n", hns3_driver_name
, hns3_copyright
);
3754 client
.type
= HNAE3_CLIENT_KNIC
;
3755 snprintf(client
.name
, HNAE3_CLIENT_NAME_LENGTH
- 1, "%s",
3758 client
.ops
= &client_ops
;
3760 INIT_LIST_HEAD(&client
.node
);
3762 ret
= hnae3_register_client(&client
);
3766 ret
= pci_register_driver(&hns3_driver
);
3768 hnae3_unregister_client(&client
);
3772 module_init(hns3_init_module
);
3774 /* hns3_exit_module - Driver exit cleanup routine
3775 * hns3_exit_module is called just before the driver is removed
3778 static void __exit
hns3_exit_module(void)
3780 pci_unregister_driver(&hns3_driver
);
3781 hnae3_unregister_client(&client
);
3783 module_exit(hns3_exit_module
);
3785 MODULE_DESCRIPTION("HNS3: Hisilicon Ethernet Driver");
3786 MODULE_AUTHOR("Huawei Tech. Co., Ltd.");
3787 MODULE_LICENSE("GPL");
3788 MODULE_ALIAS("pci:hns-nic");
3789 MODULE_VERSION(HNS3_MOD_VERSION
);