1 // SPDX-License-Identifier: GPL-2.0+
2 // Copyright (c) 2016-2017 Hisilicon Limited.
4 #include <linux/etherdevice.h>
5 #include "hclgevf_cmd.h"
6 #include "hclgevf_main.h"
10 #define HCLGEVF_NAME "hclgevf"
12 static struct hnae3_ae_algo ae_algovf
;
14 static const struct pci_device_id ae_algovf_pci_tbl
[] = {
15 {PCI_VDEVICE(HUAWEI
, HNAE3_DEV_ID_100G_VF
), 0},
16 {PCI_VDEVICE(HUAWEI
, HNAE3_DEV_ID_100G_RDMA_DCB_PFC_VF
), 0},
17 /* required last entry */
21 static inline struct hclgevf_dev
*hclgevf_ae_get_hdev(
22 struct hnae3_handle
*handle
)
24 return container_of(handle
, struct hclgevf_dev
, nic
);
27 static int hclgevf_tqps_update_stats(struct hnae3_handle
*handle
)
29 struct hclgevf_dev
*hdev
= hclgevf_ae_get_hdev(handle
);
30 struct hnae3_queue
*queue
;
31 struct hclgevf_desc desc
;
32 struct hclgevf_tqp
*tqp
;
36 for (i
= 0; i
< hdev
->num_tqps
; i
++) {
37 queue
= handle
->kinfo
.tqp
[i
];
38 tqp
= container_of(queue
, struct hclgevf_tqp
, q
);
39 hclgevf_cmd_setup_basic_desc(&desc
,
40 HCLGEVF_OPC_QUERY_RX_STATUS
,
43 desc
.data
[0] = cpu_to_le32(tqp
->index
& 0x1ff);
44 status
= hclgevf_cmd_send(&hdev
->hw
, &desc
, 1);
46 dev_err(&hdev
->pdev
->dev
,
47 "Query tqp stat fail, status = %d,queue = %d\n",
51 tqp
->tqp_stats
.rcb_rx_ring_pktnum_rcd
+=
52 le32_to_cpu(desc
.data
[1]);
54 hclgevf_cmd_setup_basic_desc(&desc
, HCLGEVF_OPC_QUERY_TX_STATUS
,
57 desc
.data
[0] = cpu_to_le32(tqp
->index
& 0x1ff);
58 status
= hclgevf_cmd_send(&hdev
->hw
, &desc
, 1);
60 dev_err(&hdev
->pdev
->dev
,
61 "Query tqp stat fail, status = %d,queue = %d\n",
65 tqp
->tqp_stats
.rcb_tx_ring_pktnum_rcd
+=
66 le32_to_cpu(desc
.data
[1]);
72 static u64
*hclgevf_tqps_get_stats(struct hnae3_handle
*handle
, u64
*data
)
74 struct hnae3_knic_private_info
*kinfo
= &handle
->kinfo
;
75 struct hclgevf_dev
*hdev
= hclgevf_ae_get_hdev(handle
);
76 struct hclgevf_tqp
*tqp
;
80 for (i
= 0; i
< hdev
->num_tqps
; i
++) {
81 tqp
= container_of(handle
->kinfo
.tqp
[i
], struct hclgevf_tqp
, q
);
82 *buff
++ = tqp
->tqp_stats
.rcb_tx_ring_pktnum_rcd
;
84 for (i
= 0; i
< kinfo
->num_tqps
; i
++) {
85 tqp
= container_of(handle
->kinfo
.tqp
[i
], struct hclgevf_tqp
, q
);
86 *buff
++ = tqp
->tqp_stats
.rcb_rx_ring_pktnum_rcd
;
92 static int hclgevf_tqps_get_sset_count(struct hnae3_handle
*handle
, int strset
)
94 struct hclgevf_dev
*hdev
= hclgevf_ae_get_hdev(handle
);
96 return hdev
->num_tqps
* 2;
99 static u8
*hclgevf_tqps_get_strings(struct hnae3_handle
*handle
, u8
*data
)
101 struct hclgevf_dev
*hdev
= hclgevf_ae_get_hdev(handle
);
105 for (i
= 0; i
< hdev
->num_tqps
; i
++) {
106 struct hclgevf_tqp
*tqp
= container_of(handle
->kinfo
.tqp
[i
],
107 struct hclgevf_tqp
, q
);
108 snprintf(buff
, ETH_GSTRING_LEN
, "txq#%d_pktnum_rcd",
110 buff
+= ETH_GSTRING_LEN
;
113 for (i
= 0; i
< hdev
->num_tqps
; i
++) {
114 struct hclgevf_tqp
*tqp
= container_of(handle
->kinfo
.tqp
[i
],
115 struct hclgevf_tqp
, q
);
116 snprintf(buff
, ETH_GSTRING_LEN
, "rxq#%d_pktnum_rcd",
118 buff
+= ETH_GSTRING_LEN
;
124 static void hclgevf_update_stats(struct hnae3_handle
*handle
,
125 struct net_device_stats
*net_stats
)
127 struct hclgevf_dev
*hdev
= hclgevf_ae_get_hdev(handle
);
130 status
= hclgevf_tqps_update_stats(handle
);
132 dev_err(&hdev
->pdev
->dev
,
133 "VF update of TQPS stats fail, status = %d.\n",
137 static int hclgevf_get_sset_count(struct hnae3_handle
*handle
, int strset
)
139 if (strset
== ETH_SS_TEST
)
141 else if (strset
== ETH_SS_STATS
)
142 return hclgevf_tqps_get_sset_count(handle
, strset
);
147 static void hclgevf_get_strings(struct hnae3_handle
*handle
, u32 strset
,
150 u8
*p
= (char *)data
;
152 if (strset
== ETH_SS_STATS
)
153 p
= hclgevf_tqps_get_strings(handle
, p
);
156 static void hclgevf_get_stats(struct hnae3_handle
*handle
, u64
*data
)
158 hclgevf_tqps_get_stats(handle
, data
);
161 static int hclgevf_get_tc_info(struct hclgevf_dev
*hdev
)
166 status
= hclgevf_send_mbx_msg(hdev
, HCLGE_MBX_GET_TCINFO
, 0, NULL
, 0,
167 true, &resp_msg
, sizeof(u8
));
169 dev_err(&hdev
->pdev
->dev
,
170 "VF request to get TC info from PF failed %d",
175 hdev
->hw_tc_map
= resp_msg
;
180 static int hclge_get_queue_info(struct hclgevf_dev
*hdev
)
182 #define HCLGEVF_TQPS_RSS_INFO_LEN 8
183 u8 resp_msg
[HCLGEVF_TQPS_RSS_INFO_LEN
];
186 status
= hclgevf_send_mbx_msg(hdev
, HCLGE_MBX_GET_QINFO
, 0, NULL
, 0,
188 HCLGEVF_TQPS_RSS_INFO_LEN
);
190 dev_err(&hdev
->pdev
->dev
,
191 "VF request to get tqp info from PF failed %d",
196 memcpy(&hdev
->num_tqps
, &resp_msg
[0], sizeof(u16
));
197 memcpy(&hdev
->rss_size_max
, &resp_msg
[2], sizeof(u16
));
198 memcpy(&hdev
->num_desc
, &resp_msg
[4], sizeof(u16
));
199 memcpy(&hdev
->rx_buf_len
, &resp_msg
[6], sizeof(u16
));
204 static int hclgevf_alloc_tqps(struct hclgevf_dev
*hdev
)
206 struct hclgevf_tqp
*tqp
;
209 hdev
->htqp
= devm_kcalloc(&hdev
->pdev
->dev
, hdev
->num_tqps
,
210 sizeof(struct hclgevf_tqp
), GFP_KERNEL
);
216 for (i
= 0; i
< hdev
->num_tqps
; i
++) {
217 tqp
->dev
= &hdev
->pdev
->dev
;
220 tqp
->q
.ae_algo
= &ae_algovf
;
221 tqp
->q
.buf_size
= hdev
->rx_buf_len
;
222 tqp
->q
.desc_num
= hdev
->num_desc
;
223 tqp
->q
.io_base
= hdev
->hw
.io_base
+ HCLGEVF_TQP_REG_OFFSET
+
224 i
* HCLGEVF_TQP_REG_SIZE
;
232 static int hclgevf_knic_setup(struct hclgevf_dev
*hdev
)
234 struct hnae3_handle
*nic
= &hdev
->nic
;
235 struct hnae3_knic_private_info
*kinfo
;
236 u16 new_tqps
= hdev
->num_tqps
;
241 kinfo
->num_desc
= hdev
->num_desc
;
242 kinfo
->rx_buf_len
= hdev
->rx_buf_len
;
243 for (i
= 0; i
< HCLGEVF_MAX_TC_NUM
; i
++)
244 if (hdev
->hw_tc_map
& BIT(i
))
248 = min_t(u16
, hdev
->rss_size_max
, new_tqps
/ kinfo
->num_tc
);
249 new_tqps
= kinfo
->rss_size
* kinfo
->num_tc
;
250 kinfo
->num_tqps
= min(new_tqps
, hdev
->num_tqps
);
252 kinfo
->tqp
= devm_kcalloc(&hdev
->pdev
->dev
, kinfo
->num_tqps
,
253 sizeof(struct hnae3_queue
*), GFP_KERNEL
);
257 for (i
= 0; i
< kinfo
->num_tqps
; i
++) {
258 hdev
->htqp
[i
].q
.handle
= &hdev
->nic
;
259 hdev
->htqp
[i
].q
.tqp_index
= i
;
260 kinfo
->tqp
[i
] = &hdev
->htqp
[i
].q
;
266 static void hclgevf_request_link_info(struct hclgevf_dev
*hdev
)
271 status
= hclgevf_send_mbx_msg(hdev
, HCLGE_MBX_GET_LINK_STATUS
, 0, NULL
,
272 0, false, &resp_msg
, sizeof(u8
));
274 dev_err(&hdev
->pdev
->dev
,
275 "VF failed to fetch link status(%d) from PF", status
);
278 void hclgevf_update_link_status(struct hclgevf_dev
*hdev
, int link_state
)
280 struct hnae3_handle
*handle
= &hdev
->nic
;
281 struct hnae3_client
*client
;
283 client
= handle
->client
;
285 if (link_state
!= hdev
->hw
.mac
.link
) {
286 client
->ops
->link_status_change(handle
, !!link_state
);
287 hdev
->hw
.mac
.link
= link_state
;
291 static int hclgevf_set_handle_info(struct hclgevf_dev
*hdev
)
293 struct hnae3_handle
*nic
= &hdev
->nic
;
296 nic
->ae_algo
= &ae_algovf
;
297 nic
->pdev
= hdev
->pdev
;
298 nic
->numa_node_mask
= hdev
->numa_node_mask
;
299 nic
->flags
|= HNAE3_SUPPORT_VF
;
301 if (hdev
->ae_dev
->dev_type
!= HNAE3_DEV_KNIC
) {
302 dev_err(&hdev
->pdev
->dev
, "unsupported device type %d\n",
303 hdev
->ae_dev
->dev_type
);
307 ret
= hclgevf_knic_setup(hdev
);
309 dev_err(&hdev
->pdev
->dev
, "VF knic setup failed %d\n",
314 static void hclgevf_free_vector(struct hclgevf_dev
*hdev
, int vector_id
)
316 hdev
->vector_status
[vector_id
] = HCLGEVF_INVALID_VPORT
;
317 hdev
->num_msi_left
+= 1;
318 hdev
->num_msi_used
-= 1;
321 static int hclgevf_get_vector(struct hnae3_handle
*handle
, u16 vector_num
,
322 struct hnae3_vector_info
*vector_info
)
324 struct hclgevf_dev
*hdev
= hclgevf_ae_get_hdev(handle
);
325 struct hnae3_vector_info
*vector
= vector_info
;
329 vector_num
= min(hdev
->num_msi_left
, vector_num
);
331 for (j
= 0; j
< vector_num
; j
++) {
332 for (i
= HCLGEVF_MISC_VECTOR_NUM
+ 1; i
< hdev
->num_msi
; i
++) {
333 if (hdev
->vector_status
[i
] == HCLGEVF_INVALID_VPORT
) {
334 vector
->vector
= pci_irq_vector(hdev
->pdev
, i
);
335 vector
->io_addr
= hdev
->hw
.io_base
+
336 HCLGEVF_VECTOR_REG_BASE
+
337 (i
- 1) * HCLGEVF_VECTOR_REG_OFFSET
;
338 hdev
->vector_status
[i
] = 0;
339 hdev
->vector_irq
[i
] = vector
->vector
;
348 hdev
->num_msi_left
-= alloc
;
349 hdev
->num_msi_used
+= alloc
;
354 static int hclgevf_get_vector_index(struct hclgevf_dev
*hdev
, int vector
)
358 for (i
= 0; i
< hdev
->num_msi
; i
++)
359 if (vector
== hdev
->vector_irq
[i
])
365 static u32
hclgevf_get_rss_key_size(struct hnae3_handle
*handle
)
367 return HCLGEVF_RSS_KEY_SIZE
;
370 static u32
hclgevf_get_rss_indir_size(struct hnae3_handle
*handle
)
372 return HCLGEVF_RSS_IND_TBL_SIZE
;
375 static int hclgevf_set_rss_indir_table(struct hclgevf_dev
*hdev
)
377 const u8
*indir
= hdev
->rss_cfg
.rss_indirection_tbl
;
378 struct hclgevf_rss_indirection_table_cmd
*req
;
379 struct hclgevf_desc desc
;
383 req
= (struct hclgevf_rss_indirection_table_cmd
*)desc
.data
;
385 for (i
= 0; i
< HCLGEVF_RSS_CFG_TBL_NUM
; i
++) {
386 hclgevf_cmd_setup_basic_desc(&desc
, HCLGEVF_OPC_RSS_INDIR_TABLE
,
388 req
->start_table_index
= i
* HCLGEVF_RSS_CFG_TBL_SIZE
;
389 req
->rss_set_bitmap
= HCLGEVF_RSS_SET_BITMAP_MSK
;
390 for (j
= 0; j
< HCLGEVF_RSS_CFG_TBL_SIZE
; j
++)
392 indir
[i
* HCLGEVF_RSS_CFG_TBL_SIZE
+ j
];
394 status
= hclgevf_cmd_send(&hdev
->hw
, &desc
, 1);
396 dev_err(&hdev
->pdev
->dev
,
397 "VF failed(=%d) to set RSS indirection table\n",
406 static int hclgevf_set_rss_tc_mode(struct hclgevf_dev
*hdev
, u16 rss_size
)
408 struct hclgevf_rss_tc_mode_cmd
*req
;
409 u16 tc_offset
[HCLGEVF_MAX_TC_NUM
];
410 u16 tc_valid
[HCLGEVF_MAX_TC_NUM
];
411 u16 tc_size
[HCLGEVF_MAX_TC_NUM
];
412 struct hclgevf_desc desc
;
417 req
= (struct hclgevf_rss_tc_mode_cmd
*)desc
.data
;
419 roundup_size
= roundup_pow_of_two(rss_size
);
420 roundup_size
= ilog2(roundup_size
);
422 for (i
= 0; i
< HCLGEVF_MAX_TC_NUM
; i
++) {
423 tc_valid
[i
] = !!(hdev
->hw_tc_map
& BIT(i
));
424 tc_size
[i
] = roundup_size
;
425 tc_offset
[i
] = rss_size
* i
;
428 hclgevf_cmd_setup_basic_desc(&desc
, HCLGEVF_OPC_RSS_TC_MODE
, false);
429 for (i
= 0; i
< HCLGEVF_MAX_TC_NUM
; i
++) {
430 hnae_set_bit(req
->rss_tc_mode
[i
], HCLGEVF_RSS_TC_VALID_B
,
431 (tc_valid
[i
] & 0x1));
432 hnae_set_field(req
->rss_tc_mode
[i
], HCLGEVF_RSS_TC_SIZE_M
,
433 HCLGEVF_RSS_TC_SIZE_S
, tc_size
[i
]);
434 hnae_set_field(req
->rss_tc_mode
[i
], HCLGEVF_RSS_TC_OFFSET_M
,
435 HCLGEVF_RSS_TC_OFFSET_S
, tc_offset
[i
]);
437 status
= hclgevf_cmd_send(&hdev
->hw
, &desc
, 1);
439 dev_err(&hdev
->pdev
->dev
,
440 "VF failed(=%d) to set rss tc mode\n", status
);
445 static int hclgevf_get_rss_hw_cfg(struct hnae3_handle
*handle
, u8
*hash
,
448 struct hclgevf_dev
*hdev
= hclgevf_ae_get_hdev(handle
);
449 struct hclgevf_rss_config_cmd
*req
;
450 int lkup_times
= key
? 3 : 1;
451 struct hclgevf_desc desc
;
456 req
= (struct hclgevf_rss_config_cmd
*)desc
.data
;
457 lkup_times
= (lkup_times
== 3) ? 3 : ((hash
) ? 1 : 0);
459 for (key_offset
= 0; key_offset
< lkup_times
; key_offset
++) {
460 hclgevf_cmd_setup_basic_desc(&desc
,
461 HCLGEVF_OPC_RSS_GENERIC_CONFIG
,
463 req
->hash_config
|= (key_offset
<< HCLGEVF_RSS_HASH_KEY_OFFSET
);
465 status
= hclgevf_cmd_send(&hdev
->hw
, &desc
, 1);
467 dev_err(&hdev
->pdev
->dev
,
468 "failed to get hardware RSS cfg, status = %d\n",
475 HCLGEVF_RSS_KEY_SIZE
- HCLGEVF_RSS_HASH_KEY_NUM
* 2;
477 key_size
= HCLGEVF_RSS_HASH_KEY_NUM
;
480 memcpy(key
+ key_offset
* HCLGEVF_RSS_HASH_KEY_NUM
,
486 if ((req
->hash_config
& 0xf) == HCLGEVF_RSS_HASH_ALGO_TOEPLITZ
)
487 *hash
= ETH_RSS_HASH_TOP
;
489 *hash
= ETH_RSS_HASH_UNKNOWN
;
495 static int hclgevf_get_rss(struct hnae3_handle
*handle
, u32
*indir
, u8
*key
,
498 struct hclgevf_dev
*hdev
= hclgevf_ae_get_hdev(handle
);
499 struct hclgevf_rss_cfg
*rss_cfg
= &hdev
->rss_cfg
;
503 for (i
= 0; i
< HCLGEVF_RSS_IND_TBL_SIZE
; i
++)
504 indir
[i
] = rss_cfg
->rss_indirection_tbl
[i
];
506 return hclgevf_get_rss_hw_cfg(handle
, hfunc
, key
);
509 static int hclgevf_set_rss(struct hnae3_handle
*handle
, const u32
*indir
,
510 const u8
*key
, const u8 hfunc
)
512 struct hclgevf_dev
*hdev
= hclgevf_ae_get_hdev(handle
);
513 struct hclgevf_rss_cfg
*rss_cfg
= &hdev
->rss_cfg
;
516 /* update the shadow RSS table with user specified qids */
517 for (i
= 0; i
< HCLGEVF_RSS_IND_TBL_SIZE
; i
++)
518 rss_cfg
->rss_indirection_tbl
[i
] = indir
[i
];
520 /* update the hardware */
521 return hclgevf_set_rss_indir_table(hdev
);
524 static int hclgevf_get_tc_size(struct hnae3_handle
*handle
)
526 struct hclgevf_dev
*hdev
= hclgevf_ae_get_hdev(handle
);
527 struct hclgevf_rss_cfg
*rss_cfg
= &hdev
->rss_cfg
;
529 return rss_cfg
->rss_size
;
532 static int hclgevf_bind_ring_to_vector(struct hnae3_handle
*handle
, bool en
,
534 struct hnae3_ring_chain_node
*ring_chain
)
536 #define HCLGEVF_RING_NODE_VARIABLE_NUM 3
537 #define HCLGEVF_RING_MAP_MBX_BASIC_MSG_NUM 3
538 struct hclgevf_dev
*hdev
= hclgevf_ae_get_hdev(handle
);
539 struct hnae3_ring_chain_node
*node
;
540 struct hclge_mbx_vf_to_pf_cmd
*req
;
541 struct hclgevf_desc desc
;
546 req
= (struct hclge_mbx_vf_to_pf_cmd
*)desc
.data
;
547 vector_id
= hclgevf_get_vector_index(hdev
, vector
);
549 dev_err(&handle
->pdev
->dev
,
550 "Get vector index fail. ret =%d\n", vector_id
);
554 hclgevf_cmd_setup_basic_desc(&desc
, HCLGEVF_OPC_MBX_VF_TO_PF
, false);
556 HCLGE_MBX_MAP_RING_TO_VECTOR
: HCLGE_MBX_UNMAP_RING_TO_VECTOR
;
558 req
->msg
[1] = vector_id
; /* vector_id should be id in VF */
561 for (node
= ring_chain
; node
; node
= node
->next
) {
563 /* msg[2] is cause num */
564 req
->msg
[HCLGEVF_RING_NODE_VARIABLE_NUM
* i
] =
565 hnae_get_bit(node
->flag
, HNAE3_RING_TYPE_B
);
566 req
->msg
[HCLGEVF_RING_NODE_VARIABLE_NUM
* i
+ 1] =
568 if (i
== (HCLGE_MBX_VF_MSG_DATA_NUM
-
569 HCLGEVF_RING_MAP_MBX_BASIC_MSG_NUM
) /
570 HCLGEVF_RING_NODE_VARIABLE_NUM
) {
573 status
= hclgevf_cmd_send(&hdev
->hw
, &desc
, 1);
575 dev_err(&hdev
->pdev
->dev
,
576 "Map TQP fail, status is %d.\n",
581 hclgevf_cmd_setup_basic_desc(&desc
,
582 HCLGEVF_OPC_MBX_VF_TO_PF
,
585 req
->msg
[1] = vector_id
;
592 status
= hclgevf_cmd_send(&hdev
->hw
, &desc
, 1);
594 dev_err(&hdev
->pdev
->dev
,
595 "Map TQP fail, status is %d.\n", status
);
603 static int hclgevf_map_ring_to_vector(struct hnae3_handle
*handle
, int vector
,
604 struct hnae3_ring_chain_node
*ring_chain
)
606 return hclgevf_bind_ring_to_vector(handle
, true, vector
, ring_chain
);
609 static int hclgevf_unmap_ring_from_vector(
610 struct hnae3_handle
*handle
,
612 struct hnae3_ring_chain_node
*ring_chain
)
614 struct hclgevf_dev
*hdev
= hclgevf_ae_get_hdev(handle
);
617 vector_id
= hclgevf_get_vector_index(hdev
, vector
);
619 dev_err(&handle
->pdev
->dev
,
620 "Get vector index fail. ret =%d\n", vector_id
);
624 ret
= hclgevf_bind_ring_to_vector(handle
, false, vector
, ring_chain
);
626 dev_err(&handle
->pdev
->dev
,
627 "Unmap ring from vector fail. vector=%d, ret =%d\n",
633 hclgevf_free_vector(hdev
, vector
);
638 static int hclgevf_cmd_set_promisc_mode(struct hclgevf_dev
*hdev
, u32 en
)
640 struct hclge_mbx_vf_to_pf_cmd
*req
;
641 struct hclgevf_desc desc
;
644 req
= (struct hclge_mbx_vf_to_pf_cmd
*)desc
.data
;
646 hclgevf_cmd_setup_basic_desc(&desc
, HCLGEVF_OPC_MBX_VF_TO_PF
, false);
647 req
->msg
[0] = HCLGE_MBX_SET_PROMISC_MODE
;
650 status
= hclgevf_cmd_send(&hdev
->hw
, &desc
, 1);
652 dev_err(&hdev
->pdev
->dev
,
653 "Set promisc mode fail, status is %d.\n", status
);
658 static void hclgevf_set_promisc_mode(struct hnae3_handle
*handle
, u32 en
)
660 struct hclgevf_dev
*hdev
= hclgevf_ae_get_hdev(handle
);
662 hclgevf_cmd_set_promisc_mode(hdev
, en
);
665 static int hclgevf_tqp_enable(struct hclgevf_dev
*hdev
, int tqp_id
,
666 int stream_id
, bool enable
)
668 struct hclgevf_cfg_com_tqp_queue_cmd
*req
;
669 struct hclgevf_desc desc
;
672 req
= (struct hclgevf_cfg_com_tqp_queue_cmd
*)desc
.data
;
674 hclgevf_cmd_setup_basic_desc(&desc
, HCLGEVF_OPC_CFG_COM_TQP_QUEUE
,
676 req
->tqp_id
= cpu_to_le16(tqp_id
& HCLGEVF_RING_ID_MASK
);
677 req
->stream_id
= cpu_to_le16(stream_id
);
678 req
->enable
|= enable
<< HCLGEVF_TQP_ENABLE_B
;
680 status
= hclgevf_cmd_send(&hdev
->hw
, &desc
, 1);
682 dev_err(&hdev
->pdev
->dev
,
683 "TQP enable fail, status =%d.\n", status
);
688 static int hclgevf_get_queue_id(struct hnae3_queue
*queue
)
690 struct hclgevf_tqp
*tqp
= container_of(queue
, struct hclgevf_tqp
, q
);
695 static void hclgevf_reset_tqp_stats(struct hnae3_handle
*handle
)
697 struct hclgevf_dev
*hdev
= hclgevf_ae_get_hdev(handle
);
698 struct hnae3_queue
*queue
;
699 struct hclgevf_tqp
*tqp
;
702 for (i
= 0; i
< hdev
->num_tqps
; i
++) {
703 queue
= handle
->kinfo
.tqp
[i
];
704 tqp
= container_of(queue
, struct hclgevf_tqp
, q
);
705 memset(&tqp
->tqp_stats
, 0, sizeof(tqp
->tqp_stats
));
709 static int hclgevf_cfg_func_mta_filter(struct hnae3_handle
*handle
, bool en
)
711 struct hclgevf_dev
*hdev
= hclgevf_ae_get_hdev(handle
);
715 return hclgevf_send_mbx_msg(hdev
, HCLGE_MBX_SET_MULTICAST
,
716 HCLGE_MBX_MAC_VLAN_MC_FUNC_MTA_ENABLE
,
717 msg
, 1, false, NULL
, 0);
720 static void hclgevf_get_mac_addr(struct hnae3_handle
*handle
, u8
*p
)
722 struct hclgevf_dev
*hdev
= hclgevf_ae_get_hdev(handle
);
724 ether_addr_copy(p
, hdev
->hw
.mac
.mac_addr
);
727 static int hclgevf_set_mac_addr(struct hnae3_handle
*handle
, void *p
)
729 struct hclgevf_dev
*hdev
= hclgevf_ae_get_hdev(handle
);
730 u8
*old_mac_addr
= (u8
*)hdev
->hw
.mac
.mac_addr
;
731 u8
*new_mac_addr
= (u8
*)p
;
732 u8 msg_data
[ETH_ALEN
* 2];
735 ether_addr_copy(msg_data
, new_mac_addr
);
736 ether_addr_copy(&msg_data
[ETH_ALEN
], old_mac_addr
);
738 status
= hclgevf_send_mbx_msg(hdev
, HCLGE_MBX_SET_UNICAST
,
739 HCLGE_MBX_MAC_VLAN_UC_MODIFY
,
740 msg_data
, ETH_ALEN
* 2,
743 ether_addr_copy(hdev
->hw
.mac
.mac_addr
, new_mac_addr
);
748 static int hclgevf_add_uc_addr(struct hnae3_handle
*handle
,
749 const unsigned char *addr
)
751 struct hclgevf_dev
*hdev
= hclgevf_ae_get_hdev(handle
);
753 return hclgevf_send_mbx_msg(hdev
, HCLGE_MBX_SET_UNICAST
,
754 HCLGE_MBX_MAC_VLAN_UC_ADD
,
755 addr
, ETH_ALEN
, false, NULL
, 0);
758 static int hclgevf_rm_uc_addr(struct hnae3_handle
*handle
,
759 const unsigned char *addr
)
761 struct hclgevf_dev
*hdev
= hclgevf_ae_get_hdev(handle
);
763 return hclgevf_send_mbx_msg(hdev
, HCLGE_MBX_SET_UNICAST
,
764 HCLGE_MBX_MAC_VLAN_UC_REMOVE
,
765 addr
, ETH_ALEN
, false, NULL
, 0);
768 static int hclgevf_add_mc_addr(struct hnae3_handle
*handle
,
769 const unsigned char *addr
)
771 struct hclgevf_dev
*hdev
= hclgevf_ae_get_hdev(handle
);
773 return hclgevf_send_mbx_msg(hdev
, HCLGE_MBX_SET_MULTICAST
,
774 HCLGE_MBX_MAC_VLAN_MC_ADD
,
775 addr
, ETH_ALEN
, false, NULL
, 0);
778 static int hclgevf_rm_mc_addr(struct hnae3_handle
*handle
,
779 const unsigned char *addr
)
781 struct hclgevf_dev
*hdev
= hclgevf_ae_get_hdev(handle
);
783 return hclgevf_send_mbx_msg(hdev
, HCLGE_MBX_SET_MULTICAST
,
784 HCLGE_MBX_MAC_VLAN_MC_REMOVE
,
785 addr
, ETH_ALEN
, false, NULL
, 0);
788 static int hclgevf_set_vlan_filter(struct hnae3_handle
*handle
,
789 __be16 proto
, u16 vlan_id
,
792 #define HCLGEVF_VLAN_MBX_MSG_LEN 5
793 struct hclgevf_dev
*hdev
= hclgevf_ae_get_hdev(handle
);
794 u8 msg_data
[HCLGEVF_VLAN_MBX_MSG_LEN
];
799 if (proto
!= htons(ETH_P_8021Q
))
800 return -EPROTONOSUPPORT
;
802 msg_data
[0] = is_kill
;
803 memcpy(&msg_data
[1], &vlan_id
, sizeof(vlan_id
));
804 memcpy(&msg_data
[3], &proto
, sizeof(proto
));
805 return hclgevf_send_mbx_msg(hdev
, HCLGE_MBX_SET_VLAN
,
806 HCLGE_MBX_VLAN_FILTER
, msg_data
,
807 HCLGEVF_VLAN_MBX_MSG_LEN
, false, NULL
, 0);
810 static void hclgevf_reset_tqp(struct hnae3_handle
*handle
, u16 queue_id
)
812 struct hclgevf_dev
*hdev
= hclgevf_ae_get_hdev(handle
);
815 memcpy(&msg_data
[0], &queue_id
, sizeof(queue_id
));
817 hclgevf_send_mbx_msg(hdev
, HCLGE_MBX_QUEUE_RESET
, 0, msg_data
, 2, false,
821 static u32
hclgevf_get_fw_version(struct hnae3_handle
*handle
)
823 struct hclgevf_dev
*hdev
= hclgevf_ae_get_hdev(handle
);
825 return hdev
->fw_version
;
828 static void hclgevf_get_misc_vector(struct hclgevf_dev
*hdev
)
830 struct hclgevf_misc_vector
*vector
= &hdev
->misc_vector
;
832 vector
->vector_irq
= pci_irq_vector(hdev
->pdev
,
833 HCLGEVF_MISC_VECTOR_NUM
);
834 vector
->addr
= hdev
->hw
.io_base
+ HCLGEVF_MISC_VECTOR_REG_BASE
;
835 /* vector status always valid for Vector 0 */
836 hdev
->vector_status
[HCLGEVF_MISC_VECTOR_NUM
] = 0;
837 hdev
->vector_irq
[HCLGEVF_MISC_VECTOR_NUM
] = vector
->vector_irq
;
839 hdev
->num_msi_left
-= 1;
840 hdev
->num_msi_used
+= 1;
843 static void hclgevf_mbx_task_schedule(struct hclgevf_dev
*hdev
)
845 if (!test_and_set_bit(HCLGEVF_STATE_MBX_SERVICE_SCHED
, &hdev
->state
))
846 schedule_work(&hdev
->mbx_service_task
);
849 static void hclgevf_task_schedule(struct hclgevf_dev
*hdev
)
851 if (!test_bit(HCLGEVF_STATE_DOWN
, &hdev
->state
) &&
852 !test_and_set_bit(HCLGEVF_STATE_SERVICE_SCHED
, &hdev
->state
))
853 schedule_work(&hdev
->service_task
);
856 static void hclgevf_service_timer(struct timer_list
*t
)
858 struct hclgevf_dev
*hdev
= from_timer(hdev
, t
, service_timer
);
860 mod_timer(&hdev
->service_timer
, jiffies
+ 5 * HZ
);
862 hclgevf_task_schedule(hdev
);
865 static void hclgevf_mailbox_service_task(struct work_struct
*work
)
867 struct hclgevf_dev
*hdev
;
869 hdev
= container_of(work
, struct hclgevf_dev
, mbx_service_task
);
871 if (test_and_set_bit(HCLGEVF_STATE_MBX_HANDLING
, &hdev
->state
))
874 clear_bit(HCLGEVF_STATE_MBX_SERVICE_SCHED
, &hdev
->state
);
876 hclgevf_mbx_handler(hdev
);
878 clear_bit(HCLGEVF_STATE_MBX_HANDLING
, &hdev
->state
);
881 static void hclgevf_service_task(struct work_struct
*work
)
883 struct hclgevf_dev
*hdev
;
885 hdev
= container_of(work
, struct hclgevf_dev
, service_task
);
887 /* request the link status from the PF. PF would be able to tell VF
888 * about such updates in future so we might remove this later
890 hclgevf_request_link_info(hdev
);
892 clear_bit(HCLGEVF_STATE_SERVICE_SCHED
, &hdev
->state
);
895 static void hclgevf_clear_event_cause(struct hclgevf_dev
*hdev
, u32 regclr
)
897 hclgevf_write_dev(&hdev
->hw
, HCLGEVF_VECTOR0_CMDQ_SRC_REG
, regclr
);
900 static bool hclgevf_check_event_cause(struct hclgevf_dev
*hdev
, u32
*clearval
)
904 /* fetch the events from their corresponding regs */
905 cmdq_src_reg
= hclgevf_read_dev(&hdev
->hw
,
906 HCLGEVF_VECTOR0_CMDQ_SRC_REG
);
908 /* check for vector0 mailbox(=CMDQ RX) event source */
909 if (BIT(HCLGEVF_VECTOR0_RX_CMDQ_INT_B
) & cmdq_src_reg
) {
910 cmdq_src_reg
&= ~BIT(HCLGEVF_VECTOR0_RX_CMDQ_INT_B
);
911 *clearval
= cmdq_src_reg
;
915 dev_dbg(&hdev
->pdev
->dev
, "vector 0 interrupt from unknown source\n");
920 static void hclgevf_enable_vector(struct hclgevf_misc_vector
*vector
, bool en
)
922 writel(en
? 1 : 0, vector
->addr
);
925 static irqreturn_t
hclgevf_misc_irq_handle(int irq
, void *data
)
927 struct hclgevf_dev
*hdev
= data
;
930 hclgevf_enable_vector(&hdev
->misc_vector
, false);
931 if (!hclgevf_check_event_cause(hdev
, &clearval
))
934 /* schedule the VF mailbox service task, if not already scheduled */
935 hclgevf_mbx_task_schedule(hdev
);
937 hclgevf_clear_event_cause(hdev
, clearval
);
940 hclgevf_enable_vector(&hdev
->misc_vector
, true);
945 static int hclgevf_configure(struct hclgevf_dev
*hdev
)
949 /* get queue configuration from PF */
950 ret
= hclge_get_queue_info(hdev
);
953 /* get tc configuration from PF */
954 return hclgevf_get_tc_info(hdev
);
957 static int hclgevf_init_roce_base_info(struct hclgevf_dev
*hdev
)
959 struct hnae3_handle
*roce
= &hdev
->roce
;
960 struct hnae3_handle
*nic
= &hdev
->nic
;
962 roce
->rinfo
.num_vectors
= HCLGEVF_ROCEE_VECTOR_NUM
;
964 if (hdev
->num_msi_left
< roce
->rinfo
.num_vectors
||
965 hdev
->num_msi_left
== 0)
968 roce
->rinfo
.base_vector
=
969 hdev
->vector_status
[hdev
->num_msi_used
];
971 roce
->rinfo
.netdev
= nic
->kinfo
.netdev
;
972 roce
->rinfo
.roce_io_base
= hdev
->hw
.io_base
;
974 roce
->pdev
= nic
->pdev
;
975 roce
->ae_algo
= nic
->ae_algo
;
976 roce
->numa_node_mask
= nic
->numa_node_mask
;
981 static int hclgevf_rss_init_hw(struct hclgevf_dev
*hdev
)
983 struct hclgevf_rss_cfg
*rss_cfg
= &hdev
->rss_cfg
;
986 rss_cfg
->rss_size
= hdev
->rss_size_max
;
988 /* Initialize RSS indirect table for each vport */
989 for (i
= 0; i
< HCLGEVF_RSS_IND_TBL_SIZE
; i
++)
990 rss_cfg
->rss_indirection_tbl
[i
] = i
% hdev
->rss_size_max
;
992 ret
= hclgevf_set_rss_indir_table(hdev
);
996 return hclgevf_set_rss_tc_mode(hdev
, hdev
->rss_size_max
);
999 static int hclgevf_init_vlan_config(struct hclgevf_dev
*hdev
)
1001 /* other vlan config(like, VLAN TX/RX offload) would also be added
1004 return hclgevf_set_vlan_filter(&hdev
->nic
, htons(ETH_P_8021Q
), 0,
1008 static int hclgevf_ae_start(struct hnae3_handle
*handle
)
1010 struct hclgevf_dev
*hdev
= hclgevf_ae_get_hdev(handle
);
1013 for (i
= 0; i
< handle
->kinfo
.num_tqps
; i
++) {
1015 queue_id
= hclgevf_get_queue_id(handle
->kinfo
.tqp
[i
]);
1017 dev_warn(&hdev
->pdev
->dev
,
1018 "Get invalid queue id, ignore it\n");
1022 hclgevf_tqp_enable(hdev
, queue_id
, 0, true);
1025 /* reset tqp stats */
1026 hclgevf_reset_tqp_stats(handle
);
1028 hclgevf_request_link_info(hdev
);
1030 clear_bit(HCLGEVF_STATE_DOWN
, &hdev
->state
);
1031 mod_timer(&hdev
->service_timer
, jiffies
+ HZ
);
1036 static void hclgevf_ae_stop(struct hnae3_handle
*handle
)
1038 struct hclgevf_dev
*hdev
= hclgevf_ae_get_hdev(handle
);
1041 for (i
= 0; i
< hdev
->num_tqps
; i
++) {
1043 queue_id
= hclgevf_get_queue_id(handle
->kinfo
.tqp
[i
]);
1045 dev_warn(&hdev
->pdev
->dev
,
1046 "Get invalid queue id, ignore it\n");
1050 hclgevf_tqp_enable(hdev
, queue_id
, 0, false);
1053 /* reset tqp stats */
1054 hclgevf_reset_tqp_stats(handle
);
1057 static void hclgevf_state_init(struct hclgevf_dev
*hdev
)
1059 /* setup tasks for the MBX */
1060 INIT_WORK(&hdev
->mbx_service_task
, hclgevf_mailbox_service_task
);
1061 clear_bit(HCLGEVF_STATE_MBX_SERVICE_SCHED
, &hdev
->state
);
1062 clear_bit(HCLGEVF_STATE_MBX_HANDLING
, &hdev
->state
);
1064 /* setup tasks for service timer */
1065 timer_setup(&hdev
->service_timer
, hclgevf_service_timer
, 0);
1067 INIT_WORK(&hdev
->service_task
, hclgevf_service_task
);
1068 clear_bit(HCLGEVF_STATE_SERVICE_SCHED
, &hdev
->state
);
1070 mutex_init(&hdev
->mbx_resp
.mbx_mutex
);
1072 /* bring the device down */
1073 set_bit(HCLGEVF_STATE_DOWN
, &hdev
->state
);
1076 static void hclgevf_state_uninit(struct hclgevf_dev
*hdev
)
1078 set_bit(HCLGEVF_STATE_DOWN
, &hdev
->state
);
1080 if (hdev
->service_timer
.function
)
1081 del_timer_sync(&hdev
->service_timer
);
1082 if (hdev
->service_task
.func
)
1083 cancel_work_sync(&hdev
->service_task
);
1084 if (hdev
->mbx_service_task
.func
)
1085 cancel_work_sync(&hdev
->mbx_service_task
);
1087 mutex_destroy(&hdev
->mbx_resp
.mbx_mutex
);
1090 static int hclgevf_init_msi(struct hclgevf_dev
*hdev
)
1092 struct pci_dev
*pdev
= hdev
->pdev
;
1096 hdev
->num_msi
= HCLGEVF_MAX_VF_VECTOR_NUM
;
1098 vectors
= pci_alloc_irq_vectors(pdev
, 1, hdev
->num_msi
,
1099 PCI_IRQ_MSI
| PCI_IRQ_MSIX
);
1102 "failed(%d) to allocate MSI/MSI-X vectors\n",
1106 if (vectors
< hdev
->num_msi
)
1107 dev_warn(&hdev
->pdev
->dev
,
1108 "requested %d MSI/MSI-X, but allocated %d MSI/MSI-X\n",
1109 hdev
->num_msi
, vectors
);
1111 hdev
->num_msi
= vectors
;
1112 hdev
->num_msi_left
= vectors
;
1113 hdev
->base_msi_vector
= pdev
->irq
;
1115 hdev
->vector_status
= devm_kcalloc(&pdev
->dev
, hdev
->num_msi
,
1116 sizeof(u16
), GFP_KERNEL
);
1117 if (!hdev
->vector_status
) {
1118 pci_free_irq_vectors(pdev
);
1122 for (i
= 0; i
< hdev
->num_msi
; i
++)
1123 hdev
->vector_status
[i
] = HCLGEVF_INVALID_VPORT
;
1125 hdev
->vector_irq
= devm_kcalloc(&pdev
->dev
, hdev
->num_msi
,
1126 sizeof(int), GFP_KERNEL
);
1127 if (!hdev
->vector_irq
) {
1128 pci_free_irq_vectors(pdev
);
1135 static void hclgevf_uninit_msi(struct hclgevf_dev
*hdev
)
1137 struct pci_dev
*pdev
= hdev
->pdev
;
1139 pci_free_irq_vectors(pdev
);
1142 static int hclgevf_misc_irq_init(struct hclgevf_dev
*hdev
)
1146 hclgevf_get_misc_vector(hdev
);
1148 ret
= request_irq(hdev
->misc_vector
.vector_irq
, hclgevf_misc_irq_handle
,
1149 0, "hclgevf_cmd", hdev
);
1151 dev_err(&hdev
->pdev
->dev
, "VF failed to request misc irq(%d)\n",
1152 hdev
->misc_vector
.vector_irq
);
1156 /* enable misc. vector(vector 0) */
1157 hclgevf_enable_vector(&hdev
->misc_vector
, true);
1162 static void hclgevf_misc_irq_uninit(struct hclgevf_dev
*hdev
)
1164 /* disable misc vector(vector 0) */
1165 hclgevf_enable_vector(&hdev
->misc_vector
, false);
1166 free_irq(hdev
->misc_vector
.vector_irq
, hdev
);
1167 hclgevf_free_vector(hdev
, 0);
1170 static int hclgevf_init_instance(struct hclgevf_dev
*hdev
,
1171 struct hnae3_client
*client
)
1175 switch (client
->type
) {
1176 case HNAE3_CLIENT_KNIC
:
1177 hdev
->nic_client
= client
;
1178 hdev
->nic
.client
= client
;
1180 ret
= client
->ops
->init_instance(&hdev
->nic
);
1184 if (hdev
->roce_client
&& hnae3_dev_roce_supported(hdev
)) {
1185 struct hnae3_client
*rc
= hdev
->roce_client
;
1187 ret
= hclgevf_init_roce_base_info(hdev
);
1190 ret
= rc
->ops
->init_instance(&hdev
->roce
);
1195 case HNAE3_CLIENT_UNIC
:
1196 hdev
->nic_client
= client
;
1197 hdev
->nic
.client
= client
;
1199 ret
= client
->ops
->init_instance(&hdev
->nic
);
1203 case HNAE3_CLIENT_ROCE
:
1204 hdev
->roce_client
= client
;
1205 hdev
->roce
.client
= client
;
1207 if (hdev
->roce_client
&& hnae3_dev_roce_supported(hdev
)) {
1208 ret
= hclgevf_init_roce_base_info(hdev
);
1212 ret
= client
->ops
->init_instance(&hdev
->roce
);
1221 static void hclgevf_uninit_instance(struct hclgevf_dev
*hdev
,
1222 struct hnae3_client
*client
)
1224 /* un-init roce, if it exists */
1225 if (hdev
->roce_client
)
1226 hdev
->roce_client
->ops
->uninit_instance(&hdev
->roce
, 0);
1228 /* un-init nic/unic, if this was not called by roce client */
1229 if ((client
->ops
->uninit_instance
) &&
1230 (client
->type
!= HNAE3_CLIENT_ROCE
))
1231 client
->ops
->uninit_instance(&hdev
->nic
, 0);
1234 static int hclgevf_register_client(struct hnae3_client
*client
,
1235 struct hnae3_ae_dev
*ae_dev
)
1237 struct hclgevf_dev
*hdev
= ae_dev
->priv
;
1239 return hclgevf_init_instance(hdev
, client
);
1242 static void hclgevf_unregister_client(struct hnae3_client
*client
,
1243 struct hnae3_ae_dev
*ae_dev
)
1245 struct hclgevf_dev
*hdev
= ae_dev
->priv
;
1247 hclgevf_uninit_instance(hdev
, client
);
1250 static int hclgevf_pci_init(struct hclgevf_dev
*hdev
)
1252 struct pci_dev
*pdev
= hdev
->pdev
;
1253 struct hclgevf_hw
*hw
;
1256 ret
= pci_enable_device(pdev
);
1258 dev_err(&pdev
->dev
, "failed to enable PCI device\n");
1259 goto err_no_drvdata
;
1262 ret
= dma_set_mask_and_coherent(&pdev
->dev
, DMA_BIT_MASK(64));
1264 dev_err(&pdev
->dev
, "can't set consistent PCI DMA, exiting");
1265 goto err_disable_device
;
1268 ret
= pci_request_regions(pdev
, HCLGEVF_DRIVER_NAME
);
1270 dev_err(&pdev
->dev
, "PCI request regions failed %d\n", ret
);
1271 goto err_disable_device
;
1274 pci_set_master(pdev
);
1277 hw
->io_base
= pci_iomap(pdev
, 2, 0);
1279 dev_err(&pdev
->dev
, "can't map configuration register space\n");
1281 goto err_clr_master
;
1287 pci_clear_master(pdev
);
1288 pci_release_regions(pdev
);
1290 pci_disable_device(pdev
);
1292 pci_set_drvdata(pdev
, NULL
);
1296 static void hclgevf_pci_uninit(struct hclgevf_dev
*hdev
)
1298 struct pci_dev
*pdev
= hdev
->pdev
;
1300 pci_iounmap(pdev
, hdev
->hw
.io_base
);
1301 pci_clear_master(pdev
);
1302 pci_release_regions(pdev
);
1303 pci_disable_device(pdev
);
1304 pci_set_drvdata(pdev
, NULL
);
1307 static int hclgevf_init_ae_dev(struct hnae3_ae_dev
*ae_dev
)
1309 struct pci_dev
*pdev
= ae_dev
->pdev
;
1310 struct hclgevf_dev
*hdev
;
1313 hdev
= devm_kzalloc(&pdev
->dev
, sizeof(*hdev
), GFP_KERNEL
);
1318 hdev
->ae_dev
= ae_dev
;
1319 ae_dev
->priv
= hdev
;
1321 ret
= hclgevf_pci_init(hdev
);
1323 dev_err(&pdev
->dev
, "PCI initialization failed\n");
1327 ret
= hclgevf_init_msi(hdev
);
1329 dev_err(&pdev
->dev
, "failed(%d) to init MSI/MSI-X\n", ret
);
1333 hclgevf_state_init(hdev
);
1335 ret
= hclgevf_misc_irq_init(hdev
);
1337 dev_err(&pdev
->dev
, "failed(%d) to init Misc IRQ(vector0)\n",
1339 goto err_misc_irq_init
;
1342 ret
= hclgevf_cmd_init(hdev
);
1346 ret
= hclgevf_configure(hdev
);
1348 dev_err(&pdev
->dev
, "failed(%d) to fetch configuration\n", ret
);
1352 ret
= hclgevf_alloc_tqps(hdev
);
1354 dev_err(&pdev
->dev
, "failed(%d) to allocate TQPs\n", ret
);
1358 ret
= hclgevf_set_handle_info(hdev
);
1360 dev_err(&pdev
->dev
, "failed(%d) to set handle info\n", ret
);
1364 /* Initialize VF's MTA */
1365 hdev
->accept_mta_mc
= true;
1366 ret
= hclgevf_cfg_func_mta_filter(&hdev
->nic
, hdev
->accept_mta_mc
);
1368 dev_err(&hdev
->pdev
->dev
,
1369 "failed(%d) to set mta filter mode\n", ret
);
1373 /* Initialize RSS for this VF */
1374 ret
= hclgevf_rss_init_hw(hdev
);
1376 dev_err(&hdev
->pdev
->dev
,
1377 "failed(%d) to initialize RSS\n", ret
);
1381 ret
= hclgevf_init_vlan_config(hdev
);
1383 dev_err(&hdev
->pdev
->dev
,
1384 "failed(%d) to initialize VLAN config\n", ret
);
1388 pr_info("finished initializing %s driver\n", HCLGEVF_DRIVER_NAME
);
1393 hclgevf_cmd_uninit(hdev
);
1395 hclgevf_misc_irq_uninit(hdev
);
1397 hclgevf_state_uninit(hdev
);
1398 hclgevf_uninit_msi(hdev
);
1400 hclgevf_pci_uninit(hdev
);
1404 static void hclgevf_uninit_ae_dev(struct hnae3_ae_dev
*ae_dev
)
1406 struct hclgevf_dev
*hdev
= ae_dev
->priv
;
1408 hclgevf_cmd_uninit(hdev
);
1409 hclgevf_misc_irq_uninit(hdev
);
1410 hclgevf_state_uninit(hdev
);
1411 hclgevf_uninit_msi(hdev
);
1412 hclgevf_pci_uninit(hdev
);
1413 ae_dev
->priv
= NULL
;
1416 static u32
hclgevf_get_max_channels(struct hclgevf_dev
*hdev
)
1418 struct hnae3_handle
*nic
= &hdev
->nic
;
1419 struct hnae3_knic_private_info
*kinfo
= &nic
->kinfo
;
1421 return min_t(u32
, hdev
->rss_size_max
* kinfo
->num_tc
, hdev
->num_tqps
);
1425 * hclgevf_get_channels - Get the current channels enabled and max supported.
1426 * @handle: hardware information for network interface
1427 * @ch: ethtool channels structure
1429 * We don't support separate tx and rx queues as channels. The other count
1430 * represents how many queues are being used for control. max_combined counts
1431 * how many queue pairs we can support. They may not be mapped 1 to 1 with
1432 * q_vectors since we support a lot more queue pairs than q_vectors.
1434 static void hclgevf_get_channels(struct hnae3_handle
*handle
,
1435 struct ethtool_channels
*ch
)
1437 struct hclgevf_dev
*hdev
= hclgevf_ae_get_hdev(handle
);
1439 ch
->max_combined
= hclgevf_get_max_channels(hdev
);
1440 ch
->other_count
= 0;
1442 ch
->combined_count
= hdev
->num_tqps
;
1445 static const struct hnae3_ae_ops hclgevf_ops
= {
1446 .init_ae_dev
= hclgevf_init_ae_dev
,
1447 .uninit_ae_dev
= hclgevf_uninit_ae_dev
,
1448 .init_client_instance
= hclgevf_register_client
,
1449 .uninit_client_instance
= hclgevf_unregister_client
,
1450 .start
= hclgevf_ae_start
,
1451 .stop
= hclgevf_ae_stop
,
1452 .map_ring_to_vector
= hclgevf_map_ring_to_vector
,
1453 .unmap_ring_from_vector
= hclgevf_unmap_ring_from_vector
,
1454 .get_vector
= hclgevf_get_vector
,
1455 .reset_queue
= hclgevf_reset_tqp
,
1456 .set_promisc_mode
= hclgevf_set_promisc_mode
,
1457 .get_mac_addr
= hclgevf_get_mac_addr
,
1458 .set_mac_addr
= hclgevf_set_mac_addr
,
1459 .add_uc_addr
= hclgevf_add_uc_addr
,
1460 .rm_uc_addr
= hclgevf_rm_uc_addr
,
1461 .add_mc_addr
= hclgevf_add_mc_addr
,
1462 .rm_mc_addr
= hclgevf_rm_mc_addr
,
1463 .get_stats
= hclgevf_get_stats
,
1464 .update_stats
= hclgevf_update_stats
,
1465 .get_strings
= hclgevf_get_strings
,
1466 .get_sset_count
= hclgevf_get_sset_count
,
1467 .get_rss_key_size
= hclgevf_get_rss_key_size
,
1468 .get_rss_indir_size
= hclgevf_get_rss_indir_size
,
1469 .get_rss
= hclgevf_get_rss
,
1470 .set_rss
= hclgevf_set_rss
,
1471 .get_tc_size
= hclgevf_get_tc_size
,
1472 .get_fw_version
= hclgevf_get_fw_version
,
1473 .set_vlan_filter
= hclgevf_set_vlan_filter
,
1474 .get_channels
= hclgevf_get_channels
,
1477 static struct hnae3_ae_algo ae_algovf
= {
1478 .ops
= &hclgevf_ops
,
1479 .name
= HCLGEVF_NAME
,
1480 .pdev_id_table
= ae_algovf_pci_tbl
,
1483 static int hclgevf_init(void)
1485 pr_info("%s is initializing\n", HCLGEVF_NAME
);
1487 return hnae3_register_ae_algo(&ae_algovf
);
1490 static void hclgevf_exit(void)
1492 hnae3_unregister_ae_algo(&ae_algovf
);
1494 module_init(hclgevf_init
);
1495 module_exit(hclgevf_exit
);
1497 MODULE_LICENSE("GPL");
1498 MODULE_AUTHOR("Huawei Tech. Co., Ltd.");
1499 MODULE_DESCRIPTION("HCLGEVF Driver");
1500 MODULE_VERSION(HCLGEVF_MOD_VERSION
);