1 // SPDX-License-Identifier: GPL-2.0+
2 // Copyright (c) 2016-2017 Hisilicon Limited.
4 #include <linux/etherdevice.h>
5 #include "hclgevf_cmd.h"
6 #include "hclgevf_main.h"
10 #define HCLGEVF_NAME "hclgevf"
12 static struct hnae3_ae_algo ae_algovf
;
14 static const struct pci_device_id ae_algovf_pci_tbl
[] = {
15 {PCI_VDEVICE(HUAWEI
, HNAE3_DEV_ID_100G_VF
), 0},
16 {PCI_VDEVICE(HUAWEI
, HNAE3_DEV_ID_100G_RDMA_DCB_PFC_VF
), 0},
17 /* required last entry */
21 MODULE_DEVICE_TABLE(pci
, ae_algovf_pci_tbl
);
23 static inline struct hclgevf_dev
*hclgevf_ae_get_hdev(
24 struct hnae3_handle
*handle
)
26 return container_of(handle
, struct hclgevf_dev
, nic
);
29 static int hclgevf_tqps_update_stats(struct hnae3_handle
*handle
)
31 struct hclgevf_dev
*hdev
= hclgevf_ae_get_hdev(handle
);
32 struct hnae3_queue
*queue
;
33 struct hclgevf_desc desc
;
34 struct hclgevf_tqp
*tqp
;
38 for (i
= 0; i
< hdev
->num_tqps
; i
++) {
39 queue
= handle
->kinfo
.tqp
[i
];
40 tqp
= container_of(queue
, struct hclgevf_tqp
, q
);
41 hclgevf_cmd_setup_basic_desc(&desc
,
42 HCLGEVF_OPC_QUERY_RX_STATUS
,
45 desc
.data
[0] = cpu_to_le32(tqp
->index
& 0x1ff);
46 status
= hclgevf_cmd_send(&hdev
->hw
, &desc
, 1);
48 dev_err(&hdev
->pdev
->dev
,
49 "Query tqp stat fail, status = %d,queue = %d\n",
53 tqp
->tqp_stats
.rcb_rx_ring_pktnum_rcd
+=
54 le32_to_cpu(desc
.data
[1]);
56 hclgevf_cmd_setup_basic_desc(&desc
, HCLGEVF_OPC_QUERY_TX_STATUS
,
59 desc
.data
[0] = cpu_to_le32(tqp
->index
& 0x1ff);
60 status
= hclgevf_cmd_send(&hdev
->hw
, &desc
, 1);
62 dev_err(&hdev
->pdev
->dev
,
63 "Query tqp stat fail, status = %d,queue = %d\n",
67 tqp
->tqp_stats
.rcb_tx_ring_pktnum_rcd
+=
68 le32_to_cpu(desc
.data
[1]);
74 static u64
*hclgevf_tqps_get_stats(struct hnae3_handle
*handle
, u64
*data
)
76 struct hnae3_knic_private_info
*kinfo
= &handle
->kinfo
;
77 struct hclgevf_dev
*hdev
= hclgevf_ae_get_hdev(handle
);
78 struct hclgevf_tqp
*tqp
;
82 for (i
= 0; i
< hdev
->num_tqps
; i
++) {
83 tqp
= container_of(handle
->kinfo
.tqp
[i
], struct hclgevf_tqp
, q
);
84 *buff
++ = tqp
->tqp_stats
.rcb_tx_ring_pktnum_rcd
;
86 for (i
= 0; i
< kinfo
->num_tqps
; i
++) {
87 tqp
= container_of(handle
->kinfo
.tqp
[i
], struct hclgevf_tqp
, q
);
88 *buff
++ = tqp
->tqp_stats
.rcb_rx_ring_pktnum_rcd
;
94 static int hclgevf_tqps_get_sset_count(struct hnae3_handle
*handle
, int strset
)
96 struct hclgevf_dev
*hdev
= hclgevf_ae_get_hdev(handle
);
98 return hdev
->num_tqps
* 2;
101 static u8
*hclgevf_tqps_get_strings(struct hnae3_handle
*handle
, u8
*data
)
103 struct hclgevf_dev
*hdev
= hclgevf_ae_get_hdev(handle
);
107 for (i
= 0; i
< hdev
->num_tqps
; i
++) {
108 struct hclgevf_tqp
*tqp
= container_of(handle
->kinfo
.tqp
[i
],
109 struct hclgevf_tqp
, q
);
110 snprintf(buff
, ETH_GSTRING_LEN
, "txq#%d_pktnum_rcd",
112 buff
+= ETH_GSTRING_LEN
;
115 for (i
= 0; i
< hdev
->num_tqps
; i
++) {
116 struct hclgevf_tqp
*tqp
= container_of(handle
->kinfo
.tqp
[i
],
117 struct hclgevf_tqp
, q
);
118 snprintf(buff
, ETH_GSTRING_LEN
, "rxq#%d_pktnum_rcd",
120 buff
+= ETH_GSTRING_LEN
;
126 static void hclgevf_update_stats(struct hnae3_handle
*handle
,
127 struct net_device_stats
*net_stats
)
129 struct hclgevf_dev
*hdev
= hclgevf_ae_get_hdev(handle
);
132 status
= hclgevf_tqps_update_stats(handle
);
134 dev_err(&hdev
->pdev
->dev
,
135 "VF update of TQPS stats fail, status = %d.\n",
139 static int hclgevf_get_sset_count(struct hnae3_handle
*handle
, int strset
)
141 if (strset
== ETH_SS_TEST
)
143 else if (strset
== ETH_SS_STATS
)
144 return hclgevf_tqps_get_sset_count(handle
, strset
);
149 static void hclgevf_get_strings(struct hnae3_handle
*handle
, u32 strset
,
152 u8
*p
= (char *)data
;
154 if (strset
== ETH_SS_STATS
)
155 p
= hclgevf_tqps_get_strings(handle
, p
);
158 static void hclgevf_get_stats(struct hnae3_handle
*handle
, u64
*data
)
160 hclgevf_tqps_get_stats(handle
, data
);
163 static int hclgevf_get_tc_info(struct hclgevf_dev
*hdev
)
168 status
= hclgevf_send_mbx_msg(hdev
, HCLGE_MBX_GET_TCINFO
, 0, NULL
, 0,
169 true, &resp_msg
, sizeof(u8
));
171 dev_err(&hdev
->pdev
->dev
,
172 "VF request to get TC info from PF failed %d",
177 hdev
->hw_tc_map
= resp_msg
;
182 static int hclge_get_queue_info(struct hclgevf_dev
*hdev
)
184 #define HCLGEVF_TQPS_RSS_INFO_LEN 8
185 u8 resp_msg
[HCLGEVF_TQPS_RSS_INFO_LEN
];
188 status
= hclgevf_send_mbx_msg(hdev
, HCLGE_MBX_GET_QINFO
, 0, NULL
, 0,
190 HCLGEVF_TQPS_RSS_INFO_LEN
);
192 dev_err(&hdev
->pdev
->dev
,
193 "VF request to get tqp info from PF failed %d",
198 memcpy(&hdev
->num_tqps
, &resp_msg
[0], sizeof(u16
));
199 memcpy(&hdev
->rss_size_max
, &resp_msg
[2], sizeof(u16
));
200 memcpy(&hdev
->num_desc
, &resp_msg
[4], sizeof(u16
));
201 memcpy(&hdev
->rx_buf_len
, &resp_msg
[6], sizeof(u16
));
206 static int hclgevf_alloc_tqps(struct hclgevf_dev
*hdev
)
208 struct hclgevf_tqp
*tqp
;
211 hdev
->htqp
= devm_kcalloc(&hdev
->pdev
->dev
, hdev
->num_tqps
,
212 sizeof(struct hclgevf_tqp
), GFP_KERNEL
);
218 for (i
= 0; i
< hdev
->num_tqps
; i
++) {
219 tqp
->dev
= &hdev
->pdev
->dev
;
222 tqp
->q
.ae_algo
= &ae_algovf
;
223 tqp
->q
.buf_size
= hdev
->rx_buf_len
;
224 tqp
->q
.desc_num
= hdev
->num_desc
;
225 tqp
->q
.io_base
= hdev
->hw
.io_base
+ HCLGEVF_TQP_REG_OFFSET
+
226 i
* HCLGEVF_TQP_REG_SIZE
;
234 static int hclgevf_knic_setup(struct hclgevf_dev
*hdev
)
236 struct hnae3_handle
*nic
= &hdev
->nic
;
237 struct hnae3_knic_private_info
*kinfo
;
238 u16 new_tqps
= hdev
->num_tqps
;
243 kinfo
->num_desc
= hdev
->num_desc
;
244 kinfo
->rx_buf_len
= hdev
->rx_buf_len
;
245 for (i
= 0; i
< HCLGEVF_MAX_TC_NUM
; i
++)
246 if (hdev
->hw_tc_map
& BIT(i
))
250 = min_t(u16
, hdev
->rss_size_max
, new_tqps
/ kinfo
->num_tc
);
251 new_tqps
= kinfo
->rss_size
* kinfo
->num_tc
;
252 kinfo
->num_tqps
= min(new_tqps
, hdev
->num_tqps
);
254 kinfo
->tqp
= devm_kcalloc(&hdev
->pdev
->dev
, kinfo
->num_tqps
,
255 sizeof(struct hnae3_queue
*), GFP_KERNEL
);
259 for (i
= 0; i
< kinfo
->num_tqps
; i
++) {
260 hdev
->htqp
[i
].q
.handle
= &hdev
->nic
;
261 hdev
->htqp
[i
].q
.tqp_index
= i
;
262 kinfo
->tqp
[i
] = &hdev
->htqp
[i
].q
;
268 static void hclgevf_request_link_info(struct hclgevf_dev
*hdev
)
273 status
= hclgevf_send_mbx_msg(hdev
, HCLGE_MBX_GET_LINK_STATUS
, 0, NULL
,
274 0, false, &resp_msg
, sizeof(u8
));
276 dev_err(&hdev
->pdev
->dev
,
277 "VF failed to fetch link status(%d) from PF", status
);
280 void hclgevf_update_link_status(struct hclgevf_dev
*hdev
, int link_state
)
282 struct hnae3_handle
*handle
= &hdev
->nic
;
283 struct hnae3_client
*client
;
285 client
= handle
->client
;
287 if (link_state
!= hdev
->hw
.mac
.link
) {
288 client
->ops
->link_status_change(handle
, !!link_state
);
289 hdev
->hw
.mac
.link
= link_state
;
293 static int hclgevf_set_handle_info(struct hclgevf_dev
*hdev
)
295 struct hnae3_handle
*nic
= &hdev
->nic
;
298 nic
->ae_algo
= &ae_algovf
;
299 nic
->pdev
= hdev
->pdev
;
300 nic
->numa_node_mask
= hdev
->numa_node_mask
;
301 nic
->flags
|= HNAE3_SUPPORT_VF
;
303 if (hdev
->ae_dev
->dev_type
!= HNAE3_DEV_KNIC
) {
304 dev_err(&hdev
->pdev
->dev
, "unsupported device type %d\n",
305 hdev
->ae_dev
->dev_type
);
309 ret
= hclgevf_knic_setup(hdev
);
311 dev_err(&hdev
->pdev
->dev
, "VF knic setup failed %d\n",
316 static void hclgevf_free_vector(struct hclgevf_dev
*hdev
, int vector_id
)
318 hdev
->vector_status
[vector_id
] = HCLGEVF_INVALID_VPORT
;
319 hdev
->num_msi_left
+= 1;
320 hdev
->num_msi_used
-= 1;
323 static int hclgevf_get_vector(struct hnae3_handle
*handle
, u16 vector_num
,
324 struct hnae3_vector_info
*vector_info
)
326 struct hclgevf_dev
*hdev
= hclgevf_ae_get_hdev(handle
);
327 struct hnae3_vector_info
*vector
= vector_info
;
331 vector_num
= min(hdev
->num_msi_left
, vector_num
);
333 for (j
= 0; j
< vector_num
; j
++) {
334 for (i
= HCLGEVF_MISC_VECTOR_NUM
+ 1; i
< hdev
->num_msi
; i
++) {
335 if (hdev
->vector_status
[i
] == HCLGEVF_INVALID_VPORT
) {
336 vector
->vector
= pci_irq_vector(hdev
->pdev
, i
);
337 vector
->io_addr
= hdev
->hw
.io_base
+
338 HCLGEVF_VECTOR_REG_BASE
+
339 (i
- 1) * HCLGEVF_VECTOR_REG_OFFSET
;
340 hdev
->vector_status
[i
] = 0;
341 hdev
->vector_irq
[i
] = vector
->vector
;
350 hdev
->num_msi_left
-= alloc
;
351 hdev
->num_msi_used
+= alloc
;
356 static int hclgevf_get_vector_index(struct hclgevf_dev
*hdev
, int vector
)
360 for (i
= 0; i
< hdev
->num_msi
; i
++)
361 if (vector
== hdev
->vector_irq
[i
])
367 static u32
hclgevf_get_rss_key_size(struct hnae3_handle
*handle
)
369 return HCLGEVF_RSS_KEY_SIZE
;
372 static u32
hclgevf_get_rss_indir_size(struct hnae3_handle
*handle
)
374 return HCLGEVF_RSS_IND_TBL_SIZE
;
377 static int hclgevf_set_rss_indir_table(struct hclgevf_dev
*hdev
)
379 const u8
*indir
= hdev
->rss_cfg
.rss_indirection_tbl
;
380 struct hclgevf_rss_indirection_table_cmd
*req
;
381 struct hclgevf_desc desc
;
385 req
= (struct hclgevf_rss_indirection_table_cmd
*)desc
.data
;
387 for (i
= 0; i
< HCLGEVF_RSS_CFG_TBL_NUM
; i
++) {
388 hclgevf_cmd_setup_basic_desc(&desc
, HCLGEVF_OPC_RSS_INDIR_TABLE
,
390 req
->start_table_index
= i
* HCLGEVF_RSS_CFG_TBL_SIZE
;
391 req
->rss_set_bitmap
= HCLGEVF_RSS_SET_BITMAP_MSK
;
392 for (j
= 0; j
< HCLGEVF_RSS_CFG_TBL_SIZE
; j
++)
394 indir
[i
* HCLGEVF_RSS_CFG_TBL_SIZE
+ j
];
396 status
= hclgevf_cmd_send(&hdev
->hw
, &desc
, 1);
398 dev_err(&hdev
->pdev
->dev
,
399 "VF failed(=%d) to set RSS indirection table\n",
408 static int hclgevf_set_rss_tc_mode(struct hclgevf_dev
*hdev
, u16 rss_size
)
410 struct hclgevf_rss_tc_mode_cmd
*req
;
411 u16 tc_offset
[HCLGEVF_MAX_TC_NUM
];
412 u16 tc_valid
[HCLGEVF_MAX_TC_NUM
];
413 u16 tc_size
[HCLGEVF_MAX_TC_NUM
];
414 struct hclgevf_desc desc
;
419 req
= (struct hclgevf_rss_tc_mode_cmd
*)desc
.data
;
421 roundup_size
= roundup_pow_of_two(rss_size
);
422 roundup_size
= ilog2(roundup_size
);
424 for (i
= 0; i
< HCLGEVF_MAX_TC_NUM
; i
++) {
425 tc_valid
[i
] = !!(hdev
->hw_tc_map
& BIT(i
));
426 tc_size
[i
] = roundup_size
;
427 tc_offset
[i
] = rss_size
* i
;
430 hclgevf_cmd_setup_basic_desc(&desc
, HCLGEVF_OPC_RSS_TC_MODE
, false);
431 for (i
= 0; i
< HCLGEVF_MAX_TC_NUM
; i
++) {
432 hnae_set_bit(req
->rss_tc_mode
[i
], HCLGEVF_RSS_TC_VALID_B
,
433 (tc_valid
[i
] & 0x1));
434 hnae_set_field(req
->rss_tc_mode
[i
], HCLGEVF_RSS_TC_SIZE_M
,
435 HCLGEVF_RSS_TC_SIZE_S
, tc_size
[i
]);
436 hnae_set_field(req
->rss_tc_mode
[i
], HCLGEVF_RSS_TC_OFFSET_M
,
437 HCLGEVF_RSS_TC_OFFSET_S
, tc_offset
[i
]);
439 status
= hclgevf_cmd_send(&hdev
->hw
, &desc
, 1);
441 dev_err(&hdev
->pdev
->dev
,
442 "VF failed(=%d) to set rss tc mode\n", status
);
447 static int hclgevf_get_rss_hw_cfg(struct hnae3_handle
*handle
, u8
*hash
,
450 struct hclgevf_dev
*hdev
= hclgevf_ae_get_hdev(handle
);
451 struct hclgevf_rss_config_cmd
*req
;
452 int lkup_times
= key
? 3 : 1;
453 struct hclgevf_desc desc
;
458 req
= (struct hclgevf_rss_config_cmd
*)desc
.data
;
459 lkup_times
= (lkup_times
== 3) ? 3 : ((hash
) ? 1 : 0);
461 for (key_offset
= 0; key_offset
< lkup_times
; key_offset
++) {
462 hclgevf_cmd_setup_basic_desc(&desc
,
463 HCLGEVF_OPC_RSS_GENERIC_CONFIG
,
465 req
->hash_config
|= (key_offset
<< HCLGEVF_RSS_HASH_KEY_OFFSET
);
467 status
= hclgevf_cmd_send(&hdev
->hw
, &desc
, 1);
469 dev_err(&hdev
->pdev
->dev
,
470 "failed to get hardware RSS cfg, status = %d\n",
477 HCLGEVF_RSS_KEY_SIZE
- HCLGEVF_RSS_HASH_KEY_NUM
* 2;
479 key_size
= HCLGEVF_RSS_HASH_KEY_NUM
;
482 memcpy(key
+ key_offset
* HCLGEVF_RSS_HASH_KEY_NUM
,
488 if ((req
->hash_config
& 0xf) == HCLGEVF_RSS_HASH_ALGO_TOEPLITZ
)
489 *hash
= ETH_RSS_HASH_TOP
;
491 *hash
= ETH_RSS_HASH_UNKNOWN
;
497 static int hclgevf_get_rss(struct hnae3_handle
*handle
, u32
*indir
, u8
*key
,
500 struct hclgevf_dev
*hdev
= hclgevf_ae_get_hdev(handle
);
501 struct hclgevf_rss_cfg
*rss_cfg
= &hdev
->rss_cfg
;
505 for (i
= 0; i
< HCLGEVF_RSS_IND_TBL_SIZE
; i
++)
506 indir
[i
] = rss_cfg
->rss_indirection_tbl
[i
];
508 return hclgevf_get_rss_hw_cfg(handle
, hfunc
, key
);
511 static int hclgevf_set_rss(struct hnae3_handle
*handle
, const u32
*indir
,
512 const u8
*key
, const u8 hfunc
)
514 struct hclgevf_dev
*hdev
= hclgevf_ae_get_hdev(handle
);
515 struct hclgevf_rss_cfg
*rss_cfg
= &hdev
->rss_cfg
;
518 /* update the shadow RSS table with user specified qids */
519 for (i
= 0; i
< HCLGEVF_RSS_IND_TBL_SIZE
; i
++)
520 rss_cfg
->rss_indirection_tbl
[i
] = indir
[i
];
522 /* update the hardware */
523 return hclgevf_set_rss_indir_table(hdev
);
526 static int hclgevf_get_tc_size(struct hnae3_handle
*handle
)
528 struct hclgevf_dev
*hdev
= hclgevf_ae_get_hdev(handle
);
529 struct hclgevf_rss_cfg
*rss_cfg
= &hdev
->rss_cfg
;
531 return rss_cfg
->rss_size
;
534 static int hclgevf_bind_ring_to_vector(struct hnae3_handle
*handle
, bool en
,
536 struct hnae3_ring_chain_node
*ring_chain
)
538 #define HCLGEVF_RING_NODE_VARIABLE_NUM 3
539 #define HCLGEVF_RING_MAP_MBX_BASIC_MSG_NUM 3
540 struct hclgevf_dev
*hdev
= hclgevf_ae_get_hdev(handle
);
541 struct hnae3_ring_chain_node
*node
;
542 struct hclge_mbx_vf_to_pf_cmd
*req
;
543 struct hclgevf_desc desc
;
548 req
= (struct hclge_mbx_vf_to_pf_cmd
*)desc
.data
;
549 vector_id
= hclgevf_get_vector_index(hdev
, vector
);
551 dev_err(&handle
->pdev
->dev
,
552 "Get vector index fail. ret =%d\n", vector_id
);
556 hclgevf_cmd_setup_basic_desc(&desc
, HCLGEVF_OPC_MBX_VF_TO_PF
, false);
558 HCLGE_MBX_MAP_RING_TO_VECTOR
: HCLGE_MBX_UNMAP_RING_TO_VECTOR
;
560 req
->msg
[1] = vector_id
; /* vector_id should be id in VF */
563 for (node
= ring_chain
; node
; node
= node
->next
) {
565 /* msg[2] is cause num */
566 req
->msg
[HCLGEVF_RING_NODE_VARIABLE_NUM
* i
] =
567 hnae_get_bit(node
->flag
, HNAE3_RING_TYPE_B
);
568 req
->msg
[HCLGEVF_RING_NODE_VARIABLE_NUM
* i
+ 1] =
570 req
->msg
[HCLGEVF_RING_NODE_VARIABLE_NUM
* i
+ 2] =
571 hnae_get_field(node
->int_gl_idx
,
573 HNAE3_RING_GL_IDX_S
);
575 if (i
== (HCLGE_MBX_VF_MSG_DATA_NUM
-
576 HCLGEVF_RING_MAP_MBX_BASIC_MSG_NUM
) /
577 HCLGEVF_RING_NODE_VARIABLE_NUM
) {
580 status
= hclgevf_cmd_send(&hdev
->hw
, &desc
, 1);
582 dev_err(&hdev
->pdev
->dev
,
583 "Map TQP fail, status is %d.\n",
588 hclgevf_cmd_setup_basic_desc(&desc
,
589 HCLGEVF_OPC_MBX_VF_TO_PF
,
592 req
->msg
[1] = vector_id
;
599 status
= hclgevf_cmd_send(&hdev
->hw
, &desc
, 1);
601 dev_err(&hdev
->pdev
->dev
,
602 "Map TQP fail, status is %d.\n", status
);
610 static int hclgevf_map_ring_to_vector(struct hnae3_handle
*handle
, int vector
,
611 struct hnae3_ring_chain_node
*ring_chain
)
613 return hclgevf_bind_ring_to_vector(handle
, true, vector
, ring_chain
);
616 static int hclgevf_unmap_ring_from_vector(
617 struct hnae3_handle
*handle
,
619 struct hnae3_ring_chain_node
*ring_chain
)
621 struct hclgevf_dev
*hdev
= hclgevf_ae_get_hdev(handle
);
624 vector_id
= hclgevf_get_vector_index(hdev
, vector
);
626 dev_err(&handle
->pdev
->dev
,
627 "Get vector index fail. ret =%d\n", vector_id
);
631 ret
= hclgevf_bind_ring_to_vector(handle
, false, vector
, ring_chain
);
633 dev_err(&handle
->pdev
->dev
,
634 "Unmap ring from vector fail. vector=%d, ret =%d\n",
641 static int hclgevf_put_vector(struct hnae3_handle
*handle
, int vector
)
643 struct hclgevf_dev
*hdev
= hclgevf_ae_get_hdev(handle
);
645 hclgevf_free_vector(hdev
, vector
);
650 static int hclgevf_cmd_set_promisc_mode(struct hclgevf_dev
*hdev
, u32 en
)
652 struct hclge_mbx_vf_to_pf_cmd
*req
;
653 struct hclgevf_desc desc
;
656 req
= (struct hclge_mbx_vf_to_pf_cmd
*)desc
.data
;
658 hclgevf_cmd_setup_basic_desc(&desc
, HCLGEVF_OPC_MBX_VF_TO_PF
, false);
659 req
->msg
[0] = HCLGE_MBX_SET_PROMISC_MODE
;
662 status
= hclgevf_cmd_send(&hdev
->hw
, &desc
, 1);
664 dev_err(&hdev
->pdev
->dev
,
665 "Set promisc mode fail, status is %d.\n", status
);
670 static void hclgevf_set_promisc_mode(struct hnae3_handle
*handle
, u32 en
)
672 struct hclgevf_dev
*hdev
= hclgevf_ae_get_hdev(handle
);
674 hclgevf_cmd_set_promisc_mode(hdev
, en
);
677 static int hclgevf_tqp_enable(struct hclgevf_dev
*hdev
, int tqp_id
,
678 int stream_id
, bool enable
)
680 struct hclgevf_cfg_com_tqp_queue_cmd
*req
;
681 struct hclgevf_desc desc
;
684 req
= (struct hclgevf_cfg_com_tqp_queue_cmd
*)desc
.data
;
686 hclgevf_cmd_setup_basic_desc(&desc
, HCLGEVF_OPC_CFG_COM_TQP_QUEUE
,
688 req
->tqp_id
= cpu_to_le16(tqp_id
& HCLGEVF_RING_ID_MASK
);
689 req
->stream_id
= cpu_to_le16(stream_id
);
690 req
->enable
|= enable
<< HCLGEVF_TQP_ENABLE_B
;
692 status
= hclgevf_cmd_send(&hdev
->hw
, &desc
, 1);
694 dev_err(&hdev
->pdev
->dev
,
695 "TQP enable fail, status =%d.\n", status
);
700 static int hclgevf_get_queue_id(struct hnae3_queue
*queue
)
702 struct hclgevf_tqp
*tqp
= container_of(queue
, struct hclgevf_tqp
, q
);
707 static void hclgevf_reset_tqp_stats(struct hnae3_handle
*handle
)
709 struct hclgevf_dev
*hdev
= hclgevf_ae_get_hdev(handle
);
710 struct hnae3_queue
*queue
;
711 struct hclgevf_tqp
*tqp
;
714 for (i
= 0; i
< hdev
->num_tqps
; i
++) {
715 queue
= handle
->kinfo
.tqp
[i
];
716 tqp
= container_of(queue
, struct hclgevf_tqp
, q
);
717 memset(&tqp
->tqp_stats
, 0, sizeof(tqp
->tqp_stats
));
721 static int hclgevf_cfg_func_mta_filter(struct hnae3_handle
*handle
, bool en
)
723 struct hclgevf_dev
*hdev
= hclgevf_ae_get_hdev(handle
);
727 return hclgevf_send_mbx_msg(hdev
, HCLGE_MBX_SET_MULTICAST
,
728 HCLGE_MBX_MAC_VLAN_MC_FUNC_MTA_ENABLE
,
729 msg
, 1, false, NULL
, 0);
732 static void hclgevf_get_mac_addr(struct hnae3_handle
*handle
, u8
*p
)
734 struct hclgevf_dev
*hdev
= hclgevf_ae_get_hdev(handle
);
736 ether_addr_copy(p
, hdev
->hw
.mac
.mac_addr
);
739 static int hclgevf_set_mac_addr(struct hnae3_handle
*handle
, void *p
)
741 struct hclgevf_dev
*hdev
= hclgevf_ae_get_hdev(handle
);
742 u8
*old_mac_addr
= (u8
*)hdev
->hw
.mac
.mac_addr
;
743 u8
*new_mac_addr
= (u8
*)p
;
744 u8 msg_data
[ETH_ALEN
* 2];
747 ether_addr_copy(msg_data
, new_mac_addr
);
748 ether_addr_copy(&msg_data
[ETH_ALEN
], old_mac_addr
);
750 status
= hclgevf_send_mbx_msg(hdev
, HCLGE_MBX_SET_UNICAST
,
751 HCLGE_MBX_MAC_VLAN_UC_MODIFY
,
752 msg_data
, ETH_ALEN
* 2,
755 ether_addr_copy(hdev
->hw
.mac
.mac_addr
, new_mac_addr
);
760 static int hclgevf_add_uc_addr(struct hnae3_handle
*handle
,
761 const unsigned char *addr
)
763 struct hclgevf_dev
*hdev
= hclgevf_ae_get_hdev(handle
);
765 return hclgevf_send_mbx_msg(hdev
, HCLGE_MBX_SET_UNICAST
,
766 HCLGE_MBX_MAC_VLAN_UC_ADD
,
767 addr
, ETH_ALEN
, false, NULL
, 0);
770 static int hclgevf_rm_uc_addr(struct hnae3_handle
*handle
,
771 const unsigned char *addr
)
773 struct hclgevf_dev
*hdev
= hclgevf_ae_get_hdev(handle
);
775 return hclgevf_send_mbx_msg(hdev
, HCLGE_MBX_SET_UNICAST
,
776 HCLGE_MBX_MAC_VLAN_UC_REMOVE
,
777 addr
, ETH_ALEN
, false, NULL
, 0);
780 static int hclgevf_add_mc_addr(struct hnae3_handle
*handle
,
781 const unsigned char *addr
)
783 struct hclgevf_dev
*hdev
= hclgevf_ae_get_hdev(handle
);
785 return hclgevf_send_mbx_msg(hdev
, HCLGE_MBX_SET_MULTICAST
,
786 HCLGE_MBX_MAC_VLAN_MC_ADD
,
787 addr
, ETH_ALEN
, false, NULL
, 0);
790 static int hclgevf_rm_mc_addr(struct hnae3_handle
*handle
,
791 const unsigned char *addr
)
793 struct hclgevf_dev
*hdev
= hclgevf_ae_get_hdev(handle
);
795 return hclgevf_send_mbx_msg(hdev
, HCLGE_MBX_SET_MULTICAST
,
796 HCLGE_MBX_MAC_VLAN_MC_REMOVE
,
797 addr
, ETH_ALEN
, false, NULL
, 0);
800 static int hclgevf_set_vlan_filter(struct hnae3_handle
*handle
,
801 __be16 proto
, u16 vlan_id
,
804 #define HCLGEVF_VLAN_MBX_MSG_LEN 5
805 struct hclgevf_dev
*hdev
= hclgevf_ae_get_hdev(handle
);
806 u8 msg_data
[HCLGEVF_VLAN_MBX_MSG_LEN
];
811 if (proto
!= htons(ETH_P_8021Q
))
812 return -EPROTONOSUPPORT
;
814 msg_data
[0] = is_kill
;
815 memcpy(&msg_data
[1], &vlan_id
, sizeof(vlan_id
));
816 memcpy(&msg_data
[3], &proto
, sizeof(proto
));
817 return hclgevf_send_mbx_msg(hdev
, HCLGE_MBX_SET_VLAN
,
818 HCLGE_MBX_VLAN_FILTER
, msg_data
,
819 HCLGEVF_VLAN_MBX_MSG_LEN
, false, NULL
, 0);
822 static void hclgevf_reset_tqp(struct hnae3_handle
*handle
, u16 queue_id
)
824 struct hclgevf_dev
*hdev
= hclgevf_ae_get_hdev(handle
);
827 memcpy(&msg_data
[0], &queue_id
, sizeof(queue_id
));
829 hclgevf_send_mbx_msg(hdev
, HCLGE_MBX_QUEUE_RESET
, 0, msg_data
, 2, false,
833 static u32
hclgevf_get_fw_version(struct hnae3_handle
*handle
)
835 struct hclgevf_dev
*hdev
= hclgevf_ae_get_hdev(handle
);
837 return hdev
->fw_version
;
840 static void hclgevf_get_misc_vector(struct hclgevf_dev
*hdev
)
842 struct hclgevf_misc_vector
*vector
= &hdev
->misc_vector
;
844 vector
->vector_irq
= pci_irq_vector(hdev
->pdev
,
845 HCLGEVF_MISC_VECTOR_NUM
);
846 vector
->addr
= hdev
->hw
.io_base
+ HCLGEVF_MISC_VECTOR_REG_BASE
;
847 /* vector status always valid for Vector 0 */
848 hdev
->vector_status
[HCLGEVF_MISC_VECTOR_NUM
] = 0;
849 hdev
->vector_irq
[HCLGEVF_MISC_VECTOR_NUM
] = vector
->vector_irq
;
851 hdev
->num_msi_left
-= 1;
852 hdev
->num_msi_used
+= 1;
855 static void hclgevf_mbx_task_schedule(struct hclgevf_dev
*hdev
)
857 if (!test_and_set_bit(HCLGEVF_STATE_MBX_SERVICE_SCHED
, &hdev
->state
))
858 schedule_work(&hdev
->mbx_service_task
);
861 static void hclgevf_task_schedule(struct hclgevf_dev
*hdev
)
863 if (!test_bit(HCLGEVF_STATE_DOWN
, &hdev
->state
) &&
864 !test_and_set_bit(HCLGEVF_STATE_SERVICE_SCHED
, &hdev
->state
))
865 schedule_work(&hdev
->service_task
);
868 static void hclgevf_service_timer(struct timer_list
*t
)
870 struct hclgevf_dev
*hdev
= from_timer(hdev
, t
, service_timer
);
872 mod_timer(&hdev
->service_timer
, jiffies
+ 5 * HZ
);
874 hclgevf_task_schedule(hdev
);
877 static void hclgevf_mailbox_service_task(struct work_struct
*work
)
879 struct hclgevf_dev
*hdev
;
881 hdev
= container_of(work
, struct hclgevf_dev
, mbx_service_task
);
883 if (test_and_set_bit(HCLGEVF_STATE_MBX_HANDLING
, &hdev
->state
))
886 clear_bit(HCLGEVF_STATE_MBX_SERVICE_SCHED
, &hdev
->state
);
888 hclgevf_mbx_handler(hdev
);
890 clear_bit(HCLGEVF_STATE_MBX_HANDLING
, &hdev
->state
);
893 static void hclgevf_service_task(struct work_struct
*work
)
895 struct hclgevf_dev
*hdev
;
897 hdev
= container_of(work
, struct hclgevf_dev
, service_task
);
899 /* request the link status from the PF. PF would be able to tell VF
900 * about such updates in future so we might remove this later
902 hclgevf_request_link_info(hdev
);
904 clear_bit(HCLGEVF_STATE_SERVICE_SCHED
, &hdev
->state
);
907 static void hclgevf_clear_event_cause(struct hclgevf_dev
*hdev
, u32 regclr
)
909 hclgevf_write_dev(&hdev
->hw
, HCLGEVF_VECTOR0_CMDQ_SRC_REG
, regclr
);
912 static bool hclgevf_check_event_cause(struct hclgevf_dev
*hdev
, u32
*clearval
)
916 /* fetch the events from their corresponding regs */
917 cmdq_src_reg
= hclgevf_read_dev(&hdev
->hw
,
918 HCLGEVF_VECTOR0_CMDQ_SRC_REG
);
920 /* check for vector0 mailbox(=CMDQ RX) event source */
921 if (BIT(HCLGEVF_VECTOR0_RX_CMDQ_INT_B
) & cmdq_src_reg
) {
922 cmdq_src_reg
&= ~BIT(HCLGEVF_VECTOR0_RX_CMDQ_INT_B
);
923 *clearval
= cmdq_src_reg
;
927 dev_dbg(&hdev
->pdev
->dev
, "vector 0 interrupt from unknown source\n");
932 static void hclgevf_enable_vector(struct hclgevf_misc_vector
*vector
, bool en
)
934 writel(en
? 1 : 0, vector
->addr
);
937 static irqreturn_t
hclgevf_misc_irq_handle(int irq
, void *data
)
939 struct hclgevf_dev
*hdev
= data
;
942 hclgevf_enable_vector(&hdev
->misc_vector
, false);
943 if (!hclgevf_check_event_cause(hdev
, &clearval
))
946 /* schedule the VF mailbox service task, if not already scheduled */
947 hclgevf_mbx_task_schedule(hdev
);
949 hclgevf_clear_event_cause(hdev
, clearval
);
952 hclgevf_enable_vector(&hdev
->misc_vector
, true);
957 static int hclgevf_configure(struct hclgevf_dev
*hdev
)
961 /* get queue configuration from PF */
962 ret
= hclge_get_queue_info(hdev
);
965 /* get tc configuration from PF */
966 return hclgevf_get_tc_info(hdev
);
969 static int hclgevf_init_roce_base_info(struct hclgevf_dev
*hdev
)
971 struct hnae3_handle
*roce
= &hdev
->roce
;
972 struct hnae3_handle
*nic
= &hdev
->nic
;
974 roce
->rinfo
.num_vectors
= HCLGEVF_ROCEE_VECTOR_NUM
;
976 if (hdev
->num_msi_left
< roce
->rinfo
.num_vectors
||
977 hdev
->num_msi_left
== 0)
980 roce
->rinfo
.base_vector
=
981 hdev
->vector_status
[hdev
->num_msi_used
];
983 roce
->rinfo
.netdev
= nic
->kinfo
.netdev
;
984 roce
->rinfo
.roce_io_base
= hdev
->hw
.io_base
;
986 roce
->pdev
= nic
->pdev
;
987 roce
->ae_algo
= nic
->ae_algo
;
988 roce
->numa_node_mask
= nic
->numa_node_mask
;
993 static int hclgevf_rss_init_hw(struct hclgevf_dev
*hdev
)
995 struct hclgevf_rss_cfg
*rss_cfg
= &hdev
->rss_cfg
;
998 rss_cfg
->rss_size
= hdev
->rss_size_max
;
1000 /* Initialize RSS indirect table for each vport */
1001 for (i
= 0; i
< HCLGEVF_RSS_IND_TBL_SIZE
; i
++)
1002 rss_cfg
->rss_indirection_tbl
[i
] = i
% hdev
->rss_size_max
;
1004 ret
= hclgevf_set_rss_indir_table(hdev
);
1008 return hclgevf_set_rss_tc_mode(hdev
, hdev
->rss_size_max
);
1011 static int hclgevf_init_vlan_config(struct hclgevf_dev
*hdev
)
1013 /* other vlan config(like, VLAN TX/RX offload) would also be added
1016 return hclgevf_set_vlan_filter(&hdev
->nic
, htons(ETH_P_8021Q
), 0,
1020 static int hclgevf_ae_start(struct hnae3_handle
*handle
)
1022 struct hclgevf_dev
*hdev
= hclgevf_ae_get_hdev(handle
);
1025 for (i
= 0; i
< handle
->kinfo
.num_tqps
; i
++) {
1027 queue_id
= hclgevf_get_queue_id(handle
->kinfo
.tqp
[i
]);
1029 dev_warn(&hdev
->pdev
->dev
,
1030 "Get invalid queue id, ignore it\n");
1034 hclgevf_tqp_enable(hdev
, queue_id
, 0, true);
1037 /* reset tqp stats */
1038 hclgevf_reset_tqp_stats(handle
);
1040 hclgevf_request_link_info(hdev
);
1042 clear_bit(HCLGEVF_STATE_DOWN
, &hdev
->state
);
1043 mod_timer(&hdev
->service_timer
, jiffies
+ HZ
);
1048 static void hclgevf_ae_stop(struct hnae3_handle
*handle
)
1050 struct hclgevf_dev
*hdev
= hclgevf_ae_get_hdev(handle
);
1053 for (i
= 0; i
< hdev
->num_tqps
; i
++) {
1055 queue_id
= hclgevf_get_queue_id(handle
->kinfo
.tqp
[i
]);
1057 dev_warn(&hdev
->pdev
->dev
,
1058 "Get invalid queue id, ignore it\n");
1062 hclgevf_tqp_enable(hdev
, queue_id
, 0, false);
1065 /* reset tqp stats */
1066 hclgevf_reset_tqp_stats(handle
);
1069 static void hclgevf_state_init(struct hclgevf_dev
*hdev
)
1071 /* setup tasks for the MBX */
1072 INIT_WORK(&hdev
->mbx_service_task
, hclgevf_mailbox_service_task
);
1073 clear_bit(HCLGEVF_STATE_MBX_SERVICE_SCHED
, &hdev
->state
);
1074 clear_bit(HCLGEVF_STATE_MBX_HANDLING
, &hdev
->state
);
1076 /* setup tasks for service timer */
1077 timer_setup(&hdev
->service_timer
, hclgevf_service_timer
, 0);
1079 INIT_WORK(&hdev
->service_task
, hclgevf_service_task
);
1080 clear_bit(HCLGEVF_STATE_SERVICE_SCHED
, &hdev
->state
);
1082 mutex_init(&hdev
->mbx_resp
.mbx_mutex
);
1084 /* bring the device down */
1085 set_bit(HCLGEVF_STATE_DOWN
, &hdev
->state
);
1088 static void hclgevf_state_uninit(struct hclgevf_dev
*hdev
)
1090 set_bit(HCLGEVF_STATE_DOWN
, &hdev
->state
);
1092 if (hdev
->service_timer
.function
)
1093 del_timer_sync(&hdev
->service_timer
);
1094 if (hdev
->service_task
.func
)
1095 cancel_work_sync(&hdev
->service_task
);
1096 if (hdev
->mbx_service_task
.func
)
1097 cancel_work_sync(&hdev
->mbx_service_task
);
1099 mutex_destroy(&hdev
->mbx_resp
.mbx_mutex
);
1102 static int hclgevf_init_msi(struct hclgevf_dev
*hdev
)
1104 struct pci_dev
*pdev
= hdev
->pdev
;
1108 hdev
->num_msi
= HCLGEVF_MAX_VF_VECTOR_NUM
;
1110 vectors
= pci_alloc_irq_vectors(pdev
, 1, hdev
->num_msi
,
1111 PCI_IRQ_MSI
| PCI_IRQ_MSIX
);
1114 "failed(%d) to allocate MSI/MSI-X vectors\n",
1118 if (vectors
< hdev
->num_msi
)
1119 dev_warn(&hdev
->pdev
->dev
,
1120 "requested %d MSI/MSI-X, but allocated %d MSI/MSI-X\n",
1121 hdev
->num_msi
, vectors
);
1123 hdev
->num_msi
= vectors
;
1124 hdev
->num_msi_left
= vectors
;
1125 hdev
->base_msi_vector
= pdev
->irq
;
1127 hdev
->vector_status
= devm_kcalloc(&pdev
->dev
, hdev
->num_msi
,
1128 sizeof(u16
), GFP_KERNEL
);
1129 if (!hdev
->vector_status
) {
1130 pci_free_irq_vectors(pdev
);
1134 for (i
= 0; i
< hdev
->num_msi
; i
++)
1135 hdev
->vector_status
[i
] = HCLGEVF_INVALID_VPORT
;
1137 hdev
->vector_irq
= devm_kcalloc(&pdev
->dev
, hdev
->num_msi
,
1138 sizeof(int), GFP_KERNEL
);
1139 if (!hdev
->vector_irq
) {
1140 pci_free_irq_vectors(pdev
);
1147 static void hclgevf_uninit_msi(struct hclgevf_dev
*hdev
)
1149 struct pci_dev
*pdev
= hdev
->pdev
;
1151 pci_free_irq_vectors(pdev
);
1154 static int hclgevf_misc_irq_init(struct hclgevf_dev
*hdev
)
1158 hclgevf_get_misc_vector(hdev
);
1160 ret
= request_irq(hdev
->misc_vector
.vector_irq
, hclgevf_misc_irq_handle
,
1161 0, "hclgevf_cmd", hdev
);
1163 dev_err(&hdev
->pdev
->dev
, "VF failed to request misc irq(%d)\n",
1164 hdev
->misc_vector
.vector_irq
);
1168 /* enable misc. vector(vector 0) */
1169 hclgevf_enable_vector(&hdev
->misc_vector
, true);
1174 static void hclgevf_misc_irq_uninit(struct hclgevf_dev
*hdev
)
1176 /* disable misc vector(vector 0) */
1177 hclgevf_enable_vector(&hdev
->misc_vector
, false);
1178 free_irq(hdev
->misc_vector
.vector_irq
, hdev
);
1179 hclgevf_free_vector(hdev
, 0);
1182 static int hclgevf_init_instance(struct hclgevf_dev
*hdev
,
1183 struct hnae3_client
*client
)
1187 switch (client
->type
) {
1188 case HNAE3_CLIENT_KNIC
:
1189 hdev
->nic_client
= client
;
1190 hdev
->nic
.client
= client
;
1192 ret
= client
->ops
->init_instance(&hdev
->nic
);
1196 if (hdev
->roce_client
&& hnae3_dev_roce_supported(hdev
)) {
1197 struct hnae3_client
*rc
= hdev
->roce_client
;
1199 ret
= hclgevf_init_roce_base_info(hdev
);
1202 ret
= rc
->ops
->init_instance(&hdev
->roce
);
1207 case HNAE3_CLIENT_UNIC
:
1208 hdev
->nic_client
= client
;
1209 hdev
->nic
.client
= client
;
1211 ret
= client
->ops
->init_instance(&hdev
->nic
);
1215 case HNAE3_CLIENT_ROCE
:
1216 hdev
->roce_client
= client
;
1217 hdev
->roce
.client
= client
;
1219 if (hdev
->roce_client
&& hnae3_dev_roce_supported(hdev
)) {
1220 ret
= hclgevf_init_roce_base_info(hdev
);
1224 ret
= client
->ops
->init_instance(&hdev
->roce
);
1233 static void hclgevf_uninit_instance(struct hclgevf_dev
*hdev
,
1234 struct hnae3_client
*client
)
1236 /* un-init roce, if it exists */
1237 if (hdev
->roce_client
)
1238 hdev
->roce_client
->ops
->uninit_instance(&hdev
->roce
, 0);
1240 /* un-init nic/unic, if this was not called by roce client */
1241 if ((client
->ops
->uninit_instance
) &&
1242 (client
->type
!= HNAE3_CLIENT_ROCE
))
1243 client
->ops
->uninit_instance(&hdev
->nic
, 0);
1246 static int hclgevf_register_client(struct hnae3_client
*client
,
1247 struct hnae3_ae_dev
*ae_dev
)
1249 struct hclgevf_dev
*hdev
= ae_dev
->priv
;
1251 return hclgevf_init_instance(hdev
, client
);
1254 static void hclgevf_unregister_client(struct hnae3_client
*client
,
1255 struct hnae3_ae_dev
*ae_dev
)
1257 struct hclgevf_dev
*hdev
= ae_dev
->priv
;
1259 hclgevf_uninit_instance(hdev
, client
);
1262 static int hclgevf_pci_init(struct hclgevf_dev
*hdev
)
1264 struct pci_dev
*pdev
= hdev
->pdev
;
1265 struct hclgevf_hw
*hw
;
1268 ret
= pci_enable_device(pdev
);
1270 dev_err(&pdev
->dev
, "failed to enable PCI device\n");
1271 goto err_no_drvdata
;
1274 ret
= dma_set_mask_and_coherent(&pdev
->dev
, DMA_BIT_MASK(64));
1276 dev_err(&pdev
->dev
, "can't set consistent PCI DMA, exiting");
1277 goto err_disable_device
;
1280 ret
= pci_request_regions(pdev
, HCLGEVF_DRIVER_NAME
);
1282 dev_err(&pdev
->dev
, "PCI request regions failed %d\n", ret
);
1283 goto err_disable_device
;
1286 pci_set_master(pdev
);
1289 hw
->io_base
= pci_iomap(pdev
, 2, 0);
1291 dev_err(&pdev
->dev
, "can't map configuration register space\n");
1293 goto err_clr_master
;
1299 pci_clear_master(pdev
);
1300 pci_release_regions(pdev
);
1302 pci_disable_device(pdev
);
1304 pci_set_drvdata(pdev
, NULL
);
1308 static void hclgevf_pci_uninit(struct hclgevf_dev
*hdev
)
1310 struct pci_dev
*pdev
= hdev
->pdev
;
1312 pci_iounmap(pdev
, hdev
->hw
.io_base
);
1313 pci_clear_master(pdev
);
1314 pci_release_regions(pdev
);
1315 pci_disable_device(pdev
);
1316 pci_set_drvdata(pdev
, NULL
);
1319 static int hclgevf_init_ae_dev(struct hnae3_ae_dev
*ae_dev
)
1321 struct pci_dev
*pdev
= ae_dev
->pdev
;
1322 struct hclgevf_dev
*hdev
;
1325 hdev
= devm_kzalloc(&pdev
->dev
, sizeof(*hdev
), GFP_KERNEL
);
1330 hdev
->ae_dev
= ae_dev
;
1331 ae_dev
->priv
= hdev
;
1333 ret
= hclgevf_pci_init(hdev
);
1335 dev_err(&pdev
->dev
, "PCI initialization failed\n");
1339 ret
= hclgevf_init_msi(hdev
);
1341 dev_err(&pdev
->dev
, "failed(%d) to init MSI/MSI-X\n", ret
);
1345 hclgevf_state_init(hdev
);
1347 ret
= hclgevf_misc_irq_init(hdev
);
1349 dev_err(&pdev
->dev
, "failed(%d) to init Misc IRQ(vector0)\n",
1351 goto err_misc_irq_init
;
1354 ret
= hclgevf_cmd_init(hdev
);
1358 ret
= hclgevf_configure(hdev
);
1360 dev_err(&pdev
->dev
, "failed(%d) to fetch configuration\n", ret
);
1364 ret
= hclgevf_alloc_tqps(hdev
);
1366 dev_err(&pdev
->dev
, "failed(%d) to allocate TQPs\n", ret
);
1370 ret
= hclgevf_set_handle_info(hdev
);
1372 dev_err(&pdev
->dev
, "failed(%d) to set handle info\n", ret
);
1376 /* Initialize VF's MTA */
1377 hdev
->accept_mta_mc
= true;
1378 ret
= hclgevf_cfg_func_mta_filter(&hdev
->nic
, hdev
->accept_mta_mc
);
1380 dev_err(&hdev
->pdev
->dev
,
1381 "failed(%d) to set mta filter mode\n", ret
);
1385 /* Initialize RSS for this VF */
1386 ret
= hclgevf_rss_init_hw(hdev
);
1388 dev_err(&hdev
->pdev
->dev
,
1389 "failed(%d) to initialize RSS\n", ret
);
1393 ret
= hclgevf_init_vlan_config(hdev
);
1395 dev_err(&hdev
->pdev
->dev
,
1396 "failed(%d) to initialize VLAN config\n", ret
);
1400 pr_info("finished initializing %s driver\n", HCLGEVF_DRIVER_NAME
);
1405 hclgevf_cmd_uninit(hdev
);
1407 hclgevf_misc_irq_uninit(hdev
);
1409 hclgevf_state_uninit(hdev
);
1410 hclgevf_uninit_msi(hdev
);
1412 hclgevf_pci_uninit(hdev
);
1416 static void hclgevf_uninit_ae_dev(struct hnae3_ae_dev
*ae_dev
)
1418 struct hclgevf_dev
*hdev
= ae_dev
->priv
;
1420 hclgevf_cmd_uninit(hdev
);
1421 hclgevf_misc_irq_uninit(hdev
);
1422 hclgevf_state_uninit(hdev
);
1423 hclgevf_uninit_msi(hdev
);
1424 hclgevf_pci_uninit(hdev
);
1425 ae_dev
->priv
= NULL
;
1428 static u32
hclgevf_get_max_channels(struct hclgevf_dev
*hdev
)
1430 struct hnae3_handle
*nic
= &hdev
->nic
;
1431 struct hnae3_knic_private_info
*kinfo
= &nic
->kinfo
;
1433 return min_t(u32
, hdev
->rss_size_max
* kinfo
->num_tc
, hdev
->num_tqps
);
1437 * hclgevf_get_channels - Get the current channels enabled and max supported.
1438 * @handle: hardware information for network interface
1439 * @ch: ethtool channels structure
1441 * We don't support separate tx and rx queues as channels. The other count
1442 * represents how many queues are being used for control. max_combined counts
1443 * how many queue pairs we can support. They may not be mapped 1 to 1 with
1444 * q_vectors since we support a lot more queue pairs than q_vectors.
1446 static void hclgevf_get_channels(struct hnae3_handle
*handle
,
1447 struct ethtool_channels
*ch
)
1449 struct hclgevf_dev
*hdev
= hclgevf_ae_get_hdev(handle
);
1451 ch
->max_combined
= hclgevf_get_max_channels(hdev
);
1452 ch
->other_count
= 0;
1454 ch
->combined_count
= hdev
->num_tqps
;
1457 static void hclgevf_get_tqps_and_rss_info(struct hnae3_handle
*handle
,
1458 u16
*free_tqps
, u16
*max_rss_size
)
1460 struct hclgevf_dev
*hdev
= hclgevf_ae_get_hdev(handle
);
1463 *max_rss_size
= hdev
->rss_size_max
;
1466 static const struct hnae3_ae_ops hclgevf_ops
= {
1467 .init_ae_dev
= hclgevf_init_ae_dev
,
1468 .uninit_ae_dev
= hclgevf_uninit_ae_dev
,
1469 .init_client_instance
= hclgevf_register_client
,
1470 .uninit_client_instance
= hclgevf_unregister_client
,
1471 .start
= hclgevf_ae_start
,
1472 .stop
= hclgevf_ae_stop
,
1473 .map_ring_to_vector
= hclgevf_map_ring_to_vector
,
1474 .unmap_ring_from_vector
= hclgevf_unmap_ring_from_vector
,
1475 .get_vector
= hclgevf_get_vector
,
1476 .put_vector
= hclgevf_put_vector
,
1477 .reset_queue
= hclgevf_reset_tqp
,
1478 .set_promisc_mode
= hclgevf_set_promisc_mode
,
1479 .get_mac_addr
= hclgevf_get_mac_addr
,
1480 .set_mac_addr
= hclgevf_set_mac_addr
,
1481 .add_uc_addr
= hclgevf_add_uc_addr
,
1482 .rm_uc_addr
= hclgevf_rm_uc_addr
,
1483 .add_mc_addr
= hclgevf_add_mc_addr
,
1484 .rm_mc_addr
= hclgevf_rm_mc_addr
,
1485 .get_stats
= hclgevf_get_stats
,
1486 .update_stats
= hclgevf_update_stats
,
1487 .get_strings
= hclgevf_get_strings
,
1488 .get_sset_count
= hclgevf_get_sset_count
,
1489 .get_rss_key_size
= hclgevf_get_rss_key_size
,
1490 .get_rss_indir_size
= hclgevf_get_rss_indir_size
,
1491 .get_rss
= hclgevf_get_rss
,
1492 .set_rss
= hclgevf_set_rss
,
1493 .get_tc_size
= hclgevf_get_tc_size
,
1494 .get_fw_version
= hclgevf_get_fw_version
,
1495 .set_vlan_filter
= hclgevf_set_vlan_filter
,
1496 .get_channels
= hclgevf_get_channels
,
1497 .get_tqps_and_rss_info
= hclgevf_get_tqps_and_rss_info
,
1500 static struct hnae3_ae_algo ae_algovf
= {
1501 .ops
= &hclgevf_ops
,
1502 .name
= HCLGEVF_NAME
,
1503 .pdev_id_table
= ae_algovf_pci_tbl
,
1506 static int hclgevf_init(void)
1508 pr_info("%s is initializing\n", HCLGEVF_NAME
);
1510 return hnae3_register_ae_algo(&ae_algovf
);
1513 static void hclgevf_exit(void)
1515 hnae3_unregister_ae_algo(&ae_algovf
);
1517 module_init(hclgevf_init
);
1518 module_exit(hclgevf_exit
);
1520 MODULE_LICENSE("GPL");
1521 MODULE_AUTHOR("Huawei Tech. Co., Ltd.");
1522 MODULE_DESCRIPTION("HCLGEVF Driver");
1523 MODULE_VERSION(HCLGEVF_MOD_VERSION
);