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e1000e: Minor comment clean-up.
[mirror_ubuntu-zesty-kernel.git] / drivers / net / ethernet / intel / e1000e / netdev.c
1 /*******************************************************************************
2
3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2012 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27 *******************************************************************************/
28
29 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
30
31 #include <linux/module.h>
32 #include <linux/types.h>
33 #include <linux/init.h>
34 #include <linux/pci.h>
35 #include <linux/vmalloc.h>
36 #include <linux/pagemap.h>
37 #include <linux/delay.h>
38 #include <linux/netdevice.h>
39 #include <linux/interrupt.h>
40 #include <linux/tcp.h>
41 #include <linux/ipv6.h>
42 #include <linux/slab.h>
43 #include <net/checksum.h>
44 #include <net/ip6_checksum.h>
45 #include <linux/mii.h>
46 #include <linux/ethtool.h>
47 #include <linux/if_vlan.h>
48 #include <linux/cpu.h>
49 #include <linux/smp.h>
50 #include <linux/pm_qos.h>
51 #include <linux/pm_runtime.h>
52 #include <linux/aer.h>
53 #include <linux/prefetch.h>
54
55 #include "e1000.h"
56
57 #define DRV_EXTRAVERSION "-k"
58
59 #define DRV_VERSION "1.9.5" DRV_EXTRAVERSION
60 char e1000e_driver_name[] = "e1000e";
61 const char e1000e_driver_version[] = DRV_VERSION;
62
63 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
64 static int debug = -1;
65 module_param(debug, int, 0);
66 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
67
68 static void e1000e_disable_aspm(struct pci_dev *pdev, u16 state);
69
70 static const struct e1000_info *e1000_info_tbl[] = {
71 [board_82571] = &e1000_82571_info,
72 [board_82572] = &e1000_82572_info,
73 [board_82573] = &e1000_82573_info,
74 [board_82574] = &e1000_82574_info,
75 [board_82583] = &e1000_82583_info,
76 [board_80003es2lan] = &e1000_es2_info,
77 [board_ich8lan] = &e1000_ich8_info,
78 [board_ich9lan] = &e1000_ich9_info,
79 [board_ich10lan] = &e1000_ich10_info,
80 [board_pchlan] = &e1000_pch_info,
81 [board_pch2lan] = &e1000_pch2_info,
82 };
83
84 struct e1000_reg_info {
85 u32 ofs;
86 char *name;
87 };
88
89 #define E1000_RDFH 0x02410 /* Rx Data FIFO Head - RW */
90 #define E1000_RDFT 0x02418 /* Rx Data FIFO Tail - RW */
91 #define E1000_RDFHS 0x02420 /* Rx Data FIFO Head Saved - RW */
92 #define E1000_RDFTS 0x02428 /* Rx Data FIFO Tail Saved - RW */
93 #define E1000_RDFPC 0x02430 /* Rx Data FIFO Packet Count - RW */
94
95 #define E1000_TDFH 0x03410 /* Tx Data FIFO Head - RW */
96 #define E1000_TDFT 0x03418 /* Tx Data FIFO Tail - RW */
97 #define E1000_TDFHS 0x03420 /* Tx Data FIFO Head Saved - RW */
98 #define E1000_TDFTS 0x03428 /* Tx Data FIFO Tail Saved - RW */
99 #define E1000_TDFPC 0x03430 /* Tx Data FIFO Packet Count - RW */
100
101 static const struct e1000_reg_info e1000_reg_info_tbl[] = {
102
103 /* General Registers */
104 {E1000_CTRL, "CTRL"},
105 {E1000_STATUS, "STATUS"},
106 {E1000_CTRL_EXT, "CTRL_EXT"},
107
108 /* Interrupt Registers */
109 {E1000_ICR, "ICR"},
110
111 /* Rx Registers */
112 {E1000_RCTL, "RCTL"},
113 {E1000_RDLEN, "RDLEN"},
114 {E1000_RDH, "RDH"},
115 {E1000_RDT, "RDT"},
116 {E1000_RDTR, "RDTR"},
117 {E1000_RXDCTL(0), "RXDCTL"},
118 {E1000_ERT, "ERT"},
119 {E1000_RDBAL, "RDBAL"},
120 {E1000_RDBAH, "RDBAH"},
121 {E1000_RDFH, "RDFH"},
122 {E1000_RDFT, "RDFT"},
123 {E1000_RDFHS, "RDFHS"},
124 {E1000_RDFTS, "RDFTS"},
125 {E1000_RDFPC, "RDFPC"},
126
127 /* Tx Registers */
128 {E1000_TCTL, "TCTL"},
129 {E1000_TDBAL, "TDBAL"},
130 {E1000_TDBAH, "TDBAH"},
131 {E1000_TDLEN, "TDLEN"},
132 {E1000_TDH, "TDH"},
133 {E1000_TDT, "TDT"},
134 {E1000_TIDV, "TIDV"},
135 {E1000_TXDCTL(0), "TXDCTL"},
136 {E1000_TADV, "TADV"},
137 {E1000_TARC(0), "TARC"},
138 {E1000_TDFH, "TDFH"},
139 {E1000_TDFT, "TDFT"},
140 {E1000_TDFHS, "TDFHS"},
141 {E1000_TDFTS, "TDFTS"},
142 {E1000_TDFPC, "TDFPC"},
143
144 /* List Terminator */
145 {0, NULL}
146 };
147
148 /*
149 * e1000_regdump - register printout routine
150 */
151 static void e1000_regdump(struct e1000_hw *hw, struct e1000_reg_info *reginfo)
152 {
153 int n = 0;
154 char rname[16];
155 u32 regs[8];
156
157 switch (reginfo->ofs) {
158 case E1000_RXDCTL(0):
159 for (n = 0; n < 2; n++)
160 regs[n] = __er32(hw, E1000_RXDCTL(n));
161 break;
162 case E1000_TXDCTL(0):
163 for (n = 0; n < 2; n++)
164 regs[n] = __er32(hw, E1000_TXDCTL(n));
165 break;
166 case E1000_TARC(0):
167 for (n = 0; n < 2; n++)
168 regs[n] = __er32(hw, E1000_TARC(n));
169 break;
170 default:
171 pr_info("%-15s %08x\n",
172 reginfo->name, __er32(hw, reginfo->ofs));
173 return;
174 }
175
176 snprintf(rname, 16, "%s%s", reginfo->name, "[0-1]");
177 pr_info("%-15s %08x %08x\n", rname, regs[0], regs[1]);
178 }
179
180 /*
181 * e1000e_dump - Print registers, Tx-ring and Rx-ring
182 */
183 static void e1000e_dump(struct e1000_adapter *adapter)
184 {
185 struct net_device *netdev = adapter->netdev;
186 struct e1000_hw *hw = &adapter->hw;
187 struct e1000_reg_info *reginfo;
188 struct e1000_ring *tx_ring = adapter->tx_ring;
189 struct e1000_tx_desc *tx_desc;
190 struct my_u0 {
191 __le64 a;
192 __le64 b;
193 } *u0;
194 struct e1000_buffer *buffer_info;
195 struct e1000_ring *rx_ring = adapter->rx_ring;
196 union e1000_rx_desc_packet_split *rx_desc_ps;
197 union e1000_rx_desc_extended *rx_desc;
198 struct my_u1 {
199 __le64 a;
200 __le64 b;
201 __le64 c;
202 __le64 d;
203 } *u1;
204 u32 staterr;
205 int i = 0;
206
207 if (!netif_msg_hw(adapter))
208 return;
209
210 /* Print netdevice Info */
211 if (netdev) {
212 dev_info(&adapter->pdev->dev, "Net device Info\n");
213 pr_info("Device Name state trans_start last_rx\n");
214 pr_info("%-15s %016lX %016lX %016lX\n",
215 netdev->name, netdev->state, netdev->trans_start,
216 netdev->last_rx);
217 }
218
219 /* Print Registers */
220 dev_info(&adapter->pdev->dev, "Register Dump\n");
221 pr_info(" Register Name Value\n");
222 for (reginfo = (struct e1000_reg_info *)e1000_reg_info_tbl;
223 reginfo->name; reginfo++) {
224 e1000_regdump(hw, reginfo);
225 }
226
227 /* Print Tx Ring Summary */
228 if (!netdev || !netif_running(netdev))
229 return;
230
231 dev_info(&adapter->pdev->dev, "Tx Ring Summary\n");
232 pr_info("Queue [NTU] [NTC] [bi(ntc)->dma ] leng ntw timestamp\n");
233 buffer_info = &tx_ring->buffer_info[tx_ring->next_to_clean];
234 pr_info(" %5d %5X %5X %016llX %04X %3X %016llX\n",
235 0, tx_ring->next_to_use, tx_ring->next_to_clean,
236 (unsigned long long)buffer_info->dma,
237 buffer_info->length,
238 buffer_info->next_to_watch,
239 (unsigned long long)buffer_info->time_stamp);
240
241 /* Print Tx Ring */
242 if (!netif_msg_tx_done(adapter))
243 goto rx_ring_summary;
244
245 dev_info(&adapter->pdev->dev, "Tx Ring Dump\n");
246
247 /* Transmit Descriptor Formats - DEXT[29] is 0 (Legacy) or 1 (Extended)
248 *
249 * Legacy Transmit Descriptor
250 * +--------------------------------------------------------------+
251 * 0 | Buffer Address [63:0] (Reserved on Write Back) |
252 * +--------------------------------------------------------------+
253 * 8 | Special | CSS | Status | CMD | CSO | Length |
254 * +--------------------------------------------------------------+
255 * 63 48 47 36 35 32 31 24 23 16 15 0
256 *
257 * Extended Context Descriptor (DTYP=0x0) for TSO or checksum offload
258 * 63 48 47 40 39 32 31 16 15 8 7 0
259 * +----------------------------------------------------------------+
260 * 0 | TUCSE | TUCS0 | TUCSS | IPCSE | IPCS0 | IPCSS |
261 * +----------------------------------------------------------------+
262 * 8 | MSS | HDRLEN | RSV | STA | TUCMD | DTYP | PAYLEN |
263 * +----------------------------------------------------------------+
264 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0
265 *
266 * Extended Data Descriptor (DTYP=0x1)
267 * +----------------------------------------------------------------+
268 * 0 | Buffer Address [63:0] |
269 * +----------------------------------------------------------------+
270 * 8 | VLAN tag | POPTS | Rsvd | Status | Command | DTYP | DTALEN |
271 * +----------------------------------------------------------------+
272 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0
273 */
274 pr_info("Tl[desc] [address 63:0 ] [SpeCssSCmCsLen] [bi->dma ] leng ntw timestamp bi->skb <-- Legacy format\n");
275 pr_info("Tc[desc] [Ce CoCsIpceCoS] [MssHlRSCm0Plen] [bi->dma ] leng ntw timestamp bi->skb <-- Ext Context format\n");
276 pr_info("Td[desc] [address 63:0 ] [VlaPoRSCm1Dlen] [bi->dma ] leng ntw timestamp bi->skb <-- Ext Data format\n");
277 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
278 const char *next_desc;
279 tx_desc = E1000_TX_DESC(*tx_ring, i);
280 buffer_info = &tx_ring->buffer_info[i];
281 u0 = (struct my_u0 *)tx_desc;
282 if (i == tx_ring->next_to_use && i == tx_ring->next_to_clean)
283 next_desc = " NTC/U";
284 else if (i == tx_ring->next_to_use)
285 next_desc = " NTU";
286 else if (i == tx_ring->next_to_clean)
287 next_desc = " NTC";
288 else
289 next_desc = "";
290 pr_info("T%c[0x%03X] %016llX %016llX %016llX %04X %3X %016llX %p%s\n",
291 (!(le64_to_cpu(u0->b) & (1 << 29)) ? 'l' :
292 ((le64_to_cpu(u0->b) & (1 << 20)) ? 'd' : 'c')),
293 i,
294 (unsigned long long)le64_to_cpu(u0->a),
295 (unsigned long long)le64_to_cpu(u0->b),
296 (unsigned long long)buffer_info->dma,
297 buffer_info->length, buffer_info->next_to_watch,
298 (unsigned long long)buffer_info->time_stamp,
299 buffer_info->skb, next_desc);
300
301 if (netif_msg_pktdata(adapter) && buffer_info->dma != 0)
302 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS,
303 16, 1, phys_to_virt(buffer_info->dma),
304 buffer_info->length, true);
305 }
306
307 /* Print Rx Ring Summary */
308 rx_ring_summary:
309 dev_info(&adapter->pdev->dev, "Rx Ring Summary\n");
310 pr_info("Queue [NTU] [NTC]\n");
311 pr_info(" %5d %5X %5X\n",
312 0, rx_ring->next_to_use, rx_ring->next_to_clean);
313
314 /* Print Rx Ring */
315 if (!netif_msg_rx_status(adapter))
316 return;
317
318 dev_info(&adapter->pdev->dev, "Rx Ring Dump\n");
319 switch (adapter->rx_ps_pages) {
320 case 1:
321 case 2:
322 case 3:
323 /* [Extended] Packet Split Receive Descriptor Format
324 *
325 * +-----------------------------------------------------+
326 * 0 | Buffer Address 0 [63:0] |
327 * +-----------------------------------------------------+
328 * 8 | Buffer Address 1 [63:0] |
329 * +-----------------------------------------------------+
330 * 16 | Buffer Address 2 [63:0] |
331 * +-----------------------------------------------------+
332 * 24 | Buffer Address 3 [63:0] |
333 * +-----------------------------------------------------+
334 */
335 pr_info("R [desc] [buffer 0 63:0 ] [buffer 1 63:0 ] [buffer 2 63:0 ] [buffer 3 63:0 ] [bi->dma ] [bi->skb] <-- Ext Pkt Split format\n");
336 /* [Extended] Receive Descriptor (Write-Back) Format
337 *
338 * 63 48 47 32 31 13 12 8 7 4 3 0
339 * +------------------------------------------------------+
340 * 0 | Packet | IP | Rsvd | MRQ | Rsvd | MRQ RSS |
341 * | Checksum | Ident | | Queue | | Type |
342 * +------------------------------------------------------+
343 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
344 * +------------------------------------------------------+
345 * 63 48 47 32 31 20 19 0
346 */
347 pr_info("RWB[desc] [ck ipid mrqhsh] [vl l0 ee es] [ l3 l2 l1 hs] [reserved ] ---------------- [bi->skb] <-- Ext Rx Write-Back format\n");
348 for (i = 0; i < rx_ring->count; i++) {
349 const char *next_desc;
350 buffer_info = &rx_ring->buffer_info[i];
351 rx_desc_ps = E1000_RX_DESC_PS(*rx_ring, i);
352 u1 = (struct my_u1 *)rx_desc_ps;
353 staterr =
354 le32_to_cpu(rx_desc_ps->wb.middle.status_error);
355
356 if (i == rx_ring->next_to_use)
357 next_desc = " NTU";
358 else if (i == rx_ring->next_to_clean)
359 next_desc = " NTC";
360 else
361 next_desc = "";
362
363 if (staterr & E1000_RXD_STAT_DD) {
364 /* Descriptor Done */
365 pr_info("%s[0x%03X] %016llX %016llX %016llX %016llX ---------------- %p%s\n",
366 "RWB", i,
367 (unsigned long long)le64_to_cpu(u1->a),
368 (unsigned long long)le64_to_cpu(u1->b),
369 (unsigned long long)le64_to_cpu(u1->c),
370 (unsigned long long)le64_to_cpu(u1->d),
371 buffer_info->skb, next_desc);
372 } else {
373 pr_info("%s[0x%03X] %016llX %016llX %016llX %016llX %016llX %p%s\n",
374 "R ", i,
375 (unsigned long long)le64_to_cpu(u1->a),
376 (unsigned long long)le64_to_cpu(u1->b),
377 (unsigned long long)le64_to_cpu(u1->c),
378 (unsigned long long)le64_to_cpu(u1->d),
379 (unsigned long long)buffer_info->dma,
380 buffer_info->skb, next_desc);
381
382 if (netif_msg_pktdata(adapter))
383 print_hex_dump(KERN_INFO, "",
384 DUMP_PREFIX_ADDRESS, 16, 1,
385 phys_to_virt(buffer_info->dma),
386 adapter->rx_ps_bsize0, true);
387 }
388 }
389 break;
390 default:
391 case 0:
392 /* Extended Receive Descriptor (Read) Format
393 *
394 * +-----------------------------------------------------+
395 * 0 | Buffer Address [63:0] |
396 * +-----------------------------------------------------+
397 * 8 | Reserved |
398 * +-----------------------------------------------------+
399 */
400 pr_info("R [desc] [buf addr 63:0 ] [reserved 63:0 ] [bi->dma ] [bi->skb] <-- Ext (Read) format\n");
401 /* Extended Receive Descriptor (Write-Back) Format
402 *
403 * 63 48 47 32 31 24 23 4 3 0
404 * +------------------------------------------------------+
405 * | RSS Hash | | | |
406 * 0 +-------------------+ Rsvd | Reserved | MRQ RSS |
407 * | Packet | IP | | | Type |
408 * | Checksum | Ident | | | |
409 * +------------------------------------------------------+
410 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
411 * +------------------------------------------------------+
412 * 63 48 47 32 31 20 19 0
413 */
414 pr_info("RWB[desc] [cs ipid mrq] [vt ln xe xs] [bi->skb] <-- Ext (Write-Back) format\n");
415
416 for (i = 0; i < rx_ring->count; i++) {
417 const char *next_desc;
418
419 buffer_info = &rx_ring->buffer_info[i];
420 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
421 u1 = (struct my_u1 *)rx_desc;
422 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
423
424 if (i == rx_ring->next_to_use)
425 next_desc = " NTU";
426 else if (i == rx_ring->next_to_clean)
427 next_desc = " NTC";
428 else
429 next_desc = "";
430
431 if (staterr & E1000_RXD_STAT_DD) {
432 /* Descriptor Done */
433 pr_info("%s[0x%03X] %016llX %016llX ---------------- %p%s\n",
434 "RWB", i,
435 (unsigned long long)le64_to_cpu(u1->a),
436 (unsigned long long)le64_to_cpu(u1->b),
437 buffer_info->skb, next_desc);
438 } else {
439 pr_info("%s[0x%03X] %016llX %016llX %016llX %p%s\n",
440 "R ", i,
441 (unsigned long long)le64_to_cpu(u1->a),
442 (unsigned long long)le64_to_cpu(u1->b),
443 (unsigned long long)buffer_info->dma,
444 buffer_info->skb, next_desc);
445
446 if (netif_msg_pktdata(adapter))
447 print_hex_dump(KERN_INFO, "",
448 DUMP_PREFIX_ADDRESS, 16,
449 1,
450 phys_to_virt
451 (buffer_info->dma),
452 adapter->rx_buffer_len,
453 true);
454 }
455 }
456 }
457 }
458
459 /**
460 * e1000_desc_unused - calculate if we have unused descriptors
461 **/
462 static int e1000_desc_unused(struct e1000_ring *ring)
463 {
464 if (ring->next_to_clean > ring->next_to_use)
465 return ring->next_to_clean - ring->next_to_use - 1;
466
467 return ring->count + ring->next_to_clean - ring->next_to_use - 1;
468 }
469
470 /**
471 * e1000_receive_skb - helper function to handle Rx indications
472 * @adapter: board private structure
473 * @status: descriptor status field as written by hardware
474 * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
475 * @skb: pointer to sk_buff to be indicated to stack
476 **/
477 static void e1000_receive_skb(struct e1000_adapter *adapter,
478 struct net_device *netdev, struct sk_buff *skb,
479 u8 status, __le16 vlan)
480 {
481 u16 tag = le16_to_cpu(vlan);
482 skb->protocol = eth_type_trans(skb, netdev);
483
484 if (status & E1000_RXD_STAT_VP)
485 __vlan_hwaccel_put_tag(skb, tag);
486
487 napi_gro_receive(&adapter->napi, skb);
488 }
489
490 /**
491 * e1000_rx_checksum - Receive Checksum Offload
492 * @adapter: board private structure
493 * @status_err: receive descriptor status and error fields
494 * @csum: receive descriptor csum field
495 * @sk_buff: socket buffer with received data
496 **/
497 static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
498 __le16 csum, struct sk_buff *skb)
499 {
500 u16 status = (u16)status_err;
501 u8 errors = (u8)(status_err >> 24);
502
503 skb_checksum_none_assert(skb);
504
505 /* Rx checksum disabled */
506 if (!(adapter->netdev->features & NETIF_F_RXCSUM))
507 return;
508
509 /* Ignore Checksum bit is set */
510 if (status & E1000_RXD_STAT_IXSM)
511 return;
512
513 /* TCP/UDP checksum error bit is set */
514 if (errors & E1000_RXD_ERR_TCPE) {
515 /* let the stack verify checksum errors */
516 adapter->hw_csum_err++;
517 return;
518 }
519
520 /* TCP/UDP Checksum has not been calculated */
521 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
522 return;
523
524 /* It must be a TCP or UDP packet with a valid checksum */
525 if (status & E1000_RXD_STAT_TCPCS) {
526 /* TCP checksum is good */
527 skb->ip_summed = CHECKSUM_UNNECESSARY;
528 } else {
529 /*
530 * IP fragment with UDP payload
531 * Hardware complements the payload checksum, so we undo it
532 * and then put the value in host order for further stack use.
533 */
534 __sum16 sum = (__force __sum16)swab16((__force u16)csum);
535 skb->csum = csum_unfold(~sum);
536 skb->ip_summed = CHECKSUM_COMPLETE;
537 }
538 adapter->hw_csum_good++;
539 }
540
541 /**
542 * e1000e_update_tail_wa - helper function for e1000e_update_[rt]dt_wa()
543 * @hw: pointer to the HW structure
544 * @tail: address of tail descriptor register
545 * @i: value to write to tail descriptor register
546 *
547 * When updating the tail register, the ME could be accessing Host CSR
548 * registers at the same time. Normally, this is handled in h/w by an
549 * arbiter but on some parts there is a bug that acknowledges Host accesses
550 * later than it should which could result in the descriptor register to
551 * have an incorrect value. Workaround this by checking the FWSM register
552 * which has bit 24 set while ME is accessing Host CSR registers, wait
553 * if it is set and try again a number of times.
554 **/
555 static inline s32 e1000e_update_tail_wa(struct e1000_hw *hw, void __iomem *tail,
556 unsigned int i)
557 {
558 unsigned int j = 0;
559
560 while ((j++ < E1000_ICH_FWSM_PCIM2PCI_COUNT) &&
561 (er32(FWSM) & E1000_ICH_FWSM_PCIM2PCI))
562 udelay(50);
563
564 writel(i, tail);
565
566 if ((j == E1000_ICH_FWSM_PCIM2PCI_COUNT) && (i != readl(tail)))
567 return E1000_ERR_SWFW_SYNC;
568
569 return 0;
570 }
571
572 static void e1000e_update_rdt_wa(struct e1000_ring *rx_ring, unsigned int i)
573 {
574 struct e1000_adapter *adapter = rx_ring->adapter;
575 struct e1000_hw *hw = &adapter->hw;
576
577 if (e1000e_update_tail_wa(hw, rx_ring->tail, i)) {
578 u32 rctl = er32(RCTL);
579 ew32(RCTL, rctl & ~E1000_RCTL_EN);
580 e_err("ME firmware caused invalid RDT - resetting\n");
581 schedule_work(&adapter->reset_task);
582 }
583 }
584
585 static void e1000e_update_tdt_wa(struct e1000_ring *tx_ring, unsigned int i)
586 {
587 struct e1000_adapter *adapter = tx_ring->adapter;
588 struct e1000_hw *hw = &adapter->hw;
589
590 if (e1000e_update_tail_wa(hw, tx_ring->tail, i)) {
591 u32 tctl = er32(TCTL);
592 ew32(TCTL, tctl & ~E1000_TCTL_EN);
593 e_err("ME firmware caused invalid TDT - resetting\n");
594 schedule_work(&adapter->reset_task);
595 }
596 }
597
598 /**
599 * e1000_alloc_rx_buffers - Replace used receive buffers
600 * @rx_ring: Rx descriptor ring
601 **/
602 static void e1000_alloc_rx_buffers(struct e1000_ring *rx_ring,
603 int cleaned_count, gfp_t gfp)
604 {
605 struct e1000_adapter *adapter = rx_ring->adapter;
606 struct net_device *netdev = adapter->netdev;
607 struct pci_dev *pdev = adapter->pdev;
608 union e1000_rx_desc_extended *rx_desc;
609 struct e1000_buffer *buffer_info;
610 struct sk_buff *skb;
611 unsigned int i;
612 unsigned int bufsz = adapter->rx_buffer_len;
613
614 i = rx_ring->next_to_use;
615 buffer_info = &rx_ring->buffer_info[i];
616
617 while (cleaned_count--) {
618 skb = buffer_info->skb;
619 if (skb) {
620 skb_trim(skb, 0);
621 goto map_skb;
622 }
623
624 skb = __netdev_alloc_skb_ip_align(netdev, bufsz, gfp);
625 if (!skb) {
626 /* Better luck next round */
627 adapter->alloc_rx_buff_failed++;
628 break;
629 }
630
631 buffer_info->skb = skb;
632 map_skb:
633 buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
634 adapter->rx_buffer_len,
635 DMA_FROM_DEVICE);
636 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
637 dev_err(&pdev->dev, "Rx DMA map failed\n");
638 adapter->rx_dma_failed++;
639 break;
640 }
641
642 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
643 rx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma);
644
645 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
646 /*
647 * Force memory writes to complete before letting h/w
648 * know there are new descriptors to fetch. (Only
649 * applicable for weak-ordered memory model archs,
650 * such as IA-64).
651 */
652 wmb();
653 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
654 e1000e_update_rdt_wa(rx_ring, i);
655 else
656 writel(i, rx_ring->tail);
657 }
658 i++;
659 if (i == rx_ring->count)
660 i = 0;
661 buffer_info = &rx_ring->buffer_info[i];
662 }
663
664 rx_ring->next_to_use = i;
665 }
666
667 /**
668 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
669 * @rx_ring: Rx descriptor ring
670 **/
671 static void e1000_alloc_rx_buffers_ps(struct e1000_ring *rx_ring,
672 int cleaned_count, gfp_t gfp)
673 {
674 struct e1000_adapter *adapter = rx_ring->adapter;
675 struct net_device *netdev = adapter->netdev;
676 struct pci_dev *pdev = adapter->pdev;
677 union e1000_rx_desc_packet_split *rx_desc;
678 struct e1000_buffer *buffer_info;
679 struct e1000_ps_page *ps_page;
680 struct sk_buff *skb;
681 unsigned int i, j;
682
683 i = rx_ring->next_to_use;
684 buffer_info = &rx_ring->buffer_info[i];
685
686 while (cleaned_count--) {
687 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
688
689 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
690 ps_page = &buffer_info->ps_pages[j];
691 if (j >= adapter->rx_ps_pages) {
692 /* all unused desc entries get hw null ptr */
693 rx_desc->read.buffer_addr[j + 1] =
694 ~cpu_to_le64(0);
695 continue;
696 }
697 if (!ps_page->page) {
698 ps_page->page = alloc_page(gfp);
699 if (!ps_page->page) {
700 adapter->alloc_rx_buff_failed++;
701 goto no_buffers;
702 }
703 ps_page->dma = dma_map_page(&pdev->dev,
704 ps_page->page,
705 0, PAGE_SIZE,
706 DMA_FROM_DEVICE);
707 if (dma_mapping_error(&pdev->dev,
708 ps_page->dma)) {
709 dev_err(&adapter->pdev->dev,
710 "Rx DMA page map failed\n");
711 adapter->rx_dma_failed++;
712 goto no_buffers;
713 }
714 }
715 /*
716 * Refresh the desc even if buffer_addrs
717 * didn't change because each write-back
718 * erases this info.
719 */
720 rx_desc->read.buffer_addr[j + 1] =
721 cpu_to_le64(ps_page->dma);
722 }
723
724 skb = __netdev_alloc_skb_ip_align(netdev,
725 adapter->rx_ps_bsize0,
726 gfp);
727
728 if (!skb) {
729 adapter->alloc_rx_buff_failed++;
730 break;
731 }
732
733 buffer_info->skb = skb;
734 buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
735 adapter->rx_ps_bsize0,
736 DMA_FROM_DEVICE);
737 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
738 dev_err(&pdev->dev, "Rx DMA map failed\n");
739 adapter->rx_dma_failed++;
740 /* cleanup skb */
741 dev_kfree_skb_any(skb);
742 buffer_info->skb = NULL;
743 break;
744 }
745
746 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
747
748 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
749 /*
750 * Force memory writes to complete before letting h/w
751 * know there are new descriptors to fetch. (Only
752 * applicable for weak-ordered memory model archs,
753 * such as IA-64).
754 */
755 wmb();
756 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
757 e1000e_update_rdt_wa(rx_ring, i << 1);
758 else
759 writel(i << 1, rx_ring->tail);
760 }
761
762 i++;
763 if (i == rx_ring->count)
764 i = 0;
765 buffer_info = &rx_ring->buffer_info[i];
766 }
767
768 no_buffers:
769 rx_ring->next_to_use = i;
770 }
771
772 /**
773 * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
774 * @rx_ring: Rx descriptor ring
775 * @cleaned_count: number of buffers to allocate this pass
776 **/
777
778 static void e1000_alloc_jumbo_rx_buffers(struct e1000_ring *rx_ring,
779 int cleaned_count, gfp_t gfp)
780 {
781 struct e1000_adapter *adapter = rx_ring->adapter;
782 struct net_device *netdev = adapter->netdev;
783 struct pci_dev *pdev = adapter->pdev;
784 union e1000_rx_desc_extended *rx_desc;
785 struct e1000_buffer *buffer_info;
786 struct sk_buff *skb;
787 unsigned int i;
788 unsigned int bufsz = 256 - 16 /* for skb_reserve */;
789
790 i = rx_ring->next_to_use;
791 buffer_info = &rx_ring->buffer_info[i];
792
793 while (cleaned_count--) {
794 skb = buffer_info->skb;
795 if (skb) {
796 skb_trim(skb, 0);
797 goto check_page;
798 }
799
800 skb = __netdev_alloc_skb_ip_align(netdev, bufsz, gfp);
801 if (unlikely(!skb)) {
802 /* Better luck next round */
803 adapter->alloc_rx_buff_failed++;
804 break;
805 }
806
807 buffer_info->skb = skb;
808 check_page:
809 /* allocate a new page if necessary */
810 if (!buffer_info->page) {
811 buffer_info->page = alloc_page(gfp);
812 if (unlikely(!buffer_info->page)) {
813 adapter->alloc_rx_buff_failed++;
814 break;
815 }
816 }
817
818 if (!buffer_info->dma)
819 buffer_info->dma = dma_map_page(&pdev->dev,
820 buffer_info->page, 0,
821 PAGE_SIZE,
822 DMA_FROM_DEVICE);
823
824 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
825 rx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma);
826
827 if (unlikely(++i == rx_ring->count))
828 i = 0;
829 buffer_info = &rx_ring->buffer_info[i];
830 }
831
832 if (likely(rx_ring->next_to_use != i)) {
833 rx_ring->next_to_use = i;
834 if (unlikely(i-- == 0))
835 i = (rx_ring->count - 1);
836
837 /* Force memory writes to complete before letting h/w
838 * know there are new descriptors to fetch. (Only
839 * applicable for weak-ordered memory model archs,
840 * such as IA-64). */
841 wmb();
842 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
843 e1000e_update_rdt_wa(rx_ring, i);
844 else
845 writel(i, rx_ring->tail);
846 }
847 }
848
849 static inline void e1000_rx_hash(struct net_device *netdev, __le32 rss,
850 struct sk_buff *skb)
851 {
852 if (netdev->features & NETIF_F_RXHASH)
853 skb->rxhash = le32_to_cpu(rss);
854 }
855
856 /**
857 * e1000_clean_rx_irq - Send received data up the network stack
858 * @rx_ring: Rx descriptor ring
859 *
860 * the return value indicates whether actual cleaning was done, there
861 * is no guarantee that everything was cleaned
862 **/
863 static bool e1000_clean_rx_irq(struct e1000_ring *rx_ring, int *work_done,
864 int work_to_do)
865 {
866 struct e1000_adapter *adapter = rx_ring->adapter;
867 struct net_device *netdev = adapter->netdev;
868 struct pci_dev *pdev = adapter->pdev;
869 struct e1000_hw *hw = &adapter->hw;
870 union e1000_rx_desc_extended *rx_desc, *next_rxd;
871 struct e1000_buffer *buffer_info, *next_buffer;
872 u32 length, staterr;
873 unsigned int i;
874 int cleaned_count = 0;
875 bool cleaned = false;
876 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
877
878 i = rx_ring->next_to_clean;
879 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
880 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
881 buffer_info = &rx_ring->buffer_info[i];
882
883 while (staterr & E1000_RXD_STAT_DD) {
884 struct sk_buff *skb;
885
886 if (*work_done >= work_to_do)
887 break;
888 (*work_done)++;
889 rmb(); /* read descriptor and rx_buffer_info after status DD */
890
891 skb = buffer_info->skb;
892 buffer_info->skb = NULL;
893
894 prefetch(skb->data - NET_IP_ALIGN);
895
896 i++;
897 if (i == rx_ring->count)
898 i = 0;
899 next_rxd = E1000_RX_DESC_EXT(*rx_ring, i);
900 prefetch(next_rxd);
901
902 next_buffer = &rx_ring->buffer_info[i];
903
904 cleaned = true;
905 cleaned_count++;
906 dma_unmap_single(&pdev->dev,
907 buffer_info->dma,
908 adapter->rx_buffer_len,
909 DMA_FROM_DEVICE);
910 buffer_info->dma = 0;
911
912 length = le16_to_cpu(rx_desc->wb.upper.length);
913
914 /*
915 * !EOP means multiple descriptors were used to store a single
916 * packet, if that's the case we need to toss it. In fact, we
917 * need to toss every packet with the EOP bit clear and the
918 * next frame that _does_ have the EOP bit set, as it is by
919 * definition only a frame fragment
920 */
921 if (unlikely(!(staterr & E1000_RXD_STAT_EOP)))
922 adapter->flags2 |= FLAG2_IS_DISCARDING;
923
924 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
925 /* All receives must fit into a single buffer */
926 e_dbg("Receive packet consumed multiple buffers\n");
927 /* recycle */
928 buffer_info->skb = skb;
929 if (staterr & E1000_RXD_STAT_EOP)
930 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
931 goto next_desc;
932 }
933
934 if (unlikely((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) &&
935 !(netdev->features & NETIF_F_RXALL))) {
936 /* recycle */
937 buffer_info->skb = skb;
938 goto next_desc;
939 }
940
941 /* adjust length to remove Ethernet CRC */
942 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) {
943 /* If configured to store CRC, don't subtract FCS,
944 * but keep the FCS bytes out of the total_rx_bytes
945 * counter
946 */
947 if (netdev->features & NETIF_F_RXFCS)
948 total_rx_bytes -= 4;
949 else
950 length -= 4;
951 }
952
953 total_rx_bytes += length;
954 total_rx_packets++;
955
956 /*
957 * code added for copybreak, this should improve
958 * performance for small packets with large amounts
959 * of reassembly being done in the stack
960 */
961 if (length < copybreak) {
962 struct sk_buff *new_skb =
963 netdev_alloc_skb_ip_align(netdev, length);
964 if (new_skb) {
965 skb_copy_to_linear_data_offset(new_skb,
966 -NET_IP_ALIGN,
967 (skb->data -
968 NET_IP_ALIGN),
969 (length +
970 NET_IP_ALIGN));
971 /* save the skb in buffer_info as good */
972 buffer_info->skb = skb;
973 skb = new_skb;
974 }
975 /* else just continue with the old one */
976 }
977 /* end copybreak code */
978 skb_put(skb, length);
979
980 /* Receive Checksum Offload */
981 e1000_rx_checksum(adapter, staterr,
982 rx_desc->wb.lower.hi_dword.csum_ip.csum, skb);
983
984 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb);
985
986 e1000_receive_skb(adapter, netdev, skb, staterr,
987 rx_desc->wb.upper.vlan);
988
989 next_desc:
990 rx_desc->wb.upper.status_error &= cpu_to_le32(~0xFF);
991
992 /* return some buffers to hardware, one at a time is too slow */
993 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
994 adapter->alloc_rx_buf(rx_ring, cleaned_count,
995 GFP_ATOMIC);
996 cleaned_count = 0;
997 }
998
999 /* use prefetched values */
1000 rx_desc = next_rxd;
1001 buffer_info = next_buffer;
1002
1003 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1004 }
1005 rx_ring->next_to_clean = i;
1006
1007 cleaned_count = e1000_desc_unused(rx_ring);
1008 if (cleaned_count)
1009 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC);
1010
1011 adapter->total_rx_bytes += total_rx_bytes;
1012 adapter->total_rx_packets += total_rx_packets;
1013 return cleaned;
1014 }
1015
1016 static void e1000_put_txbuf(struct e1000_ring *tx_ring,
1017 struct e1000_buffer *buffer_info)
1018 {
1019 struct e1000_adapter *adapter = tx_ring->adapter;
1020
1021 if (buffer_info->dma) {
1022 if (buffer_info->mapped_as_page)
1023 dma_unmap_page(&adapter->pdev->dev, buffer_info->dma,
1024 buffer_info->length, DMA_TO_DEVICE);
1025 else
1026 dma_unmap_single(&adapter->pdev->dev, buffer_info->dma,
1027 buffer_info->length, DMA_TO_DEVICE);
1028 buffer_info->dma = 0;
1029 }
1030 if (buffer_info->skb) {
1031 dev_kfree_skb_any(buffer_info->skb);
1032 buffer_info->skb = NULL;
1033 }
1034 buffer_info->time_stamp = 0;
1035 }
1036
1037 static void e1000_print_hw_hang(struct work_struct *work)
1038 {
1039 struct e1000_adapter *adapter = container_of(work,
1040 struct e1000_adapter,
1041 print_hang_task);
1042 struct net_device *netdev = adapter->netdev;
1043 struct e1000_ring *tx_ring = adapter->tx_ring;
1044 unsigned int i = tx_ring->next_to_clean;
1045 unsigned int eop = tx_ring->buffer_info[i].next_to_watch;
1046 struct e1000_tx_desc *eop_desc = E1000_TX_DESC(*tx_ring, eop);
1047 struct e1000_hw *hw = &adapter->hw;
1048 u16 phy_status, phy_1000t_status, phy_ext_status;
1049 u16 pci_status;
1050
1051 if (test_bit(__E1000_DOWN, &adapter->state))
1052 return;
1053
1054 if (!adapter->tx_hang_recheck &&
1055 (adapter->flags2 & FLAG2_DMA_BURST)) {
1056 /*
1057 * May be block on write-back, flush and detect again
1058 * flush pending descriptor writebacks to memory
1059 */
1060 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
1061 /* execute the writes immediately */
1062 e1e_flush();
1063 adapter->tx_hang_recheck = true;
1064 return;
1065 }
1066 /* Real hang detected */
1067 adapter->tx_hang_recheck = false;
1068 netif_stop_queue(netdev);
1069
1070 e1e_rphy(hw, PHY_STATUS, &phy_status);
1071 e1e_rphy(hw, PHY_1000T_STATUS, &phy_1000t_status);
1072 e1e_rphy(hw, PHY_EXT_STATUS, &phy_ext_status);
1073
1074 pci_read_config_word(adapter->pdev, PCI_STATUS, &pci_status);
1075
1076 /* detected Hardware unit hang */
1077 e_err("Detected Hardware Unit Hang:\n"
1078 " TDH <%x>\n"
1079 " TDT <%x>\n"
1080 " next_to_use <%x>\n"
1081 " next_to_clean <%x>\n"
1082 "buffer_info[next_to_clean]:\n"
1083 " time_stamp <%lx>\n"
1084 " next_to_watch <%x>\n"
1085 " jiffies <%lx>\n"
1086 " next_to_watch.status <%x>\n"
1087 "MAC Status <%x>\n"
1088 "PHY Status <%x>\n"
1089 "PHY 1000BASE-T Status <%x>\n"
1090 "PHY Extended Status <%x>\n"
1091 "PCI Status <%x>\n",
1092 readl(tx_ring->head),
1093 readl(tx_ring->tail),
1094 tx_ring->next_to_use,
1095 tx_ring->next_to_clean,
1096 tx_ring->buffer_info[eop].time_stamp,
1097 eop,
1098 jiffies,
1099 eop_desc->upper.fields.status,
1100 er32(STATUS),
1101 phy_status,
1102 phy_1000t_status,
1103 phy_ext_status,
1104 pci_status);
1105 }
1106
1107 /**
1108 * e1000_clean_tx_irq - Reclaim resources after transmit completes
1109 * @tx_ring: Tx descriptor ring
1110 *
1111 * the return value indicates whether actual cleaning was done, there
1112 * is no guarantee that everything was cleaned
1113 **/
1114 static bool e1000_clean_tx_irq(struct e1000_ring *tx_ring)
1115 {
1116 struct e1000_adapter *adapter = tx_ring->adapter;
1117 struct net_device *netdev = adapter->netdev;
1118 struct e1000_hw *hw = &adapter->hw;
1119 struct e1000_tx_desc *tx_desc, *eop_desc;
1120 struct e1000_buffer *buffer_info;
1121 unsigned int i, eop;
1122 unsigned int count = 0;
1123 unsigned int total_tx_bytes = 0, total_tx_packets = 0;
1124 unsigned int bytes_compl = 0, pkts_compl = 0;
1125
1126 i = tx_ring->next_to_clean;
1127 eop = tx_ring->buffer_info[i].next_to_watch;
1128 eop_desc = E1000_TX_DESC(*tx_ring, eop);
1129
1130 while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
1131 (count < tx_ring->count)) {
1132 bool cleaned = false;
1133 rmb(); /* read buffer_info after eop_desc */
1134 for (; !cleaned; count++) {
1135 tx_desc = E1000_TX_DESC(*tx_ring, i);
1136 buffer_info = &tx_ring->buffer_info[i];
1137 cleaned = (i == eop);
1138
1139 if (cleaned) {
1140 total_tx_packets += buffer_info->segs;
1141 total_tx_bytes += buffer_info->bytecount;
1142 if (buffer_info->skb) {
1143 bytes_compl += buffer_info->skb->len;
1144 pkts_compl++;
1145 }
1146 }
1147
1148 e1000_put_txbuf(tx_ring, buffer_info);
1149 tx_desc->upper.data = 0;
1150
1151 i++;
1152 if (i == tx_ring->count)
1153 i = 0;
1154 }
1155
1156 if (i == tx_ring->next_to_use)
1157 break;
1158 eop = tx_ring->buffer_info[i].next_to_watch;
1159 eop_desc = E1000_TX_DESC(*tx_ring, eop);
1160 }
1161
1162 tx_ring->next_to_clean = i;
1163
1164 netdev_completed_queue(netdev, pkts_compl, bytes_compl);
1165
1166 #define TX_WAKE_THRESHOLD 32
1167 if (count && netif_carrier_ok(netdev) &&
1168 e1000_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD) {
1169 /* Make sure that anybody stopping the queue after this
1170 * sees the new next_to_clean.
1171 */
1172 smp_mb();
1173
1174 if (netif_queue_stopped(netdev) &&
1175 !(test_bit(__E1000_DOWN, &adapter->state))) {
1176 netif_wake_queue(netdev);
1177 ++adapter->restart_queue;
1178 }
1179 }
1180
1181 if (adapter->detect_tx_hung) {
1182 /*
1183 * Detect a transmit hang in hardware, this serializes the
1184 * check with the clearing of time_stamp and movement of i
1185 */
1186 adapter->detect_tx_hung = false;
1187 if (tx_ring->buffer_info[i].time_stamp &&
1188 time_after(jiffies, tx_ring->buffer_info[i].time_stamp
1189 + (adapter->tx_timeout_factor * HZ)) &&
1190 !(er32(STATUS) & E1000_STATUS_TXOFF))
1191 schedule_work(&adapter->print_hang_task);
1192 else
1193 adapter->tx_hang_recheck = false;
1194 }
1195 adapter->total_tx_bytes += total_tx_bytes;
1196 adapter->total_tx_packets += total_tx_packets;
1197 return count < tx_ring->count;
1198 }
1199
1200 /**
1201 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
1202 * @rx_ring: Rx descriptor ring
1203 *
1204 * the return value indicates whether actual cleaning was done, there
1205 * is no guarantee that everything was cleaned
1206 **/
1207 static bool e1000_clean_rx_irq_ps(struct e1000_ring *rx_ring, int *work_done,
1208 int work_to_do)
1209 {
1210 struct e1000_adapter *adapter = rx_ring->adapter;
1211 struct e1000_hw *hw = &adapter->hw;
1212 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
1213 struct net_device *netdev = adapter->netdev;
1214 struct pci_dev *pdev = adapter->pdev;
1215 struct e1000_buffer *buffer_info, *next_buffer;
1216 struct e1000_ps_page *ps_page;
1217 struct sk_buff *skb;
1218 unsigned int i, j;
1219 u32 length, staterr;
1220 int cleaned_count = 0;
1221 bool cleaned = false;
1222 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
1223
1224 i = rx_ring->next_to_clean;
1225 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
1226 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1227 buffer_info = &rx_ring->buffer_info[i];
1228
1229 while (staterr & E1000_RXD_STAT_DD) {
1230 if (*work_done >= work_to_do)
1231 break;
1232 (*work_done)++;
1233 skb = buffer_info->skb;
1234 rmb(); /* read descriptor and rx_buffer_info after status DD */
1235
1236 /* in the packet split case this is header only */
1237 prefetch(skb->data - NET_IP_ALIGN);
1238
1239 i++;
1240 if (i == rx_ring->count)
1241 i = 0;
1242 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
1243 prefetch(next_rxd);
1244
1245 next_buffer = &rx_ring->buffer_info[i];
1246
1247 cleaned = true;
1248 cleaned_count++;
1249 dma_unmap_single(&pdev->dev, buffer_info->dma,
1250 adapter->rx_ps_bsize0, DMA_FROM_DEVICE);
1251 buffer_info->dma = 0;
1252
1253 /* see !EOP comment in other Rx routine */
1254 if (!(staterr & E1000_RXD_STAT_EOP))
1255 adapter->flags2 |= FLAG2_IS_DISCARDING;
1256
1257 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
1258 e_dbg("Packet Split buffers didn't pick up the full packet\n");
1259 dev_kfree_skb_irq(skb);
1260 if (staterr & E1000_RXD_STAT_EOP)
1261 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
1262 goto next_desc;
1263 }
1264
1265 if (unlikely((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) &&
1266 !(netdev->features & NETIF_F_RXALL))) {
1267 dev_kfree_skb_irq(skb);
1268 goto next_desc;
1269 }
1270
1271 length = le16_to_cpu(rx_desc->wb.middle.length0);
1272
1273 if (!length) {
1274 e_dbg("Last part of the packet spanning multiple descriptors\n");
1275 dev_kfree_skb_irq(skb);
1276 goto next_desc;
1277 }
1278
1279 /* Good Receive */
1280 skb_put(skb, length);
1281
1282 {
1283 /*
1284 * this looks ugly, but it seems compiler issues make
1285 * it more efficient than reusing j
1286 */
1287 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
1288
1289 /*
1290 * page alloc/put takes too long and effects small
1291 * packet throughput, so unsplit small packets and
1292 * save the alloc/put only valid in softirq (napi)
1293 * context to call kmap_*
1294 */
1295 if (l1 && (l1 <= copybreak) &&
1296 ((length + l1) <= adapter->rx_ps_bsize0)) {
1297 u8 *vaddr;
1298
1299 ps_page = &buffer_info->ps_pages[0];
1300
1301 /*
1302 * there is no documentation about how to call
1303 * kmap_atomic, so we can't hold the mapping
1304 * very long
1305 */
1306 dma_sync_single_for_cpu(&pdev->dev,
1307 ps_page->dma,
1308 PAGE_SIZE,
1309 DMA_FROM_DEVICE);
1310 vaddr = kmap_atomic(ps_page->page);
1311 memcpy(skb_tail_pointer(skb), vaddr, l1);
1312 kunmap_atomic(vaddr);
1313 dma_sync_single_for_device(&pdev->dev,
1314 ps_page->dma,
1315 PAGE_SIZE,
1316 DMA_FROM_DEVICE);
1317
1318 /* remove the CRC */
1319 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) {
1320 if (!(netdev->features & NETIF_F_RXFCS))
1321 l1 -= 4;
1322 }
1323
1324 skb_put(skb, l1);
1325 goto copydone;
1326 } /* if */
1327 }
1328
1329 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
1330 length = le16_to_cpu(rx_desc->wb.upper.length[j]);
1331 if (!length)
1332 break;
1333
1334 ps_page = &buffer_info->ps_pages[j];
1335 dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1336 DMA_FROM_DEVICE);
1337 ps_page->dma = 0;
1338 skb_fill_page_desc(skb, j, ps_page->page, 0, length);
1339 ps_page->page = NULL;
1340 skb->len += length;
1341 skb->data_len += length;
1342 skb->truesize += PAGE_SIZE;
1343 }
1344
1345 /* strip the ethernet crc, problem is we're using pages now so
1346 * this whole operation can get a little cpu intensive
1347 */
1348 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) {
1349 if (!(netdev->features & NETIF_F_RXFCS))
1350 pskb_trim(skb, skb->len - 4);
1351 }
1352
1353 copydone:
1354 total_rx_bytes += skb->len;
1355 total_rx_packets++;
1356
1357 e1000_rx_checksum(adapter, staterr,
1358 rx_desc->wb.lower.hi_dword.csum_ip.csum, skb);
1359
1360 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb);
1361
1362 if (rx_desc->wb.upper.header_status &
1363 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP))
1364 adapter->rx_hdr_split++;
1365
1366 e1000_receive_skb(adapter, netdev, skb,
1367 staterr, rx_desc->wb.middle.vlan);
1368
1369 next_desc:
1370 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
1371 buffer_info->skb = NULL;
1372
1373 /* return some buffers to hardware, one at a time is too slow */
1374 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
1375 adapter->alloc_rx_buf(rx_ring, cleaned_count,
1376 GFP_ATOMIC);
1377 cleaned_count = 0;
1378 }
1379
1380 /* use prefetched values */
1381 rx_desc = next_rxd;
1382 buffer_info = next_buffer;
1383
1384 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1385 }
1386 rx_ring->next_to_clean = i;
1387
1388 cleaned_count = e1000_desc_unused(rx_ring);
1389 if (cleaned_count)
1390 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC);
1391
1392 adapter->total_rx_bytes += total_rx_bytes;
1393 adapter->total_rx_packets += total_rx_packets;
1394 return cleaned;
1395 }
1396
1397 /**
1398 * e1000_consume_page - helper function
1399 **/
1400 static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb,
1401 u16 length)
1402 {
1403 bi->page = NULL;
1404 skb->len += length;
1405 skb->data_len += length;
1406 skb->truesize += PAGE_SIZE;
1407 }
1408
1409 /**
1410 * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy
1411 * @adapter: board private structure
1412 *
1413 * the return value indicates whether actual cleaning was done, there
1414 * is no guarantee that everything was cleaned
1415 **/
1416 static bool e1000_clean_jumbo_rx_irq(struct e1000_ring *rx_ring, int *work_done,
1417 int work_to_do)
1418 {
1419 struct e1000_adapter *adapter = rx_ring->adapter;
1420 struct net_device *netdev = adapter->netdev;
1421 struct pci_dev *pdev = adapter->pdev;
1422 union e1000_rx_desc_extended *rx_desc, *next_rxd;
1423 struct e1000_buffer *buffer_info, *next_buffer;
1424 u32 length, staterr;
1425 unsigned int i;
1426 int cleaned_count = 0;
1427 bool cleaned = false;
1428 unsigned int total_rx_bytes=0, total_rx_packets=0;
1429
1430 i = rx_ring->next_to_clean;
1431 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
1432 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1433 buffer_info = &rx_ring->buffer_info[i];
1434
1435 while (staterr & E1000_RXD_STAT_DD) {
1436 struct sk_buff *skb;
1437
1438 if (*work_done >= work_to_do)
1439 break;
1440 (*work_done)++;
1441 rmb(); /* read descriptor and rx_buffer_info after status DD */
1442
1443 skb = buffer_info->skb;
1444 buffer_info->skb = NULL;
1445
1446 ++i;
1447 if (i == rx_ring->count)
1448 i = 0;
1449 next_rxd = E1000_RX_DESC_EXT(*rx_ring, i);
1450 prefetch(next_rxd);
1451
1452 next_buffer = &rx_ring->buffer_info[i];
1453
1454 cleaned = true;
1455 cleaned_count++;
1456 dma_unmap_page(&pdev->dev, buffer_info->dma, PAGE_SIZE,
1457 DMA_FROM_DEVICE);
1458 buffer_info->dma = 0;
1459
1460 length = le16_to_cpu(rx_desc->wb.upper.length);
1461
1462 /* errors is only valid for DD + EOP descriptors */
1463 if (unlikely((staterr & E1000_RXD_STAT_EOP) &&
1464 ((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) &&
1465 !(netdev->features & NETIF_F_RXALL)))) {
1466 /* recycle both page and skb */
1467 buffer_info->skb = skb;
1468 /* an error means any chain goes out the window too */
1469 if (rx_ring->rx_skb_top)
1470 dev_kfree_skb_irq(rx_ring->rx_skb_top);
1471 rx_ring->rx_skb_top = NULL;
1472 goto next_desc;
1473 }
1474
1475 #define rxtop (rx_ring->rx_skb_top)
1476 if (!(staterr & E1000_RXD_STAT_EOP)) {
1477 /* this descriptor is only the beginning (or middle) */
1478 if (!rxtop) {
1479 /* this is the beginning of a chain */
1480 rxtop = skb;
1481 skb_fill_page_desc(rxtop, 0, buffer_info->page,
1482 0, length);
1483 } else {
1484 /* this is the middle of a chain */
1485 skb_fill_page_desc(rxtop,
1486 skb_shinfo(rxtop)->nr_frags,
1487 buffer_info->page, 0, length);
1488 /* re-use the skb, only consumed the page */
1489 buffer_info->skb = skb;
1490 }
1491 e1000_consume_page(buffer_info, rxtop, length);
1492 goto next_desc;
1493 } else {
1494 if (rxtop) {
1495 /* end of the chain */
1496 skb_fill_page_desc(rxtop,
1497 skb_shinfo(rxtop)->nr_frags,
1498 buffer_info->page, 0, length);
1499 /* re-use the current skb, we only consumed the
1500 * page */
1501 buffer_info->skb = skb;
1502 skb = rxtop;
1503 rxtop = NULL;
1504 e1000_consume_page(buffer_info, skb, length);
1505 } else {
1506 /* no chain, got EOP, this buf is the packet
1507 * copybreak to save the put_page/alloc_page */
1508 if (length <= copybreak &&
1509 skb_tailroom(skb) >= length) {
1510 u8 *vaddr;
1511 vaddr = kmap_atomic(buffer_info->page);
1512 memcpy(skb_tail_pointer(skb), vaddr,
1513 length);
1514 kunmap_atomic(vaddr);
1515 /* re-use the page, so don't erase
1516 * buffer_info->page */
1517 skb_put(skb, length);
1518 } else {
1519 skb_fill_page_desc(skb, 0,
1520 buffer_info->page, 0,
1521 length);
1522 e1000_consume_page(buffer_info, skb,
1523 length);
1524 }
1525 }
1526 }
1527
1528 /* Receive Checksum Offload XXX recompute due to CRC strip? */
1529 e1000_rx_checksum(adapter, staterr,
1530 rx_desc->wb.lower.hi_dword.csum_ip.csum, skb);
1531
1532 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb);
1533
1534 /* probably a little skewed due to removing CRC */
1535 total_rx_bytes += skb->len;
1536 total_rx_packets++;
1537
1538 /* eth type trans needs skb->data to point to something */
1539 if (!pskb_may_pull(skb, ETH_HLEN)) {
1540 e_err("pskb_may_pull failed.\n");
1541 dev_kfree_skb_irq(skb);
1542 goto next_desc;
1543 }
1544
1545 e1000_receive_skb(adapter, netdev, skb, staterr,
1546 rx_desc->wb.upper.vlan);
1547
1548 next_desc:
1549 rx_desc->wb.upper.status_error &= cpu_to_le32(~0xFF);
1550
1551 /* return some buffers to hardware, one at a time is too slow */
1552 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
1553 adapter->alloc_rx_buf(rx_ring, cleaned_count,
1554 GFP_ATOMIC);
1555 cleaned_count = 0;
1556 }
1557
1558 /* use prefetched values */
1559 rx_desc = next_rxd;
1560 buffer_info = next_buffer;
1561
1562 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1563 }
1564 rx_ring->next_to_clean = i;
1565
1566 cleaned_count = e1000_desc_unused(rx_ring);
1567 if (cleaned_count)
1568 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC);
1569
1570 adapter->total_rx_bytes += total_rx_bytes;
1571 adapter->total_rx_packets += total_rx_packets;
1572 return cleaned;
1573 }
1574
1575 /**
1576 * e1000_clean_rx_ring - Free Rx Buffers per Queue
1577 * @rx_ring: Rx descriptor ring
1578 **/
1579 static void e1000_clean_rx_ring(struct e1000_ring *rx_ring)
1580 {
1581 struct e1000_adapter *adapter = rx_ring->adapter;
1582 struct e1000_buffer *buffer_info;
1583 struct e1000_ps_page *ps_page;
1584 struct pci_dev *pdev = adapter->pdev;
1585 unsigned int i, j;
1586
1587 /* Free all the Rx ring sk_buffs */
1588 for (i = 0; i < rx_ring->count; i++) {
1589 buffer_info = &rx_ring->buffer_info[i];
1590 if (buffer_info->dma) {
1591 if (adapter->clean_rx == e1000_clean_rx_irq)
1592 dma_unmap_single(&pdev->dev, buffer_info->dma,
1593 adapter->rx_buffer_len,
1594 DMA_FROM_DEVICE);
1595 else if (adapter->clean_rx == e1000_clean_jumbo_rx_irq)
1596 dma_unmap_page(&pdev->dev, buffer_info->dma,
1597 PAGE_SIZE,
1598 DMA_FROM_DEVICE);
1599 else if (adapter->clean_rx == e1000_clean_rx_irq_ps)
1600 dma_unmap_single(&pdev->dev, buffer_info->dma,
1601 adapter->rx_ps_bsize0,
1602 DMA_FROM_DEVICE);
1603 buffer_info->dma = 0;
1604 }
1605
1606 if (buffer_info->page) {
1607 put_page(buffer_info->page);
1608 buffer_info->page = NULL;
1609 }
1610
1611 if (buffer_info->skb) {
1612 dev_kfree_skb(buffer_info->skb);
1613 buffer_info->skb = NULL;
1614 }
1615
1616 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
1617 ps_page = &buffer_info->ps_pages[j];
1618 if (!ps_page->page)
1619 break;
1620 dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1621 DMA_FROM_DEVICE);
1622 ps_page->dma = 0;
1623 put_page(ps_page->page);
1624 ps_page->page = NULL;
1625 }
1626 }
1627
1628 /* there also may be some cached data from a chained receive */
1629 if (rx_ring->rx_skb_top) {
1630 dev_kfree_skb(rx_ring->rx_skb_top);
1631 rx_ring->rx_skb_top = NULL;
1632 }
1633
1634 /* Zero out the descriptor ring */
1635 memset(rx_ring->desc, 0, rx_ring->size);
1636
1637 rx_ring->next_to_clean = 0;
1638 rx_ring->next_to_use = 0;
1639 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
1640
1641 writel(0, rx_ring->head);
1642 writel(0, rx_ring->tail);
1643 }
1644
1645 static void e1000e_downshift_workaround(struct work_struct *work)
1646 {
1647 struct e1000_adapter *adapter = container_of(work,
1648 struct e1000_adapter, downshift_task);
1649
1650 if (test_bit(__E1000_DOWN, &adapter->state))
1651 return;
1652
1653 e1000e_gig_downshift_workaround_ich8lan(&adapter->hw);
1654 }
1655
1656 /**
1657 * e1000_intr_msi - Interrupt Handler
1658 * @irq: interrupt number
1659 * @data: pointer to a network interface device structure
1660 **/
1661 static irqreturn_t e1000_intr_msi(int irq, void *data)
1662 {
1663 struct net_device *netdev = data;
1664 struct e1000_adapter *adapter = netdev_priv(netdev);
1665 struct e1000_hw *hw = &adapter->hw;
1666 u32 icr = er32(ICR);
1667
1668 /*
1669 * read ICR disables interrupts using IAM
1670 */
1671
1672 if (icr & E1000_ICR_LSC) {
1673 hw->mac.get_link_status = true;
1674 /*
1675 * ICH8 workaround-- Call gig speed drop workaround on cable
1676 * disconnect (LSC) before accessing any PHY registers
1677 */
1678 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1679 (!(er32(STATUS) & E1000_STATUS_LU)))
1680 schedule_work(&adapter->downshift_task);
1681
1682 /*
1683 * 80003ES2LAN workaround-- For packet buffer work-around on
1684 * link down event; disable receives here in the ISR and reset
1685 * adapter in watchdog
1686 */
1687 if (netif_carrier_ok(netdev) &&
1688 adapter->flags & FLAG_RX_NEEDS_RESTART) {
1689 /* disable receives */
1690 u32 rctl = er32(RCTL);
1691 ew32(RCTL, rctl & ~E1000_RCTL_EN);
1692 adapter->flags |= FLAG_RX_RESTART_NOW;
1693 }
1694 /* guard against interrupt when we're going down */
1695 if (!test_bit(__E1000_DOWN, &adapter->state))
1696 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1697 }
1698
1699 if (napi_schedule_prep(&adapter->napi)) {
1700 adapter->total_tx_bytes = 0;
1701 adapter->total_tx_packets = 0;
1702 adapter->total_rx_bytes = 0;
1703 adapter->total_rx_packets = 0;
1704 __napi_schedule(&adapter->napi);
1705 }
1706
1707 return IRQ_HANDLED;
1708 }
1709
1710 /**
1711 * e1000_intr - Interrupt Handler
1712 * @irq: interrupt number
1713 * @data: pointer to a network interface device structure
1714 **/
1715 static irqreturn_t e1000_intr(int irq, void *data)
1716 {
1717 struct net_device *netdev = data;
1718 struct e1000_adapter *adapter = netdev_priv(netdev);
1719 struct e1000_hw *hw = &adapter->hw;
1720 u32 rctl, icr = er32(ICR);
1721
1722 if (!icr || test_bit(__E1000_DOWN, &adapter->state))
1723 return IRQ_NONE; /* Not our interrupt */
1724
1725 /*
1726 * IMS will not auto-mask if INT_ASSERTED is not set, and if it is
1727 * not set, then the adapter didn't send an interrupt
1728 */
1729 if (!(icr & E1000_ICR_INT_ASSERTED))
1730 return IRQ_NONE;
1731
1732 /*
1733 * Interrupt Auto-Mask...upon reading ICR,
1734 * interrupts are masked. No need for the
1735 * IMC write
1736 */
1737
1738 if (icr & E1000_ICR_LSC) {
1739 hw->mac.get_link_status = true;
1740 /*
1741 * ICH8 workaround-- Call gig speed drop workaround on cable
1742 * disconnect (LSC) before accessing any PHY registers
1743 */
1744 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1745 (!(er32(STATUS) & E1000_STATUS_LU)))
1746 schedule_work(&adapter->downshift_task);
1747
1748 /*
1749 * 80003ES2LAN workaround--
1750 * For packet buffer work-around on link down event;
1751 * disable receives here in the ISR and
1752 * reset adapter in watchdog
1753 */
1754 if (netif_carrier_ok(netdev) &&
1755 (adapter->flags & FLAG_RX_NEEDS_RESTART)) {
1756 /* disable receives */
1757 rctl = er32(RCTL);
1758 ew32(RCTL, rctl & ~E1000_RCTL_EN);
1759 adapter->flags |= FLAG_RX_RESTART_NOW;
1760 }
1761 /* guard against interrupt when we're going down */
1762 if (!test_bit(__E1000_DOWN, &adapter->state))
1763 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1764 }
1765
1766 if (napi_schedule_prep(&adapter->napi)) {
1767 adapter->total_tx_bytes = 0;
1768 adapter->total_tx_packets = 0;
1769 adapter->total_rx_bytes = 0;
1770 adapter->total_rx_packets = 0;
1771 __napi_schedule(&adapter->napi);
1772 }
1773
1774 return IRQ_HANDLED;
1775 }
1776
1777 static irqreturn_t e1000_msix_other(int irq, void *data)
1778 {
1779 struct net_device *netdev = data;
1780 struct e1000_adapter *adapter = netdev_priv(netdev);
1781 struct e1000_hw *hw = &adapter->hw;
1782 u32 icr = er32(ICR);
1783
1784 if (!(icr & E1000_ICR_INT_ASSERTED)) {
1785 if (!test_bit(__E1000_DOWN, &adapter->state))
1786 ew32(IMS, E1000_IMS_OTHER);
1787 return IRQ_NONE;
1788 }
1789
1790 if (icr & adapter->eiac_mask)
1791 ew32(ICS, (icr & adapter->eiac_mask));
1792
1793 if (icr & E1000_ICR_OTHER) {
1794 if (!(icr & E1000_ICR_LSC))
1795 goto no_link_interrupt;
1796 hw->mac.get_link_status = true;
1797 /* guard against interrupt when we're going down */
1798 if (!test_bit(__E1000_DOWN, &adapter->state))
1799 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1800 }
1801
1802 no_link_interrupt:
1803 if (!test_bit(__E1000_DOWN, &adapter->state))
1804 ew32(IMS, E1000_IMS_LSC | E1000_IMS_OTHER);
1805
1806 return IRQ_HANDLED;
1807 }
1808
1809
1810 static irqreturn_t e1000_intr_msix_tx(int irq, void *data)
1811 {
1812 struct net_device *netdev = data;
1813 struct e1000_adapter *adapter = netdev_priv(netdev);
1814 struct e1000_hw *hw = &adapter->hw;
1815 struct e1000_ring *tx_ring = adapter->tx_ring;
1816
1817
1818 adapter->total_tx_bytes = 0;
1819 adapter->total_tx_packets = 0;
1820
1821 if (!e1000_clean_tx_irq(tx_ring))
1822 /* Ring was not completely cleaned, so fire another interrupt */
1823 ew32(ICS, tx_ring->ims_val);
1824
1825 return IRQ_HANDLED;
1826 }
1827
1828 static irqreturn_t e1000_intr_msix_rx(int irq, void *data)
1829 {
1830 struct net_device *netdev = data;
1831 struct e1000_adapter *adapter = netdev_priv(netdev);
1832 struct e1000_ring *rx_ring = adapter->rx_ring;
1833
1834 /* Write the ITR value calculated at the end of the
1835 * previous interrupt.
1836 */
1837 if (rx_ring->set_itr) {
1838 writel(1000000000 / (rx_ring->itr_val * 256),
1839 rx_ring->itr_register);
1840 rx_ring->set_itr = 0;
1841 }
1842
1843 if (napi_schedule_prep(&adapter->napi)) {
1844 adapter->total_rx_bytes = 0;
1845 adapter->total_rx_packets = 0;
1846 __napi_schedule(&adapter->napi);
1847 }
1848 return IRQ_HANDLED;
1849 }
1850
1851 /**
1852 * e1000_configure_msix - Configure MSI-X hardware
1853 *
1854 * e1000_configure_msix sets up the hardware to properly
1855 * generate MSI-X interrupts.
1856 **/
1857 static void e1000_configure_msix(struct e1000_adapter *adapter)
1858 {
1859 struct e1000_hw *hw = &adapter->hw;
1860 struct e1000_ring *rx_ring = adapter->rx_ring;
1861 struct e1000_ring *tx_ring = adapter->tx_ring;
1862 int vector = 0;
1863 u32 ctrl_ext, ivar = 0;
1864
1865 adapter->eiac_mask = 0;
1866
1867 /* Workaround issue with spurious interrupts on 82574 in MSI-X mode */
1868 if (hw->mac.type == e1000_82574) {
1869 u32 rfctl = er32(RFCTL);
1870 rfctl |= E1000_RFCTL_ACK_DIS;
1871 ew32(RFCTL, rfctl);
1872 }
1873
1874 #define E1000_IVAR_INT_ALLOC_VALID 0x8
1875 /* Configure Rx vector */
1876 rx_ring->ims_val = E1000_IMS_RXQ0;
1877 adapter->eiac_mask |= rx_ring->ims_val;
1878 if (rx_ring->itr_val)
1879 writel(1000000000 / (rx_ring->itr_val * 256),
1880 rx_ring->itr_register);
1881 else
1882 writel(1, rx_ring->itr_register);
1883 ivar = E1000_IVAR_INT_ALLOC_VALID | vector;
1884
1885 /* Configure Tx vector */
1886 tx_ring->ims_val = E1000_IMS_TXQ0;
1887 vector++;
1888 if (tx_ring->itr_val)
1889 writel(1000000000 / (tx_ring->itr_val * 256),
1890 tx_ring->itr_register);
1891 else
1892 writel(1, tx_ring->itr_register);
1893 adapter->eiac_mask |= tx_ring->ims_val;
1894 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 8);
1895
1896 /* set vector for Other Causes, e.g. link changes */
1897 vector++;
1898 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 16);
1899 if (rx_ring->itr_val)
1900 writel(1000000000 / (rx_ring->itr_val * 256),
1901 hw->hw_addr + E1000_EITR_82574(vector));
1902 else
1903 writel(1, hw->hw_addr + E1000_EITR_82574(vector));
1904
1905 /* Cause Tx interrupts on every write back */
1906 ivar |= (1 << 31);
1907
1908 ew32(IVAR, ivar);
1909
1910 /* enable MSI-X PBA support */
1911 ctrl_ext = er32(CTRL_EXT);
1912 ctrl_ext |= E1000_CTRL_EXT_PBA_CLR;
1913
1914 /* Auto-Mask Other interrupts upon ICR read */
1915 #define E1000_EIAC_MASK_82574 0x01F00000
1916 ew32(IAM, ~E1000_EIAC_MASK_82574 | E1000_IMS_OTHER);
1917 ctrl_ext |= E1000_CTRL_EXT_EIAME;
1918 ew32(CTRL_EXT, ctrl_ext);
1919 e1e_flush();
1920 }
1921
1922 void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter)
1923 {
1924 if (adapter->msix_entries) {
1925 pci_disable_msix(adapter->pdev);
1926 kfree(adapter->msix_entries);
1927 adapter->msix_entries = NULL;
1928 } else if (adapter->flags & FLAG_MSI_ENABLED) {
1929 pci_disable_msi(adapter->pdev);
1930 adapter->flags &= ~FLAG_MSI_ENABLED;
1931 }
1932 }
1933
1934 /**
1935 * e1000e_set_interrupt_capability - set MSI or MSI-X if supported
1936 *
1937 * Attempt to configure interrupts using the best available
1938 * capabilities of the hardware and kernel.
1939 **/
1940 void e1000e_set_interrupt_capability(struct e1000_adapter *adapter)
1941 {
1942 int err;
1943 int i;
1944
1945 switch (adapter->int_mode) {
1946 case E1000E_INT_MODE_MSIX:
1947 if (adapter->flags & FLAG_HAS_MSIX) {
1948 adapter->num_vectors = 3; /* RxQ0, TxQ0 and other */
1949 adapter->msix_entries = kcalloc(adapter->num_vectors,
1950 sizeof(struct msix_entry),
1951 GFP_KERNEL);
1952 if (adapter->msix_entries) {
1953 for (i = 0; i < adapter->num_vectors; i++)
1954 adapter->msix_entries[i].entry = i;
1955
1956 err = pci_enable_msix(adapter->pdev,
1957 adapter->msix_entries,
1958 adapter->num_vectors);
1959 if (err == 0)
1960 return;
1961 }
1962 /* MSI-X failed, so fall through and try MSI */
1963 e_err("Failed to initialize MSI-X interrupts. Falling back to MSI interrupts.\n");
1964 e1000e_reset_interrupt_capability(adapter);
1965 }
1966 adapter->int_mode = E1000E_INT_MODE_MSI;
1967 /* Fall through */
1968 case E1000E_INT_MODE_MSI:
1969 if (!pci_enable_msi(adapter->pdev)) {
1970 adapter->flags |= FLAG_MSI_ENABLED;
1971 } else {
1972 adapter->int_mode = E1000E_INT_MODE_LEGACY;
1973 e_err("Failed to initialize MSI interrupts. Falling back to legacy interrupts.\n");
1974 }
1975 /* Fall through */
1976 case E1000E_INT_MODE_LEGACY:
1977 /* Don't do anything; this is the system default */
1978 break;
1979 }
1980
1981 /* store the number of vectors being used */
1982 adapter->num_vectors = 1;
1983 }
1984
1985 /**
1986 * e1000_request_msix - Initialize MSI-X interrupts
1987 *
1988 * e1000_request_msix allocates MSI-X vectors and requests interrupts from the
1989 * kernel.
1990 **/
1991 static int e1000_request_msix(struct e1000_adapter *adapter)
1992 {
1993 struct net_device *netdev = adapter->netdev;
1994 int err = 0, vector = 0;
1995
1996 if (strlen(netdev->name) < (IFNAMSIZ - 5))
1997 snprintf(adapter->rx_ring->name,
1998 sizeof(adapter->rx_ring->name) - 1,
1999 "%s-rx-0", netdev->name);
2000 else
2001 memcpy(adapter->rx_ring->name, netdev->name, IFNAMSIZ);
2002 err = request_irq(adapter->msix_entries[vector].vector,
2003 e1000_intr_msix_rx, 0, adapter->rx_ring->name,
2004 netdev);
2005 if (err)
2006 return err;
2007 adapter->rx_ring->itr_register = adapter->hw.hw_addr +
2008 E1000_EITR_82574(vector);
2009 adapter->rx_ring->itr_val = adapter->itr;
2010 vector++;
2011
2012 if (strlen(netdev->name) < (IFNAMSIZ - 5))
2013 snprintf(adapter->tx_ring->name,
2014 sizeof(adapter->tx_ring->name) - 1,
2015 "%s-tx-0", netdev->name);
2016 else
2017 memcpy(adapter->tx_ring->name, netdev->name, IFNAMSIZ);
2018 err = request_irq(adapter->msix_entries[vector].vector,
2019 e1000_intr_msix_tx, 0, adapter->tx_ring->name,
2020 netdev);
2021 if (err)
2022 return err;
2023 adapter->tx_ring->itr_register = adapter->hw.hw_addr +
2024 E1000_EITR_82574(vector);
2025 adapter->tx_ring->itr_val = adapter->itr;
2026 vector++;
2027
2028 err = request_irq(adapter->msix_entries[vector].vector,
2029 e1000_msix_other, 0, netdev->name, netdev);
2030 if (err)
2031 return err;
2032
2033 e1000_configure_msix(adapter);
2034
2035 return 0;
2036 }
2037
2038 /**
2039 * e1000_request_irq - initialize interrupts
2040 *
2041 * Attempts to configure interrupts using the best available
2042 * capabilities of the hardware and kernel.
2043 **/
2044 static int e1000_request_irq(struct e1000_adapter *adapter)
2045 {
2046 struct net_device *netdev = adapter->netdev;
2047 int err;
2048
2049 if (adapter->msix_entries) {
2050 err = e1000_request_msix(adapter);
2051 if (!err)
2052 return err;
2053 /* fall back to MSI */
2054 e1000e_reset_interrupt_capability(adapter);
2055 adapter->int_mode = E1000E_INT_MODE_MSI;
2056 e1000e_set_interrupt_capability(adapter);
2057 }
2058 if (adapter->flags & FLAG_MSI_ENABLED) {
2059 err = request_irq(adapter->pdev->irq, e1000_intr_msi, 0,
2060 netdev->name, netdev);
2061 if (!err)
2062 return err;
2063
2064 /* fall back to legacy interrupt */
2065 e1000e_reset_interrupt_capability(adapter);
2066 adapter->int_mode = E1000E_INT_MODE_LEGACY;
2067 }
2068
2069 err = request_irq(adapter->pdev->irq, e1000_intr, IRQF_SHARED,
2070 netdev->name, netdev);
2071 if (err)
2072 e_err("Unable to allocate interrupt, Error: %d\n", err);
2073
2074 return err;
2075 }
2076
2077 static void e1000_free_irq(struct e1000_adapter *adapter)
2078 {
2079 struct net_device *netdev = adapter->netdev;
2080
2081 if (adapter->msix_entries) {
2082 int vector = 0;
2083
2084 free_irq(adapter->msix_entries[vector].vector, netdev);
2085 vector++;
2086
2087 free_irq(adapter->msix_entries[vector].vector, netdev);
2088 vector++;
2089
2090 /* Other Causes interrupt vector */
2091 free_irq(adapter->msix_entries[vector].vector, netdev);
2092 return;
2093 }
2094
2095 free_irq(adapter->pdev->irq, netdev);
2096 }
2097
2098 /**
2099 * e1000_irq_disable - Mask off interrupt generation on the NIC
2100 **/
2101 static void e1000_irq_disable(struct e1000_adapter *adapter)
2102 {
2103 struct e1000_hw *hw = &adapter->hw;
2104
2105 ew32(IMC, ~0);
2106 if (adapter->msix_entries)
2107 ew32(EIAC_82574, 0);
2108 e1e_flush();
2109
2110 if (adapter->msix_entries) {
2111 int i;
2112 for (i = 0; i < adapter->num_vectors; i++)
2113 synchronize_irq(adapter->msix_entries[i].vector);
2114 } else {
2115 synchronize_irq(adapter->pdev->irq);
2116 }
2117 }
2118
2119 /**
2120 * e1000_irq_enable - Enable default interrupt generation settings
2121 **/
2122 static void e1000_irq_enable(struct e1000_adapter *adapter)
2123 {
2124 struct e1000_hw *hw = &adapter->hw;
2125
2126 if (adapter->msix_entries) {
2127 ew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574);
2128 ew32(IMS, adapter->eiac_mask | E1000_IMS_OTHER | E1000_IMS_LSC);
2129 } else {
2130 ew32(IMS, IMS_ENABLE_MASK);
2131 }
2132 e1e_flush();
2133 }
2134
2135 /**
2136 * e1000e_get_hw_control - get control of the h/w from f/w
2137 * @adapter: address of board private structure
2138 *
2139 * e1000e_get_hw_control sets {CTRL_EXT|SWSM}:DRV_LOAD bit.
2140 * For ASF and Pass Through versions of f/w this means that
2141 * the driver is loaded. For AMT version (only with 82573)
2142 * of the f/w this means that the network i/f is open.
2143 **/
2144 void e1000e_get_hw_control(struct e1000_adapter *adapter)
2145 {
2146 struct e1000_hw *hw = &adapter->hw;
2147 u32 ctrl_ext;
2148 u32 swsm;
2149
2150 /* Let firmware know the driver has taken over */
2151 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
2152 swsm = er32(SWSM);
2153 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD);
2154 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
2155 ctrl_ext = er32(CTRL_EXT);
2156 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
2157 }
2158 }
2159
2160 /**
2161 * e1000e_release_hw_control - release control of the h/w to f/w
2162 * @adapter: address of board private structure
2163 *
2164 * e1000e_release_hw_control resets {CTRL_EXT|SWSM}:DRV_LOAD bit.
2165 * For ASF and Pass Through versions of f/w this means that the
2166 * driver is no longer loaded. For AMT version (only with 82573) i
2167 * of the f/w this means that the network i/f is closed.
2168 *
2169 **/
2170 void e1000e_release_hw_control(struct e1000_adapter *adapter)
2171 {
2172 struct e1000_hw *hw = &adapter->hw;
2173 u32 ctrl_ext;
2174 u32 swsm;
2175
2176 /* Let firmware taken over control of h/w */
2177 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
2178 swsm = er32(SWSM);
2179 ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD);
2180 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
2181 ctrl_ext = er32(CTRL_EXT);
2182 ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
2183 }
2184 }
2185
2186 /**
2187 * @e1000_alloc_ring - allocate memory for a ring structure
2188 **/
2189 static int e1000_alloc_ring_dma(struct e1000_adapter *adapter,
2190 struct e1000_ring *ring)
2191 {
2192 struct pci_dev *pdev = adapter->pdev;
2193
2194 ring->desc = dma_alloc_coherent(&pdev->dev, ring->size, &ring->dma,
2195 GFP_KERNEL);
2196 if (!ring->desc)
2197 return -ENOMEM;
2198
2199 return 0;
2200 }
2201
2202 /**
2203 * e1000e_setup_tx_resources - allocate Tx resources (Descriptors)
2204 * @tx_ring: Tx descriptor ring
2205 *
2206 * Return 0 on success, negative on failure
2207 **/
2208 int e1000e_setup_tx_resources(struct e1000_ring *tx_ring)
2209 {
2210 struct e1000_adapter *adapter = tx_ring->adapter;
2211 int err = -ENOMEM, size;
2212
2213 size = sizeof(struct e1000_buffer) * tx_ring->count;
2214 tx_ring->buffer_info = vzalloc(size);
2215 if (!tx_ring->buffer_info)
2216 goto err;
2217
2218 /* round up to nearest 4K */
2219 tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc);
2220 tx_ring->size = ALIGN(tx_ring->size, 4096);
2221
2222 err = e1000_alloc_ring_dma(adapter, tx_ring);
2223 if (err)
2224 goto err;
2225
2226 tx_ring->next_to_use = 0;
2227 tx_ring->next_to_clean = 0;
2228
2229 return 0;
2230 err:
2231 vfree(tx_ring->buffer_info);
2232 e_err("Unable to allocate memory for the transmit descriptor ring\n");
2233 return err;
2234 }
2235
2236 /**
2237 * e1000e_setup_rx_resources - allocate Rx resources (Descriptors)
2238 * @rx_ring: Rx descriptor ring
2239 *
2240 * Returns 0 on success, negative on failure
2241 **/
2242 int e1000e_setup_rx_resources(struct e1000_ring *rx_ring)
2243 {
2244 struct e1000_adapter *adapter = rx_ring->adapter;
2245 struct e1000_buffer *buffer_info;
2246 int i, size, desc_len, err = -ENOMEM;
2247
2248 size = sizeof(struct e1000_buffer) * rx_ring->count;
2249 rx_ring->buffer_info = vzalloc(size);
2250 if (!rx_ring->buffer_info)
2251 goto err;
2252
2253 for (i = 0; i < rx_ring->count; i++) {
2254 buffer_info = &rx_ring->buffer_info[i];
2255 buffer_info->ps_pages = kcalloc(PS_PAGE_BUFFERS,
2256 sizeof(struct e1000_ps_page),
2257 GFP_KERNEL);
2258 if (!buffer_info->ps_pages)
2259 goto err_pages;
2260 }
2261
2262 desc_len = sizeof(union e1000_rx_desc_packet_split);
2263
2264 /* Round up to nearest 4K */
2265 rx_ring->size = rx_ring->count * desc_len;
2266 rx_ring->size = ALIGN(rx_ring->size, 4096);
2267
2268 err = e1000_alloc_ring_dma(adapter, rx_ring);
2269 if (err)
2270 goto err_pages;
2271
2272 rx_ring->next_to_clean = 0;
2273 rx_ring->next_to_use = 0;
2274 rx_ring->rx_skb_top = NULL;
2275
2276 return 0;
2277
2278 err_pages:
2279 for (i = 0; i < rx_ring->count; i++) {
2280 buffer_info = &rx_ring->buffer_info[i];
2281 kfree(buffer_info->ps_pages);
2282 }
2283 err:
2284 vfree(rx_ring->buffer_info);
2285 e_err("Unable to allocate memory for the receive descriptor ring\n");
2286 return err;
2287 }
2288
2289 /**
2290 * e1000_clean_tx_ring - Free Tx Buffers
2291 * @tx_ring: Tx descriptor ring
2292 **/
2293 static void e1000_clean_tx_ring(struct e1000_ring *tx_ring)
2294 {
2295 struct e1000_adapter *adapter = tx_ring->adapter;
2296 struct e1000_buffer *buffer_info;
2297 unsigned long size;
2298 unsigned int i;
2299
2300 for (i = 0; i < tx_ring->count; i++) {
2301 buffer_info = &tx_ring->buffer_info[i];
2302 e1000_put_txbuf(tx_ring, buffer_info);
2303 }
2304
2305 netdev_reset_queue(adapter->netdev);
2306 size = sizeof(struct e1000_buffer) * tx_ring->count;
2307 memset(tx_ring->buffer_info, 0, size);
2308
2309 memset(tx_ring->desc, 0, tx_ring->size);
2310
2311 tx_ring->next_to_use = 0;
2312 tx_ring->next_to_clean = 0;
2313
2314 writel(0, tx_ring->head);
2315 writel(0, tx_ring->tail);
2316 }
2317
2318 /**
2319 * e1000e_free_tx_resources - Free Tx Resources per Queue
2320 * @tx_ring: Tx descriptor ring
2321 *
2322 * Free all transmit software resources
2323 **/
2324 void e1000e_free_tx_resources(struct e1000_ring *tx_ring)
2325 {
2326 struct e1000_adapter *adapter = tx_ring->adapter;
2327 struct pci_dev *pdev = adapter->pdev;
2328
2329 e1000_clean_tx_ring(tx_ring);
2330
2331 vfree(tx_ring->buffer_info);
2332 tx_ring->buffer_info = NULL;
2333
2334 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
2335 tx_ring->dma);
2336 tx_ring->desc = NULL;
2337 }
2338
2339 /**
2340 * e1000e_free_rx_resources - Free Rx Resources
2341 * @rx_ring: Rx descriptor ring
2342 *
2343 * Free all receive software resources
2344 **/
2345 void e1000e_free_rx_resources(struct e1000_ring *rx_ring)
2346 {
2347 struct e1000_adapter *adapter = rx_ring->adapter;
2348 struct pci_dev *pdev = adapter->pdev;
2349 int i;
2350
2351 e1000_clean_rx_ring(rx_ring);
2352
2353 for (i = 0; i < rx_ring->count; i++)
2354 kfree(rx_ring->buffer_info[i].ps_pages);
2355
2356 vfree(rx_ring->buffer_info);
2357 rx_ring->buffer_info = NULL;
2358
2359 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
2360 rx_ring->dma);
2361 rx_ring->desc = NULL;
2362 }
2363
2364 /**
2365 * e1000_update_itr - update the dynamic ITR value based on statistics
2366 * @adapter: pointer to adapter
2367 * @itr_setting: current adapter->itr
2368 * @packets: the number of packets during this measurement interval
2369 * @bytes: the number of bytes during this measurement interval
2370 *
2371 * Stores a new ITR value based on packets and byte
2372 * counts during the last interrupt. The advantage of per interrupt
2373 * computation is faster updates and more accurate ITR for the current
2374 * traffic pattern. Constants in this function were computed
2375 * based on theoretical maximum wire speed and thresholds were set based
2376 * on testing data as well as attempting to minimize response time
2377 * while increasing bulk throughput. This functionality is controlled
2378 * by the InterruptThrottleRate module parameter.
2379 **/
2380 static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
2381 u16 itr_setting, int packets,
2382 int bytes)
2383 {
2384 unsigned int retval = itr_setting;
2385
2386 if (packets == 0)
2387 return itr_setting;
2388
2389 switch (itr_setting) {
2390 case lowest_latency:
2391 /* handle TSO and jumbo frames */
2392 if (bytes/packets > 8000)
2393 retval = bulk_latency;
2394 else if ((packets < 5) && (bytes > 512))
2395 retval = low_latency;
2396 break;
2397 case low_latency: /* 50 usec aka 20000 ints/s */
2398 if (bytes > 10000) {
2399 /* this if handles the TSO accounting */
2400 if (bytes/packets > 8000)
2401 retval = bulk_latency;
2402 else if ((packets < 10) || ((bytes/packets) > 1200))
2403 retval = bulk_latency;
2404 else if ((packets > 35))
2405 retval = lowest_latency;
2406 } else if (bytes/packets > 2000) {
2407 retval = bulk_latency;
2408 } else if (packets <= 2 && bytes < 512) {
2409 retval = lowest_latency;
2410 }
2411 break;
2412 case bulk_latency: /* 250 usec aka 4000 ints/s */
2413 if (bytes > 25000) {
2414 if (packets > 35)
2415 retval = low_latency;
2416 } else if (bytes < 6000) {
2417 retval = low_latency;
2418 }
2419 break;
2420 }
2421
2422 return retval;
2423 }
2424
2425 static void e1000_set_itr(struct e1000_adapter *adapter)
2426 {
2427 struct e1000_hw *hw = &adapter->hw;
2428 u16 current_itr;
2429 u32 new_itr = adapter->itr;
2430
2431 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2432 if (adapter->link_speed != SPEED_1000) {
2433 current_itr = 0;
2434 new_itr = 4000;
2435 goto set_itr_now;
2436 }
2437
2438 if (adapter->flags2 & FLAG2_DISABLE_AIM) {
2439 new_itr = 0;
2440 goto set_itr_now;
2441 }
2442
2443 adapter->tx_itr = e1000_update_itr(adapter,
2444 adapter->tx_itr,
2445 adapter->total_tx_packets,
2446 adapter->total_tx_bytes);
2447 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2448 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2449 adapter->tx_itr = low_latency;
2450
2451 adapter->rx_itr = e1000_update_itr(adapter,
2452 adapter->rx_itr,
2453 adapter->total_rx_packets,
2454 adapter->total_rx_bytes);
2455 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2456 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2457 adapter->rx_itr = low_latency;
2458
2459 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2460
2461 switch (current_itr) {
2462 /* counts and packets in update_itr are dependent on these numbers */
2463 case lowest_latency:
2464 new_itr = 70000;
2465 break;
2466 case low_latency:
2467 new_itr = 20000; /* aka hwitr = ~200 */
2468 break;
2469 case bulk_latency:
2470 new_itr = 4000;
2471 break;
2472 default:
2473 break;
2474 }
2475
2476 set_itr_now:
2477 if (new_itr != adapter->itr) {
2478 /*
2479 * this attempts to bias the interrupt rate towards Bulk
2480 * by adding intermediate steps when interrupt rate is
2481 * increasing
2482 */
2483 new_itr = new_itr > adapter->itr ?
2484 min(adapter->itr + (new_itr >> 2), new_itr) :
2485 new_itr;
2486 adapter->itr = new_itr;
2487 adapter->rx_ring->itr_val = new_itr;
2488 if (adapter->msix_entries)
2489 adapter->rx_ring->set_itr = 1;
2490 else
2491 if (new_itr)
2492 ew32(ITR, 1000000000 / (new_itr * 256));
2493 else
2494 ew32(ITR, 0);
2495 }
2496 }
2497
2498 /**
2499 * e1000_alloc_queues - Allocate memory for all rings
2500 * @adapter: board private structure to initialize
2501 **/
2502 static int __devinit e1000_alloc_queues(struct e1000_adapter *adapter)
2503 {
2504 int size = sizeof(struct e1000_ring);
2505
2506 adapter->tx_ring = kzalloc(size, GFP_KERNEL);
2507 if (!adapter->tx_ring)
2508 goto err;
2509 adapter->tx_ring->count = adapter->tx_ring_count;
2510 adapter->tx_ring->adapter = adapter;
2511
2512 adapter->rx_ring = kzalloc(size, GFP_KERNEL);
2513 if (!adapter->rx_ring)
2514 goto err;
2515 adapter->rx_ring->count = adapter->rx_ring_count;
2516 adapter->rx_ring->adapter = adapter;
2517
2518 return 0;
2519 err:
2520 e_err("Unable to allocate memory for queues\n");
2521 kfree(adapter->rx_ring);
2522 kfree(adapter->tx_ring);
2523 return -ENOMEM;
2524 }
2525
2526 /**
2527 * e1000_clean - NAPI Rx polling callback
2528 * @napi: struct associated with this polling callback
2529 * @budget: amount of packets driver is allowed to process this poll
2530 **/
2531 static int e1000_clean(struct napi_struct *napi, int budget)
2532 {
2533 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, napi);
2534 struct e1000_hw *hw = &adapter->hw;
2535 struct net_device *poll_dev = adapter->netdev;
2536 int tx_cleaned = 1, work_done = 0;
2537
2538 adapter = netdev_priv(poll_dev);
2539
2540 if (adapter->msix_entries &&
2541 !(adapter->rx_ring->ims_val & adapter->tx_ring->ims_val))
2542 goto clean_rx;
2543
2544 tx_cleaned = e1000_clean_tx_irq(adapter->tx_ring);
2545
2546 clean_rx:
2547 adapter->clean_rx(adapter->rx_ring, &work_done, budget);
2548
2549 if (!tx_cleaned)
2550 work_done = budget;
2551
2552 /* If budget not fully consumed, exit the polling mode */
2553 if (work_done < budget) {
2554 if (adapter->itr_setting & 3)
2555 e1000_set_itr(adapter);
2556 napi_complete(napi);
2557 if (!test_bit(__E1000_DOWN, &adapter->state)) {
2558 if (adapter->msix_entries)
2559 ew32(IMS, adapter->rx_ring->ims_val);
2560 else
2561 e1000_irq_enable(adapter);
2562 }
2563 }
2564
2565 return work_done;
2566 }
2567
2568 static int e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
2569 {
2570 struct e1000_adapter *adapter = netdev_priv(netdev);
2571 struct e1000_hw *hw = &adapter->hw;
2572 u32 vfta, index;
2573
2574 /* don't update vlan cookie if already programmed */
2575 if ((adapter->hw.mng_cookie.status &
2576 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2577 (vid == adapter->mng_vlan_id))
2578 return 0;
2579
2580 /* add VID to filter table */
2581 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2582 index = (vid >> 5) & 0x7F;
2583 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2584 vfta |= (1 << (vid & 0x1F));
2585 hw->mac.ops.write_vfta(hw, index, vfta);
2586 }
2587
2588 set_bit(vid, adapter->active_vlans);
2589
2590 return 0;
2591 }
2592
2593 static int e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
2594 {
2595 struct e1000_adapter *adapter = netdev_priv(netdev);
2596 struct e1000_hw *hw = &adapter->hw;
2597 u32 vfta, index;
2598
2599 if ((adapter->hw.mng_cookie.status &
2600 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2601 (vid == adapter->mng_vlan_id)) {
2602 /* release control to f/w */
2603 e1000e_release_hw_control(adapter);
2604 return 0;
2605 }
2606
2607 /* remove VID from filter table */
2608 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2609 index = (vid >> 5) & 0x7F;
2610 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2611 vfta &= ~(1 << (vid & 0x1F));
2612 hw->mac.ops.write_vfta(hw, index, vfta);
2613 }
2614
2615 clear_bit(vid, adapter->active_vlans);
2616
2617 return 0;
2618 }
2619
2620 /**
2621 * e1000e_vlan_filter_disable - helper to disable hw VLAN filtering
2622 * @adapter: board private structure to initialize
2623 **/
2624 static void e1000e_vlan_filter_disable(struct e1000_adapter *adapter)
2625 {
2626 struct net_device *netdev = adapter->netdev;
2627 struct e1000_hw *hw = &adapter->hw;
2628 u32 rctl;
2629
2630 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2631 /* disable VLAN receive filtering */
2632 rctl = er32(RCTL);
2633 rctl &= ~(E1000_RCTL_VFE | E1000_RCTL_CFIEN);
2634 ew32(RCTL, rctl);
2635
2636 if (adapter->mng_vlan_id != (u16)E1000_MNG_VLAN_NONE) {
2637 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
2638 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2639 }
2640 }
2641 }
2642
2643 /**
2644 * e1000e_vlan_filter_enable - helper to enable HW VLAN filtering
2645 * @adapter: board private structure to initialize
2646 **/
2647 static void e1000e_vlan_filter_enable(struct e1000_adapter *adapter)
2648 {
2649 struct e1000_hw *hw = &adapter->hw;
2650 u32 rctl;
2651
2652 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2653 /* enable VLAN receive filtering */
2654 rctl = er32(RCTL);
2655 rctl |= E1000_RCTL_VFE;
2656 rctl &= ~E1000_RCTL_CFIEN;
2657 ew32(RCTL, rctl);
2658 }
2659 }
2660
2661 /**
2662 * e1000e_vlan_strip_enable - helper to disable HW VLAN stripping
2663 * @adapter: board private structure to initialize
2664 **/
2665 static void e1000e_vlan_strip_disable(struct e1000_adapter *adapter)
2666 {
2667 struct e1000_hw *hw = &adapter->hw;
2668 u32 ctrl;
2669
2670 /* disable VLAN tag insert/strip */
2671 ctrl = er32(CTRL);
2672 ctrl &= ~E1000_CTRL_VME;
2673 ew32(CTRL, ctrl);
2674 }
2675
2676 /**
2677 * e1000e_vlan_strip_enable - helper to enable HW VLAN stripping
2678 * @adapter: board private structure to initialize
2679 **/
2680 static void e1000e_vlan_strip_enable(struct e1000_adapter *adapter)
2681 {
2682 struct e1000_hw *hw = &adapter->hw;
2683 u32 ctrl;
2684
2685 /* enable VLAN tag insert/strip */
2686 ctrl = er32(CTRL);
2687 ctrl |= E1000_CTRL_VME;
2688 ew32(CTRL, ctrl);
2689 }
2690
2691 static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
2692 {
2693 struct net_device *netdev = adapter->netdev;
2694 u16 vid = adapter->hw.mng_cookie.vlan_id;
2695 u16 old_vid = adapter->mng_vlan_id;
2696
2697 if (adapter->hw.mng_cookie.status &
2698 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
2699 e1000_vlan_rx_add_vid(netdev, vid);
2700 adapter->mng_vlan_id = vid;
2701 }
2702
2703 if ((old_vid != (u16)E1000_MNG_VLAN_NONE) && (vid != old_vid))
2704 e1000_vlan_rx_kill_vid(netdev, old_vid);
2705 }
2706
2707 static void e1000_restore_vlan(struct e1000_adapter *adapter)
2708 {
2709 u16 vid;
2710
2711 e1000_vlan_rx_add_vid(adapter->netdev, 0);
2712
2713 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
2714 e1000_vlan_rx_add_vid(adapter->netdev, vid);
2715 }
2716
2717 static void e1000_init_manageability_pt(struct e1000_adapter *adapter)
2718 {
2719 struct e1000_hw *hw = &adapter->hw;
2720 u32 manc, manc2h, mdef, i, j;
2721
2722 if (!(adapter->flags & FLAG_MNG_PT_ENABLED))
2723 return;
2724
2725 manc = er32(MANC);
2726
2727 /*
2728 * enable receiving management packets to the host. this will probably
2729 * generate destination unreachable messages from the host OS, but
2730 * the packets will be handled on SMBUS
2731 */
2732 manc |= E1000_MANC_EN_MNG2HOST;
2733 manc2h = er32(MANC2H);
2734
2735 switch (hw->mac.type) {
2736 default:
2737 manc2h |= (E1000_MANC2H_PORT_623 | E1000_MANC2H_PORT_664);
2738 break;
2739 case e1000_82574:
2740 case e1000_82583:
2741 /*
2742 * Check if IPMI pass-through decision filter already exists;
2743 * if so, enable it.
2744 */
2745 for (i = 0, j = 0; i < 8; i++) {
2746 mdef = er32(MDEF(i));
2747
2748 /* Ignore filters with anything other than IPMI ports */
2749 if (mdef & ~(E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
2750 continue;
2751
2752 /* Enable this decision filter in MANC2H */
2753 if (mdef)
2754 manc2h |= (1 << i);
2755
2756 j |= mdef;
2757 }
2758
2759 if (j == (E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
2760 break;
2761
2762 /* Create new decision filter in an empty filter */
2763 for (i = 0, j = 0; i < 8; i++)
2764 if (er32(MDEF(i)) == 0) {
2765 ew32(MDEF(i), (E1000_MDEF_PORT_623 |
2766 E1000_MDEF_PORT_664));
2767 manc2h |= (1 << 1);
2768 j++;
2769 break;
2770 }
2771
2772 if (!j)
2773 e_warn("Unable to create IPMI pass-through filter\n");
2774 break;
2775 }
2776
2777 ew32(MANC2H, manc2h);
2778 ew32(MANC, manc);
2779 }
2780
2781 /**
2782 * e1000_configure_tx - Configure Transmit Unit after Reset
2783 * @adapter: board private structure
2784 *
2785 * Configure the Tx unit of the MAC after a reset.
2786 **/
2787 static void e1000_configure_tx(struct e1000_adapter *adapter)
2788 {
2789 struct e1000_hw *hw = &adapter->hw;
2790 struct e1000_ring *tx_ring = adapter->tx_ring;
2791 u64 tdba;
2792 u32 tdlen, tarc;
2793
2794 /* Setup the HW Tx Head and Tail descriptor pointers */
2795 tdba = tx_ring->dma;
2796 tdlen = tx_ring->count * sizeof(struct e1000_tx_desc);
2797 ew32(TDBAL, (tdba & DMA_BIT_MASK(32)));
2798 ew32(TDBAH, (tdba >> 32));
2799 ew32(TDLEN, tdlen);
2800 ew32(TDH, 0);
2801 ew32(TDT, 0);
2802 tx_ring->head = adapter->hw.hw_addr + E1000_TDH;
2803 tx_ring->tail = adapter->hw.hw_addr + E1000_TDT;
2804
2805 /* Set the Tx Interrupt Delay register */
2806 ew32(TIDV, adapter->tx_int_delay);
2807 /* Tx irq moderation */
2808 ew32(TADV, adapter->tx_abs_int_delay);
2809
2810 if (adapter->flags2 & FLAG2_DMA_BURST) {
2811 u32 txdctl = er32(TXDCTL(0));
2812 txdctl &= ~(E1000_TXDCTL_PTHRESH | E1000_TXDCTL_HTHRESH |
2813 E1000_TXDCTL_WTHRESH);
2814 /*
2815 * set up some performance related parameters to encourage the
2816 * hardware to use the bus more efficiently in bursts, depends
2817 * on the tx_int_delay to be enabled,
2818 * wthresh = 5 ==> burst write a cacheline (64 bytes) at a time
2819 * hthresh = 1 ==> prefetch when one or more available
2820 * pthresh = 0x1f ==> prefetch if internal cache 31 or less
2821 * BEWARE: this seems to work but should be considered first if
2822 * there are Tx hangs or other Tx related bugs
2823 */
2824 txdctl |= E1000_TXDCTL_DMA_BURST_ENABLE;
2825 ew32(TXDCTL(0), txdctl);
2826 }
2827 /* erratum work around: set txdctl the same for both queues */
2828 ew32(TXDCTL(1), er32(TXDCTL(0)));
2829
2830 if (adapter->flags & FLAG_TARC_SPEED_MODE_BIT) {
2831 tarc = er32(TARC(0));
2832 /*
2833 * set the speed mode bit, we'll clear it if we're not at
2834 * gigabit link later
2835 */
2836 #define SPEED_MODE_BIT (1 << 21)
2837 tarc |= SPEED_MODE_BIT;
2838 ew32(TARC(0), tarc);
2839 }
2840
2841 /* errata: program both queues to unweighted RR */
2842 if (adapter->flags & FLAG_TARC_SET_BIT_ZERO) {
2843 tarc = er32(TARC(0));
2844 tarc |= 1;
2845 ew32(TARC(0), tarc);
2846 tarc = er32(TARC(1));
2847 tarc |= 1;
2848 ew32(TARC(1), tarc);
2849 }
2850
2851 /* Setup Transmit Descriptor Settings for eop descriptor */
2852 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
2853
2854 /* only set IDE if we are delaying interrupts using the timers */
2855 if (adapter->tx_int_delay)
2856 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
2857
2858 /* enable Report Status bit */
2859 adapter->txd_cmd |= E1000_TXD_CMD_RS;
2860
2861 hw->mac.ops.config_collision_dist(hw);
2862 }
2863
2864 /**
2865 * e1000_setup_rctl - configure the receive control registers
2866 * @adapter: Board private structure
2867 **/
2868 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
2869 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
2870 static void e1000_setup_rctl(struct e1000_adapter *adapter)
2871 {
2872 struct e1000_hw *hw = &adapter->hw;
2873 u32 rctl, rfctl;
2874 u32 pages = 0;
2875
2876 /* Workaround Si errata on 82579 - configure jumbo frame flow */
2877 if (hw->mac.type == e1000_pch2lan) {
2878 s32 ret_val;
2879
2880 if (adapter->netdev->mtu > ETH_DATA_LEN)
2881 ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, true);
2882 else
2883 ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, false);
2884
2885 if (ret_val)
2886 e_dbg("failed to enable jumbo frame workaround mode\n");
2887 }
2888
2889 /* Program MC offset vector base */
2890 rctl = er32(RCTL);
2891 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
2892 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
2893 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
2894 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
2895
2896 /* Do not Store bad packets */
2897 rctl &= ~E1000_RCTL_SBP;
2898
2899 /* Enable Long Packet receive */
2900 if (adapter->netdev->mtu <= ETH_DATA_LEN)
2901 rctl &= ~E1000_RCTL_LPE;
2902 else
2903 rctl |= E1000_RCTL_LPE;
2904
2905 /* Some systems expect that the CRC is included in SMBUS traffic. The
2906 * hardware strips the CRC before sending to both SMBUS (BMC) and to
2907 * host memory when this is enabled
2908 */
2909 if (adapter->flags2 & FLAG2_CRC_STRIPPING)
2910 rctl |= E1000_RCTL_SECRC;
2911
2912 /* Workaround Si errata on 82577 PHY - configure IPG for jumbos */
2913 if ((hw->phy.type == e1000_phy_82577) && (rctl & E1000_RCTL_LPE)) {
2914 u16 phy_data;
2915
2916 e1e_rphy(hw, PHY_REG(770, 26), &phy_data);
2917 phy_data &= 0xfff8;
2918 phy_data |= (1 << 2);
2919 e1e_wphy(hw, PHY_REG(770, 26), phy_data);
2920
2921 e1e_rphy(hw, 22, &phy_data);
2922 phy_data &= 0x0fff;
2923 phy_data |= (1 << 14);
2924 e1e_wphy(hw, 0x10, 0x2823);
2925 e1e_wphy(hw, 0x11, 0x0003);
2926 e1e_wphy(hw, 22, phy_data);
2927 }
2928
2929 /* Setup buffer sizes */
2930 rctl &= ~E1000_RCTL_SZ_4096;
2931 rctl |= E1000_RCTL_BSEX;
2932 switch (adapter->rx_buffer_len) {
2933 case 2048:
2934 default:
2935 rctl |= E1000_RCTL_SZ_2048;
2936 rctl &= ~E1000_RCTL_BSEX;
2937 break;
2938 case 4096:
2939 rctl |= E1000_RCTL_SZ_4096;
2940 break;
2941 case 8192:
2942 rctl |= E1000_RCTL_SZ_8192;
2943 break;
2944 case 16384:
2945 rctl |= E1000_RCTL_SZ_16384;
2946 break;
2947 }
2948
2949 /* Enable Extended Status in all Receive Descriptors */
2950 rfctl = er32(RFCTL);
2951 rfctl |= E1000_RFCTL_EXTEN;
2952
2953 /*
2954 * 82571 and greater support packet-split where the protocol
2955 * header is placed in skb->data and the packet data is
2956 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
2957 * In the case of a non-split, skb->data is linearly filled,
2958 * followed by the page buffers. Therefore, skb->data is
2959 * sized to hold the largest protocol header.
2960 *
2961 * allocations using alloc_page take too long for regular MTU
2962 * so only enable packet split for jumbo frames
2963 *
2964 * Using pages when the page size is greater than 16k wastes
2965 * a lot of memory, since we allocate 3 pages at all times
2966 * per packet.
2967 */
2968 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
2969 if ((pages <= 3) && (PAGE_SIZE <= 16384) && (rctl & E1000_RCTL_LPE))
2970 adapter->rx_ps_pages = pages;
2971 else
2972 adapter->rx_ps_pages = 0;
2973
2974 if (adapter->rx_ps_pages) {
2975 u32 psrctl = 0;
2976
2977 /*
2978 * disable packet split support for IPv6 extension headers,
2979 * because some malformed IPv6 headers can hang the Rx
2980 */
2981 rfctl |= (E1000_RFCTL_IPV6_EX_DIS |
2982 E1000_RFCTL_NEW_IPV6_EXT_DIS);
2983
2984 /* Enable Packet split descriptors */
2985 rctl |= E1000_RCTL_DTYP_PS;
2986
2987 psrctl |= adapter->rx_ps_bsize0 >>
2988 E1000_PSRCTL_BSIZE0_SHIFT;
2989
2990 switch (adapter->rx_ps_pages) {
2991 case 3:
2992 psrctl |= PAGE_SIZE <<
2993 E1000_PSRCTL_BSIZE3_SHIFT;
2994 case 2:
2995 psrctl |= PAGE_SIZE <<
2996 E1000_PSRCTL_BSIZE2_SHIFT;
2997 case 1:
2998 psrctl |= PAGE_SIZE >>
2999 E1000_PSRCTL_BSIZE1_SHIFT;
3000 break;
3001 }
3002
3003 ew32(PSRCTL, psrctl);
3004 }
3005
3006 /* This is useful for sniffing bad packets. */
3007 if (adapter->netdev->features & NETIF_F_RXALL) {
3008 /* UPE and MPE will be handled by normal PROMISC logic
3009 * in e1000e_set_rx_mode */
3010 rctl |= (E1000_RCTL_SBP | /* Receive bad packets */
3011 E1000_RCTL_BAM | /* RX All Bcast Pkts */
3012 E1000_RCTL_PMCF); /* RX All MAC Ctrl Pkts */
3013
3014 rctl &= ~(E1000_RCTL_VFE | /* Disable VLAN filter */
3015 E1000_RCTL_DPF | /* Allow filtered pause */
3016 E1000_RCTL_CFIEN); /* Dis VLAN CFIEN Filter */
3017 /* Do not mess with E1000_CTRL_VME, it affects transmit as well,
3018 * and that breaks VLANs.
3019 */
3020 }
3021
3022 ew32(RFCTL, rfctl);
3023 ew32(RCTL, rctl);
3024 /* just started the receive unit, no need to restart */
3025 adapter->flags &= ~FLAG_RX_RESTART_NOW;
3026 }
3027
3028 /**
3029 * e1000_configure_rx - Configure Receive Unit after Reset
3030 * @adapter: board private structure
3031 *
3032 * Configure the Rx unit of the MAC after a reset.
3033 **/
3034 static void e1000_configure_rx(struct e1000_adapter *adapter)
3035 {
3036 struct e1000_hw *hw = &adapter->hw;
3037 struct e1000_ring *rx_ring = adapter->rx_ring;
3038 u64 rdba;
3039 u32 rdlen, rctl, rxcsum, ctrl_ext;
3040
3041 if (adapter->rx_ps_pages) {
3042 /* this is a 32 byte descriptor */
3043 rdlen = rx_ring->count *
3044 sizeof(union e1000_rx_desc_packet_split);
3045 adapter->clean_rx = e1000_clean_rx_irq_ps;
3046 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
3047 } else if (adapter->netdev->mtu > ETH_FRAME_LEN + ETH_FCS_LEN) {
3048 rdlen = rx_ring->count * sizeof(union e1000_rx_desc_extended);
3049 adapter->clean_rx = e1000_clean_jumbo_rx_irq;
3050 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers;
3051 } else {
3052 rdlen = rx_ring->count * sizeof(union e1000_rx_desc_extended);
3053 adapter->clean_rx = e1000_clean_rx_irq;
3054 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
3055 }
3056
3057 /* disable receives while setting up the descriptors */
3058 rctl = er32(RCTL);
3059 if (!(adapter->flags2 & FLAG2_NO_DISABLE_RX))
3060 ew32(RCTL, rctl & ~E1000_RCTL_EN);
3061 e1e_flush();
3062 usleep_range(10000, 20000);
3063
3064 if (adapter->flags2 & FLAG2_DMA_BURST) {
3065 /*
3066 * set the writeback threshold (only takes effect if the RDTR
3067 * is set). set GRAN=1 and write back up to 0x4 worth, and
3068 * enable prefetching of 0x20 Rx descriptors
3069 * granularity = 01
3070 * wthresh = 04,
3071 * hthresh = 04,
3072 * pthresh = 0x20
3073 */
3074 ew32(RXDCTL(0), E1000_RXDCTL_DMA_BURST_ENABLE);
3075 ew32(RXDCTL(1), E1000_RXDCTL_DMA_BURST_ENABLE);
3076
3077 /*
3078 * override the delay timers for enabling bursting, only if
3079 * the value was not set by the user via module options
3080 */
3081 if (adapter->rx_int_delay == DEFAULT_RDTR)
3082 adapter->rx_int_delay = BURST_RDTR;
3083 if (adapter->rx_abs_int_delay == DEFAULT_RADV)
3084 adapter->rx_abs_int_delay = BURST_RADV;
3085 }
3086
3087 /* set the Receive Delay Timer Register */
3088 ew32(RDTR, adapter->rx_int_delay);
3089
3090 /* irq moderation */
3091 ew32(RADV, adapter->rx_abs_int_delay);
3092 if ((adapter->itr_setting != 0) && (adapter->itr != 0))
3093 ew32(ITR, 1000000000 / (adapter->itr * 256));
3094
3095 ctrl_ext = er32(CTRL_EXT);
3096 /* Auto-Mask interrupts upon ICR access */
3097 ctrl_ext |= E1000_CTRL_EXT_IAME;
3098 ew32(IAM, 0xffffffff);
3099 ew32(CTRL_EXT, ctrl_ext);
3100 e1e_flush();
3101
3102 /*
3103 * Setup the HW Rx Head and Tail Descriptor Pointers and
3104 * the Base and Length of the Rx Descriptor Ring
3105 */
3106 rdba = rx_ring->dma;
3107 ew32(RDBAL, (rdba & DMA_BIT_MASK(32)));
3108 ew32(RDBAH, (rdba >> 32));
3109 ew32(RDLEN, rdlen);
3110 ew32(RDH, 0);
3111 ew32(RDT, 0);
3112 rx_ring->head = adapter->hw.hw_addr + E1000_RDH;
3113 rx_ring->tail = adapter->hw.hw_addr + E1000_RDT;
3114
3115 /* Enable Receive Checksum Offload for TCP and UDP */
3116 rxcsum = er32(RXCSUM);
3117 if (adapter->netdev->features & NETIF_F_RXCSUM) {
3118 rxcsum |= E1000_RXCSUM_TUOFL;
3119
3120 /*
3121 * IPv4 payload checksum for UDP fragments must be
3122 * used in conjunction with packet-split.
3123 */
3124 if (adapter->rx_ps_pages)
3125 rxcsum |= E1000_RXCSUM_IPPCSE;
3126 } else {
3127 rxcsum &= ~E1000_RXCSUM_TUOFL;
3128 /* no need to clear IPPCSE as it defaults to 0 */
3129 }
3130 ew32(RXCSUM, rxcsum);
3131
3132 if (adapter->hw.mac.type == e1000_pch2lan) {
3133 /*
3134 * With jumbo frames, excessive C-state transition
3135 * latencies result in dropped transactions.
3136 */
3137 if (adapter->netdev->mtu > ETH_DATA_LEN) {
3138 u32 rxdctl = er32(RXDCTL(0));
3139 ew32(RXDCTL(0), rxdctl | 0x3);
3140 pm_qos_update_request(&adapter->netdev->pm_qos_req, 55);
3141 } else {
3142 pm_qos_update_request(&adapter->netdev->pm_qos_req,
3143 PM_QOS_DEFAULT_VALUE);
3144 }
3145 }
3146
3147 /* Enable Receives */
3148 ew32(RCTL, rctl);
3149 }
3150
3151 /**
3152 * e1000e_write_mc_addr_list - write multicast addresses to MTA
3153 * @netdev: network interface device structure
3154 *
3155 * Writes multicast address list to the MTA hash table.
3156 * Returns: -ENOMEM on failure
3157 * 0 on no addresses written
3158 * X on writing X addresses to MTA
3159 */
3160 static int e1000e_write_mc_addr_list(struct net_device *netdev)
3161 {
3162 struct e1000_adapter *adapter = netdev_priv(netdev);
3163 struct e1000_hw *hw = &adapter->hw;
3164 struct netdev_hw_addr *ha;
3165 u8 *mta_list;
3166 int i;
3167
3168 if (netdev_mc_empty(netdev)) {
3169 /* nothing to program, so clear mc list */
3170 hw->mac.ops.update_mc_addr_list(hw, NULL, 0);
3171 return 0;
3172 }
3173
3174 mta_list = kzalloc(netdev_mc_count(netdev) * ETH_ALEN, GFP_ATOMIC);
3175 if (!mta_list)
3176 return -ENOMEM;
3177
3178 /* update_mc_addr_list expects a packed array of only addresses. */
3179 i = 0;
3180 netdev_for_each_mc_addr(ha, netdev)
3181 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
3182
3183 hw->mac.ops.update_mc_addr_list(hw, mta_list, i);
3184 kfree(mta_list);
3185
3186 return netdev_mc_count(netdev);
3187 }
3188
3189 /**
3190 * e1000e_write_uc_addr_list - write unicast addresses to RAR table
3191 * @netdev: network interface device structure
3192 *
3193 * Writes unicast address list to the RAR table.
3194 * Returns: -ENOMEM on failure/insufficient address space
3195 * 0 on no addresses written
3196 * X on writing X addresses to the RAR table
3197 **/
3198 static int e1000e_write_uc_addr_list(struct net_device *netdev)
3199 {
3200 struct e1000_adapter *adapter = netdev_priv(netdev);
3201 struct e1000_hw *hw = &adapter->hw;
3202 unsigned int rar_entries = hw->mac.rar_entry_count;
3203 int count = 0;
3204
3205 /* save a rar entry for our hardware address */
3206 rar_entries--;
3207
3208 /* save a rar entry for the LAA workaround */
3209 if (adapter->flags & FLAG_RESET_OVERWRITES_LAA)
3210 rar_entries--;
3211
3212 /* return ENOMEM indicating insufficient memory for addresses */
3213 if (netdev_uc_count(netdev) > rar_entries)
3214 return -ENOMEM;
3215
3216 if (!netdev_uc_empty(netdev) && rar_entries) {
3217 struct netdev_hw_addr *ha;
3218
3219 /*
3220 * write the addresses in reverse order to avoid write
3221 * combining
3222 */
3223 netdev_for_each_uc_addr(ha, netdev) {
3224 if (!rar_entries)
3225 break;
3226 e1000e_rar_set(hw, ha->addr, rar_entries--);
3227 count++;
3228 }
3229 }
3230
3231 /* zero out the remaining RAR entries not used above */
3232 for (; rar_entries > 0; rar_entries--) {
3233 ew32(RAH(rar_entries), 0);
3234 ew32(RAL(rar_entries), 0);
3235 }
3236 e1e_flush();
3237
3238 return count;
3239 }
3240
3241 /**
3242 * e1000e_set_rx_mode - secondary unicast, Multicast and Promiscuous mode set
3243 * @netdev: network interface device structure
3244 *
3245 * The ndo_set_rx_mode entry point is called whenever the unicast or multicast
3246 * address list or the network interface flags are updated. This routine is
3247 * responsible for configuring the hardware for proper unicast, multicast,
3248 * promiscuous mode, and all-multi behavior.
3249 **/
3250 static void e1000e_set_rx_mode(struct net_device *netdev)
3251 {
3252 struct e1000_adapter *adapter = netdev_priv(netdev);
3253 struct e1000_hw *hw = &adapter->hw;
3254 u32 rctl;
3255
3256 /* Check for Promiscuous and All Multicast modes */
3257 rctl = er32(RCTL);
3258
3259 /* clear the affected bits */
3260 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
3261
3262 if (netdev->flags & IFF_PROMISC) {
3263 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
3264 /* Do not hardware filter VLANs in promisc mode */
3265 e1000e_vlan_filter_disable(adapter);
3266 } else {
3267 int count;
3268
3269 if (netdev->flags & IFF_ALLMULTI) {
3270 rctl |= E1000_RCTL_MPE;
3271 } else {
3272 /*
3273 * Write addresses to the MTA, if the attempt fails
3274 * then we should just turn on promiscuous mode so
3275 * that we can at least receive multicast traffic
3276 */
3277 count = e1000e_write_mc_addr_list(netdev);
3278 if (count < 0)
3279 rctl |= E1000_RCTL_MPE;
3280 }
3281 e1000e_vlan_filter_enable(adapter);
3282 /*
3283 * Write addresses to available RAR registers, if there is not
3284 * sufficient space to store all the addresses then enable
3285 * unicast promiscuous mode
3286 */
3287 count = e1000e_write_uc_addr_list(netdev);
3288 if (count < 0)
3289 rctl |= E1000_RCTL_UPE;
3290 }
3291
3292 ew32(RCTL, rctl);
3293
3294 if (netdev->features & NETIF_F_HW_VLAN_RX)
3295 e1000e_vlan_strip_enable(adapter);
3296 else
3297 e1000e_vlan_strip_disable(adapter);
3298 }
3299
3300 static void e1000e_setup_rss_hash(struct e1000_adapter *adapter)
3301 {
3302 struct e1000_hw *hw = &adapter->hw;
3303 u32 mrqc, rxcsum;
3304 int i;
3305 static const u32 rsskey[10] = {
3306 0xda565a6d, 0xc20e5b25, 0x3d256741, 0xb08fa343, 0xcb2bcad0,
3307 0xb4307bae, 0xa32dcb77, 0x0cf23080, 0x3bb7426a, 0xfa01acbe
3308 };
3309
3310 /* Fill out hash function seed */
3311 for (i = 0; i < 10; i++)
3312 ew32(RSSRK(i), rsskey[i]);
3313
3314 /* Direct all traffic to queue 0 */
3315 for (i = 0; i < 32; i++)
3316 ew32(RETA(i), 0);
3317
3318 /*
3319 * Disable raw packet checksumming so that RSS hash is placed in
3320 * descriptor on writeback.
3321 */
3322 rxcsum = er32(RXCSUM);
3323 rxcsum |= E1000_RXCSUM_PCSD;
3324
3325 ew32(RXCSUM, rxcsum);
3326
3327 mrqc = (E1000_MRQC_RSS_FIELD_IPV4 |
3328 E1000_MRQC_RSS_FIELD_IPV4_TCP |
3329 E1000_MRQC_RSS_FIELD_IPV6 |
3330 E1000_MRQC_RSS_FIELD_IPV6_TCP |
3331 E1000_MRQC_RSS_FIELD_IPV6_TCP_EX);
3332
3333 ew32(MRQC, mrqc);
3334 }
3335
3336 /**
3337 * e1000_configure - configure the hardware for Rx and Tx
3338 * @adapter: private board structure
3339 **/
3340 static void e1000_configure(struct e1000_adapter *adapter)
3341 {
3342 struct e1000_ring *rx_ring = adapter->rx_ring;
3343
3344 e1000e_set_rx_mode(adapter->netdev);
3345
3346 e1000_restore_vlan(adapter);
3347 e1000_init_manageability_pt(adapter);
3348
3349 e1000_configure_tx(adapter);
3350
3351 if (adapter->netdev->features & NETIF_F_RXHASH)
3352 e1000e_setup_rss_hash(adapter);
3353 e1000_setup_rctl(adapter);
3354 e1000_configure_rx(adapter);
3355 adapter->alloc_rx_buf(rx_ring, e1000_desc_unused(rx_ring), GFP_KERNEL);
3356 }
3357
3358 /**
3359 * e1000e_power_up_phy - restore link in case the phy was powered down
3360 * @adapter: address of board private structure
3361 *
3362 * The phy may be powered down to save power and turn off link when the
3363 * driver is unloaded and wake on lan is not enabled (among others)
3364 * *** this routine MUST be followed by a call to e1000e_reset ***
3365 **/
3366 void e1000e_power_up_phy(struct e1000_adapter *adapter)
3367 {
3368 if (adapter->hw.phy.ops.power_up)
3369 adapter->hw.phy.ops.power_up(&adapter->hw);
3370
3371 adapter->hw.mac.ops.setup_link(&adapter->hw);
3372 }
3373
3374 /**
3375 * e1000_power_down_phy - Power down the PHY
3376 *
3377 * Power down the PHY so no link is implied when interface is down.
3378 * The PHY cannot be powered down if management or WoL is active.
3379 */
3380 static void e1000_power_down_phy(struct e1000_adapter *adapter)
3381 {
3382 /* WoL is enabled */
3383 if (adapter->wol)
3384 return;
3385
3386 if (adapter->hw.phy.ops.power_down)
3387 adapter->hw.phy.ops.power_down(&adapter->hw);
3388 }
3389
3390 /**
3391 * e1000e_reset - bring the hardware into a known good state
3392 *
3393 * This function boots the hardware and enables some settings that
3394 * require a configuration cycle of the hardware - those cannot be
3395 * set/changed during runtime. After reset the device needs to be
3396 * properly configured for Rx, Tx etc.
3397 */
3398 void e1000e_reset(struct e1000_adapter *adapter)
3399 {
3400 struct e1000_mac_info *mac = &adapter->hw.mac;
3401 struct e1000_fc_info *fc = &adapter->hw.fc;
3402 struct e1000_hw *hw = &adapter->hw;
3403 u32 tx_space, min_tx_space, min_rx_space;
3404 u32 pba = adapter->pba;
3405 u16 hwm;
3406
3407 /* reset Packet Buffer Allocation to default */
3408 ew32(PBA, pba);
3409
3410 if (adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) {
3411 /*
3412 * To maintain wire speed transmits, the Tx FIFO should be
3413 * large enough to accommodate two full transmit packets,
3414 * rounded up to the next 1KB and expressed in KB. Likewise,
3415 * the Rx FIFO should be large enough to accommodate at least
3416 * one full receive packet and is similarly rounded up and
3417 * expressed in KB.
3418 */
3419 pba = er32(PBA);
3420 /* upper 16 bits has Tx packet buffer allocation size in KB */
3421 tx_space = pba >> 16;
3422 /* lower 16 bits has Rx packet buffer allocation size in KB */
3423 pba &= 0xffff;
3424 /*
3425 * the Tx fifo also stores 16 bytes of information about the Tx
3426 * but don't include ethernet FCS because hardware appends it
3427 */
3428 min_tx_space = (adapter->max_frame_size +
3429 sizeof(struct e1000_tx_desc) -
3430 ETH_FCS_LEN) * 2;
3431 min_tx_space = ALIGN(min_tx_space, 1024);
3432 min_tx_space >>= 10;
3433 /* software strips receive CRC, so leave room for it */
3434 min_rx_space = adapter->max_frame_size;
3435 min_rx_space = ALIGN(min_rx_space, 1024);
3436 min_rx_space >>= 10;
3437
3438 /*
3439 * If current Tx allocation is less than the min Tx FIFO size,
3440 * and the min Tx FIFO size is less than the current Rx FIFO
3441 * allocation, take space away from current Rx allocation
3442 */
3443 if ((tx_space < min_tx_space) &&
3444 ((min_tx_space - tx_space) < pba)) {
3445 pba -= min_tx_space - tx_space;
3446
3447 /*
3448 * if short on Rx space, Rx wins and must trump Tx
3449 * adjustment or use Early Receive if available
3450 */
3451 if (pba < min_rx_space)
3452 pba = min_rx_space;
3453 }
3454
3455 ew32(PBA, pba);
3456 }
3457
3458 /*
3459 * flow control settings
3460 *
3461 * The high water mark must be low enough to fit one full frame
3462 * (or the size used for early receive) above it in the Rx FIFO.
3463 * Set it to the lower of:
3464 * - 90% of the Rx FIFO size, and
3465 * - the full Rx FIFO size minus one full frame
3466 */
3467 if (adapter->flags & FLAG_DISABLE_FC_PAUSE_TIME)
3468 fc->pause_time = 0xFFFF;
3469 else
3470 fc->pause_time = E1000_FC_PAUSE_TIME;
3471 fc->send_xon = true;
3472 fc->current_mode = fc->requested_mode;
3473
3474 switch (hw->mac.type) {
3475 case e1000_ich9lan:
3476 case e1000_ich10lan:
3477 if (adapter->netdev->mtu > ETH_DATA_LEN) {
3478 pba = 14;
3479 ew32(PBA, pba);
3480 fc->high_water = 0x2800;
3481 fc->low_water = fc->high_water - 8;
3482 break;
3483 }
3484 /* fall-through */
3485 default:
3486 hwm = min(((pba << 10) * 9 / 10),
3487 ((pba << 10) - adapter->max_frame_size));
3488
3489 fc->high_water = hwm & E1000_FCRTH_RTH; /* 8-byte granularity */
3490 fc->low_water = fc->high_water - 8;
3491 break;
3492 case e1000_pchlan:
3493 /*
3494 * Workaround PCH LOM adapter hangs with certain network
3495 * loads. If hangs persist, try disabling Tx flow control.
3496 */
3497 if (adapter->netdev->mtu > ETH_DATA_LEN) {
3498 fc->high_water = 0x3500;
3499 fc->low_water = 0x1500;
3500 } else {
3501 fc->high_water = 0x5000;
3502 fc->low_water = 0x3000;
3503 }
3504 fc->refresh_time = 0x1000;
3505 break;
3506 case e1000_pch2lan:
3507 fc->high_water = 0x05C20;
3508 fc->low_water = 0x05048;
3509 fc->pause_time = 0x0650;
3510 fc->refresh_time = 0x0400;
3511 if (adapter->netdev->mtu > ETH_DATA_LEN) {
3512 pba = 14;
3513 ew32(PBA, pba);
3514 }
3515 break;
3516 }
3517
3518 /*
3519 * Disable Adaptive Interrupt Moderation if 2 full packets cannot
3520 * fit in receive buffer.
3521 */
3522 if (adapter->itr_setting & 0x3) {
3523 if ((adapter->max_frame_size * 2) > (pba << 10)) {
3524 if (!(adapter->flags2 & FLAG2_DISABLE_AIM)) {
3525 dev_info(&adapter->pdev->dev,
3526 "Interrupt Throttle Rate turned off\n");
3527 adapter->flags2 |= FLAG2_DISABLE_AIM;
3528 ew32(ITR, 0);
3529 }
3530 } else if (adapter->flags2 & FLAG2_DISABLE_AIM) {
3531 dev_info(&adapter->pdev->dev,
3532 "Interrupt Throttle Rate turned on\n");
3533 adapter->flags2 &= ~FLAG2_DISABLE_AIM;
3534 adapter->itr = 20000;
3535 ew32(ITR, 1000000000 / (adapter->itr * 256));
3536 }
3537 }
3538
3539 /* Allow time for pending master requests to run */
3540 mac->ops.reset_hw(hw);
3541
3542 /*
3543 * For parts with AMT enabled, let the firmware know
3544 * that the network interface is in control
3545 */
3546 if (adapter->flags & FLAG_HAS_AMT)
3547 e1000e_get_hw_control(adapter);
3548
3549 ew32(WUC, 0);
3550
3551 if (mac->ops.init_hw(hw))
3552 e_err("Hardware Error\n");
3553
3554 e1000_update_mng_vlan(adapter);
3555
3556 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
3557 ew32(VET, ETH_P_8021Q);
3558
3559 e1000e_reset_adaptive(hw);
3560
3561 if (!netif_running(adapter->netdev) &&
3562 !test_bit(__E1000_TESTING, &adapter->state)) {
3563 e1000_power_down_phy(adapter);
3564 return;
3565 }
3566
3567 e1000_get_phy_info(hw);
3568
3569 if ((adapter->flags & FLAG_HAS_SMART_POWER_DOWN) &&
3570 !(adapter->flags & FLAG_SMART_POWER_DOWN)) {
3571 u16 phy_data = 0;
3572 /*
3573 * speed up time to link by disabling smart power down, ignore
3574 * the return value of this function because there is nothing
3575 * different we would do if it failed
3576 */
3577 e1e_rphy(hw, IGP02E1000_PHY_POWER_MGMT, &phy_data);
3578 phy_data &= ~IGP02E1000_PM_SPD;
3579 e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, phy_data);
3580 }
3581 }
3582
3583 int e1000e_up(struct e1000_adapter *adapter)
3584 {
3585 struct e1000_hw *hw = &adapter->hw;
3586
3587 /* hardware has been reset, we need to reload some things */
3588 e1000_configure(adapter);
3589
3590 clear_bit(__E1000_DOWN, &adapter->state);
3591
3592 if (adapter->msix_entries)
3593 e1000_configure_msix(adapter);
3594 e1000_irq_enable(adapter);
3595
3596 netif_start_queue(adapter->netdev);
3597
3598 /* fire a link change interrupt to start the watchdog */
3599 if (adapter->msix_entries)
3600 ew32(ICS, E1000_ICS_LSC | E1000_ICR_OTHER);
3601 else
3602 ew32(ICS, E1000_ICS_LSC);
3603
3604 return 0;
3605 }
3606
3607 static void e1000e_flush_descriptors(struct e1000_adapter *adapter)
3608 {
3609 struct e1000_hw *hw = &adapter->hw;
3610
3611 if (!(adapter->flags2 & FLAG2_DMA_BURST))
3612 return;
3613
3614 /* flush pending descriptor writebacks to memory */
3615 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
3616 ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD);
3617
3618 /* execute the writes immediately */
3619 e1e_flush();
3620 }
3621
3622 static void e1000e_update_stats(struct e1000_adapter *adapter);
3623
3624 void e1000e_down(struct e1000_adapter *adapter)
3625 {
3626 struct net_device *netdev = adapter->netdev;
3627 struct e1000_hw *hw = &adapter->hw;
3628 u32 tctl, rctl;
3629
3630 /*
3631 * signal that we're down so the interrupt handler does not
3632 * reschedule our watchdog timer
3633 */
3634 set_bit(__E1000_DOWN, &adapter->state);
3635
3636 /* disable receives in the hardware */
3637 rctl = er32(RCTL);
3638 if (!(adapter->flags2 & FLAG2_NO_DISABLE_RX))
3639 ew32(RCTL, rctl & ~E1000_RCTL_EN);
3640 /* flush and sleep below */
3641
3642 netif_stop_queue(netdev);
3643
3644 /* disable transmits in the hardware */
3645 tctl = er32(TCTL);
3646 tctl &= ~E1000_TCTL_EN;
3647 ew32(TCTL, tctl);
3648
3649 /* flush both disables and wait for them to finish */
3650 e1e_flush();
3651 usleep_range(10000, 20000);
3652
3653 e1000_irq_disable(adapter);
3654
3655 del_timer_sync(&adapter->watchdog_timer);
3656 del_timer_sync(&adapter->phy_info_timer);
3657
3658 netif_carrier_off(netdev);
3659
3660 spin_lock(&adapter->stats64_lock);
3661 e1000e_update_stats(adapter);
3662 spin_unlock(&adapter->stats64_lock);
3663
3664 e1000e_flush_descriptors(adapter);
3665 e1000_clean_tx_ring(adapter->tx_ring);
3666 e1000_clean_rx_ring(adapter->rx_ring);
3667
3668 adapter->link_speed = 0;
3669 adapter->link_duplex = 0;
3670
3671 if (!pci_channel_offline(adapter->pdev))
3672 e1000e_reset(adapter);
3673
3674 /*
3675 * TODO: for power management, we could drop the link and
3676 * pci_disable_device here.
3677 */
3678 }
3679
3680 void e1000e_reinit_locked(struct e1000_adapter *adapter)
3681 {
3682 might_sleep();
3683 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
3684 usleep_range(1000, 2000);
3685 e1000e_down(adapter);
3686 e1000e_up(adapter);
3687 clear_bit(__E1000_RESETTING, &adapter->state);
3688 }
3689
3690 /**
3691 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
3692 * @adapter: board private structure to initialize
3693 *
3694 * e1000_sw_init initializes the Adapter private data structure.
3695 * Fields are initialized based on PCI device information and
3696 * OS network device settings (MTU size).
3697 **/
3698 static int __devinit e1000_sw_init(struct e1000_adapter *adapter)
3699 {
3700 struct net_device *netdev = adapter->netdev;
3701
3702 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN;
3703 adapter->rx_ps_bsize0 = 128;
3704 adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
3705 adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
3706 adapter->tx_ring_count = E1000_DEFAULT_TXD;
3707 adapter->rx_ring_count = E1000_DEFAULT_RXD;
3708
3709 spin_lock_init(&adapter->stats64_lock);
3710
3711 e1000e_set_interrupt_capability(adapter);
3712
3713 if (e1000_alloc_queues(adapter))
3714 return -ENOMEM;
3715
3716 /* Explicitly disable IRQ since the NIC can be in any state. */
3717 e1000_irq_disable(adapter);
3718
3719 set_bit(__E1000_DOWN, &adapter->state);
3720 return 0;
3721 }
3722
3723 /**
3724 * e1000_intr_msi_test - Interrupt Handler
3725 * @irq: interrupt number
3726 * @data: pointer to a network interface device structure
3727 **/
3728 static irqreturn_t e1000_intr_msi_test(int irq, void *data)
3729 {
3730 struct net_device *netdev = data;
3731 struct e1000_adapter *adapter = netdev_priv(netdev);
3732 struct e1000_hw *hw = &adapter->hw;
3733 u32 icr = er32(ICR);
3734
3735 e_dbg("icr is %08X\n", icr);
3736 if (icr & E1000_ICR_RXSEQ) {
3737 adapter->flags &= ~FLAG_MSI_TEST_FAILED;
3738 wmb();
3739 }
3740
3741 return IRQ_HANDLED;
3742 }
3743
3744 /**
3745 * e1000_test_msi_interrupt - Returns 0 for successful test
3746 * @adapter: board private struct
3747 *
3748 * code flow taken from tg3.c
3749 **/
3750 static int e1000_test_msi_interrupt(struct e1000_adapter *adapter)
3751 {
3752 struct net_device *netdev = adapter->netdev;
3753 struct e1000_hw *hw = &adapter->hw;
3754 int err;
3755
3756 /* poll_enable hasn't been called yet, so don't need disable */
3757 /* clear any pending events */
3758 er32(ICR);
3759
3760 /* free the real vector and request a test handler */
3761 e1000_free_irq(adapter);
3762 e1000e_reset_interrupt_capability(adapter);
3763
3764 /* Assume that the test fails, if it succeeds then the test
3765 * MSI irq handler will unset this flag */
3766 adapter->flags |= FLAG_MSI_TEST_FAILED;
3767
3768 err = pci_enable_msi(adapter->pdev);
3769 if (err)
3770 goto msi_test_failed;
3771
3772 err = request_irq(adapter->pdev->irq, e1000_intr_msi_test, 0,
3773 netdev->name, netdev);
3774 if (err) {
3775 pci_disable_msi(adapter->pdev);
3776 goto msi_test_failed;
3777 }
3778
3779 wmb();
3780
3781 e1000_irq_enable(adapter);
3782
3783 /* fire an unusual interrupt on the test handler */
3784 ew32(ICS, E1000_ICS_RXSEQ);
3785 e1e_flush();
3786 msleep(50);
3787
3788 e1000_irq_disable(adapter);
3789
3790 rmb();
3791
3792 if (adapter->flags & FLAG_MSI_TEST_FAILED) {
3793 adapter->int_mode = E1000E_INT_MODE_LEGACY;
3794 e_info("MSI interrupt test failed, using legacy interrupt.\n");
3795 } else {
3796 e_dbg("MSI interrupt test succeeded!\n");
3797 }
3798
3799 free_irq(adapter->pdev->irq, netdev);
3800 pci_disable_msi(adapter->pdev);
3801
3802 msi_test_failed:
3803 e1000e_set_interrupt_capability(adapter);
3804 return e1000_request_irq(adapter);
3805 }
3806
3807 /**
3808 * e1000_test_msi - Returns 0 if MSI test succeeds or INTx mode is restored
3809 * @adapter: board private struct
3810 *
3811 * code flow taken from tg3.c, called with e1000 interrupts disabled.
3812 **/
3813 static int e1000_test_msi(struct e1000_adapter *adapter)
3814 {
3815 int err;
3816 u16 pci_cmd;
3817
3818 if (!(adapter->flags & FLAG_MSI_ENABLED))
3819 return 0;
3820
3821 /* disable SERR in case the MSI write causes a master abort */
3822 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
3823 if (pci_cmd & PCI_COMMAND_SERR)
3824 pci_write_config_word(adapter->pdev, PCI_COMMAND,
3825 pci_cmd & ~PCI_COMMAND_SERR);
3826
3827 err = e1000_test_msi_interrupt(adapter);
3828
3829 /* re-enable SERR */
3830 if (pci_cmd & PCI_COMMAND_SERR) {
3831 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
3832 pci_cmd |= PCI_COMMAND_SERR;
3833 pci_write_config_word(adapter->pdev, PCI_COMMAND, pci_cmd);
3834 }
3835
3836 return err;
3837 }
3838
3839 /**
3840 * e1000_open - Called when a network interface is made active
3841 * @netdev: network interface device structure
3842 *
3843 * Returns 0 on success, negative value on failure
3844 *
3845 * The open entry point is called when a network interface is made
3846 * active by the system (IFF_UP). At this point all resources needed
3847 * for transmit and receive operations are allocated, the interrupt
3848 * handler is registered with the OS, the watchdog timer is started,
3849 * and the stack is notified that the interface is ready.
3850 **/
3851 static int e1000_open(struct net_device *netdev)
3852 {
3853 struct e1000_adapter *adapter = netdev_priv(netdev);
3854 struct e1000_hw *hw = &adapter->hw;
3855 struct pci_dev *pdev = adapter->pdev;
3856 int err;
3857
3858 /* disallow open during test */
3859 if (test_bit(__E1000_TESTING, &adapter->state))
3860 return -EBUSY;
3861
3862 pm_runtime_get_sync(&pdev->dev);
3863
3864 netif_carrier_off(netdev);
3865
3866 /* allocate transmit descriptors */
3867 err = e1000e_setup_tx_resources(adapter->tx_ring);
3868 if (err)
3869 goto err_setup_tx;
3870
3871 /* allocate receive descriptors */
3872 err = e1000e_setup_rx_resources(adapter->rx_ring);
3873 if (err)
3874 goto err_setup_rx;
3875
3876 /*
3877 * If AMT is enabled, let the firmware know that the network
3878 * interface is now open and reset the part to a known state.
3879 */
3880 if (adapter->flags & FLAG_HAS_AMT) {
3881 e1000e_get_hw_control(adapter);
3882 e1000e_reset(adapter);
3883 }
3884
3885 e1000e_power_up_phy(adapter);
3886
3887 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
3888 if ((adapter->hw.mng_cookie.status &
3889 E1000_MNG_DHCP_COOKIE_STATUS_VLAN))
3890 e1000_update_mng_vlan(adapter);
3891
3892 /* DMA latency requirement to workaround jumbo issue */
3893 if (adapter->hw.mac.type == e1000_pch2lan)
3894 pm_qos_add_request(&adapter->netdev->pm_qos_req,
3895 PM_QOS_CPU_DMA_LATENCY,
3896 PM_QOS_DEFAULT_VALUE);
3897
3898 /*
3899 * before we allocate an interrupt, we must be ready to handle it.
3900 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
3901 * as soon as we call pci_request_irq, so we have to setup our
3902 * clean_rx handler before we do so.
3903 */
3904 e1000_configure(adapter);
3905
3906 err = e1000_request_irq(adapter);
3907 if (err)
3908 goto err_req_irq;
3909
3910 /*
3911 * Work around PCIe errata with MSI interrupts causing some chipsets to
3912 * ignore e1000e MSI messages, which means we need to test our MSI
3913 * interrupt now
3914 */
3915 if (adapter->int_mode != E1000E_INT_MODE_LEGACY) {
3916 err = e1000_test_msi(adapter);
3917 if (err) {
3918 e_err("Interrupt allocation failed\n");
3919 goto err_req_irq;
3920 }
3921 }
3922
3923 /* From here on the code is the same as e1000e_up() */
3924 clear_bit(__E1000_DOWN, &adapter->state);
3925
3926 napi_enable(&adapter->napi);
3927
3928 e1000_irq_enable(adapter);
3929
3930 adapter->tx_hang_recheck = false;
3931 netif_start_queue(netdev);
3932
3933 adapter->idle_check = true;
3934 pm_runtime_put(&pdev->dev);
3935
3936 /* fire a link status change interrupt to start the watchdog */
3937 if (adapter->msix_entries)
3938 ew32(ICS, E1000_ICS_LSC | E1000_ICR_OTHER);
3939 else
3940 ew32(ICS, E1000_ICS_LSC);
3941
3942 return 0;
3943
3944 err_req_irq:
3945 e1000e_release_hw_control(adapter);
3946 e1000_power_down_phy(adapter);
3947 e1000e_free_rx_resources(adapter->rx_ring);
3948 err_setup_rx:
3949 e1000e_free_tx_resources(adapter->tx_ring);
3950 err_setup_tx:
3951 e1000e_reset(adapter);
3952 pm_runtime_put_sync(&pdev->dev);
3953
3954 return err;
3955 }
3956
3957 /**
3958 * e1000_close - Disables a network interface
3959 * @netdev: network interface device structure
3960 *
3961 * Returns 0, this is not allowed to fail
3962 *
3963 * The close entry point is called when an interface is de-activated
3964 * by the OS. The hardware is still under the drivers control, but
3965 * needs to be disabled. A global MAC reset is issued to stop the
3966 * hardware, and all transmit and receive resources are freed.
3967 **/
3968 static int e1000_close(struct net_device *netdev)
3969 {
3970 struct e1000_adapter *adapter = netdev_priv(netdev);
3971 struct pci_dev *pdev = adapter->pdev;
3972
3973 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
3974
3975 pm_runtime_get_sync(&pdev->dev);
3976
3977 napi_disable(&adapter->napi);
3978
3979 if (!test_bit(__E1000_DOWN, &adapter->state)) {
3980 e1000e_down(adapter);
3981 e1000_free_irq(adapter);
3982 }
3983 e1000_power_down_phy(adapter);
3984
3985 e1000e_free_tx_resources(adapter->tx_ring);
3986 e1000e_free_rx_resources(adapter->rx_ring);
3987
3988 /*
3989 * kill manageability vlan ID if supported, but not if a vlan with
3990 * the same ID is registered on the host OS (let 8021q kill it)
3991 */
3992 if (adapter->hw.mng_cookie.status &
3993 E1000_MNG_DHCP_COOKIE_STATUS_VLAN)
3994 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
3995
3996 /*
3997 * If AMT is enabled, let the firmware know that the network
3998 * interface is now closed
3999 */
4000 if ((adapter->flags & FLAG_HAS_AMT) &&
4001 !test_bit(__E1000_TESTING, &adapter->state))
4002 e1000e_release_hw_control(adapter);
4003
4004 if (adapter->hw.mac.type == e1000_pch2lan)
4005 pm_qos_remove_request(&adapter->netdev->pm_qos_req);
4006
4007 pm_runtime_put_sync(&pdev->dev);
4008
4009 return 0;
4010 }
4011 /**
4012 * e1000_set_mac - Change the Ethernet Address of the NIC
4013 * @netdev: network interface device structure
4014 * @p: pointer to an address structure
4015 *
4016 * Returns 0 on success, negative on failure
4017 **/
4018 static int e1000_set_mac(struct net_device *netdev, void *p)
4019 {
4020 struct e1000_adapter *adapter = netdev_priv(netdev);
4021 struct sockaddr *addr = p;
4022
4023 if (!is_valid_ether_addr(addr->sa_data))
4024 return -EADDRNOTAVAIL;
4025
4026 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
4027 memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
4028
4029 e1000e_rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
4030
4031 if (adapter->flags & FLAG_RESET_OVERWRITES_LAA) {
4032 /* activate the work around */
4033 e1000e_set_laa_state_82571(&adapter->hw, 1);
4034
4035 /*
4036 * Hold a copy of the LAA in RAR[14] This is done so that
4037 * between the time RAR[0] gets clobbered and the time it
4038 * gets fixed (in e1000_watchdog), the actual LAA is in one
4039 * of the RARs and no incoming packets directed to this port
4040 * are dropped. Eventually the LAA will be in RAR[0] and
4041 * RAR[14]
4042 */
4043 e1000e_rar_set(&adapter->hw,
4044 adapter->hw.mac.addr,
4045 adapter->hw.mac.rar_entry_count - 1);
4046 }
4047
4048 return 0;
4049 }
4050
4051 /**
4052 * e1000e_update_phy_task - work thread to update phy
4053 * @work: pointer to our work struct
4054 *
4055 * this worker thread exists because we must acquire a
4056 * semaphore to read the phy, which we could msleep while
4057 * waiting for it, and we can't msleep in a timer.
4058 **/
4059 static void e1000e_update_phy_task(struct work_struct *work)
4060 {
4061 struct e1000_adapter *adapter = container_of(work,
4062 struct e1000_adapter, update_phy_task);
4063
4064 if (test_bit(__E1000_DOWN, &adapter->state))
4065 return;
4066
4067 e1000_get_phy_info(&adapter->hw);
4068 }
4069
4070 /*
4071 * Need to wait a few seconds after link up to get diagnostic information from
4072 * the phy
4073 */
4074 static void e1000_update_phy_info(unsigned long data)
4075 {
4076 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
4077
4078 if (test_bit(__E1000_DOWN, &adapter->state))
4079 return;
4080
4081 schedule_work(&adapter->update_phy_task);
4082 }
4083
4084 /**
4085 * e1000e_update_phy_stats - Update the PHY statistics counters
4086 * @adapter: board private structure
4087 *
4088 * Read/clear the upper 16-bit PHY registers and read/accumulate lower
4089 **/
4090 static void e1000e_update_phy_stats(struct e1000_adapter *adapter)
4091 {
4092 struct e1000_hw *hw = &adapter->hw;
4093 s32 ret_val;
4094 u16 phy_data;
4095
4096 ret_val = hw->phy.ops.acquire(hw);
4097 if (ret_val)
4098 return;
4099
4100 /*
4101 * A page set is expensive so check if already on desired page.
4102 * If not, set to the page with the PHY status registers.
4103 */
4104 hw->phy.addr = 1;
4105 ret_val = e1000e_read_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,
4106 &phy_data);
4107 if (ret_val)
4108 goto release;
4109 if (phy_data != (HV_STATS_PAGE << IGP_PAGE_SHIFT)) {
4110 ret_val = hw->phy.ops.set_page(hw,
4111 HV_STATS_PAGE << IGP_PAGE_SHIFT);
4112 if (ret_val)
4113 goto release;
4114 }
4115
4116 /* Single Collision Count */
4117 hw->phy.ops.read_reg_page(hw, HV_SCC_UPPER, &phy_data);
4118 ret_val = hw->phy.ops.read_reg_page(hw, HV_SCC_LOWER, &phy_data);
4119 if (!ret_val)
4120 adapter->stats.scc += phy_data;
4121
4122 /* Excessive Collision Count */
4123 hw->phy.ops.read_reg_page(hw, HV_ECOL_UPPER, &phy_data);
4124 ret_val = hw->phy.ops.read_reg_page(hw, HV_ECOL_LOWER, &phy_data);
4125 if (!ret_val)
4126 adapter->stats.ecol += phy_data;
4127
4128 /* Multiple Collision Count */
4129 hw->phy.ops.read_reg_page(hw, HV_MCC_UPPER, &phy_data);
4130 ret_val = hw->phy.ops.read_reg_page(hw, HV_MCC_LOWER, &phy_data);
4131 if (!ret_val)
4132 adapter->stats.mcc += phy_data;
4133
4134 /* Late Collision Count */
4135 hw->phy.ops.read_reg_page(hw, HV_LATECOL_UPPER, &phy_data);
4136 ret_val = hw->phy.ops.read_reg_page(hw, HV_LATECOL_LOWER, &phy_data);
4137 if (!ret_val)
4138 adapter->stats.latecol += phy_data;
4139
4140 /* Collision Count - also used for adaptive IFS */
4141 hw->phy.ops.read_reg_page(hw, HV_COLC_UPPER, &phy_data);
4142 ret_val = hw->phy.ops.read_reg_page(hw, HV_COLC_LOWER, &phy_data);
4143 if (!ret_val)
4144 hw->mac.collision_delta = phy_data;
4145
4146 /* Defer Count */
4147 hw->phy.ops.read_reg_page(hw, HV_DC_UPPER, &phy_data);
4148 ret_val = hw->phy.ops.read_reg_page(hw, HV_DC_LOWER, &phy_data);
4149 if (!ret_val)
4150 adapter->stats.dc += phy_data;
4151
4152 /* Transmit with no CRS */
4153 hw->phy.ops.read_reg_page(hw, HV_TNCRS_UPPER, &phy_data);
4154 ret_val = hw->phy.ops.read_reg_page(hw, HV_TNCRS_LOWER, &phy_data);
4155 if (!ret_val)
4156 adapter->stats.tncrs += phy_data;
4157
4158 release:
4159 hw->phy.ops.release(hw);
4160 }
4161
4162 /**
4163 * e1000e_update_stats - Update the board statistics counters
4164 * @adapter: board private structure
4165 **/
4166 static void e1000e_update_stats(struct e1000_adapter *adapter)
4167 {
4168 struct net_device *netdev = adapter->netdev;
4169 struct e1000_hw *hw = &adapter->hw;
4170 struct pci_dev *pdev = adapter->pdev;
4171
4172 /*
4173 * Prevent stats update while adapter is being reset, or if the pci
4174 * connection is down.
4175 */
4176 if (adapter->link_speed == 0)
4177 return;
4178 if (pci_channel_offline(pdev))
4179 return;
4180
4181 adapter->stats.crcerrs += er32(CRCERRS);
4182 adapter->stats.gprc += er32(GPRC);
4183 adapter->stats.gorc += er32(GORCL);
4184 er32(GORCH); /* Clear gorc */
4185 adapter->stats.bprc += er32(BPRC);
4186 adapter->stats.mprc += er32(MPRC);
4187 adapter->stats.roc += er32(ROC);
4188
4189 adapter->stats.mpc += er32(MPC);
4190
4191 /* Half-duplex statistics */
4192 if (adapter->link_duplex == HALF_DUPLEX) {
4193 if (adapter->flags2 & FLAG2_HAS_PHY_STATS) {
4194 e1000e_update_phy_stats(adapter);
4195 } else {
4196 adapter->stats.scc += er32(SCC);
4197 adapter->stats.ecol += er32(ECOL);
4198 adapter->stats.mcc += er32(MCC);
4199 adapter->stats.latecol += er32(LATECOL);
4200 adapter->stats.dc += er32(DC);
4201
4202 hw->mac.collision_delta = er32(COLC);
4203
4204 if ((hw->mac.type != e1000_82574) &&
4205 (hw->mac.type != e1000_82583))
4206 adapter->stats.tncrs += er32(TNCRS);
4207 }
4208 adapter->stats.colc += hw->mac.collision_delta;
4209 }
4210
4211 adapter->stats.xonrxc += er32(XONRXC);
4212 adapter->stats.xontxc += er32(XONTXC);
4213 adapter->stats.xoffrxc += er32(XOFFRXC);
4214 adapter->stats.xofftxc += er32(XOFFTXC);
4215 adapter->stats.gptc += er32(GPTC);
4216 adapter->stats.gotc += er32(GOTCL);
4217 er32(GOTCH); /* Clear gotc */
4218 adapter->stats.rnbc += er32(RNBC);
4219 adapter->stats.ruc += er32(RUC);
4220
4221 adapter->stats.mptc += er32(MPTC);
4222 adapter->stats.bptc += er32(BPTC);
4223
4224 /* used for adaptive IFS */
4225
4226 hw->mac.tx_packet_delta = er32(TPT);
4227 adapter->stats.tpt += hw->mac.tx_packet_delta;
4228
4229 adapter->stats.algnerrc += er32(ALGNERRC);
4230 adapter->stats.rxerrc += er32(RXERRC);
4231 adapter->stats.cexterr += er32(CEXTERR);
4232 adapter->stats.tsctc += er32(TSCTC);
4233 adapter->stats.tsctfc += er32(TSCTFC);
4234
4235 /* Fill out the OS statistics structure */
4236 netdev->stats.multicast = adapter->stats.mprc;
4237 netdev->stats.collisions = adapter->stats.colc;
4238
4239 /* Rx Errors */
4240
4241 /*
4242 * RLEC on some newer hardware can be incorrect so build
4243 * our own version based on RUC and ROC
4244 */
4245 netdev->stats.rx_errors = adapter->stats.rxerrc +
4246 adapter->stats.crcerrs + adapter->stats.algnerrc +
4247 adapter->stats.ruc + adapter->stats.roc +
4248 adapter->stats.cexterr;
4249 netdev->stats.rx_length_errors = adapter->stats.ruc +
4250 adapter->stats.roc;
4251 netdev->stats.rx_crc_errors = adapter->stats.crcerrs;
4252 netdev->stats.rx_frame_errors = adapter->stats.algnerrc;
4253 netdev->stats.rx_missed_errors = adapter->stats.mpc;
4254
4255 /* Tx Errors */
4256 netdev->stats.tx_errors = adapter->stats.ecol +
4257 adapter->stats.latecol;
4258 netdev->stats.tx_aborted_errors = adapter->stats.ecol;
4259 netdev->stats.tx_window_errors = adapter->stats.latecol;
4260 netdev->stats.tx_carrier_errors = adapter->stats.tncrs;
4261
4262 /* Tx Dropped needs to be maintained elsewhere */
4263
4264 /* Management Stats */
4265 adapter->stats.mgptc += er32(MGTPTC);
4266 adapter->stats.mgprc += er32(MGTPRC);
4267 adapter->stats.mgpdc += er32(MGTPDC);
4268 }
4269
4270 /**
4271 * e1000_phy_read_status - Update the PHY register status snapshot
4272 * @adapter: board private structure
4273 **/
4274 static void e1000_phy_read_status(struct e1000_adapter *adapter)
4275 {
4276 struct e1000_hw *hw = &adapter->hw;
4277 struct e1000_phy_regs *phy = &adapter->phy_regs;
4278
4279 if ((er32(STATUS) & E1000_STATUS_LU) &&
4280 (adapter->hw.phy.media_type == e1000_media_type_copper)) {
4281 int ret_val;
4282
4283 ret_val = e1e_rphy(hw, PHY_CONTROL, &phy->bmcr);
4284 ret_val |= e1e_rphy(hw, PHY_STATUS, &phy->bmsr);
4285 ret_val |= e1e_rphy(hw, PHY_AUTONEG_ADV, &phy->advertise);
4286 ret_val |= e1e_rphy(hw, PHY_LP_ABILITY, &phy->lpa);
4287 ret_val |= e1e_rphy(hw, PHY_AUTONEG_EXP, &phy->expansion);
4288 ret_val |= e1e_rphy(hw, PHY_1000T_CTRL, &phy->ctrl1000);
4289 ret_val |= e1e_rphy(hw, PHY_1000T_STATUS, &phy->stat1000);
4290 ret_val |= e1e_rphy(hw, PHY_EXT_STATUS, &phy->estatus);
4291 if (ret_val)
4292 e_warn("Error reading PHY register\n");
4293 } else {
4294 /*
4295 * Do not read PHY registers if link is not up
4296 * Set values to typical power-on defaults
4297 */
4298 phy->bmcr = (BMCR_SPEED1000 | BMCR_ANENABLE | BMCR_FULLDPLX);
4299 phy->bmsr = (BMSR_100FULL | BMSR_100HALF | BMSR_10FULL |
4300 BMSR_10HALF | BMSR_ESTATEN | BMSR_ANEGCAPABLE |
4301 BMSR_ERCAP);
4302 phy->advertise = (ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP |
4303 ADVERTISE_ALL | ADVERTISE_CSMA);
4304 phy->lpa = 0;
4305 phy->expansion = EXPANSION_ENABLENPAGE;
4306 phy->ctrl1000 = ADVERTISE_1000FULL;
4307 phy->stat1000 = 0;
4308 phy->estatus = (ESTATUS_1000_TFULL | ESTATUS_1000_THALF);
4309 }
4310 }
4311
4312 static void e1000_print_link_info(struct e1000_adapter *adapter)
4313 {
4314 struct e1000_hw *hw = &adapter->hw;
4315 u32 ctrl = er32(CTRL);
4316
4317 /* Link status message must follow this format for user tools */
4318 printk(KERN_INFO "e1000e: %s NIC Link is Up %d Mbps %s Duplex, Flow Control: %s\n",
4319 adapter->netdev->name,
4320 adapter->link_speed,
4321 adapter->link_duplex == FULL_DUPLEX ? "Full" : "Half",
4322 (ctrl & E1000_CTRL_TFCE) && (ctrl & E1000_CTRL_RFCE) ? "Rx/Tx" :
4323 (ctrl & E1000_CTRL_RFCE) ? "Rx" :
4324 (ctrl & E1000_CTRL_TFCE) ? "Tx" : "None");
4325 }
4326
4327 static bool e1000e_has_link(struct e1000_adapter *adapter)
4328 {
4329 struct e1000_hw *hw = &adapter->hw;
4330 bool link_active = false;
4331 s32 ret_val = 0;
4332
4333 /*
4334 * get_link_status is set on LSC (link status) interrupt or
4335 * Rx sequence error interrupt. get_link_status will stay
4336 * false until the check_for_link establishes link
4337 * for copper adapters ONLY
4338 */
4339 switch (hw->phy.media_type) {
4340 case e1000_media_type_copper:
4341 if (hw->mac.get_link_status) {
4342 ret_val = hw->mac.ops.check_for_link(hw);
4343 link_active = !hw->mac.get_link_status;
4344 } else {
4345 link_active = true;
4346 }
4347 break;
4348 case e1000_media_type_fiber:
4349 ret_val = hw->mac.ops.check_for_link(hw);
4350 link_active = !!(er32(STATUS) & E1000_STATUS_LU);
4351 break;
4352 case e1000_media_type_internal_serdes:
4353 ret_val = hw->mac.ops.check_for_link(hw);
4354 link_active = adapter->hw.mac.serdes_has_link;
4355 break;
4356 default:
4357 case e1000_media_type_unknown:
4358 break;
4359 }
4360
4361 if ((ret_val == E1000_ERR_PHY) && (hw->phy.type == e1000_phy_igp_3) &&
4362 (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
4363 /* See e1000_kmrn_lock_loss_workaround_ich8lan() */
4364 e_info("Gigabit has been disabled, downgrading speed\n");
4365 }
4366
4367 return link_active;
4368 }
4369
4370 static void e1000e_enable_receives(struct e1000_adapter *adapter)
4371 {
4372 /* make sure the receive unit is started */
4373 if ((adapter->flags & FLAG_RX_NEEDS_RESTART) &&
4374 (adapter->flags & FLAG_RX_RESTART_NOW)) {
4375 struct e1000_hw *hw = &adapter->hw;
4376 u32 rctl = er32(RCTL);
4377 ew32(RCTL, rctl | E1000_RCTL_EN);
4378 adapter->flags &= ~FLAG_RX_RESTART_NOW;
4379 }
4380 }
4381
4382 static void e1000e_check_82574_phy_workaround(struct e1000_adapter *adapter)
4383 {
4384 struct e1000_hw *hw = &adapter->hw;
4385
4386 /*
4387 * With 82574 controllers, PHY needs to be checked periodically
4388 * for hung state and reset, if two calls return true
4389 */
4390 if (e1000_check_phy_82574(hw))
4391 adapter->phy_hang_count++;
4392 else
4393 adapter->phy_hang_count = 0;
4394
4395 if (adapter->phy_hang_count > 1) {
4396 adapter->phy_hang_count = 0;
4397 schedule_work(&adapter->reset_task);
4398 }
4399 }
4400
4401 /**
4402 * e1000_watchdog - Timer Call-back
4403 * @data: pointer to adapter cast into an unsigned long
4404 **/
4405 static void e1000_watchdog(unsigned long data)
4406 {
4407 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
4408
4409 /* Do the rest outside of interrupt context */
4410 schedule_work(&adapter->watchdog_task);
4411
4412 /* TODO: make this use queue_delayed_work() */
4413 }
4414
4415 static void e1000_watchdog_task(struct work_struct *work)
4416 {
4417 struct e1000_adapter *adapter = container_of(work,
4418 struct e1000_adapter, watchdog_task);
4419 struct net_device *netdev = adapter->netdev;
4420 struct e1000_mac_info *mac = &adapter->hw.mac;
4421 struct e1000_phy_info *phy = &adapter->hw.phy;
4422 struct e1000_ring *tx_ring = adapter->tx_ring;
4423 struct e1000_hw *hw = &adapter->hw;
4424 u32 link, tctl;
4425
4426 if (test_bit(__E1000_DOWN, &adapter->state))
4427 return;
4428
4429 link = e1000e_has_link(adapter);
4430 if ((netif_carrier_ok(netdev)) && link) {
4431 /* Cancel scheduled suspend requests. */
4432 pm_runtime_resume(netdev->dev.parent);
4433
4434 e1000e_enable_receives(adapter);
4435 goto link_up;
4436 }
4437
4438 if ((e1000e_enable_tx_pkt_filtering(hw)) &&
4439 (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id))
4440 e1000_update_mng_vlan(adapter);
4441
4442 if (link) {
4443 if (!netif_carrier_ok(netdev)) {
4444 bool txb2b = true;
4445
4446 /* Cancel scheduled suspend requests. */
4447 pm_runtime_resume(netdev->dev.parent);
4448
4449 /* update snapshot of PHY registers on LSC */
4450 e1000_phy_read_status(adapter);
4451 mac->ops.get_link_up_info(&adapter->hw,
4452 &adapter->link_speed,
4453 &adapter->link_duplex);
4454 e1000_print_link_info(adapter);
4455 /*
4456 * On supported PHYs, check for duplex mismatch only
4457 * if link has autonegotiated at 10/100 half
4458 */
4459 if ((hw->phy.type == e1000_phy_igp_3 ||
4460 hw->phy.type == e1000_phy_bm) &&
4461 (hw->mac.autoneg == true) &&
4462 (adapter->link_speed == SPEED_10 ||
4463 adapter->link_speed == SPEED_100) &&
4464 (adapter->link_duplex == HALF_DUPLEX)) {
4465 u16 autoneg_exp;
4466
4467 e1e_rphy(hw, PHY_AUTONEG_EXP, &autoneg_exp);
4468
4469 if (!(autoneg_exp & NWAY_ER_LP_NWAY_CAPS))
4470 e_info("Autonegotiated half duplex but link partner cannot autoneg. Try forcing full duplex if link gets many collisions.\n");
4471 }
4472
4473 /* adjust timeout factor according to speed/duplex */
4474 adapter->tx_timeout_factor = 1;
4475 switch (adapter->link_speed) {
4476 case SPEED_10:
4477 txb2b = false;
4478 adapter->tx_timeout_factor = 16;
4479 break;
4480 case SPEED_100:
4481 txb2b = false;
4482 adapter->tx_timeout_factor = 10;
4483 break;
4484 }
4485
4486 /*
4487 * workaround: re-program speed mode bit after
4488 * link-up event
4489 */
4490 if ((adapter->flags & FLAG_TARC_SPEED_MODE_BIT) &&
4491 !txb2b) {
4492 u32 tarc0;
4493 tarc0 = er32(TARC(0));
4494 tarc0 &= ~SPEED_MODE_BIT;
4495 ew32(TARC(0), tarc0);
4496 }
4497
4498 /*
4499 * disable TSO for pcie and 10/100 speeds, to avoid
4500 * some hardware issues
4501 */
4502 if (!(adapter->flags & FLAG_TSO_FORCE)) {
4503 switch (adapter->link_speed) {
4504 case SPEED_10:
4505 case SPEED_100:
4506 e_info("10/100 speed: disabling TSO\n");
4507 netdev->features &= ~NETIF_F_TSO;
4508 netdev->features &= ~NETIF_F_TSO6;
4509 break;
4510 case SPEED_1000:
4511 netdev->features |= NETIF_F_TSO;
4512 netdev->features |= NETIF_F_TSO6;
4513 break;
4514 default:
4515 /* oops */
4516 break;
4517 }
4518 }
4519
4520 /*
4521 * enable transmits in the hardware, need to do this
4522 * after setting TARC(0)
4523 */
4524 tctl = er32(TCTL);
4525 tctl |= E1000_TCTL_EN;
4526 ew32(TCTL, tctl);
4527
4528 /*
4529 * Perform any post-link-up configuration before
4530 * reporting link up.
4531 */
4532 if (phy->ops.cfg_on_link_up)
4533 phy->ops.cfg_on_link_up(hw);
4534
4535 netif_carrier_on(netdev);
4536
4537 if (!test_bit(__E1000_DOWN, &adapter->state))
4538 mod_timer(&adapter->phy_info_timer,
4539 round_jiffies(jiffies + 2 * HZ));
4540 }
4541 } else {
4542 if (netif_carrier_ok(netdev)) {
4543 adapter->link_speed = 0;
4544 adapter->link_duplex = 0;
4545 /* Link status message must follow this format */
4546 printk(KERN_INFO "e1000e: %s NIC Link is Down\n",
4547 adapter->netdev->name);
4548 netif_carrier_off(netdev);
4549 if (!test_bit(__E1000_DOWN, &adapter->state))
4550 mod_timer(&adapter->phy_info_timer,
4551 round_jiffies(jiffies + 2 * HZ));
4552
4553 if (adapter->flags & FLAG_RX_NEEDS_RESTART)
4554 schedule_work(&adapter->reset_task);
4555 else
4556 pm_schedule_suspend(netdev->dev.parent,
4557 LINK_TIMEOUT);
4558 }
4559 }
4560
4561 link_up:
4562 spin_lock(&adapter->stats64_lock);
4563 e1000e_update_stats(adapter);
4564
4565 mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
4566 adapter->tpt_old = adapter->stats.tpt;
4567 mac->collision_delta = adapter->stats.colc - adapter->colc_old;
4568 adapter->colc_old = adapter->stats.colc;
4569
4570 adapter->gorc = adapter->stats.gorc - adapter->gorc_old;
4571 adapter->gorc_old = adapter->stats.gorc;
4572 adapter->gotc = adapter->stats.gotc - adapter->gotc_old;
4573 adapter->gotc_old = adapter->stats.gotc;
4574 spin_unlock(&adapter->stats64_lock);
4575
4576 e1000e_update_adaptive(&adapter->hw);
4577
4578 if (!netif_carrier_ok(netdev) &&
4579 (e1000_desc_unused(tx_ring) + 1 < tx_ring->count)) {
4580 /*
4581 * We've lost link, so the controller stops DMA,
4582 * but we've got queued Tx work that's never going
4583 * to get done, so reset controller to flush Tx.
4584 * (Do the reset outside of interrupt context).
4585 */
4586 schedule_work(&adapter->reset_task);
4587 /* return immediately since reset is imminent */
4588 return;
4589 }
4590
4591 /* Simple mode for Interrupt Throttle Rate (ITR) */
4592 if (adapter->itr_setting == 4) {
4593 /*
4594 * Symmetric Tx/Rx gets a reduced ITR=2000;
4595 * Total asymmetrical Tx or Rx gets ITR=8000;
4596 * everyone else is between 2000-8000.
4597 */
4598 u32 goc = (adapter->gotc + adapter->gorc) / 10000;
4599 u32 dif = (adapter->gotc > adapter->gorc ?
4600 adapter->gotc - adapter->gorc :
4601 adapter->gorc - adapter->gotc) / 10000;
4602 u32 itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
4603
4604 ew32(ITR, 1000000000 / (itr * 256));
4605 }
4606
4607 /* Cause software interrupt to ensure Rx ring is cleaned */
4608 if (adapter->msix_entries)
4609 ew32(ICS, adapter->rx_ring->ims_val);
4610 else
4611 ew32(ICS, E1000_ICS_RXDMT0);
4612
4613 /* flush pending descriptors to memory before detecting Tx hang */
4614 e1000e_flush_descriptors(adapter);
4615
4616 /* Force detection of hung controller every watchdog period */
4617 adapter->detect_tx_hung = true;
4618
4619 /*
4620 * With 82571 controllers, LAA may be overwritten due to controller
4621 * reset from the other port. Set the appropriate LAA in RAR[0]
4622 */
4623 if (e1000e_get_laa_state_82571(hw))
4624 e1000e_rar_set(hw, adapter->hw.mac.addr, 0);
4625
4626 if (adapter->flags2 & FLAG2_CHECK_PHY_HANG)
4627 e1000e_check_82574_phy_workaround(adapter);
4628
4629 /* Reset the timer */
4630 if (!test_bit(__E1000_DOWN, &adapter->state))
4631 mod_timer(&adapter->watchdog_timer,
4632 round_jiffies(jiffies + 2 * HZ));
4633 }
4634
4635 #define E1000_TX_FLAGS_CSUM 0x00000001
4636 #define E1000_TX_FLAGS_VLAN 0x00000002
4637 #define E1000_TX_FLAGS_TSO 0x00000004
4638 #define E1000_TX_FLAGS_IPV4 0x00000008
4639 #define E1000_TX_FLAGS_NO_FCS 0x00000010
4640 #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
4641 #define E1000_TX_FLAGS_VLAN_SHIFT 16
4642
4643 static int e1000_tso(struct e1000_ring *tx_ring, struct sk_buff *skb)
4644 {
4645 struct e1000_context_desc *context_desc;
4646 struct e1000_buffer *buffer_info;
4647 unsigned int i;
4648 u32 cmd_length = 0;
4649 u16 ipcse = 0, tucse, mss;
4650 u8 ipcss, ipcso, tucss, tucso, hdr_len;
4651
4652 if (!skb_is_gso(skb))
4653 return 0;
4654
4655 if (skb_header_cloned(skb)) {
4656 int err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
4657
4658 if (err)
4659 return err;
4660 }
4661
4662 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
4663 mss = skb_shinfo(skb)->gso_size;
4664 if (skb->protocol == htons(ETH_P_IP)) {
4665 struct iphdr *iph = ip_hdr(skb);
4666 iph->tot_len = 0;
4667 iph->check = 0;
4668 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr,
4669 0, IPPROTO_TCP, 0);
4670 cmd_length = E1000_TXD_CMD_IP;
4671 ipcse = skb_transport_offset(skb) - 1;
4672 } else if (skb_is_gso_v6(skb)) {
4673 ipv6_hdr(skb)->payload_len = 0;
4674 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
4675 &ipv6_hdr(skb)->daddr,
4676 0, IPPROTO_TCP, 0);
4677 ipcse = 0;
4678 }
4679 ipcss = skb_network_offset(skb);
4680 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
4681 tucss = skb_transport_offset(skb);
4682 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
4683 tucse = 0;
4684
4685 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
4686 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
4687
4688 i = tx_ring->next_to_use;
4689 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
4690 buffer_info = &tx_ring->buffer_info[i];
4691
4692 context_desc->lower_setup.ip_fields.ipcss = ipcss;
4693 context_desc->lower_setup.ip_fields.ipcso = ipcso;
4694 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
4695 context_desc->upper_setup.tcp_fields.tucss = tucss;
4696 context_desc->upper_setup.tcp_fields.tucso = tucso;
4697 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
4698 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
4699 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
4700 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
4701
4702 buffer_info->time_stamp = jiffies;
4703 buffer_info->next_to_watch = i;
4704
4705 i++;
4706 if (i == tx_ring->count)
4707 i = 0;
4708 tx_ring->next_to_use = i;
4709
4710 return 1;
4711 }
4712
4713 static bool e1000_tx_csum(struct e1000_ring *tx_ring, struct sk_buff *skb)
4714 {
4715 struct e1000_adapter *adapter = tx_ring->adapter;
4716 struct e1000_context_desc *context_desc;
4717 struct e1000_buffer *buffer_info;
4718 unsigned int i;
4719 u8 css;
4720 u32 cmd_len = E1000_TXD_CMD_DEXT;
4721 __be16 protocol;
4722
4723 if (skb->ip_summed != CHECKSUM_PARTIAL)
4724 return 0;
4725
4726 if (skb->protocol == cpu_to_be16(ETH_P_8021Q))
4727 protocol = vlan_eth_hdr(skb)->h_vlan_encapsulated_proto;
4728 else
4729 protocol = skb->protocol;
4730
4731 switch (protocol) {
4732 case cpu_to_be16(ETH_P_IP):
4733 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
4734 cmd_len |= E1000_TXD_CMD_TCP;
4735 break;
4736 case cpu_to_be16(ETH_P_IPV6):
4737 /* XXX not handling all IPV6 headers */
4738 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
4739 cmd_len |= E1000_TXD_CMD_TCP;
4740 break;
4741 default:
4742 if (unlikely(net_ratelimit()))
4743 e_warn("checksum_partial proto=%x!\n",
4744 be16_to_cpu(protocol));
4745 break;
4746 }
4747
4748 css = skb_checksum_start_offset(skb);
4749
4750 i = tx_ring->next_to_use;
4751 buffer_info = &tx_ring->buffer_info[i];
4752 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
4753
4754 context_desc->lower_setup.ip_config = 0;
4755 context_desc->upper_setup.tcp_fields.tucss = css;
4756 context_desc->upper_setup.tcp_fields.tucso =
4757 css + skb->csum_offset;
4758 context_desc->upper_setup.tcp_fields.tucse = 0;
4759 context_desc->tcp_seg_setup.data = 0;
4760 context_desc->cmd_and_length = cpu_to_le32(cmd_len);
4761
4762 buffer_info->time_stamp = jiffies;
4763 buffer_info->next_to_watch = i;
4764
4765 i++;
4766 if (i == tx_ring->count)
4767 i = 0;
4768 tx_ring->next_to_use = i;
4769
4770 return 1;
4771 }
4772
4773 #define E1000_MAX_PER_TXD 8192
4774 #define E1000_MAX_TXD_PWR 12
4775
4776 static int e1000_tx_map(struct e1000_ring *tx_ring, struct sk_buff *skb,
4777 unsigned int first, unsigned int max_per_txd,
4778 unsigned int nr_frags, unsigned int mss)
4779 {
4780 struct e1000_adapter *adapter = tx_ring->adapter;
4781 struct pci_dev *pdev = adapter->pdev;
4782 struct e1000_buffer *buffer_info;
4783 unsigned int len = skb_headlen(skb);
4784 unsigned int offset = 0, size, count = 0, i;
4785 unsigned int f, bytecount, segs;
4786
4787 i = tx_ring->next_to_use;
4788
4789 while (len) {
4790 buffer_info = &tx_ring->buffer_info[i];
4791 size = min(len, max_per_txd);
4792
4793 buffer_info->length = size;
4794 buffer_info->time_stamp = jiffies;
4795 buffer_info->next_to_watch = i;
4796 buffer_info->dma = dma_map_single(&pdev->dev,
4797 skb->data + offset,
4798 size, DMA_TO_DEVICE);
4799 buffer_info->mapped_as_page = false;
4800 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
4801 goto dma_error;
4802
4803 len -= size;
4804 offset += size;
4805 count++;
4806
4807 if (len) {
4808 i++;
4809 if (i == tx_ring->count)
4810 i = 0;
4811 }
4812 }
4813
4814 for (f = 0; f < nr_frags; f++) {
4815 const struct skb_frag_struct *frag;
4816
4817 frag = &skb_shinfo(skb)->frags[f];
4818 len = skb_frag_size(frag);
4819 offset = 0;
4820
4821 while (len) {
4822 i++;
4823 if (i == tx_ring->count)
4824 i = 0;
4825
4826 buffer_info = &tx_ring->buffer_info[i];
4827 size = min(len, max_per_txd);
4828
4829 buffer_info->length = size;
4830 buffer_info->time_stamp = jiffies;
4831 buffer_info->next_to_watch = i;
4832 buffer_info->dma = skb_frag_dma_map(&pdev->dev, frag,
4833 offset, size, DMA_TO_DEVICE);
4834 buffer_info->mapped_as_page = true;
4835 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
4836 goto dma_error;
4837
4838 len -= size;
4839 offset += size;
4840 count++;
4841 }
4842 }
4843
4844 segs = skb_shinfo(skb)->gso_segs ? : 1;
4845 /* multiply data chunks by size of headers */
4846 bytecount = ((segs - 1) * skb_headlen(skb)) + skb->len;
4847
4848 tx_ring->buffer_info[i].skb = skb;
4849 tx_ring->buffer_info[i].segs = segs;
4850 tx_ring->buffer_info[i].bytecount = bytecount;
4851 tx_ring->buffer_info[first].next_to_watch = i;
4852
4853 return count;
4854
4855 dma_error:
4856 dev_err(&pdev->dev, "Tx DMA map failed\n");
4857 buffer_info->dma = 0;
4858 if (count)
4859 count--;
4860
4861 while (count--) {
4862 if (i == 0)
4863 i += tx_ring->count;
4864 i--;
4865 buffer_info = &tx_ring->buffer_info[i];
4866 e1000_put_txbuf(tx_ring, buffer_info);
4867 }
4868
4869 return 0;
4870 }
4871
4872 static void e1000_tx_queue(struct e1000_ring *tx_ring, int tx_flags, int count)
4873 {
4874 struct e1000_adapter *adapter = tx_ring->adapter;
4875 struct e1000_tx_desc *tx_desc = NULL;
4876 struct e1000_buffer *buffer_info;
4877 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
4878 unsigned int i;
4879
4880 if (tx_flags & E1000_TX_FLAGS_TSO) {
4881 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
4882 E1000_TXD_CMD_TSE;
4883 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
4884
4885 if (tx_flags & E1000_TX_FLAGS_IPV4)
4886 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
4887 }
4888
4889 if (tx_flags & E1000_TX_FLAGS_CSUM) {
4890 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
4891 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
4892 }
4893
4894 if (tx_flags & E1000_TX_FLAGS_VLAN) {
4895 txd_lower |= E1000_TXD_CMD_VLE;
4896 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
4897 }
4898
4899 if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS))
4900 txd_lower &= ~(E1000_TXD_CMD_IFCS);
4901
4902 i = tx_ring->next_to_use;
4903
4904 do {
4905 buffer_info = &tx_ring->buffer_info[i];
4906 tx_desc = E1000_TX_DESC(*tx_ring, i);
4907 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4908 tx_desc->lower.data =
4909 cpu_to_le32(txd_lower | buffer_info->length);
4910 tx_desc->upper.data = cpu_to_le32(txd_upper);
4911
4912 i++;
4913 if (i == tx_ring->count)
4914 i = 0;
4915 } while (--count > 0);
4916
4917 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
4918
4919 /* txd_cmd re-enables FCS, so we'll re-disable it here as desired. */
4920 if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS))
4921 tx_desc->lower.data &= ~(cpu_to_le32(E1000_TXD_CMD_IFCS));
4922
4923 /*
4924 * Force memory writes to complete before letting h/w
4925 * know there are new descriptors to fetch. (Only
4926 * applicable for weak-ordered memory model archs,
4927 * such as IA-64).
4928 */
4929 wmb();
4930
4931 tx_ring->next_to_use = i;
4932
4933 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
4934 e1000e_update_tdt_wa(tx_ring, i);
4935 else
4936 writel(i, tx_ring->tail);
4937
4938 /*
4939 * we need this if more than one processor can write to our tail
4940 * at a time, it synchronizes IO on IA64/Altix systems
4941 */
4942 mmiowb();
4943 }
4944
4945 #define MINIMUM_DHCP_PACKET_SIZE 282
4946 static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter,
4947 struct sk_buff *skb)
4948 {
4949 struct e1000_hw *hw = &adapter->hw;
4950 u16 length, offset;
4951
4952 if (vlan_tx_tag_present(skb)) {
4953 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
4954 (adapter->hw.mng_cookie.status &
4955 E1000_MNG_DHCP_COOKIE_STATUS_VLAN)))
4956 return 0;
4957 }
4958
4959 if (skb->len <= MINIMUM_DHCP_PACKET_SIZE)
4960 return 0;
4961
4962 if (((struct ethhdr *) skb->data)->h_proto != htons(ETH_P_IP))
4963 return 0;
4964
4965 {
4966 const struct iphdr *ip = (struct iphdr *)((u8 *)skb->data+14);
4967 struct udphdr *udp;
4968
4969 if (ip->protocol != IPPROTO_UDP)
4970 return 0;
4971
4972 udp = (struct udphdr *)((u8 *)ip + (ip->ihl << 2));
4973 if (ntohs(udp->dest) != 67)
4974 return 0;
4975
4976 offset = (u8 *)udp + 8 - skb->data;
4977 length = skb->len - offset;
4978 return e1000e_mng_write_dhcp_info(hw, (u8 *)udp + 8, length);
4979 }
4980
4981 return 0;
4982 }
4983
4984 static int __e1000_maybe_stop_tx(struct e1000_ring *tx_ring, int size)
4985 {
4986 struct e1000_adapter *adapter = tx_ring->adapter;
4987
4988 netif_stop_queue(adapter->netdev);
4989 /*
4990 * Herbert's original patch had:
4991 * smp_mb__after_netif_stop_queue();
4992 * but since that doesn't exist yet, just open code it.
4993 */
4994 smp_mb();
4995
4996 /*
4997 * We need to check again in a case another CPU has just
4998 * made room available.
4999 */
5000 if (e1000_desc_unused(tx_ring) < size)
5001 return -EBUSY;
5002
5003 /* A reprieve! */
5004 netif_start_queue(adapter->netdev);
5005 ++adapter->restart_queue;
5006 return 0;
5007 }
5008
5009 static int e1000_maybe_stop_tx(struct e1000_ring *tx_ring, int size)
5010 {
5011 if (e1000_desc_unused(tx_ring) >= size)
5012 return 0;
5013 return __e1000_maybe_stop_tx(tx_ring, size);
5014 }
5015
5016 #define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1)
5017 static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
5018 struct net_device *netdev)
5019 {
5020 struct e1000_adapter *adapter = netdev_priv(netdev);
5021 struct e1000_ring *tx_ring = adapter->tx_ring;
5022 unsigned int first;
5023 unsigned int max_per_txd = E1000_MAX_PER_TXD;
5024 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
5025 unsigned int tx_flags = 0;
5026 unsigned int len = skb_headlen(skb);
5027 unsigned int nr_frags;
5028 unsigned int mss;
5029 int count = 0;
5030 int tso;
5031 unsigned int f;
5032
5033 if (test_bit(__E1000_DOWN, &adapter->state)) {
5034 dev_kfree_skb_any(skb);
5035 return NETDEV_TX_OK;
5036 }
5037
5038 if (skb->len <= 0) {
5039 dev_kfree_skb_any(skb);
5040 return NETDEV_TX_OK;
5041 }
5042
5043 mss = skb_shinfo(skb)->gso_size;
5044 /*
5045 * The controller does a simple calculation to
5046 * make sure there is enough room in the FIFO before
5047 * initiating the DMA for each buffer. The calc is:
5048 * 4 = ceil(buffer len/mss). To make sure we don't
5049 * overrun the FIFO, adjust the max buffer len if mss
5050 * drops.
5051 */
5052 if (mss) {
5053 u8 hdr_len;
5054 max_per_txd = min(mss << 2, max_per_txd);
5055 max_txd_pwr = fls(max_per_txd) - 1;
5056
5057 /*
5058 * TSO Workaround for 82571/2/3 Controllers -- if skb->data
5059 * points to just header, pull a few bytes of payload from
5060 * frags into skb->data
5061 */
5062 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
5063 /*
5064 * we do this workaround for ES2LAN, but it is un-necessary,
5065 * avoiding it could save a lot of cycles
5066 */
5067 if (skb->data_len && (hdr_len == len)) {
5068 unsigned int pull_size;
5069
5070 pull_size = min_t(unsigned int, 4, skb->data_len);
5071 if (!__pskb_pull_tail(skb, pull_size)) {
5072 e_err("__pskb_pull_tail failed.\n");
5073 dev_kfree_skb_any(skb);
5074 return NETDEV_TX_OK;
5075 }
5076 len = skb_headlen(skb);
5077 }
5078 }
5079
5080 /* reserve a descriptor for the offload context */
5081 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
5082 count++;
5083 count++;
5084
5085 count += TXD_USE_COUNT(len, max_txd_pwr);
5086
5087 nr_frags = skb_shinfo(skb)->nr_frags;
5088 for (f = 0; f < nr_frags; f++)
5089 count += TXD_USE_COUNT(skb_frag_size(&skb_shinfo(skb)->frags[f]),
5090 max_txd_pwr);
5091
5092 if (adapter->hw.mac.tx_pkt_filtering)
5093 e1000_transfer_dhcp_info(adapter, skb);
5094
5095 /*
5096 * need: count + 2 desc gap to keep tail from touching
5097 * head, otherwise try next time
5098 */
5099 if (e1000_maybe_stop_tx(tx_ring, count + 2))
5100 return NETDEV_TX_BUSY;
5101
5102 if (vlan_tx_tag_present(skb)) {
5103 tx_flags |= E1000_TX_FLAGS_VLAN;
5104 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
5105 }
5106
5107 first = tx_ring->next_to_use;
5108
5109 tso = e1000_tso(tx_ring, skb);
5110 if (tso < 0) {
5111 dev_kfree_skb_any(skb);
5112 return NETDEV_TX_OK;
5113 }
5114
5115 if (tso)
5116 tx_flags |= E1000_TX_FLAGS_TSO;
5117 else if (e1000_tx_csum(tx_ring, skb))
5118 tx_flags |= E1000_TX_FLAGS_CSUM;
5119
5120 /*
5121 * Old method was to assume IPv4 packet by default if TSO was enabled.
5122 * 82571 hardware supports TSO capabilities for IPv6 as well...
5123 * no longer assume, we must.
5124 */
5125 if (skb->protocol == htons(ETH_P_IP))
5126 tx_flags |= E1000_TX_FLAGS_IPV4;
5127
5128 if (unlikely(skb->no_fcs))
5129 tx_flags |= E1000_TX_FLAGS_NO_FCS;
5130
5131 /* if count is 0 then mapping error has occurred */
5132 count = e1000_tx_map(tx_ring, skb, first, max_per_txd, nr_frags, mss);
5133 if (count) {
5134 netdev_sent_queue(netdev, skb->len);
5135 e1000_tx_queue(tx_ring, tx_flags, count);
5136 /* Make sure there is space in the ring for the next send. */
5137 e1000_maybe_stop_tx(tx_ring, MAX_SKB_FRAGS + 2);
5138
5139 } else {
5140 dev_kfree_skb_any(skb);
5141 tx_ring->buffer_info[first].time_stamp = 0;
5142 tx_ring->next_to_use = first;
5143 }
5144
5145 return NETDEV_TX_OK;
5146 }
5147
5148 /**
5149 * e1000_tx_timeout - Respond to a Tx Hang
5150 * @netdev: network interface device structure
5151 **/
5152 static void e1000_tx_timeout(struct net_device *netdev)
5153 {
5154 struct e1000_adapter *adapter = netdev_priv(netdev);
5155
5156 /* Do the reset outside of interrupt context */
5157 adapter->tx_timeout_count++;
5158 schedule_work(&adapter->reset_task);
5159 }
5160
5161 static void e1000_reset_task(struct work_struct *work)
5162 {
5163 struct e1000_adapter *adapter;
5164 adapter = container_of(work, struct e1000_adapter, reset_task);
5165
5166 /* don't run the task if already down */
5167 if (test_bit(__E1000_DOWN, &adapter->state))
5168 return;
5169
5170 if (!((adapter->flags & FLAG_RX_NEEDS_RESTART) &&
5171 (adapter->flags & FLAG_RX_RESTART_NOW))) {
5172 e1000e_dump(adapter);
5173 e_err("Reset adapter\n");
5174 }
5175 e1000e_reinit_locked(adapter);
5176 }
5177
5178 /**
5179 * e1000_get_stats64 - Get System Network Statistics
5180 * @netdev: network interface device structure
5181 * @stats: rtnl_link_stats64 pointer
5182 *
5183 * Returns the address of the device statistics structure.
5184 **/
5185 struct rtnl_link_stats64 *e1000e_get_stats64(struct net_device *netdev,
5186 struct rtnl_link_stats64 *stats)
5187 {
5188 struct e1000_adapter *adapter = netdev_priv(netdev);
5189
5190 memset(stats, 0, sizeof(struct rtnl_link_stats64));
5191 spin_lock(&adapter->stats64_lock);
5192 e1000e_update_stats(adapter);
5193 /* Fill out the OS statistics structure */
5194 stats->rx_bytes = adapter->stats.gorc;
5195 stats->rx_packets = adapter->stats.gprc;
5196 stats->tx_bytes = adapter->stats.gotc;
5197 stats->tx_packets = adapter->stats.gptc;
5198 stats->multicast = adapter->stats.mprc;
5199 stats->collisions = adapter->stats.colc;
5200
5201 /* Rx Errors */
5202
5203 /*
5204 * RLEC on some newer hardware can be incorrect so build
5205 * our own version based on RUC and ROC
5206 */
5207 stats->rx_errors = adapter->stats.rxerrc +
5208 adapter->stats.crcerrs + adapter->stats.algnerrc +
5209 adapter->stats.ruc + adapter->stats.roc +
5210 adapter->stats.cexterr;
5211 stats->rx_length_errors = adapter->stats.ruc +
5212 adapter->stats.roc;
5213 stats->rx_crc_errors = adapter->stats.crcerrs;
5214 stats->rx_frame_errors = adapter->stats.algnerrc;
5215 stats->rx_missed_errors = adapter->stats.mpc;
5216
5217 /* Tx Errors */
5218 stats->tx_errors = adapter->stats.ecol +
5219 adapter->stats.latecol;
5220 stats->tx_aborted_errors = adapter->stats.ecol;
5221 stats->tx_window_errors = adapter->stats.latecol;
5222 stats->tx_carrier_errors = adapter->stats.tncrs;
5223
5224 /* Tx Dropped needs to be maintained elsewhere */
5225
5226 spin_unlock(&adapter->stats64_lock);
5227 return stats;
5228 }
5229
5230 /**
5231 * e1000_change_mtu - Change the Maximum Transfer Unit
5232 * @netdev: network interface device structure
5233 * @new_mtu: new value for maximum frame size
5234 *
5235 * Returns 0 on success, negative on failure
5236 **/
5237 static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
5238 {
5239 struct e1000_adapter *adapter = netdev_priv(netdev);
5240 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
5241
5242 /* Jumbo frame support */
5243 if (max_frame > ETH_FRAME_LEN + ETH_FCS_LEN) {
5244 if (!(adapter->flags & FLAG_HAS_JUMBO_FRAMES)) {
5245 e_err("Jumbo Frames not supported.\n");
5246 return -EINVAL;
5247 }
5248
5249 /*
5250 * IP payload checksum (enabled with jumbos/packet-split when
5251 * Rx checksum is enabled) and generation of RSS hash is
5252 * mutually exclusive in the hardware.
5253 */
5254 if ((netdev->features & NETIF_F_RXCSUM) &&
5255 (netdev->features & NETIF_F_RXHASH)) {
5256 e_err("Jumbo frames cannot be enabled when both receive checksum offload and receive hashing are enabled. Disable one of the receive offload features before enabling jumbos.\n");
5257 return -EINVAL;
5258 }
5259 }
5260
5261 /* Supported frame sizes */
5262 if ((new_mtu < ETH_ZLEN + ETH_FCS_LEN + VLAN_HLEN) ||
5263 (max_frame > adapter->max_hw_frame_size)) {
5264 e_err("Unsupported MTU setting\n");
5265 return -EINVAL;
5266 }
5267
5268 /* Jumbo frame workaround on 82579 requires CRC be stripped */
5269 if ((adapter->hw.mac.type == e1000_pch2lan) &&
5270 !(adapter->flags2 & FLAG2_CRC_STRIPPING) &&
5271 (new_mtu > ETH_DATA_LEN)) {
5272 e_err("Jumbo Frames not supported on 82579 when CRC stripping is disabled.\n");
5273 return -EINVAL;
5274 }
5275
5276 /* 82573 Errata 17 */
5277 if (((adapter->hw.mac.type == e1000_82573) ||
5278 (adapter->hw.mac.type == e1000_82574)) &&
5279 (max_frame > ETH_FRAME_LEN + ETH_FCS_LEN)) {
5280 adapter->flags2 |= FLAG2_DISABLE_ASPM_L1;
5281 e1000e_disable_aspm(adapter->pdev, PCIE_LINK_STATE_L1);
5282 }
5283
5284 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
5285 usleep_range(1000, 2000);
5286 /* e1000e_down -> e1000e_reset dependent on max_frame_size & mtu */
5287 adapter->max_frame_size = max_frame;
5288 e_info("changing MTU from %d to %d\n", netdev->mtu, new_mtu);
5289 netdev->mtu = new_mtu;
5290 if (netif_running(netdev))
5291 e1000e_down(adapter);
5292
5293 /*
5294 * NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
5295 * means we reserve 2 more, this pushes us to allocate from the next
5296 * larger slab size.
5297 * i.e. RXBUFFER_2048 --> size-4096 slab
5298 * However with the new *_jumbo_rx* routines, jumbo receives will use
5299 * fragmented skbs
5300 */
5301
5302 if (max_frame <= 2048)
5303 adapter->rx_buffer_len = 2048;
5304 else
5305 adapter->rx_buffer_len = 4096;
5306
5307 /* adjust allocation if LPE protects us, and we aren't using SBP */
5308 if ((max_frame == ETH_FRAME_LEN + ETH_FCS_LEN) ||
5309 (max_frame == ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN))
5310 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN
5311 + ETH_FCS_LEN;
5312
5313 if (netif_running(netdev))
5314 e1000e_up(adapter);
5315 else
5316 e1000e_reset(adapter);
5317
5318 clear_bit(__E1000_RESETTING, &adapter->state);
5319
5320 return 0;
5321 }
5322
5323 static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
5324 int cmd)
5325 {
5326 struct e1000_adapter *adapter = netdev_priv(netdev);
5327 struct mii_ioctl_data *data = if_mii(ifr);
5328
5329 if (adapter->hw.phy.media_type != e1000_media_type_copper)
5330 return -EOPNOTSUPP;
5331
5332 switch (cmd) {
5333 case SIOCGMIIPHY:
5334 data->phy_id = adapter->hw.phy.addr;
5335 break;
5336 case SIOCGMIIREG:
5337 e1000_phy_read_status(adapter);
5338
5339 switch (data->reg_num & 0x1F) {
5340 case MII_BMCR:
5341 data->val_out = adapter->phy_regs.bmcr;
5342 break;
5343 case MII_BMSR:
5344 data->val_out = adapter->phy_regs.bmsr;
5345 break;
5346 case MII_PHYSID1:
5347 data->val_out = (adapter->hw.phy.id >> 16);
5348 break;
5349 case MII_PHYSID2:
5350 data->val_out = (adapter->hw.phy.id & 0xFFFF);
5351 break;
5352 case MII_ADVERTISE:
5353 data->val_out = adapter->phy_regs.advertise;
5354 break;
5355 case MII_LPA:
5356 data->val_out = adapter->phy_regs.lpa;
5357 break;
5358 case MII_EXPANSION:
5359 data->val_out = adapter->phy_regs.expansion;
5360 break;
5361 case MII_CTRL1000:
5362 data->val_out = adapter->phy_regs.ctrl1000;
5363 break;
5364 case MII_STAT1000:
5365 data->val_out = adapter->phy_regs.stat1000;
5366 break;
5367 case MII_ESTATUS:
5368 data->val_out = adapter->phy_regs.estatus;
5369 break;
5370 default:
5371 return -EIO;
5372 }
5373 break;
5374 case SIOCSMIIREG:
5375 default:
5376 return -EOPNOTSUPP;
5377 }
5378 return 0;
5379 }
5380
5381 static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
5382 {
5383 switch (cmd) {
5384 case SIOCGMIIPHY:
5385 case SIOCGMIIREG:
5386 case SIOCSMIIREG:
5387 return e1000_mii_ioctl(netdev, ifr, cmd);
5388 default:
5389 return -EOPNOTSUPP;
5390 }
5391 }
5392
5393 static int e1000_init_phy_wakeup(struct e1000_adapter *adapter, u32 wufc)
5394 {
5395 struct e1000_hw *hw = &adapter->hw;
5396 u32 i, mac_reg;
5397 u16 phy_reg, wuc_enable;
5398 int retval = 0;
5399
5400 /* copy MAC RARs to PHY RARs */
5401 e1000_copy_rx_addrs_to_phy_ich8lan(hw);
5402
5403 retval = hw->phy.ops.acquire(hw);
5404 if (retval) {
5405 e_err("Could not acquire PHY\n");
5406 return retval;
5407 }
5408
5409 /* Enable access to wakeup registers on and set page to BM_WUC_PAGE */
5410 retval = e1000_enable_phy_wakeup_reg_access_bm(hw, &wuc_enable);
5411 if (retval)
5412 goto release;
5413
5414 /* copy MAC MTA to PHY MTA - only needed for pchlan */
5415 for (i = 0; i < adapter->hw.mac.mta_reg_count; i++) {
5416 mac_reg = E1000_READ_REG_ARRAY(hw, E1000_MTA, i);
5417 hw->phy.ops.write_reg_page(hw, BM_MTA(i),
5418 (u16)(mac_reg & 0xFFFF));
5419 hw->phy.ops.write_reg_page(hw, BM_MTA(i) + 1,
5420 (u16)((mac_reg >> 16) & 0xFFFF));
5421 }
5422
5423 /* configure PHY Rx Control register */
5424 hw->phy.ops.read_reg_page(&adapter->hw, BM_RCTL, &phy_reg);
5425 mac_reg = er32(RCTL);
5426 if (mac_reg & E1000_RCTL_UPE)
5427 phy_reg |= BM_RCTL_UPE;
5428 if (mac_reg & E1000_RCTL_MPE)
5429 phy_reg |= BM_RCTL_MPE;
5430 phy_reg &= ~(BM_RCTL_MO_MASK);
5431 if (mac_reg & E1000_RCTL_MO_3)
5432 phy_reg |= (((mac_reg & E1000_RCTL_MO_3) >> E1000_RCTL_MO_SHIFT)
5433 << BM_RCTL_MO_SHIFT);
5434 if (mac_reg & E1000_RCTL_BAM)
5435 phy_reg |= BM_RCTL_BAM;
5436 if (mac_reg & E1000_RCTL_PMCF)
5437 phy_reg |= BM_RCTL_PMCF;
5438 mac_reg = er32(CTRL);
5439 if (mac_reg & E1000_CTRL_RFCE)
5440 phy_reg |= BM_RCTL_RFCE;
5441 hw->phy.ops.write_reg_page(&adapter->hw, BM_RCTL, phy_reg);
5442
5443 /* enable PHY wakeup in MAC register */
5444 ew32(WUFC, wufc);
5445 ew32(WUC, E1000_WUC_PHY_WAKE | E1000_WUC_PME_EN);
5446
5447 /* configure and enable PHY wakeup in PHY registers */
5448 hw->phy.ops.write_reg_page(&adapter->hw, BM_WUFC, wufc);
5449 hw->phy.ops.write_reg_page(&adapter->hw, BM_WUC, E1000_WUC_PME_EN);
5450
5451 /* activate PHY wakeup */
5452 wuc_enable |= BM_WUC_ENABLE_BIT | BM_WUC_HOST_WU_BIT;
5453 retval = e1000_disable_phy_wakeup_reg_access_bm(hw, &wuc_enable);
5454 if (retval)
5455 e_err("Could not set PHY Host Wakeup bit\n");
5456 release:
5457 hw->phy.ops.release(hw);
5458
5459 return retval;
5460 }
5461
5462 static int __e1000_shutdown(struct pci_dev *pdev, bool *enable_wake,
5463 bool runtime)
5464 {
5465 struct net_device *netdev = pci_get_drvdata(pdev);
5466 struct e1000_adapter *adapter = netdev_priv(netdev);
5467 struct e1000_hw *hw = &adapter->hw;
5468 u32 ctrl, ctrl_ext, rctl, status;
5469 /* Runtime suspend should only enable wakeup for link changes */
5470 u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol;
5471 int retval = 0;
5472
5473 netif_device_detach(netdev);
5474
5475 if (netif_running(netdev)) {
5476 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
5477 e1000e_down(adapter);
5478 e1000_free_irq(adapter);
5479 }
5480 e1000e_reset_interrupt_capability(adapter);
5481
5482 retval = pci_save_state(pdev);
5483 if (retval)
5484 return retval;
5485
5486 status = er32(STATUS);
5487 if (status & E1000_STATUS_LU)
5488 wufc &= ~E1000_WUFC_LNKC;
5489
5490 if (wufc) {
5491 e1000_setup_rctl(adapter);
5492 e1000e_set_rx_mode(netdev);
5493
5494 /* turn on all-multi mode if wake on multicast is enabled */
5495 if (wufc & E1000_WUFC_MC) {
5496 rctl = er32(RCTL);
5497 rctl |= E1000_RCTL_MPE;
5498 ew32(RCTL, rctl);
5499 }
5500
5501 ctrl = er32(CTRL);
5502 /* advertise wake from D3Cold */
5503 #define E1000_CTRL_ADVD3WUC 0x00100000
5504 /* phy power management enable */
5505 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
5506 ctrl |= E1000_CTRL_ADVD3WUC;
5507 if (!(adapter->flags2 & FLAG2_HAS_PHY_WAKEUP))
5508 ctrl |= E1000_CTRL_EN_PHY_PWR_MGMT;
5509 ew32(CTRL, ctrl);
5510
5511 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
5512 adapter->hw.phy.media_type ==
5513 e1000_media_type_internal_serdes) {
5514 /* keep the laser running in D3 */
5515 ctrl_ext = er32(CTRL_EXT);
5516 ctrl_ext |= E1000_CTRL_EXT_SDP3_DATA;
5517 ew32(CTRL_EXT, ctrl_ext);
5518 }
5519
5520 if (adapter->flags & FLAG_IS_ICH)
5521 e1000_suspend_workarounds_ich8lan(&adapter->hw);
5522
5523 /* Allow time for pending master requests to run */
5524 e1000e_disable_pcie_master(&adapter->hw);
5525
5526 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
5527 /* enable wakeup by the PHY */
5528 retval = e1000_init_phy_wakeup(adapter, wufc);
5529 if (retval)
5530 return retval;
5531 } else {
5532 /* enable wakeup by the MAC */
5533 ew32(WUFC, wufc);
5534 ew32(WUC, E1000_WUC_PME_EN);
5535 }
5536 } else {
5537 ew32(WUC, 0);
5538 ew32(WUFC, 0);
5539 }
5540
5541 *enable_wake = !!wufc;
5542
5543 /* make sure adapter isn't asleep if manageability is enabled */
5544 if ((adapter->flags & FLAG_MNG_PT_ENABLED) ||
5545 (hw->mac.ops.check_mng_mode(hw)))
5546 *enable_wake = true;
5547
5548 if (adapter->hw.phy.type == e1000_phy_igp_3)
5549 e1000e_igp3_phy_powerdown_workaround_ich8lan(&adapter->hw);
5550
5551 /*
5552 * Release control of h/w to f/w. If f/w is AMT enabled, this
5553 * would have already happened in close and is redundant.
5554 */
5555 e1000e_release_hw_control(adapter);
5556
5557 pci_disable_device(pdev);
5558
5559 return 0;
5560 }
5561
5562 static void e1000_power_off(struct pci_dev *pdev, bool sleep, bool wake)
5563 {
5564 if (sleep && wake) {
5565 pci_prepare_to_sleep(pdev);
5566 return;
5567 }
5568
5569 pci_wake_from_d3(pdev, wake);
5570 pci_set_power_state(pdev, PCI_D3hot);
5571 }
5572
5573 static void e1000_complete_shutdown(struct pci_dev *pdev, bool sleep,
5574 bool wake)
5575 {
5576 struct net_device *netdev = pci_get_drvdata(pdev);
5577 struct e1000_adapter *adapter = netdev_priv(netdev);
5578
5579 /*
5580 * The pci-e switch on some quad port adapters will report a
5581 * correctable error when the MAC transitions from D0 to D3. To
5582 * prevent this we need to mask off the correctable errors on the
5583 * downstream port of the pci-e switch.
5584 */
5585 if (adapter->flags & FLAG_IS_QUAD_PORT) {
5586 struct pci_dev *us_dev = pdev->bus->self;
5587 int pos = pci_pcie_cap(us_dev);
5588 u16 devctl;
5589
5590 pci_read_config_word(us_dev, pos + PCI_EXP_DEVCTL, &devctl);
5591 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL,
5592 (devctl & ~PCI_EXP_DEVCTL_CERE));
5593
5594 e1000_power_off(pdev, sleep, wake);
5595
5596 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL, devctl);
5597 } else {
5598 e1000_power_off(pdev, sleep, wake);
5599 }
5600 }
5601
5602 #ifdef CONFIG_PCIEASPM
5603 static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
5604 {
5605 pci_disable_link_state_locked(pdev, state);
5606 }
5607 #else
5608 static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
5609 {
5610 int pos;
5611 u16 reg16;
5612
5613 /*
5614 * Both device and parent should have the same ASPM setting.
5615 * Disable ASPM in downstream component first and then upstream.
5616 */
5617 pos = pci_pcie_cap(pdev);
5618 pci_read_config_word(pdev, pos + PCI_EXP_LNKCTL, &reg16);
5619 reg16 &= ~state;
5620 pci_write_config_word(pdev, pos + PCI_EXP_LNKCTL, reg16);
5621
5622 if (!pdev->bus->self)
5623 return;
5624
5625 pos = pci_pcie_cap(pdev->bus->self);
5626 pci_read_config_word(pdev->bus->self, pos + PCI_EXP_LNKCTL, &reg16);
5627 reg16 &= ~state;
5628 pci_write_config_word(pdev->bus->self, pos + PCI_EXP_LNKCTL, reg16);
5629 }
5630 #endif
5631 static void e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
5632 {
5633 dev_info(&pdev->dev, "Disabling ASPM %s %s\n",
5634 (state & PCIE_LINK_STATE_L0S) ? "L0s" : "",
5635 (state & PCIE_LINK_STATE_L1) ? "L1" : "");
5636
5637 __e1000e_disable_aspm(pdev, state);
5638 }
5639
5640 #ifdef CONFIG_PM
5641 static bool e1000e_pm_ready(struct e1000_adapter *adapter)
5642 {
5643 return !!adapter->tx_ring->buffer_info;
5644 }
5645
5646 static int __e1000_resume(struct pci_dev *pdev)
5647 {
5648 struct net_device *netdev = pci_get_drvdata(pdev);
5649 struct e1000_adapter *adapter = netdev_priv(netdev);
5650 struct e1000_hw *hw = &adapter->hw;
5651 u16 aspm_disable_flag = 0;
5652 u32 err;
5653
5654 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L0S)
5655 aspm_disable_flag = PCIE_LINK_STATE_L0S;
5656 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
5657 aspm_disable_flag |= PCIE_LINK_STATE_L1;
5658 if (aspm_disable_flag)
5659 e1000e_disable_aspm(pdev, aspm_disable_flag);
5660
5661 pci_set_power_state(pdev, PCI_D0);
5662 pci_restore_state(pdev);
5663 pci_save_state(pdev);
5664
5665 e1000e_set_interrupt_capability(adapter);
5666 if (netif_running(netdev)) {
5667 err = e1000_request_irq(adapter);
5668 if (err)
5669 return err;
5670 }
5671
5672 if (hw->mac.type == e1000_pch2lan)
5673 e1000_resume_workarounds_pchlan(&adapter->hw);
5674
5675 e1000e_power_up_phy(adapter);
5676
5677 /* report the system wakeup cause from S3/S4 */
5678 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
5679 u16 phy_data;
5680
5681 e1e_rphy(&adapter->hw, BM_WUS, &phy_data);
5682 if (phy_data) {
5683 e_info("PHY Wakeup cause - %s\n",
5684 phy_data & E1000_WUS_EX ? "Unicast Packet" :
5685 phy_data & E1000_WUS_MC ? "Multicast Packet" :
5686 phy_data & E1000_WUS_BC ? "Broadcast Packet" :
5687 phy_data & E1000_WUS_MAG ? "Magic Packet" :
5688 phy_data & E1000_WUS_LNKC ?
5689 "Link Status Change" : "other");
5690 }
5691 e1e_wphy(&adapter->hw, BM_WUS, ~0);
5692 } else {
5693 u32 wus = er32(WUS);
5694 if (wus) {
5695 e_info("MAC Wakeup cause - %s\n",
5696 wus & E1000_WUS_EX ? "Unicast Packet" :
5697 wus & E1000_WUS_MC ? "Multicast Packet" :
5698 wus & E1000_WUS_BC ? "Broadcast Packet" :
5699 wus & E1000_WUS_MAG ? "Magic Packet" :
5700 wus & E1000_WUS_LNKC ? "Link Status Change" :
5701 "other");
5702 }
5703 ew32(WUS, ~0);
5704 }
5705
5706 e1000e_reset(adapter);
5707
5708 e1000_init_manageability_pt(adapter);
5709
5710 if (netif_running(netdev))
5711 e1000e_up(adapter);
5712
5713 netif_device_attach(netdev);
5714
5715 /*
5716 * If the controller has AMT, do not set DRV_LOAD until the interface
5717 * is up. For all other cases, let the f/w know that the h/w is now
5718 * under the control of the driver.
5719 */
5720 if (!(adapter->flags & FLAG_HAS_AMT))
5721 e1000e_get_hw_control(adapter);
5722
5723 return 0;
5724 }
5725
5726 #ifdef CONFIG_PM_SLEEP
5727 static int e1000_suspend(struct device *dev)
5728 {
5729 struct pci_dev *pdev = to_pci_dev(dev);
5730 int retval;
5731 bool wake;
5732
5733 retval = __e1000_shutdown(pdev, &wake, false);
5734 if (!retval)
5735 e1000_complete_shutdown(pdev, true, wake);
5736
5737 return retval;
5738 }
5739
5740 static int e1000_resume(struct device *dev)
5741 {
5742 struct pci_dev *pdev = to_pci_dev(dev);
5743 struct net_device *netdev = pci_get_drvdata(pdev);
5744 struct e1000_adapter *adapter = netdev_priv(netdev);
5745
5746 if (e1000e_pm_ready(adapter))
5747 adapter->idle_check = true;
5748
5749 return __e1000_resume(pdev);
5750 }
5751 #endif /* CONFIG_PM_SLEEP */
5752
5753 #ifdef CONFIG_PM_RUNTIME
5754 static int e1000_runtime_suspend(struct device *dev)
5755 {
5756 struct pci_dev *pdev = to_pci_dev(dev);
5757 struct net_device *netdev = pci_get_drvdata(pdev);
5758 struct e1000_adapter *adapter = netdev_priv(netdev);
5759
5760 if (e1000e_pm_ready(adapter)) {
5761 bool wake;
5762
5763 __e1000_shutdown(pdev, &wake, true);
5764 }
5765
5766 return 0;
5767 }
5768
5769 static int e1000_idle(struct device *dev)
5770 {
5771 struct pci_dev *pdev = to_pci_dev(dev);
5772 struct net_device *netdev = pci_get_drvdata(pdev);
5773 struct e1000_adapter *adapter = netdev_priv(netdev);
5774
5775 if (!e1000e_pm_ready(adapter))
5776 return 0;
5777
5778 if (adapter->idle_check) {
5779 adapter->idle_check = false;
5780 if (!e1000e_has_link(adapter))
5781 pm_schedule_suspend(dev, MSEC_PER_SEC);
5782 }
5783
5784 return -EBUSY;
5785 }
5786
5787 static int e1000_runtime_resume(struct device *dev)
5788 {
5789 struct pci_dev *pdev = to_pci_dev(dev);
5790 struct net_device *netdev = pci_get_drvdata(pdev);
5791 struct e1000_adapter *adapter = netdev_priv(netdev);
5792
5793 if (!e1000e_pm_ready(adapter))
5794 return 0;
5795
5796 adapter->idle_check = !dev->power.runtime_auto;
5797 return __e1000_resume(pdev);
5798 }
5799 #endif /* CONFIG_PM_RUNTIME */
5800 #endif /* CONFIG_PM */
5801
5802 static void e1000_shutdown(struct pci_dev *pdev)
5803 {
5804 bool wake = false;
5805
5806 __e1000_shutdown(pdev, &wake, false);
5807
5808 if (system_state == SYSTEM_POWER_OFF)
5809 e1000_complete_shutdown(pdev, false, wake);
5810 }
5811
5812 #ifdef CONFIG_NET_POLL_CONTROLLER
5813
5814 static irqreturn_t e1000_intr_msix(int irq, void *data)
5815 {
5816 struct net_device *netdev = data;
5817 struct e1000_adapter *adapter = netdev_priv(netdev);
5818
5819 if (adapter->msix_entries) {
5820 int vector, msix_irq;
5821
5822 vector = 0;
5823 msix_irq = adapter->msix_entries[vector].vector;
5824 disable_irq(msix_irq);
5825 e1000_intr_msix_rx(msix_irq, netdev);
5826 enable_irq(msix_irq);
5827
5828 vector++;
5829 msix_irq = adapter->msix_entries[vector].vector;
5830 disable_irq(msix_irq);
5831 e1000_intr_msix_tx(msix_irq, netdev);
5832 enable_irq(msix_irq);
5833
5834 vector++;
5835 msix_irq = adapter->msix_entries[vector].vector;
5836 disable_irq(msix_irq);
5837 e1000_msix_other(msix_irq, netdev);
5838 enable_irq(msix_irq);
5839 }
5840
5841 return IRQ_HANDLED;
5842 }
5843
5844 /*
5845 * Polling 'interrupt' - used by things like netconsole to send skbs
5846 * without having to re-enable interrupts. It's not called while
5847 * the interrupt routine is executing.
5848 */
5849 static void e1000_netpoll(struct net_device *netdev)
5850 {
5851 struct e1000_adapter *adapter = netdev_priv(netdev);
5852
5853 switch (adapter->int_mode) {
5854 case E1000E_INT_MODE_MSIX:
5855 e1000_intr_msix(adapter->pdev->irq, netdev);
5856 break;
5857 case E1000E_INT_MODE_MSI:
5858 disable_irq(adapter->pdev->irq);
5859 e1000_intr_msi(adapter->pdev->irq, netdev);
5860 enable_irq(adapter->pdev->irq);
5861 break;
5862 default: /* E1000E_INT_MODE_LEGACY */
5863 disable_irq(adapter->pdev->irq);
5864 e1000_intr(adapter->pdev->irq, netdev);
5865 enable_irq(adapter->pdev->irq);
5866 break;
5867 }
5868 }
5869 #endif
5870
5871 /**
5872 * e1000_io_error_detected - called when PCI error is detected
5873 * @pdev: Pointer to PCI device
5874 * @state: The current pci connection state
5875 *
5876 * This function is called after a PCI bus error affecting
5877 * this device has been detected.
5878 */
5879 static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
5880 pci_channel_state_t state)
5881 {
5882 struct net_device *netdev = pci_get_drvdata(pdev);
5883 struct e1000_adapter *adapter = netdev_priv(netdev);
5884
5885 netif_device_detach(netdev);
5886
5887 if (state == pci_channel_io_perm_failure)
5888 return PCI_ERS_RESULT_DISCONNECT;
5889
5890 if (netif_running(netdev))
5891 e1000e_down(adapter);
5892 pci_disable_device(pdev);
5893
5894 /* Request a slot slot reset. */
5895 return PCI_ERS_RESULT_NEED_RESET;
5896 }
5897
5898 /**
5899 * e1000_io_slot_reset - called after the pci bus has been reset.
5900 * @pdev: Pointer to PCI device
5901 *
5902 * Restart the card from scratch, as if from a cold-boot. Implementation
5903 * resembles the first-half of the e1000_resume routine.
5904 */
5905 static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
5906 {
5907 struct net_device *netdev = pci_get_drvdata(pdev);
5908 struct e1000_adapter *adapter = netdev_priv(netdev);
5909 struct e1000_hw *hw = &adapter->hw;
5910 u16 aspm_disable_flag = 0;
5911 int err;
5912 pci_ers_result_t result;
5913
5914 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L0S)
5915 aspm_disable_flag = PCIE_LINK_STATE_L0S;
5916 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
5917 aspm_disable_flag |= PCIE_LINK_STATE_L1;
5918 if (aspm_disable_flag)
5919 e1000e_disable_aspm(pdev, aspm_disable_flag);
5920
5921 err = pci_enable_device_mem(pdev);
5922 if (err) {
5923 dev_err(&pdev->dev,
5924 "Cannot re-enable PCI device after reset.\n");
5925 result = PCI_ERS_RESULT_DISCONNECT;
5926 } else {
5927 pci_set_master(pdev);
5928 pdev->state_saved = true;
5929 pci_restore_state(pdev);
5930
5931 pci_enable_wake(pdev, PCI_D3hot, 0);
5932 pci_enable_wake(pdev, PCI_D3cold, 0);
5933
5934 e1000e_reset(adapter);
5935 ew32(WUS, ~0);
5936 result = PCI_ERS_RESULT_RECOVERED;
5937 }
5938
5939 pci_cleanup_aer_uncorrect_error_status(pdev);
5940
5941 return result;
5942 }
5943
5944 /**
5945 * e1000_io_resume - called when traffic can start flowing again.
5946 * @pdev: Pointer to PCI device
5947 *
5948 * This callback is called when the error recovery driver tells us that
5949 * its OK to resume normal operation. Implementation resembles the
5950 * second-half of the e1000_resume routine.
5951 */
5952 static void e1000_io_resume(struct pci_dev *pdev)
5953 {
5954 struct net_device *netdev = pci_get_drvdata(pdev);
5955 struct e1000_adapter *adapter = netdev_priv(netdev);
5956
5957 e1000_init_manageability_pt(adapter);
5958
5959 if (netif_running(netdev)) {
5960 if (e1000e_up(adapter)) {
5961 dev_err(&pdev->dev,
5962 "can't bring device back up after reset\n");
5963 return;
5964 }
5965 }
5966
5967 netif_device_attach(netdev);
5968
5969 /*
5970 * If the controller has AMT, do not set DRV_LOAD until the interface
5971 * is up. For all other cases, let the f/w know that the h/w is now
5972 * under the control of the driver.
5973 */
5974 if (!(adapter->flags & FLAG_HAS_AMT))
5975 e1000e_get_hw_control(adapter);
5976
5977 }
5978
5979 static void e1000_print_device_info(struct e1000_adapter *adapter)
5980 {
5981 struct e1000_hw *hw = &adapter->hw;
5982 struct net_device *netdev = adapter->netdev;
5983 u32 ret_val;
5984 u8 pba_str[E1000_PBANUM_LENGTH];
5985
5986 /* print bus type/speed/width info */
5987 e_info("(PCI Express:2.5GT/s:%s) %pM\n",
5988 /* bus width */
5989 ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
5990 "Width x1"),
5991 /* MAC address */
5992 netdev->dev_addr);
5993 e_info("Intel(R) PRO/%s Network Connection\n",
5994 (hw->phy.type == e1000_phy_ife) ? "10/100" : "1000");
5995 ret_val = e1000_read_pba_string_generic(hw, pba_str,
5996 E1000_PBANUM_LENGTH);
5997 if (ret_val)
5998 strlcpy((char *)pba_str, "Unknown", sizeof(pba_str));
5999 e_info("MAC: %d, PHY: %d, PBA No: %s\n",
6000 hw->mac.type, hw->phy.type, pba_str);
6001 }
6002
6003 static void e1000_eeprom_checks(struct e1000_adapter *adapter)
6004 {
6005 struct e1000_hw *hw = &adapter->hw;
6006 int ret_val;
6007 u16 buf = 0;
6008
6009 if (hw->mac.type != e1000_82573)
6010 return;
6011
6012 ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &buf);
6013 le16_to_cpus(&buf);
6014 if (!ret_val && (!(buf & (1 << 0)))) {
6015 /* Deep Smart Power Down (DSPD) */
6016 dev_warn(&adapter->pdev->dev,
6017 "Warning: detected DSPD enabled in EEPROM\n");
6018 }
6019 }
6020
6021 static int e1000_set_features(struct net_device *netdev,
6022 netdev_features_t features)
6023 {
6024 struct e1000_adapter *adapter = netdev_priv(netdev);
6025 netdev_features_t changed = features ^ netdev->features;
6026
6027 if (changed & (NETIF_F_TSO | NETIF_F_TSO6))
6028 adapter->flags |= FLAG_TSO_FORCE;
6029
6030 if (!(changed & (NETIF_F_HW_VLAN_RX | NETIF_F_HW_VLAN_TX |
6031 NETIF_F_RXCSUM | NETIF_F_RXHASH | NETIF_F_RXFCS |
6032 NETIF_F_RXALL)))
6033 return 0;
6034
6035 /*
6036 * IP payload checksum (enabled with jumbos/packet-split when Rx
6037 * checksum is enabled) and generation of RSS hash is mutually
6038 * exclusive in the hardware.
6039 */
6040 if (adapter->rx_ps_pages &&
6041 (features & NETIF_F_RXCSUM) && (features & NETIF_F_RXHASH)) {
6042 e_err("Enabling both receive checksum offload and receive hashing is not possible with jumbo frames. Disable jumbos or enable only one of the receive offload features.\n");
6043 return -EINVAL;
6044 }
6045
6046 if (changed & NETIF_F_RXFCS) {
6047 if (features & NETIF_F_RXFCS) {
6048 adapter->flags2 &= ~FLAG2_CRC_STRIPPING;
6049 } else {
6050 /* We need to take it back to defaults, which might mean
6051 * stripping is still disabled at the adapter level.
6052 */
6053 if (adapter->flags2 & FLAG2_DFLT_CRC_STRIPPING)
6054 adapter->flags2 |= FLAG2_CRC_STRIPPING;
6055 else
6056 adapter->flags2 &= ~FLAG2_CRC_STRIPPING;
6057 }
6058 }
6059
6060 netdev->features = features;
6061
6062 if (netif_running(netdev))
6063 e1000e_reinit_locked(adapter);
6064 else
6065 e1000e_reset(adapter);
6066
6067 return 0;
6068 }
6069
6070 static const struct net_device_ops e1000e_netdev_ops = {
6071 .ndo_open = e1000_open,
6072 .ndo_stop = e1000_close,
6073 .ndo_start_xmit = e1000_xmit_frame,
6074 .ndo_get_stats64 = e1000e_get_stats64,
6075 .ndo_set_rx_mode = e1000e_set_rx_mode,
6076 .ndo_set_mac_address = e1000_set_mac,
6077 .ndo_change_mtu = e1000_change_mtu,
6078 .ndo_do_ioctl = e1000_ioctl,
6079 .ndo_tx_timeout = e1000_tx_timeout,
6080 .ndo_validate_addr = eth_validate_addr,
6081
6082 .ndo_vlan_rx_add_vid = e1000_vlan_rx_add_vid,
6083 .ndo_vlan_rx_kill_vid = e1000_vlan_rx_kill_vid,
6084 #ifdef CONFIG_NET_POLL_CONTROLLER
6085 .ndo_poll_controller = e1000_netpoll,
6086 #endif
6087 .ndo_set_features = e1000_set_features,
6088 };
6089
6090 /**
6091 * e1000_probe - Device Initialization Routine
6092 * @pdev: PCI device information struct
6093 * @ent: entry in e1000_pci_tbl
6094 *
6095 * Returns 0 on success, negative on failure
6096 *
6097 * e1000_probe initializes an adapter identified by a pci_dev structure.
6098 * The OS initialization, configuring of the adapter private structure,
6099 * and a hardware reset occur.
6100 **/
6101 static int __devinit e1000_probe(struct pci_dev *pdev,
6102 const struct pci_device_id *ent)
6103 {
6104 struct net_device *netdev;
6105 struct e1000_adapter *adapter;
6106 struct e1000_hw *hw;
6107 const struct e1000_info *ei = e1000_info_tbl[ent->driver_data];
6108 resource_size_t mmio_start, mmio_len;
6109 resource_size_t flash_start, flash_len;
6110 static int cards_found;
6111 u16 aspm_disable_flag = 0;
6112 int i, err, pci_using_dac;
6113 u16 eeprom_data = 0;
6114 u16 eeprom_apme_mask = E1000_EEPROM_APME;
6115
6116 if (ei->flags2 & FLAG2_DISABLE_ASPM_L0S)
6117 aspm_disable_flag = PCIE_LINK_STATE_L0S;
6118 if (ei->flags2 & FLAG2_DISABLE_ASPM_L1)
6119 aspm_disable_flag |= PCIE_LINK_STATE_L1;
6120 if (aspm_disable_flag)
6121 e1000e_disable_aspm(pdev, aspm_disable_flag);
6122
6123 err = pci_enable_device_mem(pdev);
6124 if (err)
6125 return err;
6126
6127 pci_using_dac = 0;
6128 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(64));
6129 if (!err) {
6130 err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64));
6131 if (!err)
6132 pci_using_dac = 1;
6133 } else {
6134 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
6135 if (err) {
6136 err = dma_set_coherent_mask(&pdev->dev,
6137 DMA_BIT_MASK(32));
6138 if (err) {
6139 dev_err(&pdev->dev, "No usable DMA configuration, aborting\n");
6140 goto err_dma;
6141 }
6142 }
6143 }
6144
6145 err = pci_request_selected_regions_exclusive(pdev,
6146 pci_select_bars(pdev, IORESOURCE_MEM),
6147 e1000e_driver_name);
6148 if (err)
6149 goto err_pci_reg;
6150
6151 /* AER (Advanced Error Reporting) hooks */
6152 pci_enable_pcie_error_reporting(pdev);
6153
6154 pci_set_master(pdev);
6155 /* PCI config space info */
6156 err = pci_save_state(pdev);
6157 if (err)
6158 goto err_alloc_etherdev;
6159
6160 err = -ENOMEM;
6161 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
6162 if (!netdev)
6163 goto err_alloc_etherdev;
6164
6165 SET_NETDEV_DEV(netdev, &pdev->dev);
6166
6167 netdev->irq = pdev->irq;
6168
6169 pci_set_drvdata(pdev, netdev);
6170 adapter = netdev_priv(netdev);
6171 hw = &adapter->hw;
6172 adapter->netdev = netdev;
6173 adapter->pdev = pdev;
6174 adapter->ei = ei;
6175 adapter->pba = ei->pba;
6176 adapter->flags = ei->flags;
6177 adapter->flags2 = ei->flags2;
6178 adapter->hw.adapter = adapter;
6179 adapter->hw.mac.type = ei->mac;
6180 adapter->max_hw_frame_size = ei->max_hw_frame_size;
6181 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
6182
6183 mmio_start = pci_resource_start(pdev, 0);
6184 mmio_len = pci_resource_len(pdev, 0);
6185
6186 err = -EIO;
6187 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
6188 if (!adapter->hw.hw_addr)
6189 goto err_ioremap;
6190
6191 if ((adapter->flags & FLAG_HAS_FLASH) &&
6192 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
6193 flash_start = pci_resource_start(pdev, 1);
6194 flash_len = pci_resource_len(pdev, 1);
6195 adapter->hw.flash_address = ioremap(flash_start, flash_len);
6196 if (!adapter->hw.flash_address)
6197 goto err_flashmap;
6198 }
6199
6200 /* construct the net_device struct */
6201 netdev->netdev_ops = &e1000e_netdev_ops;
6202 e1000e_set_ethtool_ops(netdev);
6203 netdev->watchdog_timeo = 5 * HZ;
6204 netif_napi_add(netdev, &adapter->napi, e1000_clean, 64);
6205 strlcpy(netdev->name, pci_name(pdev), sizeof(netdev->name));
6206
6207 netdev->mem_start = mmio_start;
6208 netdev->mem_end = mmio_start + mmio_len;
6209
6210 adapter->bd_number = cards_found++;
6211
6212 e1000e_check_options(adapter);
6213
6214 /* setup adapter struct */
6215 err = e1000_sw_init(adapter);
6216 if (err)
6217 goto err_sw_init;
6218
6219 memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
6220 memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
6221 memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
6222
6223 err = ei->get_variants(adapter);
6224 if (err)
6225 goto err_hw_init;
6226
6227 if ((adapter->flags & FLAG_IS_ICH) &&
6228 (adapter->flags & FLAG_READ_ONLY_NVM))
6229 e1000e_write_protect_nvm_ich8lan(&adapter->hw);
6230
6231 hw->mac.ops.get_bus_info(&adapter->hw);
6232
6233 adapter->hw.phy.autoneg_wait_to_complete = 0;
6234
6235 /* Copper options */
6236 if (adapter->hw.phy.media_type == e1000_media_type_copper) {
6237 adapter->hw.phy.mdix = AUTO_ALL_MODES;
6238 adapter->hw.phy.disable_polarity_correction = 0;
6239 adapter->hw.phy.ms_type = e1000_ms_hw_default;
6240 }
6241
6242 if (hw->phy.ops.check_reset_block(hw))
6243 e_info("PHY reset is blocked due to SOL/IDER session.\n");
6244
6245 /* Set initial default active device features */
6246 netdev->features = (NETIF_F_SG |
6247 NETIF_F_HW_VLAN_RX |
6248 NETIF_F_HW_VLAN_TX |
6249 NETIF_F_TSO |
6250 NETIF_F_TSO6 |
6251 NETIF_F_RXHASH |
6252 NETIF_F_RXCSUM |
6253 NETIF_F_HW_CSUM);
6254
6255 /* Set user-changeable features (subset of all device features) */
6256 netdev->hw_features = netdev->features;
6257 netdev->hw_features |= NETIF_F_RXFCS;
6258 netdev->priv_flags |= IFF_SUPP_NOFCS;
6259 netdev->hw_features |= NETIF_F_RXALL;
6260
6261 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
6262 netdev->features |= NETIF_F_HW_VLAN_FILTER;
6263
6264 netdev->vlan_features |= (NETIF_F_SG |
6265 NETIF_F_TSO |
6266 NETIF_F_TSO6 |
6267 NETIF_F_HW_CSUM);
6268
6269 netdev->priv_flags |= IFF_UNICAST_FLT;
6270
6271 if (pci_using_dac) {
6272 netdev->features |= NETIF_F_HIGHDMA;
6273 netdev->vlan_features |= NETIF_F_HIGHDMA;
6274 }
6275
6276 if (e1000e_enable_mng_pass_thru(&adapter->hw))
6277 adapter->flags |= FLAG_MNG_PT_ENABLED;
6278
6279 /*
6280 * before reading the NVM, reset the controller to
6281 * put the device in a known good starting state
6282 */
6283 adapter->hw.mac.ops.reset_hw(&adapter->hw);
6284
6285 /*
6286 * systems with ASPM and others may see the checksum fail on the first
6287 * attempt. Let's give it a few tries
6288 */
6289 for (i = 0;; i++) {
6290 if (e1000_validate_nvm_checksum(&adapter->hw) >= 0)
6291 break;
6292 if (i == 2) {
6293 e_err("The NVM Checksum Is Not Valid\n");
6294 err = -EIO;
6295 goto err_eeprom;
6296 }
6297 }
6298
6299 e1000_eeprom_checks(adapter);
6300
6301 /* copy the MAC address */
6302 if (e1000e_read_mac_addr(&adapter->hw))
6303 e_err("NVM Read Error while reading MAC address\n");
6304
6305 memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len);
6306 memcpy(netdev->perm_addr, adapter->hw.mac.addr, netdev->addr_len);
6307
6308 if (!is_valid_ether_addr(netdev->perm_addr)) {
6309 e_err("Invalid MAC Address: %pM\n", netdev->perm_addr);
6310 err = -EIO;
6311 goto err_eeprom;
6312 }
6313
6314 init_timer(&adapter->watchdog_timer);
6315 adapter->watchdog_timer.function = e1000_watchdog;
6316 adapter->watchdog_timer.data = (unsigned long) adapter;
6317
6318 init_timer(&adapter->phy_info_timer);
6319 adapter->phy_info_timer.function = e1000_update_phy_info;
6320 adapter->phy_info_timer.data = (unsigned long) adapter;
6321
6322 INIT_WORK(&adapter->reset_task, e1000_reset_task);
6323 INIT_WORK(&adapter->watchdog_task, e1000_watchdog_task);
6324 INIT_WORK(&adapter->downshift_task, e1000e_downshift_workaround);
6325 INIT_WORK(&adapter->update_phy_task, e1000e_update_phy_task);
6326 INIT_WORK(&adapter->print_hang_task, e1000_print_hw_hang);
6327
6328 /* Initialize link parameters. User can change them with ethtool */
6329 adapter->hw.mac.autoneg = 1;
6330 adapter->fc_autoneg = true;
6331 adapter->hw.fc.requested_mode = e1000_fc_default;
6332 adapter->hw.fc.current_mode = e1000_fc_default;
6333 adapter->hw.phy.autoneg_advertised = 0x2f;
6334
6335 /* ring size defaults */
6336 adapter->rx_ring->count = 256;
6337 adapter->tx_ring->count = 256;
6338
6339 /*
6340 * Initial Wake on LAN setting - If APM wake is enabled in
6341 * the EEPROM, enable the ACPI Magic Packet filter
6342 */
6343 if (adapter->flags & FLAG_APME_IN_WUC) {
6344 /* APME bit in EEPROM is mapped to WUC.APME */
6345 eeprom_data = er32(WUC);
6346 eeprom_apme_mask = E1000_WUC_APME;
6347 if ((hw->mac.type > e1000_ich10lan) &&
6348 (eeprom_data & E1000_WUC_PHY_WAKE))
6349 adapter->flags2 |= FLAG2_HAS_PHY_WAKEUP;
6350 } else if (adapter->flags & FLAG_APME_IN_CTRL3) {
6351 if (adapter->flags & FLAG_APME_CHECK_PORT_B &&
6352 (adapter->hw.bus.func == 1))
6353 e1000_read_nvm(&adapter->hw, NVM_INIT_CONTROL3_PORT_B,
6354 1, &eeprom_data);
6355 else
6356 e1000_read_nvm(&adapter->hw, NVM_INIT_CONTROL3_PORT_A,
6357 1, &eeprom_data);
6358 }
6359
6360 /* fetch WoL from EEPROM */
6361 if (eeprom_data & eeprom_apme_mask)
6362 adapter->eeprom_wol |= E1000_WUFC_MAG;
6363
6364 /*
6365 * now that we have the eeprom settings, apply the special cases
6366 * where the eeprom may be wrong or the board simply won't support
6367 * wake on lan on a particular port
6368 */
6369 if (!(adapter->flags & FLAG_HAS_WOL))
6370 adapter->eeprom_wol = 0;
6371
6372 /* initialize the wol settings based on the eeprom settings */
6373 adapter->wol = adapter->eeprom_wol;
6374 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
6375
6376 /* save off EEPROM version number */
6377 e1000_read_nvm(&adapter->hw, 5, 1, &adapter->eeprom_vers);
6378
6379 /* reset the hardware with the new settings */
6380 e1000e_reset(adapter);
6381
6382 /*
6383 * If the controller has AMT, do not set DRV_LOAD until the interface
6384 * is up. For all other cases, let the f/w know that the h/w is now
6385 * under the control of the driver.
6386 */
6387 if (!(adapter->flags & FLAG_HAS_AMT))
6388 e1000e_get_hw_control(adapter);
6389
6390 strlcpy(netdev->name, "eth%d", sizeof(netdev->name));
6391 err = register_netdev(netdev);
6392 if (err)
6393 goto err_register;
6394
6395 /* carrier off reporting is important to ethtool even BEFORE open */
6396 netif_carrier_off(netdev);
6397
6398 e1000_print_device_info(adapter);
6399
6400 if (pci_dev_run_wake(pdev))
6401 pm_runtime_put_noidle(&pdev->dev);
6402
6403 return 0;
6404
6405 err_register:
6406 if (!(adapter->flags & FLAG_HAS_AMT))
6407 e1000e_release_hw_control(adapter);
6408 err_eeprom:
6409 if (!hw->phy.ops.check_reset_block(hw))
6410 e1000_phy_hw_reset(&adapter->hw);
6411 err_hw_init:
6412 kfree(adapter->tx_ring);
6413 kfree(adapter->rx_ring);
6414 err_sw_init:
6415 if (adapter->hw.flash_address)
6416 iounmap(adapter->hw.flash_address);
6417 e1000e_reset_interrupt_capability(adapter);
6418 err_flashmap:
6419 iounmap(adapter->hw.hw_addr);
6420 err_ioremap:
6421 free_netdev(netdev);
6422 err_alloc_etherdev:
6423 pci_release_selected_regions(pdev,
6424 pci_select_bars(pdev, IORESOURCE_MEM));
6425 err_pci_reg:
6426 err_dma:
6427 pci_disable_device(pdev);
6428 return err;
6429 }
6430
6431 /**
6432 * e1000_remove - Device Removal Routine
6433 * @pdev: PCI device information struct
6434 *
6435 * e1000_remove is called by the PCI subsystem to alert the driver
6436 * that it should release a PCI device. The could be caused by a
6437 * Hot-Plug event, or because the driver is going to be removed from
6438 * memory.
6439 **/
6440 static void __devexit e1000_remove(struct pci_dev *pdev)
6441 {
6442 struct net_device *netdev = pci_get_drvdata(pdev);
6443 struct e1000_adapter *adapter = netdev_priv(netdev);
6444 bool down = test_bit(__E1000_DOWN, &adapter->state);
6445
6446 /*
6447 * The timers may be rescheduled, so explicitly disable them
6448 * from being rescheduled.
6449 */
6450 if (!down)
6451 set_bit(__E1000_DOWN, &adapter->state);
6452 del_timer_sync(&adapter->watchdog_timer);
6453 del_timer_sync(&adapter->phy_info_timer);
6454
6455 cancel_work_sync(&adapter->reset_task);
6456 cancel_work_sync(&adapter->watchdog_task);
6457 cancel_work_sync(&adapter->downshift_task);
6458 cancel_work_sync(&adapter->update_phy_task);
6459 cancel_work_sync(&adapter->print_hang_task);
6460
6461 if (!(netdev->flags & IFF_UP))
6462 e1000_power_down_phy(adapter);
6463
6464 /* Don't lie to e1000_close() down the road. */
6465 if (!down)
6466 clear_bit(__E1000_DOWN, &adapter->state);
6467 unregister_netdev(netdev);
6468
6469 if (pci_dev_run_wake(pdev))
6470 pm_runtime_get_noresume(&pdev->dev);
6471
6472 /*
6473 * Release control of h/w to f/w. If f/w is AMT enabled, this
6474 * would have already happened in close and is redundant.
6475 */
6476 e1000e_release_hw_control(adapter);
6477
6478 e1000e_reset_interrupt_capability(adapter);
6479 kfree(adapter->tx_ring);
6480 kfree(adapter->rx_ring);
6481
6482 iounmap(adapter->hw.hw_addr);
6483 if (adapter->hw.flash_address)
6484 iounmap(adapter->hw.flash_address);
6485 pci_release_selected_regions(pdev,
6486 pci_select_bars(pdev, IORESOURCE_MEM));
6487
6488 free_netdev(netdev);
6489
6490 /* AER disable */
6491 pci_disable_pcie_error_reporting(pdev);
6492
6493 pci_disable_device(pdev);
6494 }
6495
6496 /* PCI Error Recovery (ERS) */
6497 static struct pci_error_handlers e1000_err_handler = {
6498 .error_detected = e1000_io_error_detected,
6499 .slot_reset = e1000_io_slot_reset,
6500 .resume = e1000_io_resume,
6501 };
6502
6503 static DEFINE_PCI_DEVICE_TABLE(e1000_pci_tbl) = {
6504 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_COPPER), board_82571 },
6505 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_FIBER), board_82571 },
6506 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER), board_82571 },
6507 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER_LP), board_82571 },
6508 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_FIBER), board_82571 },
6509 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES), board_82571 },
6510 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_DUAL), board_82571 },
6511 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_QUAD), board_82571 },
6512 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571PT_QUAD_COPPER), board_82571 },
6513
6514 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI), board_82572 },
6515 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_COPPER), board_82572 },
6516 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_FIBER), board_82572 },
6517 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_SERDES), board_82572 },
6518
6519 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E), board_82573 },
6520 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E_IAMT), board_82573 },
6521 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573L), board_82573 },
6522
6523 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574L), board_82574 },
6524 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574LA), board_82574 },
6525 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82583V), board_82583 },
6526
6527 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_DPT),
6528 board_80003es2lan },
6529 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_SPT),
6530 board_80003es2lan },
6531 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_DPT),
6532 board_80003es2lan },
6533 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_SPT),
6534 board_80003es2lan },
6535
6536 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE), board_ich8lan },
6537 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_G), board_ich8lan },
6538 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_GT), board_ich8lan },
6539 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_AMT), board_ich8lan },
6540 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_C), board_ich8lan },
6541 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M), board_ich8lan },
6542 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M_AMT), board_ich8lan },
6543 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_82567V_3), board_ich8lan },
6544
6545 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE), board_ich9lan },
6546 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_G), board_ich9lan },
6547 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_GT), board_ich9lan },
6548 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_AMT), board_ich9lan },
6549 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_C), board_ich9lan },
6550 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_BM), board_ich9lan },
6551 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M), board_ich9lan },
6552 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_AMT), board_ich9lan },
6553 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V), board_ich9lan },
6554
6555 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LM), board_ich9lan },
6556 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LF), board_ich9lan },
6557 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_V), board_ich9lan },
6558
6559 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LM), board_ich10lan },
6560 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LF), board_ich10lan },
6561 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_V), board_ich10lan },
6562
6563 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LM), board_pchlan },
6564 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LC), board_pchlan },
6565 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DM), board_pchlan },
6566 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DC), board_pchlan },
6567
6568 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_LM), board_pch2lan },
6569 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_V), board_pch2lan },
6570
6571 { 0, 0, 0, 0, 0, 0, 0 } /* terminate list */
6572 };
6573 MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
6574
6575 #ifdef CONFIG_PM
6576 static const struct dev_pm_ops e1000_pm_ops = {
6577 SET_SYSTEM_SLEEP_PM_OPS(e1000_suspend, e1000_resume)
6578 SET_RUNTIME_PM_OPS(e1000_runtime_suspend,
6579 e1000_runtime_resume, e1000_idle)
6580 };
6581 #endif
6582
6583 /* PCI Device API Driver */
6584 static struct pci_driver e1000_driver = {
6585 .name = e1000e_driver_name,
6586 .id_table = e1000_pci_tbl,
6587 .probe = e1000_probe,
6588 .remove = __devexit_p(e1000_remove),
6589 #ifdef CONFIG_PM
6590 .driver = {
6591 .pm = &e1000_pm_ops,
6592 },
6593 #endif
6594 .shutdown = e1000_shutdown,
6595 .err_handler = &e1000_err_handler
6596 };
6597
6598 /**
6599 * e1000_init_module - Driver Registration Routine
6600 *
6601 * e1000_init_module is the first routine called when the driver is
6602 * loaded. All it does is register with the PCI subsystem.
6603 **/
6604 static int __init e1000_init_module(void)
6605 {
6606 int ret;
6607 pr_info("Intel(R) PRO/1000 Network Driver - %s\n",
6608 e1000e_driver_version);
6609 pr_info("Copyright(c) 1999 - 2012 Intel Corporation.\n");
6610 ret = pci_register_driver(&e1000_driver);
6611
6612 return ret;
6613 }
6614 module_init(e1000_init_module);
6615
6616 /**
6617 * e1000_exit_module - Driver Exit Cleanup Routine
6618 *
6619 * e1000_exit_module is called just before the driver is removed
6620 * from memory.
6621 **/
6622 static void __exit e1000_exit_module(void)
6623 {
6624 pci_unregister_driver(&e1000_driver);
6625 }
6626 module_exit(e1000_exit_module);
6627
6628
6629 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
6630 MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
6631 MODULE_LICENSE("GPL");
6632 MODULE_VERSION(DRV_VERSION);
6633
6634 /* netdev.c */
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