1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
4 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
6 #include <linux/module.h>
7 #include <linux/types.h>
8 #include <linux/init.h>
10 #include <linux/vmalloc.h>
11 #include <linux/pagemap.h>
12 #include <linux/delay.h>
13 #include <linux/netdevice.h>
14 #include <linux/interrupt.h>
15 #include <linux/tcp.h>
16 #include <linux/ipv6.h>
17 #include <linux/slab.h>
18 #include <net/checksum.h>
19 #include <net/ip6_checksum.h>
20 #include <linux/ethtool.h>
21 #include <linux/if_vlan.h>
22 #include <linux/cpu.h>
23 #include <linux/smp.h>
24 #include <linux/pm_qos.h>
25 #include <linux/pm_runtime.h>
26 #include <linux/aer.h>
27 #include <linux/prefetch.h>
31 #define DRV_EXTRAVERSION "-k"
33 #define DRV_VERSION "3.2.6" DRV_EXTRAVERSION
34 char e1000e_driver_name
[] = "e1000e";
35 const char e1000e_driver_version
[] = DRV_VERSION
;
37 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
38 static int debug
= -1;
39 module_param(debug
, int, 0);
40 MODULE_PARM_DESC(debug
, "Debug level (0=none,...,16=all)");
42 static const struct e1000_info
*e1000_info_tbl
[] = {
43 [board_82571
] = &e1000_82571_info
,
44 [board_82572
] = &e1000_82572_info
,
45 [board_82573
] = &e1000_82573_info
,
46 [board_82574
] = &e1000_82574_info
,
47 [board_82583
] = &e1000_82583_info
,
48 [board_80003es2lan
] = &e1000_es2_info
,
49 [board_ich8lan
] = &e1000_ich8_info
,
50 [board_ich9lan
] = &e1000_ich9_info
,
51 [board_ich10lan
] = &e1000_ich10_info
,
52 [board_pchlan
] = &e1000_pch_info
,
53 [board_pch2lan
] = &e1000_pch2_info
,
54 [board_pch_lpt
] = &e1000_pch_lpt_info
,
55 [board_pch_spt
] = &e1000_pch_spt_info
,
56 [board_pch_cnp
] = &e1000_pch_cnp_info
,
59 struct e1000_reg_info
{
64 static const struct e1000_reg_info e1000_reg_info_tbl
[] = {
65 /* General Registers */
67 {E1000_STATUS
, "STATUS"},
68 {E1000_CTRL_EXT
, "CTRL_EXT"},
70 /* Interrupt Registers */
75 {E1000_RDLEN(0), "RDLEN"},
76 {E1000_RDH(0), "RDH"},
77 {E1000_RDT(0), "RDT"},
79 {E1000_RXDCTL(0), "RXDCTL"},
81 {E1000_RDBAL(0), "RDBAL"},
82 {E1000_RDBAH(0), "RDBAH"},
85 {E1000_RDFHS
, "RDFHS"},
86 {E1000_RDFTS
, "RDFTS"},
87 {E1000_RDFPC
, "RDFPC"},
91 {E1000_TDBAL(0), "TDBAL"},
92 {E1000_TDBAH(0), "TDBAH"},
93 {E1000_TDLEN(0), "TDLEN"},
94 {E1000_TDH(0), "TDH"},
95 {E1000_TDT(0), "TDT"},
97 {E1000_TXDCTL(0), "TXDCTL"},
99 {E1000_TARC(0), "TARC"},
100 {E1000_TDFH
, "TDFH"},
101 {E1000_TDFT
, "TDFT"},
102 {E1000_TDFHS
, "TDFHS"},
103 {E1000_TDFTS
, "TDFTS"},
104 {E1000_TDFPC
, "TDFPC"},
106 /* List Terminator */
111 * __ew32_prepare - prepare to write to MAC CSR register on certain parts
112 * @hw: pointer to the HW structure
114 * When updating the MAC CSR registers, the Manageability Engine (ME) could
115 * be accessing the registers at the same time. Normally, this is handled in
116 * h/w by an arbiter but on some parts there is a bug that acknowledges Host
117 * accesses later than it should which could result in the register to have
118 * an incorrect value. Workaround this by checking the FWSM register which
119 * has bit 24 set while ME is accessing MAC CSR registers, wait if it is set
120 * and try again a number of times.
122 s32
__ew32_prepare(struct e1000_hw
*hw
)
124 s32 i
= E1000_ICH_FWSM_PCIM2PCI_COUNT
;
126 while ((er32(FWSM
) & E1000_ICH_FWSM_PCIM2PCI
) && --i
)
132 void __ew32(struct e1000_hw
*hw
, unsigned long reg
, u32 val
)
134 if (hw
->adapter
->flags2
& FLAG2_PCIM2PCI_ARBITER_WA
)
137 writel(val
, hw
->hw_addr
+ reg
);
141 * e1000_regdump - register printout routine
142 * @hw: pointer to the HW structure
143 * @reginfo: pointer to the register info table
145 static void e1000_regdump(struct e1000_hw
*hw
, struct e1000_reg_info
*reginfo
)
151 switch (reginfo
->ofs
) {
152 case E1000_RXDCTL(0):
153 for (n
= 0; n
< 2; n
++)
154 regs
[n
] = __er32(hw
, E1000_RXDCTL(n
));
156 case E1000_TXDCTL(0):
157 for (n
= 0; n
< 2; n
++)
158 regs
[n
] = __er32(hw
, E1000_TXDCTL(n
));
161 for (n
= 0; n
< 2; n
++)
162 regs
[n
] = __er32(hw
, E1000_TARC(n
));
165 pr_info("%-15s %08x\n",
166 reginfo
->name
, __er32(hw
, reginfo
->ofs
));
170 snprintf(rname
, 16, "%s%s", reginfo
->name
, "[0-1]");
171 pr_info("%-15s %08x %08x\n", rname
, regs
[0], regs
[1]);
174 static void e1000e_dump_ps_pages(struct e1000_adapter
*adapter
,
175 struct e1000_buffer
*bi
)
178 struct e1000_ps_page
*ps_page
;
180 for (i
= 0; i
< adapter
->rx_ps_pages
; i
++) {
181 ps_page
= &bi
->ps_pages
[i
];
184 pr_info("packet dump for ps_page %d:\n", i
);
185 print_hex_dump(KERN_INFO
, "", DUMP_PREFIX_ADDRESS
,
186 16, 1, page_address(ps_page
->page
),
193 * e1000e_dump - Print registers, Tx-ring and Rx-ring
194 * @adapter: board private structure
196 static void e1000e_dump(struct e1000_adapter
*adapter
)
198 struct net_device
*netdev
= adapter
->netdev
;
199 struct e1000_hw
*hw
= &adapter
->hw
;
200 struct e1000_reg_info
*reginfo
;
201 struct e1000_ring
*tx_ring
= adapter
->tx_ring
;
202 struct e1000_tx_desc
*tx_desc
;
207 struct e1000_buffer
*buffer_info
;
208 struct e1000_ring
*rx_ring
= adapter
->rx_ring
;
209 union e1000_rx_desc_packet_split
*rx_desc_ps
;
210 union e1000_rx_desc_extended
*rx_desc
;
220 if (!netif_msg_hw(adapter
))
223 /* Print netdevice Info */
225 dev_info(&adapter
->pdev
->dev
, "Net device Info\n");
226 pr_info("Device Name state trans_start\n");
227 pr_info("%-15s %016lX %016lX\n", netdev
->name
,
228 netdev
->state
, dev_trans_start(netdev
));
231 /* Print Registers */
232 dev_info(&adapter
->pdev
->dev
, "Register Dump\n");
233 pr_info(" Register Name Value\n");
234 for (reginfo
= (struct e1000_reg_info
*)e1000_reg_info_tbl
;
235 reginfo
->name
; reginfo
++) {
236 e1000_regdump(hw
, reginfo
);
239 /* Print Tx Ring Summary */
240 if (!netdev
|| !netif_running(netdev
))
243 dev_info(&adapter
->pdev
->dev
, "Tx Ring Summary\n");
244 pr_info("Queue [NTU] [NTC] [bi(ntc)->dma ] leng ntw timestamp\n");
245 buffer_info
= &tx_ring
->buffer_info
[tx_ring
->next_to_clean
];
246 pr_info(" %5d %5X %5X %016llX %04X %3X %016llX\n",
247 0, tx_ring
->next_to_use
, tx_ring
->next_to_clean
,
248 (unsigned long long)buffer_info
->dma
,
250 buffer_info
->next_to_watch
,
251 (unsigned long long)buffer_info
->time_stamp
);
254 if (!netif_msg_tx_done(adapter
))
255 goto rx_ring_summary
;
257 dev_info(&adapter
->pdev
->dev
, "Tx Ring Dump\n");
259 /* Transmit Descriptor Formats - DEXT[29] is 0 (Legacy) or 1 (Extended)
261 * Legacy Transmit Descriptor
262 * +--------------------------------------------------------------+
263 * 0 | Buffer Address [63:0] (Reserved on Write Back) |
264 * +--------------------------------------------------------------+
265 * 8 | Special | CSS | Status | CMD | CSO | Length |
266 * +--------------------------------------------------------------+
267 * 63 48 47 36 35 32 31 24 23 16 15 0
269 * Extended Context Descriptor (DTYP=0x0) for TSO or checksum offload
270 * 63 48 47 40 39 32 31 16 15 8 7 0
271 * +----------------------------------------------------------------+
272 * 0 | TUCSE | TUCS0 | TUCSS | IPCSE | IPCS0 | IPCSS |
273 * +----------------------------------------------------------------+
274 * 8 | MSS | HDRLEN | RSV | STA | TUCMD | DTYP | PAYLEN |
275 * +----------------------------------------------------------------+
276 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0
278 * Extended Data Descriptor (DTYP=0x1)
279 * +----------------------------------------------------------------+
280 * 0 | Buffer Address [63:0] |
281 * +----------------------------------------------------------------+
282 * 8 | VLAN tag | POPTS | Rsvd | Status | Command | DTYP | DTALEN |
283 * +----------------------------------------------------------------+
284 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0
286 pr_info("Tl[desc] [address 63:0 ] [SpeCssSCmCsLen] [bi->dma ] leng ntw timestamp bi->skb <-- Legacy format\n");
287 pr_info("Tc[desc] [Ce CoCsIpceCoS] [MssHlRSCm0Plen] [bi->dma ] leng ntw timestamp bi->skb <-- Ext Context format\n");
288 pr_info("Td[desc] [address 63:0 ] [VlaPoRSCm1Dlen] [bi->dma ] leng ntw timestamp bi->skb <-- Ext Data format\n");
289 for (i
= 0; tx_ring
->desc
&& (i
< tx_ring
->count
); i
++) {
290 const char *next_desc
;
291 tx_desc
= E1000_TX_DESC(*tx_ring
, i
);
292 buffer_info
= &tx_ring
->buffer_info
[i
];
293 u0
= (struct my_u0
*)tx_desc
;
294 if (i
== tx_ring
->next_to_use
&& i
== tx_ring
->next_to_clean
)
295 next_desc
= " NTC/U";
296 else if (i
== tx_ring
->next_to_use
)
298 else if (i
== tx_ring
->next_to_clean
)
302 pr_info("T%c[0x%03X] %016llX %016llX %016llX %04X %3X %016llX %p%s\n",
303 (!(le64_to_cpu(u0
->b
) & BIT(29)) ? 'l' :
304 ((le64_to_cpu(u0
->b
) & BIT(20)) ? 'd' : 'c')),
306 (unsigned long long)le64_to_cpu(u0
->a
),
307 (unsigned long long)le64_to_cpu(u0
->b
),
308 (unsigned long long)buffer_info
->dma
,
309 buffer_info
->length
, buffer_info
->next_to_watch
,
310 (unsigned long long)buffer_info
->time_stamp
,
311 buffer_info
->skb
, next_desc
);
313 if (netif_msg_pktdata(adapter
) && buffer_info
->skb
)
314 print_hex_dump(KERN_INFO
, "", DUMP_PREFIX_ADDRESS
,
315 16, 1, buffer_info
->skb
->data
,
316 buffer_info
->skb
->len
, true);
319 /* Print Rx Ring Summary */
321 dev_info(&adapter
->pdev
->dev
, "Rx Ring Summary\n");
322 pr_info("Queue [NTU] [NTC]\n");
323 pr_info(" %5d %5X %5X\n",
324 0, rx_ring
->next_to_use
, rx_ring
->next_to_clean
);
327 if (!netif_msg_rx_status(adapter
))
330 dev_info(&adapter
->pdev
->dev
, "Rx Ring Dump\n");
331 switch (adapter
->rx_ps_pages
) {
335 /* [Extended] Packet Split Receive Descriptor Format
337 * +-----------------------------------------------------+
338 * 0 | Buffer Address 0 [63:0] |
339 * +-----------------------------------------------------+
340 * 8 | Buffer Address 1 [63:0] |
341 * +-----------------------------------------------------+
342 * 16 | Buffer Address 2 [63:0] |
343 * +-----------------------------------------------------+
344 * 24 | Buffer Address 3 [63:0] |
345 * +-----------------------------------------------------+
347 pr_info("R [desc] [buffer 0 63:0 ] [buffer 1 63:0 ] [buffer 2 63:0 ] [buffer 3 63:0 ] [bi->dma ] [bi->skb] <-- Ext Pkt Split format\n");
348 /* [Extended] Receive Descriptor (Write-Back) Format
350 * 63 48 47 32 31 13 12 8 7 4 3 0
351 * +------------------------------------------------------+
352 * 0 | Packet | IP | Rsvd | MRQ | Rsvd | MRQ RSS |
353 * | Checksum | Ident | | Queue | | Type |
354 * +------------------------------------------------------+
355 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
356 * +------------------------------------------------------+
357 * 63 48 47 32 31 20 19 0
359 pr_info("RWB[desc] [ck ipid mrqhsh] [vl l0 ee es] [ l3 l2 l1 hs] [reserved ] ---------------- [bi->skb] <-- Ext Rx Write-Back format\n");
360 for (i
= 0; i
< rx_ring
->count
; i
++) {
361 const char *next_desc
;
362 buffer_info
= &rx_ring
->buffer_info
[i
];
363 rx_desc_ps
= E1000_RX_DESC_PS(*rx_ring
, i
);
364 u1
= (struct my_u1
*)rx_desc_ps
;
366 le32_to_cpu(rx_desc_ps
->wb
.middle
.status_error
);
368 if (i
== rx_ring
->next_to_use
)
370 else if (i
== rx_ring
->next_to_clean
)
375 if (staterr
& E1000_RXD_STAT_DD
) {
376 /* Descriptor Done */
377 pr_info("%s[0x%03X] %016llX %016llX %016llX %016llX ---------------- %p%s\n",
379 (unsigned long long)le64_to_cpu(u1
->a
),
380 (unsigned long long)le64_to_cpu(u1
->b
),
381 (unsigned long long)le64_to_cpu(u1
->c
),
382 (unsigned long long)le64_to_cpu(u1
->d
),
383 buffer_info
->skb
, next_desc
);
385 pr_info("%s[0x%03X] %016llX %016llX %016llX %016llX %016llX %p%s\n",
387 (unsigned long long)le64_to_cpu(u1
->a
),
388 (unsigned long long)le64_to_cpu(u1
->b
),
389 (unsigned long long)le64_to_cpu(u1
->c
),
390 (unsigned long long)le64_to_cpu(u1
->d
),
391 (unsigned long long)buffer_info
->dma
,
392 buffer_info
->skb
, next_desc
);
394 if (netif_msg_pktdata(adapter
))
395 e1000e_dump_ps_pages(adapter
,
402 /* Extended Receive Descriptor (Read) Format
404 * +-----------------------------------------------------+
405 * 0 | Buffer Address [63:0] |
406 * +-----------------------------------------------------+
408 * +-----------------------------------------------------+
410 pr_info("R [desc] [buf addr 63:0 ] [reserved 63:0 ] [bi->dma ] [bi->skb] <-- Ext (Read) format\n");
411 /* Extended Receive Descriptor (Write-Back) Format
413 * 63 48 47 32 31 24 23 4 3 0
414 * +------------------------------------------------------+
416 * 0 +-------------------+ Rsvd | Reserved | MRQ RSS |
417 * | Packet | IP | | | Type |
418 * | Checksum | Ident | | | |
419 * +------------------------------------------------------+
420 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
421 * +------------------------------------------------------+
422 * 63 48 47 32 31 20 19 0
424 pr_info("RWB[desc] [cs ipid mrq] [vt ln xe xs] [bi->skb] <-- Ext (Write-Back) format\n");
426 for (i
= 0; i
< rx_ring
->count
; i
++) {
427 const char *next_desc
;
429 buffer_info
= &rx_ring
->buffer_info
[i
];
430 rx_desc
= E1000_RX_DESC_EXT(*rx_ring
, i
);
431 u1
= (struct my_u1
*)rx_desc
;
432 staterr
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
434 if (i
== rx_ring
->next_to_use
)
436 else if (i
== rx_ring
->next_to_clean
)
441 if (staterr
& E1000_RXD_STAT_DD
) {
442 /* Descriptor Done */
443 pr_info("%s[0x%03X] %016llX %016llX ---------------- %p%s\n",
445 (unsigned long long)le64_to_cpu(u1
->a
),
446 (unsigned long long)le64_to_cpu(u1
->b
),
447 buffer_info
->skb
, next_desc
);
449 pr_info("%s[0x%03X] %016llX %016llX %016llX %p%s\n",
451 (unsigned long long)le64_to_cpu(u1
->a
),
452 (unsigned long long)le64_to_cpu(u1
->b
),
453 (unsigned long long)buffer_info
->dma
,
454 buffer_info
->skb
, next_desc
);
456 if (netif_msg_pktdata(adapter
) &&
458 print_hex_dump(KERN_INFO
, "",
459 DUMP_PREFIX_ADDRESS
, 16,
461 buffer_info
->skb
->data
,
462 adapter
->rx_buffer_len
,
470 * e1000_desc_unused - calculate if we have unused descriptors
472 static int e1000_desc_unused(struct e1000_ring
*ring
)
474 if (ring
->next_to_clean
> ring
->next_to_use
)
475 return ring
->next_to_clean
- ring
->next_to_use
- 1;
477 return ring
->count
+ ring
->next_to_clean
- ring
->next_to_use
- 1;
481 * e1000e_systim_to_hwtstamp - convert system time value to hw time stamp
482 * @adapter: board private structure
483 * @hwtstamps: time stamp structure to update
484 * @systim: unsigned 64bit system time value.
486 * Convert the system time value stored in the RX/TXSTMP registers into a
487 * hwtstamp which can be used by the upper level time stamping functions.
489 * The 'systim_lock' spinlock is used to protect the consistency of the
490 * system time value. This is needed because reading the 64 bit time
491 * value involves reading two 32 bit registers. The first read latches the
494 static void e1000e_systim_to_hwtstamp(struct e1000_adapter
*adapter
,
495 struct skb_shared_hwtstamps
*hwtstamps
,
501 spin_lock_irqsave(&adapter
->systim_lock
, flags
);
502 ns
= timecounter_cyc2time(&adapter
->tc
, systim
);
503 spin_unlock_irqrestore(&adapter
->systim_lock
, flags
);
505 memset(hwtstamps
, 0, sizeof(*hwtstamps
));
506 hwtstamps
->hwtstamp
= ns_to_ktime(ns
);
510 * e1000e_rx_hwtstamp - utility function which checks for Rx time stamp
511 * @adapter: board private structure
512 * @status: descriptor extended error and status field
513 * @skb: particular skb to include time stamp
515 * If the time stamp is valid, convert it into the timecounter ns value
516 * and store that result into the shhwtstamps structure which is passed
517 * up the network stack.
519 static void e1000e_rx_hwtstamp(struct e1000_adapter
*adapter
, u32 status
,
522 struct e1000_hw
*hw
= &adapter
->hw
;
525 if (!(adapter
->flags
& FLAG_HAS_HW_TIMESTAMP
) ||
526 !(status
& E1000_RXDEXT_STATERR_TST
) ||
527 !(er32(TSYNCRXCTL
) & E1000_TSYNCRXCTL_VALID
))
530 /* The Rx time stamp registers contain the time stamp. No other
531 * received packet will be time stamped until the Rx time stamp
532 * registers are read. Because only one packet can be time stamped
533 * at a time, the register values must belong to this packet and
534 * therefore none of the other additional attributes need to be
537 rxstmp
= (u64
)er32(RXSTMPL
);
538 rxstmp
|= (u64
)er32(RXSTMPH
) << 32;
539 e1000e_systim_to_hwtstamp(adapter
, skb_hwtstamps(skb
), rxstmp
);
541 adapter
->flags2
&= ~FLAG2_CHECK_RX_HWTSTAMP
;
545 * e1000_receive_skb - helper function to handle Rx indications
546 * @adapter: board private structure
547 * @staterr: descriptor extended error and status field as written by hardware
548 * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
549 * @skb: pointer to sk_buff to be indicated to stack
551 static void e1000_receive_skb(struct e1000_adapter
*adapter
,
552 struct net_device
*netdev
, struct sk_buff
*skb
,
553 u32 staterr
, __le16 vlan
)
555 u16 tag
= le16_to_cpu(vlan
);
557 e1000e_rx_hwtstamp(adapter
, staterr
, skb
);
559 skb
->protocol
= eth_type_trans(skb
, netdev
);
561 if (staterr
& E1000_RXD_STAT_VP
)
562 __vlan_hwaccel_put_tag(skb
, htons(ETH_P_8021Q
), tag
);
564 napi_gro_receive(&adapter
->napi
, skb
);
568 * e1000_rx_checksum - Receive Checksum Offload
569 * @adapter: board private structure
570 * @status_err: receive descriptor status and error fields
571 * @csum: receive descriptor csum field
572 * @sk_buff: socket buffer with received data
574 static void e1000_rx_checksum(struct e1000_adapter
*adapter
, u32 status_err
,
577 u16 status
= (u16
)status_err
;
578 u8 errors
= (u8
)(status_err
>> 24);
580 skb_checksum_none_assert(skb
);
582 /* Rx checksum disabled */
583 if (!(adapter
->netdev
->features
& NETIF_F_RXCSUM
))
586 /* Ignore Checksum bit is set */
587 if (status
& E1000_RXD_STAT_IXSM
)
590 /* TCP/UDP checksum error bit or IP checksum error bit is set */
591 if (errors
& (E1000_RXD_ERR_TCPE
| E1000_RXD_ERR_IPE
)) {
592 /* let the stack verify checksum errors */
593 adapter
->hw_csum_err
++;
597 /* TCP/UDP Checksum has not been calculated */
598 if (!(status
& (E1000_RXD_STAT_TCPCS
| E1000_RXD_STAT_UDPCS
)))
601 /* It must be a TCP or UDP packet with a valid checksum */
602 skb
->ip_summed
= CHECKSUM_UNNECESSARY
;
603 adapter
->hw_csum_good
++;
606 static void e1000e_update_rdt_wa(struct e1000_ring
*rx_ring
, unsigned int i
)
608 struct e1000_adapter
*adapter
= rx_ring
->adapter
;
609 struct e1000_hw
*hw
= &adapter
->hw
;
610 s32 ret_val
= __ew32_prepare(hw
);
612 writel(i
, rx_ring
->tail
);
614 if (unlikely(!ret_val
&& (i
!= readl(rx_ring
->tail
)))) {
615 u32 rctl
= er32(RCTL
);
617 ew32(RCTL
, rctl
& ~E1000_RCTL_EN
);
618 e_err("ME firmware caused invalid RDT - resetting\n");
619 schedule_work(&adapter
->reset_task
);
623 static void e1000e_update_tdt_wa(struct e1000_ring
*tx_ring
, unsigned int i
)
625 struct e1000_adapter
*adapter
= tx_ring
->adapter
;
626 struct e1000_hw
*hw
= &adapter
->hw
;
627 s32 ret_val
= __ew32_prepare(hw
);
629 writel(i
, tx_ring
->tail
);
631 if (unlikely(!ret_val
&& (i
!= readl(tx_ring
->tail
)))) {
632 u32 tctl
= er32(TCTL
);
634 ew32(TCTL
, tctl
& ~E1000_TCTL_EN
);
635 e_err("ME firmware caused invalid TDT - resetting\n");
636 schedule_work(&adapter
->reset_task
);
641 * e1000_alloc_rx_buffers - Replace used receive buffers
642 * @rx_ring: Rx descriptor ring
644 static void e1000_alloc_rx_buffers(struct e1000_ring
*rx_ring
,
645 int cleaned_count
, gfp_t gfp
)
647 struct e1000_adapter
*adapter
= rx_ring
->adapter
;
648 struct net_device
*netdev
= adapter
->netdev
;
649 struct pci_dev
*pdev
= adapter
->pdev
;
650 union e1000_rx_desc_extended
*rx_desc
;
651 struct e1000_buffer
*buffer_info
;
654 unsigned int bufsz
= adapter
->rx_buffer_len
;
656 i
= rx_ring
->next_to_use
;
657 buffer_info
= &rx_ring
->buffer_info
[i
];
659 while (cleaned_count
--) {
660 skb
= buffer_info
->skb
;
666 skb
= __netdev_alloc_skb_ip_align(netdev
, bufsz
, gfp
);
668 /* Better luck next round */
669 adapter
->alloc_rx_buff_failed
++;
673 buffer_info
->skb
= skb
;
675 buffer_info
->dma
= dma_map_single(&pdev
->dev
, skb
->data
,
676 adapter
->rx_buffer_len
,
678 if (dma_mapping_error(&pdev
->dev
, buffer_info
->dma
)) {
679 dev_err(&pdev
->dev
, "Rx DMA map failed\n");
680 adapter
->rx_dma_failed
++;
684 rx_desc
= E1000_RX_DESC_EXT(*rx_ring
, i
);
685 rx_desc
->read
.buffer_addr
= cpu_to_le64(buffer_info
->dma
);
687 if (unlikely(!(i
& (E1000_RX_BUFFER_WRITE
- 1)))) {
688 /* Force memory writes to complete before letting h/w
689 * know there are new descriptors to fetch. (Only
690 * applicable for weak-ordered memory model archs,
694 if (adapter
->flags2
& FLAG2_PCIM2PCI_ARBITER_WA
)
695 e1000e_update_rdt_wa(rx_ring
, i
);
697 writel(i
, rx_ring
->tail
);
700 if (i
== rx_ring
->count
)
702 buffer_info
= &rx_ring
->buffer_info
[i
];
705 rx_ring
->next_to_use
= i
;
709 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
710 * @rx_ring: Rx descriptor ring
712 static void e1000_alloc_rx_buffers_ps(struct e1000_ring
*rx_ring
,
713 int cleaned_count
, gfp_t gfp
)
715 struct e1000_adapter
*adapter
= rx_ring
->adapter
;
716 struct net_device
*netdev
= adapter
->netdev
;
717 struct pci_dev
*pdev
= adapter
->pdev
;
718 union e1000_rx_desc_packet_split
*rx_desc
;
719 struct e1000_buffer
*buffer_info
;
720 struct e1000_ps_page
*ps_page
;
724 i
= rx_ring
->next_to_use
;
725 buffer_info
= &rx_ring
->buffer_info
[i
];
727 while (cleaned_count
--) {
728 rx_desc
= E1000_RX_DESC_PS(*rx_ring
, i
);
730 for (j
= 0; j
< PS_PAGE_BUFFERS
; j
++) {
731 ps_page
= &buffer_info
->ps_pages
[j
];
732 if (j
>= adapter
->rx_ps_pages
) {
733 /* all unused desc entries get hw null ptr */
734 rx_desc
->read
.buffer_addr
[j
+ 1] =
738 if (!ps_page
->page
) {
739 ps_page
->page
= alloc_page(gfp
);
740 if (!ps_page
->page
) {
741 adapter
->alloc_rx_buff_failed
++;
744 ps_page
->dma
= dma_map_page(&pdev
->dev
,
748 if (dma_mapping_error(&pdev
->dev
,
750 dev_err(&adapter
->pdev
->dev
,
751 "Rx DMA page map failed\n");
752 adapter
->rx_dma_failed
++;
756 /* Refresh the desc even if buffer_addrs
757 * didn't change because each write-back
760 rx_desc
->read
.buffer_addr
[j
+ 1] =
761 cpu_to_le64(ps_page
->dma
);
764 skb
= __netdev_alloc_skb_ip_align(netdev
, adapter
->rx_ps_bsize0
,
768 adapter
->alloc_rx_buff_failed
++;
772 buffer_info
->skb
= skb
;
773 buffer_info
->dma
= dma_map_single(&pdev
->dev
, skb
->data
,
774 adapter
->rx_ps_bsize0
,
776 if (dma_mapping_error(&pdev
->dev
, buffer_info
->dma
)) {
777 dev_err(&pdev
->dev
, "Rx DMA map failed\n");
778 adapter
->rx_dma_failed
++;
780 dev_kfree_skb_any(skb
);
781 buffer_info
->skb
= NULL
;
785 rx_desc
->read
.buffer_addr
[0] = cpu_to_le64(buffer_info
->dma
);
787 if (unlikely(!(i
& (E1000_RX_BUFFER_WRITE
- 1)))) {
788 /* Force memory writes to complete before letting h/w
789 * know there are new descriptors to fetch. (Only
790 * applicable for weak-ordered memory model archs,
794 if (adapter
->flags2
& FLAG2_PCIM2PCI_ARBITER_WA
)
795 e1000e_update_rdt_wa(rx_ring
, i
<< 1);
797 writel(i
<< 1, rx_ring
->tail
);
801 if (i
== rx_ring
->count
)
803 buffer_info
= &rx_ring
->buffer_info
[i
];
807 rx_ring
->next_to_use
= i
;
811 * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
812 * @rx_ring: Rx descriptor ring
813 * @cleaned_count: number of buffers to allocate this pass
816 static void e1000_alloc_jumbo_rx_buffers(struct e1000_ring
*rx_ring
,
817 int cleaned_count
, gfp_t gfp
)
819 struct e1000_adapter
*adapter
= rx_ring
->adapter
;
820 struct net_device
*netdev
= adapter
->netdev
;
821 struct pci_dev
*pdev
= adapter
->pdev
;
822 union e1000_rx_desc_extended
*rx_desc
;
823 struct e1000_buffer
*buffer_info
;
826 unsigned int bufsz
= 256 - 16; /* for skb_reserve */
828 i
= rx_ring
->next_to_use
;
829 buffer_info
= &rx_ring
->buffer_info
[i
];
831 while (cleaned_count
--) {
832 skb
= buffer_info
->skb
;
838 skb
= __netdev_alloc_skb_ip_align(netdev
, bufsz
, gfp
);
839 if (unlikely(!skb
)) {
840 /* Better luck next round */
841 adapter
->alloc_rx_buff_failed
++;
845 buffer_info
->skb
= skb
;
847 /* allocate a new page if necessary */
848 if (!buffer_info
->page
) {
849 buffer_info
->page
= alloc_page(gfp
);
850 if (unlikely(!buffer_info
->page
)) {
851 adapter
->alloc_rx_buff_failed
++;
856 if (!buffer_info
->dma
) {
857 buffer_info
->dma
= dma_map_page(&pdev
->dev
,
858 buffer_info
->page
, 0,
861 if (dma_mapping_error(&pdev
->dev
, buffer_info
->dma
)) {
862 adapter
->alloc_rx_buff_failed
++;
867 rx_desc
= E1000_RX_DESC_EXT(*rx_ring
, i
);
868 rx_desc
->read
.buffer_addr
= cpu_to_le64(buffer_info
->dma
);
870 if (unlikely(++i
== rx_ring
->count
))
872 buffer_info
= &rx_ring
->buffer_info
[i
];
875 if (likely(rx_ring
->next_to_use
!= i
)) {
876 rx_ring
->next_to_use
= i
;
877 if (unlikely(i
-- == 0))
878 i
= (rx_ring
->count
- 1);
880 /* Force memory writes to complete before letting h/w
881 * know there are new descriptors to fetch. (Only
882 * applicable for weak-ordered memory model archs,
886 if (adapter
->flags2
& FLAG2_PCIM2PCI_ARBITER_WA
)
887 e1000e_update_rdt_wa(rx_ring
, i
);
889 writel(i
, rx_ring
->tail
);
893 static inline void e1000_rx_hash(struct net_device
*netdev
, __le32 rss
,
896 if (netdev
->features
& NETIF_F_RXHASH
)
897 skb_set_hash(skb
, le32_to_cpu(rss
), PKT_HASH_TYPE_L3
);
901 * e1000_clean_rx_irq - Send received data up the network stack
902 * @rx_ring: Rx descriptor ring
904 * the return value indicates whether actual cleaning was done, there
905 * is no guarantee that everything was cleaned
907 static bool e1000_clean_rx_irq(struct e1000_ring
*rx_ring
, int *work_done
,
910 struct e1000_adapter
*adapter
= rx_ring
->adapter
;
911 struct net_device
*netdev
= adapter
->netdev
;
912 struct pci_dev
*pdev
= adapter
->pdev
;
913 struct e1000_hw
*hw
= &adapter
->hw
;
914 union e1000_rx_desc_extended
*rx_desc
, *next_rxd
;
915 struct e1000_buffer
*buffer_info
, *next_buffer
;
918 int cleaned_count
= 0;
919 bool cleaned
= false;
920 unsigned int total_rx_bytes
= 0, total_rx_packets
= 0;
922 i
= rx_ring
->next_to_clean
;
923 rx_desc
= E1000_RX_DESC_EXT(*rx_ring
, i
);
924 staterr
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
925 buffer_info
= &rx_ring
->buffer_info
[i
];
927 while (staterr
& E1000_RXD_STAT_DD
) {
930 if (*work_done
>= work_to_do
)
933 dma_rmb(); /* read descriptor and rx_buffer_info after status DD */
935 skb
= buffer_info
->skb
;
936 buffer_info
->skb
= NULL
;
938 prefetch(skb
->data
- NET_IP_ALIGN
);
941 if (i
== rx_ring
->count
)
943 next_rxd
= E1000_RX_DESC_EXT(*rx_ring
, i
);
946 next_buffer
= &rx_ring
->buffer_info
[i
];
950 dma_unmap_single(&pdev
->dev
, buffer_info
->dma
,
951 adapter
->rx_buffer_len
, DMA_FROM_DEVICE
);
952 buffer_info
->dma
= 0;
954 length
= le16_to_cpu(rx_desc
->wb
.upper
.length
);
956 /* !EOP means multiple descriptors were used to store a single
957 * packet, if that's the case we need to toss it. In fact, we
958 * need to toss every packet with the EOP bit clear and the
959 * next frame that _does_ have the EOP bit set, as it is by
960 * definition only a frame fragment
962 if (unlikely(!(staterr
& E1000_RXD_STAT_EOP
)))
963 adapter
->flags2
|= FLAG2_IS_DISCARDING
;
965 if (adapter
->flags2
& FLAG2_IS_DISCARDING
) {
966 /* All receives must fit into a single buffer */
967 e_dbg("Receive packet consumed multiple buffers\n");
969 buffer_info
->skb
= skb
;
970 if (staterr
& E1000_RXD_STAT_EOP
)
971 adapter
->flags2
&= ~FLAG2_IS_DISCARDING
;
975 if (unlikely((staterr
& E1000_RXDEXT_ERR_FRAME_ERR_MASK
) &&
976 !(netdev
->features
& NETIF_F_RXALL
))) {
978 buffer_info
->skb
= skb
;
982 /* adjust length to remove Ethernet CRC */
983 if (!(adapter
->flags2
& FLAG2_CRC_STRIPPING
)) {
984 /* If configured to store CRC, don't subtract FCS,
985 * but keep the FCS bytes out of the total_rx_bytes
988 if (netdev
->features
& NETIF_F_RXFCS
)
994 total_rx_bytes
+= length
;
997 /* code added for copybreak, this should improve
998 * performance for small packets with large amounts
999 * of reassembly being done in the stack
1001 if (length
< copybreak
) {
1002 struct sk_buff
*new_skb
=
1003 napi_alloc_skb(&adapter
->napi
, length
);
1005 skb_copy_to_linear_data_offset(new_skb
,
1011 /* save the skb in buffer_info as good */
1012 buffer_info
->skb
= skb
;
1015 /* else just continue with the old one */
1017 /* end copybreak code */
1018 skb_put(skb
, length
);
1020 /* Receive Checksum Offload */
1021 e1000_rx_checksum(adapter
, staterr
, skb
);
1023 e1000_rx_hash(netdev
, rx_desc
->wb
.lower
.hi_dword
.rss
, skb
);
1025 e1000_receive_skb(adapter
, netdev
, skb
, staterr
,
1026 rx_desc
->wb
.upper
.vlan
);
1029 rx_desc
->wb
.upper
.status_error
&= cpu_to_le32(~0xFF);
1031 /* return some buffers to hardware, one at a time is too slow */
1032 if (cleaned_count
>= E1000_RX_BUFFER_WRITE
) {
1033 adapter
->alloc_rx_buf(rx_ring
, cleaned_count
,
1038 /* use prefetched values */
1040 buffer_info
= next_buffer
;
1042 staterr
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
1044 rx_ring
->next_to_clean
= i
;
1046 cleaned_count
= e1000_desc_unused(rx_ring
);
1048 adapter
->alloc_rx_buf(rx_ring
, cleaned_count
, GFP_ATOMIC
);
1050 adapter
->total_rx_bytes
+= total_rx_bytes
;
1051 adapter
->total_rx_packets
+= total_rx_packets
;
1055 static void e1000_put_txbuf(struct e1000_ring
*tx_ring
,
1056 struct e1000_buffer
*buffer_info
,
1059 struct e1000_adapter
*adapter
= tx_ring
->adapter
;
1061 if (buffer_info
->dma
) {
1062 if (buffer_info
->mapped_as_page
)
1063 dma_unmap_page(&adapter
->pdev
->dev
, buffer_info
->dma
,
1064 buffer_info
->length
, DMA_TO_DEVICE
);
1066 dma_unmap_single(&adapter
->pdev
->dev
, buffer_info
->dma
,
1067 buffer_info
->length
, DMA_TO_DEVICE
);
1068 buffer_info
->dma
= 0;
1070 if (buffer_info
->skb
) {
1072 dev_kfree_skb_any(buffer_info
->skb
);
1074 dev_consume_skb_any(buffer_info
->skb
);
1075 buffer_info
->skb
= NULL
;
1077 buffer_info
->time_stamp
= 0;
1080 static void e1000_print_hw_hang(struct work_struct
*work
)
1082 struct e1000_adapter
*adapter
= container_of(work
,
1083 struct e1000_adapter
,
1085 struct net_device
*netdev
= adapter
->netdev
;
1086 struct e1000_ring
*tx_ring
= adapter
->tx_ring
;
1087 unsigned int i
= tx_ring
->next_to_clean
;
1088 unsigned int eop
= tx_ring
->buffer_info
[i
].next_to_watch
;
1089 struct e1000_tx_desc
*eop_desc
= E1000_TX_DESC(*tx_ring
, eop
);
1090 struct e1000_hw
*hw
= &adapter
->hw
;
1091 u16 phy_status
, phy_1000t_status
, phy_ext_status
;
1094 if (test_bit(__E1000_DOWN
, &adapter
->state
))
1097 if (!adapter
->tx_hang_recheck
&& (adapter
->flags2
& FLAG2_DMA_BURST
)) {
1098 /* May be block on write-back, flush and detect again
1099 * flush pending descriptor writebacks to memory
1101 ew32(TIDV
, adapter
->tx_int_delay
| E1000_TIDV_FPD
);
1102 /* execute the writes immediately */
1104 /* Due to rare timing issues, write to TIDV again to ensure
1105 * the write is successful
1107 ew32(TIDV
, adapter
->tx_int_delay
| E1000_TIDV_FPD
);
1108 /* execute the writes immediately */
1110 adapter
->tx_hang_recheck
= true;
1113 adapter
->tx_hang_recheck
= false;
1115 if (er32(TDH(0)) == er32(TDT(0))) {
1116 e_dbg("false hang detected, ignoring\n");
1120 /* Real hang detected */
1121 netif_stop_queue(netdev
);
1123 e1e_rphy(hw
, MII_BMSR
, &phy_status
);
1124 e1e_rphy(hw
, MII_STAT1000
, &phy_1000t_status
);
1125 e1e_rphy(hw
, MII_ESTATUS
, &phy_ext_status
);
1127 pci_read_config_word(adapter
->pdev
, PCI_STATUS
, &pci_status
);
1129 /* detected Hardware unit hang */
1130 e_err("Detected Hardware Unit Hang:\n"
1133 " next_to_use <%x>\n"
1134 " next_to_clean <%x>\n"
1135 "buffer_info[next_to_clean]:\n"
1136 " time_stamp <%lx>\n"
1137 " next_to_watch <%x>\n"
1139 " next_to_watch.status <%x>\n"
1142 "PHY 1000BASE-T Status <%x>\n"
1143 "PHY Extended Status <%x>\n"
1144 "PCI Status <%x>\n",
1145 readl(tx_ring
->head
), readl(tx_ring
->tail
), tx_ring
->next_to_use
,
1146 tx_ring
->next_to_clean
, tx_ring
->buffer_info
[eop
].time_stamp
,
1147 eop
, jiffies
, eop_desc
->upper
.fields
.status
, er32(STATUS
),
1148 phy_status
, phy_1000t_status
, phy_ext_status
, pci_status
);
1150 e1000e_dump(adapter
);
1152 /* Suggest workaround for known h/w issue */
1153 if ((hw
->mac
.type
== e1000_pchlan
) && (er32(CTRL
) & E1000_CTRL_TFCE
))
1154 e_err("Try turning off Tx pause (flow control) via ethtool\n");
1158 * e1000e_tx_hwtstamp_work - check for Tx time stamp
1159 * @work: pointer to work struct
1161 * This work function polls the TSYNCTXCTL valid bit to determine when a
1162 * timestamp has been taken for the current stored skb. The timestamp must
1163 * be for this skb because only one such packet is allowed in the queue.
1165 static void e1000e_tx_hwtstamp_work(struct work_struct
*work
)
1167 struct e1000_adapter
*adapter
= container_of(work
, struct e1000_adapter
,
1169 struct e1000_hw
*hw
= &adapter
->hw
;
1171 if (er32(TSYNCTXCTL
) & E1000_TSYNCTXCTL_VALID
) {
1172 struct sk_buff
*skb
= adapter
->tx_hwtstamp_skb
;
1173 struct skb_shared_hwtstamps shhwtstamps
;
1176 txstmp
= er32(TXSTMPL
);
1177 txstmp
|= (u64
)er32(TXSTMPH
) << 32;
1179 e1000e_systim_to_hwtstamp(adapter
, &shhwtstamps
, txstmp
);
1181 /* Clear the global tx_hwtstamp_skb pointer and force writes
1182 * prior to notifying the stack of a Tx timestamp.
1184 adapter
->tx_hwtstamp_skb
= NULL
;
1185 wmb(); /* force write prior to skb_tstamp_tx */
1187 skb_tstamp_tx(skb
, &shhwtstamps
);
1188 dev_consume_skb_any(skb
);
1189 } else if (time_after(jiffies
, adapter
->tx_hwtstamp_start
1190 + adapter
->tx_timeout_factor
* HZ
)) {
1191 dev_kfree_skb_any(adapter
->tx_hwtstamp_skb
);
1192 adapter
->tx_hwtstamp_skb
= NULL
;
1193 adapter
->tx_hwtstamp_timeouts
++;
1194 e_warn("clearing Tx timestamp hang\n");
1196 /* reschedule to check later */
1197 schedule_work(&adapter
->tx_hwtstamp_work
);
1202 * e1000_clean_tx_irq - Reclaim resources after transmit completes
1203 * @tx_ring: Tx descriptor ring
1205 * the return value indicates whether actual cleaning was done, there
1206 * is no guarantee that everything was cleaned
1208 static bool e1000_clean_tx_irq(struct e1000_ring
*tx_ring
)
1210 struct e1000_adapter
*adapter
= tx_ring
->adapter
;
1211 struct net_device
*netdev
= adapter
->netdev
;
1212 struct e1000_hw
*hw
= &adapter
->hw
;
1213 struct e1000_tx_desc
*tx_desc
, *eop_desc
;
1214 struct e1000_buffer
*buffer_info
;
1215 unsigned int i
, eop
;
1216 unsigned int count
= 0;
1217 unsigned int total_tx_bytes
= 0, total_tx_packets
= 0;
1218 unsigned int bytes_compl
= 0, pkts_compl
= 0;
1220 i
= tx_ring
->next_to_clean
;
1221 eop
= tx_ring
->buffer_info
[i
].next_to_watch
;
1222 eop_desc
= E1000_TX_DESC(*tx_ring
, eop
);
1224 while ((eop_desc
->upper
.data
& cpu_to_le32(E1000_TXD_STAT_DD
)) &&
1225 (count
< tx_ring
->count
)) {
1226 bool cleaned
= false;
1228 dma_rmb(); /* read buffer_info after eop_desc */
1229 for (; !cleaned
; count
++) {
1230 tx_desc
= E1000_TX_DESC(*tx_ring
, i
);
1231 buffer_info
= &tx_ring
->buffer_info
[i
];
1232 cleaned
= (i
== eop
);
1235 total_tx_packets
+= buffer_info
->segs
;
1236 total_tx_bytes
+= buffer_info
->bytecount
;
1237 if (buffer_info
->skb
) {
1238 bytes_compl
+= buffer_info
->skb
->len
;
1243 e1000_put_txbuf(tx_ring
, buffer_info
, false);
1244 tx_desc
->upper
.data
= 0;
1247 if (i
== tx_ring
->count
)
1251 if (i
== tx_ring
->next_to_use
)
1253 eop
= tx_ring
->buffer_info
[i
].next_to_watch
;
1254 eop_desc
= E1000_TX_DESC(*tx_ring
, eop
);
1257 tx_ring
->next_to_clean
= i
;
1259 netdev_completed_queue(netdev
, pkts_compl
, bytes_compl
);
1261 #define TX_WAKE_THRESHOLD 32
1262 if (count
&& netif_carrier_ok(netdev
) &&
1263 e1000_desc_unused(tx_ring
) >= TX_WAKE_THRESHOLD
) {
1264 /* Make sure that anybody stopping the queue after this
1265 * sees the new next_to_clean.
1269 if (netif_queue_stopped(netdev
) &&
1270 !(test_bit(__E1000_DOWN
, &adapter
->state
))) {
1271 netif_wake_queue(netdev
);
1272 ++adapter
->restart_queue
;
1276 if (adapter
->detect_tx_hung
) {
1277 /* Detect a transmit hang in hardware, this serializes the
1278 * check with the clearing of time_stamp and movement of i
1280 adapter
->detect_tx_hung
= false;
1281 if (tx_ring
->buffer_info
[i
].time_stamp
&&
1282 time_after(jiffies
, tx_ring
->buffer_info
[i
].time_stamp
1283 + (adapter
->tx_timeout_factor
* HZ
)) &&
1284 !(er32(STATUS
) & E1000_STATUS_TXOFF
))
1285 schedule_work(&adapter
->print_hang_task
);
1287 adapter
->tx_hang_recheck
= false;
1289 adapter
->total_tx_bytes
+= total_tx_bytes
;
1290 adapter
->total_tx_packets
+= total_tx_packets
;
1291 return count
< tx_ring
->count
;
1295 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
1296 * @rx_ring: Rx descriptor ring
1298 * the return value indicates whether actual cleaning was done, there
1299 * is no guarantee that everything was cleaned
1301 static bool e1000_clean_rx_irq_ps(struct e1000_ring
*rx_ring
, int *work_done
,
1304 struct e1000_adapter
*adapter
= rx_ring
->adapter
;
1305 struct e1000_hw
*hw
= &adapter
->hw
;
1306 union e1000_rx_desc_packet_split
*rx_desc
, *next_rxd
;
1307 struct net_device
*netdev
= adapter
->netdev
;
1308 struct pci_dev
*pdev
= adapter
->pdev
;
1309 struct e1000_buffer
*buffer_info
, *next_buffer
;
1310 struct e1000_ps_page
*ps_page
;
1311 struct sk_buff
*skb
;
1313 u32 length
, staterr
;
1314 int cleaned_count
= 0;
1315 bool cleaned
= false;
1316 unsigned int total_rx_bytes
= 0, total_rx_packets
= 0;
1318 i
= rx_ring
->next_to_clean
;
1319 rx_desc
= E1000_RX_DESC_PS(*rx_ring
, i
);
1320 staterr
= le32_to_cpu(rx_desc
->wb
.middle
.status_error
);
1321 buffer_info
= &rx_ring
->buffer_info
[i
];
1323 while (staterr
& E1000_RXD_STAT_DD
) {
1324 if (*work_done
>= work_to_do
)
1327 skb
= buffer_info
->skb
;
1328 dma_rmb(); /* read descriptor and rx_buffer_info after status DD */
1330 /* in the packet split case this is header only */
1331 prefetch(skb
->data
- NET_IP_ALIGN
);
1334 if (i
== rx_ring
->count
)
1336 next_rxd
= E1000_RX_DESC_PS(*rx_ring
, i
);
1339 next_buffer
= &rx_ring
->buffer_info
[i
];
1343 dma_unmap_single(&pdev
->dev
, buffer_info
->dma
,
1344 adapter
->rx_ps_bsize0
, DMA_FROM_DEVICE
);
1345 buffer_info
->dma
= 0;
1347 /* see !EOP comment in other Rx routine */
1348 if (!(staterr
& E1000_RXD_STAT_EOP
))
1349 adapter
->flags2
|= FLAG2_IS_DISCARDING
;
1351 if (adapter
->flags2
& FLAG2_IS_DISCARDING
) {
1352 e_dbg("Packet Split buffers didn't pick up the full packet\n");
1353 dev_kfree_skb_irq(skb
);
1354 if (staterr
& E1000_RXD_STAT_EOP
)
1355 adapter
->flags2
&= ~FLAG2_IS_DISCARDING
;
1359 if (unlikely((staterr
& E1000_RXDEXT_ERR_FRAME_ERR_MASK
) &&
1360 !(netdev
->features
& NETIF_F_RXALL
))) {
1361 dev_kfree_skb_irq(skb
);
1365 length
= le16_to_cpu(rx_desc
->wb
.middle
.length0
);
1368 e_dbg("Last part of the packet spanning multiple descriptors\n");
1369 dev_kfree_skb_irq(skb
);
1374 skb_put(skb
, length
);
1377 /* this looks ugly, but it seems compiler issues make
1378 * it more efficient than reusing j
1380 int l1
= le16_to_cpu(rx_desc
->wb
.upper
.length
[0]);
1382 /* page alloc/put takes too long and effects small
1383 * packet throughput, so unsplit small packets and
1384 * save the alloc/put only valid in softirq (napi)
1385 * context to call kmap_*
1387 if (l1
&& (l1
<= copybreak
) &&
1388 ((length
+ l1
) <= adapter
->rx_ps_bsize0
)) {
1391 ps_page
= &buffer_info
->ps_pages
[0];
1393 /* there is no documentation about how to call
1394 * kmap_atomic, so we can't hold the mapping
1397 dma_sync_single_for_cpu(&pdev
->dev
,
1401 vaddr
= kmap_atomic(ps_page
->page
);
1402 memcpy(skb_tail_pointer(skb
), vaddr
, l1
);
1403 kunmap_atomic(vaddr
);
1404 dma_sync_single_for_device(&pdev
->dev
,
1409 /* remove the CRC */
1410 if (!(adapter
->flags2
& FLAG2_CRC_STRIPPING
)) {
1411 if (!(netdev
->features
& NETIF_F_RXFCS
))
1420 for (j
= 0; j
< PS_PAGE_BUFFERS
; j
++) {
1421 length
= le16_to_cpu(rx_desc
->wb
.upper
.length
[j
]);
1425 ps_page
= &buffer_info
->ps_pages
[j
];
1426 dma_unmap_page(&pdev
->dev
, ps_page
->dma
, PAGE_SIZE
,
1429 skb_fill_page_desc(skb
, j
, ps_page
->page
, 0, length
);
1430 ps_page
->page
= NULL
;
1432 skb
->data_len
+= length
;
1433 skb
->truesize
+= PAGE_SIZE
;
1436 /* strip the ethernet crc, problem is we're using pages now so
1437 * this whole operation can get a little cpu intensive
1439 if (!(adapter
->flags2
& FLAG2_CRC_STRIPPING
)) {
1440 if (!(netdev
->features
& NETIF_F_RXFCS
))
1441 pskb_trim(skb
, skb
->len
- 4);
1445 total_rx_bytes
+= skb
->len
;
1448 e1000_rx_checksum(adapter
, staterr
, skb
);
1450 e1000_rx_hash(netdev
, rx_desc
->wb
.lower
.hi_dword
.rss
, skb
);
1452 if (rx_desc
->wb
.upper
.header_status
&
1453 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP
))
1454 adapter
->rx_hdr_split
++;
1456 e1000_receive_skb(adapter
, netdev
, skb
, staterr
,
1457 rx_desc
->wb
.middle
.vlan
);
1460 rx_desc
->wb
.middle
.status_error
&= cpu_to_le32(~0xFF);
1461 buffer_info
->skb
= NULL
;
1463 /* return some buffers to hardware, one at a time is too slow */
1464 if (cleaned_count
>= E1000_RX_BUFFER_WRITE
) {
1465 adapter
->alloc_rx_buf(rx_ring
, cleaned_count
,
1470 /* use prefetched values */
1472 buffer_info
= next_buffer
;
1474 staterr
= le32_to_cpu(rx_desc
->wb
.middle
.status_error
);
1476 rx_ring
->next_to_clean
= i
;
1478 cleaned_count
= e1000_desc_unused(rx_ring
);
1480 adapter
->alloc_rx_buf(rx_ring
, cleaned_count
, GFP_ATOMIC
);
1482 adapter
->total_rx_bytes
+= total_rx_bytes
;
1483 adapter
->total_rx_packets
+= total_rx_packets
;
1488 * e1000_consume_page - helper function
1490 static void e1000_consume_page(struct e1000_buffer
*bi
, struct sk_buff
*skb
,
1495 skb
->data_len
+= length
;
1496 skb
->truesize
+= PAGE_SIZE
;
1500 * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy
1501 * @adapter: board private structure
1503 * the return value indicates whether actual cleaning was done, there
1504 * is no guarantee that everything was cleaned
1506 static bool e1000_clean_jumbo_rx_irq(struct e1000_ring
*rx_ring
, int *work_done
,
1509 struct e1000_adapter
*adapter
= rx_ring
->adapter
;
1510 struct net_device
*netdev
= adapter
->netdev
;
1511 struct pci_dev
*pdev
= adapter
->pdev
;
1512 union e1000_rx_desc_extended
*rx_desc
, *next_rxd
;
1513 struct e1000_buffer
*buffer_info
, *next_buffer
;
1514 u32 length
, staterr
;
1516 int cleaned_count
= 0;
1517 bool cleaned
= false;
1518 unsigned int total_rx_bytes
= 0, total_rx_packets
= 0;
1519 struct skb_shared_info
*shinfo
;
1521 i
= rx_ring
->next_to_clean
;
1522 rx_desc
= E1000_RX_DESC_EXT(*rx_ring
, i
);
1523 staterr
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
1524 buffer_info
= &rx_ring
->buffer_info
[i
];
1526 while (staterr
& E1000_RXD_STAT_DD
) {
1527 struct sk_buff
*skb
;
1529 if (*work_done
>= work_to_do
)
1532 dma_rmb(); /* read descriptor and rx_buffer_info after status DD */
1534 skb
= buffer_info
->skb
;
1535 buffer_info
->skb
= NULL
;
1538 if (i
== rx_ring
->count
)
1540 next_rxd
= E1000_RX_DESC_EXT(*rx_ring
, i
);
1543 next_buffer
= &rx_ring
->buffer_info
[i
];
1547 dma_unmap_page(&pdev
->dev
, buffer_info
->dma
, PAGE_SIZE
,
1549 buffer_info
->dma
= 0;
1551 length
= le16_to_cpu(rx_desc
->wb
.upper
.length
);
1553 /* errors is only valid for DD + EOP descriptors */
1554 if (unlikely((staterr
& E1000_RXD_STAT_EOP
) &&
1555 ((staterr
& E1000_RXDEXT_ERR_FRAME_ERR_MASK
) &&
1556 !(netdev
->features
& NETIF_F_RXALL
)))) {
1557 /* recycle both page and skb */
1558 buffer_info
->skb
= skb
;
1559 /* an error means any chain goes out the window too */
1560 if (rx_ring
->rx_skb_top
)
1561 dev_kfree_skb_irq(rx_ring
->rx_skb_top
);
1562 rx_ring
->rx_skb_top
= NULL
;
1565 #define rxtop (rx_ring->rx_skb_top)
1566 if (!(staterr
& E1000_RXD_STAT_EOP
)) {
1567 /* this descriptor is only the beginning (or middle) */
1569 /* this is the beginning of a chain */
1571 skb_fill_page_desc(rxtop
, 0, buffer_info
->page
,
1574 /* this is the middle of a chain */
1575 shinfo
= skb_shinfo(rxtop
);
1576 skb_fill_page_desc(rxtop
, shinfo
->nr_frags
,
1577 buffer_info
->page
, 0,
1579 /* re-use the skb, only consumed the page */
1580 buffer_info
->skb
= skb
;
1582 e1000_consume_page(buffer_info
, rxtop
, length
);
1586 /* end of the chain */
1587 shinfo
= skb_shinfo(rxtop
);
1588 skb_fill_page_desc(rxtop
, shinfo
->nr_frags
,
1589 buffer_info
->page
, 0,
1591 /* re-use the current skb, we only consumed the
1594 buffer_info
->skb
= skb
;
1597 e1000_consume_page(buffer_info
, skb
, length
);
1599 /* no chain, got EOP, this buf is the packet
1600 * copybreak to save the put_page/alloc_page
1602 if (length
<= copybreak
&&
1603 skb_tailroom(skb
) >= length
) {
1605 vaddr
= kmap_atomic(buffer_info
->page
);
1606 memcpy(skb_tail_pointer(skb
), vaddr
,
1608 kunmap_atomic(vaddr
);
1609 /* re-use the page, so don't erase
1612 skb_put(skb
, length
);
1614 skb_fill_page_desc(skb
, 0,
1615 buffer_info
->page
, 0,
1617 e1000_consume_page(buffer_info
, skb
,
1623 /* Receive Checksum Offload */
1624 e1000_rx_checksum(adapter
, staterr
, skb
);
1626 e1000_rx_hash(netdev
, rx_desc
->wb
.lower
.hi_dword
.rss
, skb
);
1628 /* probably a little skewed due to removing CRC */
1629 total_rx_bytes
+= skb
->len
;
1632 /* eth type trans needs skb->data to point to something */
1633 if (!pskb_may_pull(skb
, ETH_HLEN
)) {
1634 e_err("pskb_may_pull failed.\n");
1635 dev_kfree_skb_irq(skb
);
1639 e1000_receive_skb(adapter
, netdev
, skb
, staterr
,
1640 rx_desc
->wb
.upper
.vlan
);
1643 rx_desc
->wb
.upper
.status_error
&= cpu_to_le32(~0xFF);
1645 /* return some buffers to hardware, one at a time is too slow */
1646 if (unlikely(cleaned_count
>= E1000_RX_BUFFER_WRITE
)) {
1647 adapter
->alloc_rx_buf(rx_ring
, cleaned_count
,
1652 /* use prefetched values */
1654 buffer_info
= next_buffer
;
1656 staterr
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
1658 rx_ring
->next_to_clean
= i
;
1660 cleaned_count
= e1000_desc_unused(rx_ring
);
1662 adapter
->alloc_rx_buf(rx_ring
, cleaned_count
, GFP_ATOMIC
);
1664 adapter
->total_rx_bytes
+= total_rx_bytes
;
1665 adapter
->total_rx_packets
+= total_rx_packets
;
1670 * e1000_clean_rx_ring - Free Rx Buffers per Queue
1671 * @rx_ring: Rx descriptor ring
1673 static void e1000_clean_rx_ring(struct e1000_ring
*rx_ring
)
1675 struct e1000_adapter
*adapter
= rx_ring
->adapter
;
1676 struct e1000_buffer
*buffer_info
;
1677 struct e1000_ps_page
*ps_page
;
1678 struct pci_dev
*pdev
= adapter
->pdev
;
1681 /* Free all the Rx ring sk_buffs */
1682 for (i
= 0; i
< rx_ring
->count
; i
++) {
1683 buffer_info
= &rx_ring
->buffer_info
[i
];
1684 if (buffer_info
->dma
) {
1685 if (adapter
->clean_rx
== e1000_clean_rx_irq
)
1686 dma_unmap_single(&pdev
->dev
, buffer_info
->dma
,
1687 adapter
->rx_buffer_len
,
1689 else if (adapter
->clean_rx
== e1000_clean_jumbo_rx_irq
)
1690 dma_unmap_page(&pdev
->dev
, buffer_info
->dma
,
1691 PAGE_SIZE
, DMA_FROM_DEVICE
);
1692 else if (adapter
->clean_rx
== e1000_clean_rx_irq_ps
)
1693 dma_unmap_single(&pdev
->dev
, buffer_info
->dma
,
1694 adapter
->rx_ps_bsize0
,
1696 buffer_info
->dma
= 0;
1699 if (buffer_info
->page
) {
1700 put_page(buffer_info
->page
);
1701 buffer_info
->page
= NULL
;
1704 if (buffer_info
->skb
) {
1705 dev_kfree_skb(buffer_info
->skb
);
1706 buffer_info
->skb
= NULL
;
1709 for (j
= 0; j
< PS_PAGE_BUFFERS
; j
++) {
1710 ps_page
= &buffer_info
->ps_pages
[j
];
1713 dma_unmap_page(&pdev
->dev
, ps_page
->dma
, PAGE_SIZE
,
1716 put_page(ps_page
->page
);
1717 ps_page
->page
= NULL
;
1721 /* there also may be some cached data from a chained receive */
1722 if (rx_ring
->rx_skb_top
) {
1723 dev_kfree_skb(rx_ring
->rx_skb_top
);
1724 rx_ring
->rx_skb_top
= NULL
;
1727 /* Zero out the descriptor ring */
1728 memset(rx_ring
->desc
, 0, rx_ring
->size
);
1730 rx_ring
->next_to_clean
= 0;
1731 rx_ring
->next_to_use
= 0;
1732 adapter
->flags2
&= ~FLAG2_IS_DISCARDING
;
1735 static void e1000e_downshift_workaround(struct work_struct
*work
)
1737 struct e1000_adapter
*adapter
= container_of(work
,
1738 struct e1000_adapter
,
1741 if (test_bit(__E1000_DOWN
, &adapter
->state
))
1744 e1000e_gig_downshift_workaround_ich8lan(&adapter
->hw
);
1748 * e1000_intr_msi - Interrupt Handler
1749 * @irq: interrupt number
1750 * @data: pointer to a network interface device structure
1752 static irqreturn_t
e1000_intr_msi(int __always_unused irq
, void *data
)
1754 struct net_device
*netdev
= data
;
1755 struct e1000_adapter
*adapter
= netdev_priv(netdev
);
1756 struct e1000_hw
*hw
= &adapter
->hw
;
1757 u32 icr
= er32(ICR
);
1759 /* read ICR disables interrupts using IAM */
1760 if (icr
& E1000_ICR_LSC
) {
1761 hw
->mac
.get_link_status
= true;
1762 /* ICH8 workaround-- Call gig speed drop workaround on cable
1763 * disconnect (LSC) before accessing any PHY registers
1765 if ((adapter
->flags
& FLAG_LSC_GIG_SPEED_DROP
) &&
1766 (!(er32(STATUS
) & E1000_STATUS_LU
)))
1767 schedule_work(&adapter
->downshift_task
);
1769 /* 80003ES2LAN workaround-- For packet buffer work-around on
1770 * link down event; disable receives here in the ISR and reset
1771 * adapter in watchdog
1773 if (netif_carrier_ok(netdev
) &&
1774 adapter
->flags
& FLAG_RX_NEEDS_RESTART
) {
1775 /* disable receives */
1776 u32 rctl
= er32(RCTL
);
1778 ew32(RCTL
, rctl
& ~E1000_RCTL_EN
);
1779 adapter
->flags
|= FLAG_RESTART_NOW
;
1781 /* guard against interrupt when we're going down */
1782 if (!test_bit(__E1000_DOWN
, &adapter
->state
))
1783 mod_delayed_work(adapter
->e1000_workqueue
,
1784 &adapter
->watchdog_task
, HZ
);
1787 /* Reset on uncorrectable ECC error */
1788 if ((icr
& E1000_ICR_ECCER
) && (hw
->mac
.type
>= e1000_pch_lpt
)) {
1789 u32 pbeccsts
= er32(PBECCSTS
);
1791 adapter
->corr_errors
+=
1792 pbeccsts
& E1000_PBECCSTS_CORR_ERR_CNT_MASK
;
1793 adapter
->uncorr_errors
+=
1794 (pbeccsts
& E1000_PBECCSTS_UNCORR_ERR_CNT_MASK
) >>
1795 E1000_PBECCSTS_UNCORR_ERR_CNT_SHIFT
;
1797 /* Do the reset outside of interrupt context */
1798 schedule_work(&adapter
->reset_task
);
1800 /* return immediately since reset is imminent */
1804 if (napi_schedule_prep(&adapter
->napi
)) {
1805 adapter
->total_tx_bytes
= 0;
1806 adapter
->total_tx_packets
= 0;
1807 adapter
->total_rx_bytes
= 0;
1808 adapter
->total_rx_packets
= 0;
1809 __napi_schedule(&adapter
->napi
);
1816 * e1000_intr - Interrupt Handler
1817 * @irq: interrupt number
1818 * @data: pointer to a network interface device structure
1820 static irqreturn_t
e1000_intr(int __always_unused irq
, void *data
)
1822 struct net_device
*netdev
= data
;
1823 struct e1000_adapter
*adapter
= netdev_priv(netdev
);
1824 struct e1000_hw
*hw
= &adapter
->hw
;
1825 u32 rctl
, icr
= er32(ICR
);
1827 if (!icr
|| test_bit(__E1000_DOWN
, &adapter
->state
))
1828 return IRQ_NONE
; /* Not our interrupt */
1830 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
1831 * not set, then the adapter didn't send an interrupt
1833 if (!(icr
& E1000_ICR_INT_ASSERTED
))
1836 /* Interrupt Auto-Mask...upon reading ICR,
1837 * interrupts are masked. No need for the
1841 if (icr
& E1000_ICR_LSC
) {
1842 hw
->mac
.get_link_status
= true;
1843 /* ICH8 workaround-- Call gig speed drop workaround on cable
1844 * disconnect (LSC) before accessing any PHY registers
1846 if ((adapter
->flags
& FLAG_LSC_GIG_SPEED_DROP
) &&
1847 (!(er32(STATUS
) & E1000_STATUS_LU
)))
1848 schedule_work(&adapter
->downshift_task
);
1850 /* 80003ES2LAN workaround--
1851 * For packet buffer work-around on link down event;
1852 * disable receives here in the ISR and
1853 * reset adapter in watchdog
1855 if (netif_carrier_ok(netdev
) &&
1856 (adapter
->flags
& FLAG_RX_NEEDS_RESTART
)) {
1857 /* disable receives */
1859 ew32(RCTL
, rctl
& ~E1000_RCTL_EN
);
1860 adapter
->flags
|= FLAG_RESTART_NOW
;
1862 /* guard against interrupt when we're going down */
1863 if (!test_bit(__E1000_DOWN
, &adapter
->state
))
1864 mod_delayed_work(adapter
->e1000_workqueue
,
1865 &adapter
->watchdog_task
, HZ
);
1868 /* Reset on uncorrectable ECC error */
1869 if ((icr
& E1000_ICR_ECCER
) && (hw
->mac
.type
>= e1000_pch_lpt
)) {
1870 u32 pbeccsts
= er32(PBECCSTS
);
1872 adapter
->corr_errors
+=
1873 pbeccsts
& E1000_PBECCSTS_CORR_ERR_CNT_MASK
;
1874 adapter
->uncorr_errors
+=
1875 (pbeccsts
& E1000_PBECCSTS_UNCORR_ERR_CNT_MASK
) >>
1876 E1000_PBECCSTS_UNCORR_ERR_CNT_SHIFT
;
1878 /* Do the reset outside of interrupt context */
1879 schedule_work(&adapter
->reset_task
);
1881 /* return immediately since reset is imminent */
1885 if (napi_schedule_prep(&adapter
->napi
)) {
1886 adapter
->total_tx_bytes
= 0;
1887 adapter
->total_tx_packets
= 0;
1888 adapter
->total_rx_bytes
= 0;
1889 adapter
->total_rx_packets
= 0;
1890 __napi_schedule(&adapter
->napi
);
1896 static irqreturn_t
e1000_msix_other(int __always_unused irq
, void *data
)
1898 struct net_device
*netdev
= data
;
1899 struct e1000_adapter
*adapter
= netdev_priv(netdev
);
1900 struct e1000_hw
*hw
= &adapter
->hw
;
1901 u32 icr
= er32(ICR
);
1903 if (icr
& adapter
->eiac_mask
)
1904 ew32(ICS
, (icr
& adapter
->eiac_mask
));
1906 if (icr
& E1000_ICR_LSC
) {
1907 hw
->mac
.get_link_status
= true;
1908 /* guard against interrupt when we're going down */
1909 if (!test_bit(__E1000_DOWN
, &adapter
->state
))
1910 mod_delayed_work(adapter
->e1000_workqueue
,
1911 &adapter
->watchdog_task
, HZ
);
1914 if (!test_bit(__E1000_DOWN
, &adapter
->state
))
1915 ew32(IMS
, E1000_IMS_OTHER
| IMS_OTHER_MASK
);
1920 static irqreturn_t
e1000_intr_msix_tx(int __always_unused irq
, void *data
)
1922 struct net_device
*netdev
= data
;
1923 struct e1000_adapter
*adapter
= netdev_priv(netdev
);
1924 struct e1000_hw
*hw
= &adapter
->hw
;
1925 struct e1000_ring
*tx_ring
= adapter
->tx_ring
;
1927 adapter
->total_tx_bytes
= 0;
1928 adapter
->total_tx_packets
= 0;
1930 if (!e1000_clean_tx_irq(tx_ring
))
1931 /* Ring was not completely cleaned, so fire another interrupt */
1932 ew32(ICS
, tx_ring
->ims_val
);
1934 if (!test_bit(__E1000_DOWN
, &adapter
->state
))
1935 ew32(IMS
, adapter
->tx_ring
->ims_val
);
1940 static irqreturn_t
e1000_intr_msix_rx(int __always_unused irq
, void *data
)
1942 struct net_device
*netdev
= data
;
1943 struct e1000_adapter
*adapter
= netdev_priv(netdev
);
1944 struct e1000_ring
*rx_ring
= adapter
->rx_ring
;
1946 /* Write the ITR value calculated at the end of the
1947 * previous interrupt.
1949 if (rx_ring
->set_itr
) {
1950 u32 itr
= rx_ring
->itr_val
?
1951 1000000000 / (rx_ring
->itr_val
* 256) : 0;
1953 writel(itr
, rx_ring
->itr_register
);
1954 rx_ring
->set_itr
= 0;
1957 if (napi_schedule_prep(&adapter
->napi
)) {
1958 adapter
->total_rx_bytes
= 0;
1959 adapter
->total_rx_packets
= 0;
1960 __napi_schedule(&adapter
->napi
);
1966 * e1000_configure_msix - Configure MSI-X hardware
1968 * e1000_configure_msix sets up the hardware to properly
1969 * generate MSI-X interrupts.
1971 static void e1000_configure_msix(struct e1000_adapter
*adapter
)
1973 struct e1000_hw
*hw
= &adapter
->hw
;
1974 struct e1000_ring
*rx_ring
= adapter
->rx_ring
;
1975 struct e1000_ring
*tx_ring
= adapter
->tx_ring
;
1977 u32 ctrl_ext
, ivar
= 0;
1979 adapter
->eiac_mask
= 0;
1981 /* Workaround issue with spurious interrupts on 82574 in MSI-X mode */
1982 if (hw
->mac
.type
== e1000_82574
) {
1983 u32 rfctl
= er32(RFCTL
);
1985 rfctl
|= E1000_RFCTL_ACK_DIS
;
1989 /* Configure Rx vector */
1990 rx_ring
->ims_val
= E1000_IMS_RXQ0
;
1991 adapter
->eiac_mask
|= rx_ring
->ims_val
;
1992 if (rx_ring
->itr_val
)
1993 writel(1000000000 / (rx_ring
->itr_val
* 256),
1994 rx_ring
->itr_register
);
1996 writel(1, rx_ring
->itr_register
);
1997 ivar
= E1000_IVAR_INT_ALLOC_VALID
| vector
;
1999 /* Configure Tx vector */
2000 tx_ring
->ims_val
= E1000_IMS_TXQ0
;
2002 if (tx_ring
->itr_val
)
2003 writel(1000000000 / (tx_ring
->itr_val
* 256),
2004 tx_ring
->itr_register
);
2006 writel(1, tx_ring
->itr_register
);
2007 adapter
->eiac_mask
|= tx_ring
->ims_val
;
2008 ivar
|= ((E1000_IVAR_INT_ALLOC_VALID
| vector
) << 8);
2010 /* set vector for Other Causes, e.g. link changes */
2012 ivar
|= ((E1000_IVAR_INT_ALLOC_VALID
| vector
) << 16);
2013 if (rx_ring
->itr_val
)
2014 writel(1000000000 / (rx_ring
->itr_val
* 256),
2015 hw
->hw_addr
+ E1000_EITR_82574(vector
));
2017 writel(1, hw
->hw_addr
+ E1000_EITR_82574(vector
));
2019 /* Cause Tx interrupts on every write back */
2024 /* enable MSI-X PBA support */
2025 ctrl_ext
= er32(CTRL_EXT
) & ~E1000_CTRL_EXT_IAME
;
2026 ctrl_ext
|= E1000_CTRL_EXT_PBA_CLR
| E1000_CTRL_EXT_EIAME
;
2027 ew32(CTRL_EXT
, ctrl_ext
);
2031 void e1000e_reset_interrupt_capability(struct e1000_adapter
*adapter
)
2033 if (adapter
->msix_entries
) {
2034 pci_disable_msix(adapter
->pdev
);
2035 kfree(adapter
->msix_entries
);
2036 adapter
->msix_entries
= NULL
;
2037 } else if (adapter
->flags
& FLAG_MSI_ENABLED
) {
2038 pci_disable_msi(adapter
->pdev
);
2039 adapter
->flags
&= ~FLAG_MSI_ENABLED
;
2044 * e1000e_set_interrupt_capability - set MSI or MSI-X if supported
2046 * Attempt to configure interrupts using the best available
2047 * capabilities of the hardware and kernel.
2049 void e1000e_set_interrupt_capability(struct e1000_adapter
*adapter
)
2054 switch (adapter
->int_mode
) {
2055 case E1000E_INT_MODE_MSIX
:
2056 if (adapter
->flags
& FLAG_HAS_MSIX
) {
2057 adapter
->num_vectors
= 3; /* RxQ0, TxQ0 and other */
2058 adapter
->msix_entries
= kcalloc(adapter
->num_vectors
,
2062 if (adapter
->msix_entries
) {
2063 struct e1000_adapter
*a
= adapter
;
2065 for (i
= 0; i
< adapter
->num_vectors
; i
++)
2066 adapter
->msix_entries
[i
].entry
= i
;
2068 err
= pci_enable_msix_range(a
->pdev
,
2075 /* MSI-X failed, so fall through and try MSI */
2076 e_err("Failed to initialize MSI-X interrupts. Falling back to MSI interrupts.\n");
2077 e1000e_reset_interrupt_capability(adapter
);
2079 adapter
->int_mode
= E1000E_INT_MODE_MSI
;
2081 case E1000E_INT_MODE_MSI
:
2082 if (!pci_enable_msi(adapter
->pdev
)) {
2083 adapter
->flags
|= FLAG_MSI_ENABLED
;
2085 adapter
->int_mode
= E1000E_INT_MODE_LEGACY
;
2086 e_err("Failed to initialize MSI interrupts. Falling back to legacy interrupts.\n");
2089 case E1000E_INT_MODE_LEGACY
:
2090 /* Don't do anything; this is the system default */
2094 /* store the number of vectors being used */
2095 adapter
->num_vectors
= 1;
2099 * e1000_request_msix - Initialize MSI-X interrupts
2101 * e1000_request_msix allocates MSI-X vectors and requests interrupts from the
2104 static int e1000_request_msix(struct e1000_adapter
*adapter
)
2106 struct net_device
*netdev
= adapter
->netdev
;
2107 int err
= 0, vector
= 0;
2109 if (strlen(netdev
->name
) < (IFNAMSIZ
- 5))
2110 snprintf(adapter
->rx_ring
->name
,
2111 sizeof(adapter
->rx_ring
->name
) - 1,
2112 "%.14s-rx-0", netdev
->name
);
2114 memcpy(adapter
->rx_ring
->name
, netdev
->name
, IFNAMSIZ
);
2115 err
= request_irq(adapter
->msix_entries
[vector
].vector
,
2116 e1000_intr_msix_rx
, 0, adapter
->rx_ring
->name
,
2120 adapter
->rx_ring
->itr_register
= adapter
->hw
.hw_addr
+
2121 E1000_EITR_82574(vector
);
2122 adapter
->rx_ring
->itr_val
= adapter
->itr
;
2125 if (strlen(netdev
->name
) < (IFNAMSIZ
- 5))
2126 snprintf(adapter
->tx_ring
->name
,
2127 sizeof(adapter
->tx_ring
->name
) - 1,
2128 "%.14s-tx-0", netdev
->name
);
2130 memcpy(adapter
->tx_ring
->name
, netdev
->name
, IFNAMSIZ
);
2131 err
= request_irq(adapter
->msix_entries
[vector
].vector
,
2132 e1000_intr_msix_tx
, 0, adapter
->tx_ring
->name
,
2136 adapter
->tx_ring
->itr_register
= adapter
->hw
.hw_addr
+
2137 E1000_EITR_82574(vector
);
2138 adapter
->tx_ring
->itr_val
= adapter
->itr
;
2141 err
= request_irq(adapter
->msix_entries
[vector
].vector
,
2142 e1000_msix_other
, 0, netdev
->name
, netdev
);
2146 e1000_configure_msix(adapter
);
2152 * e1000_request_irq - initialize interrupts
2154 * Attempts to configure interrupts using the best available
2155 * capabilities of the hardware and kernel.
2157 static int e1000_request_irq(struct e1000_adapter
*adapter
)
2159 struct net_device
*netdev
= adapter
->netdev
;
2162 if (adapter
->msix_entries
) {
2163 err
= e1000_request_msix(adapter
);
2166 /* fall back to MSI */
2167 e1000e_reset_interrupt_capability(adapter
);
2168 adapter
->int_mode
= E1000E_INT_MODE_MSI
;
2169 e1000e_set_interrupt_capability(adapter
);
2171 if (adapter
->flags
& FLAG_MSI_ENABLED
) {
2172 err
= request_irq(adapter
->pdev
->irq
, e1000_intr_msi
, 0,
2173 netdev
->name
, netdev
);
2177 /* fall back to legacy interrupt */
2178 e1000e_reset_interrupt_capability(adapter
);
2179 adapter
->int_mode
= E1000E_INT_MODE_LEGACY
;
2182 err
= request_irq(adapter
->pdev
->irq
, e1000_intr
, IRQF_SHARED
,
2183 netdev
->name
, netdev
);
2185 e_err("Unable to allocate interrupt, Error: %d\n", err
);
2190 static void e1000_free_irq(struct e1000_adapter
*adapter
)
2192 struct net_device
*netdev
= adapter
->netdev
;
2194 if (adapter
->msix_entries
) {
2197 free_irq(adapter
->msix_entries
[vector
].vector
, netdev
);
2200 free_irq(adapter
->msix_entries
[vector
].vector
, netdev
);
2203 /* Other Causes interrupt vector */
2204 free_irq(adapter
->msix_entries
[vector
].vector
, netdev
);
2208 free_irq(adapter
->pdev
->irq
, netdev
);
2212 * e1000_irq_disable - Mask off interrupt generation on the NIC
2214 static void e1000_irq_disable(struct e1000_adapter
*adapter
)
2216 struct e1000_hw
*hw
= &adapter
->hw
;
2219 if (adapter
->msix_entries
)
2220 ew32(EIAC_82574
, 0);
2223 if (adapter
->msix_entries
) {
2226 for (i
= 0; i
< adapter
->num_vectors
; i
++)
2227 synchronize_irq(adapter
->msix_entries
[i
].vector
);
2229 synchronize_irq(adapter
->pdev
->irq
);
2234 * e1000_irq_enable - Enable default interrupt generation settings
2236 static void e1000_irq_enable(struct e1000_adapter
*adapter
)
2238 struct e1000_hw
*hw
= &adapter
->hw
;
2240 if (adapter
->msix_entries
) {
2241 ew32(EIAC_82574
, adapter
->eiac_mask
& E1000_EIAC_MASK_82574
);
2242 ew32(IMS
, adapter
->eiac_mask
| E1000_IMS_OTHER
|
2244 } else if (hw
->mac
.type
>= e1000_pch_lpt
) {
2245 ew32(IMS
, IMS_ENABLE_MASK
| E1000_IMS_ECCER
);
2247 ew32(IMS
, IMS_ENABLE_MASK
);
2253 * e1000e_get_hw_control - get control of the h/w from f/w
2254 * @adapter: address of board private structure
2256 * e1000e_get_hw_control sets {CTRL_EXT|SWSM}:DRV_LOAD bit.
2257 * For ASF and Pass Through versions of f/w this means that
2258 * the driver is loaded. For AMT version (only with 82573)
2259 * of the f/w this means that the network i/f is open.
2261 void e1000e_get_hw_control(struct e1000_adapter
*adapter
)
2263 struct e1000_hw
*hw
= &adapter
->hw
;
2267 /* Let firmware know the driver has taken over */
2268 if (adapter
->flags
& FLAG_HAS_SWSM_ON_LOAD
) {
2270 ew32(SWSM
, swsm
| E1000_SWSM_DRV_LOAD
);
2271 } else if (adapter
->flags
& FLAG_HAS_CTRLEXT_ON_LOAD
) {
2272 ctrl_ext
= er32(CTRL_EXT
);
2273 ew32(CTRL_EXT
, ctrl_ext
| E1000_CTRL_EXT_DRV_LOAD
);
2278 * e1000e_release_hw_control - release control of the h/w to f/w
2279 * @adapter: address of board private structure
2281 * e1000e_release_hw_control resets {CTRL_EXT|SWSM}:DRV_LOAD bit.
2282 * For ASF and Pass Through versions of f/w this means that the
2283 * driver is no longer loaded. For AMT version (only with 82573) i
2284 * of the f/w this means that the network i/f is closed.
2287 void e1000e_release_hw_control(struct e1000_adapter
*adapter
)
2289 struct e1000_hw
*hw
= &adapter
->hw
;
2293 /* Let firmware taken over control of h/w */
2294 if (adapter
->flags
& FLAG_HAS_SWSM_ON_LOAD
) {
2296 ew32(SWSM
, swsm
& ~E1000_SWSM_DRV_LOAD
);
2297 } else if (adapter
->flags
& FLAG_HAS_CTRLEXT_ON_LOAD
) {
2298 ctrl_ext
= er32(CTRL_EXT
);
2299 ew32(CTRL_EXT
, ctrl_ext
& ~E1000_CTRL_EXT_DRV_LOAD
);
2304 * e1000_alloc_ring_dma - allocate memory for a ring structure
2306 static int e1000_alloc_ring_dma(struct e1000_adapter
*adapter
,
2307 struct e1000_ring
*ring
)
2309 struct pci_dev
*pdev
= adapter
->pdev
;
2311 ring
->desc
= dma_alloc_coherent(&pdev
->dev
, ring
->size
, &ring
->dma
,
2320 * e1000e_setup_tx_resources - allocate Tx resources (Descriptors)
2321 * @tx_ring: Tx descriptor ring
2323 * Return 0 on success, negative on failure
2325 int e1000e_setup_tx_resources(struct e1000_ring
*tx_ring
)
2327 struct e1000_adapter
*adapter
= tx_ring
->adapter
;
2328 int err
= -ENOMEM
, size
;
2330 size
= sizeof(struct e1000_buffer
) * tx_ring
->count
;
2331 tx_ring
->buffer_info
= vzalloc(size
);
2332 if (!tx_ring
->buffer_info
)
2335 /* round up to nearest 4K */
2336 tx_ring
->size
= tx_ring
->count
* sizeof(struct e1000_tx_desc
);
2337 tx_ring
->size
= ALIGN(tx_ring
->size
, 4096);
2339 err
= e1000_alloc_ring_dma(adapter
, tx_ring
);
2343 tx_ring
->next_to_use
= 0;
2344 tx_ring
->next_to_clean
= 0;
2348 vfree(tx_ring
->buffer_info
);
2349 e_err("Unable to allocate memory for the transmit descriptor ring\n");
2354 * e1000e_setup_rx_resources - allocate Rx resources (Descriptors)
2355 * @rx_ring: Rx descriptor ring
2357 * Returns 0 on success, negative on failure
2359 int e1000e_setup_rx_resources(struct e1000_ring
*rx_ring
)
2361 struct e1000_adapter
*adapter
= rx_ring
->adapter
;
2362 struct e1000_buffer
*buffer_info
;
2363 int i
, size
, desc_len
, err
= -ENOMEM
;
2365 size
= sizeof(struct e1000_buffer
) * rx_ring
->count
;
2366 rx_ring
->buffer_info
= vzalloc(size
);
2367 if (!rx_ring
->buffer_info
)
2370 for (i
= 0; i
< rx_ring
->count
; i
++) {
2371 buffer_info
= &rx_ring
->buffer_info
[i
];
2372 buffer_info
->ps_pages
= kcalloc(PS_PAGE_BUFFERS
,
2373 sizeof(struct e1000_ps_page
),
2375 if (!buffer_info
->ps_pages
)
2379 desc_len
= sizeof(union e1000_rx_desc_packet_split
);
2381 /* Round up to nearest 4K */
2382 rx_ring
->size
= rx_ring
->count
* desc_len
;
2383 rx_ring
->size
= ALIGN(rx_ring
->size
, 4096);
2385 err
= e1000_alloc_ring_dma(adapter
, rx_ring
);
2389 rx_ring
->next_to_clean
= 0;
2390 rx_ring
->next_to_use
= 0;
2391 rx_ring
->rx_skb_top
= NULL
;
2396 for (i
= 0; i
< rx_ring
->count
; i
++) {
2397 buffer_info
= &rx_ring
->buffer_info
[i
];
2398 kfree(buffer_info
->ps_pages
);
2401 vfree(rx_ring
->buffer_info
);
2402 e_err("Unable to allocate memory for the receive descriptor ring\n");
2407 * e1000_clean_tx_ring - Free Tx Buffers
2408 * @tx_ring: Tx descriptor ring
2410 static void e1000_clean_tx_ring(struct e1000_ring
*tx_ring
)
2412 struct e1000_adapter
*adapter
= tx_ring
->adapter
;
2413 struct e1000_buffer
*buffer_info
;
2417 for (i
= 0; i
< tx_ring
->count
; i
++) {
2418 buffer_info
= &tx_ring
->buffer_info
[i
];
2419 e1000_put_txbuf(tx_ring
, buffer_info
, false);
2422 netdev_reset_queue(adapter
->netdev
);
2423 size
= sizeof(struct e1000_buffer
) * tx_ring
->count
;
2424 memset(tx_ring
->buffer_info
, 0, size
);
2426 memset(tx_ring
->desc
, 0, tx_ring
->size
);
2428 tx_ring
->next_to_use
= 0;
2429 tx_ring
->next_to_clean
= 0;
2433 * e1000e_free_tx_resources - Free Tx Resources per Queue
2434 * @tx_ring: Tx descriptor ring
2436 * Free all transmit software resources
2438 void e1000e_free_tx_resources(struct e1000_ring
*tx_ring
)
2440 struct e1000_adapter
*adapter
= tx_ring
->adapter
;
2441 struct pci_dev
*pdev
= adapter
->pdev
;
2443 e1000_clean_tx_ring(tx_ring
);
2445 vfree(tx_ring
->buffer_info
);
2446 tx_ring
->buffer_info
= NULL
;
2448 dma_free_coherent(&pdev
->dev
, tx_ring
->size
, tx_ring
->desc
,
2450 tx_ring
->desc
= NULL
;
2454 * e1000e_free_rx_resources - Free Rx Resources
2455 * @rx_ring: Rx descriptor ring
2457 * Free all receive software resources
2459 void e1000e_free_rx_resources(struct e1000_ring
*rx_ring
)
2461 struct e1000_adapter
*adapter
= rx_ring
->adapter
;
2462 struct pci_dev
*pdev
= adapter
->pdev
;
2465 e1000_clean_rx_ring(rx_ring
);
2467 for (i
= 0; i
< rx_ring
->count
; i
++)
2468 kfree(rx_ring
->buffer_info
[i
].ps_pages
);
2470 vfree(rx_ring
->buffer_info
);
2471 rx_ring
->buffer_info
= NULL
;
2473 dma_free_coherent(&pdev
->dev
, rx_ring
->size
, rx_ring
->desc
,
2475 rx_ring
->desc
= NULL
;
2479 * e1000_update_itr - update the dynamic ITR value based on statistics
2480 * @adapter: pointer to adapter
2481 * @itr_setting: current adapter->itr
2482 * @packets: the number of packets during this measurement interval
2483 * @bytes: the number of bytes during this measurement interval
2485 * Stores a new ITR value based on packets and byte
2486 * counts during the last interrupt. The advantage of per interrupt
2487 * computation is faster updates and more accurate ITR for the current
2488 * traffic pattern. Constants in this function were computed
2489 * based on theoretical maximum wire speed and thresholds were set based
2490 * on testing data as well as attempting to minimize response time
2491 * while increasing bulk throughput. This functionality is controlled
2492 * by the InterruptThrottleRate module parameter.
2494 static unsigned int e1000_update_itr(u16 itr_setting
, int packets
, int bytes
)
2496 unsigned int retval
= itr_setting
;
2501 switch (itr_setting
) {
2502 case lowest_latency
:
2503 /* handle TSO and jumbo frames */
2504 if (bytes
/ packets
> 8000)
2505 retval
= bulk_latency
;
2506 else if ((packets
< 5) && (bytes
> 512))
2507 retval
= low_latency
;
2509 case low_latency
: /* 50 usec aka 20000 ints/s */
2510 if (bytes
> 10000) {
2511 /* this if handles the TSO accounting */
2512 if (bytes
/ packets
> 8000)
2513 retval
= bulk_latency
;
2514 else if ((packets
< 10) || ((bytes
/ packets
) > 1200))
2515 retval
= bulk_latency
;
2516 else if ((packets
> 35))
2517 retval
= lowest_latency
;
2518 } else if (bytes
/ packets
> 2000) {
2519 retval
= bulk_latency
;
2520 } else if (packets
<= 2 && bytes
< 512) {
2521 retval
= lowest_latency
;
2524 case bulk_latency
: /* 250 usec aka 4000 ints/s */
2525 if (bytes
> 25000) {
2527 retval
= low_latency
;
2528 } else if (bytes
< 6000) {
2529 retval
= low_latency
;
2537 static void e1000_set_itr(struct e1000_adapter
*adapter
)
2540 u32 new_itr
= adapter
->itr
;
2542 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2543 if (adapter
->link_speed
!= SPEED_1000
) {
2549 if (adapter
->flags2
& FLAG2_DISABLE_AIM
) {
2554 adapter
->tx_itr
= e1000_update_itr(adapter
->tx_itr
,
2555 adapter
->total_tx_packets
,
2556 adapter
->total_tx_bytes
);
2557 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2558 if (adapter
->itr_setting
== 3 && adapter
->tx_itr
== lowest_latency
)
2559 adapter
->tx_itr
= low_latency
;
2561 adapter
->rx_itr
= e1000_update_itr(adapter
->rx_itr
,
2562 adapter
->total_rx_packets
,
2563 adapter
->total_rx_bytes
);
2564 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2565 if (adapter
->itr_setting
== 3 && adapter
->rx_itr
== lowest_latency
)
2566 adapter
->rx_itr
= low_latency
;
2568 current_itr
= max(adapter
->rx_itr
, adapter
->tx_itr
);
2570 /* counts and packets in update_itr are dependent on these numbers */
2571 switch (current_itr
) {
2572 case lowest_latency
:
2576 new_itr
= 20000; /* aka hwitr = ~200 */
2586 if (new_itr
!= adapter
->itr
) {
2587 /* this attempts to bias the interrupt rate towards Bulk
2588 * by adding intermediate steps when interrupt rate is
2591 new_itr
= new_itr
> adapter
->itr
?
2592 min(adapter
->itr
+ (new_itr
>> 2), new_itr
) : new_itr
;
2593 adapter
->itr
= new_itr
;
2594 adapter
->rx_ring
->itr_val
= new_itr
;
2595 if (adapter
->msix_entries
)
2596 adapter
->rx_ring
->set_itr
= 1;
2598 e1000e_write_itr(adapter
, new_itr
);
2603 * e1000e_write_itr - write the ITR value to the appropriate registers
2604 * @adapter: address of board private structure
2605 * @itr: new ITR value to program
2607 * e1000e_write_itr determines if the adapter is in MSI-X mode
2608 * and, if so, writes the EITR registers with the ITR value.
2609 * Otherwise, it writes the ITR value into the ITR register.
2611 void e1000e_write_itr(struct e1000_adapter
*adapter
, u32 itr
)
2613 struct e1000_hw
*hw
= &adapter
->hw
;
2614 u32 new_itr
= itr
? 1000000000 / (itr
* 256) : 0;
2616 if (adapter
->msix_entries
) {
2619 for (vector
= 0; vector
< adapter
->num_vectors
; vector
++)
2620 writel(new_itr
, hw
->hw_addr
+ E1000_EITR_82574(vector
));
2627 * e1000_alloc_queues - Allocate memory for all rings
2628 * @adapter: board private structure to initialize
2630 static int e1000_alloc_queues(struct e1000_adapter
*adapter
)
2632 int size
= sizeof(struct e1000_ring
);
2634 adapter
->tx_ring
= kzalloc(size
, GFP_KERNEL
);
2635 if (!adapter
->tx_ring
)
2637 adapter
->tx_ring
->count
= adapter
->tx_ring_count
;
2638 adapter
->tx_ring
->adapter
= adapter
;
2640 adapter
->rx_ring
= kzalloc(size
, GFP_KERNEL
);
2641 if (!adapter
->rx_ring
)
2643 adapter
->rx_ring
->count
= adapter
->rx_ring_count
;
2644 adapter
->rx_ring
->adapter
= adapter
;
2648 e_err("Unable to allocate memory for queues\n");
2649 kfree(adapter
->rx_ring
);
2650 kfree(adapter
->tx_ring
);
2655 * e1000e_poll - NAPI Rx polling callback
2656 * @napi: struct associated with this polling callback
2657 * @budget: number of packets driver is allowed to process this poll
2659 static int e1000e_poll(struct napi_struct
*napi
, int budget
)
2661 struct e1000_adapter
*adapter
= container_of(napi
, struct e1000_adapter
,
2663 struct e1000_hw
*hw
= &adapter
->hw
;
2664 struct net_device
*poll_dev
= adapter
->netdev
;
2665 int tx_cleaned
= 1, work_done
= 0;
2667 adapter
= netdev_priv(poll_dev
);
2669 if (!adapter
->msix_entries
||
2670 (adapter
->rx_ring
->ims_val
& adapter
->tx_ring
->ims_val
))
2671 tx_cleaned
= e1000_clean_tx_irq(adapter
->tx_ring
);
2673 adapter
->clean_rx(adapter
->rx_ring
, &work_done
, budget
);
2675 if (!tx_cleaned
|| work_done
== budget
)
2678 /* Exit the polling mode, but don't re-enable interrupts if stack might
2679 * poll us due to busy-polling
2681 if (likely(napi_complete_done(napi
, work_done
))) {
2682 if (adapter
->itr_setting
& 3)
2683 e1000_set_itr(adapter
);
2684 if (!test_bit(__E1000_DOWN
, &adapter
->state
)) {
2685 if (adapter
->msix_entries
)
2686 ew32(IMS
, adapter
->rx_ring
->ims_val
);
2688 e1000_irq_enable(adapter
);
2695 static int e1000_vlan_rx_add_vid(struct net_device
*netdev
,
2696 __always_unused __be16 proto
, u16 vid
)
2698 struct e1000_adapter
*adapter
= netdev_priv(netdev
);
2699 struct e1000_hw
*hw
= &adapter
->hw
;
2702 /* don't update vlan cookie if already programmed */
2703 if ((adapter
->hw
.mng_cookie
.status
&
2704 E1000_MNG_DHCP_COOKIE_STATUS_VLAN
) &&
2705 (vid
== adapter
->mng_vlan_id
))
2708 /* add VID to filter table */
2709 if (adapter
->flags
& FLAG_HAS_HW_VLAN_FILTER
) {
2710 index
= (vid
>> 5) & 0x7F;
2711 vfta
= E1000_READ_REG_ARRAY(hw
, E1000_VFTA
, index
);
2712 vfta
|= BIT((vid
& 0x1F));
2713 hw
->mac
.ops
.write_vfta(hw
, index
, vfta
);
2716 set_bit(vid
, adapter
->active_vlans
);
2721 static int e1000_vlan_rx_kill_vid(struct net_device
*netdev
,
2722 __always_unused __be16 proto
, u16 vid
)
2724 struct e1000_adapter
*adapter
= netdev_priv(netdev
);
2725 struct e1000_hw
*hw
= &adapter
->hw
;
2728 if ((adapter
->hw
.mng_cookie
.status
&
2729 E1000_MNG_DHCP_COOKIE_STATUS_VLAN
) &&
2730 (vid
== adapter
->mng_vlan_id
)) {
2731 /* release control to f/w */
2732 e1000e_release_hw_control(adapter
);
2736 /* remove VID from filter table */
2737 if (adapter
->flags
& FLAG_HAS_HW_VLAN_FILTER
) {
2738 index
= (vid
>> 5) & 0x7F;
2739 vfta
= E1000_READ_REG_ARRAY(hw
, E1000_VFTA
, index
);
2740 vfta
&= ~BIT((vid
& 0x1F));
2741 hw
->mac
.ops
.write_vfta(hw
, index
, vfta
);
2744 clear_bit(vid
, adapter
->active_vlans
);
2750 * e1000e_vlan_filter_disable - helper to disable hw VLAN filtering
2751 * @adapter: board private structure to initialize
2753 static void e1000e_vlan_filter_disable(struct e1000_adapter
*adapter
)
2755 struct net_device
*netdev
= adapter
->netdev
;
2756 struct e1000_hw
*hw
= &adapter
->hw
;
2759 if (adapter
->flags
& FLAG_HAS_HW_VLAN_FILTER
) {
2760 /* disable VLAN receive filtering */
2762 rctl
&= ~(E1000_RCTL_VFE
| E1000_RCTL_CFIEN
);
2765 if (adapter
->mng_vlan_id
!= (u16
)E1000_MNG_VLAN_NONE
) {
2766 e1000_vlan_rx_kill_vid(netdev
, htons(ETH_P_8021Q
),
2767 adapter
->mng_vlan_id
);
2768 adapter
->mng_vlan_id
= E1000_MNG_VLAN_NONE
;
2774 * e1000e_vlan_filter_enable - helper to enable HW VLAN filtering
2775 * @adapter: board private structure to initialize
2777 static void e1000e_vlan_filter_enable(struct e1000_adapter
*adapter
)
2779 struct e1000_hw
*hw
= &adapter
->hw
;
2782 if (adapter
->flags
& FLAG_HAS_HW_VLAN_FILTER
) {
2783 /* enable VLAN receive filtering */
2785 rctl
|= E1000_RCTL_VFE
;
2786 rctl
&= ~E1000_RCTL_CFIEN
;
2792 * e1000e_vlan_strip_disable - helper to disable HW VLAN stripping
2793 * @adapter: board private structure to initialize
2795 static void e1000e_vlan_strip_disable(struct e1000_adapter
*adapter
)
2797 struct e1000_hw
*hw
= &adapter
->hw
;
2800 /* disable VLAN tag insert/strip */
2802 ctrl
&= ~E1000_CTRL_VME
;
2807 * e1000e_vlan_strip_enable - helper to enable HW VLAN stripping
2808 * @adapter: board private structure to initialize
2810 static void e1000e_vlan_strip_enable(struct e1000_adapter
*adapter
)
2812 struct e1000_hw
*hw
= &adapter
->hw
;
2815 /* enable VLAN tag insert/strip */
2817 ctrl
|= E1000_CTRL_VME
;
2821 static void e1000_update_mng_vlan(struct e1000_adapter
*adapter
)
2823 struct net_device
*netdev
= adapter
->netdev
;
2824 u16 vid
= adapter
->hw
.mng_cookie
.vlan_id
;
2825 u16 old_vid
= adapter
->mng_vlan_id
;
2827 if (adapter
->hw
.mng_cookie
.status
& E1000_MNG_DHCP_COOKIE_STATUS_VLAN
) {
2828 e1000_vlan_rx_add_vid(netdev
, htons(ETH_P_8021Q
), vid
);
2829 adapter
->mng_vlan_id
= vid
;
2832 if ((old_vid
!= (u16
)E1000_MNG_VLAN_NONE
) && (vid
!= old_vid
))
2833 e1000_vlan_rx_kill_vid(netdev
, htons(ETH_P_8021Q
), old_vid
);
2836 static void e1000_restore_vlan(struct e1000_adapter
*adapter
)
2840 e1000_vlan_rx_add_vid(adapter
->netdev
, htons(ETH_P_8021Q
), 0);
2842 for_each_set_bit(vid
, adapter
->active_vlans
, VLAN_N_VID
)
2843 e1000_vlan_rx_add_vid(adapter
->netdev
, htons(ETH_P_8021Q
), vid
);
2846 static void e1000_init_manageability_pt(struct e1000_adapter
*adapter
)
2848 struct e1000_hw
*hw
= &adapter
->hw
;
2849 u32 manc
, manc2h
, mdef
, i
, j
;
2851 if (!(adapter
->flags
& FLAG_MNG_PT_ENABLED
))
2856 /* enable receiving management packets to the host. this will probably
2857 * generate destination unreachable messages from the host OS, but
2858 * the packets will be handled on SMBUS
2860 manc
|= E1000_MANC_EN_MNG2HOST
;
2861 manc2h
= er32(MANC2H
);
2863 switch (hw
->mac
.type
) {
2865 manc2h
|= (E1000_MANC2H_PORT_623
| E1000_MANC2H_PORT_664
);
2869 /* Check if IPMI pass-through decision filter already exists;
2872 for (i
= 0, j
= 0; i
< 8; i
++) {
2873 mdef
= er32(MDEF(i
));
2875 /* Ignore filters with anything other than IPMI ports */
2876 if (mdef
& ~(E1000_MDEF_PORT_623
| E1000_MDEF_PORT_664
))
2879 /* Enable this decision filter in MANC2H */
2886 if (j
== (E1000_MDEF_PORT_623
| E1000_MDEF_PORT_664
))
2889 /* Create new decision filter in an empty filter */
2890 for (i
= 0, j
= 0; i
< 8; i
++)
2891 if (er32(MDEF(i
)) == 0) {
2892 ew32(MDEF(i
), (E1000_MDEF_PORT_623
|
2893 E1000_MDEF_PORT_664
));
2900 e_warn("Unable to create IPMI pass-through filter\n");
2904 ew32(MANC2H
, manc2h
);
2909 * e1000_configure_tx - Configure Transmit Unit after Reset
2910 * @adapter: board private structure
2912 * Configure the Tx unit of the MAC after a reset.
2914 static void e1000_configure_tx(struct e1000_adapter
*adapter
)
2916 struct e1000_hw
*hw
= &adapter
->hw
;
2917 struct e1000_ring
*tx_ring
= adapter
->tx_ring
;
2919 u32 tdlen
, tctl
, tarc
;
2921 /* Setup the HW Tx Head and Tail descriptor pointers */
2922 tdba
= tx_ring
->dma
;
2923 tdlen
= tx_ring
->count
* sizeof(struct e1000_tx_desc
);
2924 ew32(TDBAL(0), (tdba
& DMA_BIT_MASK(32)));
2925 ew32(TDBAH(0), (tdba
>> 32));
2926 ew32(TDLEN(0), tdlen
);
2929 tx_ring
->head
= adapter
->hw
.hw_addr
+ E1000_TDH(0);
2930 tx_ring
->tail
= adapter
->hw
.hw_addr
+ E1000_TDT(0);
2932 writel(0, tx_ring
->head
);
2933 if (adapter
->flags2
& FLAG2_PCIM2PCI_ARBITER_WA
)
2934 e1000e_update_tdt_wa(tx_ring
, 0);
2936 writel(0, tx_ring
->tail
);
2938 /* Set the Tx Interrupt Delay register */
2939 ew32(TIDV
, adapter
->tx_int_delay
);
2940 /* Tx irq moderation */
2941 ew32(TADV
, adapter
->tx_abs_int_delay
);
2943 if (adapter
->flags2
& FLAG2_DMA_BURST
) {
2944 u32 txdctl
= er32(TXDCTL(0));
2946 txdctl
&= ~(E1000_TXDCTL_PTHRESH
| E1000_TXDCTL_HTHRESH
|
2947 E1000_TXDCTL_WTHRESH
);
2948 /* set up some performance related parameters to encourage the
2949 * hardware to use the bus more efficiently in bursts, depends
2950 * on the tx_int_delay to be enabled,
2951 * wthresh = 1 ==> burst write is disabled to avoid Tx stalls
2952 * hthresh = 1 ==> prefetch when one or more available
2953 * pthresh = 0x1f ==> prefetch if internal cache 31 or less
2954 * BEWARE: this seems to work but should be considered first if
2955 * there are Tx hangs or other Tx related bugs
2957 txdctl
|= E1000_TXDCTL_DMA_BURST_ENABLE
;
2958 ew32(TXDCTL(0), txdctl
);
2960 /* erratum work around: set txdctl the same for both queues */
2961 ew32(TXDCTL(1), er32(TXDCTL(0)));
2963 /* Program the Transmit Control Register */
2965 tctl
&= ~E1000_TCTL_CT
;
2966 tctl
|= E1000_TCTL_PSP
| E1000_TCTL_RTLC
|
2967 (E1000_COLLISION_THRESHOLD
<< E1000_CT_SHIFT
);
2969 if (adapter
->flags
& FLAG_TARC_SPEED_MODE_BIT
) {
2970 tarc
= er32(TARC(0));
2971 /* set the speed mode bit, we'll clear it if we're not at
2972 * gigabit link later
2974 #define SPEED_MODE_BIT BIT(21)
2975 tarc
|= SPEED_MODE_BIT
;
2976 ew32(TARC(0), tarc
);
2979 /* errata: program both queues to unweighted RR */
2980 if (adapter
->flags
& FLAG_TARC_SET_BIT_ZERO
) {
2981 tarc
= er32(TARC(0));
2983 ew32(TARC(0), tarc
);
2984 tarc
= er32(TARC(1));
2986 ew32(TARC(1), tarc
);
2989 /* Setup Transmit Descriptor Settings for eop descriptor */
2990 adapter
->txd_cmd
= E1000_TXD_CMD_EOP
| E1000_TXD_CMD_IFCS
;
2992 /* only set IDE if we are delaying interrupts using the timers */
2993 if (adapter
->tx_int_delay
)
2994 adapter
->txd_cmd
|= E1000_TXD_CMD_IDE
;
2996 /* enable Report Status bit */
2997 adapter
->txd_cmd
|= E1000_TXD_CMD_RS
;
3001 hw
->mac
.ops
.config_collision_dist(hw
);
3003 /* SPT and KBL Si errata workaround to avoid data corruption */
3004 if (hw
->mac
.type
== e1000_pch_spt
) {
3007 reg_val
= er32(IOSFPC
);
3008 reg_val
|= E1000_RCTL_RDMTS_HEX
;
3009 ew32(IOSFPC
, reg_val
);
3011 reg_val
= er32(TARC(0));
3012 /* SPT and KBL Si errata workaround to avoid Tx hang.
3013 * Dropping the number of outstanding requests from
3014 * 3 to 2 in order to avoid a buffer overrun.
3016 reg_val
&= ~E1000_TARC0_CB_MULTIQ_3_REQ
;
3017 reg_val
|= E1000_TARC0_CB_MULTIQ_2_REQ
;
3018 ew32(TARC(0), reg_val
);
3023 * e1000_setup_rctl - configure the receive control registers
3024 * @adapter: Board private structure
3026 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
3027 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
3028 static void e1000_setup_rctl(struct e1000_adapter
*adapter
)
3030 struct e1000_hw
*hw
= &adapter
->hw
;
3034 /* Workaround Si errata on PCHx - configure jumbo frame flow.
3035 * If jumbo frames not set, program related MAC/PHY registers
3038 if (hw
->mac
.type
>= e1000_pch2lan
) {
3041 if (adapter
->netdev
->mtu
> ETH_DATA_LEN
)
3042 ret_val
= e1000_lv_jumbo_workaround_ich8lan(hw
, true);
3044 ret_val
= e1000_lv_jumbo_workaround_ich8lan(hw
, false);
3047 e_dbg("failed to enable|disable jumbo frame workaround mode\n");
3050 /* Program MC offset vector base */
3052 rctl
&= ~(3 << E1000_RCTL_MO_SHIFT
);
3053 rctl
|= E1000_RCTL_EN
| E1000_RCTL_BAM
|
3054 E1000_RCTL_LBM_NO
| E1000_RCTL_RDMTS_HALF
|
3055 (adapter
->hw
.mac
.mc_filter_type
<< E1000_RCTL_MO_SHIFT
);
3057 /* Do not Store bad packets */
3058 rctl
&= ~E1000_RCTL_SBP
;
3060 /* Enable Long Packet receive */
3061 if (adapter
->netdev
->mtu
<= ETH_DATA_LEN
)
3062 rctl
&= ~E1000_RCTL_LPE
;
3064 rctl
|= E1000_RCTL_LPE
;
3066 /* Some systems expect that the CRC is included in SMBUS traffic. The
3067 * hardware strips the CRC before sending to both SMBUS (BMC) and to
3068 * host memory when this is enabled
3070 if (adapter
->flags2
& FLAG2_CRC_STRIPPING
)
3071 rctl
|= E1000_RCTL_SECRC
;
3073 /* Workaround Si errata on 82577 PHY - configure IPG for jumbos */
3074 if ((hw
->phy
.type
== e1000_phy_82577
) && (rctl
& E1000_RCTL_LPE
)) {
3077 e1e_rphy(hw
, PHY_REG(770, 26), &phy_data
);
3080 e1e_wphy(hw
, PHY_REG(770, 26), phy_data
);
3082 e1e_rphy(hw
, 22, &phy_data
);
3084 phy_data
|= BIT(14);
3085 e1e_wphy(hw
, 0x10, 0x2823);
3086 e1e_wphy(hw
, 0x11, 0x0003);
3087 e1e_wphy(hw
, 22, phy_data
);
3090 /* Setup buffer sizes */
3091 rctl
&= ~E1000_RCTL_SZ_4096
;
3092 rctl
|= E1000_RCTL_BSEX
;
3093 switch (adapter
->rx_buffer_len
) {
3096 rctl
|= E1000_RCTL_SZ_2048
;
3097 rctl
&= ~E1000_RCTL_BSEX
;
3100 rctl
|= E1000_RCTL_SZ_4096
;
3103 rctl
|= E1000_RCTL_SZ_8192
;
3106 rctl
|= E1000_RCTL_SZ_16384
;
3110 /* Enable Extended Status in all Receive Descriptors */
3111 rfctl
= er32(RFCTL
);
3112 rfctl
|= E1000_RFCTL_EXTEN
;
3115 /* 82571 and greater support packet-split where the protocol
3116 * header is placed in skb->data and the packet data is
3117 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
3118 * In the case of a non-split, skb->data is linearly filled,
3119 * followed by the page buffers. Therefore, skb->data is
3120 * sized to hold the largest protocol header.
3122 * allocations using alloc_page take too long for regular MTU
3123 * so only enable packet split for jumbo frames
3125 * Using pages when the page size is greater than 16k wastes
3126 * a lot of memory, since we allocate 3 pages at all times
3129 pages
= PAGE_USE_COUNT(adapter
->netdev
->mtu
);
3130 if ((pages
<= 3) && (PAGE_SIZE
<= 16384) && (rctl
& E1000_RCTL_LPE
))
3131 adapter
->rx_ps_pages
= pages
;
3133 adapter
->rx_ps_pages
= 0;
3135 if (adapter
->rx_ps_pages
) {
3138 /* Enable Packet split descriptors */
3139 rctl
|= E1000_RCTL_DTYP_PS
;
3141 psrctl
|= adapter
->rx_ps_bsize0
>> E1000_PSRCTL_BSIZE0_SHIFT
;
3143 switch (adapter
->rx_ps_pages
) {
3145 psrctl
|= PAGE_SIZE
<< E1000_PSRCTL_BSIZE3_SHIFT
;
3148 psrctl
|= PAGE_SIZE
<< E1000_PSRCTL_BSIZE2_SHIFT
;
3151 psrctl
|= PAGE_SIZE
>> E1000_PSRCTL_BSIZE1_SHIFT
;
3155 ew32(PSRCTL
, psrctl
);
3158 /* This is useful for sniffing bad packets. */
3159 if (adapter
->netdev
->features
& NETIF_F_RXALL
) {
3160 /* UPE and MPE will be handled by normal PROMISC logic
3161 * in e1000e_set_rx_mode
3163 rctl
|= (E1000_RCTL_SBP
| /* Receive bad packets */
3164 E1000_RCTL_BAM
| /* RX All Bcast Pkts */
3165 E1000_RCTL_PMCF
); /* RX All MAC Ctrl Pkts */
3167 rctl
&= ~(E1000_RCTL_VFE
| /* Disable VLAN filter */
3168 E1000_RCTL_DPF
| /* Allow filtered pause */
3169 E1000_RCTL_CFIEN
); /* Dis VLAN CFIEN Filter */
3170 /* Do not mess with E1000_CTRL_VME, it affects transmit as well,
3171 * and that breaks VLANs.
3176 /* just started the receive unit, no need to restart */
3177 adapter
->flags
&= ~FLAG_RESTART_NOW
;
3181 * e1000_configure_rx - Configure Receive Unit after Reset
3182 * @adapter: board private structure
3184 * Configure the Rx unit of the MAC after a reset.
3186 static void e1000_configure_rx(struct e1000_adapter
*adapter
)
3188 struct e1000_hw
*hw
= &adapter
->hw
;
3189 struct e1000_ring
*rx_ring
= adapter
->rx_ring
;
3191 u32 rdlen
, rctl
, rxcsum
, ctrl_ext
;
3193 if (adapter
->rx_ps_pages
) {
3194 /* this is a 32 byte descriptor */
3195 rdlen
= rx_ring
->count
*
3196 sizeof(union e1000_rx_desc_packet_split
);
3197 adapter
->clean_rx
= e1000_clean_rx_irq_ps
;
3198 adapter
->alloc_rx_buf
= e1000_alloc_rx_buffers_ps
;
3199 } else if (adapter
->netdev
->mtu
> ETH_FRAME_LEN
+ ETH_FCS_LEN
) {
3200 rdlen
= rx_ring
->count
* sizeof(union e1000_rx_desc_extended
);
3201 adapter
->clean_rx
= e1000_clean_jumbo_rx_irq
;
3202 adapter
->alloc_rx_buf
= e1000_alloc_jumbo_rx_buffers
;
3204 rdlen
= rx_ring
->count
* sizeof(union e1000_rx_desc_extended
);
3205 adapter
->clean_rx
= e1000_clean_rx_irq
;
3206 adapter
->alloc_rx_buf
= e1000_alloc_rx_buffers
;
3209 /* disable receives while setting up the descriptors */
3211 if (!(adapter
->flags2
& FLAG2_NO_DISABLE_RX
))
3212 ew32(RCTL
, rctl
& ~E1000_RCTL_EN
);
3214 usleep_range(10000, 11000);
3216 if (adapter
->flags2
& FLAG2_DMA_BURST
) {
3217 /* set the writeback threshold (only takes effect if the RDTR
3218 * is set). set GRAN=1 and write back up to 0x4 worth, and
3219 * enable prefetching of 0x20 Rx descriptors
3225 ew32(RXDCTL(0), E1000_RXDCTL_DMA_BURST_ENABLE
);
3226 ew32(RXDCTL(1), E1000_RXDCTL_DMA_BURST_ENABLE
);
3229 /* set the Receive Delay Timer Register */
3230 ew32(RDTR
, adapter
->rx_int_delay
);
3232 /* irq moderation */
3233 ew32(RADV
, adapter
->rx_abs_int_delay
);
3234 if ((adapter
->itr_setting
!= 0) && (adapter
->itr
!= 0))
3235 e1000e_write_itr(adapter
, adapter
->itr
);
3237 ctrl_ext
= er32(CTRL_EXT
);
3238 /* Auto-Mask interrupts upon ICR access */
3239 ctrl_ext
|= E1000_CTRL_EXT_IAME
;
3240 ew32(IAM
, 0xffffffff);
3241 ew32(CTRL_EXT
, ctrl_ext
);
3244 /* Setup the HW Rx Head and Tail Descriptor Pointers and
3245 * the Base and Length of the Rx Descriptor Ring
3247 rdba
= rx_ring
->dma
;
3248 ew32(RDBAL(0), (rdba
& DMA_BIT_MASK(32)));
3249 ew32(RDBAH(0), (rdba
>> 32));
3250 ew32(RDLEN(0), rdlen
);
3253 rx_ring
->head
= adapter
->hw
.hw_addr
+ E1000_RDH(0);
3254 rx_ring
->tail
= adapter
->hw
.hw_addr
+ E1000_RDT(0);
3256 writel(0, rx_ring
->head
);
3257 if (adapter
->flags2
& FLAG2_PCIM2PCI_ARBITER_WA
)
3258 e1000e_update_rdt_wa(rx_ring
, 0);
3260 writel(0, rx_ring
->tail
);
3262 /* Enable Receive Checksum Offload for TCP and UDP */
3263 rxcsum
= er32(RXCSUM
);
3264 if (adapter
->netdev
->features
& NETIF_F_RXCSUM
)
3265 rxcsum
|= E1000_RXCSUM_TUOFL
;
3267 rxcsum
&= ~E1000_RXCSUM_TUOFL
;
3268 ew32(RXCSUM
, rxcsum
);
3270 /* With jumbo frames, excessive C-state transition latencies result
3271 * in dropped transactions.
3273 if (adapter
->netdev
->mtu
> ETH_DATA_LEN
) {
3275 ((er32(PBA
) & E1000_PBA_RXA_MASK
) * 1024 -
3276 adapter
->max_frame_size
) * 8 / 1000;
3278 if (adapter
->flags
& FLAG_IS_ICH
) {
3279 u32 rxdctl
= er32(RXDCTL(0));
3281 ew32(RXDCTL(0), rxdctl
| 0x3 | BIT(8));
3284 dev_info(&adapter
->pdev
->dev
,
3285 "Some CPU C-states have been disabled in order to enable jumbo frames\n");
3286 pm_qos_update_request(&adapter
->pm_qos_req
, lat
);
3288 pm_qos_update_request(&adapter
->pm_qos_req
,
3289 PM_QOS_DEFAULT_VALUE
);
3292 /* Enable Receives */
3297 * e1000e_write_mc_addr_list - write multicast addresses to MTA
3298 * @netdev: network interface device structure
3300 * Writes multicast address list to the MTA hash table.
3301 * Returns: -ENOMEM on failure
3302 * 0 on no addresses written
3303 * X on writing X addresses to MTA
3305 static int e1000e_write_mc_addr_list(struct net_device
*netdev
)
3307 struct e1000_adapter
*adapter
= netdev_priv(netdev
);
3308 struct e1000_hw
*hw
= &adapter
->hw
;
3309 struct netdev_hw_addr
*ha
;
3313 if (netdev_mc_empty(netdev
)) {
3314 /* nothing to program, so clear mc list */
3315 hw
->mac
.ops
.update_mc_addr_list(hw
, NULL
, 0);
3319 mta_list
= kcalloc(netdev_mc_count(netdev
), ETH_ALEN
, GFP_ATOMIC
);
3323 /* update_mc_addr_list expects a packed array of only addresses. */
3325 netdev_for_each_mc_addr(ha
, netdev
)
3326 memcpy(mta_list
+ (i
++ * ETH_ALEN
), ha
->addr
, ETH_ALEN
);
3328 hw
->mac
.ops
.update_mc_addr_list(hw
, mta_list
, i
);
3331 return netdev_mc_count(netdev
);
3335 * e1000e_write_uc_addr_list - write unicast addresses to RAR table
3336 * @netdev: network interface device structure
3338 * Writes unicast address list to the RAR table.
3339 * Returns: -ENOMEM on failure/insufficient address space
3340 * 0 on no addresses written
3341 * X on writing X addresses to the RAR table
3343 static int e1000e_write_uc_addr_list(struct net_device
*netdev
)
3345 struct e1000_adapter
*adapter
= netdev_priv(netdev
);
3346 struct e1000_hw
*hw
= &adapter
->hw
;
3347 unsigned int rar_entries
;
3350 rar_entries
= hw
->mac
.ops
.rar_get_count(hw
);
3352 /* save a rar entry for our hardware address */
3355 /* save a rar entry for the LAA workaround */
3356 if (adapter
->flags
& FLAG_RESET_OVERWRITES_LAA
)
3359 /* return ENOMEM indicating insufficient memory for addresses */
3360 if (netdev_uc_count(netdev
) > rar_entries
)
3363 if (!netdev_uc_empty(netdev
) && rar_entries
) {
3364 struct netdev_hw_addr
*ha
;
3366 /* write the addresses in reverse order to avoid write
3369 netdev_for_each_uc_addr(ha
, netdev
) {
3374 ret_val
= hw
->mac
.ops
.rar_set(hw
, ha
->addr
, rar_entries
--);
3381 /* zero out the remaining RAR entries not used above */
3382 for (; rar_entries
> 0; rar_entries
--) {
3383 ew32(RAH(rar_entries
), 0);
3384 ew32(RAL(rar_entries
), 0);
3392 * e1000e_set_rx_mode - secondary unicast, Multicast and Promiscuous mode set
3393 * @netdev: network interface device structure
3395 * The ndo_set_rx_mode entry point is called whenever the unicast or multicast
3396 * address list or the network interface flags are updated. This routine is
3397 * responsible for configuring the hardware for proper unicast, multicast,
3398 * promiscuous mode, and all-multi behavior.
3400 static void e1000e_set_rx_mode(struct net_device
*netdev
)
3402 struct e1000_adapter
*adapter
= netdev_priv(netdev
);
3403 struct e1000_hw
*hw
= &adapter
->hw
;
3406 if (pm_runtime_suspended(netdev
->dev
.parent
))
3409 /* Check for Promiscuous and All Multicast modes */
3412 /* clear the affected bits */
3413 rctl
&= ~(E1000_RCTL_UPE
| E1000_RCTL_MPE
);
3415 if (netdev
->flags
& IFF_PROMISC
) {
3416 rctl
|= (E1000_RCTL_UPE
| E1000_RCTL_MPE
);
3417 /* Do not hardware filter VLANs in promisc mode */
3418 e1000e_vlan_filter_disable(adapter
);
3422 if (netdev
->flags
& IFF_ALLMULTI
) {
3423 rctl
|= E1000_RCTL_MPE
;
3425 /* Write addresses to the MTA, if the attempt fails
3426 * then we should just turn on promiscuous mode so
3427 * that we can at least receive multicast traffic
3429 count
= e1000e_write_mc_addr_list(netdev
);
3431 rctl
|= E1000_RCTL_MPE
;
3433 e1000e_vlan_filter_enable(adapter
);
3434 /* Write addresses to available RAR registers, if there is not
3435 * sufficient space to store all the addresses then enable
3436 * unicast promiscuous mode
3438 count
= e1000e_write_uc_addr_list(netdev
);
3440 rctl
|= E1000_RCTL_UPE
;
3445 if (netdev
->features
& NETIF_F_HW_VLAN_CTAG_RX
)
3446 e1000e_vlan_strip_enable(adapter
);
3448 e1000e_vlan_strip_disable(adapter
);
3451 static void e1000e_setup_rss_hash(struct e1000_adapter
*adapter
)
3453 struct e1000_hw
*hw
= &adapter
->hw
;
3458 netdev_rss_key_fill(rss_key
, sizeof(rss_key
));
3459 for (i
= 0; i
< 10; i
++)
3460 ew32(RSSRK(i
), rss_key
[i
]);
3462 /* Direct all traffic to queue 0 */
3463 for (i
= 0; i
< 32; i
++)
3466 /* Disable raw packet checksumming so that RSS hash is placed in
3467 * descriptor on writeback.
3469 rxcsum
= er32(RXCSUM
);
3470 rxcsum
|= E1000_RXCSUM_PCSD
;
3472 ew32(RXCSUM
, rxcsum
);
3474 mrqc
= (E1000_MRQC_RSS_FIELD_IPV4
|
3475 E1000_MRQC_RSS_FIELD_IPV4_TCP
|
3476 E1000_MRQC_RSS_FIELD_IPV6
|
3477 E1000_MRQC_RSS_FIELD_IPV6_TCP
|
3478 E1000_MRQC_RSS_FIELD_IPV6_TCP_EX
);
3484 * e1000e_get_base_timinca - get default SYSTIM time increment attributes
3485 * @adapter: board private structure
3486 * @timinca: pointer to returned time increment attributes
3488 * Get attributes for incrementing the System Time Register SYSTIML/H at
3489 * the default base frequency, and set the cyclecounter shift value.
3491 s32
e1000e_get_base_timinca(struct e1000_adapter
*adapter
, u32
*timinca
)
3493 struct e1000_hw
*hw
= &adapter
->hw
;
3494 u32 incvalue
, incperiod
, shift
;
3496 /* Make sure clock is enabled on I217/I218/I219 before checking
3499 if ((hw
->mac
.type
>= e1000_pch_lpt
) &&
3500 !(er32(TSYNCTXCTL
) & E1000_TSYNCTXCTL_ENABLED
) &&
3501 !(er32(TSYNCRXCTL
) & E1000_TSYNCRXCTL_ENABLED
)) {
3502 u32 fextnvm7
= er32(FEXTNVM7
);
3504 if (!(fextnvm7
& BIT(0))) {
3505 ew32(FEXTNVM7
, fextnvm7
| BIT(0));
3510 switch (hw
->mac
.type
) {
3512 /* Stable 96MHz frequency */
3513 incperiod
= INCPERIOD_96MHZ
;
3514 incvalue
= INCVALUE_96MHZ
;
3515 shift
= INCVALUE_SHIFT_96MHZ
;
3516 adapter
->cc
.shift
= shift
+ INCPERIOD_SHIFT_96MHZ
;
3519 if (er32(TSYNCRXCTL
) & E1000_TSYNCRXCTL_SYSCFI
) {
3520 /* Stable 96MHz frequency */
3521 incperiod
= INCPERIOD_96MHZ
;
3522 incvalue
= INCVALUE_96MHZ
;
3523 shift
= INCVALUE_SHIFT_96MHZ
;
3524 adapter
->cc
.shift
= shift
+ INCPERIOD_SHIFT_96MHZ
;
3526 /* Stable 25MHz frequency */
3527 incperiod
= INCPERIOD_25MHZ
;
3528 incvalue
= INCVALUE_25MHZ
;
3529 shift
= INCVALUE_SHIFT_25MHZ
;
3530 adapter
->cc
.shift
= shift
;
3534 /* Stable 24MHz frequency */
3535 incperiod
= INCPERIOD_24MHZ
;
3536 incvalue
= INCVALUE_24MHZ
;
3537 shift
= INCVALUE_SHIFT_24MHZ
;
3538 adapter
->cc
.shift
= shift
;
3542 if (er32(TSYNCRXCTL
) & E1000_TSYNCRXCTL_SYSCFI
) {
3543 /* Stable 24MHz frequency */
3544 incperiod
= INCPERIOD_24MHZ
;
3545 incvalue
= INCVALUE_24MHZ
;
3546 shift
= INCVALUE_SHIFT_24MHZ
;
3547 adapter
->cc
.shift
= shift
;
3549 /* Stable 38400KHz frequency */
3550 incperiod
= INCPERIOD_38400KHZ
;
3551 incvalue
= INCVALUE_38400KHZ
;
3552 shift
= INCVALUE_SHIFT_38400KHZ
;
3553 adapter
->cc
.shift
= shift
;
3558 /* Stable 25MHz frequency */
3559 incperiod
= INCPERIOD_25MHZ
;
3560 incvalue
= INCVALUE_25MHZ
;
3561 shift
= INCVALUE_SHIFT_25MHZ
;
3562 adapter
->cc
.shift
= shift
;
3568 *timinca
= ((incperiod
<< E1000_TIMINCA_INCPERIOD_SHIFT
) |
3569 ((incvalue
<< shift
) & E1000_TIMINCA_INCVALUE_MASK
));
3575 * e1000e_config_hwtstamp - configure the hwtstamp registers and enable/disable
3576 * @adapter: board private structure
3578 * Outgoing time stamping can be enabled and disabled. Play nice and
3579 * disable it when requested, although it shouldn't cause any overhead
3580 * when no packet needs it. At most one packet in the queue may be
3581 * marked for time stamping, otherwise it would be impossible to tell
3582 * for sure to which packet the hardware time stamp belongs.
3584 * Incoming time stamping has to be configured via the hardware filters.
3585 * Not all combinations are supported, in particular event type has to be
3586 * specified. Matching the kind of event packet is not supported, with the
3587 * exception of "all V2 events regardless of level 2 or 4".
3589 static int e1000e_config_hwtstamp(struct e1000_adapter
*adapter
,
3590 struct hwtstamp_config
*config
)
3592 struct e1000_hw
*hw
= &adapter
->hw
;
3593 u32 tsync_tx_ctl
= E1000_TSYNCTXCTL_ENABLED
;
3594 u32 tsync_rx_ctl
= E1000_TSYNCRXCTL_ENABLED
;
3601 if (!(adapter
->flags
& FLAG_HAS_HW_TIMESTAMP
))
3604 /* flags reserved for future extensions - must be zero */
3608 switch (config
->tx_type
) {
3609 case HWTSTAMP_TX_OFF
:
3612 case HWTSTAMP_TX_ON
:
3618 switch (config
->rx_filter
) {
3619 case HWTSTAMP_FILTER_NONE
:
3622 case HWTSTAMP_FILTER_PTP_V1_L4_SYNC
:
3623 tsync_rx_ctl
|= E1000_TSYNCRXCTL_TYPE_L4_V1
;
3624 rxmtrl
= E1000_RXMTRL_PTP_V1_SYNC_MESSAGE
;
3627 case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ
:
3628 tsync_rx_ctl
|= E1000_TSYNCRXCTL_TYPE_L4_V1
;
3629 rxmtrl
= E1000_RXMTRL_PTP_V1_DELAY_REQ_MESSAGE
;
3632 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC
:
3633 /* Also time stamps V2 L2 Path Delay Request/Response */
3634 tsync_rx_ctl
|= E1000_TSYNCRXCTL_TYPE_L2_V2
;
3635 rxmtrl
= E1000_RXMTRL_PTP_V2_SYNC_MESSAGE
;
3638 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ
:
3639 /* Also time stamps V2 L2 Path Delay Request/Response. */
3640 tsync_rx_ctl
|= E1000_TSYNCRXCTL_TYPE_L2_V2
;
3641 rxmtrl
= E1000_RXMTRL_PTP_V2_DELAY_REQ_MESSAGE
;
3644 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC
:
3645 /* Hardware cannot filter just V2 L4 Sync messages;
3646 * fall-through to V2 (both L2 and L4) Sync.
3648 case HWTSTAMP_FILTER_PTP_V2_SYNC
:
3649 /* Also time stamps V2 Path Delay Request/Response. */
3650 tsync_rx_ctl
|= E1000_TSYNCRXCTL_TYPE_L2_L4_V2
;
3651 rxmtrl
= E1000_RXMTRL_PTP_V2_SYNC_MESSAGE
;
3655 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ
:
3656 /* Hardware cannot filter just V2 L4 Delay Request messages;
3657 * fall-through to V2 (both L2 and L4) Delay Request.
3659 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ
:
3660 /* Also time stamps V2 Path Delay Request/Response. */
3661 tsync_rx_ctl
|= E1000_TSYNCRXCTL_TYPE_L2_L4_V2
;
3662 rxmtrl
= E1000_RXMTRL_PTP_V2_DELAY_REQ_MESSAGE
;
3666 case HWTSTAMP_FILTER_PTP_V2_L4_EVENT
:
3667 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT
:
3668 /* Hardware cannot filter just V2 L4 or L2 Event messages;
3669 * fall-through to all V2 (both L2 and L4) Events.
3671 case HWTSTAMP_FILTER_PTP_V2_EVENT
:
3672 tsync_rx_ctl
|= E1000_TSYNCRXCTL_TYPE_EVENT_V2
;
3673 config
->rx_filter
= HWTSTAMP_FILTER_PTP_V2_EVENT
;
3677 case HWTSTAMP_FILTER_PTP_V1_L4_EVENT
:
3678 /* For V1, the hardware can only filter Sync messages or
3679 * Delay Request messages but not both so fall-through to
3680 * time stamp all packets.
3682 case HWTSTAMP_FILTER_NTP_ALL
:
3683 case HWTSTAMP_FILTER_ALL
:
3686 tsync_rx_ctl
|= E1000_TSYNCRXCTL_TYPE_ALL
;
3687 config
->rx_filter
= HWTSTAMP_FILTER_ALL
;
3693 adapter
->hwtstamp_config
= *config
;
3695 /* enable/disable Tx h/w time stamping */
3696 regval
= er32(TSYNCTXCTL
);
3697 regval
&= ~E1000_TSYNCTXCTL_ENABLED
;
3698 regval
|= tsync_tx_ctl
;
3699 ew32(TSYNCTXCTL
, regval
);
3700 if ((er32(TSYNCTXCTL
) & E1000_TSYNCTXCTL_ENABLED
) !=
3701 (regval
& E1000_TSYNCTXCTL_ENABLED
)) {
3702 e_err("Timesync Tx Control register not set as expected\n");
3706 /* enable/disable Rx h/w time stamping */
3707 regval
= er32(TSYNCRXCTL
);
3708 regval
&= ~(E1000_TSYNCRXCTL_ENABLED
| E1000_TSYNCRXCTL_TYPE_MASK
);
3709 regval
|= tsync_rx_ctl
;
3710 ew32(TSYNCRXCTL
, regval
);
3711 if ((er32(TSYNCRXCTL
) & (E1000_TSYNCRXCTL_ENABLED
|
3712 E1000_TSYNCRXCTL_TYPE_MASK
)) !=
3713 (regval
& (E1000_TSYNCRXCTL_ENABLED
|
3714 E1000_TSYNCRXCTL_TYPE_MASK
))) {
3715 e_err("Timesync Rx Control register not set as expected\n");
3719 /* L2: define ethertype filter for time stamped packets */
3721 rxmtrl
|= ETH_P_1588
;
3723 /* define which PTP packets get time stamped */
3724 ew32(RXMTRL
, rxmtrl
);
3726 /* Filter by destination port */
3728 rxudp
= PTP_EV_PORT
;
3729 cpu_to_be16s(&rxudp
);
3735 /* Clear TSYNCRXCTL_VALID & TSYNCTXCTL_VALID bit */
3743 * e1000_configure - configure the hardware for Rx and Tx
3744 * @adapter: private board structure
3746 static void e1000_configure(struct e1000_adapter
*adapter
)
3748 struct e1000_ring
*rx_ring
= adapter
->rx_ring
;
3750 e1000e_set_rx_mode(adapter
->netdev
);
3752 e1000_restore_vlan(adapter
);
3753 e1000_init_manageability_pt(adapter
);
3755 e1000_configure_tx(adapter
);
3757 if (adapter
->netdev
->features
& NETIF_F_RXHASH
)
3758 e1000e_setup_rss_hash(adapter
);
3759 e1000_setup_rctl(adapter
);
3760 e1000_configure_rx(adapter
);
3761 adapter
->alloc_rx_buf(rx_ring
, e1000_desc_unused(rx_ring
), GFP_KERNEL
);
3765 * e1000e_power_up_phy - restore link in case the phy was powered down
3766 * @adapter: address of board private structure
3768 * The phy may be powered down to save power and turn off link when the
3769 * driver is unloaded and wake on lan is not enabled (among others)
3770 * *** this routine MUST be followed by a call to e1000e_reset ***
3772 void e1000e_power_up_phy(struct e1000_adapter
*adapter
)
3774 if (adapter
->hw
.phy
.ops
.power_up
)
3775 adapter
->hw
.phy
.ops
.power_up(&adapter
->hw
);
3777 adapter
->hw
.mac
.ops
.setup_link(&adapter
->hw
);
3781 * e1000_power_down_phy - Power down the PHY
3783 * Power down the PHY so no link is implied when interface is down.
3784 * The PHY cannot be powered down if management or WoL is active.
3786 static void e1000_power_down_phy(struct e1000_adapter
*adapter
)
3788 if (adapter
->hw
.phy
.ops
.power_down
)
3789 adapter
->hw
.phy
.ops
.power_down(&adapter
->hw
);
3793 * e1000_flush_tx_ring - remove all descriptors from the tx_ring
3795 * We want to clear all pending descriptors from the TX ring.
3796 * zeroing happens when the HW reads the regs. We assign the ring itself as
3797 * the data of the next descriptor. We don't care about the data we are about
3800 static void e1000_flush_tx_ring(struct e1000_adapter
*adapter
)
3802 struct e1000_hw
*hw
= &adapter
->hw
;
3803 struct e1000_ring
*tx_ring
= adapter
->tx_ring
;
3804 struct e1000_tx_desc
*tx_desc
= NULL
;
3805 u32 tdt
, tctl
, txd_lower
= E1000_TXD_CMD_IFCS
;
3809 ew32(TCTL
, tctl
| E1000_TCTL_EN
);
3811 BUG_ON(tdt
!= tx_ring
->next_to_use
);
3812 tx_desc
= E1000_TX_DESC(*tx_ring
, tx_ring
->next_to_use
);
3813 tx_desc
->buffer_addr
= tx_ring
->dma
;
3815 tx_desc
->lower
.data
= cpu_to_le32(txd_lower
| size
);
3816 tx_desc
->upper
.data
= 0;
3817 /* flush descriptors to memory before notifying the HW */
3819 tx_ring
->next_to_use
++;
3820 if (tx_ring
->next_to_use
== tx_ring
->count
)
3821 tx_ring
->next_to_use
= 0;
3822 ew32(TDT(0), tx_ring
->next_to_use
);
3823 usleep_range(200, 250);
3827 * e1000_flush_rx_ring - remove all descriptors from the rx_ring
3829 * Mark all descriptors in the RX ring as consumed and disable the rx ring
3831 static void e1000_flush_rx_ring(struct e1000_adapter
*adapter
)
3834 struct e1000_hw
*hw
= &adapter
->hw
;
3837 ew32(RCTL
, rctl
& ~E1000_RCTL_EN
);
3839 usleep_range(100, 150);
3841 rxdctl
= er32(RXDCTL(0));
3842 /* zero the lower 14 bits (prefetch and host thresholds) */
3843 rxdctl
&= 0xffffc000;
3845 /* update thresholds: prefetch threshold to 31, host threshold to 1
3846 * and make sure the granularity is "descriptors" and not "cache lines"
3848 rxdctl
|= (0x1F | BIT(8) | E1000_RXDCTL_THRESH_UNIT_DESC
);
3850 ew32(RXDCTL(0), rxdctl
);
3851 /* momentarily enable the RX ring for the changes to take effect */
3852 ew32(RCTL
, rctl
| E1000_RCTL_EN
);
3854 usleep_range(100, 150);
3855 ew32(RCTL
, rctl
& ~E1000_RCTL_EN
);
3859 * e1000_flush_desc_rings - remove all descriptors from the descriptor rings
3861 * In i219, the descriptor rings must be emptied before resetting the HW
3862 * or before changing the device state to D3 during runtime (runtime PM).
3864 * Failure to do this will cause the HW to enter a unit hang state which can
3865 * only be released by PCI reset on the device
3869 static void e1000_flush_desc_rings(struct e1000_adapter
*adapter
)
3872 u32 fext_nvm11
, tdlen
;
3873 struct e1000_hw
*hw
= &adapter
->hw
;
3875 /* First, disable MULR fix in FEXTNVM11 */
3876 fext_nvm11
= er32(FEXTNVM11
);
3877 fext_nvm11
|= E1000_FEXTNVM11_DISABLE_MULR_FIX
;
3878 ew32(FEXTNVM11
, fext_nvm11
);
3879 /* do nothing if we're not in faulty state, or if the queue is empty */
3880 tdlen
= er32(TDLEN(0));
3881 pci_read_config_word(adapter
->pdev
, PCICFG_DESC_RING_STATUS
,
3883 if (!(hang_state
& FLUSH_DESC_REQUIRED
) || !tdlen
)
3885 e1000_flush_tx_ring(adapter
);
3886 /* recheck, maybe the fault is caused by the rx ring */
3887 pci_read_config_word(adapter
->pdev
, PCICFG_DESC_RING_STATUS
,
3889 if (hang_state
& FLUSH_DESC_REQUIRED
)
3890 e1000_flush_rx_ring(adapter
);
3894 * e1000e_systim_reset - reset the timesync registers after a hardware reset
3895 * @adapter: board private structure
3897 * When the MAC is reset, all hardware bits for timesync will be reset to the
3898 * default values. This function will restore the settings last in place.
3899 * Since the clock SYSTIME registers are reset, we will simply restore the
3900 * cyclecounter to the kernel real clock time.
3902 static void e1000e_systim_reset(struct e1000_adapter
*adapter
)
3904 struct ptp_clock_info
*info
= &adapter
->ptp_clock_info
;
3905 struct e1000_hw
*hw
= &adapter
->hw
;
3906 unsigned long flags
;
3910 if (!(adapter
->flags
& FLAG_HAS_HW_TIMESTAMP
))
3913 if (info
->adjfreq
) {
3914 /* restore the previous ptp frequency delta */
3915 ret_val
= info
->adjfreq(info
, adapter
->ptp_delta
);
3917 /* set the default base frequency if no adjustment possible */
3918 ret_val
= e1000e_get_base_timinca(adapter
, &timinca
);
3920 ew32(TIMINCA
, timinca
);
3924 dev_warn(&adapter
->pdev
->dev
,
3925 "Failed to restore TIMINCA clock rate delta: %d\n",
3930 /* reset the systim ns time counter */
3931 spin_lock_irqsave(&adapter
->systim_lock
, flags
);
3932 timecounter_init(&adapter
->tc
, &adapter
->cc
,
3933 ktime_to_ns(ktime_get_real()));
3934 spin_unlock_irqrestore(&adapter
->systim_lock
, flags
);
3936 /* restore the previous hwtstamp configuration settings */
3937 e1000e_config_hwtstamp(adapter
, &adapter
->hwtstamp_config
);
3941 * e1000e_reset - bring the hardware into a known good state
3943 * This function boots the hardware and enables some settings that
3944 * require a configuration cycle of the hardware - those cannot be
3945 * set/changed during runtime. After reset the device needs to be
3946 * properly configured for Rx, Tx etc.
3948 void e1000e_reset(struct e1000_adapter
*adapter
)
3950 struct e1000_mac_info
*mac
= &adapter
->hw
.mac
;
3951 struct e1000_fc_info
*fc
= &adapter
->hw
.fc
;
3952 struct e1000_hw
*hw
= &adapter
->hw
;
3953 u32 tx_space
, min_tx_space
, min_rx_space
;
3954 u32 pba
= adapter
->pba
;
3957 /* reset Packet Buffer Allocation to default */
3960 if (adapter
->max_frame_size
> (VLAN_ETH_FRAME_LEN
+ ETH_FCS_LEN
)) {
3961 /* To maintain wire speed transmits, the Tx FIFO should be
3962 * large enough to accommodate two full transmit packets,
3963 * rounded up to the next 1KB and expressed in KB. Likewise,
3964 * the Rx FIFO should be large enough to accommodate at least
3965 * one full receive packet and is similarly rounded up and
3969 /* upper 16 bits has Tx packet buffer allocation size in KB */
3970 tx_space
= pba
>> 16;
3971 /* lower 16 bits has Rx packet buffer allocation size in KB */
3973 /* the Tx fifo also stores 16 bytes of information about the Tx
3974 * but don't include ethernet FCS because hardware appends it
3976 min_tx_space
= (adapter
->max_frame_size
+
3977 sizeof(struct e1000_tx_desc
) - ETH_FCS_LEN
) * 2;
3978 min_tx_space
= ALIGN(min_tx_space
, 1024);
3979 min_tx_space
>>= 10;
3980 /* software strips receive CRC, so leave room for it */
3981 min_rx_space
= adapter
->max_frame_size
;
3982 min_rx_space
= ALIGN(min_rx_space
, 1024);
3983 min_rx_space
>>= 10;
3985 /* If current Tx allocation is less than the min Tx FIFO size,
3986 * and the min Tx FIFO size is less than the current Rx FIFO
3987 * allocation, take space away from current Rx allocation
3989 if ((tx_space
< min_tx_space
) &&
3990 ((min_tx_space
- tx_space
) < pba
)) {
3991 pba
-= min_tx_space
- tx_space
;
3993 /* if short on Rx space, Rx wins and must trump Tx
3996 if (pba
< min_rx_space
)
4003 /* flow control settings
4005 * The high water mark must be low enough to fit one full frame
4006 * (or the size used for early receive) above it in the Rx FIFO.
4007 * Set it to the lower of:
4008 * - 90% of the Rx FIFO size, and
4009 * - the full Rx FIFO size minus one full frame
4011 if (adapter
->flags
& FLAG_DISABLE_FC_PAUSE_TIME
)
4012 fc
->pause_time
= 0xFFFF;
4014 fc
->pause_time
= E1000_FC_PAUSE_TIME
;
4015 fc
->send_xon
= true;
4016 fc
->current_mode
= fc
->requested_mode
;
4018 switch (hw
->mac
.type
) {
4020 case e1000_ich10lan
:
4021 if (adapter
->netdev
->mtu
> ETH_DATA_LEN
) {
4024 fc
->high_water
= 0x2800;
4025 fc
->low_water
= fc
->high_water
- 8;
4030 hwm
= min(((pba
<< 10) * 9 / 10),
4031 ((pba
<< 10) - adapter
->max_frame_size
));
4033 fc
->high_water
= hwm
& E1000_FCRTH_RTH
; /* 8-byte granularity */
4034 fc
->low_water
= fc
->high_water
- 8;
4037 /* Workaround PCH LOM adapter hangs with certain network
4038 * loads. If hangs persist, try disabling Tx flow control.
4040 if (adapter
->netdev
->mtu
> ETH_DATA_LEN
) {
4041 fc
->high_water
= 0x3500;
4042 fc
->low_water
= 0x1500;
4044 fc
->high_water
= 0x5000;
4045 fc
->low_water
= 0x3000;
4047 fc
->refresh_time
= 0x1000;
4055 fc
->refresh_time
= 0xFFFF;
4056 fc
->pause_time
= 0xFFFF;
4058 if (adapter
->netdev
->mtu
<= ETH_DATA_LEN
) {
4059 fc
->high_water
= 0x05C20;
4060 fc
->low_water
= 0x05048;
4066 fc
->high_water
= ((pba
<< 10) * 9 / 10) & E1000_FCRTH_RTH
;
4067 fc
->low_water
= ((pba
<< 10) * 8 / 10) & E1000_FCRTL_RTL
;
4071 /* Alignment of Tx data is on an arbitrary byte boundary with the
4072 * maximum size per Tx descriptor limited only to the transmit
4073 * allocation of the packet buffer minus 96 bytes with an upper
4074 * limit of 24KB due to receive synchronization limitations.
4076 adapter
->tx_fifo_limit
= min_t(u32
, ((er32(PBA
) >> 16) << 10) - 96,
4079 /* Disable Adaptive Interrupt Moderation if 2 full packets cannot
4080 * fit in receive buffer.
4082 if (adapter
->itr_setting
& 0x3) {
4083 if ((adapter
->max_frame_size
* 2) > (pba
<< 10)) {
4084 if (!(adapter
->flags2
& FLAG2_DISABLE_AIM
)) {
4085 dev_info(&adapter
->pdev
->dev
,
4086 "Interrupt Throttle Rate off\n");
4087 adapter
->flags2
|= FLAG2_DISABLE_AIM
;
4088 e1000e_write_itr(adapter
, 0);
4090 } else if (adapter
->flags2
& FLAG2_DISABLE_AIM
) {
4091 dev_info(&adapter
->pdev
->dev
,
4092 "Interrupt Throttle Rate on\n");
4093 adapter
->flags2
&= ~FLAG2_DISABLE_AIM
;
4094 adapter
->itr
= 20000;
4095 e1000e_write_itr(adapter
, adapter
->itr
);
4099 if (hw
->mac
.type
>= e1000_pch_spt
)
4100 e1000_flush_desc_rings(adapter
);
4101 /* Allow time for pending master requests to run */
4102 mac
->ops
.reset_hw(hw
);
4104 /* For parts with AMT enabled, let the firmware know
4105 * that the network interface is in control
4107 if (adapter
->flags
& FLAG_HAS_AMT
)
4108 e1000e_get_hw_control(adapter
);
4112 if (mac
->ops
.init_hw(hw
))
4113 e_err("Hardware Error\n");
4115 e1000_update_mng_vlan(adapter
);
4117 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
4118 ew32(VET
, ETH_P_8021Q
);
4120 e1000e_reset_adaptive(hw
);
4122 /* restore systim and hwtstamp settings */
4123 e1000e_systim_reset(adapter
);
4125 /* Set EEE advertisement as appropriate */
4126 if (adapter
->flags2
& FLAG2_HAS_EEE
) {
4130 switch (hw
->phy
.type
) {
4131 case e1000_phy_82579
:
4132 adv_addr
= I82579_EEE_ADVERTISEMENT
;
4134 case e1000_phy_i217
:
4135 adv_addr
= I217_EEE_ADVERTISEMENT
;
4138 dev_err(&adapter
->pdev
->dev
,
4139 "Invalid PHY type setting EEE advertisement\n");
4143 ret_val
= hw
->phy
.ops
.acquire(hw
);
4145 dev_err(&adapter
->pdev
->dev
,
4146 "EEE advertisement - unable to acquire PHY\n");
4150 e1000_write_emi_reg_locked(hw
, adv_addr
,
4151 hw
->dev_spec
.ich8lan
.eee_disable
?
4152 0 : adapter
->eee_advert
);
4154 hw
->phy
.ops
.release(hw
);
4157 if (!netif_running(adapter
->netdev
) &&
4158 !test_bit(__E1000_TESTING
, &adapter
->state
))
4159 e1000_power_down_phy(adapter
);
4161 e1000_get_phy_info(hw
);
4163 if ((adapter
->flags
& FLAG_HAS_SMART_POWER_DOWN
) &&
4164 !(adapter
->flags
& FLAG_SMART_POWER_DOWN
)) {
4166 /* speed up time to link by disabling smart power down, ignore
4167 * the return value of this function because there is nothing
4168 * different we would do if it failed
4170 e1e_rphy(hw
, IGP02E1000_PHY_POWER_MGMT
, &phy_data
);
4171 phy_data
&= ~IGP02E1000_PM_SPD
;
4172 e1e_wphy(hw
, IGP02E1000_PHY_POWER_MGMT
, phy_data
);
4174 if (hw
->mac
.type
>= e1000_pch_spt
&& adapter
->int_mode
== 0) {
4177 /* Fextnvm7 @ 0xe4[2] = 1 */
4178 reg
= er32(FEXTNVM7
);
4179 reg
|= E1000_FEXTNVM7_SIDE_CLK_UNGATE
;
4180 ew32(FEXTNVM7
, reg
);
4181 /* Fextnvm9 @ 0x5bb4[13:12] = 11 */
4182 reg
= er32(FEXTNVM9
);
4183 reg
|= E1000_FEXTNVM9_IOSFSB_CLKGATE_DIS
|
4184 E1000_FEXTNVM9_IOSFSB_CLKREQ_DIS
;
4185 ew32(FEXTNVM9
, reg
);
4191 * e1000e_trigger_lsc - trigger an LSC interrupt
4194 * Fire a link status change interrupt to start the watchdog.
4196 static void e1000e_trigger_lsc(struct e1000_adapter
*adapter
)
4198 struct e1000_hw
*hw
= &adapter
->hw
;
4200 if (adapter
->msix_entries
)
4201 ew32(ICS
, E1000_ICS_LSC
| E1000_ICS_OTHER
);
4203 ew32(ICS
, E1000_ICS_LSC
);
4206 void e1000e_up(struct e1000_adapter
*adapter
)
4208 /* hardware has been reset, we need to reload some things */
4209 e1000_configure(adapter
);
4211 clear_bit(__E1000_DOWN
, &adapter
->state
);
4213 if (adapter
->msix_entries
)
4214 e1000_configure_msix(adapter
);
4215 e1000_irq_enable(adapter
);
4217 /* Tx queue started by watchdog timer when link is up */
4219 e1000e_trigger_lsc(adapter
);
4222 static void e1000e_flush_descriptors(struct e1000_adapter
*adapter
)
4224 struct e1000_hw
*hw
= &adapter
->hw
;
4226 if (!(adapter
->flags2
& FLAG2_DMA_BURST
))
4229 /* flush pending descriptor writebacks to memory */
4230 ew32(TIDV
, adapter
->tx_int_delay
| E1000_TIDV_FPD
);
4231 ew32(RDTR
, adapter
->rx_int_delay
| E1000_RDTR_FPD
);
4233 /* execute the writes immediately */
4236 /* due to rare timing issues, write to TIDV/RDTR again to ensure the
4237 * write is successful
4239 ew32(TIDV
, adapter
->tx_int_delay
| E1000_TIDV_FPD
);
4240 ew32(RDTR
, adapter
->rx_int_delay
| E1000_RDTR_FPD
);
4242 /* execute the writes immediately */
4246 static void e1000e_update_stats(struct e1000_adapter
*adapter
);
4249 * e1000e_down - quiesce the device and optionally reset the hardware
4250 * @adapter: board private structure
4251 * @reset: boolean flag to reset the hardware or not
4253 void e1000e_down(struct e1000_adapter
*adapter
, bool reset
)
4255 struct net_device
*netdev
= adapter
->netdev
;
4256 struct e1000_hw
*hw
= &adapter
->hw
;
4259 /* signal that we're down so the interrupt handler does not
4260 * reschedule our watchdog timer
4262 set_bit(__E1000_DOWN
, &adapter
->state
);
4264 netif_carrier_off(netdev
);
4266 /* disable receives in the hardware */
4268 if (!(adapter
->flags2
& FLAG2_NO_DISABLE_RX
))
4269 ew32(RCTL
, rctl
& ~E1000_RCTL_EN
);
4270 /* flush and sleep below */
4272 netif_stop_queue(netdev
);
4274 /* disable transmits in the hardware */
4276 tctl
&= ~E1000_TCTL_EN
;
4279 /* flush both disables and wait for them to finish */
4281 usleep_range(10000, 11000);
4283 e1000_irq_disable(adapter
);
4285 napi_synchronize(&adapter
->napi
);
4287 del_timer_sync(&adapter
->phy_info_timer
);
4289 spin_lock(&adapter
->stats64_lock
);
4290 e1000e_update_stats(adapter
);
4291 spin_unlock(&adapter
->stats64_lock
);
4293 e1000e_flush_descriptors(adapter
);
4295 adapter
->link_speed
= 0;
4296 adapter
->link_duplex
= 0;
4298 /* Disable Si errata workaround on PCHx for jumbo frame flow */
4299 if ((hw
->mac
.type
>= e1000_pch2lan
) &&
4300 (adapter
->netdev
->mtu
> ETH_DATA_LEN
) &&
4301 e1000_lv_jumbo_workaround_ich8lan(hw
, false))
4302 e_dbg("failed to disable jumbo frame workaround mode\n");
4304 if (!pci_channel_offline(adapter
->pdev
)) {
4306 e1000e_reset(adapter
);
4307 else if (hw
->mac
.type
>= e1000_pch_spt
)
4308 e1000_flush_desc_rings(adapter
);
4310 e1000_clean_tx_ring(adapter
->tx_ring
);
4311 e1000_clean_rx_ring(adapter
->rx_ring
);
4314 void e1000e_reinit_locked(struct e1000_adapter
*adapter
)
4317 while (test_and_set_bit(__E1000_RESETTING
, &adapter
->state
))
4318 usleep_range(1000, 1100);
4319 e1000e_down(adapter
, true);
4321 clear_bit(__E1000_RESETTING
, &adapter
->state
);
4325 * e1000e_sanitize_systim - sanitize raw cycle counter reads
4326 * @hw: pointer to the HW structure
4327 * @systim: PHC time value read, sanitized and returned
4328 * @sts: structure to hold system time before and after reading SYSTIML,
4331 * Errata for 82574/82583 possible bad bits read from SYSTIMH/L:
4332 * check to see that the time is incrementing at a reasonable
4333 * rate and is a multiple of incvalue.
4335 static u64
e1000e_sanitize_systim(struct e1000_hw
*hw
, u64 systim
,
4336 struct ptp_system_timestamp
*sts
)
4338 u64 time_delta
, rem
, temp
;
4343 incvalue
= er32(TIMINCA
) & E1000_TIMINCA_INCVALUE_MASK
;
4344 for (i
= 0; i
< E1000_MAX_82574_SYSTIM_REREADS
; i
++) {
4345 /* latch SYSTIMH on read of SYSTIML */
4346 ptp_read_system_prets(sts
);
4347 systim_next
= (u64
)er32(SYSTIML
);
4348 ptp_read_system_postts(sts
);
4349 systim_next
|= (u64
)er32(SYSTIMH
) << 32;
4351 time_delta
= systim_next
- systim
;
4353 /* VMWare users have seen incvalue of zero, don't div / 0 */
4354 rem
= incvalue
? do_div(temp
, incvalue
) : (time_delta
!= 0);
4356 systim
= systim_next
;
4358 if ((time_delta
< E1000_82574_SYSTIM_EPSILON
) && (rem
== 0))
4366 * e1000e_read_systim - read SYSTIM register
4367 * @adapter: board private structure
4368 * @sts: structure which will contain system time before and after reading
4369 * SYSTIML, may be NULL
4371 u64
e1000e_read_systim(struct e1000_adapter
*adapter
,
4372 struct ptp_system_timestamp
*sts
)
4374 struct e1000_hw
*hw
= &adapter
->hw
;
4375 u32 systimel
, systimel_2
, systimeh
;
4377 /* SYSTIMH latching upon SYSTIML read does not work well.
4378 * This means that if SYSTIML overflows after we read it but before
4379 * we read SYSTIMH, the value of SYSTIMH has been incremented and we
4380 * will experience a huge non linear increment in the systime value
4381 * to fix that we test for overflow and if true, we re-read systime.
4383 ptp_read_system_prets(sts
);
4384 systimel
= er32(SYSTIML
);
4385 ptp_read_system_postts(sts
);
4386 systimeh
= er32(SYSTIMH
);
4387 /* Is systimel is so large that overflow is possible? */
4388 if (systimel
>= (u32
)0xffffffff - E1000_TIMINCA_INCVALUE_MASK
) {
4389 ptp_read_system_prets(sts
);
4390 systimel_2
= er32(SYSTIML
);
4391 ptp_read_system_postts(sts
);
4392 if (systimel
> systimel_2
) {
4393 /* There was an overflow, read again SYSTIMH, and use
4396 systimeh
= er32(SYSTIMH
);
4397 systimel
= systimel_2
;
4400 systim
= (u64
)systimel
;
4401 systim
|= (u64
)systimeh
<< 32;
4403 if (adapter
->flags2
& FLAG2_CHECK_SYSTIM_OVERFLOW
)
4404 systim
= e1000e_sanitize_systim(hw
, systim
, sts
);
4410 * e1000e_cyclecounter_read - read raw cycle counter (used by time counter)
4411 * @cc: cyclecounter structure
4413 static u64
e1000e_cyclecounter_read(const struct cyclecounter
*cc
)
4415 struct e1000_adapter
*adapter
= container_of(cc
, struct e1000_adapter
,
4418 return e1000e_read_systim(adapter
, NULL
);
4422 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
4423 * @adapter: board private structure to initialize
4425 * e1000_sw_init initializes the Adapter private data structure.
4426 * Fields are initialized based on PCI device information and
4427 * OS network device settings (MTU size).
4429 static int e1000_sw_init(struct e1000_adapter
*adapter
)
4431 struct net_device
*netdev
= adapter
->netdev
;
4433 adapter
->rx_buffer_len
= VLAN_ETH_FRAME_LEN
+ ETH_FCS_LEN
;
4434 adapter
->rx_ps_bsize0
= 128;
4435 adapter
->max_frame_size
= netdev
->mtu
+ VLAN_ETH_HLEN
+ ETH_FCS_LEN
;
4436 adapter
->min_frame_size
= ETH_ZLEN
+ ETH_FCS_LEN
;
4437 adapter
->tx_ring_count
= E1000_DEFAULT_TXD
;
4438 adapter
->rx_ring_count
= E1000_DEFAULT_RXD
;
4440 spin_lock_init(&adapter
->stats64_lock
);
4442 e1000e_set_interrupt_capability(adapter
);
4444 if (e1000_alloc_queues(adapter
))
4447 /* Setup hardware time stamping cyclecounter */
4448 if (adapter
->flags
& FLAG_HAS_HW_TIMESTAMP
) {
4449 adapter
->cc
.read
= e1000e_cyclecounter_read
;
4450 adapter
->cc
.mask
= CYCLECOUNTER_MASK(64);
4451 adapter
->cc
.mult
= 1;
4452 /* cc.shift set in e1000e_get_base_tininca() */
4454 spin_lock_init(&adapter
->systim_lock
);
4455 INIT_WORK(&adapter
->tx_hwtstamp_work
, e1000e_tx_hwtstamp_work
);
4458 /* Explicitly disable IRQ since the NIC can be in any state. */
4459 e1000_irq_disable(adapter
);
4461 set_bit(__E1000_DOWN
, &adapter
->state
);
4466 * e1000_intr_msi_test - Interrupt Handler
4467 * @irq: interrupt number
4468 * @data: pointer to a network interface device structure
4470 static irqreturn_t
e1000_intr_msi_test(int __always_unused irq
, void *data
)
4472 struct net_device
*netdev
= data
;
4473 struct e1000_adapter
*adapter
= netdev_priv(netdev
);
4474 struct e1000_hw
*hw
= &adapter
->hw
;
4475 u32 icr
= er32(ICR
);
4477 e_dbg("icr is %08X\n", icr
);
4478 if (icr
& E1000_ICR_RXSEQ
) {
4479 adapter
->flags
&= ~FLAG_MSI_TEST_FAILED
;
4480 /* Force memory writes to complete before acknowledging the
4481 * interrupt is handled.
4490 * e1000_test_msi_interrupt - Returns 0 for successful test
4491 * @adapter: board private struct
4493 * code flow taken from tg3.c
4495 static int e1000_test_msi_interrupt(struct e1000_adapter
*adapter
)
4497 struct net_device
*netdev
= adapter
->netdev
;
4498 struct e1000_hw
*hw
= &adapter
->hw
;
4501 /* poll_enable hasn't been called yet, so don't need disable */
4502 /* clear any pending events */
4505 /* free the real vector and request a test handler */
4506 e1000_free_irq(adapter
);
4507 e1000e_reset_interrupt_capability(adapter
);
4509 /* Assume that the test fails, if it succeeds then the test
4510 * MSI irq handler will unset this flag
4512 adapter
->flags
|= FLAG_MSI_TEST_FAILED
;
4514 err
= pci_enable_msi(adapter
->pdev
);
4516 goto msi_test_failed
;
4518 err
= request_irq(adapter
->pdev
->irq
, e1000_intr_msi_test
, 0,
4519 netdev
->name
, netdev
);
4521 pci_disable_msi(adapter
->pdev
);
4522 goto msi_test_failed
;
4525 /* Force memory writes to complete before enabling and firing an
4530 e1000_irq_enable(adapter
);
4532 /* fire an unusual interrupt on the test handler */
4533 ew32(ICS
, E1000_ICS_RXSEQ
);
4537 e1000_irq_disable(adapter
);
4539 rmb(); /* read flags after interrupt has been fired */
4541 if (adapter
->flags
& FLAG_MSI_TEST_FAILED
) {
4542 adapter
->int_mode
= E1000E_INT_MODE_LEGACY
;
4543 e_info("MSI interrupt test failed, using legacy interrupt.\n");
4545 e_dbg("MSI interrupt test succeeded!\n");
4548 free_irq(adapter
->pdev
->irq
, netdev
);
4549 pci_disable_msi(adapter
->pdev
);
4552 e1000e_set_interrupt_capability(adapter
);
4553 return e1000_request_irq(adapter
);
4557 * e1000_test_msi - Returns 0 if MSI test succeeds or INTx mode is restored
4558 * @adapter: board private struct
4560 * code flow taken from tg3.c, called with e1000 interrupts disabled.
4562 static int e1000_test_msi(struct e1000_adapter
*adapter
)
4567 if (!(adapter
->flags
& FLAG_MSI_ENABLED
))
4570 /* disable SERR in case the MSI write causes a master abort */
4571 pci_read_config_word(adapter
->pdev
, PCI_COMMAND
, &pci_cmd
);
4572 if (pci_cmd
& PCI_COMMAND_SERR
)
4573 pci_write_config_word(adapter
->pdev
, PCI_COMMAND
,
4574 pci_cmd
& ~PCI_COMMAND_SERR
);
4576 err
= e1000_test_msi_interrupt(adapter
);
4578 /* re-enable SERR */
4579 if (pci_cmd
& PCI_COMMAND_SERR
) {
4580 pci_read_config_word(adapter
->pdev
, PCI_COMMAND
, &pci_cmd
);
4581 pci_cmd
|= PCI_COMMAND_SERR
;
4582 pci_write_config_word(adapter
->pdev
, PCI_COMMAND
, pci_cmd
);
4589 * e1000e_open - Called when a network interface is made active
4590 * @netdev: network interface device structure
4592 * Returns 0 on success, negative value on failure
4594 * The open entry point is called when a network interface is made
4595 * active by the system (IFF_UP). At this point all resources needed
4596 * for transmit and receive operations are allocated, the interrupt
4597 * handler is registered with the OS, the watchdog timer is started,
4598 * and the stack is notified that the interface is ready.
4600 int e1000e_open(struct net_device
*netdev
)
4602 struct e1000_adapter
*adapter
= netdev_priv(netdev
);
4603 struct e1000_hw
*hw
= &adapter
->hw
;
4604 struct pci_dev
*pdev
= adapter
->pdev
;
4607 /* disallow open during test */
4608 if (test_bit(__E1000_TESTING
, &adapter
->state
))
4611 pm_runtime_get_sync(&pdev
->dev
);
4613 netif_carrier_off(netdev
);
4614 netif_stop_queue(netdev
);
4616 /* allocate transmit descriptors */
4617 err
= e1000e_setup_tx_resources(adapter
->tx_ring
);
4621 /* allocate receive descriptors */
4622 err
= e1000e_setup_rx_resources(adapter
->rx_ring
);
4626 /* If AMT is enabled, let the firmware know that the network
4627 * interface is now open and reset the part to a known state.
4629 if (adapter
->flags
& FLAG_HAS_AMT
) {
4630 e1000e_get_hw_control(adapter
);
4631 e1000e_reset(adapter
);
4634 e1000e_power_up_phy(adapter
);
4636 adapter
->mng_vlan_id
= E1000_MNG_VLAN_NONE
;
4637 if ((adapter
->hw
.mng_cookie
.status
& E1000_MNG_DHCP_COOKIE_STATUS_VLAN
))
4638 e1000_update_mng_vlan(adapter
);
4640 /* DMA latency requirement to workaround jumbo issue */
4641 pm_qos_add_request(&adapter
->pm_qos_req
, PM_QOS_CPU_DMA_LATENCY
,
4642 PM_QOS_DEFAULT_VALUE
);
4644 /* before we allocate an interrupt, we must be ready to handle it.
4645 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
4646 * as soon as we call pci_request_irq, so we have to setup our
4647 * clean_rx handler before we do so.
4649 e1000_configure(adapter
);
4651 err
= e1000_request_irq(adapter
);
4655 /* Work around PCIe errata with MSI interrupts causing some chipsets to
4656 * ignore e1000e MSI messages, which means we need to test our MSI
4659 if (adapter
->int_mode
!= E1000E_INT_MODE_LEGACY
) {
4660 err
= e1000_test_msi(adapter
);
4662 e_err("Interrupt allocation failed\n");
4667 /* From here on the code is the same as e1000e_up() */
4668 clear_bit(__E1000_DOWN
, &adapter
->state
);
4670 napi_enable(&adapter
->napi
);
4672 e1000_irq_enable(adapter
);
4674 adapter
->tx_hang_recheck
= false;
4676 hw
->mac
.get_link_status
= true;
4677 pm_runtime_put(&pdev
->dev
);
4679 e1000e_trigger_lsc(adapter
);
4684 pm_qos_remove_request(&adapter
->pm_qos_req
);
4685 e1000e_release_hw_control(adapter
);
4686 e1000_power_down_phy(adapter
);
4687 e1000e_free_rx_resources(adapter
->rx_ring
);
4689 e1000e_free_tx_resources(adapter
->tx_ring
);
4691 e1000e_reset(adapter
);
4692 pm_runtime_put_sync(&pdev
->dev
);
4698 * e1000e_close - Disables a network interface
4699 * @netdev: network interface device structure
4701 * Returns 0, this is not allowed to fail
4703 * The close entry point is called when an interface is de-activated
4704 * by the OS. The hardware is still under the drivers control, but
4705 * needs to be disabled. A global MAC reset is issued to stop the
4706 * hardware, and all transmit and receive resources are freed.
4708 int e1000e_close(struct net_device
*netdev
)
4710 struct e1000_adapter
*adapter
= netdev_priv(netdev
);
4711 struct pci_dev
*pdev
= adapter
->pdev
;
4712 int count
= E1000_CHECK_RESET_COUNT
;
4714 while (test_bit(__E1000_RESETTING
, &adapter
->state
) && count
--)
4715 usleep_range(10000, 11000);
4717 WARN_ON(test_bit(__E1000_RESETTING
, &adapter
->state
));
4719 pm_runtime_get_sync(&pdev
->dev
);
4721 if (netif_device_present(netdev
)) {
4722 e1000e_down(adapter
, true);
4723 e1000_free_irq(adapter
);
4725 /* Link status message must follow this format */
4726 pr_info("%s NIC Link is Down\n", netdev
->name
);
4729 napi_disable(&adapter
->napi
);
4731 e1000e_free_tx_resources(adapter
->tx_ring
);
4732 e1000e_free_rx_resources(adapter
->rx_ring
);
4734 /* kill manageability vlan ID if supported, but not if a vlan with
4735 * the same ID is registered on the host OS (let 8021q kill it)
4737 if (adapter
->hw
.mng_cookie
.status
& E1000_MNG_DHCP_COOKIE_STATUS_VLAN
)
4738 e1000_vlan_rx_kill_vid(netdev
, htons(ETH_P_8021Q
),
4739 adapter
->mng_vlan_id
);
4741 /* If AMT is enabled, let the firmware know that the network
4742 * interface is now closed
4744 if ((adapter
->flags
& FLAG_HAS_AMT
) &&
4745 !test_bit(__E1000_TESTING
, &adapter
->state
))
4746 e1000e_release_hw_control(adapter
);
4748 pm_qos_remove_request(&adapter
->pm_qos_req
);
4750 pm_runtime_put_sync(&pdev
->dev
);
4756 * e1000_set_mac - Change the Ethernet Address of the NIC
4757 * @netdev: network interface device structure
4758 * @p: pointer to an address structure
4760 * Returns 0 on success, negative on failure
4762 static int e1000_set_mac(struct net_device
*netdev
, void *p
)
4764 struct e1000_adapter
*adapter
= netdev_priv(netdev
);
4765 struct e1000_hw
*hw
= &adapter
->hw
;
4766 struct sockaddr
*addr
= p
;
4768 if (!is_valid_ether_addr(addr
->sa_data
))
4769 return -EADDRNOTAVAIL
;
4771 memcpy(netdev
->dev_addr
, addr
->sa_data
, netdev
->addr_len
);
4772 memcpy(adapter
->hw
.mac
.addr
, addr
->sa_data
, netdev
->addr_len
);
4774 hw
->mac
.ops
.rar_set(&adapter
->hw
, adapter
->hw
.mac
.addr
, 0);
4776 if (adapter
->flags
& FLAG_RESET_OVERWRITES_LAA
) {
4777 /* activate the work around */
4778 e1000e_set_laa_state_82571(&adapter
->hw
, 1);
4780 /* Hold a copy of the LAA in RAR[14] This is done so that
4781 * between the time RAR[0] gets clobbered and the time it
4782 * gets fixed (in e1000_watchdog), the actual LAA is in one
4783 * of the RARs and no incoming packets directed to this port
4784 * are dropped. Eventually the LAA will be in RAR[0] and
4787 hw
->mac
.ops
.rar_set(&adapter
->hw
, adapter
->hw
.mac
.addr
,
4788 adapter
->hw
.mac
.rar_entry_count
- 1);
4795 * e1000e_update_phy_task - work thread to update phy
4796 * @work: pointer to our work struct
4798 * this worker thread exists because we must acquire a
4799 * semaphore to read the phy, which we could msleep while
4800 * waiting for it, and we can't msleep in a timer.
4802 static void e1000e_update_phy_task(struct work_struct
*work
)
4804 struct e1000_adapter
*adapter
= container_of(work
,
4805 struct e1000_adapter
,
4807 struct e1000_hw
*hw
= &adapter
->hw
;
4809 if (test_bit(__E1000_DOWN
, &adapter
->state
))
4812 e1000_get_phy_info(hw
);
4814 /* Enable EEE on 82579 after link up */
4815 if (hw
->phy
.type
>= e1000_phy_82579
)
4816 e1000_set_eee_pchlan(hw
);
4820 * e1000_update_phy_info - timre call-back to update PHY info
4821 * @data: pointer to adapter cast into an unsigned long
4823 * Need to wait a few seconds after link up to get diagnostic information from
4826 static void e1000_update_phy_info(struct timer_list
*t
)
4828 struct e1000_adapter
*adapter
= from_timer(adapter
, t
, phy_info_timer
);
4830 if (test_bit(__E1000_DOWN
, &adapter
->state
))
4833 schedule_work(&adapter
->update_phy_task
);
4837 * e1000e_update_phy_stats - Update the PHY statistics counters
4838 * @adapter: board private structure
4840 * Read/clear the upper 16-bit PHY registers and read/accumulate lower
4842 static void e1000e_update_phy_stats(struct e1000_adapter
*adapter
)
4844 struct e1000_hw
*hw
= &adapter
->hw
;
4848 ret_val
= hw
->phy
.ops
.acquire(hw
);
4852 /* A page set is expensive so check if already on desired page.
4853 * If not, set to the page with the PHY status registers.
4856 ret_val
= e1000e_read_phy_reg_mdic(hw
, IGP01E1000_PHY_PAGE_SELECT
,
4860 if (phy_data
!= (HV_STATS_PAGE
<< IGP_PAGE_SHIFT
)) {
4861 ret_val
= hw
->phy
.ops
.set_page(hw
,
4862 HV_STATS_PAGE
<< IGP_PAGE_SHIFT
);
4867 /* Single Collision Count */
4868 hw
->phy
.ops
.read_reg_page(hw
, HV_SCC_UPPER
, &phy_data
);
4869 ret_val
= hw
->phy
.ops
.read_reg_page(hw
, HV_SCC_LOWER
, &phy_data
);
4871 adapter
->stats
.scc
+= phy_data
;
4873 /* Excessive Collision Count */
4874 hw
->phy
.ops
.read_reg_page(hw
, HV_ECOL_UPPER
, &phy_data
);
4875 ret_val
= hw
->phy
.ops
.read_reg_page(hw
, HV_ECOL_LOWER
, &phy_data
);
4877 adapter
->stats
.ecol
+= phy_data
;
4879 /* Multiple Collision Count */
4880 hw
->phy
.ops
.read_reg_page(hw
, HV_MCC_UPPER
, &phy_data
);
4881 ret_val
= hw
->phy
.ops
.read_reg_page(hw
, HV_MCC_LOWER
, &phy_data
);
4883 adapter
->stats
.mcc
+= phy_data
;
4885 /* Late Collision Count */
4886 hw
->phy
.ops
.read_reg_page(hw
, HV_LATECOL_UPPER
, &phy_data
);
4887 ret_val
= hw
->phy
.ops
.read_reg_page(hw
, HV_LATECOL_LOWER
, &phy_data
);
4889 adapter
->stats
.latecol
+= phy_data
;
4891 /* Collision Count - also used for adaptive IFS */
4892 hw
->phy
.ops
.read_reg_page(hw
, HV_COLC_UPPER
, &phy_data
);
4893 ret_val
= hw
->phy
.ops
.read_reg_page(hw
, HV_COLC_LOWER
, &phy_data
);
4895 hw
->mac
.collision_delta
= phy_data
;
4898 hw
->phy
.ops
.read_reg_page(hw
, HV_DC_UPPER
, &phy_data
);
4899 ret_val
= hw
->phy
.ops
.read_reg_page(hw
, HV_DC_LOWER
, &phy_data
);
4901 adapter
->stats
.dc
+= phy_data
;
4903 /* Transmit with no CRS */
4904 hw
->phy
.ops
.read_reg_page(hw
, HV_TNCRS_UPPER
, &phy_data
);
4905 ret_val
= hw
->phy
.ops
.read_reg_page(hw
, HV_TNCRS_LOWER
, &phy_data
);
4907 adapter
->stats
.tncrs
+= phy_data
;
4910 hw
->phy
.ops
.release(hw
);
4914 * e1000e_update_stats - Update the board statistics counters
4915 * @adapter: board private structure
4917 static void e1000e_update_stats(struct e1000_adapter
*adapter
)
4919 struct net_device
*netdev
= adapter
->netdev
;
4920 struct e1000_hw
*hw
= &adapter
->hw
;
4921 struct pci_dev
*pdev
= adapter
->pdev
;
4923 /* Prevent stats update while adapter is being reset, or if the pci
4924 * connection is down.
4926 if (adapter
->link_speed
== 0)
4928 if (pci_channel_offline(pdev
))
4931 adapter
->stats
.crcerrs
+= er32(CRCERRS
);
4932 adapter
->stats
.gprc
+= er32(GPRC
);
4933 adapter
->stats
.gorc
+= er32(GORCL
);
4934 er32(GORCH
); /* Clear gorc */
4935 adapter
->stats
.bprc
+= er32(BPRC
);
4936 adapter
->stats
.mprc
+= er32(MPRC
);
4937 adapter
->stats
.roc
+= er32(ROC
);
4939 adapter
->stats
.mpc
+= er32(MPC
);
4941 /* Half-duplex statistics */
4942 if (adapter
->link_duplex
== HALF_DUPLEX
) {
4943 if (adapter
->flags2
& FLAG2_HAS_PHY_STATS
) {
4944 e1000e_update_phy_stats(adapter
);
4946 adapter
->stats
.scc
+= er32(SCC
);
4947 adapter
->stats
.ecol
+= er32(ECOL
);
4948 adapter
->stats
.mcc
+= er32(MCC
);
4949 adapter
->stats
.latecol
+= er32(LATECOL
);
4950 adapter
->stats
.dc
+= er32(DC
);
4952 hw
->mac
.collision_delta
= er32(COLC
);
4954 if ((hw
->mac
.type
!= e1000_82574
) &&
4955 (hw
->mac
.type
!= e1000_82583
))
4956 adapter
->stats
.tncrs
+= er32(TNCRS
);
4958 adapter
->stats
.colc
+= hw
->mac
.collision_delta
;
4961 adapter
->stats
.xonrxc
+= er32(XONRXC
);
4962 adapter
->stats
.xontxc
+= er32(XONTXC
);
4963 adapter
->stats
.xoffrxc
+= er32(XOFFRXC
);
4964 adapter
->stats
.xofftxc
+= er32(XOFFTXC
);
4965 adapter
->stats
.gptc
+= er32(GPTC
);
4966 adapter
->stats
.gotc
+= er32(GOTCL
);
4967 er32(GOTCH
); /* Clear gotc */
4968 adapter
->stats
.rnbc
+= er32(RNBC
);
4969 adapter
->stats
.ruc
+= er32(RUC
);
4971 adapter
->stats
.mptc
+= er32(MPTC
);
4972 adapter
->stats
.bptc
+= er32(BPTC
);
4974 /* used for adaptive IFS */
4976 hw
->mac
.tx_packet_delta
= er32(TPT
);
4977 adapter
->stats
.tpt
+= hw
->mac
.tx_packet_delta
;
4979 adapter
->stats
.algnerrc
+= er32(ALGNERRC
);
4980 adapter
->stats
.rxerrc
+= er32(RXERRC
);
4981 adapter
->stats
.cexterr
+= er32(CEXTERR
);
4982 adapter
->stats
.tsctc
+= er32(TSCTC
);
4983 adapter
->stats
.tsctfc
+= er32(TSCTFC
);
4985 /* Fill out the OS statistics structure */
4986 netdev
->stats
.multicast
= adapter
->stats
.mprc
;
4987 netdev
->stats
.collisions
= adapter
->stats
.colc
;
4991 /* RLEC on some newer hardware can be incorrect so build
4992 * our own version based on RUC and ROC
4994 netdev
->stats
.rx_errors
= adapter
->stats
.rxerrc
+
4995 adapter
->stats
.crcerrs
+ adapter
->stats
.algnerrc
+
4996 adapter
->stats
.ruc
+ adapter
->stats
.roc
+ adapter
->stats
.cexterr
;
4997 netdev
->stats
.rx_length_errors
= adapter
->stats
.ruc
+
4999 netdev
->stats
.rx_crc_errors
= adapter
->stats
.crcerrs
;
5000 netdev
->stats
.rx_frame_errors
= adapter
->stats
.algnerrc
;
5001 netdev
->stats
.rx_missed_errors
= adapter
->stats
.mpc
;
5004 netdev
->stats
.tx_errors
= adapter
->stats
.ecol
+ adapter
->stats
.latecol
;
5005 netdev
->stats
.tx_aborted_errors
= adapter
->stats
.ecol
;
5006 netdev
->stats
.tx_window_errors
= adapter
->stats
.latecol
;
5007 netdev
->stats
.tx_carrier_errors
= adapter
->stats
.tncrs
;
5009 /* Tx Dropped needs to be maintained elsewhere */
5011 /* Management Stats */
5012 adapter
->stats
.mgptc
+= er32(MGTPTC
);
5013 adapter
->stats
.mgprc
+= er32(MGTPRC
);
5014 adapter
->stats
.mgpdc
+= er32(MGTPDC
);
5016 /* Correctable ECC Errors */
5017 if (hw
->mac
.type
>= e1000_pch_lpt
) {
5018 u32 pbeccsts
= er32(PBECCSTS
);
5020 adapter
->corr_errors
+=
5021 pbeccsts
& E1000_PBECCSTS_CORR_ERR_CNT_MASK
;
5022 adapter
->uncorr_errors
+=
5023 (pbeccsts
& E1000_PBECCSTS_UNCORR_ERR_CNT_MASK
) >>
5024 E1000_PBECCSTS_UNCORR_ERR_CNT_SHIFT
;
5029 * e1000_phy_read_status - Update the PHY register status snapshot
5030 * @adapter: board private structure
5032 static void e1000_phy_read_status(struct e1000_adapter
*adapter
)
5034 struct e1000_hw
*hw
= &adapter
->hw
;
5035 struct e1000_phy_regs
*phy
= &adapter
->phy_regs
;
5037 if (!pm_runtime_suspended((&adapter
->pdev
->dev
)->parent
) &&
5038 (er32(STATUS
) & E1000_STATUS_LU
) &&
5039 (adapter
->hw
.phy
.media_type
== e1000_media_type_copper
)) {
5042 ret_val
= e1e_rphy(hw
, MII_BMCR
, &phy
->bmcr
);
5043 ret_val
|= e1e_rphy(hw
, MII_BMSR
, &phy
->bmsr
);
5044 ret_val
|= e1e_rphy(hw
, MII_ADVERTISE
, &phy
->advertise
);
5045 ret_val
|= e1e_rphy(hw
, MII_LPA
, &phy
->lpa
);
5046 ret_val
|= e1e_rphy(hw
, MII_EXPANSION
, &phy
->expansion
);
5047 ret_val
|= e1e_rphy(hw
, MII_CTRL1000
, &phy
->ctrl1000
);
5048 ret_val
|= e1e_rphy(hw
, MII_STAT1000
, &phy
->stat1000
);
5049 ret_val
|= e1e_rphy(hw
, MII_ESTATUS
, &phy
->estatus
);
5051 e_warn("Error reading PHY register\n");
5053 /* Do not read PHY registers if link is not up
5054 * Set values to typical power-on defaults
5056 phy
->bmcr
= (BMCR_SPEED1000
| BMCR_ANENABLE
| BMCR_FULLDPLX
);
5057 phy
->bmsr
= (BMSR_100FULL
| BMSR_100HALF
| BMSR_10FULL
|
5058 BMSR_10HALF
| BMSR_ESTATEN
| BMSR_ANEGCAPABLE
|
5060 phy
->advertise
= (ADVERTISE_PAUSE_ASYM
| ADVERTISE_PAUSE_CAP
|
5061 ADVERTISE_ALL
| ADVERTISE_CSMA
);
5063 phy
->expansion
= EXPANSION_ENABLENPAGE
;
5064 phy
->ctrl1000
= ADVERTISE_1000FULL
;
5066 phy
->estatus
= (ESTATUS_1000_TFULL
| ESTATUS_1000_THALF
);
5070 static void e1000_print_link_info(struct e1000_adapter
*adapter
)
5072 struct e1000_hw
*hw
= &adapter
->hw
;
5073 u32 ctrl
= er32(CTRL
);
5075 /* Link status message must follow this format for user tools */
5076 pr_info("%s NIC Link is Up %d Mbps %s Duplex, Flow Control: %s\n",
5077 adapter
->netdev
->name
, adapter
->link_speed
,
5078 adapter
->link_duplex
== FULL_DUPLEX
? "Full" : "Half",
5079 (ctrl
& E1000_CTRL_TFCE
) && (ctrl
& E1000_CTRL_RFCE
) ? "Rx/Tx" :
5080 (ctrl
& E1000_CTRL_RFCE
) ? "Rx" :
5081 (ctrl
& E1000_CTRL_TFCE
) ? "Tx" : "None");
5084 static bool e1000e_has_link(struct e1000_adapter
*adapter
)
5086 struct e1000_hw
*hw
= &adapter
->hw
;
5087 bool link_active
= false;
5090 /* get_link_status is set on LSC (link status) interrupt or
5091 * Rx sequence error interrupt. get_link_status will stay
5092 * true until the check_for_link establishes link
5093 * for copper adapters ONLY
5095 switch (hw
->phy
.media_type
) {
5096 case e1000_media_type_copper
:
5097 if (hw
->mac
.get_link_status
) {
5098 ret_val
= hw
->mac
.ops
.check_for_link(hw
);
5099 link_active
= !hw
->mac
.get_link_status
;
5104 case e1000_media_type_fiber
:
5105 ret_val
= hw
->mac
.ops
.check_for_link(hw
);
5106 link_active
= !!(er32(STATUS
) & E1000_STATUS_LU
);
5108 case e1000_media_type_internal_serdes
:
5109 ret_val
= hw
->mac
.ops
.check_for_link(hw
);
5110 link_active
= hw
->mac
.serdes_has_link
;
5113 case e1000_media_type_unknown
:
5117 if ((ret_val
== -E1000_ERR_PHY
) && (hw
->phy
.type
== e1000_phy_igp_3
) &&
5118 (er32(CTRL
) & E1000_PHY_CTRL_GBE_DISABLE
)) {
5119 /* See e1000_kmrn_lock_loss_workaround_ich8lan() */
5120 e_info("Gigabit has been disabled, downgrading speed\n");
5126 static void e1000e_enable_receives(struct e1000_adapter
*adapter
)
5128 /* make sure the receive unit is started */
5129 if ((adapter
->flags
& FLAG_RX_NEEDS_RESTART
) &&
5130 (adapter
->flags
& FLAG_RESTART_NOW
)) {
5131 struct e1000_hw
*hw
= &adapter
->hw
;
5132 u32 rctl
= er32(RCTL
);
5134 ew32(RCTL
, rctl
| E1000_RCTL_EN
);
5135 adapter
->flags
&= ~FLAG_RESTART_NOW
;
5139 static void e1000e_check_82574_phy_workaround(struct e1000_adapter
*adapter
)
5141 struct e1000_hw
*hw
= &adapter
->hw
;
5143 /* With 82574 controllers, PHY needs to be checked periodically
5144 * for hung state and reset, if two calls return true
5146 if (e1000_check_phy_82574(hw
))
5147 adapter
->phy_hang_count
++;
5149 adapter
->phy_hang_count
= 0;
5151 if (adapter
->phy_hang_count
> 1) {
5152 adapter
->phy_hang_count
= 0;
5153 e_dbg("PHY appears hung - resetting\n");
5154 schedule_work(&adapter
->reset_task
);
5158 static void e1000_watchdog_task(struct work_struct
*work
)
5160 struct e1000_adapter
*adapter
= container_of(work
,
5161 struct e1000_adapter
,
5162 watchdog_task
.work
);
5163 struct net_device
*netdev
= adapter
->netdev
;
5164 struct e1000_mac_info
*mac
= &adapter
->hw
.mac
;
5165 struct e1000_phy_info
*phy
= &adapter
->hw
.phy
;
5166 struct e1000_ring
*tx_ring
= adapter
->tx_ring
;
5167 u32 dmoff_exit_timeout
= 100, tries
= 0;
5168 struct e1000_hw
*hw
= &adapter
->hw
;
5169 u32 link
, tctl
, pcim_state
;
5171 if (test_bit(__E1000_DOWN
, &adapter
->state
))
5174 link
= e1000e_has_link(adapter
);
5175 if ((netif_carrier_ok(netdev
)) && link
) {
5176 /* Cancel scheduled suspend requests. */
5177 pm_runtime_resume(netdev
->dev
.parent
);
5179 e1000e_enable_receives(adapter
);
5183 if ((e1000e_enable_tx_pkt_filtering(hw
)) &&
5184 (adapter
->mng_vlan_id
!= adapter
->hw
.mng_cookie
.vlan_id
))
5185 e1000_update_mng_vlan(adapter
);
5188 if (!netif_carrier_ok(netdev
)) {
5191 /* Cancel scheduled suspend requests. */
5192 pm_runtime_resume(netdev
->dev
.parent
);
5194 /* Checking if MAC is in DMoff state*/
5195 pcim_state
= er32(STATUS
);
5196 while (pcim_state
& E1000_STATUS_PCIM_STATE
) {
5197 if (tries
++ == dmoff_exit_timeout
) {
5198 e_dbg("Error in exiting dmoff\n");
5201 usleep_range(10000, 20000);
5202 pcim_state
= er32(STATUS
);
5204 /* Checking if MAC exited DMoff state */
5205 if (!(pcim_state
& E1000_STATUS_PCIM_STATE
))
5206 e1000_phy_hw_reset(&adapter
->hw
);
5209 /* update snapshot of PHY registers on LSC */
5210 e1000_phy_read_status(adapter
);
5211 mac
->ops
.get_link_up_info(&adapter
->hw
,
5212 &adapter
->link_speed
,
5213 &adapter
->link_duplex
);
5214 e1000_print_link_info(adapter
);
5216 /* check if SmartSpeed worked */
5217 e1000e_check_downshift(hw
);
5218 if (phy
->speed_downgraded
)
5220 "Link Speed was downgraded by SmartSpeed\n");
5222 /* On supported PHYs, check for duplex mismatch only
5223 * if link has autonegotiated at 10/100 half
5225 if ((hw
->phy
.type
== e1000_phy_igp_3
||
5226 hw
->phy
.type
== e1000_phy_bm
) &&
5228 (adapter
->link_speed
== SPEED_10
||
5229 adapter
->link_speed
== SPEED_100
) &&
5230 (adapter
->link_duplex
== HALF_DUPLEX
)) {
5233 e1e_rphy(hw
, MII_EXPANSION
, &autoneg_exp
);
5235 if (!(autoneg_exp
& EXPANSION_NWAY
))
5236 e_info("Autonegotiated half duplex but link partner cannot autoneg. Try forcing full duplex if link gets many collisions.\n");
5239 /* adjust timeout factor according to speed/duplex */
5240 adapter
->tx_timeout_factor
= 1;
5241 switch (adapter
->link_speed
) {
5244 adapter
->tx_timeout_factor
= 16;
5248 adapter
->tx_timeout_factor
= 10;
5252 /* workaround: re-program speed mode bit after
5255 if ((adapter
->flags
& FLAG_TARC_SPEED_MODE_BIT
) &&
5259 tarc0
= er32(TARC(0));
5260 tarc0
&= ~SPEED_MODE_BIT
;
5261 ew32(TARC(0), tarc0
);
5264 /* disable TSO for pcie and 10/100 speeds, to avoid
5265 * some hardware issues
5267 if (!(adapter
->flags
& FLAG_TSO_FORCE
)) {
5268 switch (adapter
->link_speed
) {
5271 e_info("10/100 speed: disabling TSO\n");
5272 netdev
->features
&= ~NETIF_F_TSO
;
5273 netdev
->features
&= ~NETIF_F_TSO6
;
5276 netdev
->features
|= NETIF_F_TSO
;
5277 netdev
->features
|= NETIF_F_TSO6
;
5285 /* enable transmits in the hardware, need to do this
5286 * after setting TARC(0)
5289 tctl
|= E1000_TCTL_EN
;
5292 /* Perform any post-link-up configuration before
5293 * reporting link up.
5295 if (phy
->ops
.cfg_on_link_up
)
5296 phy
->ops
.cfg_on_link_up(hw
);
5298 netif_wake_queue(netdev
);
5299 netif_carrier_on(netdev
);
5301 if (!test_bit(__E1000_DOWN
, &adapter
->state
))
5302 mod_timer(&adapter
->phy_info_timer
,
5303 round_jiffies(jiffies
+ 2 * HZ
));
5306 if (netif_carrier_ok(netdev
)) {
5307 adapter
->link_speed
= 0;
5308 adapter
->link_duplex
= 0;
5309 /* Link status message must follow this format */
5310 pr_info("%s NIC Link is Down\n", adapter
->netdev
->name
);
5311 netif_carrier_off(netdev
);
5312 netif_stop_queue(netdev
);
5313 if (!test_bit(__E1000_DOWN
, &adapter
->state
))
5314 mod_timer(&adapter
->phy_info_timer
,
5315 round_jiffies(jiffies
+ 2 * HZ
));
5317 /* 8000ES2LAN requires a Rx packet buffer work-around
5318 * on link down event; reset the controller to flush
5319 * the Rx packet buffer.
5321 if (adapter
->flags
& FLAG_RX_NEEDS_RESTART
)
5322 adapter
->flags
|= FLAG_RESTART_NOW
;
5324 pm_schedule_suspend(netdev
->dev
.parent
,
5330 spin_lock(&adapter
->stats64_lock
);
5331 e1000e_update_stats(adapter
);
5333 mac
->tx_packet_delta
= adapter
->stats
.tpt
- adapter
->tpt_old
;
5334 adapter
->tpt_old
= adapter
->stats
.tpt
;
5335 mac
->collision_delta
= adapter
->stats
.colc
- adapter
->colc_old
;
5336 adapter
->colc_old
= adapter
->stats
.colc
;
5338 adapter
->gorc
= adapter
->stats
.gorc
- adapter
->gorc_old
;
5339 adapter
->gorc_old
= adapter
->stats
.gorc
;
5340 adapter
->gotc
= adapter
->stats
.gotc
- adapter
->gotc_old
;
5341 adapter
->gotc_old
= adapter
->stats
.gotc
;
5342 spin_unlock(&adapter
->stats64_lock
);
5344 /* If the link is lost the controller stops DMA, but
5345 * if there is queued Tx work it cannot be done. So
5346 * reset the controller to flush the Tx packet buffers.
5348 if (!netif_carrier_ok(netdev
) &&
5349 (e1000_desc_unused(tx_ring
) + 1 < tx_ring
->count
))
5350 adapter
->flags
|= FLAG_RESTART_NOW
;
5352 /* If reset is necessary, do it outside of interrupt context. */
5353 if (adapter
->flags
& FLAG_RESTART_NOW
) {
5354 schedule_work(&adapter
->reset_task
);
5355 /* return immediately since reset is imminent */
5359 e1000e_update_adaptive(&adapter
->hw
);
5361 /* Simple mode for Interrupt Throttle Rate (ITR) */
5362 if (adapter
->itr_setting
== 4) {
5363 /* Symmetric Tx/Rx gets a reduced ITR=2000;
5364 * Total asymmetrical Tx or Rx gets ITR=8000;
5365 * everyone else is between 2000-8000.
5367 u32 goc
= (adapter
->gotc
+ adapter
->gorc
) / 10000;
5368 u32 dif
= (adapter
->gotc
> adapter
->gorc
?
5369 adapter
->gotc
- adapter
->gorc
:
5370 adapter
->gorc
- adapter
->gotc
) / 10000;
5371 u32 itr
= goc
> 0 ? (dif
* 6000 / goc
+ 2000) : 8000;
5373 e1000e_write_itr(adapter
, itr
);
5376 /* Cause software interrupt to ensure Rx ring is cleaned */
5377 if (adapter
->msix_entries
)
5378 ew32(ICS
, adapter
->rx_ring
->ims_val
);
5380 ew32(ICS
, E1000_ICS_RXDMT0
);
5382 /* flush pending descriptors to memory before detecting Tx hang */
5383 e1000e_flush_descriptors(adapter
);
5385 /* Force detection of hung controller every watchdog period */
5386 adapter
->detect_tx_hung
= true;
5388 /* With 82571 controllers, LAA may be overwritten due to controller
5389 * reset from the other port. Set the appropriate LAA in RAR[0]
5391 if (e1000e_get_laa_state_82571(hw
))
5392 hw
->mac
.ops
.rar_set(hw
, adapter
->hw
.mac
.addr
, 0);
5394 if (adapter
->flags2
& FLAG2_CHECK_PHY_HANG
)
5395 e1000e_check_82574_phy_workaround(adapter
);
5397 /* Clear valid timestamp stuck in RXSTMPL/H due to a Rx error */
5398 if (adapter
->hwtstamp_config
.rx_filter
!= HWTSTAMP_FILTER_NONE
) {
5399 if ((adapter
->flags2
& FLAG2_CHECK_RX_HWTSTAMP
) &&
5400 (er32(TSYNCRXCTL
) & E1000_TSYNCRXCTL_VALID
)) {
5402 adapter
->rx_hwtstamp_cleared
++;
5404 adapter
->flags2
|= FLAG2_CHECK_RX_HWTSTAMP
;
5408 /* Reset the timer */
5409 if (!test_bit(__E1000_DOWN
, &adapter
->state
))
5410 queue_delayed_work(adapter
->e1000_workqueue
,
5411 &adapter
->watchdog_task
,
5412 round_jiffies(2 * HZ
));
5415 #define E1000_TX_FLAGS_CSUM 0x00000001
5416 #define E1000_TX_FLAGS_VLAN 0x00000002
5417 #define E1000_TX_FLAGS_TSO 0x00000004
5418 #define E1000_TX_FLAGS_IPV4 0x00000008
5419 #define E1000_TX_FLAGS_NO_FCS 0x00000010
5420 #define E1000_TX_FLAGS_HWTSTAMP 0x00000020
5421 #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
5422 #define E1000_TX_FLAGS_VLAN_SHIFT 16
5424 static int e1000_tso(struct e1000_ring
*tx_ring
, struct sk_buff
*skb
,
5427 struct e1000_context_desc
*context_desc
;
5428 struct e1000_buffer
*buffer_info
;
5432 u8 ipcss
, ipcso
, tucss
, tucso
, hdr_len
;
5435 if (!skb_is_gso(skb
))
5438 err
= skb_cow_head(skb
, 0);
5442 hdr_len
= skb_transport_offset(skb
) + tcp_hdrlen(skb
);
5443 mss
= skb_shinfo(skb
)->gso_size
;
5444 if (protocol
== htons(ETH_P_IP
)) {
5445 struct iphdr
*iph
= ip_hdr(skb
);
5448 tcp_hdr(skb
)->check
= ~csum_tcpudp_magic(iph
->saddr
, iph
->daddr
,
5450 cmd_length
= E1000_TXD_CMD_IP
;
5451 ipcse
= skb_transport_offset(skb
) - 1;
5452 } else if (skb_is_gso_v6(skb
)) {
5453 ipv6_hdr(skb
)->payload_len
= 0;
5454 tcp_hdr(skb
)->check
= ~csum_ipv6_magic(&ipv6_hdr(skb
)->saddr
,
5455 &ipv6_hdr(skb
)->daddr
,
5459 ipcss
= skb_network_offset(skb
);
5460 ipcso
= (void *)&(ip_hdr(skb
)->check
) - (void *)skb
->data
;
5461 tucss
= skb_transport_offset(skb
);
5462 tucso
= (void *)&(tcp_hdr(skb
)->check
) - (void *)skb
->data
;
5464 cmd_length
|= (E1000_TXD_CMD_DEXT
| E1000_TXD_CMD_TSE
|
5465 E1000_TXD_CMD_TCP
| (skb
->len
- (hdr_len
)));
5467 i
= tx_ring
->next_to_use
;
5468 context_desc
= E1000_CONTEXT_DESC(*tx_ring
, i
);
5469 buffer_info
= &tx_ring
->buffer_info
[i
];
5471 context_desc
->lower_setup
.ip_fields
.ipcss
= ipcss
;
5472 context_desc
->lower_setup
.ip_fields
.ipcso
= ipcso
;
5473 context_desc
->lower_setup
.ip_fields
.ipcse
= cpu_to_le16(ipcse
);
5474 context_desc
->upper_setup
.tcp_fields
.tucss
= tucss
;
5475 context_desc
->upper_setup
.tcp_fields
.tucso
= tucso
;
5476 context_desc
->upper_setup
.tcp_fields
.tucse
= 0;
5477 context_desc
->tcp_seg_setup
.fields
.mss
= cpu_to_le16(mss
);
5478 context_desc
->tcp_seg_setup
.fields
.hdr_len
= hdr_len
;
5479 context_desc
->cmd_and_length
= cpu_to_le32(cmd_length
);
5481 buffer_info
->time_stamp
= jiffies
;
5482 buffer_info
->next_to_watch
= i
;
5485 if (i
== tx_ring
->count
)
5487 tx_ring
->next_to_use
= i
;
5492 static bool e1000_tx_csum(struct e1000_ring
*tx_ring
, struct sk_buff
*skb
,
5495 struct e1000_adapter
*adapter
= tx_ring
->adapter
;
5496 struct e1000_context_desc
*context_desc
;
5497 struct e1000_buffer
*buffer_info
;
5500 u32 cmd_len
= E1000_TXD_CMD_DEXT
;
5502 if (skb
->ip_summed
!= CHECKSUM_PARTIAL
)
5506 case cpu_to_be16(ETH_P_IP
):
5507 if (ip_hdr(skb
)->protocol
== IPPROTO_TCP
)
5508 cmd_len
|= E1000_TXD_CMD_TCP
;
5510 case cpu_to_be16(ETH_P_IPV6
):
5511 /* XXX not handling all IPV6 headers */
5512 if (ipv6_hdr(skb
)->nexthdr
== IPPROTO_TCP
)
5513 cmd_len
|= E1000_TXD_CMD_TCP
;
5516 if (unlikely(net_ratelimit()))
5517 e_warn("checksum_partial proto=%x!\n",
5518 be16_to_cpu(protocol
));
5522 css
= skb_checksum_start_offset(skb
);
5524 i
= tx_ring
->next_to_use
;
5525 buffer_info
= &tx_ring
->buffer_info
[i
];
5526 context_desc
= E1000_CONTEXT_DESC(*tx_ring
, i
);
5528 context_desc
->lower_setup
.ip_config
= 0;
5529 context_desc
->upper_setup
.tcp_fields
.tucss
= css
;
5530 context_desc
->upper_setup
.tcp_fields
.tucso
= css
+ skb
->csum_offset
;
5531 context_desc
->upper_setup
.tcp_fields
.tucse
= 0;
5532 context_desc
->tcp_seg_setup
.data
= 0;
5533 context_desc
->cmd_and_length
= cpu_to_le32(cmd_len
);
5535 buffer_info
->time_stamp
= jiffies
;
5536 buffer_info
->next_to_watch
= i
;
5539 if (i
== tx_ring
->count
)
5541 tx_ring
->next_to_use
= i
;
5546 static int e1000_tx_map(struct e1000_ring
*tx_ring
, struct sk_buff
*skb
,
5547 unsigned int first
, unsigned int max_per_txd
,
5548 unsigned int nr_frags
)
5550 struct e1000_adapter
*adapter
= tx_ring
->adapter
;
5551 struct pci_dev
*pdev
= adapter
->pdev
;
5552 struct e1000_buffer
*buffer_info
;
5553 unsigned int len
= skb_headlen(skb
);
5554 unsigned int offset
= 0, size
, count
= 0, i
;
5555 unsigned int f
, bytecount
, segs
;
5557 i
= tx_ring
->next_to_use
;
5560 buffer_info
= &tx_ring
->buffer_info
[i
];
5561 size
= min(len
, max_per_txd
);
5563 buffer_info
->length
= size
;
5564 buffer_info
->time_stamp
= jiffies
;
5565 buffer_info
->next_to_watch
= i
;
5566 buffer_info
->dma
= dma_map_single(&pdev
->dev
,
5568 size
, DMA_TO_DEVICE
);
5569 buffer_info
->mapped_as_page
= false;
5570 if (dma_mapping_error(&pdev
->dev
, buffer_info
->dma
))
5579 if (i
== tx_ring
->count
)
5584 for (f
= 0; f
< nr_frags
; f
++) {
5585 const skb_frag_t
*frag
= &skb_shinfo(skb
)->frags
[f
];
5587 len
= skb_frag_size(frag
);
5592 if (i
== tx_ring
->count
)
5595 buffer_info
= &tx_ring
->buffer_info
[i
];
5596 size
= min(len
, max_per_txd
);
5598 buffer_info
->length
= size
;
5599 buffer_info
->time_stamp
= jiffies
;
5600 buffer_info
->next_to_watch
= i
;
5601 buffer_info
->dma
= skb_frag_dma_map(&pdev
->dev
, frag
,
5604 buffer_info
->mapped_as_page
= true;
5605 if (dma_mapping_error(&pdev
->dev
, buffer_info
->dma
))
5614 segs
= skb_shinfo(skb
)->gso_segs
? : 1;
5615 /* multiply data chunks by size of headers */
5616 bytecount
= ((segs
- 1) * skb_headlen(skb
)) + skb
->len
;
5618 tx_ring
->buffer_info
[i
].skb
= skb
;
5619 tx_ring
->buffer_info
[i
].segs
= segs
;
5620 tx_ring
->buffer_info
[i
].bytecount
= bytecount
;
5621 tx_ring
->buffer_info
[first
].next_to_watch
= i
;
5626 dev_err(&pdev
->dev
, "Tx DMA map failed\n");
5627 buffer_info
->dma
= 0;
5633 i
+= tx_ring
->count
;
5635 buffer_info
= &tx_ring
->buffer_info
[i
];
5636 e1000_put_txbuf(tx_ring
, buffer_info
, true);
5642 static void e1000_tx_queue(struct e1000_ring
*tx_ring
, int tx_flags
, int count
)
5644 struct e1000_adapter
*adapter
= tx_ring
->adapter
;
5645 struct e1000_tx_desc
*tx_desc
= NULL
;
5646 struct e1000_buffer
*buffer_info
;
5647 u32 txd_upper
= 0, txd_lower
= E1000_TXD_CMD_IFCS
;
5650 if (tx_flags
& E1000_TX_FLAGS_TSO
) {
5651 txd_lower
|= E1000_TXD_CMD_DEXT
| E1000_TXD_DTYP_D
|
5653 txd_upper
|= E1000_TXD_POPTS_TXSM
<< 8;
5655 if (tx_flags
& E1000_TX_FLAGS_IPV4
)
5656 txd_upper
|= E1000_TXD_POPTS_IXSM
<< 8;
5659 if (tx_flags
& E1000_TX_FLAGS_CSUM
) {
5660 txd_lower
|= E1000_TXD_CMD_DEXT
| E1000_TXD_DTYP_D
;
5661 txd_upper
|= E1000_TXD_POPTS_TXSM
<< 8;
5664 if (tx_flags
& E1000_TX_FLAGS_VLAN
) {
5665 txd_lower
|= E1000_TXD_CMD_VLE
;
5666 txd_upper
|= (tx_flags
& E1000_TX_FLAGS_VLAN_MASK
);
5669 if (unlikely(tx_flags
& E1000_TX_FLAGS_NO_FCS
))
5670 txd_lower
&= ~(E1000_TXD_CMD_IFCS
);
5672 if (unlikely(tx_flags
& E1000_TX_FLAGS_HWTSTAMP
)) {
5673 txd_lower
|= E1000_TXD_CMD_DEXT
| E1000_TXD_DTYP_D
;
5674 txd_upper
|= E1000_TXD_EXTCMD_TSTAMP
;
5677 i
= tx_ring
->next_to_use
;
5680 buffer_info
= &tx_ring
->buffer_info
[i
];
5681 tx_desc
= E1000_TX_DESC(*tx_ring
, i
);
5682 tx_desc
->buffer_addr
= cpu_to_le64(buffer_info
->dma
);
5683 tx_desc
->lower
.data
= cpu_to_le32(txd_lower
|
5684 buffer_info
->length
);
5685 tx_desc
->upper
.data
= cpu_to_le32(txd_upper
);
5688 if (i
== tx_ring
->count
)
5690 } while (--count
> 0);
5692 tx_desc
->lower
.data
|= cpu_to_le32(adapter
->txd_cmd
);
5694 /* txd_cmd re-enables FCS, so we'll re-disable it here as desired. */
5695 if (unlikely(tx_flags
& E1000_TX_FLAGS_NO_FCS
))
5696 tx_desc
->lower
.data
&= ~(cpu_to_le32(E1000_TXD_CMD_IFCS
));
5698 /* Force memory writes to complete before letting h/w
5699 * know there are new descriptors to fetch. (Only
5700 * applicable for weak-ordered memory model archs,
5705 tx_ring
->next_to_use
= i
;
5708 #define MINIMUM_DHCP_PACKET_SIZE 282
5709 static int e1000_transfer_dhcp_info(struct e1000_adapter
*adapter
,
5710 struct sk_buff
*skb
)
5712 struct e1000_hw
*hw
= &adapter
->hw
;
5715 if (skb_vlan_tag_present(skb
) &&
5716 !((skb_vlan_tag_get(skb
) == adapter
->hw
.mng_cookie
.vlan_id
) &&
5717 (adapter
->hw
.mng_cookie
.status
&
5718 E1000_MNG_DHCP_COOKIE_STATUS_VLAN
)))
5721 if (skb
->len
<= MINIMUM_DHCP_PACKET_SIZE
)
5724 if (((struct ethhdr
*)skb
->data
)->h_proto
!= htons(ETH_P_IP
))
5728 const struct iphdr
*ip
= (struct iphdr
*)((u8
*)skb
->data
+ 14);
5731 if (ip
->protocol
!= IPPROTO_UDP
)
5734 udp
= (struct udphdr
*)((u8
*)ip
+ (ip
->ihl
<< 2));
5735 if (ntohs(udp
->dest
) != 67)
5738 offset
= (u8
*)udp
+ 8 - skb
->data
;
5739 length
= skb
->len
- offset
;
5740 return e1000e_mng_write_dhcp_info(hw
, (u8
*)udp
+ 8, length
);
5746 static int __e1000_maybe_stop_tx(struct e1000_ring
*tx_ring
, int size
)
5748 struct e1000_adapter
*adapter
= tx_ring
->adapter
;
5750 netif_stop_queue(adapter
->netdev
);
5751 /* Herbert's original patch had:
5752 * smp_mb__after_netif_stop_queue();
5753 * but since that doesn't exist yet, just open code it.
5757 /* We need to check again in a case another CPU has just
5758 * made room available.
5760 if (e1000_desc_unused(tx_ring
) < size
)
5764 netif_start_queue(adapter
->netdev
);
5765 ++adapter
->restart_queue
;
5769 static int e1000_maybe_stop_tx(struct e1000_ring
*tx_ring
, int size
)
5771 BUG_ON(size
> tx_ring
->count
);
5773 if (e1000_desc_unused(tx_ring
) >= size
)
5775 return __e1000_maybe_stop_tx(tx_ring
, size
);
5778 static netdev_tx_t
e1000_xmit_frame(struct sk_buff
*skb
,
5779 struct net_device
*netdev
)
5781 struct e1000_adapter
*adapter
= netdev_priv(netdev
);
5782 struct e1000_ring
*tx_ring
= adapter
->tx_ring
;
5784 unsigned int tx_flags
= 0;
5785 unsigned int len
= skb_headlen(skb
);
5786 unsigned int nr_frags
;
5791 __be16 protocol
= vlan_get_protocol(skb
);
5793 if (test_bit(__E1000_DOWN
, &adapter
->state
)) {
5794 dev_kfree_skb_any(skb
);
5795 return NETDEV_TX_OK
;
5798 if (skb
->len
<= 0) {
5799 dev_kfree_skb_any(skb
);
5800 return NETDEV_TX_OK
;
5803 /* The minimum packet size with TCTL.PSP set is 17 bytes so
5804 * pad skb in order to meet this minimum size requirement
5806 if (skb_put_padto(skb
, 17))
5807 return NETDEV_TX_OK
;
5809 mss
= skb_shinfo(skb
)->gso_size
;
5813 /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
5814 * points to just header, pull a few bytes of payload from
5815 * frags into skb->data
5817 hdr_len
= skb_transport_offset(skb
) + tcp_hdrlen(skb
);
5818 /* we do this workaround for ES2LAN, but it is un-necessary,
5819 * avoiding it could save a lot of cycles
5821 if (skb
->data_len
&& (hdr_len
== len
)) {
5822 unsigned int pull_size
;
5824 pull_size
= min_t(unsigned int, 4, skb
->data_len
);
5825 if (!__pskb_pull_tail(skb
, pull_size
)) {
5826 e_err("__pskb_pull_tail failed.\n");
5827 dev_kfree_skb_any(skb
);
5828 return NETDEV_TX_OK
;
5830 len
= skb_headlen(skb
);
5834 /* reserve a descriptor for the offload context */
5835 if ((mss
) || (skb
->ip_summed
== CHECKSUM_PARTIAL
))
5839 count
+= DIV_ROUND_UP(len
, adapter
->tx_fifo_limit
);
5841 nr_frags
= skb_shinfo(skb
)->nr_frags
;
5842 for (f
= 0; f
< nr_frags
; f
++)
5843 count
+= DIV_ROUND_UP(skb_frag_size(&skb_shinfo(skb
)->frags
[f
]),
5844 adapter
->tx_fifo_limit
);
5846 if (adapter
->hw
.mac
.tx_pkt_filtering
)
5847 e1000_transfer_dhcp_info(adapter
, skb
);
5849 /* need: count + 2 desc gap to keep tail from touching
5850 * head, otherwise try next time
5852 if (e1000_maybe_stop_tx(tx_ring
, count
+ 2))
5853 return NETDEV_TX_BUSY
;
5855 if (skb_vlan_tag_present(skb
)) {
5856 tx_flags
|= E1000_TX_FLAGS_VLAN
;
5857 tx_flags
|= (skb_vlan_tag_get(skb
) <<
5858 E1000_TX_FLAGS_VLAN_SHIFT
);
5861 first
= tx_ring
->next_to_use
;
5863 tso
= e1000_tso(tx_ring
, skb
, protocol
);
5865 dev_kfree_skb_any(skb
);
5866 return NETDEV_TX_OK
;
5870 tx_flags
|= E1000_TX_FLAGS_TSO
;
5871 else if (e1000_tx_csum(tx_ring
, skb
, protocol
))
5872 tx_flags
|= E1000_TX_FLAGS_CSUM
;
5874 /* Old method was to assume IPv4 packet by default if TSO was enabled.
5875 * 82571 hardware supports TSO capabilities for IPv6 as well...
5876 * no longer assume, we must.
5878 if (protocol
== htons(ETH_P_IP
))
5879 tx_flags
|= E1000_TX_FLAGS_IPV4
;
5881 if (unlikely(skb
->no_fcs
))
5882 tx_flags
|= E1000_TX_FLAGS_NO_FCS
;
5884 /* if count is 0 then mapping error has occurred */
5885 count
= e1000_tx_map(tx_ring
, skb
, first
, adapter
->tx_fifo_limit
,
5888 if (unlikely(skb_shinfo(skb
)->tx_flags
& SKBTX_HW_TSTAMP
) &&
5889 (adapter
->flags
& FLAG_HAS_HW_TIMESTAMP
)) {
5890 if (!adapter
->tx_hwtstamp_skb
) {
5891 skb_shinfo(skb
)->tx_flags
|= SKBTX_IN_PROGRESS
;
5892 tx_flags
|= E1000_TX_FLAGS_HWTSTAMP
;
5893 adapter
->tx_hwtstamp_skb
= skb_get(skb
);
5894 adapter
->tx_hwtstamp_start
= jiffies
;
5895 schedule_work(&adapter
->tx_hwtstamp_work
);
5897 adapter
->tx_hwtstamp_skipped
++;
5901 skb_tx_timestamp(skb
);
5903 netdev_sent_queue(netdev
, skb
->len
);
5904 e1000_tx_queue(tx_ring
, tx_flags
, count
);
5905 /* Make sure there is space in the ring for the next send. */
5906 e1000_maybe_stop_tx(tx_ring
,
5908 DIV_ROUND_UP(PAGE_SIZE
,
5909 adapter
->tx_fifo_limit
) + 2));
5911 if (!netdev_xmit_more() ||
5912 netif_xmit_stopped(netdev_get_tx_queue(netdev
, 0))) {
5913 if (adapter
->flags2
& FLAG2_PCIM2PCI_ARBITER_WA
)
5914 e1000e_update_tdt_wa(tx_ring
,
5915 tx_ring
->next_to_use
);
5917 writel(tx_ring
->next_to_use
, tx_ring
->tail
);
5920 dev_kfree_skb_any(skb
);
5921 tx_ring
->buffer_info
[first
].time_stamp
= 0;
5922 tx_ring
->next_to_use
= first
;
5925 return NETDEV_TX_OK
;
5929 * e1000_tx_timeout - Respond to a Tx Hang
5930 * @netdev: network interface device structure
5932 static void e1000_tx_timeout(struct net_device
*netdev
)
5934 struct e1000_adapter
*adapter
= netdev_priv(netdev
);
5936 /* Do the reset outside of interrupt context */
5937 adapter
->tx_timeout_count
++;
5938 schedule_work(&adapter
->reset_task
);
5941 static void e1000_reset_task(struct work_struct
*work
)
5943 struct e1000_adapter
*adapter
;
5944 adapter
= container_of(work
, struct e1000_adapter
, reset_task
);
5946 /* don't run the task if already down */
5947 if (test_bit(__E1000_DOWN
, &adapter
->state
))
5950 if (!(adapter
->flags
& FLAG_RESTART_NOW
)) {
5951 e1000e_dump(adapter
);
5952 e_err("Reset adapter unexpectedly\n");
5954 e1000e_reinit_locked(adapter
);
5958 * e1000_get_stats64 - Get System Network Statistics
5959 * @netdev: network interface device structure
5960 * @stats: rtnl_link_stats64 pointer
5962 * Returns the address of the device statistics structure.
5964 void e1000e_get_stats64(struct net_device
*netdev
,
5965 struct rtnl_link_stats64
*stats
)
5967 struct e1000_adapter
*adapter
= netdev_priv(netdev
);
5969 spin_lock(&adapter
->stats64_lock
);
5970 e1000e_update_stats(adapter
);
5971 /* Fill out the OS statistics structure */
5972 stats
->rx_bytes
= adapter
->stats
.gorc
;
5973 stats
->rx_packets
= adapter
->stats
.gprc
;
5974 stats
->tx_bytes
= adapter
->stats
.gotc
;
5975 stats
->tx_packets
= adapter
->stats
.gptc
;
5976 stats
->multicast
= adapter
->stats
.mprc
;
5977 stats
->collisions
= adapter
->stats
.colc
;
5981 /* RLEC on some newer hardware can be incorrect so build
5982 * our own version based on RUC and ROC
5984 stats
->rx_errors
= adapter
->stats
.rxerrc
+
5985 adapter
->stats
.crcerrs
+ adapter
->stats
.algnerrc
+
5986 adapter
->stats
.ruc
+ adapter
->stats
.roc
+ adapter
->stats
.cexterr
;
5987 stats
->rx_length_errors
= adapter
->stats
.ruc
+ adapter
->stats
.roc
;
5988 stats
->rx_crc_errors
= adapter
->stats
.crcerrs
;
5989 stats
->rx_frame_errors
= adapter
->stats
.algnerrc
;
5990 stats
->rx_missed_errors
= adapter
->stats
.mpc
;
5993 stats
->tx_errors
= adapter
->stats
.ecol
+ adapter
->stats
.latecol
;
5994 stats
->tx_aborted_errors
= adapter
->stats
.ecol
;
5995 stats
->tx_window_errors
= adapter
->stats
.latecol
;
5996 stats
->tx_carrier_errors
= adapter
->stats
.tncrs
;
5998 /* Tx Dropped needs to be maintained elsewhere */
6000 spin_unlock(&adapter
->stats64_lock
);
6004 * e1000_change_mtu - Change the Maximum Transfer Unit
6005 * @netdev: network interface device structure
6006 * @new_mtu: new value for maximum frame size
6008 * Returns 0 on success, negative on failure
6010 static int e1000_change_mtu(struct net_device
*netdev
, int new_mtu
)
6012 struct e1000_adapter
*adapter
= netdev_priv(netdev
);
6013 int max_frame
= new_mtu
+ VLAN_ETH_HLEN
+ ETH_FCS_LEN
;
6015 /* Jumbo frame support */
6016 if ((new_mtu
> ETH_DATA_LEN
) &&
6017 !(adapter
->flags
& FLAG_HAS_JUMBO_FRAMES
)) {
6018 e_err("Jumbo Frames not supported.\n");
6022 /* Jumbo frame workaround on 82579 and newer requires CRC be stripped */
6023 if ((adapter
->hw
.mac
.type
>= e1000_pch2lan
) &&
6024 !(adapter
->flags2
& FLAG2_CRC_STRIPPING
) &&
6025 (new_mtu
> ETH_DATA_LEN
)) {
6026 e_err("Jumbo Frames not supported on this device when CRC stripping is disabled.\n");
6030 while (test_and_set_bit(__E1000_RESETTING
, &adapter
->state
))
6031 usleep_range(1000, 1100);
6032 /* e1000e_down -> e1000e_reset dependent on max_frame_size & mtu */
6033 adapter
->max_frame_size
= max_frame
;
6034 netdev_dbg(netdev
, "changing MTU from %d to %d\n",
6035 netdev
->mtu
, new_mtu
);
6036 netdev
->mtu
= new_mtu
;
6038 pm_runtime_get_sync(netdev
->dev
.parent
);
6040 if (netif_running(netdev
))
6041 e1000e_down(adapter
, true);
6043 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
6044 * means we reserve 2 more, this pushes us to allocate from the next
6046 * i.e. RXBUFFER_2048 --> size-4096 slab
6047 * However with the new *_jumbo_rx* routines, jumbo receives will use
6051 if (max_frame
<= 2048)
6052 adapter
->rx_buffer_len
= 2048;
6054 adapter
->rx_buffer_len
= 4096;
6056 /* adjust allocation if LPE protects us, and we aren't using SBP */
6057 if (max_frame
<= (VLAN_ETH_FRAME_LEN
+ ETH_FCS_LEN
))
6058 adapter
->rx_buffer_len
= VLAN_ETH_FRAME_LEN
+ ETH_FCS_LEN
;
6060 if (netif_running(netdev
))
6063 e1000e_reset(adapter
);
6065 pm_runtime_put_sync(netdev
->dev
.parent
);
6067 clear_bit(__E1000_RESETTING
, &adapter
->state
);
6072 static int e1000_mii_ioctl(struct net_device
*netdev
, struct ifreq
*ifr
,
6075 struct e1000_adapter
*adapter
= netdev_priv(netdev
);
6076 struct mii_ioctl_data
*data
= if_mii(ifr
);
6078 if (adapter
->hw
.phy
.media_type
!= e1000_media_type_copper
)
6083 data
->phy_id
= adapter
->hw
.phy
.addr
;
6086 e1000_phy_read_status(adapter
);
6088 switch (data
->reg_num
& 0x1F) {
6090 data
->val_out
= adapter
->phy_regs
.bmcr
;
6093 data
->val_out
= adapter
->phy_regs
.bmsr
;
6096 data
->val_out
= (adapter
->hw
.phy
.id
>> 16);
6099 data
->val_out
= (adapter
->hw
.phy
.id
& 0xFFFF);
6102 data
->val_out
= adapter
->phy_regs
.advertise
;
6105 data
->val_out
= adapter
->phy_regs
.lpa
;
6108 data
->val_out
= adapter
->phy_regs
.expansion
;
6111 data
->val_out
= adapter
->phy_regs
.ctrl1000
;
6114 data
->val_out
= adapter
->phy_regs
.stat1000
;
6117 data
->val_out
= adapter
->phy_regs
.estatus
;
6131 * e1000e_hwtstamp_ioctl - control hardware time stamping
6132 * @netdev: network interface device structure
6133 * @ifreq: interface request
6135 * Outgoing time stamping can be enabled and disabled. Play nice and
6136 * disable it when requested, although it shouldn't cause any overhead
6137 * when no packet needs it. At most one packet in the queue may be
6138 * marked for time stamping, otherwise it would be impossible to tell
6139 * for sure to which packet the hardware time stamp belongs.
6141 * Incoming time stamping has to be configured via the hardware filters.
6142 * Not all combinations are supported, in particular event type has to be
6143 * specified. Matching the kind of event packet is not supported, with the
6144 * exception of "all V2 events regardless of level 2 or 4".
6146 static int e1000e_hwtstamp_set(struct net_device
*netdev
, struct ifreq
*ifr
)
6148 struct e1000_adapter
*adapter
= netdev_priv(netdev
);
6149 struct hwtstamp_config config
;
6152 if (copy_from_user(&config
, ifr
->ifr_data
, sizeof(config
)))
6155 ret_val
= e1000e_config_hwtstamp(adapter
, &config
);
6159 switch (config
.rx_filter
) {
6160 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC
:
6161 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC
:
6162 case HWTSTAMP_FILTER_PTP_V2_SYNC
:
6163 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ
:
6164 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ
:
6165 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ
:
6166 /* With V2 type filters which specify a Sync or Delay Request,
6167 * Path Delay Request/Response messages are also time stamped
6168 * by hardware so notify the caller the requested packets plus
6169 * some others are time stamped.
6171 config
.rx_filter
= HWTSTAMP_FILTER_SOME
;
6177 return copy_to_user(ifr
->ifr_data
, &config
,
6178 sizeof(config
)) ? -EFAULT
: 0;
6181 static int e1000e_hwtstamp_get(struct net_device
*netdev
, struct ifreq
*ifr
)
6183 struct e1000_adapter
*adapter
= netdev_priv(netdev
);
6185 return copy_to_user(ifr
->ifr_data
, &adapter
->hwtstamp_config
,
6186 sizeof(adapter
->hwtstamp_config
)) ? -EFAULT
: 0;
6189 static int e1000_ioctl(struct net_device
*netdev
, struct ifreq
*ifr
, int cmd
)
6195 return e1000_mii_ioctl(netdev
, ifr
, cmd
);
6197 return e1000e_hwtstamp_set(netdev
, ifr
);
6199 return e1000e_hwtstamp_get(netdev
, ifr
);
6205 static int e1000_init_phy_wakeup(struct e1000_adapter
*adapter
, u32 wufc
)
6207 struct e1000_hw
*hw
= &adapter
->hw
;
6208 u32 i
, mac_reg
, wuc
;
6209 u16 phy_reg
, wuc_enable
;
6212 /* copy MAC RARs to PHY RARs */
6213 e1000_copy_rx_addrs_to_phy_ich8lan(hw
);
6215 retval
= hw
->phy
.ops
.acquire(hw
);
6217 e_err("Could not acquire PHY\n");
6221 /* Enable access to wakeup registers on and set page to BM_WUC_PAGE */
6222 retval
= e1000_enable_phy_wakeup_reg_access_bm(hw
, &wuc_enable
);
6226 /* copy MAC MTA to PHY MTA - only needed for pchlan */
6227 for (i
= 0; i
< adapter
->hw
.mac
.mta_reg_count
; i
++) {
6228 mac_reg
= E1000_READ_REG_ARRAY(hw
, E1000_MTA
, i
);
6229 hw
->phy
.ops
.write_reg_page(hw
, BM_MTA(i
),
6230 (u16
)(mac_reg
& 0xFFFF));
6231 hw
->phy
.ops
.write_reg_page(hw
, BM_MTA(i
) + 1,
6232 (u16
)((mac_reg
>> 16) & 0xFFFF));
6235 /* configure PHY Rx Control register */
6236 hw
->phy
.ops
.read_reg_page(&adapter
->hw
, BM_RCTL
, &phy_reg
);
6237 mac_reg
= er32(RCTL
);
6238 if (mac_reg
& E1000_RCTL_UPE
)
6239 phy_reg
|= BM_RCTL_UPE
;
6240 if (mac_reg
& E1000_RCTL_MPE
)
6241 phy_reg
|= BM_RCTL_MPE
;
6242 phy_reg
&= ~(BM_RCTL_MO_MASK
);
6243 if (mac_reg
& E1000_RCTL_MO_3
)
6244 phy_reg
|= (((mac_reg
& E1000_RCTL_MO_3
) >> E1000_RCTL_MO_SHIFT
)
6245 << BM_RCTL_MO_SHIFT
);
6246 if (mac_reg
& E1000_RCTL_BAM
)
6247 phy_reg
|= BM_RCTL_BAM
;
6248 if (mac_reg
& E1000_RCTL_PMCF
)
6249 phy_reg
|= BM_RCTL_PMCF
;
6250 mac_reg
= er32(CTRL
);
6251 if (mac_reg
& E1000_CTRL_RFCE
)
6252 phy_reg
|= BM_RCTL_RFCE
;
6253 hw
->phy
.ops
.write_reg_page(&adapter
->hw
, BM_RCTL
, phy_reg
);
6255 wuc
= E1000_WUC_PME_EN
;
6256 if (wufc
& (E1000_WUFC_MAG
| E1000_WUFC_LNKC
))
6257 wuc
|= E1000_WUC_APME
;
6259 /* enable PHY wakeup in MAC register */
6261 ew32(WUC
, (E1000_WUC_PHY_WAKE
| E1000_WUC_APMPME
|
6262 E1000_WUC_PME_STATUS
| wuc
));
6264 /* configure and enable PHY wakeup in PHY registers */
6265 hw
->phy
.ops
.write_reg_page(&adapter
->hw
, BM_WUFC
, wufc
);
6266 hw
->phy
.ops
.write_reg_page(&adapter
->hw
, BM_WUC
, wuc
);
6268 /* activate PHY wakeup */
6269 wuc_enable
|= BM_WUC_ENABLE_BIT
| BM_WUC_HOST_WU_BIT
;
6270 retval
= e1000_disable_phy_wakeup_reg_access_bm(hw
, &wuc_enable
);
6272 e_err("Could not set PHY Host Wakeup bit\n");
6274 hw
->phy
.ops
.release(hw
);
6279 static void e1000e_flush_lpic(struct pci_dev
*pdev
)
6281 struct net_device
*netdev
= pci_get_drvdata(pdev
);
6282 struct e1000_adapter
*adapter
= netdev_priv(netdev
);
6283 struct e1000_hw
*hw
= &adapter
->hw
;
6286 pm_runtime_get_sync(netdev
->dev
.parent
);
6288 ret_val
= hw
->phy
.ops
.acquire(hw
);
6292 pr_info("EEE TX LPI TIMER: %08X\n",
6293 er32(LPIC
) >> E1000_LPIC_LPIET_SHIFT
);
6295 hw
->phy
.ops
.release(hw
);
6298 pm_runtime_put_sync(netdev
->dev
.parent
);
6301 #ifdef CONFIG_PM_SLEEP
6302 /* S0ix implementation */
6303 static void e1000e_s0ix_entry_flow(struct e1000_adapter
*adapter
)
6305 struct e1000_hw
*hw
= &adapter
->hw
;
6309 /* Disable the periodic inband message,
6310 * don't request PCIe clock in K1 page770_17[10:9] = 10b
6312 e1e_rphy(hw
, HV_PM_CTRL
, &phy_data
);
6313 phy_data
&= ~HV_PM_CTRL_K1_CLK_REQ
;
6314 phy_data
|= BIT(10);
6315 e1e_wphy(hw
, HV_PM_CTRL
, phy_data
);
6317 /* Make sure we don't exit K1 every time a new packet arrives
6318 * 772_29[5] = 1 CS_Mode_Stay_In_K1
6320 e1e_rphy(hw
, I217_CGFREG
, &phy_data
);
6322 e1e_wphy(hw
, I217_CGFREG
, phy_data
);
6324 /* Change the MAC/PHY interface to SMBus
6325 * Force the SMBus in PHY page769_23[0] = 1
6326 * Force the SMBus in MAC CTRL_EXT[11] = 1
6328 e1e_rphy(hw
, CV_SMB_CTRL
, &phy_data
);
6329 phy_data
|= CV_SMB_CTRL_FORCE_SMBUS
;
6330 e1e_wphy(hw
, CV_SMB_CTRL
, phy_data
);
6331 mac_data
= er32(CTRL_EXT
);
6332 mac_data
|= E1000_CTRL_EXT_FORCE_SMBUS
;
6333 ew32(CTRL_EXT
, mac_data
);
6335 /* DFT control: PHY bit: page769_20[0] = 1
6336 * Gate PPW via EXTCNF_CTRL - set 0x0F00[7] = 1
6338 e1e_rphy(hw
, I82579_DFT_CTRL
, &phy_data
);
6340 e1e_wphy(hw
, I82579_DFT_CTRL
, phy_data
);
6342 mac_data
= er32(EXTCNF_CTRL
);
6343 mac_data
|= E1000_EXTCNF_CTRL_GATE_PHY_CFG
;
6344 ew32(EXTCNF_CTRL
, mac_data
);
6346 /* Check MAC Tx/Rx packet buffer pointers.
6347 * Reset MAC Tx/Rx packet buffer pointers to suppress any
6348 * pending traffic indication that would prevent power gating.
6350 mac_data
= er32(TDFH
);
6353 mac_data
= er32(TDFT
);
6356 mac_data
= er32(TDFHS
);
6359 mac_data
= er32(TDFTS
);
6362 mac_data
= er32(TDFPC
);
6365 mac_data
= er32(RDFH
);
6368 mac_data
= er32(RDFT
);
6371 mac_data
= er32(RDFHS
);
6374 mac_data
= er32(RDFTS
);
6377 mac_data
= er32(RDFPC
);
6381 /* Enable the Dynamic Power Gating in the MAC */
6382 mac_data
= er32(FEXTNVM7
);
6383 mac_data
|= BIT(22);
6384 ew32(FEXTNVM7
, mac_data
);
6386 /* Disable the time synchronization clock */
6387 mac_data
= er32(FEXTNVM7
);
6388 mac_data
|= BIT(31);
6389 mac_data
&= ~BIT(0);
6390 ew32(FEXTNVM7
, mac_data
);
6392 /* Dynamic Power Gating Enable */
6393 mac_data
= er32(CTRL_EXT
);
6395 ew32(CTRL_EXT
, mac_data
);
6397 /* Enable the Dynamic Clock Gating in the DMA and MAC */
6398 mac_data
= er32(CTRL_EXT
);
6399 mac_data
|= E1000_CTRL_EXT_DMA_DYN_CLK_EN
;
6400 ew32(CTRL_EXT
, mac_data
);
6402 /* No MAC DPG gating SLP_S0 in modern standby
6403 * Switch the logic of the lanphypc to use PMC counter
6405 mac_data
= er32(FEXTNVM5
);
6407 ew32(FEXTNVM5
, mac_data
);
6410 static void e1000e_s0ix_exit_flow(struct e1000_adapter
*adapter
)
6412 struct e1000_hw
*hw
= &adapter
->hw
;
6416 /* Disable the Dynamic Power Gating in the MAC */
6417 mac_data
= er32(FEXTNVM7
);
6418 mac_data
&= 0xFFBFFFFF;
6419 ew32(FEXTNVM7
, mac_data
);
6421 /* Enable the time synchronization clock */
6422 mac_data
= er32(FEXTNVM7
);
6424 ew32(FEXTNVM7
, mac_data
);
6426 /* Disable Dynamic Power Gating */
6427 mac_data
= er32(CTRL_EXT
);
6428 mac_data
&= 0xFFFFFFF7;
6429 ew32(CTRL_EXT
, mac_data
);
6431 /* Disable the Dynamic Clock Gating in the DMA and MAC */
6432 mac_data
= er32(CTRL_EXT
);
6433 mac_data
&= 0xFFF7FFFF;
6434 ew32(CTRL_EXT
, mac_data
);
6436 /* Revert the lanphypc logic to use the internal Gbe counter
6437 * and not the PMC counter
6439 mac_data
= er32(FEXTNVM5
);
6440 mac_data
&= 0xFFFFFF7F;
6441 ew32(FEXTNVM5
, mac_data
);
6443 /* Enable the periodic inband message,
6444 * Request PCIe clock in K1 page770_17[10:9] =01b
6446 e1e_rphy(hw
, HV_PM_CTRL
, &phy_data
);
6448 phy_data
|= HV_PM_CTRL_K1_CLK_REQ
;
6449 e1e_wphy(hw
, HV_PM_CTRL
, phy_data
);
6451 /* Return back configuration
6452 * 772_29[5] = 0 CS_Mode_Stay_In_K1
6454 e1e_rphy(hw
, I217_CGFREG
, &phy_data
);
6456 e1e_wphy(hw
, I217_CGFREG
, phy_data
);
6458 /* Change the MAC/PHY interface to Kumeran
6459 * Unforce the SMBus in PHY page769_23[0] = 0
6460 * Unforce the SMBus in MAC CTRL_EXT[11] = 0
6462 e1e_rphy(hw
, CV_SMB_CTRL
, &phy_data
);
6463 phy_data
&= ~CV_SMB_CTRL_FORCE_SMBUS
;
6464 e1e_wphy(hw
, CV_SMB_CTRL
, phy_data
);
6465 mac_data
= er32(CTRL_EXT
);
6466 mac_data
&= ~E1000_CTRL_EXT_FORCE_SMBUS
;
6467 ew32(CTRL_EXT
, mac_data
);
6469 #endif /* CONFIG_PM_SLEEP */
6471 static int e1000e_pm_freeze(struct device
*dev
)
6473 struct net_device
*netdev
= dev_get_drvdata(dev
);
6474 struct e1000_adapter
*adapter
= netdev_priv(netdev
);
6479 present
= netif_device_present(netdev
);
6480 netif_device_detach(netdev
);
6482 if (present
&& netif_running(netdev
)) {
6483 int count
= E1000_CHECK_RESET_COUNT
;
6485 while (test_bit(__E1000_RESETTING
, &adapter
->state
) && count
--)
6486 usleep_range(10000, 11000);
6488 WARN_ON(test_bit(__E1000_RESETTING
, &adapter
->state
));
6490 /* Quiesce the device without resetting the hardware */
6491 e1000e_down(adapter
, false);
6492 e1000_free_irq(adapter
);
6496 e1000e_reset_interrupt_capability(adapter
);
6498 /* Allow time for pending master requests to run */
6499 e1000e_disable_pcie_master(&adapter
->hw
);
6504 static int __e1000_shutdown(struct pci_dev
*pdev
, bool runtime
)
6506 struct net_device
*netdev
= pci_get_drvdata(pdev
);
6507 struct e1000_adapter
*adapter
= netdev_priv(netdev
);
6508 struct e1000_hw
*hw
= &adapter
->hw
;
6509 u32 ctrl
, ctrl_ext
, rctl
, status
;
6510 /* Runtime suspend should only enable wakeup for link changes */
6511 u32 wufc
= runtime
? E1000_WUFC_LNKC
: adapter
->wol
;
6514 status
= er32(STATUS
);
6515 if (status
& E1000_STATUS_LU
)
6516 wufc
&= ~E1000_WUFC_LNKC
;
6519 e1000_setup_rctl(adapter
);
6520 e1000e_set_rx_mode(netdev
);
6522 /* turn on all-multi mode if wake on multicast is enabled */
6523 if (wufc
& E1000_WUFC_MC
) {
6525 rctl
|= E1000_RCTL_MPE
;
6530 ctrl
|= E1000_CTRL_ADVD3WUC
;
6531 if (!(adapter
->flags2
& FLAG2_HAS_PHY_WAKEUP
))
6532 ctrl
|= E1000_CTRL_EN_PHY_PWR_MGMT
;
6535 if (adapter
->hw
.phy
.media_type
== e1000_media_type_fiber
||
6536 adapter
->hw
.phy
.media_type
==
6537 e1000_media_type_internal_serdes
) {
6538 /* keep the laser running in D3 */
6539 ctrl_ext
= er32(CTRL_EXT
);
6540 ctrl_ext
|= E1000_CTRL_EXT_SDP3_DATA
;
6541 ew32(CTRL_EXT
, ctrl_ext
);
6545 e1000e_power_up_phy(adapter
);
6547 if (adapter
->flags
& FLAG_IS_ICH
)
6548 e1000_suspend_workarounds_ich8lan(&adapter
->hw
);
6550 if (adapter
->flags2
& FLAG2_HAS_PHY_WAKEUP
) {
6551 /* enable wakeup by the PHY */
6552 retval
= e1000_init_phy_wakeup(adapter
, wufc
);
6556 /* enable wakeup by the MAC */
6558 ew32(WUC
, E1000_WUC_PME_EN
);
6564 e1000_power_down_phy(adapter
);
6567 if (adapter
->hw
.phy
.type
== e1000_phy_igp_3
) {
6568 e1000e_igp3_phy_powerdown_workaround_ich8lan(&adapter
->hw
);
6569 } else if (hw
->mac
.type
>= e1000_pch_lpt
) {
6570 if (!(wufc
& (E1000_WUFC_EX
| E1000_WUFC_MC
| E1000_WUFC_BC
)))
6571 /* ULP does not support wake from unicast, multicast
6574 retval
= e1000_enable_ulp_lpt_lp(hw
, !runtime
);
6580 /* Ensure that the appropriate bits are set in LPI_CTRL
6583 if ((hw
->phy
.type
>= e1000_phy_i217
) &&
6584 adapter
->eee_advert
&& hw
->dev_spec
.ich8lan
.eee_lp_ability
) {
6587 retval
= hw
->phy
.ops
.acquire(hw
);
6589 retval
= e1e_rphy_locked(hw
, I82579_LPI_CTRL
,
6592 if (adapter
->eee_advert
&
6593 hw
->dev_spec
.ich8lan
.eee_lp_ability
&
6594 I82579_EEE_100_SUPPORTED
)
6595 lpi_ctrl
|= I82579_LPI_CTRL_100_ENABLE
;
6596 if (adapter
->eee_advert
&
6597 hw
->dev_spec
.ich8lan
.eee_lp_ability
&
6598 I82579_EEE_1000_SUPPORTED
)
6599 lpi_ctrl
|= I82579_LPI_CTRL_1000_ENABLE
;
6601 retval
= e1e_wphy_locked(hw
, I82579_LPI_CTRL
,
6605 hw
->phy
.ops
.release(hw
);
6608 /* Release control of h/w to f/w. If f/w is AMT enabled, this
6609 * would have already happened in close and is redundant.
6611 e1000e_release_hw_control(adapter
);
6613 pci_clear_master(pdev
);
6615 /* The pci-e switch on some quad port adapters will report a
6616 * correctable error when the MAC transitions from D0 to D3. To
6617 * prevent this we need to mask off the correctable errors on the
6618 * downstream port of the pci-e switch.
6620 * We don't have the associated upstream bridge while assigning
6621 * the PCI device into guest. For example, the KVM on power is
6624 if (adapter
->flags
& FLAG_IS_QUAD_PORT
) {
6625 struct pci_dev
*us_dev
= pdev
->bus
->self
;
6631 pcie_capability_read_word(us_dev
, PCI_EXP_DEVCTL
, &devctl
);
6632 pcie_capability_write_word(us_dev
, PCI_EXP_DEVCTL
,
6633 (devctl
& ~PCI_EXP_DEVCTL_CERE
));
6635 pci_save_state(pdev
);
6636 pci_prepare_to_sleep(pdev
);
6638 pcie_capability_write_word(us_dev
, PCI_EXP_DEVCTL
, devctl
);
6645 * __e1000e_disable_aspm - Disable ASPM states
6646 * @pdev: pointer to PCI device struct
6647 * @state: bit-mask of ASPM states to disable
6648 * @locked: indication if this context holds pci_bus_sem locked.
6650 * Some devices *must* have certain ASPM states disabled per hardware errata.
6652 static void __e1000e_disable_aspm(struct pci_dev
*pdev
, u16 state
, int locked
)
6654 struct pci_dev
*parent
= pdev
->bus
->self
;
6655 u16 aspm_dis_mask
= 0;
6656 u16 pdev_aspmc
, parent_aspmc
;
6659 case PCIE_LINK_STATE_L0S
:
6660 case PCIE_LINK_STATE_L0S
| PCIE_LINK_STATE_L1
:
6661 aspm_dis_mask
|= PCI_EXP_LNKCTL_ASPM_L0S
;
6662 /* fall-through - can't have L1 without L0s */
6663 case PCIE_LINK_STATE_L1
:
6664 aspm_dis_mask
|= PCI_EXP_LNKCTL_ASPM_L1
;
6670 pcie_capability_read_word(pdev
, PCI_EXP_LNKCTL
, &pdev_aspmc
);
6671 pdev_aspmc
&= PCI_EXP_LNKCTL_ASPMC
;
6674 pcie_capability_read_word(parent
, PCI_EXP_LNKCTL
,
6676 parent_aspmc
&= PCI_EXP_LNKCTL_ASPMC
;
6679 /* Nothing to do if the ASPM states to be disabled already are */
6680 if (!(pdev_aspmc
& aspm_dis_mask
) &&
6681 (!parent
|| !(parent_aspmc
& aspm_dis_mask
)))
6684 dev_info(&pdev
->dev
, "Disabling ASPM %s %s\n",
6685 (aspm_dis_mask
& pdev_aspmc
& PCI_EXP_LNKCTL_ASPM_L0S
) ?
6687 (aspm_dis_mask
& pdev_aspmc
& PCI_EXP_LNKCTL_ASPM_L1
) ?
6690 #ifdef CONFIG_PCIEASPM
6692 pci_disable_link_state_locked(pdev
, state
);
6694 pci_disable_link_state(pdev
, state
);
6696 /* Double-check ASPM control. If not disabled by the above, the
6697 * BIOS is preventing that from happening (or CONFIG_PCIEASPM is
6698 * not enabled); override by writing PCI config space directly.
6700 pcie_capability_read_word(pdev
, PCI_EXP_LNKCTL
, &pdev_aspmc
);
6701 pdev_aspmc
&= PCI_EXP_LNKCTL_ASPMC
;
6703 if (!(aspm_dis_mask
& pdev_aspmc
))
6707 /* Both device and parent should have the same ASPM setting.
6708 * Disable ASPM in downstream component first and then upstream.
6710 pcie_capability_clear_word(pdev
, PCI_EXP_LNKCTL
, aspm_dis_mask
);
6713 pcie_capability_clear_word(parent
, PCI_EXP_LNKCTL
,
6718 * e1000e_disable_aspm - Disable ASPM states.
6719 * @pdev: pointer to PCI device struct
6720 * @state: bit-mask of ASPM states to disable
6722 * This function acquires the pci_bus_sem!
6723 * Some devices *must* have certain ASPM states disabled per hardware errata.
6725 static void e1000e_disable_aspm(struct pci_dev
*pdev
, u16 state
)
6727 __e1000e_disable_aspm(pdev
, state
, 0);
6731 * e1000e_disable_aspm_locked Disable ASPM states.
6732 * @pdev: pointer to PCI device struct
6733 * @state: bit-mask of ASPM states to disable
6735 * This function must be called with pci_bus_sem acquired!
6736 * Some devices *must* have certain ASPM states disabled per hardware errata.
6738 static void e1000e_disable_aspm_locked(struct pci_dev
*pdev
, u16 state
)
6740 __e1000e_disable_aspm(pdev
, state
, 1);
6743 static int e1000e_pm_thaw(struct device
*dev
)
6745 struct net_device
*netdev
= dev_get_drvdata(dev
);
6746 struct e1000_adapter
*adapter
= netdev_priv(netdev
);
6749 e1000e_set_interrupt_capability(adapter
);
6752 if (netif_running(netdev
)) {
6753 rc
= e1000_request_irq(adapter
);
6760 netif_device_attach(netdev
);
6768 static int __e1000_resume(struct pci_dev
*pdev
)
6770 struct net_device
*netdev
= pci_get_drvdata(pdev
);
6771 struct e1000_adapter
*adapter
= netdev_priv(netdev
);
6772 struct e1000_hw
*hw
= &adapter
->hw
;
6773 u16 aspm_disable_flag
= 0;
6775 if (adapter
->flags2
& FLAG2_DISABLE_ASPM_L0S
)
6776 aspm_disable_flag
= PCIE_LINK_STATE_L0S
;
6777 if (adapter
->flags2
& FLAG2_DISABLE_ASPM_L1
)
6778 aspm_disable_flag
|= PCIE_LINK_STATE_L1
;
6779 if (aspm_disable_flag
)
6780 e1000e_disable_aspm(pdev
, aspm_disable_flag
);
6782 pci_set_master(pdev
);
6784 if (hw
->mac
.type
>= e1000_pch2lan
)
6785 e1000_resume_workarounds_pchlan(&adapter
->hw
);
6787 e1000e_power_up_phy(adapter
);
6789 /* report the system wakeup cause from S3/S4 */
6790 if (adapter
->flags2
& FLAG2_HAS_PHY_WAKEUP
) {
6793 e1e_rphy(&adapter
->hw
, BM_WUS
, &phy_data
);
6795 e_info("PHY Wakeup cause - %s\n",
6796 phy_data
& E1000_WUS_EX
? "Unicast Packet" :
6797 phy_data
& E1000_WUS_MC
? "Multicast Packet" :
6798 phy_data
& E1000_WUS_BC
? "Broadcast Packet" :
6799 phy_data
& E1000_WUS_MAG
? "Magic Packet" :
6800 phy_data
& E1000_WUS_LNKC
?
6801 "Link Status Change" : "other");
6803 e1e_wphy(&adapter
->hw
, BM_WUS
, ~0);
6805 u32 wus
= er32(WUS
);
6808 e_info("MAC Wakeup cause - %s\n",
6809 wus
& E1000_WUS_EX
? "Unicast Packet" :
6810 wus
& E1000_WUS_MC
? "Multicast Packet" :
6811 wus
& E1000_WUS_BC
? "Broadcast Packet" :
6812 wus
& E1000_WUS_MAG
? "Magic Packet" :
6813 wus
& E1000_WUS_LNKC
? "Link Status Change" :
6819 e1000e_reset(adapter
);
6821 e1000_init_manageability_pt(adapter
);
6823 /* If the controller has AMT, do not set DRV_LOAD until the interface
6824 * is up. For all other cases, let the f/w know that the h/w is now
6825 * under the control of the driver.
6827 if (!(adapter
->flags
& FLAG_HAS_AMT
))
6828 e1000e_get_hw_control(adapter
);
6833 #ifdef CONFIG_PM_SLEEP
6834 static int e1000e_pm_suspend(struct device
*dev
)
6836 struct net_device
*netdev
= pci_get_drvdata(to_pci_dev(dev
));
6837 struct e1000_adapter
*adapter
= netdev_priv(netdev
);
6838 struct pci_dev
*pdev
= to_pci_dev(dev
);
6839 struct e1000_hw
*hw
= &adapter
->hw
;
6842 e1000e_flush_lpic(pdev
);
6844 e1000e_pm_freeze(dev
);
6846 rc
= __e1000_shutdown(pdev
, false);
6848 e1000e_pm_thaw(dev
);
6850 /* Introduce S0ix implementation */
6851 if (hw
->mac
.type
>= e1000_pch_cnp
)
6852 e1000e_s0ix_entry_flow(adapter
);
6857 static int e1000e_pm_resume(struct device
*dev
)
6859 struct net_device
*netdev
= pci_get_drvdata(to_pci_dev(dev
));
6860 struct e1000_adapter
*adapter
= netdev_priv(netdev
);
6861 struct pci_dev
*pdev
= to_pci_dev(dev
);
6862 struct e1000_hw
*hw
= &adapter
->hw
;
6865 /* Introduce S0ix implementation */
6866 if (hw
->mac
.type
>= e1000_pch_cnp
)
6867 e1000e_s0ix_exit_flow(adapter
);
6869 rc
= __e1000_resume(pdev
);
6873 return e1000e_pm_thaw(dev
);
6875 #endif /* CONFIG_PM_SLEEP */
6877 static int e1000e_pm_runtime_idle(struct device
*dev
)
6879 struct net_device
*netdev
= dev_get_drvdata(dev
);
6880 struct e1000_adapter
*adapter
= netdev_priv(netdev
);
6883 eee_lp
= adapter
->hw
.dev_spec
.ich8lan
.eee_lp_ability
;
6885 if (!e1000e_has_link(adapter
)) {
6886 adapter
->hw
.dev_spec
.ich8lan
.eee_lp_ability
= eee_lp
;
6887 pm_schedule_suspend(dev
, 5 * MSEC_PER_SEC
);
6893 static int e1000e_pm_runtime_resume(struct device
*dev
)
6895 struct pci_dev
*pdev
= to_pci_dev(dev
);
6896 struct net_device
*netdev
= pci_get_drvdata(pdev
);
6897 struct e1000_adapter
*adapter
= netdev_priv(netdev
);
6900 rc
= __e1000_resume(pdev
);
6904 if (netdev
->flags
& IFF_UP
)
6910 static int e1000e_pm_runtime_suspend(struct device
*dev
)
6912 struct pci_dev
*pdev
= to_pci_dev(dev
);
6913 struct net_device
*netdev
= pci_get_drvdata(pdev
);
6914 struct e1000_adapter
*adapter
= netdev_priv(netdev
);
6916 if (netdev
->flags
& IFF_UP
) {
6917 int count
= E1000_CHECK_RESET_COUNT
;
6919 while (test_bit(__E1000_RESETTING
, &adapter
->state
) && count
--)
6920 usleep_range(10000, 11000);
6922 WARN_ON(test_bit(__E1000_RESETTING
, &adapter
->state
));
6924 /* Down the device without resetting the hardware */
6925 e1000e_down(adapter
, false);
6928 if (__e1000_shutdown(pdev
, true)) {
6929 e1000e_pm_runtime_resume(dev
);
6935 #endif /* CONFIG_PM */
6937 static void e1000_shutdown(struct pci_dev
*pdev
)
6939 e1000e_flush_lpic(pdev
);
6941 e1000e_pm_freeze(&pdev
->dev
);
6943 __e1000_shutdown(pdev
, false);
6946 #ifdef CONFIG_NET_POLL_CONTROLLER
6948 static irqreturn_t
e1000_intr_msix(int __always_unused irq
, void *data
)
6950 struct net_device
*netdev
= data
;
6951 struct e1000_adapter
*adapter
= netdev_priv(netdev
);
6953 if (adapter
->msix_entries
) {
6954 int vector
, msix_irq
;
6957 msix_irq
= adapter
->msix_entries
[vector
].vector
;
6958 if (disable_hardirq(msix_irq
))
6959 e1000_intr_msix_rx(msix_irq
, netdev
);
6960 enable_irq(msix_irq
);
6963 msix_irq
= adapter
->msix_entries
[vector
].vector
;
6964 if (disable_hardirq(msix_irq
))
6965 e1000_intr_msix_tx(msix_irq
, netdev
);
6966 enable_irq(msix_irq
);
6969 msix_irq
= adapter
->msix_entries
[vector
].vector
;
6970 if (disable_hardirq(msix_irq
))
6971 e1000_msix_other(msix_irq
, netdev
);
6972 enable_irq(msix_irq
);
6980 * @netdev: network interface device structure
6982 * Polling 'interrupt' - used by things like netconsole to send skbs
6983 * without having to re-enable interrupts. It's not called while
6984 * the interrupt routine is executing.
6986 static void e1000_netpoll(struct net_device
*netdev
)
6988 struct e1000_adapter
*adapter
= netdev_priv(netdev
);
6990 switch (adapter
->int_mode
) {
6991 case E1000E_INT_MODE_MSIX
:
6992 e1000_intr_msix(adapter
->pdev
->irq
, netdev
);
6994 case E1000E_INT_MODE_MSI
:
6995 if (disable_hardirq(adapter
->pdev
->irq
))
6996 e1000_intr_msi(adapter
->pdev
->irq
, netdev
);
6997 enable_irq(adapter
->pdev
->irq
);
6999 default: /* E1000E_INT_MODE_LEGACY */
7000 if (disable_hardirq(adapter
->pdev
->irq
))
7001 e1000_intr(adapter
->pdev
->irq
, netdev
);
7002 enable_irq(adapter
->pdev
->irq
);
7009 * e1000_io_error_detected - called when PCI error is detected
7010 * @pdev: Pointer to PCI device
7011 * @state: The current pci connection state
7013 * This function is called after a PCI bus error affecting
7014 * this device has been detected.
7016 static pci_ers_result_t
e1000_io_error_detected(struct pci_dev
*pdev
,
7017 pci_channel_state_t state
)
7019 e1000e_pm_freeze(&pdev
->dev
);
7021 if (state
== pci_channel_io_perm_failure
)
7022 return PCI_ERS_RESULT_DISCONNECT
;
7024 pci_disable_device(pdev
);
7026 /* Request a slot slot reset. */
7027 return PCI_ERS_RESULT_NEED_RESET
;
7031 * e1000_io_slot_reset - called after the pci bus has been reset.
7032 * @pdev: Pointer to PCI device
7034 * Restart the card from scratch, as if from a cold-boot. Implementation
7035 * resembles the first-half of the e1000e_pm_resume routine.
7037 static pci_ers_result_t
e1000_io_slot_reset(struct pci_dev
*pdev
)
7039 struct net_device
*netdev
= pci_get_drvdata(pdev
);
7040 struct e1000_adapter
*adapter
= netdev_priv(netdev
);
7041 struct e1000_hw
*hw
= &adapter
->hw
;
7042 u16 aspm_disable_flag
= 0;
7044 pci_ers_result_t result
;
7046 if (adapter
->flags2
& FLAG2_DISABLE_ASPM_L0S
)
7047 aspm_disable_flag
= PCIE_LINK_STATE_L0S
;
7048 if (adapter
->flags2
& FLAG2_DISABLE_ASPM_L1
)
7049 aspm_disable_flag
|= PCIE_LINK_STATE_L1
;
7050 if (aspm_disable_flag
)
7051 e1000e_disable_aspm_locked(pdev
, aspm_disable_flag
);
7053 err
= pci_enable_device_mem(pdev
);
7056 "Cannot re-enable PCI device after reset.\n");
7057 result
= PCI_ERS_RESULT_DISCONNECT
;
7059 pdev
->state_saved
= true;
7060 pci_restore_state(pdev
);
7061 pci_set_master(pdev
);
7063 pci_enable_wake(pdev
, PCI_D3hot
, 0);
7064 pci_enable_wake(pdev
, PCI_D3cold
, 0);
7066 e1000e_reset(adapter
);
7068 result
= PCI_ERS_RESULT_RECOVERED
;
7075 * e1000_io_resume - called when traffic can start flowing again.
7076 * @pdev: Pointer to PCI device
7078 * This callback is called when the error recovery driver tells us that
7079 * its OK to resume normal operation. Implementation resembles the
7080 * second-half of the e1000e_pm_resume routine.
7082 static void e1000_io_resume(struct pci_dev
*pdev
)
7084 struct net_device
*netdev
= pci_get_drvdata(pdev
);
7085 struct e1000_adapter
*adapter
= netdev_priv(netdev
);
7087 e1000_init_manageability_pt(adapter
);
7089 e1000e_pm_thaw(&pdev
->dev
);
7091 /* If the controller has AMT, do not set DRV_LOAD until the interface
7092 * is up. For all other cases, let the f/w know that the h/w is now
7093 * under the control of the driver.
7095 if (!(adapter
->flags
& FLAG_HAS_AMT
))
7096 e1000e_get_hw_control(adapter
);
7099 static void e1000_print_device_info(struct e1000_adapter
*adapter
)
7101 struct e1000_hw
*hw
= &adapter
->hw
;
7102 struct net_device
*netdev
= adapter
->netdev
;
7104 u8 pba_str
[E1000_PBANUM_LENGTH
];
7106 /* print bus type/speed/width info */
7107 e_info("(PCI Express:2.5GT/s:%s) %pM\n",
7109 ((hw
->bus
.width
== e1000_bus_width_pcie_x4
) ? "Width x4" :
7113 e_info("Intel(R) PRO/%s Network Connection\n",
7114 (hw
->phy
.type
== e1000_phy_ife
) ? "10/100" : "1000");
7115 ret_val
= e1000_read_pba_string_generic(hw
, pba_str
,
7116 E1000_PBANUM_LENGTH
);
7118 strlcpy((char *)pba_str
, "Unknown", sizeof(pba_str
));
7119 e_info("MAC: %d, PHY: %d, PBA No: %s\n",
7120 hw
->mac
.type
, hw
->phy
.type
, pba_str
);
7123 static void e1000_eeprom_checks(struct e1000_adapter
*adapter
)
7125 struct e1000_hw
*hw
= &adapter
->hw
;
7129 if (hw
->mac
.type
!= e1000_82573
)
7132 ret_val
= e1000_read_nvm(hw
, NVM_INIT_CONTROL2_REG
, 1, &buf
);
7134 if (!ret_val
&& (!(buf
& BIT(0)))) {
7135 /* Deep Smart Power Down (DSPD) */
7136 dev_warn(&adapter
->pdev
->dev
,
7137 "Warning: detected DSPD enabled in EEPROM\n");
7141 static netdev_features_t
e1000_fix_features(struct net_device
*netdev
,
7142 netdev_features_t features
)
7144 struct e1000_adapter
*adapter
= netdev_priv(netdev
);
7145 struct e1000_hw
*hw
= &adapter
->hw
;
7147 /* Jumbo frame workaround on 82579 and newer requires CRC be stripped */
7148 if ((hw
->mac
.type
>= e1000_pch2lan
) && (netdev
->mtu
> ETH_DATA_LEN
))
7149 features
&= ~NETIF_F_RXFCS
;
7151 /* Since there is no support for separate Rx/Tx vlan accel
7152 * enable/disable make sure Tx flag is always in same state as Rx.
7154 if (features
& NETIF_F_HW_VLAN_CTAG_RX
)
7155 features
|= NETIF_F_HW_VLAN_CTAG_TX
;
7157 features
&= ~NETIF_F_HW_VLAN_CTAG_TX
;
7162 static int e1000_set_features(struct net_device
*netdev
,
7163 netdev_features_t features
)
7165 struct e1000_adapter
*adapter
= netdev_priv(netdev
);
7166 netdev_features_t changed
= features
^ netdev
->features
;
7168 if (changed
& (NETIF_F_TSO
| NETIF_F_TSO6
))
7169 adapter
->flags
|= FLAG_TSO_FORCE
;
7171 if (!(changed
& (NETIF_F_HW_VLAN_CTAG_RX
| NETIF_F_HW_VLAN_CTAG_TX
|
7172 NETIF_F_RXCSUM
| NETIF_F_RXHASH
| NETIF_F_RXFCS
|
7176 if (changed
& NETIF_F_RXFCS
) {
7177 if (features
& NETIF_F_RXFCS
) {
7178 adapter
->flags2
&= ~FLAG2_CRC_STRIPPING
;
7180 /* We need to take it back to defaults, which might mean
7181 * stripping is still disabled at the adapter level.
7183 if (adapter
->flags2
& FLAG2_DFLT_CRC_STRIPPING
)
7184 adapter
->flags2
|= FLAG2_CRC_STRIPPING
;
7186 adapter
->flags2
&= ~FLAG2_CRC_STRIPPING
;
7190 netdev
->features
= features
;
7192 if (netif_running(netdev
))
7193 e1000e_reinit_locked(adapter
);
7195 e1000e_reset(adapter
);
7200 static const struct net_device_ops e1000e_netdev_ops
= {
7201 .ndo_open
= e1000e_open
,
7202 .ndo_stop
= e1000e_close
,
7203 .ndo_start_xmit
= e1000_xmit_frame
,
7204 .ndo_get_stats64
= e1000e_get_stats64
,
7205 .ndo_set_rx_mode
= e1000e_set_rx_mode
,
7206 .ndo_set_mac_address
= e1000_set_mac
,
7207 .ndo_change_mtu
= e1000_change_mtu
,
7208 .ndo_do_ioctl
= e1000_ioctl
,
7209 .ndo_tx_timeout
= e1000_tx_timeout
,
7210 .ndo_validate_addr
= eth_validate_addr
,
7212 .ndo_vlan_rx_add_vid
= e1000_vlan_rx_add_vid
,
7213 .ndo_vlan_rx_kill_vid
= e1000_vlan_rx_kill_vid
,
7214 #ifdef CONFIG_NET_POLL_CONTROLLER
7215 .ndo_poll_controller
= e1000_netpoll
,
7217 .ndo_set_features
= e1000_set_features
,
7218 .ndo_fix_features
= e1000_fix_features
,
7219 .ndo_features_check
= passthru_features_check
,
7223 * e1000_probe - Device Initialization Routine
7224 * @pdev: PCI device information struct
7225 * @ent: entry in e1000_pci_tbl
7227 * Returns 0 on success, negative on failure
7229 * e1000_probe initializes an adapter identified by a pci_dev structure.
7230 * The OS initialization, configuring of the adapter private structure,
7231 * and a hardware reset occur.
7233 static int e1000_probe(struct pci_dev
*pdev
, const struct pci_device_id
*ent
)
7235 struct net_device
*netdev
;
7236 struct e1000_adapter
*adapter
;
7237 struct e1000_hw
*hw
;
7238 const struct e1000_info
*ei
= e1000_info_tbl
[ent
->driver_data
];
7239 resource_size_t mmio_start
, mmio_len
;
7240 resource_size_t flash_start
, flash_len
;
7241 static int cards_found
;
7242 u16 aspm_disable_flag
= 0;
7243 int bars
, i
, err
, pci_using_dac
;
7244 u16 eeprom_data
= 0;
7245 u16 eeprom_apme_mask
= E1000_EEPROM_APME
;
7248 if (ei
->flags2
& FLAG2_DISABLE_ASPM_L0S
)
7249 aspm_disable_flag
= PCIE_LINK_STATE_L0S
;
7250 if (ei
->flags2
& FLAG2_DISABLE_ASPM_L1
)
7251 aspm_disable_flag
|= PCIE_LINK_STATE_L1
;
7252 if (aspm_disable_flag
)
7253 e1000e_disable_aspm(pdev
, aspm_disable_flag
);
7255 err
= pci_enable_device_mem(pdev
);
7260 err
= dma_set_mask_and_coherent(&pdev
->dev
, DMA_BIT_MASK(64));
7264 err
= dma_set_mask_and_coherent(&pdev
->dev
, DMA_BIT_MASK(32));
7267 "No usable DMA configuration, aborting\n");
7272 bars
= pci_select_bars(pdev
, IORESOURCE_MEM
);
7273 err
= pci_request_selected_regions_exclusive(pdev
, bars
,
7274 e1000e_driver_name
);
7278 /* AER (Advanced Error Reporting) hooks */
7279 pci_enable_pcie_error_reporting(pdev
);
7281 pci_set_master(pdev
);
7282 /* PCI config space info */
7283 err
= pci_save_state(pdev
);
7285 goto err_alloc_etherdev
;
7288 netdev
= alloc_etherdev(sizeof(struct e1000_adapter
));
7290 goto err_alloc_etherdev
;
7292 SET_NETDEV_DEV(netdev
, &pdev
->dev
);
7294 netdev
->irq
= pdev
->irq
;
7296 pci_set_drvdata(pdev
, netdev
);
7297 adapter
= netdev_priv(netdev
);
7299 adapter
->netdev
= netdev
;
7300 adapter
->pdev
= pdev
;
7302 adapter
->pba
= ei
->pba
;
7303 adapter
->flags
= ei
->flags
;
7304 adapter
->flags2
= ei
->flags2
;
7305 adapter
->hw
.adapter
= adapter
;
7306 adapter
->hw
.mac
.type
= ei
->mac
;
7307 adapter
->max_hw_frame_size
= ei
->max_hw_frame_size
;
7308 adapter
->msg_enable
= netif_msg_init(debug
, DEFAULT_MSG_ENABLE
);
7310 mmio_start
= pci_resource_start(pdev
, 0);
7311 mmio_len
= pci_resource_len(pdev
, 0);
7314 adapter
->hw
.hw_addr
= ioremap(mmio_start
, mmio_len
);
7315 if (!adapter
->hw
.hw_addr
)
7318 if ((adapter
->flags
& FLAG_HAS_FLASH
) &&
7319 (pci_resource_flags(pdev
, 1) & IORESOURCE_MEM
) &&
7320 (hw
->mac
.type
< e1000_pch_spt
)) {
7321 flash_start
= pci_resource_start(pdev
, 1);
7322 flash_len
= pci_resource_len(pdev
, 1);
7323 adapter
->hw
.flash_address
= ioremap(flash_start
, flash_len
);
7324 if (!adapter
->hw
.flash_address
)
7328 /* Set default EEE advertisement */
7329 if (adapter
->flags2
& FLAG2_HAS_EEE
)
7330 adapter
->eee_advert
= MDIO_EEE_100TX
| MDIO_EEE_1000T
;
7332 /* construct the net_device struct */
7333 netdev
->netdev_ops
= &e1000e_netdev_ops
;
7334 e1000e_set_ethtool_ops(netdev
);
7335 netdev
->watchdog_timeo
= 5 * HZ
;
7336 netif_napi_add(netdev
, &adapter
->napi
, e1000e_poll
, 64);
7337 strlcpy(netdev
->name
, pci_name(pdev
), sizeof(netdev
->name
));
7339 netdev
->mem_start
= mmio_start
;
7340 netdev
->mem_end
= mmio_start
+ mmio_len
;
7342 adapter
->bd_number
= cards_found
++;
7344 e1000e_check_options(adapter
);
7346 /* setup adapter struct */
7347 err
= e1000_sw_init(adapter
);
7351 memcpy(&hw
->mac
.ops
, ei
->mac_ops
, sizeof(hw
->mac
.ops
));
7352 memcpy(&hw
->nvm
.ops
, ei
->nvm_ops
, sizeof(hw
->nvm
.ops
));
7353 memcpy(&hw
->phy
.ops
, ei
->phy_ops
, sizeof(hw
->phy
.ops
));
7355 err
= ei
->get_variants(adapter
);
7359 if ((adapter
->flags
& FLAG_IS_ICH
) &&
7360 (adapter
->flags
& FLAG_READ_ONLY_NVM
) &&
7361 (hw
->mac
.type
< e1000_pch_spt
))
7362 e1000e_write_protect_nvm_ich8lan(&adapter
->hw
);
7364 hw
->mac
.ops
.get_bus_info(&adapter
->hw
);
7366 adapter
->hw
.phy
.autoneg_wait_to_complete
= 0;
7368 /* Copper options */
7369 if (adapter
->hw
.phy
.media_type
== e1000_media_type_copper
) {
7370 adapter
->hw
.phy
.mdix
= AUTO_ALL_MODES
;
7371 adapter
->hw
.phy
.disable_polarity_correction
= 0;
7372 adapter
->hw
.phy
.ms_type
= e1000_ms_hw_default
;
7375 if (hw
->phy
.ops
.check_reset_block
&& hw
->phy
.ops
.check_reset_block(hw
))
7376 dev_info(&pdev
->dev
,
7377 "PHY reset is blocked due to SOL/IDER session.\n");
7379 /* Set initial default active device features */
7380 netdev
->features
= (NETIF_F_SG
|
7381 NETIF_F_HW_VLAN_CTAG_RX
|
7382 NETIF_F_HW_VLAN_CTAG_TX
|
7389 /* Set user-changeable features (subset of all device features) */
7390 netdev
->hw_features
= netdev
->features
;
7391 netdev
->hw_features
|= NETIF_F_RXFCS
;
7392 netdev
->priv_flags
|= IFF_SUPP_NOFCS
;
7393 netdev
->hw_features
|= NETIF_F_RXALL
;
7395 if (adapter
->flags
& FLAG_HAS_HW_VLAN_FILTER
)
7396 netdev
->features
|= NETIF_F_HW_VLAN_CTAG_FILTER
;
7398 netdev
->vlan_features
|= (NETIF_F_SG
|
7403 netdev
->priv_flags
|= IFF_UNICAST_FLT
;
7405 if (pci_using_dac
) {
7406 netdev
->features
|= NETIF_F_HIGHDMA
;
7407 netdev
->vlan_features
|= NETIF_F_HIGHDMA
;
7410 /* MTU range: 68 - max_hw_frame_size */
7411 netdev
->min_mtu
= ETH_MIN_MTU
;
7412 netdev
->max_mtu
= adapter
->max_hw_frame_size
-
7413 (VLAN_ETH_HLEN
+ ETH_FCS_LEN
);
7415 if (e1000e_enable_mng_pass_thru(&adapter
->hw
))
7416 adapter
->flags
|= FLAG_MNG_PT_ENABLED
;
7418 /* before reading the NVM, reset the controller to
7419 * put the device in a known good starting state
7421 adapter
->hw
.mac
.ops
.reset_hw(&adapter
->hw
);
7423 /* systems with ASPM and others may see the checksum fail on the first
7424 * attempt. Let's give it a few tries
7427 if (e1000_validate_nvm_checksum(&adapter
->hw
) >= 0)
7430 dev_err(&pdev
->dev
, "The NVM Checksum Is Not Valid\n");
7436 e1000_eeprom_checks(adapter
);
7438 /* copy the MAC address */
7439 if (e1000e_read_mac_addr(&adapter
->hw
))
7441 "NVM Read Error while reading MAC address\n");
7443 memcpy(netdev
->dev_addr
, adapter
->hw
.mac
.addr
, netdev
->addr_len
);
7445 if (!is_valid_ether_addr(netdev
->dev_addr
)) {
7446 dev_err(&pdev
->dev
, "Invalid MAC Address: %pM\n",
7452 adapter
->e1000_workqueue
= alloc_workqueue("%s", WQ_MEM_RECLAIM
, 0,
7453 e1000e_driver_name
);
7455 if (!adapter
->e1000_workqueue
) {
7460 INIT_DELAYED_WORK(&adapter
->watchdog_task
, e1000_watchdog_task
);
7461 queue_delayed_work(adapter
->e1000_workqueue
, &adapter
->watchdog_task
,
7464 timer_setup(&adapter
->phy_info_timer
, e1000_update_phy_info
, 0);
7466 INIT_WORK(&adapter
->reset_task
, e1000_reset_task
);
7467 INIT_WORK(&adapter
->downshift_task
, e1000e_downshift_workaround
);
7468 INIT_WORK(&adapter
->update_phy_task
, e1000e_update_phy_task
);
7469 INIT_WORK(&adapter
->print_hang_task
, e1000_print_hw_hang
);
7471 /* Initialize link parameters. User can change them with ethtool */
7472 adapter
->hw
.mac
.autoneg
= 1;
7473 adapter
->fc_autoneg
= true;
7474 adapter
->hw
.fc
.requested_mode
= e1000_fc_default
;
7475 adapter
->hw
.fc
.current_mode
= e1000_fc_default
;
7476 adapter
->hw
.phy
.autoneg_advertised
= 0x2f;
7478 /* Initial Wake on LAN setting - If APM wake is enabled in
7479 * the EEPROM, enable the ACPI Magic Packet filter
7481 if (adapter
->flags
& FLAG_APME_IN_WUC
) {
7482 /* APME bit in EEPROM is mapped to WUC.APME */
7483 eeprom_data
= er32(WUC
);
7484 eeprom_apme_mask
= E1000_WUC_APME
;
7485 if ((hw
->mac
.type
> e1000_ich10lan
) &&
7486 (eeprom_data
& E1000_WUC_PHY_WAKE
))
7487 adapter
->flags2
|= FLAG2_HAS_PHY_WAKEUP
;
7488 } else if (adapter
->flags
& FLAG_APME_IN_CTRL3
) {
7489 if (adapter
->flags
& FLAG_APME_CHECK_PORT_B
&&
7490 (adapter
->hw
.bus
.func
== 1))
7491 ret_val
= e1000_read_nvm(&adapter
->hw
,
7492 NVM_INIT_CONTROL3_PORT_B
,
7495 ret_val
= e1000_read_nvm(&adapter
->hw
,
7496 NVM_INIT_CONTROL3_PORT_A
,
7500 /* fetch WoL from EEPROM */
7502 e_dbg("NVM read error getting WoL initial values: %d\n", ret_val
);
7503 else if (eeprom_data
& eeprom_apme_mask
)
7504 adapter
->eeprom_wol
|= E1000_WUFC_MAG
;
7506 /* now that we have the eeprom settings, apply the special cases
7507 * where the eeprom may be wrong or the board simply won't support
7508 * wake on lan on a particular port
7510 if (!(adapter
->flags
& FLAG_HAS_WOL
))
7511 adapter
->eeprom_wol
= 0;
7513 /* initialize the wol settings based on the eeprom settings */
7514 adapter
->wol
= adapter
->eeprom_wol
;
7516 /* make sure adapter isn't asleep if manageability is enabled */
7517 if (adapter
->wol
|| (adapter
->flags
& FLAG_MNG_PT_ENABLED
) ||
7518 (hw
->mac
.ops
.check_mng_mode(hw
)))
7519 device_wakeup_enable(&pdev
->dev
);
7521 /* save off EEPROM version number */
7522 ret_val
= e1000_read_nvm(&adapter
->hw
, 5, 1, &adapter
->eeprom_vers
);
7525 e_dbg("NVM read error getting EEPROM version: %d\n", ret_val
);
7526 adapter
->eeprom_vers
= 0;
7529 /* init PTP hardware clock */
7530 e1000e_ptp_init(adapter
);
7532 /* reset the hardware with the new settings */
7533 e1000e_reset(adapter
);
7535 /* If the controller has AMT, do not set DRV_LOAD until the interface
7536 * is up. For all other cases, let the f/w know that the h/w is now
7537 * under the control of the driver.
7539 if (!(adapter
->flags
& FLAG_HAS_AMT
))
7540 e1000e_get_hw_control(adapter
);
7542 strlcpy(netdev
->name
, "eth%d", sizeof(netdev
->name
));
7543 err
= register_netdev(netdev
);
7547 /* carrier off reporting is important to ethtool even BEFORE open */
7548 netif_carrier_off(netdev
);
7550 e1000_print_device_info(adapter
);
7552 dev_pm_set_driver_flags(&pdev
->dev
, DPM_FLAG_NEVER_SKIP
);
7554 if (pci_dev_run_wake(pdev
) && hw
->mac
.type
< e1000_pch_cnp
)
7555 pm_runtime_put_noidle(&pdev
->dev
);
7560 flush_workqueue(adapter
->e1000_workqueue
);
7561 destroy_workqueue(adapter
->e1000_workqueue
);
7563 if (!(adapter
->flags
& FLAG_HAS_AMT
))
7564 e1000e_release_hw_control(adapter
);
7566 if (hw
->phy
.ops
.check_reset_block
&& !hw
->phy
.ops
.check_reset_block(hw
))
7567 e1000_phy_hw_reset(&adapter
->hw
);
7569 kfree(adapter
->tx_ring
);
7570 kfree(adapter
->rx_ring
);
7572 if ((adapter
->hw
.flash_address
) && (hw
->mac
.type
< e1000_pch_spt
))
7573 iounmap(adapter
->hw
.flash_address
);
7574 e1000e_reset_interrupt_capability(adapter
);
7576 iounmap(adapter
->hw
.hw_addr
);
7578 free_netdev(netdev
);
7580 pci_release_mem_regions(pdev
);
7583 pci_disable_device(pdev
);
7588 * e1000_remove - Device Removal Routine
7589 * @pdev: PCI device information struct
7591 * e1000_remove is called by the PCI subsystem to alert the driver
7592 * that it should release a PCI device. The could be caused by a
7593 * Hot-Plug event, or because the driver is going to be removed from
7596 static void e1000_remove(struct pci_dev
*pdev
)
7598 struct net_device
*netdev
= pci_get_drvdata(pdev
);
7599 struct e1000_adapter
*adapter
= netdev_priv(netdev
);
7601 e1000e_ptp_remove(adapter
);
7603 /* The timers may be rescheduled, so explicitly disable them
7604 * from being rescheduled.
7606 set_bit(__E1000_DOWN
, &adapter
->state
);
7607 del_timer_sync(&adapter
->phy_info_timer
);
7609 cancel_work_sync(&adapter
->reset_task
);
7610 cancel_work_sync(&adapter
->downshift_task
);
7611 cancel_work_sync(&adapter
->update_phy_task
);
7612 cancel_work_sync(&adapter
->print_hang_task
);
7614 cancel_delayed_work(&adapter
->watchdog_task
);
7615 flush_workqueue(adapter
->e1000_workqueue
);
7616 destroy_workqueue(adapter
->e1000_workqueue
);
7618 if (adapter
->flags
& FLAG_HAS_HW_TIMESTAMP
) {
7619 cancel_work_sync(&adapter
->tx_hwtstamp_work
);
7620 if (adapter
->tx_hwtstamp_skb
) {
7621 dev_consume_skb_any(adapter
->tx_hwtstamp_skb
);
7622 adapter
->tx_hwtstamp_skb
= NULL
;
7626 unregister_netdev(netdev
);
7628 if (pci_dev_run_wake(pdev
))
7629 pm_runtime_get_noresume(&pdev
->dev
);
7631 /* Release control of h/w to f/w. If f/w is AMT enabled, this
7632 * would have already happened in close and is redundant.
7634 e1000e_release_hw_control(adapter
);
7636 e1000e_reset_interrupt_capability(adapter
);
7637 kfree(adapter
->tx_ring
);
7638 kfree(adapter
->rx_ring
);
7640 iounmap(adapter
->hw
.hw_addr
);
7641 if ((adapter
->hw
.flash_address
) &&
7642 (adapter
->hw
.mac
.type
< e1000_pch_spt
))
7643 iounmap(adapter
->hw
.flash_address
);
7644 pci_release_mem_regions(pdev
);
7646 free_netdev(netdev
);
7649 pci_disable_pcie_error_reporting(pdev
);
7651 pci_disable_device(pdev
);
7654 /* PCI Error Recovery (ERS) */
7655 static const struct pci_error_handlers e1000_err_handler
= {
7656 .error_detected
= e1000_io_error_detected
,
7657 .slot_reset
= e1000_io_slot_reset
,
7658 .resume
= e1000_io_resume
,
7661 static const struct pci_device_id e1000_pci_tbl
[] = {
7662 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82571EB_COPPER
), board_82571
},
7663 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82571EB_FIBER
), board_82571
},
7664 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82571EB_QUAD_COPPER
), board_82571
},
7665 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82571EB_QUAD_COPPER_LP
),
7667 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82571EB_QUAD_FIBER
), board_82571
},
7668 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82571EB_SERDES
), board_82571
},
7669 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82571EB_SERDES_DUAL
), board_82571
},
7670 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82571EB_SERDES_QUAD
), board_82571
},
7671 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82571PT_QUAD_COPPER
), board_82571
},
7673 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82572EI
), board_82572
},
7674 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82572EI_COPPER
), board_82572
},
7675 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82572EI_FIBER
), board_82572
},
7676 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82572EI_SERDES
), board_82572
},
7678 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82573E
), board_82573
},
7679 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82573E_IAMT
), board_82573
},
7680 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82573L
), board_82573
},
7682 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82574L
), board_82574
},
7683 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82574LA
), board_82574
},
7684 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82583V
), board_82583
},
7686 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_80003ES2LAN_COPPER_DPT
),
7687 board_80003es2lan
},
7688 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_80003ES2LAN_COPPER_SPT
),
7689 board_80003es2lan
},
7690 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_80003ES2LAN_SERDES_DPT
),
7691 board_80003es2lan
},
7692 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_80003ES2LAN_SERDES_SPT
),
7693 board_80003es2lan
},
7695 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_ICH8_IFE
), board_ich8lan
},
7696 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_ICH8_IFE_G
), board_ich8lan
},
7697 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_ICH8_IFE_GT
), board_ich8lan
},
7698 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_ICH8_IGP_AMT
), board_ich8lan
},
7699 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_ICH8_IGP_C
), board_ich8lan
},
7700 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_ICH8_IGP_M
), board_ich8lan
},
7701 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_ICH8_IGP_M_AMT
), board_ich8lan
},
7702 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_ICH8_82567V_3
), board_ich8lan
},
7704 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_ICH9_IFE
), board_ich9lan
},
7705 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_ICH9_IFE_G
), board_ich9lan
},
7706 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_ICH9_IFE_GT
), board_ich9lan
},
7707 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_ICH9_IGP_AMT
), board_ich9lan
},
7708 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_ICH9_IGP_C
), board_ich9lan
},
7709 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_ICH9_BM
), board_ich9lan
},
7710 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_ICH9_IGP_M
), board_ich9lan
},
7711 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_ICH9_IGP_M_AMT
), board_ich9lan
},
7712 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_ICH9_IGP_M_V
), board_ich9lan
},
7714 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_ICH10_R_BM_LM
), board_ich9lan
},
7715 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_ICH10_R_BM_LF
), board_ich9lan
},
7716 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_ICH10_R_BM_V
), board_ich9lan
},
7718 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_ICH10_D_BM_LM
), board_ich10lan
},
7719 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_ICH10_D_BM_LF
), board_ich10lan
},
7720 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_ICH10_D_BM_V
), board_ich10lan
},
7722 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_PCH_M_HV_LM
), board_pchlan
},
7723 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_PCH_M_HV_LC
), board_pchlan
},
7724 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_PCH_D_HV_DM
), board_pchlan
},
7725 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_PCH_D_HV_DC
), board_pchlan
},
7727 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_PCH2_LV_LM
), board_pch2lan
},
7728 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_PCH2_LV_V
), board_pch2lan
},
7730 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_PCH_LPT_I217_LM
), board_pch_lpt
},
7731 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_PCH_LPT_I217_V
), board_pch_lpt
},
7732 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_PCH_LPTLP_I218_LM
), board_pch_lpt
},
7733 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_PCH_LPTLP_I218_V
), board_pch_lpt
},
7734 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_PCH_I218_LM2
), board_pch_lpt
},
7735 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_PCH_I218_V2
), board_pch_lpt
},
7736 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_PCH_I218_LM3
), board_pch_lpt
},
7737 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_PCH_I218_V3
), board_pch_lpt
},
7738 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_PCH_SPT_I219_LM
), board_pch_spt
},
7739 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_PCH_SPT_I219_V
), board_pch_spt
},
7740 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_PCH_SPT_I219_LM2
), board_pch_spt
},
7741 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_PCH_SPT_I219_V2
), board_pch_spt
},
7742 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_PCH_LBG_I219_LM3
), board_pch_spt
},
7743 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_PCH_SPT_I219_LM4
), board_pch_spt
},
7744 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_PCH_SPT_I219_V4
), board_pch_spt
},
7745 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_PCH_SPT_I219_LM5
), board_pch_spt
},
7746 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_PCH_SPT_I219_V5
), board_pch_spt
},
7747 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_PCH_CNP_I219_LM6
), board_pch_cnp
},
7748 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_PCH_CNP_I219_V6
), board_pch_cnp
},
7749 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_PCH_CNP_I219_LM7
), board_pch_cnp
},
7750 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_PCH_CNP_I219_V7
), board_pch_cnp
},
7751 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_PCH_ICP_I219_LM8
), board_pch_cnp
},
7752 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_PCH_ICP_I219_V8
), board_pch_cnp
},
7753 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_PCH_ICP_I219_LM9
), board_pch_cnp
},
7754 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_PCH_ICP_I219_V9
), board_pch_cnp
},
7755 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_PCH_CMP_I219_LM10
), board_pch_cnp
},
7756 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_PCH_CMP_I219_V10
), board_pch_cnp
},
7757 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_PCH_CMP_I219_LM11
), board_pch_cnp
},
7758 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_PCH_CMP_I219_V11
), board_pch_cnp
},
7759 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_PCH_CMP_I219_LM12
), board_pch_spt
},
7760 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_PCH_CMP_I219_V12
), board_pch_spt
},
7761 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_PCH_TGP_I219_LM13
), board_pch_cnp
},
7762 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_PCH_TGP_I219_V13
), board_pch_cnp
},
7763 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_PCH_TGP_I219_LM14
), board_pch_cnp
},
7764 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_PCH_TGP_I219_V14
), board_pch_cnp
},
7765 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_PCH_TGP_I219_LM15
), board_pch_cnp
},
7767 { 0, 0, 0, 0, 0, 0, 0 } /* terminate list */
7769 MODULE_DEVICE_TABLE(pci
, e1000_pci_tbl
);
7771 static const struct dev_pm_ops e1000_pm_ops
= {
7772 #ifdef CONFIG_PM_SLEEP
7773 .suspend
= e1000e_pm_suspend
,
7774 .resume
= e1000e_pm_resume
,
7775 .freeze
= e1000e_pm_freeze
,
7776 .thaw
= e1000e_pm_thaw
,
7777 .poweroff
= e1000e_pm_suspend
,
7778 .restore
= e1000e_pm_resume
,
7780 SET_RUNTIME_PM_OPS(e1000e_pm_runtime_suspend
, e1000e_pm_runtime_resume
,
7781 e1000e_pm_runtime_idle
)
7784 /* PCI Device API Driver */
7785 static struct pci_driver e1000_driver
= {
7786 .name
= e1000e_driver_name
,
7787 .id_table
= e1000_pci_tbl
,
7788 .probe
= e1000_probe
,
7789 .remove
= e1000_remove
,
7791 .pm
= &e1000_pm_ops
,
7793 .shutdown
= e1000_shutdown
,
7794 .err_handler
= &e1000_err_handler
7798 * e1000_init_module - Driver Registration Routine
7800 * e1000_init_module is the first routine called when the driver is
7801 * loaded. All it does is register with the PCI subsystem.
7803 static int __init
e1000_init_module(void)
7805 pr_info("Intel(R) PRO/1000 Network Driver - %s\n",
7806 e1000e_driver_version
);
7807 pr_info("Copyright(c) 1999 - 2015 Intel Corporation.\n");
7809 return pci_register_driver(&e1000_driver
);
7811 module_init(e1000_init_module
);
7814 * e1000_exit_module - Driver Exit Cleanup Routine
7816 * e1000_exit_module is called just before the driver is removed
7819 static void __exit
e1000_exit_module(void)
7821 pci_unregister_driver(&e1000_driver
);
7823 module_exit(e1000_exit_module
);
7825 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
7826 MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
7827 MODULE_LICENSE("GPL v2");
7828 MODULE_VERSION(DRV_VERSION
);