drivers/net/ethernet/intel/fm10k/fm10k.h

   1 /* Intel Ethernet Switch Host Interface Driver
   2  * Copyright(c) 2013 - 2015 Intel Corporation.
   3  *
   4  * This program is free software; you can redistribute it and/or modify it
   5  * under the terms and conditions of the GNU General Public License,
   6  * version 2, as published by the Free Software Foundation.
   7  *
   8  * This program is distributed in the hope it will be useful, but WITHOUT
   9  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  11  * more details.
  12  *
  13  * The full GNU General Public License is included in this distribution in
  14  * the file called "COPYING".
  15  *
  16  * Contact Information:
  17  * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  18  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  19  */
  20
  21 #ifndef _FM10K_H_
  22 #define _FM10K_H_
  23
  24 #include <linux/types.h>
  25 #include <linux/etherdevice.h>
  26 #include <linux/cpumask.h>
  27 #include <linux/rtnetlink.h>
  28 #include <linux/if_vlan.h>
  29 #include <linux/pci.h>
  30 #include <linux/net_tstamp.h>
  31 #include <linux/clocksource.h>
  32 #include <linux/ptp_clock_kernel.h>
  33
  34 #include "fm10k_pf.h"
  35 #include "fm10k_vf.h"
  36
  37 #define FM10K_MAX_JUMBO_FRAME_SIZE      15342   /* Maximum supported size 15K */
  38
  39 #define MAX_QUEUES      FM10K_MAX_QUEUES_PF
  40
  41 #define FM10K_MIN_RXD            128
  42 #define FM10K_MAX_RXD           4096
  43 #define FM10K_DEFAULT_RXD        256
  44
  45 #define FM10K_MIN_TXD            128
  46 #define FM10K_MAX_TXD           4096
  47 #define FM10K_DEFAULT_TXD        256
  48 #define FM10K_DEFAULT_TX_WORK    256
  49
  50 #define FM10K_RXBUFFER_256        256
  51 #define FM10K_RX_HDR_LEN        FM10K_RXBUFFER_256
  52 #define FM10K_RXBUFFER_2048      2048
  53 #define FM10K_RX_BUFSZ          FM10K_RXBUFFER_2048
  54
  55 /* How many Rx Buffers do we bundle into one write to the hardware ? */
  56 #define FM10K_RX_BUFFER_WRITE   16      /* Must be power of 2 */
  57
  58 #define FM10K_MAX_STATIONS      63
  59 struct fm10k_l2_accel {
  60         int size;
  61         u16 count;
  62         u16 dglort;
  63         struct rcu_head rcu;
  64         struct net_device *macvlan[0];
  65 };
  66
  67 enum fm10k_ring_state_t {
  68         __FM10K_TX_DETECT_HANG,
  69         __FM10K_HANG_CHECK_ARMED,
  70         __FM10K_TX_XPS_INIT_DONE,
  71 };
  72
  73 #define check_for_tx_hang(ring) \
  74         test_bit(__FM10K_TX_DETECT_HANG, &(ring)->state)
  75 #define set_check_for_tx_hang(ring) \
  76         set_bit(__FM10K_TX_DETECT_HANG, &(ring)->state)
  77 #define clear_check_for_tx_hang(ring) \
  78         clear_bit(__FM10K_TX_DETECT_HANG, &(ring)->state)
  79
  80 struct fm10k_tx_buffer {
  81         struct fm10k_tx_desc *next_to_watch;
  82         struct sk_buff *skb;
  83         unsigned int bytecount;
  84         u16 gso_segs;
  85         u16 tx_flags;
  86         DEFINE_DMA_UNMAP_ADDR(dma);
  87         DEFINE_DMA_UNMAP_LEN(len);
  88 };
  89
  90 struct fm10k_rx_buffer {
  91         dma_addr_t dma;
  92         struct page *page;
  93         u32 page_offset;
  94 };
  95
  96 struct fm10k_queue_stats {
  97         u64 packets;
  98         u64 bytes;
  99 };
 100
 101 struct fm10k_tx_queue_stats {
 102         u64 restart_queue;
 103         u64 csum_err;
 104         u64 tx_busy;
 105         u64 tx_done_old;
 106         u64 csum_good;
 107 };
 108
 109 struct fm10k_rx_queue_stats {
 110         u64 alloc_failed;
 111         u64 csum_err;
 112         u64 errors;
 113         u64 csum_good;
 114         u64 switch_errors;
 115         u64 drops;
 116         u64 pp_errors;
 117         u64 link_errors;
 118         u64 length_errors;
 119 };
 120
 121 struct fm10k_ring {
 122         struct fm10k_q_vector *q_vector;/* backpointer to host q_vector */
 123         struct net_device *netdev;      /* netdev ring belongs to */
 124         struct device *dev;             /* device for DMA mapping */
 125         struct fm10k_l2_accel __rcu *l2_accel;  /* L2 acceleration list */
 126         void *desc;                     /* descriptor ring memory */
 127         union {
 128                 struct fm10k_tx_buffer *tx_buffer;
 129                 struct fm10k_rx_buffer *rx_buffer;
 130         };
 131         u32 __iomem *tail;
 132         unsigned long state;
 133         dma_addr_t dma;                 /* phys. address of descriptor ring */
 134         unsigned int size;              /* length in bytes */
 135
 136         u8 queue_index;                 /* needed for queue management */
 137         u8 reg_idx;                     /* holds the special value that gets
 138                                          * the hardware register offset
 139                                          * associated with this ring, which is
 140                                          * different for DCB and RSS modes
 141                                          */
 142         u8 qos_pc;                      /* priority class of queue */
 143         u16 vid;                        /* default VLAN ID of queue */
 144         u16 count;                      /* amount of descriptors */
 145
 146         u16 next_to_alloc;
 147         u16 next_to_use;
 148         u16 next_to_clean;
 149
 150         struct fm10k_queue_stats stats;
 151         struct u64_stats_sync syncp;
 152         union {
 153                 /* Tx */
 154                 struct fm10k_tx_queue_stats tx_stats;
 155                 /* Rx */
 156                 struct {
 157                         struct fm10k_rx_queue_stats rx_stats;
 158                         struct sk_buff *skb;
 159                 };
 160         };
 161 } ____cacheline_internodealigned_in_smp;
 162
 163 struct fm10k_ring_container {
 164         struct fm10k_ring *ring;        /* pointer to linked list of rings */
 165         unsigned int total_bytes;       /* total bytes processed this int */
 166         unsigned int total_packets;     /* total packets processed this int */
 167         u16 work_limit;                 /* total work allowed per interrupt */
 168         u16 itr;                        /* interrupt throttle rate value */
 169         u8 itr_scale;                   /* ITR adjustment based on PCI speed */
 170         u8 count;                       /* total number of rings in vector */
 171 };
 172
 173 #define FM10K_ITR_MAX           0x0FFF  /* maximum value for ITR */
 174 #define FM10K_ITR_10K           100     /* 100us */
 175 #define FM10K_ITR_20K           50      /* 50us */
 176 #define FM10K_ITR_40K           25      /* 25us */
 177 #define FM10K_ITR_ADAPTIVE      0x8000  /* adaptive interrupt moderation flag */
 178
 179 #define ITR_IS_ADAPTIVE(itr) (!!(itr & FM10K_ITR_ADAPTIVE))
 180
 181 #define FM10K_TX_ITR_DEFAULT    FM10K_ITR_40K
 182 #define FM10K_RX_ITR_DEFAULT    FM10K_ITR_20K
 183 #define FM10K_ITR_ENABLE        (FM10K_ITR_AUTOMASK | FM10K_ITR_MASK_CLEAR)
 184
 185 static inline struct netdev_queue *txring_txq(const struct fm10k_ring *ring)
 186 {
 187         return &ring->netdev->_tx[ring->queue_index];
 188 }
 189
 190 /* iterator for handling rings in ring container */
 191 #define fm10k_for_each_ring(pos, head) \
 192         for (pos = &(head).ring[(head).count]; (--pos) >= (head).ring;)
 193
 194 #define MAX_Q_VECTORS 256
 195 #define MIN_Q_VECTORS   1
 196 enum fm10k_non_q_vectors {
 197         FM10K_MBX_VECTOR,
 198 #define NON_Q_VECTORS_VF NON_Q_VECTORS_PF
 199         NON_Q_VECTORS_PF
 200 };
 201
 202 #define NON_Q_VECTORS(hw)       (((hw)->mac.type == fm10k_mac_pf) ? \
 203                                                 NON_Q_VECTORS_PF : \
 204                                                 NON_Q_VECTORS_VF)
 205 #define MIN_MSIX_COUNT(hw)      (MIN_Q_VECTORS + NON_Q_VECTORS(hw))
 206
 207 struct fm10k_q_vector {
 208         struct fm10k_intfc *interface;
 209         u32 __iomem *itr;       /* pointer to ITR register for this vector */
 210         u16 v_idx;              /* index of q_vector within interface array */
 211         struct fm10k_ring_container rx, tx;
 212
 213         struct napi_struct napi;
 214         cpumask_t affinity_mask;
 215         char name[IFNAMSIZ + 9];
 216
 217 #ifdef CONFIG_DEBUG_FS
 218         struct dentry *dbg_q_vector;
 219 #endif /* CONFIG_DEBUG_FS */
 220         struct rcu_head rcu;    /* to avoid race with update stats on free */
 221
 222         /* for dynamic allocation of rings associated with this q_vector */
 223         struct fm10k_ring ring[0] ____cacheline_internodealigned_in_smp;
 224 };
 225
 226 enum fm10k_ring_f_enum {
 227         RING_F_RSS,
 228         RING_F_QOS,
 229         RING_F_ARRAY_SIZE  /* must be last in enum set */
 230 };
 231
 232 struct fm10k_ring_feature {
 233         u16 limit;      /* upper limit on feature indices */
 234         u16 indices;    /* current value of indices */
 235         u16 mask;       /* Mask used for feature to ring mapping */
 236         u16 offset;     /* offset to start of feature */
 237 };
 238
 239 struct fm10k_iov_data {
 240         unsigned int            num_vfs;
 241         unsigned int            next_vf_mbx;
 242         struct rcu_head         rcu;
 243         struct fm10k_vf_info    vf_info[0];
 244 };
 245
 246 #define fm10k_vxlan_port_for_each(vp, intfc) \
 247         list_for_each_entry(vp, &(intfc)->vxlan_port, list)
 248 struct fm10k_vxlan_port {
 249         struct list_head        list;
 250         sa_family_t             sa_family;
 251         __be16                  port;
 252 };
 253
 254 /* one work queue for entire driver */
 255 extern struct workqueue_struct *fm10k_workqueue;
 256
 257 struct fm10k_intfc {
 258         unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
 259         struct net_device *netdev;
 260         struct fm10k_l2_accel *l2_accel; /* pointer to L2 acceleration list */
 261         struct pci_dev *pdev;
 262         unsigned long state;
 263
 264         u32 flags;
 265 #define FM10K_FLAG_RESET_REQUESTED              (u32)(BIT(0))
 266 #define FM10K_FLAG_RSS_FIELD_IPV4_UDP           (u32)(BIT(1))
 267 #define FM10K_FLAG_RSS_FIELD_IPV6_UDP           (u32)(BIT(2))
 268 #define FM10K_FLAG_RX_TS_ENABLED                (u32)(BIT(3))
 269 #define FM10K_FLAG_SWPRI_CONFIG                 (u32)(BIT(4))
 270 #define FM10K_FLAG_DEBUG_STATS                  (u32)(BIT(5))
 271         int xcast_mode;
 272
 273         /* Tx fast path data */
 274         int num_tx_queues;
 275         u16 tx_itr;
 276
 277         /* Rx fast path data */
 278         int num_rx_queues;
 279         u16 rx_itr;
 280
 281         /* TX */
 282         struct fm10k_ring *tx_ring[MAX_QUEUES] ____cacheline_aligned_in_smp;
 283
 284         u64 restart_queue;
 285         u64 tx_busy;
 286         u64 tx_csum_errors;
 287         u64 alloc_failed;
 288         u64 rx_csum_errors;
 289
 290         u64 tx_bytes_nic;
 291         u64 tx_packets_nic;
 292         u64 rx_bytes_nic;
 293         u64 rx_packets_nic;
 294         u64 rx_drops_nic;
 295         u64 rx_overrun_pf;
 296         u64 rx_overrun_vf;
 297
 298         /* Debug Statistics */
 299         u64 hw_sm_mbx_full;
 300         u64 hw_csum_tx_good;
 301         u64 hw_csum_rx_good;
 302         u64 rx_switch_errors;
 303         u64 rx_drops;
 304         u64 rx_pp_errors;
 305         u64 rx_link_errors;
 306         u64 rx_length_errors;
 307
 308         u32 tx_timeout_count;
 309
 310         /* RX */
 311         struct fm10k_ring *rx_ring[MAX_QUEUES];
 312
 313         /* Queueing vectors */
 314         struct fm10k_q_vector *q_vector[MAX_Q_VECTORS];
 315         struct msix_entry *msix_entries;
 316         int num_q_vectors;      /* current number of q_vectors for device */
 317         struct fm10k_ring_feature ring_feature[RING_F_ARRAY_SIZE];
 318
 319         /* SR-IOV information management structure */
 320         struct fm10k_iov_data *iov_data;
 321
 322         struct fm10k_hw_stats stats;
 323         struct fm10k_hw hw;
 324         u32 __iomem *uc_addr;
 325         u32 __iomem *sw_addr;
 326         u16 msg_enable;
 327         u16 tx_ring_count;
 328         u16 rx_ring_count;
 329         struct timer_list service_timer;
 330         struct work_struct service_task;
 331         unsigned long next_stats_update;
 332         unsigned long next_tx_hang_check;
 333         unsigned long last_reset;
 334         unsigned long link_down_event;
 335         bool host_ready;
 336
 337         u32 reta[FM10K_RETA_SIZE];
 338         u32 rssrk[FM10K_RSSRK_SIZE];
 339
 340         /* VXLAN port tracking information */
 341         struct list_head vxlan_port;
 342
 343 #ifdef CONFIG_DEBUG_FS
 344         struct dentry *dbg_intfc;
 345
 346 #endif /* CONFIG_DEBUG_FS */
 347         struct ptp_clock_info ptp_caps;
 348         struct ptp_clock *ptp_clock;
 349
 350         struct sk_buff_head ts_tx_skb_queue;
 351         u32 tx_hwtstamp_timeouts;
 352
 353         struct hwtstamp_config ts_config;
 354         /* We are unable to actually adjust the clock beyond the frequency
 355          * value.  Once the clock is started there is no resetting it.  As
 356          * such we maintain a separate offset from the actual hardware clock
 357          * to allow for offset adjustment.
 358          */
 359         s64 ptp_adjust;
 360         rwlock_t systime_lock;
 361 #ifdef CONFIG_DCB
 362         u8 pfc_en;
 363 #endif
 364         u8 rx_pause;
 365
 366         /* GLORT resources in use by PF */
 367         u16 glort;
 368         u16 glort_count;
 369
 370         /* VLAN ID for updating multicast/unicast lists */
 371         u16 vid;
 372 };
 373
 374 enum fm10k_state_t {
 375         __FM10K_RESETTING,
 376         __FM10K_DOWN,
 377         __FM10K_SERVICE_SCHED,
 378         __FM10K_SERVICE_DISABLE,
 379         __FM10K_MBX_LOCK,
 380         __FM10K_LINK_DOWN,
 381 };
 382
 383 static inline void fm10k_mbx_lock(struct fm10k_intfc *interface)
 384 {
 385         /* busy loop if we cannot obtain the lock as some calls
 386          * such as ndo_set_rx_mode may be made in atomic context
 387          */
 388         while (test_and_set_bit(__FM10K_MBX_LOCK, &interface->state))
 389                 udelay(20);
 390 }
 391
 392 static inline void fm10k_mbx_unlock(struct fm10k_intfc *interface)
 393 {
 394         /* flush memory to make sure state is correct */
 395         smp_mb__before_atomic();
 396         clear_bit(__FM10K_MBX_LOCK, &interface->state);
 397 }
 398
 399 static inline int fm10k_mbx_trylock(struct fm10k_intfc *interface)
 400 {
 401         return !test_and_set_bit(__FM10K_MBX_LOCK, &interface->state);
 402 }
 403
 404 /* fm10k_test_staterr - test bits in Rx descriptor status and error fields */
 405 static inline __le32 fm10k_test_staterr(union fm10k_rx_desc *rx_desc,
 406                                         const u32 stat_err_bits)
 407 {
 408         return rx_desc->d.staterr & cpu_to_le32(stat_err_bits);
 409 }
 410
 411 /* fm10k_desc_unused - calculate if we have unused descriptors */
 412 static inline u16 fm10k_desc_unused(struct fm10k_ring *ring)
 413 {
 414         s16 unused = ring->next_to_clean - ring->next_to_use - 1;
 415
 416         return likely(unused < 0) ? unused + ring->count : unused;
 417 }
 418
 419 #define FM10K_TX_DESC(R, i)     \
 420         (&(((struct fm10k_tx_desc *)((R)->desc))[i]))
 421 #define FM10K_RX_DESC(R, i)     \
 422          (&(((union fm10k_rx_desc *)((R)->desc))[i]))
 423
 424 #define FM10K_MAX_TXD_PWR       14
 425 #define FM10K_MAX_DATA_PER_TXD  BIT(FM10K_MAX_TXD_PWR)
 426
 427 /* Tx Descriptors needed, worst case */
 428 #define TXD_USE_COUNT(S)        DIV_ROUND_UP((S), FM10K_MAX_DATA_PER_TXD)
 429 #define DESC_NEEDED     (MAX_SKB_FRAGS + 4)
 430
 431 enum fm10k_tx_flags {
 432         /* Tx offload flags */
 433         FM10K_TX_FLAGS_CSUM     = 0x01,
 434 };
 435
 436 /* This structure is stored as little endian values as that is the native
 437  * format of the Rx descriptor.  The ordering of these fields is reversed
 438  * from the actual ftag header to allow for a single bswap to take care
 439  * of placing all of the values in network order
 440  */
 441 union fm10k_ftag_info {
 442         __le64 ftag;
 443         struct {
 444                 /* dglort and sglort combined into a single 32bit desc read */
 445                 __le32 glort;
 446                 /* upper 16 bits of VLAN are reserved 0 for swpri_type_user */
 447                 __le32 vlan;
 448         } d;
 449         struct {
 450                 __le16 dglort;
 451                 __le16 sglort;
 452                 __le16 vlan;
 453                 __le16 swpri_type_user;
 454         } w;
 455 };
 456
 457 struct fm10k_cb {
 458         union {
 459                 __le64 tstamp;
 460                 unsigned long ts_tx_timeout;
 461         };
 462         union fm10k_ftag_info fi;
 463 };
 464
 465 #define FM10K_CB(skb) ((struct fm10k_cb *)(skb)->cb)
 466
 467 /* main */
 468 extern char fm10k_driver_name[];
 469 extern const char fm10k_driver_version[];
 470 int fm10k_init_queueing_scheme(struct fm10k_intfc *interface);
 471 void fm10k_clear_queueing_scheme(struct fm10k_intfc *interface);
 472 __be16 fm10k_tx_encap_offload(struct sk_buff *skb);
 473 netdev_tx_t fm10k_xmit_frame_ring(struct sk_buff *skb,
 474                                   struct fm10k_ring *tx_ring);
 475 void fm10k_tx_timeout_reset(struct fm10k_intfc *interface);
 476 bool fm10k_check_tx_hang(struct fm10k_ring *tx_ring);
 477 void fm10k_alloc_rx_buffers(struct fm10k_ring *rx_ring, u16 cleaned_count);
 478
 479 /* PCI */
 480 void fm10k_mbx_free_irq(struct fm10k_intfc *);
 481 int fm10k_mbx_request_irq(struct fm10k_intfc *);
 482 void fm10k_qv_free_irq(struct fm10k_intfc *interface);
 483 int fm10k_qv_request_irq(struct fm10k_intfc *interface);
 484 int fm10k_register_pci_driver(void);
 485 void fm10k_unregister_pci_driver(void);
 486 void fm10k_up(struct fm10k_intfc *interface);
 487 void fm10k_down(struct fm10k_intfc *interface);
 488 void fm10k_update_stats(struct fm10k_intfc *interface);
 489 void fm10k_service_event_schedule(struct fm10k_intfc *interface);
 490 void fm10k_update_rx_drop_en(struct fm10k_intfc *interface);
 491 #ifdef CONFIG_NET_POLL_CONTROLLER
 492 void fm10k_netpoll(struct net_device *netdev);
 493 #endif
 494
 495 /* Netdev */
 496 struct net_device *fm10k_alloc_netdev(const struct fm10k_info *info);
 497 int fm10k_setup_rx_resources(struct fm10k_ring *);
 498 int fm10k_setup_tx_resources(struct fm10k_ring *);
 499 void fm10k_free_rx_resources(struct fm10k_ring *);
 500 void fm10k_free_tx_resources(struct fm10k_ring *);
 501 void fm10k_clean_all_rx_rings(struct fm10k_intfc *);
 502 void fm10k_clean_all_tx_rings(struct fm10k_intfc *);
 503 void fm10k_unmap_and_free_tx_resource(struct fm10k_ring *,
 504                                       struct fm10k_tx_buffer *);
 505 void fm10k_restore_rx_state(struct fm10k_intfc *);
 506 void fm10k_reset_rx_state(struct fm10k_intfc *);
 507 int fm10k_setup_tc(struct net_device *dev, u8 tc);
 508 int fm10k_open(struct net_device *netdev);
 509 int fm10k_close(struct net_device *netdev);
 510
 511 /* Ethtool */
 512 void fm10k_set_ethtool_ops(struct net_device *dev);
 513 u32 fm10k_get_reta_size(struct net_device *netdev);
 514 void fm10k_write_reta(struct fm10k_intfc *interface, const u32 *indir);
 515
 516 /* IOV */
 517 s32 fm10k_iov_event(struct fm10k_intfc *interface);
 518 s32 fm10k_iov_mbx(struct fm10k_intfc *interface);
 519 void fm10k_iov_suspend(struct pci_dev *pdev);
 520 int fm10k_iov_resume(struct pci_dev *pdev);
 521 void fm10k_iov_disable(struct pci_dev *pdev);
 522 int fm10k_iov_configure(struct pci_dev *pdev, int num_vfs);
 523 s32 fm10k_iov_update_pvid(struct fm10k_intfc *interface, u16 glort, u16 pvid);
 524 int fm10k_ndo_set_vf_mac(struct net_device *netdev, int vf_idx, u8 *mac);
 525 int fm10k_ndo_set_vf_vlan(struct net_device *netdev,
 526                           int vf_idx, u16 vid, u8 qos);
 527 int fm10k_ndo_set_vf_bw(struct net_device *netdev, int vf_idx, int rate,
 528                         int unused);
 529 int fm10k_ndo_get_vf_config(struct net_device *netdev,
 530                             int vf_idx, struct ifla_vf_info *ivi);
 531
 532 /* DebugFS */
 533 #ifdef CONFIG_DEBUG_FS
 534 void fm10k_dbg_q_vector_init(struct fm10k_q_vector *q_vector);
 535 void fm10k_dbg_q_vector_exit(struct fm10k_q_vector *q_vector);
 536 void fm10k_dbg_intfc_init(struct fm10k_intfc *interface);
 537 void fm10k_dbg_intfc_exit(struct fm10k_intfc *interface);
 538 void fm10k_dbg_init(void);
 539 void fm10k_dbg_exit(void);
 540 #else
 541 static inline void fm10k_dbg_q_vector_init(struct fm10k_q_vector *q_vector) {}
 542 static inline void fm10k_dbg_q_vector_exit(struct fm10k_q_vector *q_vector) {}
 543 static inline void fm10k_dbg_intfc_init(struct fm10k_intfc *interface) {}
 544 static inline void fm10k_dbg_intfc_exit(struct fm10k_intfc *interface) {}
 545 static inline void fm10k_dbg_init(void) {}
 546 static inline void fm10k_dbg_exit(void) {}
 547 #endif /* CONFIG_DEBUG_FS */
 548
 549 /* Time Stamping */
 550 void fm10k_systime_to_hwtstamp(struct fm10k_intfc *interface,
 551                                struct skb_shared_hwtstamps *hwtstamp,
 552                                u64 systime);
 553 void fm10k_ts_tx_enqueue(struct fm10k_intfc *interface, struct sk_buff *skb);
 554 void fm10k_ts_tx_hwtstamp(struct fm10k_intfc *interface, __le16 dglort,
 555                           u64 systime);
 556 void fm10k_ts_reset(struct fm10k_intfc *interface);
 557 void fm10k_ts_init(struct fm10k_intfc *interface);
 558 void fm10k_ts_tx_subtask(struct fm10k_intfc *interface);
 559 void fm10k_ptp_register(struct fm10k_intfc *interface);
 560 void fm10k_ptp_unregister(struct fm10k_intfc *interface);
 561 int fm10k_get_ts_config(struct net_device *netdev, struct ifreq *ifr);
 562 int fm10k_set_ts_config(struct net_device *netdev, struct ifreq *ifr);
 563
 564 /* DCB */
 565 #ifdef CONFIG_DCB
 566 void fm10k_dcbnl_set_ops(struct net_device *dev);
 567 #else
 568 static inline void fm10k_dcbnl_set_ops(struct net_device *dev) {}
 569 #endif
 570 #endif /* _FM10K_H_ */