1 /* Intel Ethernet Switch Host Interface Driver
2 * Copyright(c) 2013 - 2016 Intel Corporation.
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * The full GNU General Public License is included in this distribution in
14 * the file called "COPYING".
16 * Contact Information:
17 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
18 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
21 #include <linux/types.h>
22 #include <linux/module.h>
26 #include <linux/if_macvlan.h>
27 #include <linux/prefetch.h>
31 #define DRV_VERSION "0.19.3-k"
32 #define DRV_SUMMARY "Intel(R) Ethernet Switch Host Interface Driver"
33 const char fm10k_driver_version
[] = DRV_VERSION
;
34 char fm10k_driver_name
[] = "fm10k";
35 static const char fm10k_driver_string
[] = DRV_SUMMARY
;
36 static const char fm10k_copyright
[] =
37 "Copyright (c) 2013 Intel Corporation.";
39 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
40 MODULE_DESCRIPTION(DRV_SUMMARY
);
41 MODULE_LICENSE("GPL");
42 MODULE_VERSION(DRV_VERSION
);
44 /* single workqueue for entire fm10k driver */
45 struct workqueue_struct
*fm10k_workqueue
;
48 * fm10k_init_module - Driver Registration Routine
50 * fm10k_init_module is the first routine called when the driver is
51 * loaded. All it does is register with the PCI subsystem.
53 static int __init
fm10k_init_module(void)
55 pr_info("%s - version %s\n", fm10k_driver_string
, fm10k_driver_version
);
56 pr_info("%s\n", fm10k_copyright
);
58 /* create driver workqueue */
59 fm10k_workqueue
= create_workqueue("fm10k");
63 return fm10k_register_pci_driver();
65 module_init(fm10k_init_module
);
68 * fm10k_exit_module - Driver Exit Cleanup Routine
70 * fm10k_exit_module is called just before the driver is removed
73 static void __exit
fm10k_exit_module(void)
75 fm10k_unregister_pci_driver();
79 /* destroy driver workqueue */
80 flush_workqueue(fm10k_workqueue
);
81 destroy_workqueue(fm10k_workqueue
);
83 module_exit(fm10k_exit_module
);
85 static bool fm10k_alloc_mapped_page(struct fm10k_ring
*rx_ring
,
86 struct fm10k_rx_buffer
*bi
)
88 struct page
*page
= bi
->page
;
91 /* Only page will be NULL if buffer was consumed */
95 /* alloc new page for storage */
96 page
= dev_alloc_page();
97 if (unlikely(!page
)) {
98 rx_ring
->rx_stats
.alloc_failed
++;
102 /* map page for use */
103 dma
= dma_map_page(rx_ring
->dev
, page
, 0, PAGE_SIZE
, DMA_FROM_DEVICE
);
105 /* if mapping failed free memory back to system since
106 * there isn't much point in holding memory we can't use
108 if (dma_mapping_error(rx_ring
->dev
, dma
)) {
111 rx_ring
->rx_stats
.alloc_failed
++;
123 * fm10k_alloc_rx_buffers - Replace used receive buffers
124 * @rx_ring: ring to place buffers on
125 * @cleaned_count: number of buffers to replace
127 void fm10k_alloc_rx_buffers(struct fm10k_ring
*rx_ring
, u16 cleaned_count
)
129 union fm10k_rx_desc
*rx_desc
;
130 struct fm10k_rx_buffer
*bi
;
131 u16 i
= rx_ring
->next_to_use
;
137 rx_desc
= FM10K_RX_DESC(rx_ring
, i
);
138 bi
= &rx_ring
->rx_buffer
[i
];
142 if (!fm10k_alloc_mapped_page(rx_ring
, bi
))
145 /* Refresh the desc even if buffer_addrs didn't change
146 * because each write-back erases this info.
148 rx_desc
->q
.pkt_addr
= cpu_to_le64(bi
->dma
+ bi
->page_offset
);
154 rx_desc
= FM10K_RX_DESC(rx_ring
, 0);
155 bi
= rx_ring
->rx_buffer
;
159 /* clear the status bits for the next_to_use descriptor */
160 rx_desc
->d
.staterr
= 0;
163 } while (cleaned_count
);
167 if (rx_ring
->next_to_use
!= i
) {
168 /* record the next descriptor to use */
169 rx_ring
->next_to_use
= i
;
171 /* update next to alloc since we have filled the ring */
172 rx_ring
->next_to_alloc
= i
;
174 /* Force memory writes to complete before letting h/w
175 * know there are new descriptors to fetch. (Only
176 * applicable for weak-ordered memory model archs,
181 /* notify hardware of new descriptors */
182 writel(i
, rx_ring
->tail
);
187 * fm10k_reuse_rx_page - page flip buffer and store it back on the ring
188 * @rx_ring: rx descriptor ring to store buffers on
189 * @old_buff: donor buffer to have page reused
191 * Synchronizes page for reuse by the interface
193 static void fm10k_reuse_rx_page(struct fm10k_ring
*rx_ring
,
194 struct fm10k_rx_buffer
*old_buff
)
196 struct fm10k_rx_buffer
*new_buff
;
197 u16 nta
= rx_ring
->next_to_alloc
;
199 new_buff
= &rx_ring
->rx_buffer
[nta
];
201 /* update, and store next to alloc */
203 rx_ring
->next_to_alloc
= (nta
< rx_ring
->count
) ? nta
: 0;
205 /* transfer page from old buffer to new buffer */
206 *new_buff
= *old_buff
;
208 /* sync the buffer for use by the device */
209 dma_sync_single_range_for_device(rx_ring
->dev
, old_buff
->dma
,
210 old_buff
->page_offset
,
215 static inline bool fm10k_page_is_reserved(struct page
*page
)
217 return (page_to_nid(page
) != numa_mem_id()) || page_is_pfmemalloc(page
);
220 static bool fm10k_can_reuse_rx_page(struct fm10k_rx_buffer
*rx_buffer
,
222 unsigned int __maybe_unused truesize
)
224 /* avoid re-using remote pages */
225 if (unlikely(fm10k_page_is_reserved(page
)))
228 #if (PAGE_SIZE < 8192)
229 /* if we are only owner of page we can reuse it */
230 if (unlikely(page_count(page
) != 1))
233 /* flip page offset to other buffer */
234 rx_buffer
->page_offset
^= FM10K_RX_BUFSZ
;
236 /* move offset up to the next cache line */
237 rx_buffer
->page_offset
+= truesize
;
239 if (rx_buffer
->page_offset
> (PAGE_SIZE
- FM10K_RX_BUFSZ
))
243 /* Even if we own the page, we are not allowed to use atomic_set()
244 * This would break get_page_unless_zero() users.
252 * fm10k_add_rx_frag - Add contents of Rx buffer to sk_buff
253 * @rx_buffer: buffer containing page to add
254 * @rx_desc: descriptor containing length of buffer written by hardware
255 * @skb: sk_buff to place the data into
257 * This function will add the data contained in rx_buffer->page to the skb.
258 * This is done either through a direct copy if the data in the buffer is
259 * less than the skb header size, otherwise it will just attach the page as
262 * The function will then update the page offset if necessary and return
263 * true if the buffer can be reused by the interface.
265 static bool fm10k_add_rx_frag(struct fm10k_rx_buffer
*rx_buffer
,
266 union fm10k_rx_desc
*rx_desc
,
269 struct page
*page
= rx_buffer
->page
;
270 unsigned char *va
= page_address(page
) + rx_buffer
->page_offset
;
271 unsigned int size
= le16_to_cpu(rx_desc
->w
.length
);
272 #if (PAGE_SIZE < 8192)
273 unsigned int truesize
= FM10K_RX_BUFSZ
;
275 unsigned int truesize
= SKB_DATA_ALIGN(size
);
277 unsigned int pull_len
;
279 if (unlikely(skb_is_nonlinear(skb
)))
282 if (likely(size
<= FM10K_RX_HDR_LEN
)) {
283 memcpy(__skb_put(skb
, size
), va
, ALIGN(size
, sizeof(long)));
285 /* page is not reserved, we can reuse buffer as-is */
286 if (likely(!fm10k_page_is_reserved(page
)))
289 /* this page cannot be reused so discard it */
294 /* we need the header to contain the greater of either ETH_HLEN or
295 * 60 bytes if the skb->len is less than 60 for skb_pad.
297 pull_len
= eth_get_headlen(va
, FM10K_RX_HDR_LEN
);
299 /* align pull length to size of long to optimize memcpy performance */
300 memcpy(__skb_put(skb
, pull_len
), va
, ALIGN(pull_len
, sizeof(long)));
302 /* update all of the pointers */
307 skb_add_rx_frag(skb
, skb_shinfo(skb
)->nr_frags
, page
,
308 (unsigned long)va
& ~PAGE_MASK
, size
, truesize
);
310 return fm10k_can_reuse_rx_page(rx_buffer
, page
, truesize
);
313 static struct sk_buff
*fm10k_fetch_rx_buffer(struct fm10k_ring
*rx_ring
,
314 union fm10k_rx_desc
*rx_desc
,
317 struct fm10k_rx_buffer
*rx_buffer
;
320 rx_buffer
= &rx_ring
->rx_buffer
[rx_ring
->next_to_clean
];
321 page
= rx_buffer
->page
;
325 void *page_addr
= page_address(page
) +
326 rx_buffer
->page_offset
;
328 /* prefetch first cache line of first page */
330 #if L1_CACHE_BYTES < 128
331 prefetch(page_addr
+ L1_CACHE_BYTES
);
334 /* allocate a skb to store the frags */
335 skb
= napi_alloc_skb(&rx_ring
->q_vector
->napi
,
337 if (unlikely(!skb
)) {
338 rx_ring
->rx_stats
.alloc_failed
++;
342 /* we will be copying header into skb->data in
343 * pskb_may_pull so it is in our interest to prefetch
344 * it now to avoid a possible cache miss
346 prefetchw(skb
->data
);
349 /* we are reusing so sync this buffer for CPU use */
350 dma_sync_single_range_for_cpu(rx_ring
->dev
,
352 rx_buffer
->page_offset
,
356 /* pull page into skb */
357 if (fm10k_add_rx_frag(rx_buffer
, rx_desc
, skb
)) {
358 /* hand second half of page back to the ring */
359 fm10k_reuse_rx_page(rx_ring
, rx_buffer
);
361 /* we are not reusing the buffer so unmap it */
362 dma_unmap_page(rx_ring
->dev
, rx_buffer
->dma
,
363 PAGE_SIZE
, DMA_FROM_DEVICE
);
366 /* clear contents of rx_buffer */
367 rx_buffer
->page
= NULL
;
372 static inline void fm10k_rx_checksum(struct fm10k_ring
*ring
,
373 union fm10k_rx_desc
*rx_desc
,
376 skb_checksum_none_assert(skb
);
378 /* Rx checksum disabled via ethtool */
379 if (!(ring
->netdev
->features
& NETIF_F_RXCSUM
))
382 /* TCP/UDP checksum error bit is set */
383 if (fm10k_test_staterr(rx_desc
,
384 FM10K_RXD_STATUS_L4E
|
385 FM10K_RXD_STATUS_L4E2
|
386 FM10K_RXD_STATUS_IPE
|
387 FM10K_RXD_STATUS_IPE2
)) {
388 ring
->rx_stats
.csum_err
++;
392 /* It must be a TCP or UDP packet with a valid checksum */
393 if (fm10k_test_staterr(rx_desc
, FM10K_RXD_STATUS_L4CS2
))
394 skb
->encapsulation
= true;
395 else if (!fm10k_test_staterr(rx_desc
, FM10K_RXD_STATUS_L4CS
))
398 skb
->ip_summed
= CHECKSUM_UNNECESSARY
;
400 ring
->rx_stats
.csum_good
++;
403 #define FM10K_RSS_L4_TYPES_MASK \
404 (BIT(FM10K_RSSTYPE_IPV4_TCP) | \
405 BIT(FM10K_RSSTYPE_IPV4_UDP) | \
406 BIT(FM10K_RSSTYPE_IPV6_TCP) | \
407 BIT(FM10K_RSSTYPE_IPV6_UDP))
409 static inline void fm10k_rx_hash(struct fm10k_ring
*ring
,
410 union fm10k_rx_desc
*rx_desc
,
415 if (!(ring
->netdev
->features
& NETIF_F_RXHASH
))
418 rss_type
= le16_to_cpu(rx_desc
->w
.pkt_info
) & FM10K_RXD_RSSTYPE_MASK
;
422 skb_set_hash(skb
, le32_to_cpu(rx_desc
->d
.rss
),
423 (BIT(rss_type
) & FM10K_RSS_L4_TYPES_MASK
) ?
424 PKT_HASH_TYPE_L4
: PKT_HASH_TYPE_L3
);
427 static void fm10k_type_trans(struct fm10k_ring
*rx_ring
,
428 union fm10k_rx_desc __maybe_unused
*rx_desc
,
431 struct net_device
*dev
= rx_ring
->netdev
;
432 struct fm10k_l2_accel
*l2_accel
= rcu_dereference_bh(rx_ring
->l2_accel
);
434 /* check to see if DGLORT belongs to a MACVLAN */
436 u16 idx
= le16_to_cpu(FM10K_CB(skb
)->fi
.w
.dglort
) - 1;
438 idx
-= l2_accel
->dglort
;
439 if (idx
< l2_accel
->size
&& l2_accel
->macvlan
[idx
])
440 dev
= l2_accel
->macvlan
[idx
];
445 skb
->protocol
= eth_type_trans(skb
, dev
);
450 /* update MACVLAN statistics */
451 macvlan_count_rx(netdev_priv(dev
), skb
->len
+ ETH_HLEN
, 1,
452 !!(rx_desc
->w
.hdr_info
&
453 cpu_to_le16(FM10K_RXD_HDR_INFO_XC_MASK
)));
457 * fm10k_process_skb_fields - Populate skb header fields from Rx descriptor
458 * @rx_ring: rx descriptor ring packet is being transacted on
459 * @rx_desc: pointer to the EOP Rx descriptor
460 * @skb: pointer to current skb being populated
462 * This function checks the ring, descriptor, and packet information in
463 * order to populate the hash, checksum, VLAN, timestamp, protocol, and
464 * other fields within the skb.
466 static unsigned int fm10k_process_skb_fields(struct fm10k_ring
*rx_ring
,
467 union fm10k_rx_desc
*rx_desc
,
470 unsigned int len
= skb
->len
;
472 fm10k_rx_hash(rx_ring
, rx_desc
, skb
);
474 fm10k_rx_checksum(rx_ring
, rx_desc
, skb
);
476 FM10K_CB(skb
)->fi
.w
.vlan
= rx_desc
->w
.vlan
;
478 skb_record_rx_queue(skb
, rx_ring
->queue_index
);
480 FM10K_CB(skb
)->fi
.d
.glort
= rx_desc
->d
.glort
;
482 if (rx_desc
->w
.vlan
) {
483 u16 vid
= le16_to_cpu(rx_desc
->w
.vlan
);
485 if ((vid
& VLAN_VID_MASK
) != rx_ring
->vid
)
486 __vlan_hwaccel_put_tag(skb
, htons(ETH_P_8021Q
), vid
);
487 else if (vid
& VLAN_PRIO_MASK
)
488 __vlan_hwaccel_put_tag(skb
, htons(ETH_P_8021Q
),
489 vid
& VLAN_PRIO_MASK
);
492 fm10k_type_trans(rx_ring
, rx_desc
, skb
);
498 * fm10k_is_non_eop - process handling of non-EOP buffers
499 * @rx_ring: Rx ring being processed
500 * @rx_desc: Rx descriptor for current buffer
502 * This function updates next to clean. If the buffer is an EOP buffer
503 * this function exits returning false, otherwise it will place the
504 * sk_buff in the next buffer to be chained and return true indicating
505 * that this is in fact a non-EOP buffer.
507 static bool fm10k_is_non_eop(struct fm10k_ring
*rx_ring
,
508 union fm10k_rx_desc
*rx_desc
)
510 u32 ntc
= rx_ring
->next_to_clean
+ 1;
512 /* fetch, update, and store next to clean */
513 ntc
= (ntc
< rx_ring
->count
) ? ntc
: 0;
514 rx_ring
->next_to_clean
= ntc
;
516 prefetch(FM10K_RX_DESC(rx_ring
, ntc
));
518 if (likely(fm10k_test_staterr(rx_desc
, FM10K_RXD_STATUS_EOP
)))
525 * fm10k_cleanup_headers - Correct corrupted or empty headers
526 * @rx_ring: rx descriptor ring packet is being transacted on
527 * @rx_desc: pointer to the EOP Rx descriptor
528 * @skb: pointer to current skb being fixed
530 * Address the case where we are pulling data in on pages only
531 * and as such no data is present in the skb header.
533 * In addition if skb is not at least 60 bytes we need to pad it so that
534 * it is large enough to qualify as a valid Ethernet frame.
536 * Returns true if an error was encountered and skb was freed.
538 static bool fm10k_cleanup_headers(struct fm10k_ring
*rx_ring
,
539 union fm10k_rx_desc
*rx_desc
,
542 if (unlikely((fm10k_test_staterr(rx_desc
,
543 FM10K_RXD_STATUS_RXE
)))) {
544 #define FM10K_TEST_RXD_BIT(rxd, bit) \
545 ((rxd)->w.csum_err & cpu_to_le16(bit))
546 if (FM10K_TEST_RXD_BIT(rx_desc
, FM10K_RXD_ERR_SWITCH_ERROR
))
547 rx_ring
->rx_stats
.switch_errors
++;
548 if (FM10K_TEST_RXD_BIT(rx_desc
, FM10K_RXD_ERR_NO_DESCRIPTOR
))
549 rx_ring
->rx_stats
.drops
++;
550 if (FM10K_TEST_RXD_BIT(rx_desc
, FM10K_RXD_ERR_PP_ERROR
))
551 rx_ring
->rx_stats
.pp_errors
++;
552 if (FM10K_TEST_RXD_BIT(rx_desc
, FM10K_RXD_ERR_SWITCH_READY
))
553 rx_ring
->rx_stats
.link_errors
++;
554 if (FM10K_TEST_RXD_BIT(rx_desc
, FM10K_RXD_ERR_TOO_BIG
))
555 rx_ring
->rx_stats
.length_errors
++;
556 dev_kfree_skb_any(skb
);
557 rx_ring
->rx_stats
.errors
++;
561 /* if eth_skb_pad returns an error the skb was freed */
562 if (eth_skb_pad(skb
))
569 * fm10k_receive_skb - helper function to handle rx indications
570 * @q_vector: structure containing interrupt and ring information
571 * @skb: packet to send up
573 static void fm10k_receive_skb(struct fm10k_q_vector
*q_vector
,
576 napi_gro_receive(&q_vector
->napi
, skb
);
579 static int fm10k_clean_rx_irq(struct fm10k_q_vector
*q_vector
,
580 struct fm10k_ring
*rx_ring
,
583 struct sk_buff
*skb
= rx_ring
->skb
;
584 unsigned int total_bytes
= 0, total_packets
= 0;
585 u16 cleaned_count
= fm10k_desc_unused(rx_ring
);
587 while (likely(total_packets
< budget
)) {
588 union fm10k_rx_desc
*rx_desc
;
590 /* return some buffers to hardware, one at a time is too slow */
591 if (cleaned_count
>= FM10K_RX_BUFFER_WRITE
) {
592 fm10k_alloc_rx_buffers(rx_ring
, cleaned_count
);
596 rx_desc
= FM10K_RX_DESC(rx_ring
, rx_ring
->next_to_clean
);
598 if (!rx_desc
->d
.staterr
)
601 /* This memory barrier is needed to keep us from reading
602 * any other fields out of the rx_desc until we know the
603 * descriptor has been written back
607 /* retrieve a buffer from the ring */
608 skb
= fm10k_fetch_rx_buffer(rx_ring
, rx_desc
, skb
);
610 /* exit if we failed to retrieve a buffer */
616 /* fetch next buffer in frame if non-eop */
617 if (fm10k_is_non_eop(rx_ring
, rx_desc
))
620 /* verify the packet layout is correct */
621 if (fm10k_cleanup_headers(rx_ring
, rx_desc
, skb
)) {
626 /* populate checksum, timestamp, VLAN, and protocol */
627 total_bytes
+= fm10k_process_skb_fields(rx_ring
, rx_desc
, skb
);
629 fm10k_receive_skb(q_vector
, skb
);
631 /* reset skb pointer */
634 /* update budget accounting */
638 /* place incomplete frames back on ring for completion */
641 u64_stats_update_begin(&rx_ring
->syncp
);
642 rx_ring
->stats
.packets
+= total_packets
;
643 rx_ring
->stats
.bytes
+= total_bytes
;
644 u64_stats_update_end(&rx_ring
->syncp
);
645 q_vector
->rx
.total_packets
+= total_packets
;
646 q_vector
->rx
.total_bytes
+= total_bytes
;
648 return total_packets
;
651 #define VXLAN_HLEN (sizeof(struct udphdr) + 8)
652 static struct ethhdr
*fm10k_port_is_vxlan(struct sk_buff
*skb
)
654 struct fm10k_intfc
*interface
= netdev_priv(skb
->dev
);
655 struct fm10k_vxlan_port
*vxlan_port
;
657 /* we can only offload a vxlan if we recognize it as such */
658 vxlan_port
= list_first_entry_or_null(&interface
->vxlan_port
,
659 struct fm10k_vxlan_port
, list
);
663 if (vxlan_port
->port
!= udp_hdr(skb
)->dest
)
666 /* return offset of udp_hdr plus 8 bytes for VXLAN header */
667 return (struct ethhdr
*)(skb_transport_header(skb
) + VXLAN_HLEN
);
670 #define FM10K_NVGRE_RESERVED0_FLAGS htons(0x9FFF)
671 #define NVGRE_TNI htons(0x2000)
672 struct fm10k_nvgre_hdr
{
678 static struct ethhdr
*fm10k_gre_is_nvgre(struct sk_buff
*skb
)
680 struct fm10k_nvgre_hdr
*nvgre_hdr
;
681 int hlen
= ip_hdrlen(skb
);
683 /* currently only IPv4 is supported due to hlen above */
684 if (vlan_get_protocol(skb
) != htons(ETH_P_IP
))
687 /* our transport header should be NVGRE */
688 nvgre_hdr
= (struct fm10k_nvgre_hdr
*)(skb_network_header(skb
) + hlen
);
690 /* verify all reserved flags are 0 */
691 if (nvgre_hdr
->flags
& FM10K_NVGRE_RESERVED0_FLAGS
)
694 /* report start of ethernet header */
695 if (nvgre_hdr
->flags
& NVGRE_TNI
)
696 return (struct ethhdr
*)(nvgre_hdr
+ 1);
698 return (struct ethhdr
*)(&nvgre_hdr
->tni
);
701 __be16
fm10k_tx_encap_offload(struct sk_buff
*skb
)
703 u8 l4_hdr
= 0, inner_l4_hdr
= 0, inner_l4_hlen
;
704 struct ethhdr
*eth_hdr
;
706 if (skb
->inner_protocol_type
!= ENCAP_TYPE_ETHER
||
707 skb
->inner_protocol
!= htons(ETH_P_TEB
))
710 switch (vlan_get_protocol(skb
)) {
711 case htons(ETH_P_IP
):
712 l4_hdr
= ip_hdr(skb
)->protocol
;
714 case htons(ETH_P_IPV6
):
715 l4_hdr
= ipv6_hdr(skb
)->nexthdr
;
723 eth_hdr
= fm10k_port_is_vxlan(skb
);
726 eth_hdr
= fm10k_gre_is_nvgre(skb
);
735 switch (eth_hdr
->h_proto
) {
736 case htons(ETH_P_IP
):
737 inner_l4_hdr
= inner_ip_hdr(skb
)->protocol
;
739 case htons(ETH_P_IPV6
):
740 inner_l4_hdr
= inner_ipv6_hdr(skb
)->nexthdr
;
746 switch (inner_l4_hdr
) {
748 inner_l4_hlen
= inner_tcp_hdrlen(skb
);
757 /* The hardware allows tunnel offloads only if the combined inner and
758 * outer header is 184 bytes or less
760 if (skb_inner_transport_header(skb
) + inner_l4_hlen
-
761 skb_mac_header(skb
) > FM10K_TUNNEL_HEADER_LENGTH
)
764 return eth_hdr
->h_proto
;
767 static int fm10k_tso(struct fm10k_ring
*tx_ring
,
768 struct fm10k_tx_buffer
*first
)
770 struct sk_buff
*skb
= first
->skb
;
771 struct fm10k_tx_desc
*tx_desc
;
775 if (skb
->ip_summed
!= CHECKSUM_PARTIAL
)
778 if (!skb_is_gso(skb
))
781 /* compute header lengths */
782 if (skb
->encapsulation
) {
783 if (!fm10k_tx_encap_offload(skb
))
785 th
= skb_inner_transport_header(skb
);
787 th
= skb_transport_header(skb
);
790 /* compute offset from SOF to transport header and add header len */
791 hdrlen
= (th
- skb
->data
) + (((struct tcphdr
*)th
)->doff
<< 2);
793 first
->tx_flags
|= FM10K_TX_FLAGS_CSUM
;
795 /* update gso size and bytecount with header size */
796 first
->gso_segs
= skb_shinfo(skb
)->gso_segs
;
797 first
->bytecount
+= (first
->gso_segs
- 1) * hdrlen
;
799 /* populate Tx descriptor header size and mss */
800 tx_desc
= FM10K_TX_DESC(tx_ring
, tx_ring
->next_to_use
);
801 tx_desc
->hdrlen
= hdrlen
;
802 tx_desc
->mss
= cpu_to_le16(skb_shinfo(skb
)->gso_size
);
806 tx_ring
->netdev
->features
&= ~NETIF_F_GSO_UDP_TUNNEL
;
807 if (!net_ratelimit())
808 netdev_err(tx_ring
->netdev
,
809 "TSO requested for unsupported tunnel, disabling offload\n");
813 static void fm10k_tx_csum(struct fm10k_ring
*tx_ring
,
814 struct fm10k_tx_buffer
*first
)
816 struct sk_buff
*skb
= first
->skb
;
817 struct fm10k_tx_desc
*tx_desc
;
820 struct ipv6hdr
*ipv6
;
826 if (skb
->ip_summed
!= CHECKSUM_PARTIAL
)
829 if (skb
->encapsulation
) {
830 protocol
= fm10k_tx_encap_offload(skb
);
832 if (skb_checksum_help(skb
)) {
833 dev_warn(tx_ring
->dev
,
834 "failed to offload encap csum!\n");
835 tx_ring
->tx_stats
.csum_err
++;
839 network_hdr
.raw
= skb_inner_network_header(skb
);
841 protocol
= vlan_get_protocol(skb
);
842 network_hdr
.raw
= skb_network_header(skb
);
846 case htons(ETH_P_IP
):
847 l4_hdr
= network_hdr
.ipv4
->protocol
;
849 case htons(ETH_P_IPV6
):
850 l4_hdr
= network_hdr
.ipv6
->nexthdr
;
853 if (unlikely(net_ratelimit())) {
854 dev_warn(tx_ring
->dev
,
855 "partial checksum but ip version=%x!\n",
858 tx_ring
->tx_stats
.csum_err
++;
867 if (skb
->encapsulation
)
870 if (unlikely(net_ratelimit())) {
871 dev_warn(tx_ring
->dev
,
872 "partial checksum but l4 proto=%x!\n",
875 tx_ring
->tx_stats
.csum_err
++;
879 /* update TX checksum flag */
880 first
->tx_flags
|= FM10K_TX_FLAGS_CSUM
;
881 tx_ring
->tx_stats
.csum_good
++;
884 /* populate Tx descriptor header size and mss */
885 tx_desc
= FM10K_TX_DESC(tx_ring
, tx_ring
->next_to_use
);
890 #define FM10K_SET_FLAG(_input, _flag, _result) \
891 ((_flag <= _result) ? \
892 ((u32)(_input & _flag) * (_result / _flag)) : \
893 ((u32)(_input & _flag) / (_flag / _result)))
895 static u8
fm10k_tx_desc_flags(struct sk_buff
*skb
, u32 tx_flags
)
897 /* set type for advanced descriptor with frame checksum insertion */
900 /* set checksum offload bits */
901 desc_flags
|= FM10K_SET_FLAG(tx_flags
, FM10K_TX_FLAGS_CSUM
,
902 FM10K_TXD_FLAG_CSUM
);
907 static bool fm10k_tx_desc_push(struct fm10k_ring
*tx_ring
,
908 struct fm10k_tx_desc
*tx_desc
, u16 i
,
909 dma_addr_t dma
, unsigned int size
, u8 desc_flags
)
911 /* set RS and INT for last frame in a cache line */
912 if ((++i
& (FM10K_TXD_WB_FIFO_SIZE
- 1)) == 0)
913 desc_flags
|= FM10K_TXD_FLAG_RS
| FM10K_TXD_FLAG_INT
;
915 /* record values to descriptor */
916 tx_desc
->buffer_addr
= cpu_to_le64(dma
);
917 tx_desc
->flags
= desc_flags
;
918 tx_desc
->buflen
= cpu_to_le16(size
);
920 /* return true if we just wrapped the ring */
921 return i
== tx_ring
->count
;
924 static int __fm10k_maybe_stop_tx(struct fm10k_ring
*tx_ring
, u16 size
)
926 netif_stop_subqueue(tx_ring
->netdev
, tx_ring
->queue_index
);
928 /* Memory barrier before checking head and tail */
931 /* Check again in a case another CPU has just made room available */
932 if (likely(fm10k_desc_unused(tx_ring
) < size
))
935 /* A reprieve! - use start_queue because it doesn't call schedule */
936 netif_start_subqueue(tx_ring
->netdev
, tx_ring
->queue_index
);
937 ++tx_ring
->tx_stats
.restart_queue
;
941 static inline int fm10k_maybe_stop_tx(struct fm10k_ring
*tx_ring
, u16 size
)
943 if (likely(fm10k_desc_unused(tx_ring
) >= size
))
945 return __fm10k_maybe_stop_tx(tx_ring
, size
);
948 static void fm10k_tx_map(struct fm10k_ring
*tx_ring
,
949 struct fm10k_tx_buffer
*first
)
951 struct sk_buff
*skb
= first
->skb
;
952 struct fm10k_tx_buffer
*tx_buffer
;
953 struct fm10k_tx_desc
*tx_desc
;
954 struct skb_frag_struct
*frag
;
957 unsigned int data_len
, size
;
958 u32 tx_flags
= first
->tx_flags
;
959 u16 i
= tx_ring
->next_to_use
;
960 u8 flags
= fm10k_tx_desc_flags(skb
, tx_flags
);
962 tx_desc
= FM10K_TX_DESC(tx_ring
, i
);
964 /* add HW VLAN tag */
965 if (skb_vlan_tag_present(skb
))
966 tx_desc
->vlan
= cpu_to_le16(skb_vlan_tag_get(skb
));
970 size
= skb_headlen(skb
);
973 dma
= dma_map_single(tx_ring
->dev
, data
, size
, DMA_TO_DEVICE
);
975 data_len
= skb
->data_len
;
978 for (frag
= &skb_shinfo(skb
)->frags
[0];; frag
++) {
979 if (dma_mapping_error(tx_ring
->dev
, dma
))
982 /* record length, and DMA address */
983 dma_unmap_len_set(tx_buffer
, len
, size
);
984 dma_unmap_addr_set(tx_buffer
, dma
, dma
);
986 while (unlikely(size
> FM10K_MAX_DATA_PER_TXD
)) {
987 if (fm10k_tx_desc_push(tx_ring
, tx_desc
++, i
++, dma
,
988 FM10K_MAX_DATA_PER_TXD
, flags
)) {
989 tx_desc
= FM10K_TX_DESC(tx_ring
, 0);
993 dma
+= FM10K_MAX_DATA_PER_TXD
;
994 size
-= FM10K_MAX_DATA_PER_TXD
;
997 if (likely(!data_len
))
1000 if (fm10k_tx_desc_push(tx_ring
, tx_desc
++, i
++,
1001 dma
, size
, flags
)) {
1002 tx_desc
= FM10K_TX_DESC(tx_ring
, 0);
1006 size
= skb_frag_size(frag
);
1009 dma
= skb_frag_dma_map(tx_ring
->dev
, frag
, 0, size
,
1012 tx_buffer
= &tx_ring
->tx_buffer
[i
];
1015 /* write last descriptor with LAST bit set */
1016 flags
|= FM10K_TXD_FLAG_LAST
;
1018 if (fm10k_tx_desc_push(tx_ring
, tx_desc
, i
++, dma
, size
, flags
))
1021 /* record bytecount for BQL */
1022 netdev_tx_sent_queue(txring_txq(tx_ring
), first
->bytecount
);
1024 /* record SW timestamp if HW timestamp is not available */
1025 skb_tx_timestamp(first
->skb
);
1027 /* Force memory writes to complete before letting h/w know there
1028 * are new descriptors to fetch. (Only applicable for weak-ordered
1029 * memory model archs, such as IA-64).
1031 * We also need this memory barrier to make certain all of the
1032 * status bits have been updated before next_to_watch is written.
1036 /* set next_to_watch value indicating a packet is present */
1037 first
->next_to_watch
= tx_desc
;
1039 tx_ring
->next_to_use
= i
;
1041 /* Make sure there is space in the ring for the next send. */
1042 fm10k_maybe_stop_tx(tx_ring
, DESC_NEEDED
);
1044 /* notify HW of packet */
1045 if (netif_xmit_stopped(txring_txq(tx_ring
)) || !skb
->xmit_more
) {
1046 writel(i
, tx_ring
->tail
);
1048 /* we need this if more than one processor can write to our tail
1049 * at a time, it synchronizes IO on IA64/Altix systems
1056 dev_err(tx_ring
->dev
, "TX DMA map failed\n");
1058 /* clear dma mappings for failed tx_buffer map */
1060 tx_buffer
= &tx_ring
->tx_buffer
[i
];
1061 fm10k_unmap_and_free_tx_resource(tx_ring
, tx_buffer
);
1062 if (tx_buffer
== first
)
1069 tx_ring
->next_to_use
= i
;
1072 netdev_tx_t
fm10k_xmit_frame_ring(struct sk_buff
*skb
,
1073 struct fm10k_ring
*tx_ring
)
1075 u16 count
= TXD_USE_COUNT(skb_headlen(skb
));
1076 struct fm10k_tx_buffer
*first
;
1081 /* need: 1 descriptor per page * PAGE_SIZE/FM10K_MAX_DATA_PER_TXD,
1082 * + 1 desc for skb_headlen/FM10K_MAX_DATA_PER_TXD,
1083 * + 2 desc gap to keep tail from touching head
1084 * otherwise try next time
1086 for (f
= 0; f
< skb_shinfo(skb
)->nr_frags
; f
++)
1087 count
+= TXD_USE_COUNT(skb_shinfo(skb
)->frags
[f
].size
);
1089 if (fm10k_maybe_stop_tx(tx_ring
, count
+ 3)) {
1090 tx_ring
->tx_stats
.tx_busy
++;
1091 return NETDEV_TX_BUSY
;
1094 /* record the location of the first descriptor for this packet */
1095 first
= &tx_ring
->tx_buffer
[tx_ring
->next_to_use
];
1097 first
->bytecount
= max_t(unsigned int, skb
->len
, ETH_ZLEN
);
1098 first
->gso_segs
= 1;
1100 /* record initial flags and protocol */
1101 first
->tx_flags
= tx_flags
;
1103 tso
= fm10k_tso(tx_ring
, first
);
1107 fm10k_tx_csum(tx_ring
, first
);
1109 fm10k_tx_map(tx_ring
, first
);
1111 return NETDEV_TX_OK
;
1114 dev_kfree_skb_any(first
->skb
);
1117 return NETDEV_TX_OK
;
1120 static u64
fm10k_get_tx_completed(struct fm10k_ring
*ring
)
1122 return ring
->stats
.packets
;
1125 static u64
fm10k_get_tx_pending(struct fm10k_ring
*ring
)
1127 /* use SW head and tail until we have real hardware */
1128 u32 head
= ring
->next_to_clean
;
1129 u32 tail
= ring
->next_to_use
;
1131 return ((head
<= tail
) ? tail
: tail
+ ring
->count
) - head
;
1134 bool fm10k_check_tx_hang(struct fm10k_ring
*tx_ring
)
1136 u32 tx_done
= fm10k_get_tx_completed(tx_ring
);
1137 u32 tx_done_old
= tx_ring
->tx_stats
.tx_done_old
;
1138 u32 tx_pending
= fm10k_get_tx_pending(tx_ring
);
1140 clear_check_for_tx_hang(tx_ring
);
1142 /* Check for a hung queue, but be thorough. This verifies
1143 * that a transmit has been completed since the previous
1144 * check AND there is at least one packet pending. By
1145 * requiring this to fail twice we avoid races with
1146 * clearing the ARMED bit and conditions where we
1147 * run the check_tx_hang logic with a transmit completion
1148 * pending but without time to complete it yet.
1150 if (!tx_pending
|| (tx_done_old
!= tx_done
)) {
1151 /* update completed stats and continue */
1152 tx_ring
->tx_stats
.tx_done_old
= tx_done
;
1153 /* reset the countdown */
1154 clear_bit(__FM10K_HANG_CHECK_ARMED
, &tx_ring
->state
);
1159 /* make sure it is true for two checks in a row */
1160 return test_and_set_bit(__FM10K_HANG_CHECK_ARMED
, &tx_ring
->state
);
1164 * fm10k_tx_timeout_reset - initiate reset due to Tx timeout
1165 * @interface: driver private struct
1167 void fm10k_tx_timeout_reset(struct fm10k_intfc
*interface
)
1169 /* Do the reset outside of interrupt context */
1170 if (!test_bit(__FM10K_DOWN
, &interface
->state
)) {
1171 interface
->tx_timeout_count
++;
1172 interface
->flags
|= FM10K_FLAG_RESET_REQUESTED
;
1173 fm10k_service_event_schedule(interface
);
1178 * fm10k_clean_tx_irq - Reclaim resources after transmit completes
1179 * @q_vector: structure containing interrupt and ring information
1180 * @tx_ring: tx ring to clean
1181 * @napi_budget: Used to determine if we are in netpoll
1183 static bool fm10k_clean_tx_irq(struct fm10k_q_vector
*q_vector
,
1184 struct fm10k_ring
*tx_ring
, int napi_budget
)
1186 struct fm10k_intfc
*interface
= q_vector
->interface
;
1187 struct fm10k_tx_buffer
*tx_buffer
;
1188 struct fm10k_tx_desc
*tx_desc
;
1189 unsigned int total_bytes
= 0, total_packets
= 0;
1190 unsigned int budget
= q_vector
->tx
.work_limit
;
1191 unsigned int i
= tx_ring
->next_to_clean
;
1193 if (test_bit(__FM10K_DOWN
, &interface
->state
))
1196 tx_buffer
= &tx_ring
->tx_buffer
[i
];
1197 tx_desc
= FM10K_TX_DESC(tx_ring
, i
);
1198 i
-= tx_ring
->count
;
1201 struct fm10k_tx_desc
*eop_desc
= tx_buffer
->next_to_watch
;
1203 /* if next_to_watch is not set then there is no work pending */
1207 /* prevent any other reads prior to eop_desc */
1208 read_barrier_depends();
1210 /* if DD is not set pending work has not been completed */
1211 if (!(eop_desc
->flags
& FM10K_TXD_FLAG_DONE
))
1214 /* clear next_to_watch to prevent false hangs */
1215 tx_buffer
->next_to_watch
= NULL
;
1217 /* update the statistics for this packet */
1218 total_bytes
+= tx_buffer
->bytecount
;
1219 total_packets
+= tx_buffer
->gso_segs
;
1222 napi_consume_skb(tx_buffer
->skb
, napi_budget
);
1224 /* unmap skb header data */
1225 dma_unmap_single(tx_ring
->dev
,
1226 dma_unmap_addr(tx_buffer
, dma
),
1227 dma_unmap_len(tx_buffer
, len
),
1230 /* clear tx_buffer data */
1231 tx_buffer
->skb
= NULL
;
1232 dma_unmap_len_set(tx_buffer
, len
, 0);
1234 /* unmap remaining buffers */
1235 while (tx_desc
!= eop_desc
) {
1240 i
-= tx_ring
->count
;
1241 tx_buffer
= tx_ring
->tx_buffer
;
1242 tx_desc
= FM10K_TX_DESC(tx_ring
, 0);
1245 /* unmap any remaining paged data */
1246 if (dma_unmap_len(tx_buffer
, len
)) {
1247 dma_unmap_page(tx_ring
->dev
,
1248 dma_unmap_addr(tx_buffer
, dma
),
1249 dma_unmap_len(tx_buffer
, len
),
1251 dma_unmap_len_set(tx_buffer
, len
, 0);
1255 /* move us one more past the eop_desc for start of next pkt */
1260 i
-= tx_ring
->count
;
1261 tx_buffer
= tx_ring
->tx_buffer
;
1262 tx_desc
= FM10K_TX_DESC(tx_ring
, 0);
1265 /* issue prefetch for next Tx descriptor */
1268 /* update budget accounting */
1270 } while (likely(budget
));
1272 i
+= tx_ring
->count
;
1273 tx_ring
->next_to_clean
= i
;
1274 u64_stats_update_begin(&tx_ring
->syncp
);
1275 tx_ring
->stats
.bytes
+= total_bytes
;
1276 tx_ring
->stats
.packets
+= total_packets
;
1277 u64_stats_update_end(&tx_ring
->syncp
);
1278 q_vector
->tx
.total_bytes
+= total_bytes
;
1279 q_vector
->tx
.total_packets
+= total_packets
;
1281 if (check_for_tx_hang(tx_ring
) && fm10k_check_tx_hang(tx_ring
)) {
1282 /* schedule immediate reset if we believe we hung */
1283 struct fm10k_hw
*hw
= &interface
->hw
;
1285 netif_err(interface
, drv
, tx_ring
->netdev
,
1286 "Detected Tx Unit Hang\n"
1288 " TDH, TDT <%x>, <%x>\n"
1289 " next_to_use <%x>\n"
1290 " next_to_clean <%x>\n",
1291 tx_ring
->queue_index
,
1292 fm10k_read_reg(hw
, FM10K_TDH(tx_ring
->reg_idx
)),
1293 fm10k_read_reg(hw
, FM10K_TDT(tx_ring
->reg_idx
)),
1294 tx_ring
->next_to_use
, i
);
1296 netif_stop_subqueue(tx_ring
->netdev
,
1297 tx_ring
->queue_index
);
1299 netif_info(interface
, probe
, tx_ring
->netdev
,
1300 "tx hang %d detected on queue %d, resetting interface\n",
1301 interface
->tx_timeout_count
+ 1,
1302 tx_ring
->queue_index
);
1304 fm10k_tx_timeout_reset(interface
);
1306 /* the netdev is about to reset, no point in enabling stuff */
1310 /* notify netdev of completed buffers */
1311 netdev_tx_completed_queue(txring_txq(tx_ring
),
1312 total_packets
, total_bytes
);
1314 #define TX_WAKE_THRESHOLD min_t(u16, FM10K_MIN_TXD - 1, DESC_NEEDED * 2)
1315 if (unlikely(total_packets
&& netif_carrier_ok(tx_ring
->netdev
) &&
1316 (fm10k_desc_unused(tx_ring
) >= TX_WAKE_THRESHOLD
))) {
1317 /* Make sure that anybody stopping the queue after this
1318 * sees the new next_to_clean.
1321 if (__netif_subqueue_stopped(tx_ring
->netdev
,
1322 tx_ring
->queue_index
) &&
1323 !test_bit(__FM10K_DOWN
, &interface
->state
)) {
1324 netif_wake_subqueue(tx_ring
->netdev
,
1325 tx_ring
->queue_index
);
1326 ++tx_ring
->tx_stats
.restart_queue
;
1334 * fm10k_update_itr - update the dynamic ITR value based on packet size
1336 * Stores a new ITR value based on strictly on packet size. The
1337 * divisors and thresholds used by this function were determined based
1338 * on theoretical maximum wire speed and testing data, in order to
1339 * minimize response time while increasing bulk throughput.
1341 * @ring_container: Container for rings to have ITR updated
1343 static void fm10k_update_itr(struct fm10k_ring_container
*ring_container
)
1345 unsigned int avg_wire_size
, packets
, itr_round
;
1347 /* Only update ITR if we are using adaptive setting */
1348 if (!ITR_IS_ADAPTIVE(ring_container
->itr
))
1351 packets
= ring_container
->total_packets
;
1355 avg_wire_size
= ring_container
->total_bytes
/ packets
;
1357 /* The following is a crude approximation of:
1358 * wmem_default / (size + overhead) = desired_pkts_per_int
1359 * rate / bits_per_byte / (size + ethernet overhead) = pkt_rate
1360 * (desired_pkt_rate / pkt_rate) * usecs_per_sec = ITR value
1362 * Assuming wmem_default is 212992 and overhead is 640 bytes per
1363 * packet, (256 skb, 64 headroom, 320 shared info), we can reduce the
1366 * (34 * (size + 24)) / (size + 640) = ITR
1368 * We first do some math on the packet size and then finally bitshift
1369 * by 8 after rounding up. We also have to account for PCIe link speed
1370 * difference as ITR scales based on this.
1372 if (avg_wire_size
<= 360) {
1373 /* Start at 250K ints/sec and gradually drop to 77K ints/sec */
1375 avg_wire_size
+= 376;
1376 } else if (avg_wire_size
<= 1152) {
1377 /* 77K ints/sec to 45K ints/sec */
1379 avg_wire_size
+= 2176;
1380 } else if (avg_wire_size
<= 1920) {
1381 /* 45K ints/sec to 38K ints/sec */
1382 avg_wire_size
+= 4480;
1384 /* plateau at a limit of 38K ints/sec */
1385 avg_wire_size
= 6656;
1388 /* Perform final bitshift for division after rounding up to ensure
1389 * that the calculation will never get below a 1. The bit shift
1390 * accounts for changes in the ITR due to PCIe link speed.
1392 itr_round
= ACCESS_ONCE(ring_container
->itr_scale
) + 8;
1393 avg_wire_size
+= BIT(itr_round
) - 1;
1394 avg_wire_size
>>= itr_round
;
1396 /* write back value and retain adaptive flag */
1397 ring_container
->itr
= avg_wire_size
| FM10K_ITR_ADAPTIVE
;
1400 ring_container
->total_bytes
= 0;
1401 ring_container
->total_packets
= 0;
1404 static void fm10k_qv_enable(struct fm10k_q_vector
*q_vector
)
1406 /* Enable auto-mask and clear the current mask */
1407 u32 itr
= FM10K_ITR_ENABLE
;
1410 fm10k_update_itr(&q_vector
->tx
);
1413 fm10k_update_itr(&q_vector
->rx
);
1415 /* Store Tx itr in timer slot 0 */
1416 itr
|= (q_vector
->tx
.itr
& FM10K_ITR_MAX
);
1418 /* Shift Rx itr to timer slot 1 */
1419 itr
|= (q_vector
->rx
.itr
& FM10K_ITR_MAX
) << FM10K_ITR_INTERVAL1_SHIFT
;
1421 /* Write the final value to the ITR register */
1422 writel(itr
, q_vector
->itr
);
1425 static int fm10k_poll(struct napi_struct
*napi
, int budget
)
1427 struct fm10k_q_vector
*q_vector
=
1428 container_of(napi
, struct fm10k_q_vector
, napi
);
1429 struct fm10k_ring
*ring
;
1430 int per_ring_budget
, work_done
= 0;
1431 bool clean_complete
= true;
1433 fm10k_for_each_ring(ring
, q_vector
->tx
) {
1434 if (!fm10k_clean_tx_irq(q_vector
, ring
, budget
))
1435 clean_complete
= false;
1438 /* Handle case where we are called by netpoll with a budget of 0 */
1442 /* attempt to distribute budget to each queue fairly, but don't
1443 * allow the budget to go below 1 because we'll exit polling
1445 if (q_vector
->rx
.count
> 1)
1446 per_ring_budget
= max(budget
/ q_vector
->rx
.count
, 1);
1448 per_ring_budget
= budget
;
1450 fm10k_for_each_ring(ring
, q_vector
->rx
) {
1451 int work
= fm10k_clean_rx_irq(q_vector
, ring
, per_ring_budget
);
1454 if (work
>= per_ring_budget
)
1455 clean_complete
= false;
1458 /* If all work not completed, return budget and keep polling */
1459 if (!clean_complete
)
1462 /* all work done, exit the polling mode */
1463 napi_complete_done(napi
, work_done
);
1465 /* re-enable the q_vector */
1466 fm10k_qv_enable(q_vector
);
1472 * fm10k_set_qos_queues: Allocate queues for a QOS-enabled device
1473 * @interface: board private structure to initialize
1475 * When QoS (Quality of Service) is enabled, allocate queues for
1476 * each traffic class. If multiqueue isn't available,then abort QoS
1479 * This function handles all combinations of Qos and RSS.
1482 static bool fm10k_set_qos_queues(struct fm10k_intfc
*interface
)
1484 struct net_device
*dev
= interface
->netdev
;
1485 struct fm10k_ring_feature
*f
;
1489 /* Map queue offset and counts onto allocated tx queues */
1490 pcs
= netdev_get_num_tc(dev
);
1495 /* set QoS mask and indices */
1496 f
= &interface
->ring_feature
[RING_F_QOS
];
1498 f
->mask
= BIT(fls(pcs
- 1)) - 1;
1500 /* determine the upper limit for our current DCB mode */
1501 rss_i
= interface
->hw
.mac
.max_queues
/ pcs
;
1502 rss_i
= BIT(fls(rss_i
) - 1);
1504 /* set RSS mask and indices */
1505 f
= &interface
->ring_feature
[RING_F_RSS
];
1506 rss_i
= min_t(u16
, rss_i
, f
->limit
);
1508 f
->mask
= BIT(fls(rss_i
- 1)) - 1;
1510 /* configure pause class to queue mapping */
1511 for (i
= 0; i
< pcs
; i
++)
1512 netdev_set_tc_queue(dev
, i
, rss_i
, rss_i
* i
);
1514 interface
->num_rx_queues
= rss_i
* pcs
;
1515 interface
->num_tx_queues
= rss_i
* pcs
;
1521 * fm10k_set_rss_queues: Allocate queues for RSS
1522 * @interface: board private structure to initialize
1524 * This is our "base" multiqueue mode. RSS (Receive Side Scaling) will try
1525 * to allocate one Rx queue per CPU, and if available, one Tx queue per CPU.
1528 static bool fm10k_set_rss_queues(struct fm10k_intfc
*interface
)
1530 struct fm10k_ring_feature
*f
;
1533 f
= &interface
->ring_feature
[RING_F_RSS
];
1534 rss_i
= min_t(u16
, interface
->hw
.mac
.max_queues
, f
->limit
);
1536 /* record indices and power of 2 mask for RSS */
1538 f
->mask
= BIT(fls(rss_i
- 1)) - 1;
1540 interface
->num_rx_queues
= rss_i
;
1541 interface
->num_tx_queues
= rss_i
;
1547 * fm10k_set_num_queues: Allocate queues for device, feature dependent
1548 * @interface: board private structure to initialize
1550 * This is the top level queue allocation routine. The order here is very
1551 * important, starting with the "most" number of features turned on at once,
1552 * and ending with the smallest set of features. This way large combinations
1553 * can be allocated if they're turned on, and smaller combinations are the
1554 * fallthrough conditions.
1557 static void fm10k_set_num_queues(struct fm10k_intfc
*interface
)
1559 /* Attempt to setup QoS and RSS first */
1560 if (fm10k_set_qos_queues(interface
))
1563 /* If we don't have QoS, just fallback to only RSS. */
1564 fm10k_set_rss_queues(interface
);
1568 * fm10k_reset_num_queues - Reset the number of queues to zero
1569 * @interface: board private structure
1571 * This function should be called whenever we need to reset the number of
1572 * queues after an error condition.
1574 static void fm10k_reset_num_queues(struct fm10k_intfc
*interface
)
1576 interface
->num_tx_queues
= 0;
1577 interface
->num_rx_queues
= 0;
1578 interface
->num_q_vectors
= 0;
1582 * fm10k_alloc_q_vector - Allocate memory for a single interrupt vector
1583 * @interface: board private structure to initialize
1584 * @v_count: q_vectors allocated on interface, used for ring interleaving
1585 * @v_idx: index of vector in interface struct
1586 * @txr_count: total number of Tx rings to allocate
1587 * @txr_idx: index of first Tx ring to allocate
1588 * @rxr_count: total number of Rx rings to allocate
1589 * @rxr_idx: index of first Rx ring to allocate
1591 * We allocate one q_vector. If allocation fails we return -ENOMEM.
1593 static int fm10k_alloc_q_vector(struct fm10k_intfc
*interface
,
1594 unsigned int v_count
, unsigned int v_idx
,
1595 unsigned int txr_count
, unsigned int txr_idx
,
1596 unsigned int rxr_count
, unsigned int rxr_idx
)
1598 struct fm10k_q_vector
*q_vector
;
1599 struct fm10k_ring
*ring
;
1600 int ring_count
, size
;
1602 ring_count
= txr_count
+ rxr_count
;
1603 size
= sizeof(struct fm10k_q_vector
) +
1604 (sizeof(struct fm10k_ring
) * ring_count
);
1606 /* allocate q_vector and rings */
1607 q_vector
= kzalloc(size
, GFP_KERNEL
);
1611 /* initialize NAPI */
1612 netif_napi_add(interface
->netdev
, &q_vector
->napi
,
1613 fm10k_poll
, NAPI_POLL_WEIGHT
);
1615 /* tie q_vector and interface together */
1616 interface
->q_vector
[v_idx
] = q_vector
;
1617 q_vector
->interface
= interface
;
1618 q_vector
->v_idx
= v_idx
;
1620 /* initialize pointer to rings */
1621 ring
= q_vector
->ring
;
1623 /* save Tx ring container info */
1624 q_vector
->tx
.ring
= ring
;
1625 q_vector
->tx
.work_limit
= FM10K_DEFAULT_TX_WORK
;
1626 q_vector
->tx
.itr
= interface
->tx_itr
;
1627 q_vector
->tx
.itr_scale
= interface
->hw
.mac
.itr_scale
;
1628 q_vector
->tx
.count
= txr_count
;
1631 /* assign generic ring traits */
1632 ring
->dev
= &interface
->pdev
->dev
;
1633 ring
->netdev
= interface
->netdev
;
1635 /* configure backlink on ring */
1636 ring
->q_vector
= q_vector
;
1638 /* apply Tx specific ring traits */
1639 ring
->count
= interface
->tx_ring_count
;
1640 ring
->queue_index
= txr_idx
;
1642 /* assign ring to interface */
1643 interface
->tx_ring
[txr_idx
] = ring
;
1645 /* update count and index */
1649 /* push pointer to next ring */
1653 /* save Rx ring container info */
1654 q_vector
->rx
.ring
= ring
;
1655 q_vector
->rx
.itr
= interface
->rx_itr
;
1656 q_vector
->rx
.itr_scale
= interface
->hw
.mac
.itr_scale
;
1657 q_vector
->rx
.count
= rxr_count
;
1660 /* assign generic ring traits */
1661 ring
->dev
= &interface
->pdev
->dev
;
1662 ring
->netdev
= interface
->netdev
;
1663 rcu_assign_pointer(ring
->l2_accel
, interface
->l2_accel
);
1665 /* configure backlink on ring */
1666 ring
->q_vector
= q_vector
;
1668 /* apply Rx specific ring traits */
1669 ring
->count
= interface
->rx_ring_count
;
1670 ring
->queue_index
= rxr_idx
;
1672 /* assign ring to interface */
1673 interface
->rx_ring
[rxr_idx
] = ring
;
1675 /* update count and index */
1679 /* push pointer to next ring */
1683 fm10k_dbg_q_vector_init(q_vector
);
1689 * fm10k_free_q_vector - Free memory allocated for specific interrupt vector
1690 * @interface: board private structure to initialize
1691 * @v_idx: Index of vector to be freed
1693 * This function frees the memory allocated to the q_vector. In addition if
1694 * NAPI is enabled it will delete any references to the NAPI struct prior
1695 * to freeing the q_vector.
1697 static void fm10k_free_q_vector(struct fm10k_intfc
*interface
, int v_idx
)
1699 struct fm10k_q_vector
*q_vector
= interface
->q_vector
[v_idx
];
1700 struct fm10k_ring
*ring
;
1702 fm10k_dbg_q_vector_exit(q_vector
);
1704 fm10k_for_each_ring(ring
, q_vector
->tx
)
1705 interface
->tx_ring
[ring
->queue_index
] = NULL
;
1707 fm10k_for_each_ring(ring
, q_vector
->rx
)
1708 interface
->rx_ring
[ring
->queue_index
] = NULL
;
1710 interface
->q_vector
[v_idx
] = NULL
;
1711 netif_napi_del(&q_vector
->napi
);
1712 kfree_rcu(q_vector
, rcu
);
1716 * fm10k_alloc_q_vectors - Allocate memory for interrupt vectors
1717 * @interface: board private structure to initialize
1719 * We allocate one q_vector per queue interrupt. If allocation fails we
1722 static int fm10k_alloc_q_vectors(struct fm10k_intfc
*interface
)
1724 unsigned int q_vectors
= interface
->num_q_vectors
;
1725 unsigned int rxr_remaining
= interface
->num_rx_queues
;
1726 unsigned int txr_remaining
= interface
->num_tx_queues
;
1727 unsigned int rxr_idx
= 0, txr_idx
= 0, v_idx
= 0;
1730 if (q_vectors
>= (rxr_remaining
+ txr_remaining
)) {
1731 for (; rxr_remaining
; v_idx
++) {
1732 err
= fm10k_alloc_q_vector(interface
, q_vectors
, v_idx
,
1737 /* update counts and index */
1743 for (; v_idx
< q_vectors
; v_idx
++) {
1744 int rqpv
= DIV_ROUND_UP(rxr_remaining
, q_vectors
- v_idx
);
1745 int tqpv
= DIV_ROUND_UP(txr_remaining
, q_vectors
- v_idx
);
1747 err
= fm10k_alloc_q_vector(interface
, q_vectors
, v_idx
,
1754 /* update counts and index */
1755 rxr_remaining
-= rqpv
;
1756 txr_remaining
-= tqpv
;
1764 fm10k_reset_num_queues(interface
);
1767 fm10k_free_q_vector(interface
, v_idx
);
1773 * fm10k_free_q_vectors - Free memory allocated for interrupt vectors
1774 * @interface: board private structure to initialize
1776 * This function frees the memory allocated to the q_vectors. In addition if
1777 * NAPI is enabled it will delete any references to the NAPI struct prior
1778 * to freeing the q_vector.
1780 static void fm10k_free_q_vectors(struct fm10k_intfc
*interface
)
1782 int v_idx
= interface
->num_q_vectors
;
1784 fm10k_reset_num_queues(interface
);
1787 fm10k_free_q_vector(interface
, v_idx
);
1791 * f10k_reset_msix_capability - reset MSI-X capability
1792 * @interface: board private structure to initialize
1794 * Reset the MSI-X capability back to its starting state
1796 static void fm10k_reset_msix_capability(struct fm10k_intfc
*interface
)
1798 pci_disable_msix(interface
->pdev
);
1799 kfree(interface
->msix_entries
);
1800 interface
->msix_entries
= NULL
;
1804 * f10k_init_msix_capability - configure MSI-X capability
1805 * @interface: board private structure to initialize
1807 * Attempt to configure the interrupts using the best available
1808 * capabilities of the hardware and the kernel.
1810 static int fm10k_init_msix_capability(struct fm10k_intfc
*interface
)
1812 struct fm10k_hw
*hw
= &interface
->hw
;
1813 int v_budget
, vector
;
1815 /* It's easy to be greedy for MSI-X vectors, but it really
1816 * doesn't do us much good if we have a lot more vectors
1817 * than CPU's. So let's be conservative and only ask for
1818 * (roughly) the same number of vectors as there are CPU's.
1819 * the default is to use pairs of vectors
1821 v_budget
= max(interface
->num_rx_queues
, interface
->num_tx_queues
);
1822 v_budget
= min_t(u16
, v_budget
, num_online_cpus());
1824 /* account for vectors not related to queues */
1825 v_budget
+= NON_Q_VECTORS(hw
);
1827 /* At the same time, hardware can only support a maximum of
1828 * hw.mac->max_msix_vectors vectors. With features
1829 * such as RSS and VMDq, we can easily surpass the number of Rx and Tx
1830 * descriptor queues supported by our device. Thus, we cap it off in
1831 * those rare cases where the cpu count also exceeds our vector limit.
1833 v_budget
= min_t(int, v_budget
, hw
->mac
.max_msix_vectors
);
1835 /* A failure in MSI-X entry allocation is fatal. */
1836 interface
->msix_entries
= kcalloc(v_budget
, sizeof(struct msix_entry
),
1838 if (!interface
->msix_entries
)
1841 /* populate entry values */
1842 for (vector
= 0; vector
< v_budget
; vector
++)
1843 interface
->msix_entries
[vector
].entry
= vector
;
1845 /* Attempt to enable MSI-X with requested value */
1846 v_budget
= pci_enable_msix_range(interface
->pdev
,
1847 interface
->msix_entries
,
1851 kfree(interface
->msix_entries
);
1852 interface
->msix_entries
= NULL
;
1856 /* record the number of queues available for q_vectors */
1857 interface
->num_q_vectors
= v_budget
- NON_Q_VECTORS(hw
);
1863 * fm10k_cache_ring_qos - Descriptor ring to register mapping for QoS
1864 * @interface: Interface structure continaining rings and devices
1866 * Cache the descriptor ring offsets for Qos
1868 static bool fm10k_cache_ring_qos(struct fm10k_intfc
*interface
)
1870 struct net_device
*dev
= interface
->netdev
;
1871 int pc
, offset
, rss_i
, i
, q_idx
;
1872 u16 pc_stride
= interface
->ring_feature
[RING_F_QOS
].mask
+ 1;
1873 u8 num_pcs
= netdev_get_num_tc(dev
);
1878 rss_i
= interface
->ring_feature
[RING_F_RSS
].indices
;
1880 for (pc
= 0, offset
= 0; pc
< num_pcs
; pc
++, offset
+= rss_i
) {
1882 for (i
= 0; i
< rss_i
; i
++) {
1883 interface
->tx_ring
[offset
+ i
]->reg_idx
= q_idx
;
1884 interface
->tx_ring
[offset
+ i
]->qos_pc
= pc
;
1885 interface
->rx_ring
[offset
+ i
]->reg_idx
= q_idx
;
1886 interface
->rx_ring
[offset
+ i
]->qos_pc
= pc
;
1895 * fm10k_cache_ring_rss - Descriptor ring to register mapping for RSS
1896 * @interface: Interface structure continaining rings and devices
1898 * Cache the descriptor ring offsets for RSS
1900 static void fm10k_cache_ring_rss(struct fm10k_intfc
*interface
)
1904 for (i
= 0; i
< interface
->num_rx_queues
; i
++)
1905 interface
->rx_ring
[i
]->reg_idx
= i
;
1907 for (i
= 0; i
< interface
->num_tx_queues
; i
++)
1908 interface
->tx_ring
[i
]->reg_idx
= i
;
1912 * fm10k_assign_rings - Map rings to network devices
1913 * @interface: Interface structure containing rings and devices
1915 * This function is meant to go though and configure both the network
1916 * devices so that they contain rings, and configure the rings so that
1917 * they function with their network devices.
1919 static void fm10k_assign_rings(struct fm10k_intfc
*interface
)
1921 if (fm10k_cache_ring_qos(interface
))
1924 fm10k_cache_ring_rss(interface
);
1927 static void fm10k_init_reta(struct fm10k_intfc
*interface
)
1929 u16 i
, rss_i
= interface
->ring_feature
[RING_F_RSS
].indices
;
1932 /* If the Rx flow indirection table has been configured manually, we
1933 * need to maintain it when possible.
1935 if (netif_is_rxfh_configured(interface
->netdev
)) {
1936 for (i
= FM10K_RETA_SIZE
; i
--;) {
1937 reta
= interface
->reta
[i
];
1938 if ((((reta
<< 24) >> 24) < rss_i
) &&
1939 (((reta
<< 16) >> 24) < rss_i
) &&
1940 (((reta
<< 8) >> 24) < rss_i
) &&
1941 (((reta
) >> 24) < rss_i
))
1944 /* this should never happen */
1945 dev_err(&interface
->pdev
->dev
,
1946 "RSS indirection table assigned flows out of queue bounds. Reconfiguring.\n");
1947 goto repopulate_reta
;
1950 /* do nothing if all of the elements are in bounds */
1955 fm10k_write_reta(interface
, NULL
);
1959 * fm10k_init_queueing_scheme - Determine proper queueing scheme
1960 * @interface: board private structure to initialize
1962 * We determine which queueing scheme to use based on...
1963 * - Hardware queue count (num_*_queues)
1964 * - defined by miscellaneous hardware support/features (RSS, etc.)
1966 int fm10k_init_queueing_scheme(struct fm10k_intfc
*interface
)
1970 /* Number of supported queues */
1971 fm10k_set_num_queues(interface
);
1973 /* Configure MSI-X capability */
1974 err
= fm10k_init_msix_capability(interface
);
1976 dev_err(&interface
->pdev
->dev
,
1977 "Unable to initialize MSI-X capability\n");
1981 /* Allocate memory for queues */
1982 err
= fm10k_alloc_q_vectors(interface
);
1984 dev_err(&interface
->pdev
->dev
,
1985 "Unable to allocate queue vectors\n");
1986 goto err_alloc_q_vectors
;
1989 /* Map rings to devices, and map devices to physical queues */
1990 fm10k_assign_rings(interface
);
1992 /* Initialize RSS redirection table */
1993 fm10k_init_reta(interface
);
1997 err_alloc_q_vectors
:
1998 fm10k_reset_msix_capability(interface
);
2000 fm10k_reset_num_queues(interface
);
2005 * fm10k_clear_queueing_scheme - Clear the current queueing scheme settings
2006 * @interface: board private structure to clear queueing scheme on
2008 * We go through and clear queueing specific resources and reset the structure
2009 * to pre-load conditions
2011 void fm10k_clear_queueing_scheme(struct fm10k_intfc
*interface
)
2013 fm10k_free_q_vectors(interface
);
2014 fm10k_reset_msix_capability(interface
);