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[mirror_ubuntu-kernels.git] / drivers / net / ethernet / intel / i40e / i40e_ethtool.c
1 /*******************************************************************************
2 *
3 * Intel Ethernet Controller XL710 Family Linux Driver
4 * Copyright(c) 2013 - 2016 Intel Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
17 *
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
20 *
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 ******************************************************************************/
26
27 /* ethtool support for i40e */
28
29 #include "i40e.h"
30 #include "i40e_diag.h"
31
32 struct i40e_stats {
33 char stat_string[ETH_GSTRING_LEN];
34 int sizeof_stat;
35 int stat_offset;
36 };
37
38 #define I40E_STAT(_type, _name, _stat) { \
39 .stat_string = _name, \
40 .sizeof_stat = FIELD_SIZEOF(_type, _stat), \
41 .stat_offset = offsetof(_type, _stat) \
42 }
43
44 #define I40E_NETDEV_STAT(_net_stat) \
45 I40E_STAT(struct rtnl_link_stats64, #_net_stat, _net_stat)
46 #define I40E_PF_STAT(_name, _stat) \
47 I40E_STAT(struct i40e_pf, _name, _stat)
48 #define I40E_VSI_STAT(_name, _stat) \
49 I40E_STAT(struct i40e_vsi, _name, _stat)
50 #define I40E_VEB_STAT(_name, _stat) \
51 I40E_STAT(struct i40e_veb, _name, _stat)
52
53 static const struct i40e_stats i40e_gstrings_net_stats[] = {
54 I40E_NETDEV_STAT(rx_packets),
55 I40E_NETDEV_STAT(tx_packets),
56 I40E_NETDEV_STAT(rx_bytes),
57 I40E_NETDEV_STAT(tx_bytes),
58 I40E_NETDEV_STAT(rx_errors),
59 I40E_NETDEV_STAT(tx_errors),
60 I40E_NETDEV_STAT(rx_dropped),
61 I40E_NETDEV_STAT(tx_dropped),
62 I40E_NETDEV_STAT(collisions),
63 I40E_NETDEV_STAT(rx_length_errors),
64 I40E_NETDEV_STAT(rx_crc_errors),
65 };
66
67 static const struct i40e_stats i40e_gstrings_veb_stats[] = {
68 I40E_VEB_STAT("rx_bytes", stats.rx_bytes),
69 I40E_VEB_STAT("tx_bytes", stats.tx_bytes),
70 I40E_VEB_STAT("rx_unicast", stats.rx_unicast),
71 I40E_VEB_STAT("tx_unicast", stats.tx_unicast),
72 I40E_VEB_STAT("rx_multicast", stats.rx_multicast),
73 I40E_VEB_STAT("tx_multicast", stats.tx_multicast),
74 I40E_VEB_STAT("rx_broadcast", stats.rx_broadcast),
75 I40E_VEB_STAT("tx_broadcast", stats.tx_broadcast),
76 I40E_VEB_STAT("rx_discards", stats.rx_discards),
77 I40E_VEB_STAT("tx_discards", stats.tx_discards),
78 I40E_VEB_STAT("tx_errors", stats.tx_errors),
79 I40E_VEB_STAT("rx_unknown_protocol", stats.rx_unknown_protocol),
80 };
81
82 static const struct i40e_stats i40e_gstrings_misc_stats[] = {
83 I40E_VSI_STAT("rx_unicast", eth_stats.rx_unicast),
84 I40E_VSI_STAT("tx_unicast", eth_stats.tx_unicast),
85 I40E_VSI_STAT("rx_multicast", eth_stats.rx_multicast),
86 I40E_VSI_STAT("tx_multicast", eth_stats.tx_multicast),
87 I40E_VSI_STAT("rx_broadcast", eth_stats.rx_broadcast),
88 I40E_VSI_STAT("tx_broadcast", eth_stats.tx_broadcast),
89 I40E_VSI_STAT("rx_unknown_protocol", eth_stats.rx_unknown_protocol),
90 I40E_VSI_STAT("tx_linearize", tx_linearize),
91 I40E_VSI_STAT("tx_force_wb", tx_force_wb),
92 I40E_VSI_STAT("rx_alloc_fail", rx_buf_failed),
93 I40E_VSI_STAT("rx_pg_alloc_fail", rx_page_failed),
94 };
95
96 /* These PF_STATs might look like duplicates of some NETDEV_STATs,
97 * but they are separate. This device supports Virtualization, and
98 * as such might have several netdevs supporting VMDq and FCoE going
99 * through a single port. The NETDEV_STATs are for individual netdevs
100 * seen at the top of the stack, and the PF_STATs are for the physical
101 * function at the bottom of the stack hosting those netdevs.
102 *
103 * The PF_STATs are appended to the netdev stats only when ethtool -S
104 * is queried on the base PF netdev, not on the VMDq or FCoE netdev.
105 */
106 static const struct i40e_stats i40e_gstrings_stats[] = {
107 I40E_PF_STAT("rx_bytes", stats.eth.rx_bytes),
108 I40E_PF_STAT("tx_bytes", stats.eth.tx_bytes),
109 I40E_PF_STAT("rx_unicast", stats.eth.rx_unicast),
110 I40E_PF_STAT("tx_unicast", stats.eth.tx_unicast),
111 I40E_PF_STAT("rx_multicast", stats.eth.rx_multicast),
112 I40E_PF_STAT("tx_multicast", stats.eth.tx_multicast),
113 I40E_PF_STAT("rx_broadcast", stats.eth.rx_broadcast),
114 I40E_PF_STAT("tx_broadcast", stats.eth.tx_broadcast),
115 I40E_PF_STAT("tx_errors", stats.eth.tx_errors),
116 I40E_PF_STAT("rx_dropped", stats.eth.rx_discards),
117 I40E_PF_STAT("tx_dropped_link_down", stats.tx_dropped_link_down),
118 I40E_PF_STAT("rx_crc_errors", stats.crc_errors),
119 I40E_PF_STAT("illegal_bytes", stats.illegal_bytes),
120 I40E_PF_STAT("mac_local_faults", stats.mac_local_faults),
121 I40E_PF_STAT("mac_remote_faults", stats.mac_remote_faults),
122 I40E_PF_STAT("tx_timeout", tx_timeout_count),
123 I40E_PF_STAT("rx_csum_bad", hw_csum_rx_error),
124 I40E_PF_STAT("rx_length_errors", stats.rx_length_errors),
125 I40E_PF_STAT("link_xon_rx", stats.link_xon_rx),
126 I40E_PF_STAT("link_xoff_rx", stats.link_xoff_rx),
127 I40E_PF_STAT("link_xon_tx", stats.link_xon_tx),
128 I40E_PF_STAT("link_xoff_tx", stats.link_xoff_tx),
129 I40E_PF_STAT("rx_size_64", stats.rx_size_64),
130 I40E_PF_STAT("rx_size_127", stats.rx_size_127),
131 I40E_PF_STAT("rx_size_255", stats.rx_size_255),
132 I40E_PF_STAT("rx_size_511", stats.rx_size_511),
133 I40E_PF_STAT("rx_size_1023", stats.rx_size_1023),
134 I40E_PF_STAT("rx_size_1522", stats.rx_size_1522),
135 I40E_PF_STAT("rx_size_big", stats.rx_size_big),
136 I40E_PF_STAT("tx_size_64", stats.tx_size_64),
137 I40E_PF_STAT("tx_size_127", stats.tx_size_127),
138 I40E_PF_STAT("tx_size_255", stats.tx_size_255),
139 I40E_PF_STAT("tx_size_511", stats.tx_size_511),
140 I40E_PF_STAT("tx_size_1023", stats.tx_size_1023),
141 I40E_PF_STAT("tx_size_1522", stats.tx_size_1522),
142 I40E_PF_STAT("tx_size_big", stats.tx_size_big),
143 I40E_PF_STAT("rx_undersize", stats.rx_undersize),
144 I40E_PF_STAT("rx_fragments", stats.rx_fragments),
145 I40E_PF_STAT("rx_oversize", stats.rx_oversize),
146 I40E_PF_STAT("rx_jabber", stats.rx_jabber),
147 I40E_PF_STAT("VF_admin_queue_requests", vf_aq_requests),
148 I40E_PF_STAT("arq_overflows", arq_overflows),
149 I40E_PF_STAT("rx_hwtstamp_cleared", rx_hwtstamp_cleared),
150 I40E_PF_STAT("tx_hwtstamp_skipped", tx_hwtstamp_skipped),
151 I40E_PF_STAT("fdir_flush_cnt", fd_flush_cnt),
152 I40E_PF_STAT("fdir_atr_match", stats.fd_atr_match),
153 I40E_PF_STAT("fdir_atr_tunnel_match", stats.fd_atr_tunnel_match),
154 I40E_PF_STAT("fdir_atr_status", stats.fd_atr_status),
155 I40E_PF_STAT("fdir_sb_match", stats.fd_sb_match),
156 I40E_PF_STAT("fdir_sb_status", stats.fd_sb_status),
157
158 /* LPI stats */
159 I40E_PF_STAT("tx_lpi_status", stats.tx_lpi_status),
160 I40E_PF_STAT("rx_lpi_status", stats.rx_lpi_status),
161 I40E_PF_STAT("tx_lpi_count", stats.tx_lpi_count),
162 I40E_PF_STAT("rx_lpi_count", stats.rx_lpi_count),
163 };
164
165 #define I40E_QUEUE_STATS_LEN(n) \
166 (((struct i40e_netdev_priv *)netdev_priv((n)))->vsi->num_queue_pairs \
167 * 2 /* Tx and Rx together */ \
168 * (sizeof(struct i40e_queue_stats) / sizeof(u64)))
169 #define I40E_GLOBAL_STATS_LEN ARRAY_SIZE(i40e_gstrings_stats)
170 #define I40E_NETDEV_STATS_LEN ARRAY_SIZE(i40e_gstrings_net_stats)
171 #define I40E_MISC_STATS_LEN ARRAY_SIZE(i40e_gstrings_misc_stats)
172 #define I40E_VSI_STATS_LEN(n) (I40E_NETDEV_STATS_LEN + \
173 I40E_MISC_STATS_LEN + \
174 I40E_QUEUE_STATS_LEN((n)))
175 #define I40E_PFC_STATS_LEN ( \
176 (FIELD_SIZEOF(struct i40e_pf, stats.priority_xoff_rx) + \
177 FIELD_SIZEOF(struct i40e_pf, stats.priority_xon_rx) + \
178 FIELD_SIZEOF(struct i40e_pf, stats.priority_xoff_tx) + \
179 FIELD_SIZEOF(struct i40e_pf, stats.priority_xon_tx) + \
180 FIELD_SIZEOF(struct i40e_pf, stats.priority_xon_2_xoff)) \
181 / sizeof(u64))
182 #define I40E_VEB_TC_STATS_LEN ( \
183 (FIELD_SIZEOF(struct i40e_veb, tc_stats.tc_rx_packets) + \
184 FIELD_SIZEOF(struct i40e_veb, tc_stats.tc_rx_bytes) + \
185 FIELD_SIZEOF(struct i40e_veb, tc_stats.tc_tx_packets) + \
186 FIELD_SIZEOF(struct i40e_veb, tc_stats.tc_tx_bytes)) \
187 / sizeof(u64))
188 #define I40E_VEB_STATS_LEN ARRAY_SIZE(i40e_gstrings_veb_stats)
189 #define I40E_VEB_STATS_TOTAL (I40E_VEB_STATS_LEN + I40E_VEB_TC_STATS_LEN)
190 #define I40E_PF_STATS_LEN(n) (I40E_GLOBAL_STATS_LEN + \
191 I40E_PFC_STATS_LEN + \
192 I40E_VSI_STATS_LEN((n)))
193
194 enum i40e_ethtool_test_id {
195 I40E_ETH_TEST_REG = 0,
196 I40E_ETH_TEST_EEPROM,
197 I40E_ETH_TEST_INTR,
198 I40E_ETH_TEST_LINK,
199 };
200
201 static const char i40e_gstrings_test[][ETH_GSTRING_LEN] = {
202 "Register test (offline)",
203 "Eeprom test (offline)",
204 "Interrupt test (offline)",
205 "Link test (on/offline)"
206 };
207
208 #define I40E_TEST_LEN (sizeof(i40e_gstrings_test) / ETH_GSTRING_LEN)
209
210 struct i40e_priv_flags {
211 char flag_string[ETH_GSTRING_LEN];
212 u64 flag;
213 bool read_only;
214 };
215
216 #define I40E_PRIV_FLAG(_name, _flag, _read_only) { \
217 .flag_string = _name, \
218 .flag = _flag, \
219 .read_only = _read_only, \
220 }
221
222 static const struct i40e_priv_flags i40e_gstrings_priv_flags[] = {
223 /* NOTE: MFP setting cannot be changed */
224 I40E_PRIV_FLAG("MFP", I40E_FLAG_MFP_ENABLED, 1),
225 I40E_PRIV_FLAG("LinkPolling", I40E_FLAG_LINK_POLLING_ENABLED, 0),
226 I40E_PRIV_FLAG("flow-director-atr", I40E_FLAG_FD_ATR_ENABLED, 0),
227 I40E_PRIV_FLAG("veb-stats", I40E_FLAG_VEB_STATS_ENABLED, 0),
228 I40E_PRIV_FLAG("hw-atr-eviction", I40E_FLAG_HW_ATR_EVICT_ENABLED, 0),
229 I40E_PRIV_FLAG("legacy-rx", I40E_FLAG_LEGACY_RX, 0),
230 };
231
232 #define I40E_PRIV_FLAGS_STR_LEN ARRAY_SIZE(i40e_gstrings_priv_flags)
233
234 /* Private flags with a global effect, restricted to PF 0 */
235 static const struct i40e_priv_flags i40e_gl_gstrings_priv_flags[] = {
236 I40E_PRIV_FLAG("vf-true-promisc-support",
237 I40E_FLAG_TRUE_PROMISC_SUPPORT, 0),
238 };
239
240 #define I40E_GL_PRIV_FLAGS_STR_LEN ARRAY_SIZE(i40e_gl_gstrings_priv_flags)
241
242 /**
243 * i40e_partition_setting_complaint - generic complaint for MFP restriction
244 * @pf: the PF struct
245 **/
246 static void i40e_partition_setting_complaint(struct i40e_pf *pf)
247 {
248 dev_info(&pf->pdev->dev,
249 "The link settings are allowed to be changed only from the first partition of a given port. Please switch to the first partition in order to change the setting.\n");
250 }
251
252 /**
253 * i40e_phy_type_to_ethtool - convert the phy_types to ethtool link modes
254 * @phy_types: PHY types to convert
255 * @supported: pointer to the ethtool supported variable to fill in
256 * @advertising: pointer to the ethtool advertising variable to fill in
257 *
258 **/
259 static void i40e_phy_type_to_ethtool(struct i40e_pf *pf, u32 *supported,
260 u32 *advertising)
261 {
262 struct i40e_link_status *hw_link_info = &pf->hw.phy.link_info;
263 u64 phy_types = pf->hw.phy.phy_types;
264
265 *supported = 0x0;
266 *advertising = 0x0;
267
268 if (phy_types & I40E_CAP_PHY_TYPE_SGMII) {
269 *supported |= SUPPORTED_Autoneg |
270 SUPPORTED_1000baseT_Full;
271 *advertising |= ADVERTISED_Autoneg;
272 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB)
273 *advertising |= ADVERTISED_1000baseT_Full;
274 if (pf->hw_features & I40E_HW_100M_SGMII_CAPABLE) {
275 *supported |= SUPPORTED_100baseT_Full;
276 *advertising |= ADVERTISED_100baseT_Full;
277 }
278 }
279 if (phy_types & I40E_CAP_PHY_TYPE_XAUI ||
280 phy_types & I40E_CAP_PHY_TYPE_XFI ||
281 phy_types & I40E_CAP_PHY_TYPE_SFI ||
282 phy_types & I40E_CAP_PHY_TYPE_10GBASE_SFPP_CU ||
283 phy_types & I40E_CAP_PHY_TYPE_10GBASE_AOC)
284 *supported |= SUPPORTED_10000baseT_Full;
285 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1_CU ||
286 phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1 ||
287 phy_types & I40E_CAP_PHY_TYPE_10GBASE_T ||
288 phy_types & I40E_CAP_PHY_TYPE_10GBASE_SR ||
289 phy_types & I40E_CAP_PHY_TYPE_10GBASE_LR) {
290 *supported |= SUPPORTED_Autoneg |
291 SUPPORTED_10000baseT_Full;
292 *advertising |= ADVERTISED_Autoneg;
293 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
294 *advertising |= ADVERTISED_10000baseT_Full;
295 }
296 if (phy_types & I40E_CAP_PHY_TYPE_XLAUI ||
297 phy_types & I40E_CAP_PHY_TYPE_XLPPI ||
298 phy_types & I40E_CAP_PHY_TYPE_40GBASE_AOC)
299 *supported |= SUPPORTED_40000baseCR4_Full;
300 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4_CU ||
301 phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4) {
302 *supported |= SUPPORTED_Autoneg |
303 SUPPORTED_40000baseCR4_Full;
304 *advertising |= ADVERTISED_Autoneg;
305 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_40GB)
306 *advertising |= ADVERTISED_40000baseCR4_Full;
307 }
308 if (phy_types & I40E_CAP_PHY_TYPE_100BASE_TX) {
309 *supported |= SUPPORTED_Autoneg |
310 SUPPORTED_100baseT_Full;
311 *advertising |= ADVERTISED_Autoneg;
312 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_100MB)
313 *advertising |= ADVERTISED_100baseT_Full;
314 }
315 if (phy_types & I40E_CAP_PHY_TYPE_1000BASE_T ||
316 phy_types & I40E_CAP_PHY_TYPE_1000BASE_SX ||
317 phy_types & I40E_CAP_PHY_TYPE_1000BASE_LX ||
318 phy_types & I40E_CAP_PHY_TYPE_1000BASE_T_OPTICAL) {
319 *supported |= SUPPORTED_Autoneg |
320 SUPPORTED_1000baseT_Full;
321 *advertising |= ADVERTISED_Autoneg;
322 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB)
323 *advertising |= ADVERTISED_1000baseT_Full;
324 }
325 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_SR4)
326 *supported |= SUPPORTED_40000baseSR4_Full;
327 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_LR4)
328 *supported |= SUPPORTED_40000baseLR4_Full;
329 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_KR4) {
330 *supported |= SUPPORTED_40000baseKR4_Full |
331 SUPPORTED_Autoneg;
332 *advertising |= ADVERTISED_40000baseKR4_Full |
333 ADVERTISED_Autoneg;
334 }
335 if (phy_types & I40E_CAP_PHY_TYPE_20GBASE_KR2) {
336 *supported |= SUPPORTED_20000baseKR2_Full |
337 SUPPORTED_Autoneg;
338 *advertising |= ADVERTISED_Autoneg;
339 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_20GB)
340 *advertising |= ADVERTISED_20000baseKR2_Full;
341 }
342 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_KR) {
343 if (!(pf->hw_features & I40E_HW_HAVE_CRT_RETIMER))
344 *supported |= SUPPORTED_10000baseKR_Full |
345 SUPPORTED_Autoneg;
346 *advertising |= ADVERTISED_Autoneg;
347 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
348 if (!(pf->hw_features & I40E_HW_HAVE_CRT_RETIMER))
349 *advertising |= ADVERTISED_10000baseKR_Full;
350 }
351 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_KX4) {
352 *supported |= SUPPORTED_10000baseKX4_Full |
353 SUPPORTED_Autoneg;
354 *advertising |= ADVERTISED_Autoneg;
355 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
356 *advertising |= ADVERTISED_10000baseKX4_Full;
357 }
358 if (phy_types & I40E_CAP_PHY_TYPE_1000BASE_KX) {
359 if (!(pf->hw_features & I40E_HW_HAVE_CRT_RETIMER))
360 *supported |= SUPPORTED_1000baseKX_Full |
361 SUPPORTED_Autoneg;
362 *advertising |= ADVERTISED_Autoneg;
363 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB)
364 if (!(pf->hw_features & I40E_HW_HAVE_CRT_RETIMER))
365 *advertising |= ADVERTISED_1000baseKX_Full;
366 }
367 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_KR ||
368 phy_types & I40E_CAP_PHY_TYPE_25GBASE_CR ||
369 phy_types & I40E_CAP_PHY_TYPE_25GBASE_SR ||
370 phy_types & I40E_CAP_PHY_TYPE_25GBASE_LR) {
371 *supported |= SUPPORTED_Autoneg;
372 *advertising |= ADVERTISED_Autoneg;
373 }
374 }
375
376 /**
377 * i40e_get_settings_link_up - Get the Link settings for when link is up
378 * @hw: hw structure
379 * @ecmd: ethtool command to fill in
380 * @netdev: network interface device structure
381 *
382 **/
383 static void i40e_get_settings_link_up(struct i40e_hw *hw,
384 struct ethtool_link_ksettings *cmd,
385 struct net_device *netdev,
386 struct i40e_pf *pf)
387 {
388 struct i40e_link_status *hw_link_info = &hw->phy.link_info;
389 u32 link_speed = hw_link_info->link_speed;
390 u32 e_advertising = 0x0;
391 u32 e_supported = 0x0;
392 u32 supported, advertising;
393
394 ethtool_convert_link_mode_to_legacy_u32(&supported,
395 cmd->link_modes.supported);
396 ethtool_convert_link_mode_to_legacy_u32(&advertising,
397 cmd->link_modes.advertising);
398
399 /* Initialize supported and advertised settings based on phy settings */
400 switch (hw_link_info->phy_type) {
401 case I40E_PHY_TYPE_40GBASE_CR4:
402 case I40E_PHY_TYPE_40GBASE_CR4_CU:
403 supported = SUPPORTED_Autoneg |
404 SUPPORTED_40000baseCR4_Full;
405 advertising = ADVERTISED_Autoneg |
406 ADVERTISED_40000baseCR4_Full;
407 break;
408 case I40E_PHY_TYPE_XLAUI:
409 case I40E_PHY_TYPE_XLPPI:
410 case I40E_PHY_TYPE_40GBASE_AOC:
411 supported = SUPPORTED_40000baseCR4_Full;
412 break;
413 case I40E_PHY_TYPE_40GBASE_SR4:
414 supported = SUPPORTED_40000baseSR4_Full;
415 break;
416 case I40E_PHY_TYPE_40GBASE_LR4:
417 supported = SUPPORTED_40000baseLR4_Full;
418 break;
419 case I40E_PHY_TYPE_10GBASE_SR:
420 case I40E_PHY_TYPE_10GBASE_LR:
421 case I40E_PHY_TYPE_1000BASE_SX:
422 case I40E_PHY_TYPE_1000BASE_LX:
423 supported = SUPPORTED_10000baseT_Full;
424 if (hw_link_info->module_type[2] &
425 I40E_MODULE_TYPE_1000BASE_SX ||
426 hw_link_info->module_type[2] &
427 I40E_MODULE_TYPE_1000BASE_LX) {
428 supported |= SUPPORTED_1000baseT_Full;
429 if (hw_link_info->requested_speeds &
430 I40E_LINK_SPEED_1GB)
431 advertising |= ADVERTISED_1000baseT_Full;
432 }
433 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
434 advertising |= ADVERTISED_10000baseT_Full;
435 break;
436 case I40E_PHY_TYPE_10GBASE_T:
437 case I40E_PHY_TYPE_1000BASE_T:
438 case I40E_PHY_TYPE_100BASE_TX:
439 supported = SUPPORTED_Autoneg |
440 SUPPORTED_10000baseT_Full |
441 SUPPORTED_1000baseT_Full |
442 SUPPORTED_100baseT_Full;
443 advertising = ADVERTISED_Autoneg;
444 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
445 advertising |= ADVERTISED_10000baseT_Full;
446 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB)
447 advertising |= ADVERTISED_1000baseT_Full;
448 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_100MB)
449 advertising |= ADVERTISED_100baseT_Full;
450 break;
451 case I40E_PHY_TYPE_1000BASE_T_OPTICAL:
452 supported = SUPPORTED_Autoneg |
453 SUPPORTED_1000baseT_Full;
454 advertising = ADVERTISED_Autoneg |
455 ADVERTISED_1000baseT_Full;
456 break;
457 case I40E_PHY_TYPE_10GBASE_CR1_CU:
458 case I40E_PHY_TYPE_10GBASE_CR1:
459 supported = SUPPORTED_Autoneg |
460 SUPPORTED_10000baseT_Full;
461 advertising = ADVERTISED_Autoneg |
462 ADVERTISED_10000baseT_Full;
463 break;
464 case I40E_PHY_TYPE_XAUI:
465 case I40E_PHY_TYPE_XFI:
466 case I40E_PHY_TYPE_SFI:
467 case I40E_PHY_TYPE_10GBASE_SFPP_CU:
468 case I40E_PHY_TYPE_10GBASE_AOC:
469 supported = SUPPORTED_10000baseT_Full;
470 advertising = SUPPORTED_10000baseT_Full;
471 break;
472 case I40E_PHY_TYPE_SGMII:
473 supported = SUPPORTED_Autoneg |
474 SUPPORTED_1000baseT_Full;
475 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB)
476 advertising |= ADVERTISED_1000baseT_Full;
477 if (pf->hw_features & I40E_HW_100M_SGMII_CAPABLE) {
478 supported |= SUPPORTED_100baseT_Full;
479 if (hw_link_info->requested_speeds &
480 I40E_LINK_SPEED_100MB)
481 advertising |= ADVERTISED_100baseT_Full;
482 }
483 break;
484 case I40E_PHY_TYPE_40GBASE_KR4:
485 case I40E_PHY_TYPE_20GBASE_KR2:
486 case I40E_PHY_TYPE_10GBASE_KR:
487 case I40E_PHY_TYPE_10GBASE_KX4:
488 case I40E_PHY_TYPE_1000BASE_KX:
489 supported |= SUPPORTED_40000baseKR4_Full |
490 SUPPORTED_20000baseKR2_Full |
491 SUPPORTED_10000baseKR_Full |
492 SUPPORTED_10000baseKX4_Full |
493 SUPPORTED_1000baseKX_Full |
494 SUPPORTED_Autoneg;
495 advertising |= ADVERTISED_40000baseKR4_Full |
496 ADVERTISED_20000baseKR2_Full |
497 ADVERTISED_10000baseKR_Full |
498 ADVERTISED_10000baseKX4_Full |
499 ADVERTISED_1000baseKX_Full |
500 ADVERTISED_Autoneg;
501 break;
502 case I40E_PHY_TYPE_25GBASE_KR:
503 case I40E_PHY_TYPE_25GBASE_CR:
504 case I40E_PHY_TYPE_25GBASE_SR:
505 case I40E_PHY_TYPE_25GBASE_LR:
506 supported = SUPPORTED_Autoneg;
507 advertising = ADVERTISED_Autoneg;
508 /* TODO: add speeds when ethtool is ready to support*/
509 break;
510 default:
511 /* if we got here and link is up something bad is afoot */
512 netdev_info(netdev, "WARNING: Link is up but PHY type 0x%x is not recognized.\n",
513 hw_link_info->phy_type);
514 }
515
516 /* Now that we've worked out everything that could be supported by the
517 * current PHY type, get what is supported by the NVM and them to
518 * get what is truly supported
519 */
520 i40e_phy_type_to_ethtool(pf, &e_supported,
521 &e_advertising);
522
523 supported = supported & e_supported;
524 advertising = advertising & e_advertising;
525
526 /* Set speed and duplex */
527 switch (link_speed) {
528 case I40E_LINK_SPEED_40GB:
529 cmd->base.speed = SPEED_40000;
530 break;
531 case I40E_LINK_SPEED_25GB:
532 #ifdef SPEED_25000
533 cmd->base.speed = SPEED_25000;
534 #else
535 netdev_info(netdev,
536 "Speed is 25G, display not supported by this version of ethtool.\n");
537 #endif
538 break;
539 case I40E_LINK_SPEED_20GB:
540 cmd->base.speed = SPEED_20000;
541 break;
542 case I40E_LINK_SPEED_10GB:
543 cmd->base.speed = SPEED_10000;
544 break;
545 case I40E_LINK_SPEED_1GB:
546 cmd->base.speed = SPEED_1000;
547 break;
548 case I40E_LINK_SPEED_100MB:
549 cmd->base.speed = SPEED_100;
550 break;
551 default:
552 break;
553 }
554 cmd->base.duplex = DUPLEX_FULL;
555
556 ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.supported,
557 supported);
558 ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.advertising,
559 advertising);
560 }
561
562 /**
563 * i40e_get_settings_link_down - Get the Link settings for when link is down
564 * @hw: hw structure
565 * @ecmd: ethtool command to fill in
566 *
567 * Reports link settings that can be determined when link is down
568 **/
569 static void i40e_get_settings_link_down(struct i40e_hw *hw,
570 struct ethtool_link_ksettings *cmd,
571 struct i40e_pf *pf)
572 {
573 u32 supported, advertising;
574
575 /* link is down and the driver needs to fall back on
576 * supported phy types to figure out what info to display
577 */
578 i40e_phy_type_to_ethtool(pf, &supported, &advertising);
579
580 ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.supported,
581 supported);
582 ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.advertising,
583 advertising);
584
585 /* With no link speed and duplex are unknown */
586 cmd->base.speed = SPEED_UNKNOWN;
587 cmd->base.duplex = DUPLEX_UNKNOWN;
588 }
589
590 /**
591 * i40e_get_settings - Get Link Speed and Duplex settings
592 * @netdev: network interface device structure
593 * @ecmd: ethtool command
594 *
595 * Reports speed/duplex settings based on media_type
596 **/
597 static int i40e_get_link_ksettings(struct net_device *netdev,
598 struct ethtool_link_ksettings *cmd)
599 {
600 struct i40e_netdev_priv *np = netdev_priv(netdev);
601 struct i40e_pf *pf = np->vsi->back;
602 struct i40e_hw *hw = &pf->hw;
603 struct i40e_link_status *hw_link_info = &hw->phy.link_info;
604 bool link_up = hw_link_info->link_info & I40E_AQ_LINK_UP;
605 u32 advertising;
606
607 if (link_up)
608 i40e_get_settings_link_up(hw, cmd, netdev, pf);
609 else
610 i40e_get_settings_link_down(hw, cmd, pf);
611
612 /* Now set the settings that don't rely on link being up/down */
613 /* Set autoneg settings */
614 cmd->base.autoneg = ((hw_link_info->an_info & I40E_AQ_AN_COMPLETED) ?
615 AUTONEG_ENABLE : AUTONEG_DISABLE);
616
617 switch (hw->phy.media_type) {
618 case I40E_MEDIA_TYPE_BACKPLANE:
619 ethtool_link_ksettings_add_link_mode(cmd, supported,
620 Autoneg);
621 ethtool_link_ksettings_add_link_mode(cmd, supported,
622 Backplane);
623 ethtool_link_ksettings_add_link_mode(cmd, advertising,
624 Autoneg);
625 ethtool_link_ksettings_add_link_mode(cmd, advertising,
626 Backplane);
627 cmd->base.port = PORT_NONE;
628 break;
629 case I40E_MEDIA_TYPE_BASET:
630 ethtool_link_ksettings_add_link_mode(cmd, supported, TP);
631 ethtool_link_ksettings_add_link_mode(cmd, advertising, TP);
632 cmd->base.port = PORT_TP;
633 break;
634 case I40E_MEDIA_TYPE_DA:
635 case I40E_MEDIA_TYPE_CX4:
636 ethtool_link_ksettings_add_link_mode(cmd, supported, FIBRE);
637 ethtool_link_ksettings_add_link_mode(cmd, advertising, FIBRE);
638 cmd->base.port = PORT_DA;
639 break;
640 case I40E_MEDIA_TYPE_FIBER:
641 ethtool_link_ksettings_add_link_mode(cmd, supported, FIBRE);
642 cmd->base.port = PORT_FIBRE;
643 break;
644 case I40E_MEDIA_TYPE_UNKNOWN:
645 default:
646 cmd->base.port = PORT_OTHER;
647 break;
648 }
649
650 /* Set flow control settings */
651 ethtool_link_ksettings_add_link_mode(cmd, supported, Pause);
652
653 switch (hw->fc.requested_mode) {
654 case I40E_FC_FULL:
655 ethtool_link_ksettings_add_link_mode(cmd, advertising,
656 Pause);
657 break;
658 case I40E_FC_TX_PAUSE:
659 ethtool_link_ksettings_add_link_mode(cmd, advertising,
660 Asym_Pause);
661 break;
662 case I40E_FC_RX_PAUSE:
663 ethtool_link_ksettings_add_link_mode(cmd, advertising,
664 Pause);
665 ethtool_link_ksettings_add_link_mode(cmd, advertising,
666 Asym_Pause);
667 break;
668 default:
669 ethtool_convert_link_mode_to_legacy_u32(
670 &advertising, cmd->link_modes.advertising);
671
672 advertising &= ~(ADVERTISED_Pause | ADVERTISED_Asym_Pause);
673
674 ethtool_convert_legacy_u32_to_link_mode(
675 cmd->link_modes.advertising, advertising);
676 break;
677 }
678
679 return 0;
680 }
681
682 /**
683 * i40e_set_settings - Set Speed and Duplex
684 * @netdev: network interface device structure
685 * @ecmd: ethtool command
686 *
687 * Set speed/duplex per media_types advertised/forced
688 **/
689 static int i40e_set_link_ksettings(struct net_device *netdev,
690 const struct ethtool_link_ksettings *cmd)
691 {
692 struct i40e_netdev_priv *np = netdev_priv(netdev);
693 struct i40e_aq_get_phy_abilities_resp abilities;
694 struct i40e_aq_set_phy_config config;
695 struct i40e_pf *pf = np->vsi->back;
696 struct i40e_vsi *vsi = np->vsi;
697 struct i40e_hw *hw = &pf->hw;
698 struct ethtool_link_ksettings safe_cmd;
699 struct ethtool_link_ksettings copy_cmd;
700 i40e_status status = 0;
701 bool change = false;
702 int timeout = 50;
703 int err = 0;
704 u32 autoneg;
705 u32 advertise;
706 u32 tmp;
707
708 /* Changing port settings is not supported if this isn't the
709 * port's controlling PF
710 */
711 if (hw->partition_id != 1) {
712 i40e_partition_setting_complaint(pf);
713 return -EOPNOTSUPP;
714 }
715
716 if (vsi != pf->vsi[pf->lan_vsi])
717 return -EOPNOTSUPP;
718
719 if (hw->phy.media_type != I40E_MEDIA_TYPE_BASET &&
720 hw->phy.media_type != I40E_MEDIA_TYPE_FIBER &&
721 hw->phy.media_type != I40E_MEDIA_TYPE_BACKPLANE &&
722 hw->phy.media_type != I40E_MEDIA_TYPE_DA &&
723 hw->phy.link_info.link_info & I40E_AQ_LINK_UP)
724 return -EOPNOTSUPP;
725
726 if (hw->device_id == I40E_DEV_ID_KX_B ||
727 hw->device_id == I40E_DEV_ID_KX_C ||
728 hw->device_id == I40E_DEV_ID_20G_KR2 ||
729 hw->device_id == I40E_DEV_ID_20G_KR2_A) {
730 netdev_info(netdev, "Changing settings is not supported on backplane.\n");
731 return -EOPNOTSUPP;
732 }
733
734 /* copy the cmd to copy_cmd to avoid modifying the origin */
735 memcpy(&copy_cmd, cmd, sizeof(struct ethtool_link_ksettings));
736
737 /* get our own copy of the bits to check against */
738 memset(&safe_cmd, 0, sizeof(struct ethtool_link_ksettings));
739 i40e_get_link_ksettings(netdev, &safe_cmd);
740
741 /* save autoneg and speed out of cmd */
742 autoneg = cmd->base.autoneg;
743 ethtool_convert_link_mode_to_legacy_u32(&advertise,
744 cmd->link_modes.advertising);
745
746 /* set autoneg and speed back to what they currently are */
747 copy_cmd.base.autoneg = safe_cmd.base.autoneg;
748 ethtool_convert_link_mode_to_legacy_u32(
749 &tmp, safe_cmd.link_modes.advertising);
750 ethtool_convert_legacy_u32_to_link_mode(
751 copy_cmd.link_modes.advertising, tmp);
752
753 copy_cmd.base.cmd = safe_cmd.base.cmd;
754
755 /* If copy_cmd and safe_cmd are not the same now, then they are
756 * trying to set something that we do not support
757 */
758 if (memcmp(&copy_cmd, &safe_cmd, sizeof(struct ethtool_link_ksettings)))
759 return -EOPNOTSUPP;
760
761 while (test_and_set_bit(__I40E_CONFIG_BUSY, pf->state)) {
762 timeout--;
763 if (!timeout)
764 return -EBUSY;
765 usleep_range(1000, 2000);
766 }
767
768 /* Get the current phy config */
769 status = i40e_aq_get_phy_capabilities(hw, false, false, &abilities,
770 NULL);
771 if (status) {
772 err = -EAGAIN;
773 goto done;
774 }
775
776 /* Copy abilities to config in case autoneg is not
777 * set below
778 */
779 memset(&config, 0, sizeof(struct i40e_aq_set_phy_config));
780 config.abilities = abilities.abilities;
781
782 /* Check autoneg */
783 if (autoneg == AUTONEG_ENABLE) {
784 /* If autoneg was not already enabled */
785 if (!(hw->phy.link_info.an_info & I40E_AQ_AN_COMPLETED)) {
786 /* If autoneg is not supported, return error */
787 if (!ethtool_link_ksettings_test_link_mode(
788 &safe_cmd, supported, Autoneg)) {
789 netdev_info(netdev, "Autoneg not supported on this phy\n");
790 err = -EINVAL;
791 goto done;
792 }
793 /* Autoneg is allowed to change */
794 config.abilities = abilities.abilities |
795 I40E_AQ_PHY_ENABLE_AN;
796 change = true;
797 }
798 } else {
799 /* If autoneg is currently enabled */
800 if (hw->phy.link_info.an_info & I40E_AQ_AN_COMPLETED) {
801 /* If autoneg is supported 10GBASE_T is the only PHY
802 * that can disable it, so otherwise return error
803 */
804 if (ethtool_link_ksettings_test_link_mode(
805 &safe_cmd, supported, Autoneg) &&
806 hw->phy.link_info.phy_type !=
807 I40E_PHY_TYPE_10GBASE_T) {
808 netdev_info(netdev, "Autoneg cannot be disabled on this phy\n");
809 err = -EINVAL;
810 goto done;
811 }
812 /* Autoneg is allowed to change */
813 config.abilities = abilities.abilities &
814 ~I40E_AQ_PHY_ENABLE_AN;
815 change = true;
816 }
817 }
818
819 ethtool_convert_link_mode_to_legacy_u32(&tmp,
820 safe_cmd.link_modes.supported);
821 if (advertise & ~tmp) {
822 err = -EINVAL;
823 goto done;
824 }
825
826 if (advertise & ADVERTISED_100baseT_Full)
827 config.link_speed |= I40E_LINK_SPEED_100MB;
828 if (advertise & ADVERTISED_1000baseT_Full ||
829 advertise & ADVERTISED_1000baseKX_Full)
830 config.link_speed |= I40E_LINK_SPEED_1GB;
831 if (advertise & ADVERTISED_10000baseT_Full ||
832 advertise & ADVERTISED_10000baseKX4_Full ||
833 advertise & ADVERTISED_10000baseKR_Full)
834 config.link_speed |= I40E_LINK_SPEED_10GB;
835 if (advertise & ADVERTISED_20000baseKR2_Full)
836 config.link_speed |= I40E_LINK_SPEED_20GB;
837 if (advertise & ADVERTISED_40000baseKR4_Full ||
838 advertise & ADVERTISED_40000baseCR4_Full ||
839 advertise & ADVERTISED_40000baseSR4_Full ||
840 advertise & ADVERTISED_40000baseLR4_Full)
841 config.link_speed |= I40E_LINK_SPEED_40GB;
842
843 /* If speed didn't get set, set it to what it currently is.
844 * This is needed because if advertise is 0 (as it is when autoneg
845 * is disabled) then speed won't get set.
846 */
847 if (!config.link_speed)
848 config.link_speed = abilities.link_speed;
849
850 if (change || (abilities.link_speed != config.link_speed)) {
851 /* copy over the rest of the abilities */
852 config.phy_type = abilities.phy_type;
853 config.phy_type_ext = abilities.phy_type_ext;
854 config.eee_capability = abilities.eee_capability;
855 config.eeer = abilities.eeer_val;
856 config.low_power_ctrl = abilities.d3_lpan;
857 config.fec_config = abilities.fec_cfg_curr_mod_ext_info &
858 I40E_AQ_PHY_FEC_CONFIG_MASK;
859
860 /* save the requested speeds */
861 hw->phy.link_info.requested_speeds = config.link_speed;
862 /* set link and auto negotiation so changes take effect */
863 config.abilities |= I40E_AQ_PHY_ENABLE_ATOMIC_LINK;
864 /* If link is up put link down */
865 if (hw->phy.link_info.link_info & I40E_AQ_LINK_UP) {
866 /* Tell the OS link is going down, the link will go
867 * back up when fw says it is ready asynchronously
868 */
869 i40e_print_link_message(vsi, false);
870 netif_carrier_off(netdev);
871 netif_tx_stop_all_queues(netdev);
872 }
873
874 /* make the aq call */
875 status = i40e_aq_set_phy_config(hw, &config, NULL);
876 if (status) {
877 netdev_info(netdev, "Set phy config failed, err %s aq_err %s\n",
878 i40e_stat_str(hw, status),
879 i40e_aq_str(hw, hw->aq.asq_last_status));
880 err = -EAGAIN;
881 goto done;
882 }
883
884 status = i40e_update_link_info(hw);
885 if (status)
886 netdev_dbg(netdev, "Updating link info failed with err %s aq_err %s\n",
887 i40e_stat_str(hw, status),
888 i40e_aq_str(hw, hw->aq.asq_last_status));
889
890 } else {
891 netdev_info(netdev, "Nothing changed, exiting without setting anything.\n");
892 }
893
894 done:
895 clear_bit(__I40E_CONFIG_BUSY, pf->state);
896
897 return err;
898 }
899
900 static int i40e_nway_reset(struct net_device *netdev)
901 {
902 /* restart autonegotiation */
903 struct i40e_netdev_priv *np = netdev_priv(netdev);
904 struct i40e_pf *pf = np->vsi->back;
905 struct i40e_hw *hw = &pf->hw;
906 bool link_up = hw->phy.link_info.link_info & I40E_AQ_LINK_UP;
907 i40e_status ret = 0;
908
909 ret = i40e_aq_set_link_restart_an(hw, link_up, NULL);
910 if (ret) {
911 netdev_info(netdev, "link restart failed, err %s aq_err %s\n",
912 i40e_stat_str(hw, ret),
913 i40e_aq_str(hw, hw->aq.asq_last_status));
914 return -EIO;
915 }
916
917 return 0;
918 }
919
920 /**
921 * i40e_get_pauseparam - Get Flow Control status
922 * Return tx/rx-pause status
923 **/
924 static void i40e_get_pauseparam(struct net_device *netdev,
925 struct ethtool_pauseparam *pause)
926 {
927 struct i40e_netdev_priv *np = netdev_priv(netdev);
928 struct i40e_pf *pf = np->vsi->back;
929 struct i40e_hw *hw = &pf->hw;
930 struct i40e_link_status *hw_link_info = &hw->phy.link_info;
931 struct i40e_dcbx_config *dcbx_cfg = &hw->local_dcbx_config;
932
933 pause->autoneg =
934 ((hw_link_info->an_info & I40E_AQ_AN_COMPLETED) ?
935 AUTONEG_ENABLE : AUTONEG_DISABLE);
936
937 /* PFC enabled so report LFC as off */
938 if (dcbx_cfg->pfc.pfcenable) {
939 pause->rx_pause = 0;
940 pause->tx_pause = 0;
941 return;
942 }
943
944 if (hw->fc.current_mode == I40E_FC_RX_PAUSE) {
945 pause->rx_pause = 1;
946 } else if (hw->fc.current_mode == I40E_FC_TX_PAUSE) {
947 pause->tx_pause = 1;
948 } else if (hw->fc.current_mode == I40E_FC_FULL) {
949 pause->rx_pause = 1;
950 pause->tx_pause = 1;
951 }
952 }
953
954 /**
955 * i40e_set_pauseparam - Set Flow Control parameter
956 * @netdev: network interface device structure
957 * @pause: return tx/rx flow control status
958 **/
959 static int i40e_set_pauseparam(struct net_device *netdev,
960 struct ethtool_pauseparam *pause)
961 {
962 struct i40e_netdev_priv *np = netdev_priv(netdev);
963 struct i40e_pf *pf = np->vsi->back;
964 struct i40e_vsi *vsi = np->vsi;
965 struct i40e_hw *hw = &pf->hw;
966 struct i40e_link_status *hw_link_info = &hw->phy.link_info;
967 struct i40e_dcbx_config *dcbx_cfg = &hw->local_dcbx_config;
968 bool link_up = hw_link_info->link_info & I40E_AQ_LINK_UP;
969 i40e_status status;
970 u8 aq_failures;
971 int err = 0;
972
973 /* Changing the port's flow control is not supported if this isn't the
974 * port's controlling PF
975 */
976 if (hw->partition_id != 1) {
977 i40e_partition_setting_complaint(pf);
978 return -EOPNOTSUPP;
979 }
980
981 if (vsi != pf->vsi[pf->lan_vsi])
982 return -EOPNOTSUPP;
983
984 if (pause->autoneg != ((hw_link_info->an_info & I40E_AQ_AN_COMPLETED) ?
985 AUTONEG_ENABLE : AUTONEG_DISABLE)) {
986 netdev_info(netdev, "To change autoneg please use: ethtool -s <dev> autoneg <on|off>\n");
987 return -EOPNOTSUPP;
988 }
989
990 /* If we have link and don't have autoneg */
991 if (!test_bit(__I40E_DOWN, pf->state) &&
992 !(hw_link_info->an_info & I40E_AQ_AN_COMPLETED)) {
993 /* Send message that it might not necessarily work*/
994 netdev_info(netdev, "Autoneg did not complete so changing settings may not result in an actual change.\n");
995 }
996
997 if (dcbx_cfg->pfc.pfcenable) {
998 netdev_info(netdev,
999 "Priority flow control enabled. Cannot set link flow control.\n");
1000 return -EOPNOTSUPP;
1001 }
1002
1003 if (pause->rx_pause && pause->tx_pause)
1004 hw->fc.requested_mode = I40E_FC_FULL;
1005 else if (pause->rx_pause && !pause->tx_pause)
1006 hw->fc.requested_mode = I40E_FC_RX_PAUSE;
1007 else if (!pause->rx_pause && pause->tx_pause)
1008 hw->fc.requested_mode = I40E_FC_TX_PAUSE;
1009 else if (!pause->rx_pause && !pause->tx_pause)
1010 hw->fc.requested_mode = I40E_FC_NONE;
1011 else
1012 return -EINVAL;
1013
1014 /* Tell the OS link is going down, the link will go back up when fw
1015 * says it is ready asynchronously
1016 */
1017 i40e_print_link_message(vsi, false);
1018 netif_carrier_off(netdev);
1019 netif_tx_stop_all_queues(netdev);
1020
1021 /* Set the fc mode and only restart an if link is up*/
1022 status = i40e_set_fc(hw, &aq_failures, link_up);
1023
1024 if (aq_failures & I40E_SET_FC_AQ_FAIL_GET) {
1025 netdev_info(netdev, "Set fc failed on the get_phy_capabilities call with err %s aq_err %s\n",
1026 i40e_stat_str(hw, status),
1027 i40e_aq_str(hw, hw->aq.asq_last_status));
1028 err = -EAGAIN;
1029 }
1030 if (aq_failures & I40E_SET_FC_AQ_FAIL_SET) {
1031 netdev_info(netdev, "Set fc failed on the set_phy_config call with err %s aq_err %s\n",
1032 i40e_stat_str(hw, status),
1033 i40e_aq_str(hw, hw->aq.asq_last_status));
1034 err = -EAGAIN;
1035 }
1036 if (aq_failures & I40E_SET_FC_AQ_FAIL_UPDATE) {
1037 netdev_info(netdev, "Set fc failed on the get_link_info call with err %s aq_err %s\n",
1038 i40e_stat_str(hw, status),
1039 i40e_aq_str(hw, hw->aq.asq_last_status));
1040 err = -EAGAIN;
1041 }
1042
1043 if (!test_bit(__I40E_DOWN, pf->state)) {
1044 /* Give it a little more time to try to come back */
1045 msleep(75);
1046 if (!test_bit(__I40E_DOWN, pf->state))
1047 return i40e_nway_reset(netdev);
1048 }
1049
1050 return err;
1051 }
1052
1053 static u32 i40e_get_msglevel(struct net_device *netdev)
1054 {
1055 struct i40e_netdev_priv *np = netdev_priv(netdev);
1056 struct i40e_pf *pf = np->vsi->back;
1057 u32 debug_mask = pf->hw.debug_mask;
1058
1059 if (debug_mask)
1060 netdev_info(netdev, "i40e debug_mask: 0x%08X\n", debug_mask);
1061
1062 return pf->msg_enable;
1063 }
1064
1065 static void i40e_set_msglevel(struct net_device *netdev, u32 data)
1066 {
1067 struct i40e_netdev_priv *np = netdev_priv(netdev);
1068 struct i40e_pf *pf = np->vsi->back;
1069
1070 if (I40E_DEBUG_USER & data)
1071 pf->hw.debug_mask = data;
1072 else
1073 pf->msg_enable = data;
1074 }
1075
1076 static int i40e_get_regs_len(struct net_device *netdev)
1077 {
1078 int reg_count = 0;
1079 int i;
1080
1081 for (i = 0; i40e_reg_list[i].offset != 0; i++)
1082 reg_count += i40e_reg_list[i].elements;
1083
1084 return reg_count * sizeof(u32);
1085 }
1086
1087 static void i40e_get_regs(struct net_device *netdev, struct ethtool_regs *regs,
1088 void *p)
1089 {
1090 struct i40e_netdev_priv *np = netdev_priv(netdev);
1091 struct i40e_pf *pf = np->vsi->back;
1092 struct i40e_hw *hw = &pf->hw;
1093 u32 *reg_buf = p;
1094 unsigned int i, j, ri;
1095 u32 reg;
1096
1097 /* Tell ethtool which driver-version-specific regs output we have.
1098 *
1099 * At some point, if we have ethtool doing special formatting of
1100 * this data, it will rely on this version number to know how to
1101 * interpret things. Hence, this needs to be updated if/when the
1102 * diags register table is changed.
1103 */
1104 regs->version = 1;
1105
1106 /* loop through the diags reg table for what to print */
1107 ri = 0;
1108 for (i = 0; i40e_reg_list[i].offset != 0; i++) {
1109 for (j = 0; j < i40e_reg_list[i].elements; j++) {
1110 reg = i40e_reg_list[i].offset
1111 + (j * i40e_reg_list[i].stride);
1112 reg_buf[ri++] = rd32(hw, reg);
1113 }
1114 }
1115
1116 }
1117
1118 static int i40e_get_eeprom(struct net_device *netdev,
1119 struct ethtool_eeprom *eeprom, u8 *bytes)
1120 {
1121 struct i40e_netdev_priv *np = netdev_priv(netdev);
1122 struct i40e_hw *hw = &np->vsi->back->hw;
1123 struct i40e_pf *pf = np->vsi->back;
1124 int ret_val = 0, len, offset;
1125 u8 *eeprom_buff;
1126 u16 i, sectors;
1127 bool last;
1128 u32 magic;
1129
1130 #define I40E_NVM_SECTOR_SIZE 4096
1131 if (eeprom->len == 0)
1132 return -EINVAL;
1133
1134 /* check for NVMUpdate access method */
1135 magic = hw->vendor_id | (hw->device_id << 16);
1136 if (eeprom->magic && eeprom->magic != magic) {
1137 struct i40e_nvm_access *cmd = (struct i40e_nvm_access *)eeprom;
1138 int errno = 0;
1139
1140 /* make sure it is the right magic for NVMUpdate */
1141 if ((eeprom->magic >> 16) != hw->device_id)
1142 errno = -EINVAL;
1143 else if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) ||
1144 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state))
1145 errno = -EBUSY;
1146 else
1147 ret_val = i40e_nvmupd_command(hw, cmd, bytes, &errno);
1148
1149 if ((errno || ret_val) && (hw->debug_mask & I40E_DEBUG_NVM))
1150 dev_info(&pf->pdev->dev,
1151 "NVMUpdate read failed err=%d status=0x%x errno=%d module=%d offset=0x%x size=%d\n",
1152 ret_val, hw->aq.asq_last_status, errno,
1153 (u8)(cmd->config & I40E_NVM_MOD_PNT_MASK),
1154 cmd->offset, cmd->data_size);
1155
1156 return errno;
1157 }
1158
1159 /* normal ethtool get_eeprom support */
1160 eeprom->magic = hw->vendor_id | (hw->device_id << 16);
1161
1162 eeprom_buff = kzalloc(eeprom->len, GFP_KERNEL);
1163 if (!eeprom_buff)
1164 return -ENOMEM;
1165
1166 ret_val = i40e_acquire_nvm(hw, I40E_RESOURCE_READ);
1167 if (ret_val) {
1168 dev_info(&pf->pdev->dev,
1169 "Failed Acquiring NVM resource for read err=%d status=0x%x\n",
1170 ret_val, hw->aq.asq_last_status);
1171 goto free_buff;
1172 }
1173
1174 sectors = eeprom->len / I40E_NVM_SECTOR_SIZE;
1175 sectors += (eeprom->len % I40E_NVM_SECTOR_SIZE) ? 1 : 0;
1176 len = I40E_NVM_SECTOR_SIZE;
1177 last = false;
1178 for (i = 0; i < sectors; i++) {
1179 if (i == (sectors - 1)) {
1180 len = eeprom->len - (I40E_NVM_SECTOR_SIZE * i);
1181 last = true;
1182 }
1183 offset = eeprom->offset + (I40E_NVM_SECTOR_SIZE * i),
1184 ret_val = i40e_aq_read_nvm(hw, 0x0, offset, len,
1185 (u8 *)eeprom_buff + (I40E_NVM_SECTOR_SIZE * i),
1186 last, NULL);
1187 if (ret_val && hw->aq.asq_last_status == I40E_AQ_RC_EPERM) {
1188 dev_info(&pf->pdev->dev,
1189 "read NVM failed, invalid offset 0x%x\n",
1190 offset);
1191 break;
1192 } else if (ret_val &&
1193 hw->aq.asq_last_status == I40E_AQ_RC_EACCES) {
1194 dev_info(&pf->pdev->dev,
1195 "read NVM failed, access, offset 0x%x\n",
1196 offset);
1197 break;
1198 } else if (ret_val) {
1199 dev_info(&pf->pdev->dev,
1200 "read NVM failed offset %d err=%d status=0x%x\n",
1201 offset, ret_val, hw->aq.asq_last_status);
1202 break;
1203 }
1204 }
1205
1206 i40e_release_nvm(hw);
1207 memcpy(bytes, (u8 *)eeprom_buff, eeprom->len);
1208 free_buff:
1209 kfree(eeprom_buff);
1210 return ret_val;
1211 }
1212
1213 static int i40e_get_eeprom_len(struct net_device *netdev)
1214 {
1215 struct i40e_netdev_priv *np = netdev_priv(netdev);
1216 struct i40e_hw *hw = &np->vsi->back->hw;
1217 u32 val;
1218
1219 #define X722_EEPROM_SCOPE_LIMIT 0x5B9FFF
1220 if (hw->mac.type == I40E_MAC_X722) {
1221 val = X722_EEPROM_SCOPE_LIMIT + 1;
1222 return val;
1223 }
1224 val = (rd32(hw, I40E_GLPCI_LBARCTRL)
1225 & I40E_GLPCI_LBARCTRL_FL_SIZE_MASK)
1226 >> I40E_GLPCI_LBARCTRL_FL_SIZE_SHIFT;
1227 /* register returns value in power of 2, 64Kbyte chunks. */
1228 val = (64 * 1024) * BIT(val);
1229 return val;
1230 }
1231
1232 static int i40e_set_eeprom(struct net_device *netdev,
1233 struct ethtool_eeprom *eeprom, u8 *bytes)
1234 {
1235 struct i40e_netdev_priv *np = netdev_priv(netdev);
1236 struct i40e_hw *hw = &np->vsi->back->hw;
1237 struct i40e_pf *pf = np->vsi->back;
1238 struct i40e_nvm_access *cmd = (struct i40e_nvm_access *)eeprom;
1239 int ret_val = 0;
1240 int errno = 0;
1241 u32 magic;
1242
1243 /* normal ethtool set_eeprom is not supported */
1244 magic = hw->vendor_id | (hw->device_id << 16);
1245 if (eeprom->magic == magic)
1246 errno = -EOPNOTSUPP;
1247 /* check for NVMUpdate access method */
1248 else if (!eeprom->magic || (eeprom->magic >> 16) != hw->device_id)
1249 errno = -EINVAL;
1250 else if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) ||
1251 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state))
1252 errno = -EBUSY;
1253 else
1254 ret_val = i40e_nvmupd_command(hw, cmd, bytes, &errno);
1255
1256 if ((errno || ret_val) && (hw->debug_mask & I40E_DEBUG_NVM))
1257 dev_info(&pf->pdev->dev,
1258 "NVMUpdate write failed err=%d status=0x%x errno=%d module=%d offset=0x%x size=%d\n",
1259 ret_val, hw->aq.asq_last_status, errno,
1260 (u8)(cmd->config & I40E_NVM_MOD_PNT_MASK),
1261 cmd->offset, cmd->data_size);
1262
1263 return errno;
1264 }
1265
1266 static void i40e_get_drvinfo(struct net_device *netdev,
1267 struct ethtool_drvinfo *drvinfo)
1268 {
1269 struct i40e_netdev_priv *np = netdev_priv(netdev);
1270 struct i40e_vsi *vsi = np->vsi;
1271 struct i40e_pf *pf = vsi->back;
1272
1273 strlcpy(drvinfo->driver, i40e_driver_name, sizeof(drvinfo->driver));
1274 strlcpy(drvinfo->version, i40e_driver_version_str,
1275 sizeof(drvinfo->version));
1276 strlcpy(drvinfo->fw_version, i40e_nvm_version_str(&pf->hw),
1277 sizeof(drvinfo->fw_version));
1278 strlcpy(drvinfo->bus_info, pci_name(pf->pdev),
1279 sizeof(drvinfo->bus_info));
1280 drvinfo->n_priv_flags = I40E_PRIV_FLAGS_STR_LEN;
1281 if (pf->hw.pf_id == 0)
1282 drvinfo->n_priv_flags += I40E_GL_PRIV_FLAGS_STR_LEN;
1283 }
1284
1285 static void i40e_get_ringparam(struct net_device *netdev,
1286 struct ethtool_ringparam *ring)
1287 {
1288 struct i40e_netdev_priv *np = netdev_priv(netdev);
1289 struct i40e_pf *pf = np->vsi->back;
1290 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
1291
1292 ring->rx_max_pending = I40E_MAX_NUM_DESCRIPTORS;
1293 ring->tx_max_pending = I40E_MAX_NUM_DESCRIPTORS;
1294 ring->rx_mini_max_pending = 0;
1295 ring->rx_jumbo_max_pending = 0;
1296 ring->rx_pending = vsi->rx_rings[0]->count;
1297 ring->tx_pending = vsi->tx_rings[0]->count;
1298 ring->rx_mini_pending = 0;
1299 ring->rx_jumbo_pending = 0;
1300 }
1301
1302 static bool i40e_active_tx_ring_index(struct i40e_vsi *vsi, u16 index)
1303 {
1304 if (i40e_enabled_xdp_vsi(vsi)) {
1305 return index < vsi->num_queue_pairs ||
1306 (index >= vsi->alloc_queue_pairs &&
1307 index < vsi->alloc_queue_pairs + vsi->num_queue_pairs);
1308 }
1309
1310 return index < vsi->num_queue_pairs;
1311 }
1312
1313 static int i40e_set_ringparam(struct net_device *netdev,
1314 struct ethtool_ringparam *ring)
1315 {
1316 struct i40e_ring *tx_rings = NULL, *rx_rings = NULL;
1317 struct i40e_netdev_priv *np = netdev_priv(netdev);
1318 struct i40e_hw *hw = &np->vsi->back->hw;
1319 struct i40e_vsi *vsi = np->vsi;
1320 struct i40e_pf *pf = vsi->back;
1321 u32 new_rx_count, new_tx_count;
1322 u16 tx_alloc_queue_pairs;
1323 int timeout = 50;
1324 int i, err = 0;
1325
1326 if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
1327 return -EINVAL;
1328
1329 if (ring->tx_pending > I40E_MAX_NUM_DESCRIPTORS ||
1330 ring->tx_pending < I40E_MIN_NUM_DESCRIPTORS ||
1331 ring->rx_pending > I40E_MAX_NUM_DESCRIPTORS ||
1332 ring->rx_pending < I40E_MIN_NUM_DESCRIPTORS) {
1333 netdev_info(netdev,
1334 "Descriptors requested (Tx: %d / Rx: %d) out of range [%d-%d]\n",
1335 ring->tx_pending, ring->rx_pending,
1336 I40E_MIN_NUM_DESCRIPTORS, I40E_MAX_NUM_DESCRIPTORS);
1337 return -EINVAL;
1338 }
1339
1340 new_tx_count = ALIGN(ring->tx_pending, I40E_REQ_DESCRIPTOR_MULTIPLE);
1341 new_rx_count = ALIGN(ring->rx_pending, I40E_REQ_DESCRIPTOR_MULTIPLE);
1342
1343 /* if nothing to do return success */
1344 if ((new_tx_count == vsi->tx_rings[0]->count) &&
1345 (new_rx_count == vsi->rx_rings[0]->count))
1346 return 0;
1347
1348 while (test_and_set_bit(__I40E_CONFIG_BUSY, pf->state)) {
1349 timeout--;
1350 if (!timeout)
1351 return -EBUSY;
1352 usleep_range(1000, 2000);
1353 }
1354
1355 if (!netif_running(vsi->netdev)) {
1356 /* simple case - set for the next time the netdev is started */
1357 for (i = 0; i < vsi->num_queue_pairs; i++) {
1358 vsi->tx_rings[i]->count = new_tx_count;
1359 vsi->rx_rings[i]->count = new_rx_count;
1360 if (i40e_enabled_xdp_vsi(vsi))
1361 vsi->xdp_rings[i]->count = new_tx_count;
1362 }
1363 goto done;
1364 }
1365
1366 /* We can't just free everything and then setup again,
1367 * because the ISRs in MSI-X mode get passed pointers
1368 * to the Tx and Rx ring structs.
1369 */
1370
1371 /* alloc updated Tx and XDP Tx resources */
1372 tx_alloc_queue_pairs = vsi->alloc_queue_pairs *
1373 (i40e_enabled_xdp_vsi(vsi) ? 2 : 1);
1374 if (new_tx_count != vsi->tx_rings[0]->count) {
1375 netdev_info(netdev,
1376 "Changing Tx descriptor count from %d to %d.\n",
1377 vsi->tx_rings[0]->count, new_tx_count);
1378 tx_rings = kcalloc(tx_alloc_queue_pairs,
1379 sizeof(struct i40e_ring), GFP_KERNEL);
1380 if (!tx_rings) {
1381 err = -ENOMEM;
1382 goto done;
1383 }
1384
1385 for (i = 0; i < tx_alloc_queue_pairs; i++) {
1386 if (!i40e_active_tx_ring_index(vsi, i))
1387 continue;
1388
1389 tx_rings[i] = *vsi->tx_rings[i];
1390 tx_rings[i].count = new_tx_count;
1391 /* the desc and bi pointers will be reallocated in the
1392 * setup call
1393 */
1394 tx_rings[i].desc = NULL;
1395 tx_rings[i].rx_bi = NULL;
1396 err = i40e_setup_tx_descriptors(&tx_rings[i]);
1397 if (err) {
1398 while (i) {
1399 i--;
1400 if (!i40e_active_tx_ring_index(vsi, i))
1401 continue;
1402 i40e_free_tx_resources(&tx_rings[i]);
1403 }
1404 kfree(tx_rings);
1405 tx_rings = NULL;
1406
1407 goto done;
1408 }
1409 }
1410 }
1411
1412 /* alloc updated Rx resources */
1413 if (new_rx_count != vsi->rx_rings[0]->count) {
1414 netdev_info(netdev,
1415 "Changing Rx descriptor count from %d to %d\n",
1416 vsi->rx_rings[0]->count, new_rx_count);
1417 rx_rings = kcalloc(vsi->alloc_queue_pairs,
1418 sizeof(struct i40e_ring), GFP_KERNEL);
1419 if (!rx_rings) {
1420 err = -ENOMEM;
1421 goto free_tx;
1422 }
1423
1424 for (i = 0; i < vsi->num_queue_pairs; i++) {
1425 struct i40e_ring *ring;
1426 u16 unused;
1427
1428 /* clone ring and setup updated count */
1429 rx_rings[i] = *vsi->rx_rings[i];
1430 rx_rings[i].count = new_rx_count;
1431 /* the desc and bi pointers will be reallocated in the
1432 * setup call
1433 */
1434 rx_rings[i].desc = NULL;
1435 rx_rings[i].rx_bi = NULL;
1436 /* this is to allow wr32 to have something to write to
1437 * during early allocation of Rx buffers
1438 */
1439 rx_rings[i].tail = hw->hw_addr + I40E_PRTGEN_STATUS;
1440 err = i40e_setup_rx_descriptors(&rx_rings[i]);
1441 if (err)
1442 goto rx_unwind;
1443
1444 /* now allocate the Rx buffers to make sure the OS
1445 * has enough memory, any failure here means abort
1446 */
1447 ring = &rx_rings[i];
1448 unused = I40E_DESC_UNUSED(ring);
1449 err = i40e_alloc_rx_buffers(ring, unused);
1450 rx_unwind:
1451 if (err) {
1452 do {
1453 i40e_free_rx_resources(&rx_rings[i]);
1454 } while (i--);
1455 kfree(rx_rings);
1456 rx_rings = NULL;
1457
1458 goto free_tx;
1459 }
1460 }
1461 }
1462
1463 /* Bring interface down, copy in the new ring info,
1464 * then restore the interface
1465 */
1466 i40e_down(vsi);
1467
1468 if (tx_rings) {
1469 for (i = 0; i < tx_alloc_queue_pairs; i++) {
1470 if (i40e_active_tx_ring_index(vsi, i)) {
1471 i40e_free_tx_resources(vsi->tx_rings[i]);
1472 *vsi->tx_rings[i] = tx_rings[i];
1473 }
1474 }
1475 kfree(tx_rings);
1476 tx_rings = NULL;
1477 }
1478
1479 if (rx_rings) {
1480 for (i = 0; i < vsi->num_queue_pairs; i++) {
1481 i40e_free_rx_resources(vsi->rx_rings[i]);
1482 /* get the real tail offset */
1483 rx_rings[i].tail = vsi->rx_rings[i]->tail;
1484 /* this is to fake out the allocation routine
1485 * into thinking it has to realloc everything
1486 * but the recycling logic will let us re-use
1487 * the buffers allocated above
1488 */
1489 rx_rings[i].next_to_use = 0;
1490 rx_rings[i].next_to_clean = 0;
1491 rx_rings[i].next_to_alloc = 0;
1492 /* do a struct copy */
1493 *vsi->rx_rings[i] = rx_rings[i];
1494 }
1495 kfree(rx_rings);
1496 rx_rings = NULL;
1497 }
1498
1499 i40e_up(vsi);
1500
1501 free_tx:
1502 /* error cleanup if the Rx allocations failed after getting Tx */
1503 if (tx_rings) {
1504 for (i = 0; i < tx_alloc_queue_pairs; i++) {
1505 if (i40e_active_tx_ring_index(vsi, i))
1506 i40e_free_tx_resources(vsi->tx_rings[i]);
1507 }
1508 kfree(tx_rings);
1509 tx_rings = NULL;
1510 }
1511
1512 done:
1513 clear_bit(__I40E_CONFIG_BUSY, pf->state);
1514
1515 return err;
1516 }
1517
1518 static int i40e_get_sset_count(struct net_device *netdev, int sset)
1519 {
1520 struct i40e_netdev_priv *np = netdev_priv(netdev);
1521 struct i40e_vsi *vsi = np->vsi;
1522 struct i40e_pf *pf = vsi->back;
1523
1524 switch (sset) {
1525 case ETH_SS_TEST:
1526 return I40E_TEST_LEN;
1527 case ETH_SS_STATS:
1528 if (vsi == pf->vsi[pf->lan_vsi] && pf->hw.partition_id == 1) {
1529 int len = I40E_PF_STATS_LEN(netdev);
1530
1531 if ((pf->lan_veb != I40E_NO_VEB) &&
1532 (pf->flags & I40E_FLAG_VEB_STATS_ENABLED))
1533 len += I40E_VEB_STATS_TOTAL;
1534 return len;
1535 } else {
1536 return I40E_VSI_STATS_LEN(netdev);
1537 }
1538 case ETH_SS_PRIV_FLAGS:
1539 return I40E_PRIV_FLAGS_STR_LEN +
1540 (pf->hw.pf_id == 0 ? I40E_GL_PRIV_FLAGS_STR_LEN : 0);
1541 default:
1542 return -EOPNOTSUPP;
1543 }
1544 }
1545
1546 static void i40e_get_ethtool_stats(struct net_device *netdev,
1547 struct ethtool_stats *stats, u64 *data)
1548 {
1549 struct i40e_netdev_priv *np = netdev_priv(netdev);
1550 struct i40e_ring *tx_ring, *rx_ring;
1551 struct i40e_vsi *vsi = np->vsi;
1552 struct i40e_pf *pf = vsi->back;
1553 unsigned int j;
1554 int i = 0;
1555 char *p;
1556 struct rtnl_link_stats64 *net_stats = i40e_get_vsi_stats_struct(vsi);
1557 unsigned int start;
1558
1559 i40e_update_stats(vsi);
1560
1561 for (j = 0; j < I40E_NETDEV_STATS_LEN; j++) {
1562 p = (char *)net_stats + i40e_gstrings_net_stats[j].stat_offset;
1563 data[i++] = (i40e_gstrings_net_stats[j].sizeof_stat ==
1564 sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
1565 }
1566 for (j = 0; j < I40E_MISC_STATS_LEN; j++) {
1567 p = (char *)vsi + i40e_gstrings_misc_stats[j].stat_offset;
1568 data[i++] = (i40e_gstrings_misc_stats[j].sizeof_stat ==
1569 sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
1570 }
1571 rcu_read_lock();
1572 for (j = 0; j < vsi->num_queue_pairs; j++) {
1573 tx_ring = READ_ONCE(vsi->tx_rings[j]);
1574
1575 if (!tx_ring)
1576 continue;
1577
1578 /* process Tx ring statistics */
1579 do {
1580 start = u64_stats_fetch_begin_irq(&tx_ring->syncp);
1581 data[i] = tx_ring->stats.packets;
1582 data[i + 1] = tx_ring->stats.bytes;
1583 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start));
1584 i += 2;
1585
1586 /* Rx ring is the 2nd half of the queue pair */
1587 rx_ring = &tx_ring[1];
1588 do {
1589 start = u64_stats_fetch_begin_irq(&rx_ring->syncp);
1590 data[i] = rx_ring->stats.packets;
1591 data[i + 1] = rx_ring->stats.bytes;
1592 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start));
1593 i += 2;
1594 }
1595 rcu_read_unlock();
1596 if (vsi != pf->vsi[pf->lan_vsi] || pf->hw.partition_id != 1)
1597 return;
1598
1599 if ((pf->lan_veb != I40E_NO_VEB) &&
1600 (pf->flags & I40E_FLAG_VEB_STATS_ENABLED)) {
1601 struct i40e_veb *veb = pf->veb[pf->lan_veb];
1602
1603 for (j = 0; j < I40E_VEB_STATS_LEN; j++) {
1604 p = (char *)veb;
1605 p += i40e_gstrings_veb_stats[j].stat_offset;
1606 data[i++] = (i40e_gstrings_veb_stats[j].sizeof_stat ==
1607 sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
1608 }
1609 for (j = 0; j < I40E_MAX_TRAFFIC_CLASS; j++) {
1610 data[i++] = veb->tc_stats.tc_tx_packets[j];
1611 data[i++] = veb->tc_stats.tc_tx_bytes[j];
1612 data[i++] = veb->tc_stats.tc_rx_packets[j];
1613 data[i++] = veb->tc_stats.tc_rx_bytes[j];
1614 }
1615 }
1616 for (j = 0; j < I40E_GLOBAL_STATS_LEN; j++) {
1617 p = (char *)pf + i40e_gstrings_stats[j].stat_offset;
1618 data[i++] = (i40e_gstrings_stats[j].sizeof_stat ==
1619 sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
1620 }
1621 for (j = 0; j < I40E_MAX_USER_PRIORITY; j++) {
1622 data[i++] = pf->stats.priority_xon_tx[j];
1623 data[i++] = pf->stats.priority_xoff_tx[j];
1624 }
1625 for (j = 0; j < I40E_MAX_USER_PRIORITY; j++) {
1626 data[i++] = pf->stats.priority_xon_rx[j];
1627 data[i++] = pf->stats.priority_xoff_rx[j];
1628 }
1629 for (j = 0; j < I40E_MAX_USER_PRIORITY; j++)
1630 data[i++] = pf->stats.priority_xon_2_xoff[j];
1631 }
1632
1633 static void i40e_get_strings(struct net_device *netdev, u32 stringset,
1634 u8 *data)
1635 {
1636 struct i40e_netdev_priv *np = netdev_priv(netdev);
1637 struct i40e_vsi *vsi = np->vsi;
1638 struct i40e_pf *pf = vsi->back;
1639 char *p = (char *)data;
1640 unsigned int i;
1641
1642 switch (stringset) {
1643 case ETH_SS_TEST:
1644 memcpy(data, i40e_gstrings_test,
1645 I40E_TEST_LEN * ETH_GSTRING_LEN);
1646 break;
1647 case ETH_SS_STATS:
1648 for (i = 0; i < I40E_NETDEV_STATS_LEN; i++) {
1649 snprintf(p, ETH_GSTRING_LEN, "%s",
1650 i40e_gstrings_net_stats[i].stat_string);
1651 p += ETH_GSTRING_LEN;
1652 }
1653 for (i = 0; i < I40E_MISC_STATS_LEN; i++) {
1654 snprintf(p, ETH_GSTRING_LEN, "%s",
1655 i40e_gstrings_misc_stats[i].stat_string);
1656 p += ETH_GSTRING_LEN;
1657 }
1658 for (i = 0; i < vsi->num_queue_pairs; i++) {
1659 snprintf(p, ETH_GSTRING_LEN, "tx-%d.tx_packets", i);
1660 p += ETH_GSTRING_LEN;
1661 snprintf(p, ETH_GSTRING_LEN, "tx-%d.tx_bytes", i);
1662 p += ETH_GSTRING_LEN;
1663 snprintf(p, ETH_GSTRING_LEN, "rx-%d.rx_packets", i);
1664 p += ETH_GSTRING_LEN;
1665 snprintf(p, ETH_GSTRING_LEN, "rx-%d.rx_bytes", i);
1666 p += ETH_GSTRING_LEN;
1667 }
1668 if (vsi != pf->vsi[pf->lan_vsi] || pf->hw.partition_id != 1)
1669 return;
1670
1671 if ((pf->lan_veb != I40E_NO_VEB) &&
1672 (pf->flags & I40E_FLAG_VEB_STATS_ENABLED)) {
1673 for (i = 0; i < I40E_VEB_STATS_LEN; i++) {
1674 snprintf(p, ETH_GSTRING_LEN, "veb.%s",
1675 i40e_gstrings_veb_stats[i].stat_string);
1676 p += ETH_GSTRING_LEN;
1677 }
1678 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1679 snprintf(p, ETH_GSTRING_LEN,
1680 "veb.tc_%d_tx_packets", i);
1681 p += ETH_GSTRING_LEN;
1682 snprintf(p, ETH_GSTRING_LEN,
1683 "veb.tc_%d_tx_bytes", i);
1684 p += ETH_GSTRING_LEN;
1685 snprintf(p, ETH_GSTRING_LEN,
1686 "veb.tc_%d_rx_packets", i);
1687 p += ETH_GSTRING_LEN;
1688 snprintf(p, ETH_GSTRING_LEN,
1689 "veb.tc_%d_rx_bytes", i);
1690 p += ETH_GSTRING_LEN;
1691 }
1692 }
1693 for (i = 0; i < I40E_GLOBAL_STATS_LEN; i++) {
1694 snprintf(p, ETH_GSTRING_LEN, "port.%s",
1695 i40e_gstrings_stats[i].stat_string);
1696 p += ETH_GSTRING_LEN;
1697 }
1698 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
1699 snprintf(p, ETH_GSTRING_LEN,
1700 "port.tx_priority_%d_xon", i);
1701 p += ETH_GSTRING_LEN;
1702 snprintf(p, ETH_GSTRING_LEN,
1703 "port.tx_priority_%d_xoff", i);
1704 p += ETH_GSTRING_LEN;
1705 }
1706 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
1707 snprintf(p, ETH_GSTRING_LEN,
1708 "port.rx_priority_%d_xon", i);
1709 p += ETH_GSTRING_LEN;
1710 snprintf(p, ETH_GSTRING_LEN,
1711 "port.rx_priority_%d_xoff", i);
1712 p += ETH_GSTRING_LEN;
1713 }
1714 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
1715 snprintf(p, ETH_GSTRING_LEN,
1716 "port.rx_priority_%d_xon_2_xoff", i);
1717 p += ETH_GSTRING_LEN;
1718 }
1719 /* BUG_ON(p - data != I40E_STATS_LEN * ETH_GSTRING_LEN); */
1720 break;
1721 case ETH_SS_PRIV_FLAGS:
1722 for (i = 0; i < I40E_PRIV_FLAGS_STR_LEN; i++) {
1723 snprintf(p, ETH_GSTRING_LEN, "%s",
1724 i40e_gstrings_priv_flags[i].flag_string);
1725 p += ETH_GSTRING_LEN;
1726 }
1727 if (pf->hw.pf_id != 0)
1728 break;
1729 for (i = 0; i < I40E_GL_PRIV_FLAGS_STR_LEN; i++) {
1730 snprintf(p, ETH_GSTRING_LEN, "%s",
1731 i40e_gl_gstrings_priv_flags[i].flag_string);
1732 p += ETH_GSTRING_LEN;
1733 }
1734 break;
1735 default:
1736 break;
1737 }
1738 }
1739
1740 static int i40e_get_ts_info(struct net_device *dev,
1741 struct ethtool_ts_info *info)
1742 {
1743 struct i40e_pf *pf = i40e_netdev_to_pf(dev);
1744
1745 /* only report HW timestamping if PTP is enabled */
1746 if (!(pf->flags & I40E_FLAG_PTP))
1747 return ethtool_op_get_ts_info(dev, info);
1748
1749 info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE |
1750 SOF_TIMESTAMPING_RX_SOFTWARE |
1751 SOF_TIMESTAMPING_SOFTWARE |
1752 SOF_TIMESTAMPING_TX_HARDWARE |
1753 SOF_TIMESTAMPING_RX_HARDWARE |
1754 SOF_TIMESTAMPING_RAW_HARDWARE;
1755
1756 if (pf->ptp_clock)
1757 info->phc_index = ptp_clock_index(pf->ptp_clock);
1758 else
1759 info->phc_index = -1;
1760
1761 info->tx_types = BIT(HWTSTAMP_TX_OFF) | BIT(HWTSTAMP_TX_ON);
1762
1763 info->rx_filters = BIT(HWTSTAMP_FILTER_NONE) |
1764 BIT(HWTSTAMP_FILTER_PTP_V2_L2_EVENT) |
1765 BIT(HWTSTAMP_FILTER_PTP_V2_L2_SYNC) |
1766 BIT(HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ);
1767
1768 if (pf->hw_features & I40E_HW_PTP_L4_CAPABLE)
1769 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V1_L4_SYNC) |
1770 BIT(HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) |
1771 BIT(HWTSTAMP_FILTER_PTP_V2_EVENT) |
1772 BIT(HWTSTAMP_FILTER_PTP_V2_L4_EVENT) |
1773 BIT(HWTSTAMP_FILTER_PTP_V2_SYNC) |
1774 BIT(HWTSTAMP_FILTER_PTP_V2_L4_SYNC) |
1775 BIT(HWTSTAMP_FILTER_PTP_V2_DELAY_REQ) |
1776 BIT(HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ);
1777
1778 return 0;
1779 }
1780
1781 static int i40e_link_test(struct net_device *netdev, u64 *data)
1782 {
1783 struct i40e_netdev_priv *np = netdev_priv(netdev);
1784 struct i40e_pf *pf = np->vsi->back;
1785 i40e_status status;
1786 bool link_up = false;
1787
1788 netif_info(pf, hw, netdev, "link test\n");
1789 status = i40e_get_link_status(&pf->hw, &link_up);
1790 if (status) {
1791 netif_err(pf, drv, netdev, "link query timed out, please retry test\n");
1792 *data = 1;
1793 return *data;
1794 }
1795
1796 if (link_up)
1797 *data = 0;
1798 else
1799 *data = 1;
1800
1801 return *data;
1802 }
1803
1804 static int i40e_reg_test(struct net_device *netdev, u64 *data)
1805 {
1806 struct i40e_netdev_priv *np = netdev_priv(netdev);
1807 struct i40e_pf *pf = np->vsi->back;
1808
1809 netif_info(pf, hw, netdev, "register test\n");
1810 *data = i40e_diag_reg_test(&pf->hw);
1811
1812 return *data;
1813 }
1814
1815 static int i40e_eeprom_test(struct net_device *netdev, u64 *data)
1816 {
1817 struct i40e_netdev_priv *np = netdev_priv(netdev);
1818 struct i40e_pf *pf = np->vsi->back;
1819
1820 netif_info(pf, hw, netdev, "eeprom test\n");
1821 *data = i40e_diag_eeprom_test(&pf->hw);
1822
1823 /* forcebly clear the NVM Update state machine */
1824 pf->hw.nvmupd_state = I40E_NVMUPD_STATE_INIT;
1825
1826 return *data;
1827 }
1828
1829 static int i40e_intr_test(struct net_device *netdev, u64 *data)
1830 {
1831 struct i40e_netdev_priv *np = netdev_priv(netdev);
1832 struct i40e_pf *pf = np->vsi->back;
1833 u16 swc_old = pf->sw_int_count;
1834
1835 netif_info(pf, hw, netdev, "interrupt test\n");
1836 wr32(&pf->hw, I40E_PFINT_DYN_CTL0,
1837 (I40E_PFINT_DYN_CTL0_INTENA_MASK |
1838 I40E_PFINT_DYN_CTL0_SWINT_TRIG_MASK |
1839 I40E_PFINT_DYN_CTL0_ITR_INDX_MASK |
1840 I40E_PFINT_DYN_CTL0_SW_ITR_INDX_ENA_MASK |
1841 I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK));
1842 usleep_range(1000, 2000);
1843 *data = (swc_old == pf->sw_int_count);
1844
1845 return *data;
1846 }
1847
1848 static inline bool i40e_active_vfs(struct i40e_pf *pf)
1849 {
1850 struct i40e_vf *vfs = pf->vf;
1851 int i;
1852
1853 for (i = 0; i < pf->num_alloc_vfs; i++)
1854 if (test_bit(I40E_VF_STATE_ACTIVE, &vfs[i].vf_states))
1855 return true;
1856 return false;
1857 }
1858
1859 static inline bool i40e_active_vmdqs(struct i40e_pf *pf)
1860 {
1861 return !!i40e_find_vsi_by_type(pf, I40E_VSI_VMDQ2);
1862 }
1863
1864 static void i40e_diag_test(struct net_device *netdev,
1865 struct ethtool_test *eth_test, u64 *data)
1866 {
1867 struct i40e_netdev_priv *np = netdev_priv(netdev);
1868 bool if_running = netif_running(netdev);
1869 struct i40e_pf *pf = np->vsi->back;
1870
1871 if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
1872 /* Offline tests */
1873 netif_info(pf, drv, netdev, "offline testing starting\n");
1874
1875 set_bit(__I40E_TESTING, pf->state);
1876
1877 if (i40e_active_vfs(pf) || i40e_active_vmdqs(pf)) {
1878 dev_warn(&pf->pdev->dev,
1879 "Please take active VFs and Netqueues offline and restart the adapter before running NIC diagnostics\n");
1880 data[I40E_ETH_TEST_REG] = 1;
1881 data[I40E_ETH_TEST_EEPROM] = 1;
1882 data[I40E_ETH_TEST_INTR] = 1;
1883 data[I40E_ETH_TEST_LINK] = 1;
1884 eth_test->flags |= ETH_TEST_FL_FAILED;
1885 clear_bit(__I40E_TESTING, pf->state);
1886 goto skip_ol_tests;
1887 }
1888
1889 /* If the device is online then take it offline */
1890 if (if_running)
1891 /* indicate we're in test mode */
1892 i40e_close(netdev);
1893 else
1894 /* This reset does not affect link - if it is
1895 * changed to a type of reset that does affect
1896 * link then the following link test would have
1897 * to be moved to before the reset
1898 */
1899 i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED), true);
1900
1901 if (i40e_link_test(netdev, &data[I40E_ETH_TEST_LINK]))
1902 eth_test->flags |= ETH_TEST_FL_FAILED;
1903
1904 if (i40e_eeprom_test(netdev, &data[I40E_ETH_TEST_EEPROM]))
1905 eth_test->flags |= ETH_TEST_FL_FAILED;
1906
1907 if (i40e_intr_test(netdev, &data[I40E_ETH_TEST_INTR]))
1908 eth_test->flags |= ETH_TEST_FL_FAILED;
1909
1910 /* run reg test last, a reset is required after it */
1911 if (i40e_reg_test(netdev, &data[I40E_ETH_TEST_REG]))
1912 eth_test->flags |= ETH_TEST_FL_FAILED;
1913
1914 clear_bit(__I40E_TESTING, pf->state);
1915 i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED), true);
1916
1917 if (if_running)
1918 i40e_open(netdev);
1919 } else {
1920 /* Online tests */
1921 netif_info(pf, drv, netdev, "online testing starting\n");
1922
1923 if (i40e_link_test(netdev, &data[I40E_ETH_TEST_LINK]))
1924 eth_test->flags |= ETH_TEST_FL_FAILED;
1925
1926 /* Offline only tests, not run in online; pass by default */
1927 data[I40E_ETH_TEST_REG] = 0;
1928 data[I40E_ETH_TEST_EEPROM] = 0;
1929 data[I40E_ETH_TEST_INTR] = 0;
1930 }
1931
1932 skip_ol_tests:
1933
1934 netif_info(pf, drv, netdev, "testing finished\n");
1935 }
1936
1937 static void i40e_get_wol(struct net_device *netdev,
1938 struct ethtool_wolinfo *wol)
1939 {
1940 struct i40e_netdev_priv *np = netdev_priv(netdev);
1941 struct i40e_pf *pf = np->vsi->back;
1942 struct i40e_hw *hw = &pf->hw;
1943 u16 wol_nvm_bits;
1944
1945 /* NVM bit on means WoL disabled for the port */
1946 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits);
1947 if ((BIT(hw->port) & wol_nvm_bits) || (hw->partition_id != 1)) {
1948 wol->supported = 0;
1949 wol->wolopts = 0;
1950 } else {
1951 wol->supported = WAKE_MAGIC;
1952 wol->wolopts = (pf->wol_en ? WAKE_MAGIC : 0);
1953 }
1954 }
1955
1956 /**
1957 * i40e_set_wol - set the WakeOnLAN configuration
1958 * @netdev: the netdev in question
1959 * @wol: the ethtool WoL setting data
1960 **/
1961 static int i40e_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1962 {
1963 struct i40e_netdev_priv *np = netdev_priv(netdev);
1964 struct i40e_pf *pf = np->vsi->back;
1965 struct i40e_vsi *vsi = np->vsi;
1966 struct i40e_hw *hw = &pf->hw;
1967 u16 wol_nvm_bits;
1968
1969 /* WoL not supported if this isn't the controlling PF on the port */
1970 if (hw->partition_id != 1) {
1971 i40e_partition_setting_complaint(pf);
1972 return -EOPNOTSUPP;
1973 }
1974
1975 if (vsi != pf->vsi[pf->lan_vsi])
1976 return -EOPNOTSUPP;
1977
1978 /* NVM bit on means WoL disabled for the port */
1979 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits);
1980 if (BIT(hw->port) & wol_nvm_bits)
1981 return -EOPNOTSUPP;
1982
1983 /* only magic packet is supported */
1984 if (wol->wolopts && (wol->wolopts != WAKE_MAGIC))
1985 return -EOPNOTSUPP;
1986
1987 /* is this a new value? */
1988 if (pf->wol_en != !!wol->wolopts) {
1989 pf->wol_en = !!wol->wolopts;
1990 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en);
1991 }
1992
1993 return 0;
1994 }
1995
1996 static int i40e_set_phys_id(struct net_device *netdev,
1997 enum ethtool_phys_id_state state)
1998 {
1999 struct i40e_netdev_priv *np = netdev_priv(netdev);
2000 i40e_status ret = 0;
2001 struct i40e_pf *pf = np->vsi->back;
2002 struct i40e_hw *hw = &pf->hw;
2003 int blink_freq = 2;
2004 u16 temp_status;
2005
2006 switch (state) {
2007 case ETHTOOL_ID_ACTIVE:
2008 if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS)) {
2009 pf->led_status = i40e_led_get(hw);
2010 } else {
2011 i40e_aq_set_phy_debug(hw, I40E_PHY_DEBUG_ALL, NULL);
2012 ret = i40e_led_get_phy(hw, &temp_status,
2013 &pf->phy_led_val);
2014 pf->led_status = temp_status;
2015 }
2016 return blink_freq;
2017 case ETHTOOL_ID_ON:
2018 if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS))
2019 i40e_led_set(hw, 0xf, false);
2020 else
2021 ret = i40e_led_set_phy(hw, true, pf->led_status, 0);
2022 break;
2023 case ETHTOOL_ID_OFF:
2024 if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS))
2025 i40e_led_set(hw, 0x0, false);
2026 else
2027 ret = i40e_led_set_phy(hw, false, pf->led_status, 0);
2028 break;
2029 case ETHTOOL_ID_INACTIVE:
2030 if (!(pf->hw_features & I40E_HW_PHY_CONTROLS_LEDS)) {
2031 i40e_led_set(hw, pf->led_status, false);
2032 } else {
2033 ret = i40e_led_set_phy(hw, false, pf->led_status,
2034 (pf->phy_led_val |
2035 I40E_PHY_LED_MODE_ORIG));
2036 i40e_aq_set_phy_debug(hw, 0, NULL);
2037 }
2038 break;
2039 default:
2040 break;
2041 }
2042 if (ret)
2043 return -ENOENT;
2044 else
2045 return 0;
2046 }
2047
2048 /* NOTE: i40e hardware uses a conversion factor of 2 for Interrupt
2049 * Throttle Rate (ITR) ie. ITR(1) = 2us ITR(10) = 20 us, and also
2050 * 125us (8000 interrupts per second) == ITR(62)
2051 */
2052
2053 /**
2054 * __i40e_get_coalesce - get per-queue coalesce settings
2055 * @netdev: the netdev to check
2056 * @ec: ethtool coalesce data structure
2057 * @queue: which queue to pick
2058 *
2059 * Gets the per-queue settings for coalescence. Specifically Rx and Tx usecs
2060 * are per queue. If queue is <0 then we default to queue 0 as the
2061 * representative value.
2062 **/
2063 static int __i40e_get_coalesce(struct net_device *netdev,
2064 struct ethtool_coalesce *ec,
2065 int queue)
2066 {
2067 struct i40e_netdev_priv *np = netdev_priv(netdev);
2068 struct i40e_ring *rx_ring, *tx_ring;
2069 struct i40e_vsi *vsi = np->vsi;
2070
2071 ec->tx_max_coalesced_frames_irq = vsi->work_limit;
2072 ec->rx_max_coalesced_frames_irq = vsi->work_limit;
2073
2074 /* rx and tx usecs has per queue value. If user doesn't specify the queue,
2075 * return queue 0's value to represent.
2076 */
2077 if (queue < 0) {
2078 queue = 0;
2079 } else if (queue >= vsi->num_queue_pairs) {
2080 return -EINVAL;
2081 }
2082
2083 rx_ring = vsi->rx_rings[queue];
2084 tx_ring = vsi->tx_rings[queue];
2085
2086 if (ITR_IS_DYNAMIC(rx_ring->rx_itr_setting))
2087 ec->use_adaptive_rx_coalesce = 1;
2088
2089 if (ITR_IS_DYNAMIC(tx_ring->tx_itr_setting))
2090 ec->use_adaptive_tx_coalesce = 1;
2091
2092 ec->rx_coalesce_usecs = rx_ring->rx_itr_setting & ~I40E_ITR_DYNAMIC;
2093 ec->tx_coalesce_usecs = tx_ring->tx_itr_setting & ~I40E_ITR_DYNAMIC;
2094
2095
2096 /* we use the _usecs_high to store/set the interrupt rate limit
2097 * that the hardware supports, that almost but not quite
2098 * fits the original intent of the ethtool variable,
2099 * the rx_coalesce_usecs_high limits total interrupts
2100 * per second from both tx/rx sources.
2101 */
2102 ec->rx_coalesce_usecs_high = vsi->int_rate_limit;
2103 ec->tx_coalesce_usecs_high = vsi->int_rate_limit;
2104
2105 return 0;
2106 }
2107
2108 /**
2109 * i40e_get_coalesce - get a netdev's coalesce settings
2110 * @netdev: the netdev to check
2111 * @ec: ethtool coalesce data structure
2112 *
2113 * Gets the coalesce settings for a particular netdev. Note that if user has
2114 * modified per-queue settings, this only guarantees to represent queue 0. See
2115 * __i40e_get_coalesce for more details.
2116 **/
2117 static int i40e_get_coalesce(struct net_device *netdev,
2118 struct ethtool_coalesce *ec)
2119 {
2120 return __i40e_get_coalesce(netdev, ec, -1);
2121 }
2122
2123 /**
2124 * i40e_get_per_queue_coalesce - gets coalesce settings for particular queue
2125 * @netdev: netdev structure
2126 * @ec: ethtool's coalesce settings
2127 * @queue: the particular queue to read
2128 *
2129 * Will read a specific queue's coalesce settings
2130 **/
2131 static int i40e_get_per_queue_coalesce(struct net_device *netdev, u32 queue,
2132 struct ethtool_coalesce *ec)
2133 {
2134 return __i40e_get_coalesce(netdev, ec, queue);
2135 }
2136
2137 /**
2138 * i40e_set_itr_per_queue - set ITR values for specific queue
2139 * @vsi: the VSI to set values for
2140 * @ec: coalesce settings from ethtool
2141 * @queue: the queue to modify
2142 *
2143 * Change the ITR settings for a specific queue.
2144 **/
2145
2146 static void i40e_set_itr_per_queue(struct i40e_vsi *vsi,
2147 struct ethtool_coalesce *ec,
2148 int queue)
2149 {
2150 struct i40e_pf *pf = vsi->back;
2151 struct i40e_hw *hw = &pf->hw;
2152 struct i40e_q_vector *q_vector;
2153 u16 vector, intrl;
2154
2155 intrl = i40e_intrl_usec_to_reg(vsi->int_rate_limit);
2156
2157 vsi->rx_rings[queue]->rx_itr_setting = ec->rx_coalesce_usecs;
2158 vsi->tx_rings[queue]->tx_itr_setting = ec->tx_coalesce_usecs;
2159
2160 if (ec->use_adaptive_rx_coalesce)
2161 vsi->rx_rings[queue]->rx_itr_setting |= I40E_ITR_DYNAMIC;
2162 else
2163 vsi->rx_rings[queue]->rx_itr_setting &= ~I40E_ITR_DYNAMIC;
2164
2165 if (ec->use_adaptive_tx_coalesce)
2166 vsi->tx_rings[queue]->tx_itr_setting |= I40E_ITR_DYNAMIC;
2167 else
2168 vsi->tx_rings[queue]->tx_itr_setting &= ~I40E_ITR_DYNAMIC;
2169
2170 q_vector = vsi->rx_rings[queue]->q_vector;
2171 q_vector->rx.itr = ITR_TO_REG(vsi->rx_rings[queue]->rx_itr_setting);
2172 vector = vsi->base_vector + q_vector->v_idx;
2173 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1), q_vector->rx.itr);
2174
2175 q_vector = vsi->tx_rings[queue]->q_vector;
2176 q_vector->tx.itr = ITR_TO_REG(vsi->tx_rings[queue]->tx_itr_setting);
2177 vector = vsi->base_vector + q_vector->v_idx;
2178 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1), q_vector->tx.itr);
2179
2180 wr32(hw, I40E_PFINT_RATEN(vector - 1), intrl);
2181 i40e_flush(hw);
2182 }
2183
2184 /**
2185 * __i40e_set_coalesce - set coalesce settings for particular queue
2186 * @netdev: the netdev to change
2187 * @ec: ethtool coalesce settings
2188 * @queue: the queue to change
2189 *
2190 * Sets the coalesce settings for a particular queue.
2191 **/
2192 static int __i40e_set_coalesce(struct net_device *netdev,
2193 struct ethtool_coalesce *ec,
2194 int queue)
2195 {
2196 struct i40e_netdev_priv *np = netdev_priv(netdev);
2197 u16 intrl_reg, cur_rx_itr, cur_tx_itr;
2198 struct i40e_vsi *vsi = np->vsi;
2199 struct i40e_pf *pf = vsi->back;
2200 int i;
2201
2202 if (ec->tx_max_coalesced_frames_irq || ec->rx_max_coalesced_frames_irq)
2203 vsi->work_limit = ec->tx_max_coalesced_frames_irq;
2204
2205 if (queue < 0) {
2206 cur_rx_itr = vsi->rx_rings[0]->rx_itr_setting;
2207 cur_tx_itr = vsi->tx_rings[0]->tx_itr_setting;
2208 } else if (queue < vsi->num_queue_pairs) {
2209 cur_rx_itr = vsi->rx_rings[queue]->rx_itr_setting;
2210 cur_tx_itr = vsi->tx_rings[queue]->tx_itr_setting;
2211 } else {
2212 netif_info(pf, drv, netdev, "Invalid queue value, queue range is 0 - %d\n",
2213 vsi->num_queue_pairs - 1);
2214 return -EINVAL;
2215 }
2216
2217 cur_tx_itr &= ~I40E_ITR_DYNAMIC;
2218 cur_rx_itr &= ~I40E_ITR_DYNAMIC;
2219
2220 /* tx_coalesce_usecs_high is ignored, use rx-usecs-high instead */
2221 if (ec->tx_coalesce_usecs_high != vsi->int_rate_limit) {
2222 netif_info(pf, drv, netdev, "tx-usecs-high is not used, please program rx-usecs-high\n");
2223 return -EINVAL;
2224 }
2225
2226 if (ec->rx_coalesce_usecs_high > INTRL_REG_TO_USEC(I40E_MAX_INTRL)) {
2227 netif_info(pf, drv, netdev, "Invalid value, rx-usecs-high range is 0-%lu\n",
2228 INTRL_REG_TO_USEC(I40E_MAX_INTRL));
2229 return -EINVAL;
2230 }
2231
2232 if (ec->rx_coalesce_usecs != cur_rx_itr &&
2233 ec->use_adaptive_rx_coalesce) {
2234 netif_info(pf, drv, netdev, "RX interrupt moderation cannot be changed if adaptive-rx is enabled.\n");
2235 return -EINVAL;
2236 }
2237
2238 if (ec->rx_coalesce_usecs > (I40E_MAX_ITR << 1)) {
2239 netif_info(pf, drv, netdev, "Invalid value, rx-usecs range is 0-8160\n");
2240 return -EINVAL;
2241 }
2242
2243 if (ec->tx_coalesce_usecs != cur_tx_itr &&
2244 ec->use_adaptive_tx_coalesce) {
2245 netif_info(pf, drv, netdev, "TX interrupt moderation cannot be changed if adaptive-tx is enabled.\n");
2246 return -EINVAL;
2247 }
2248
2249 if (ec->tx_coalesce_usecs > (I40E_MAX_ITR << 1)) {
2250 netif_info(pf, drv, netdev, "Invalid value, tx-usecs range is 0-8160\n");
2251 return -EINVAL;
2252 }
2253
2254 if (ec->use_adaptive_rx_coalesce && !cur_rx_itr)
2255 ec->rx_coalesce_usecs = I40E_MIN_ITR << 1;
2256
2257 if (ec->use_adaptive_tx_coalesce && !cur_tx_itr)
2258 ec->tx_coalesce_usecs = I40E_MIN_ITR << 1;
2259
2260 intrl_reg = i40e_intrl_usec_to_reg(ec->rx_coalesce_usecs_high);
2261 vsi->int_rate_limit = INTRL_REG_TO_USEC(intrl_reg);
2262 if (vsi->int_rate_limit != ec->rx_coalesce_usecs_high) {
2263 netif_info(pf, drv, netdev, "Interrupt rate limit rounded down to %d\n",
2264 vsi->int_rate_limit);
2265 }
2266
2267 /* rx and tx usecs has per queue value. If user doesn't specify the queue,
2268 * apply to all queues.
2269 */
2270 if (queue < 0) {
2271 for (i = 0; i < vsi->num_queue_pairs; i++)
2272 i40e_set_itr_per_queue(vsi, ec, i);
2273 } else {
2274 i40e_set_itr_per_queue(vsi, ec, queue);
2275 }
2276
2277 return 0;
2278 }
2279
2280 /**
2281 * i40e_set_coalesce - set coalesce settings for every queue on the netdev
2282 * @netdev: the netdev to change
2283 * @ec: ethtool coalesce settings
2284 *
2285 * This will set each queue to the same coalesce settings.
2286 **/
2287 static int i40e_set_coalesce(struct net_device *netdev,
2288 struct ethtool_coalesce *ec)
2289 {
2290 return __i40e_set_coalesce(netdev, ec, -1);
2291 }
2292
2293 /**
2294 * i40e_set_per_queue_coalesce - set specific queue's coalesce settings
2295 * @netdev: the netdev to change
2296 * @ec: ethtool's coalesce settings
2297 * @queue: the queue to change
2298 *
2299 * Sets the specified queue's coalesce settings.
2300 **/
2301 static int i40e_set_per_queue_coalesce(struct net_device *netdev, u32 queue,
2302 struct ethtool_coalesce *ec)
2303 {
2304 return __i40e_set_coalesce(netdev, ec, queue);
2305 }
2306
2307 /**
2308 * i40e_get_rss_hash_opts - Get RSS hash Input Set for each flow type
2309 * @pf: pointer to the physical function struct
2310 * @cmd: ethtool rxnfc command
2311 *
2312 * Returns Success if the flow is supported, else Invalid Input.
2313 **/
2314 static int i40e_get_rss_hash_opts(struct i40e_pf *pf, struct ethtool_rxnfc *cmd)
2315 {
2316 struct i40e_hw *hw = &pf->hw;
2317 u8 flow_pctype = 0;
2318 u64 i_set = 0;
2319
2320 cmd->data = 0;
2321
2322 switch (cmd->flow_type) {
2323 case TCP_V4_FLOW:
2324 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_TCP;
2325 break;
2326 case UDP_V4_FLOW:
2327 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_UDP;
2328 break;
2329 case TCP_V6_FLOW:
2330 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_TCP;
2331 break;
2332 case UDP_V6_FLOW:
2333 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_UDP;
2334 break;
2335 case SCTP_V4_FLOW:
2336 case AH_ESP_V4_FLOW:
2337 case AH_V4_FLOW:
2338 case ESP_V4_FLOW:
2339 case IPV4_FLOW:
2340 case SCTP_V6_FLOW:
2341 case AH_ESP_V6_FLOW:
2342 case AH_V6_FLOW:
2343 case ESP_V6_FLOW:
2344 case IPV6_FLOW:
2345 /* Default is src/dest for IP, no matter the L4 hashing */
2346 cmd->data |= RXH_IP_SRC | RXH_IP_DST;
2347 break;
2348 default:
2349 return -EINVAL;
2350 }
2351
2352 /* Read flow based hash input set register */
2353 if (flow_pctype) {
2354 i_set = (u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(0,
2355 flow_pctype)) |
2356 ((u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(1,
2357 flow_pctype)) << 32);
2358 }
2359
2360 /* Process bits of hash input set */
2361 if (i_set) {
2362 if (i_set & I40E_L4_SRC_MASK)
2363 cmd->data |= RXH_L4_B_0_1;
2364 if (i_set & I40E_L4_DST_MASK)
2365 cmd->data |= RXH_L4_B_2_3;
2366
2367 if (cmd->flow_type == TCP_V4_FLOW ||
2368 cmd->flow_type == UDP_V4_FLOW) {
2369 if (i_set & I40E_L3_SRC_MASK)
2370 cmd->data |= RXH_IP_SRC;
2371 if (i_set & I40E_L3_DST_MASK)
2372 cmd->data |= RXH_IP_DST;
2373 } else if (cmd->flow_type == TCP_V6_FLOW ||
2374 cmd->flow_type == UDP_V6_FLOW) {
2375 if (i_set & I40E_L3_V6_SRC_MASK)
2376 cmd->data |= RXH_IP_SRC;
2377 if (i_set & I40E_L3_V6_DST_MASK)
2378 cmd->data |= RXH_IP_DST;
2379 }
2380 }
2381
2382 return 0;
2383 }
2384
2385 /**
2386 * i40e_check_mask - Check whether a mask field is set
2387 * @mask: the full mask value
2388 * @field; mask of the field to check
2389 *
2390 * If the given mask is fully set, return positive value. If the mask for the
2391 * field is fully unset, return zero. Otherwise return a negative error code.
2392 **/
2393 static int i40e_check_mask(u64 mask, u64 field)
2394 {
2395 u64 value = mask & field;
2396
2397 if (value == field)
2398 return 1;
2399 else if (!value)
2400 return 0;
2401 else
2402 return -1;
2403 }
2404
2405 /**
2406 * i40e_parse_rx_flow_user_data - Deconstruct user-defined data
2407 * @fsp: pointer to rx flow specification
2408 * @data: pointer to userdef data structure for storage
2409 *
2410 * Read the user-defined data and deconstruct the value into a structure. No
2411 * other code should read the user-defined data, so as to ensure that every
2412 * place consistently reads the value correctly.
2413 *
2414 * The user-defined field is a 64bit Big Endian format value, which we
2415 * deconstruct by reading bits or bit fields from it. Single bit flags shall
2416 * be defined starting from the highest bits, while small bit field values
2417 * shall be defined starting from the lowest bits.
2418 *
2419 * Returns 0 if the data is valid, and non-zero if the userdef data is invalid
2420 * and the filter should be rejected. The data structure will always be
2421 * modified even if FLOW_EXT is not set.
2422 *
2423 **/
2424 static int i40e_parse_rx_flow_user_data(struct ethtool_rx_flow_spec *fsp,
2425 struct i40e_rx_flow_userdef *data)
2426 {
2427 u64 value, mask;
2428 int valid;
2429
2430 /* Zero memory first so it's always consistent. */
2431 memset(data, 0, sizeof(*data));
2432
2433 if (!(fsp->flow_type & FLOW_EXT))
2434 return 0;
2435
2436 value = be64_to_cpu(*((__be64 *)fsp->h_ext.data));
2437 mask = be64_to_cpu(*((__be64 *)fsp->m_ext.data));
2438
2439 #define I40E_USERDEF_FLEX_WORD GENMASK_ULL(15, 0)
2440 #define I40E_USERDEF_FLEX_OFFSET GENMASK_ULL(31, 16)
2441 #define I40E_USERDEF_FLEX_FILTER GENMASK_ULL(31, 0)
2442
2443 valid = i40e_check_mask(mask, I40E_USERDEF_FLEX_FILTER);
2444 if (valid < 0) {
2445 return -EINVAL;
2446 } else if (valid) {
2447 data->flex_word = value & I40E_USERDEF_FLEX_WORD;
2448 data->flex_offset =
2449 (value & I40E_USERDEF_FLEX_OFFSET) >> 16;
2450 data->flex_filter = true;
2451 }
2452
2453 return 0;
2454 }
2455
2456 /**
2457 * i40e_fill_rx_flow_user_data - Fill in user-defined data field
2458 * @fsp: pointer to rx_flow specification
2459 *
2460 * Reads the userdef data structure and properly fills in the user defined
2461 * fields of the rx_flow_spec.
2462 **/
2463 static void i40e_fill_rx_flow_user_data(struct ethtool_rx_flow_spec *fsp,
2464 struct i40e_rx_flow_userdef *data)
2465 {
2466 u64 value = 0, mask = 0;
2467
2468 if (data->flex_filter) {
2469 value |= data->flex_word;
2470 value |= (u64)data->flex_offset << 16;
2471 mask |= I40E_USERDEF_FLEX_FILTER;
2472 }
2473
2474 if (value || mask)
2475 fsp->flow_type |= FLOW_EXT;
2476
2477 *((__be64 *)fsp->h_ext.data) = cpu_to_be64(value);
2478 *((__be64 *)fsp->m_ext.data) = cpu_to_be64(mask);
2479 }
2480
2481 /**
2482 * i40e_get_ethtool_fdir_all - Populates the rule count of a command
2483 * @pf: Pointer to the physical function struct
2484 * @cmd: The command to get or set Rx flow classification rules
2485 * @rule_locs: Array of used rule locations
2486 *
2487 * This function populates both the total and actual rule count of
2488 * the ethtool flow classification command
2489 *
2490 * Returns 0 on success or -EMSGSIZE if entry not found
2491 **/
2492 static int i40e_get_ethtool_fdir_all(struct i40e_pf *pf,
2493 struct ethtool_rxnfc *cmd,
2494 u32 *rule_locs)
2495 {
2496 struct i40e_fdir_filter *rule;
2497 struct hlist_node *node2;
2498 int cnt = 0;
2499
2500 /* report total rule count */
2501 cmd->data = i40e_get_fd_cnt_all(pf);
2502
2503 hlist_for_each_entry_safe(rule, node2,
2504 &pf->fdir_filter_list, fdir_node) {
2505 if (cnt == cmd->rule_cnt)
2506 return -EMSGSIZE;
2507
2508 rule_locs[cnt] = rule->fd_id;
2509 cnt++;
2510 }
2511
2512 cmd->rule_cnt = cnt;
2513
2514 return 0;
2515 }
2516
2517 /**
2518 * i40e_get_ethtool_fdir_entry - Look up a filter based on Rx flow
2519 * @pf: Pointer to the physical function struct
2520 * @cmd: The command to get or set Rx flow classification rules
2521 *
2522 * This function looks up a filter based on the Rx flow classification
2523 * command and fills the flow spec info for it if found
2524 *
2525 * Returns 0 on success or -EINVAL if filter not found
2526 **/
2527 static int i40e_get_ethtool_fdir_entry(struct i40e_pf *pf,
2528 struct ethtool_rxnfc *cmd)
2529 {
2530 struct ethtool_rx_flow_spec *fsp =
2531 (struct ethtool_rx_flow_spec *)&cmd->fs;
2532 struct i40e_rx_flow_userdef userdef = {0};
2533 struct i40e_fdir_filter *rule = NULL;
2534 struct hlist_node *node2;
2535 u64 input_set;
2536 u16 index;
2537
2538 hlist_for_each_entry_safe(rule, node2,
2539 &pf->fdir_filter_list, fdir_node) {
2540 if (fsp->location <= rule->fd_id)
2541 break;
2542 }
2543
2544 if (!rule || fsp->location != rule->fd_id)
2545 return -EINVAL;
2546
2547 fsp->flow_type = rule->flow_type;
2548 if (fsp->flow_type == IP_USER_FLOW) {
2549 fsp->h_u.usr_ip4_spec.ip_ver = ETH_RX_NFC_IP4;
2550 fsp->h_u.usr_ip4_spec.proto = 0;
2551 fsp->m_u.usr_ip4_spec.proto = 0;
2552 }
2553
2554 /* Reverse the src and dest notion, since the HW views them from
2555 * Tx perspective where as the user expects it from Rx filter view.
2556 */
2557 fsp->h_u.tcp_ip4_spec.psrc = rule->dst_port;
2558 fsp->h_u.tcp_ip4_spec.pdst = rule->src_port;
2559 fsp->h_u.tcp_ip4_spec.ip4src = rule->dst_ip;
2560 fsp->h_u.tcp_ip4_spec.ip4dst = rule->src_ip;
2561
2562 switch (rule->flow_type) {
2563 case SCTP_V4_FLOW:
2564 index = I40E_FILTER_PCTYPE_NONF_IPV4_SCTP;
2565 break;
2566 case TCP_V4_FLOW:
2567 index = I40E_FILTER_PCTYPE_NONF_IPV4_TCP;
2568 break;
2569 case UDP_V4_FLOW:
2570 index = I40E_FILTER_PCTYPE_NONF_IPV4_UDP;
2571 break;
2572 case IP_USER_FLOW:
2573 index = I40E_FILTER_PCTYPE_NONF_IPV4_OTHER;
2574 break;
2575 default:
2576 /* If we have stored a filter with a flow type not listed here
2577 * it is almost certainly a driver bug. WARN(), and then
2578 * assign the input_set as if all fields are enabled to avoid
2579 * reading unassigned memory.
2580 */
2581 WARN(1, "Missing input set index for flow_type %d\n",
2582 rule->flow_type);
2583 input_set = 0xFFFFFFFFFFFFFFFFULL;
2584 goto no_input_set;
2585 }
2586
2587 input_set = i40e_read_fd_input_set(pf, index);
2588
2589 no_input_set:
2590 if (input_set & I40E_L3_SRC_MASK)
2591 fsp->m_u.tcp_ip4_spec.ip4src = htonl(0xFFFF);
2592
2593 if (input_set & I40E_L3_DST_MASK)
2594 fsp->m_u.tcp_ip4_spec.ip4dst = htonl(0xFFFF);
2595
2596 if (input_set & I40E_L4_SRC_MASK)
2597 fsp->m_u.tcp_ip4_spec.psrc = htons(0xFFFFFFFF);
2598
2599 if (input_set & I40E_L4_DST_MASK)
2600 fsp->m_u.tcp_ip4_spec.pdst = htons(0xFFFFFFFF);
2601
2602 if (rule->dest_ctl == I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET)
2603 fsp->ring_cookie = RX_CLS_FLOW_DISC;
2604 else
2605 fsp->ring_cookie = rule->q_index;
2606
2607 if (rule->dest_vsi != pf->vsi[pf->lan_vsi]->id) {
2608 struct i40e_vsi *vsi;
2609
2610 vsi = i40e_find_vsi_from_id(pf, rule->dest_vsi);
2611 if (vsi && vsi->type == I40E_VSI_SRIOV) {
2612 /* VFs are zero-indexed by the driver, but ethtool
2613 * expects them to be one-indexed, so add one here
2614 */
2615 u64 ring_vf = vsi->vf_id + 1;
2616
2617 ring_vf <<= ETHTOOL_RX_FLOW_SPEC_RING_VF_OFF;
2618 fsp->ring_cookie |= ring_vf;
2619 }
2620 }
2621
2622 if (rule->flex_filter) {
2623 userdef.flex_filter = true;
2624 userdef.flex_word = be16_to_cpu(rule->flex_word);
2625 userdef.flex_offset = rule->flex_offset;
2626 }
2627
2628 i40e_fill_rx_flow_user_data(fsp, &userdef);
2629
2630 return 0;
2631 }
2632
2633 /**
2634 * i40e_get_rxnfc - command to get RX flow classification rules
2635 * @netdev: network interface device structure
2636 * @cmd: ethtool rxnfc command
2637 *
2638 * Returns Success if the command is supported.
2639 **/
2640 static int i40e_get_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd,
2641 u32 *rule_locs)
2642 {
2643 struct i40e_netdev_priv *np = netdev_priv(netdev);
2644 struct i40e_vsi *vsi = np->vsi;
2645 struct i40e_pf *pf = vsi->back;
2646 int ret = -EOPNOTSUPP;
2647
2648 switch (cmd->cmd) {
2649 case ETHTOOL_GRXRINGS:
2650 cmd->data = vsi->num_queue_pairs;
2651 ret = 0;
2652 break;
2653 case ETHTOOL_GRXFH:
2654 ret = i40e_get_rss_hash_opts(pf, cmd);
2655 break;
2656 case ETHTOOL_GRXCLSRLCNT:
2657 cmd->rule_cnt = pf->fdir_pf_active_filters;
2658 /* report total rule count */
2659 cmd->data = i40e_get_fd_cnt_all(pf);
2660 ret = 0;
2661 break;
2662 case ETHTOOL_GRXCLSRULE:
2663 ret = i40e_get_ethtool_fdir_entry(pf, cmd);
2664 break;
2665 case ETHTOOL_GRXCLSRLALL:
2666 ret = i40e_get_ethtool_fdir_all(pf, cmd, rule_locs);
2667 break;
2668 default:
2669 break;
2670 }
2671
2672 return ret;
2673 }
2674
2675 /**
2676 * i40e_get_rss_hash_bits - Read RSS Hash bits from register
2677 * @nfc: pointer to user request
2678 * @i_setc bits currently set
2679 *
2680 * Returns value of bits to be set per user request
2681 **/
2682 static u64 i40e_get_rss_hash_bits(struct ethtool_rxnfc *nfc, u64 i_setc)
2683 {
2684 u64 i_set = i_setc;
2685 u64 src_l3 = 0, dst_l3 = 0;
2686
2687 if (nfc->data & RXH_L4_B_0_1)
2688 i_set |= I40E_L4_SRC_MASK;
2689 else
2690 i_set &= ~I40E_L4_SRC_MASK;
2691 if (nfc->data & RXH_L4_B_2_3)
2692 i_set |= I40E_L4_DST_MASK;
2693 else
2694 i_set &= ~I40E_L4_DST_MASK;
2695
2696 if (nfc->flow_type == TCP_V6_FLOW || nfc->flow_type == UDP_V6_FLOW) {
2697 src_l3 = I40E_L3_V6_SRC_MASK;
2698 dst_l3 = I40E_L3_V6_DST_MASK;
2699 } else if (nfc->flow_type == TCP_V4_FLOW ||
2700 nfc->flow_type == UDP_V4_FLOW) {
2701 src_l3 = I40E_L3_SRC_MASK;
2702 dst_l3 = I40E_L3_DST_MASK;
2703 } else {
2704 /* Any other flow type are not supported here */
2705 return i_set;
2706 }
2707
2708 if (nfc->data & RXH_IP_SRC)
2709 i_set |= src_l3;
2710 else
2711 i_set &= ~src_l3;
2712 if (nfc->data & RXH_IP_DST)
2713 i_set |= dst_l3;
2714 else
2715 i_set &= ~dst_l3;
2716
2717 return i_set;
2718 }
2719
2720 /**
2721 * i40e_set_rss_hash_opt - Enable/Disable flow types for RSS hash
2722 * @pf: pointer to the physical function struct
2723 * @cmd: ethtool rxnfc command
2724 *
2725 * Returns Success if the flow input set is supported.
2726 **/
2727 static int i40e_set_rss_hash_opt(struct i40e_pf *pf, struct ethtool_rxnfc *nfc)
2728 {
2729 struct i40e_hw *hw = &pf->hw;
2730 u64 hena = (u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(0)) |
2731 ((u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(1)) << 32);
2732 u8 flow_pctype = 0;
2733 u64 i_set, i_setc;
2734
2735 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
2736 dev_err(&pf->pdev->dev,
2737 "Change of RSS hash input set is not supported when MFP mode is enabled\n");
2738 return -EOPNOTSUPP;
2739 }
2740
2741 /* RSS does not support anything other than hashing
2742 * to queues on src and dst IPs and ports
2743 */
2744 if (nfc->data & ~(RXH_IP_SRC | RXH_IP_DST |
2745 RXH_L4_B_0_1 | RXH_L4_B_2_3))
2746 return -EINVAL;
2747
2748 switch (nfc->flow_type) {
2749 case TCP_V4_FLOW:
2750 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_TCP;
2751 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE)
2752 hena |=
2753 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK);
2754 break;
2755 case TCP_V6_FLOW:
2756 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_TCP;
2757 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE)
2758 hena |=
2759 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK);
2760 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE)
2761 hena |=
2762 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_TCP_SYN_NO_ACK);
2763 break;
2764 case UDP_V4_FLOW:
2765 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_UDP;
2766 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE)
2767 hena |=
2768 BIT_ULL(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP) |
2769 BIT_ULL(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV4_UDP);
2770
2771 hena |= BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4);
2772 break;
2773 case UDP_V6_FLOW:
2774 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_UDP;
2775 if (pf->hw_features & I40E_HW_MULTIPLE_TCP_UDP_RSS_PCTYPE)
2776 hena |=
2777 BIT_ULL(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP) |
2778 BIT_ULL(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP);
2779
2780 hena |= BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6);
2781 break;
2782 case AH_ESP_V4_FLOW:
2783 case AH_V4_FLOW:
2784 case ESP_V4_FLOW:
2785 case SCTP_V4_FLOW:
2786 if ((nfc->data & RXH_L4_B_0_1) ||
2787 (nfc->data & RXH_L4_B_2_3))
2788 return -EINVAL;
2789 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_OTHER);
2790 break;
2791 case AH_ESP_V6_FLOW:
2792 case AH_V6_FLOW:
2793 case ESP_V6_FLOW:
2794 case SCTP_V6_FLOW:
2795 if ((nfc->data & RXH_L4_B_0_1) ||
2796 (nfc->data & RXH_L4_B_2_3))
2797 return -EINVAL;
2798 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_OTHER);
2799 break;
2800 case IPV4_FLOW:
2801 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_OTHER) |
2802 BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4);
2803 break;
2804 case IPV6_FLOW:
2805 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_OTHER) |
2806 BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6);
2807 break;
2808 default:
2809 return -EINVAL;
2810 }
2811
2812 if (flow_pctype) {
2813 i_setc = (u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(0,
2814 flow_pctype)) |
2815 ((u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(1,
2816 flow_pctype)) << 32);
2817 i_set = i40e_get_rss_hash_bits(nfc, i_setc);
2818 i40e_write_rx_ctl(hw, I40E_GLQF_HASH_INSET(0, flow_pctype),
2819 (u32)i_set);
2820 i40e_write_rx_ctl(hw, I40E_GLQF_HASH_INSET(1, flow_pctype),
2821 (u32)(i_set >> 32));
2822 hena |= BIT_ULL(flow_pctype);
2823 }
2824
2825 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), (u32)hena);
2826 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));
2827 i40e_flush(hw);
2828
2829 return 0;
2830 }
2831
2832 /**
2833 * i40e_update_ethtool_fdir_entry - Updates the fdir filter entry
2834 * @vsi: Pointer to the targeted VSI
2835 * @input: The filter to update or NULL to indicate deletion
2836 * @sw_idx: Software index to the filter
2837 * @cmd: The command to get or set Rx flow classification rules
2838 *
2839 * This function updates (or deletes) a Flow Director entry from
2840 * the hlist of the corresponding PF
2841 *
2842 * Returns 0 on success
2843 **/
2844 static int i40e_update_ethtool_fdir_entry(struct i40e_vsi *vsi,
2845 struct i40e_fdir_filter *input,
2846 u16 sw_idx,
2847 struct ethtool_rxnfc *cmd)
2848 {
2849 struct i40e_fdir_filter *rule, *parent;
2850 struct i40e_pf *pf = vsi->back;
2851 struct hlist_node *node2;
2852 int err = -EINVAL;
2853
2854 parent = NULL;
2855 rule = NULL;
2856
2857 hlist_for_each_entry_safe(rule, node2,
2858 &pf->fdir_filter_list, fdir_node) {
2859 /* hash found, or no matching entry */
2860 if (rule->fd_id >= sw_idx)
2861 break;
2862 parent = rule;
2863 }
2864
2865 /* if there is an old rule occupying our place remove it */
2866 if (rule && (rule->fd_id == sw_idx)) {
2867 /* Remove this rule, since we're either deleting it, or
2868 * replacing it.
2869 */
2870 err = i40e_add_del_fdir(vsi, rule, false);
2871 hlist_del(&rule->fdir_node);
2872 kfree(rule);
2873 pf->fdir_pf_active_filters--;
2874 }
2875
2876 /* If we weren't given an input, this is a delete, so just return the
2877 * error code indicating if there was an entry at the requested slot
2878 */
2879 if (!input)
2880 return err;
2881
2882 /* Otherwise, install the new rule as requested */
2883 INIT_HLIST_NODE(&input->fdir_node);
2884
2885 /* add filter to the list */
2886 if (parent)
2887 hlist_add_behind(&input->fdir_node, &parent->fdir_node);
2888 else
2889 hlist_add_head(&input->fdir_node,
2890 &pf->fdir_filter_list);
2891
2892 /* update counts */
2893 pf->fdir_pf_active_filters++;
2894
2895 return 0;
2896 }
2897
2898 /**
2899 * i40e_prune_flex_pit_list - Cleanup unused entries in FLX_PIT table
2900 * @pf: pointer to PF structure
2901 *
2902 * This function searches the list of filters and determines which FLX_PIT
2903 * entries are still required. It will prune any entries which are no longer
2904 * in use after the deletion.
2905 **/
2906 static void i40e_prune_flex_pit_list(struct i40e_pf *pf)
2907 {
2908 struct i40e_flex_pit *entry, *tmp;
2909 struct i40e_fdir_filter *rule;
2910
2911 /* First, we'll check the l3 table */
2912 list_for_each_entry_safe(entry, tmp, &pf->l3_flex_pit_list, list) {
2913 bool found = false;
2914
2915 hlist_for_each_entry(rule, &pf->fdir_filter_list, fdir_node) {
2916 if (rule->flow_type != IP_USER_FLOW)
2917 continue;
2918 if (rule->flex_filter &&
2919 rule->flex_offset == entry->src_offset) {
2920 found = true;
2921 break;
2922 }
2923 }
2924
2925 /* If we didn't find the filter, then we can prune this entry
2926 * from the list.
2927 */
2928 if (!found) {
2929 list_del(&entry->list);
2930 kfree(entry);
2931 }
2932 }
2933
2934 /* Followed by the L4 table */
2935 list_for_each_entry_safe(entry, tmp, &pf->l4_flex_pit_list, list) {
2936 bool found = false;
2937
2938 hlist_for_each_entry(rule, &pf->fdir_filter_list, fdir_node) {
2939 /* Skip this filter if it's L3, since we already
2940 * checked those in the above loop
2941 */
2942 if (rule->flow_type == IP_USER_FLOW)
2943 continue;
2944 if (rule->flex_filter &&
2945 rule->flex_offset == entry->src_offset) {
2946 found = true;
2947 break;
2948 }
2949 }
2950
2951 /* If we didn't find the filter, then we can prune this entry
2952 * from the list.
2953 */
2954 if (!found) {
2955 list_del(&entry->list);
2956 kfree(entry);
2957 }
2958 }
2959 }
2960
2961 /**
2962 * i40e_del_fdir_entry - Deletes a Flow Director filter entry
2963 * @vsi: Pointer to the targeted VSI
2964 * @cmd: The command to get or set Rx flow classification rules
2965 *
2966 * The function removes a Flow Director filter entry from the
2967 * hlist of the corresponding PF
2968 *
2969 * Returns 0 on success
2970 */
2971 static int i40e_del_fdir_entry(struct i40e_vsi *vsi,
2972 struct ethtool_rxnfc *cmd)
2973 {
2974 struct ethtool_rx_flow_spec *fsp =
2975 (struct ethtool_rx_flow_spec *)&cmd->fs;
2976 struct i40e_pf *pf = vsi->back;
2977 int ret = 0;
2978
2979 if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) ||
2980 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state))
2981 return -EBUSY;
2982
2983 if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state))
2984 return -EBUSY;
2985
2986 ret = i40e_update_ethtool_fdir_entry(vsi, NULL, fsp->location, cmd);
2987
2988 i40e_prune_flex_pit_list(pf);
2989
2990 i40e_fdir_check_and_reenable(pf);
2991 return ret;
2992 }
2993
2994 /**
2995 * i40e_unused_pit_index - Find an unused PIT index for given list
2996 * @pf: the PF data structure
2997 *
2998 * Find the first unused flexible PIT index entry. We search both the L3 and
2999 * L4 flexible PIT lists so that the returned index is unique and unused by
3000 * either currently programmed L3 or L4 filters. We use a bit field as storage
3001 * to track which indexes are already used.
3002 **/
3003 static u8 i40e_unused_pit_index(struct i40e_pf *pf)
3004 {
3005 unsigned long available_index = 0xFF;
3006 struct i40e_flex_pit *entry;
3007
3008 /* We need to make sure that the new index isn't in use by either L3
3009 * or L4 filters so that IP_USER_FLOW filters can program both L3 and
3010 * L4 to use the same index.
3011 */
3012
3013 list_for_each_entry(entry, &pf->l4_flex_pit_list, list)
3014 clear_bit(entry->pit_index, &available_index);
3015
3016 list_for_each_entry(entry, &pf->l3_flex_pit_list, list)
3017 clear_bit(entry->pit_index, &available_index);
3018
3019 return find_first_bit(&available_index, 8);
3020 }
3021
3022 /**
3023 * i40e_find_flex_offset - Find an existing flex src_offset
3024 * @flex_pit_list: L3 or L4 flex PIT list
3025 * @src_offset: new src_offset to find
3026 *
3027 * Searches the flex_pit_list for an existing offset. If no offset is
3028 * currently programmed, then this will return an ERR_PTR if there is no space
3029 * to add a new offset, otherwise it returns NULL.
3030 **/
3031 static
3032 struct i40e_flex_pit *i40e_find_flex_offset(struct list_head *flex_pit_list,
3033 u16 src_offset)
3034 {
3035 struct i40e_flex_pit *entry;
3036 int size = 0;
3037
3038 /* Search for the src_offset first. If we find a matching entry
3039 * already programmed, we can simply re-use it.
3040 */
3041 list_for_each_entry(entry, flex_pit_list, list) {
3042 size++;
3043 if (entry->src_offset == src_offset)
3044 return entry;
3045 }
3046
3047 /* If we haven't found an entry yet, then the provided src offset has
3048 * not yet been programmed. We will program the src offset later on,
3049 * but we need to indicate whether there is enough space to do so
3050 * here. We'll make use of ERR_PTR for this purpose.
3051 */
3052 if (size >= I40E_FLEX_PIT_TABLE_SIZE)
3053 return ERR_PTR(-ENOSPC);
3054
3055 return NULL;
3056 }
3057
3058 /**
3059 * i40e_add_flex_offset - Add src_offset to flex PIT table list
3060 * @flex_pit_list: L3 or L4 flex PIT list
3061 * @src_offset: new src_offset to add
3062 * @pit_index: the PIT index to program
3063 *
3064 * This function programs the new src_offset to the list. It is expected that
3065 * i40e_find_flex_offset has already been tried and returned NULL, indicating
3066 * that this offset is not programmed, and that the list has enough space to
3067 * store another offset.
3068 *
3069 * Returns 0 on success, and negative value on error.
3070 **/
3071 static int i40e_add_flex_offset(struct list_head *flex_pit_list,
3072 u16 src_offset,
3073 u8 pit_index)
3074 {
3075 struct i40e_flex_pit *new_pit, *entry;
3076
3077 new_pit = kzalloc(sizeof(*entry), GFP_KERNEL);
3078 if (!new_pit)
3079 return -ENOMEM;
3080
3081 new_pit->src_offset = src_offset;
3082 new_pit->pit_index = pit_index;
3083
3084 /* We need to insert this item such that the list is sorted by
3085 * src_offset in ascending order.
3086 */
3087 list_for_each_entry(entry, flex_pit_list, list) {
3088 if (new_pit->src_offset < entry->src_offset) {
3089 list_add_tail(&new_pit->list, &entry->list);
3090 return 0;
3091 }
3092
3093 /* If we found an entry with our offset already programmed we
3094 * can simply return here, after freeing the memory. However,
3095 * if the pit_index does not match we need to report an error.
3096 */
3097 if (new_pit->src_offset == entry->src_offset) {
3098 int err = 0;
3099
3100 /* If the PIT index is not the same we can't re-use
3101 * the entry, so we must report an error.
3102 */
3103 if (new_pit->pit_index != entry->pit_index)
3104 err = -EINVAL;
3105
3106 kfree(new_pit);
3107 return err;
3108 }
3109 }
3110
3111 /* If we reached here, then we haven't yet added the item. This means
3112 * that we should add the item at the end of the list.
3113 */
3114 list_add_tail(&new_pit->list, flex_pit_list);
3115 return 0;
3116 }
3117
3118 /**
3119 * __i40e_reprogram_flex_pit - Re-program specific FLX_PIT table
3120 * @pf: Pointer to the PF structure
3121 * @flex_pit_list: list of flexible src offsets in use
3122 * #flex_pit_start: index to first entry for this section of the table
3123 *
3124 * In order to handle flexible data, the hardware uses a table of values
3125 * called the FLX_PIT table. This table is used to indicate which sections of
3126 * the input correspond to what PIT index values. Unfortunately, hardware is
3127 * very restrictive about programming this table. Entries must be ordered by
3128 * src_offset in ascending order, without duplicates. Additionally, unused
3129 * entries must be set to the unused index value, and must have valid size and
3130 * length according to the src_offset ordering.
3131 *
3132 * This function will reprogram the FLX_PIT register from a book-keeping
3133 * structure that we guarantee is already ordered correctly, and has no more
3134 * than 3 entries.
3135 *
3136 * To make things easier, we only support flexible values of one word length,
3137 * rather than allowing variable length flexible values.
3138 **/
3139 static void __i40e_reprogram_flex_pit(struct i40e_pf *pf,
3140 struct list_head *flex_pit_list,
3141 int flex_pit_start)
3142 {
3143 struct i40e_flex_pit *entry = NULL;
3144 u16 last_offset = 0;
3145 int i = 0, j = 0;
3146
3147 /* First, loop over the list of flex PIT entries, and reprogram the
3148 * registers.
3149 */
3150 list_for_each_entry(entry, flex_pit_list, list) {
3151 /* We have to be careful when programming values for the
3152 * largest SRC_OFFSET value. It is possible that adding
3153 * additional empty values at the end would overflow the space
3154 * for the SRC_OFFSET in the FLX_PIT register. To avoid this,
3155 * we check here and add the empty values prior to adding the
3156 * largest value.
3157 *
3158 * To determine this, we will use a loop from i+1 to 3, which
3159 * will determine whether the unused entries would have valid
3160 * SRC_OFFSET. Note that there cannot be extra entries past
3161 * this value, because the only valid values would have been
3162 * larger than I40E_MAX_FLEX_SRC_OFFSET, and thus would not
3163 * have been added to the list in the first place.
3164 */
3165 for (j = i + 1; j < 3; j++) {
3166 u16 offset = entry->src_offset + j;
3167 int index = flex_pit_start + i;
3168 u32 value = I40E_FLEX_PREP_VAL(I40E_FLEX_DEST_UNUSED,
3169 1,
3170 offset - 3);
3171
3172 if (offset > I40E_MAX_FLEX_SRC_OFFSET) {
3173 i40e_write_rx_ctl(&pf->hw,
3174 I40E_PRTQF_FLX_PIT(index),
3175 value);
3176 i++;
3177 }
3178 }
3179
3180 /* Now, we can program the actual value into the table */
3181 i40e_write_rx_ctl(&pf->hw,
3182 I40E_PRTQF_FLX_PIT(flex_pit_start + i),
3183 I40E_FLEX_PREP_VAL(entry->pit_index + 50,
3184 1,
3185 entry->src_offset));
3186 i++;
3187 }
3188
3189 /* In order to program the last entries in the table, we need to
3190 * determine the valid offset. If the list is empty, we'll just start
3191 * with 0. Otherwise, we'll start with the last item offset and add 1.
3192 * This ensures that all entries have valid sizes. If we don't do this
3193 * correctly, the hardware will disable flexible field parsing.
3194 */
3195 if (!list_empty(flex_pit_list))
3196 last_offset = list_prev_entry(entry, list)->src_offset + 1;
3197
3198 for (; i < 3; i++, last_offset++) {
3199 i40e_write_rx_ctl(&pf->hw,
3200 I40E_PRTQF_FLX_PIT(flex_pit_start + i),
3201 I40E_FLEX_PREP_VAL(I40E_FLEX_DEST_UNUSED,
3202 1,
3203 last_offset));
3204 }
3205 }
3206
3207 /**
3208 * i40e_reprogram_flex_pit - Reprogram all FLX_PIT tables after input set change
3209 * @pf: pointer to the PF structure
3210 *
3211 * This function reprograms both the L3 and L4 FLX_PIT tables. See the
3212 * internal helper function for implementation details.
3213 **/
3214 static void i40e_reprogram_flex_pit(struct i40e_pf *pf)
3215 {
3216 __i40e_reprogram_flex_pit(pf, &pf->l3_flex_pit_list,
3217 I40E_FLEX_PIT_IDX_START_L3);
3218
3219 __i40e_reprogram_flex_pit(pf, &pf->l4_flex_pit_list,
3220 I40E_FLEX_PIT_IDX_START_L4);
3221
3222 /* We also need to program the L3 and L4 GLQF ORT register */
3223 i40e_write_rx_ctl(&pf->hw,
3224 I40E_GLQF_ORT(I40E_L3_GLQF_ORT_IDX),
3225 I40E_ORT_PREP_VAL(I40E_FLEX_PIT_IDX_START_L3,
3226 3, 1));
3227
3228 i40e_write_rx_ctl(&pf->hw,
3229 I40E_GLQF_ORT(I40E_L4_GLQF_ORT_IDX),
3230 I40E_ORT_PREP_VAL(I40E_FLEX_PIT_IDX_START_L4,
3231 3, 1));
3232 }
3233
3234 /**
3235 * i40e_flow_str - Converts a flow_type into a human readable string
3236 * @flow_type: the flow type from a flow specification
3237 *
3238 * Currently only flow types we support are included here, and the string
3239 * value attempts to match what ethtool would use to configure this flow type.
3240 **/
3241 static const char *i40e_flow_str(struct ethtool_rx_flow_spec *fsp)
3242 {
3243 switch (fsp->flow_type & ~FLOW_EXT) {
3244 case TCP_V4_FLOW:
3245 return "tcp4";
3246 case UDP_V4_FLOW:
3247 return "udp4";
3248 case SCTP_V4_FLOW:
3249 return "sctp4";
3250 case IP_USER_FLOW:
3251 return "ip4";
3252 default:
3253 return "unknown";
3254 }
3255 }
3256
3257 /**
3258 * i40e_pit_index_to_mask - Return the FLEX mask for a given PIT index
3259 * @pit_index: PIT index to convert
3260 *
3261 * Returns the mask for a given PIT index. Will return 0 if the pit_index is
3262 * of range.
3263 **/
3264 static u64 i40e_pit_index_to_mask(int pit_index)
3265 {
3266 switch (pit_index) {
3267 case 0:
3268 return I40E_FLEX_50_MASK;
3269 case 1:
3270 return I40E_FLEX_51_MASK;
3271 case 2:
3272 return I40E_FLEX_52_MASK;
3273 case 3:
3274 return I40E_FLEX_53_MASK;
3275 case 4:
3276 return I40E_FLEX_54_MASK;
3277 case 5:
3278 return I40E_FLEX_55_MASK;
3279 case 6:
3280 return I40E_FLEX_56_MASK;
3281 case 7:
3282 return I40E_FLEX_57_MASK;
3283 default:
3284 return 0;
3285 }
3286 }
3287
3288 /**
3289 * i40e_print_input_set - Show changes between two input sets
3290 * @vsi: the vsi being configured
3291 * @old: the old input set
3292 * @new: the new input set
3293 *
3294 * Print the difference between old and new input sets by showing which series
3295 * of words are toggled on or off. Only displays the bits we actually support
3296 * changing.
3297 **/
3298 static void i40e_print_input_set(struct i40e_vsi *vsi, u64 old, u64 new)
3299 {
3300 struct i40e_pf *pf = vsi->back;
3301 bool old_value, new_value;
3302 int i;
3303
3304 old_value = !!(old & I40E_L3_SRC_MASK);
3305 new_value = !!(new & I40E_L3_SRC_MASK);
3306 if (old_value != new_value)
3307 netif_info(pf, drv, vsi->netdev, "L3 source address: %s -> %s\n",
3308 old_value ? "ON" : "OFF",
3309 new_value ? "ON" : "OFF");
3310
3311 old_value = !!(old & I40E_L3_DST_MASK);
3312 new_value = !!(new & I40E_L3_DST_MASK);
3313 if (old_value != new_value)
3314 netif_info(pf, drv, vsi->netdev, "L3 destination address: %s -> %s\n",
3315 old_value ? "ON" : "OFF",
3316 new_value ? "ON" : "OFF");
3317
3318 old_value = !!(old & I40E_L4_SRC_MASK);
3319 new_value = !!(new & I40E_L4_SRC_MASK);
3320 if (old_value != new_value)
3321 netif_info(pf, drv, vsi->netdev, "L4 source port: %s -> %s\n",
3322 old_value ? "ON" : "OFF",
3323 new_value ? "ON" : "OFF");
3324
3325 old_value = !!(old & I40E_L4_DST_MASK);
3326 new_value = !!(new & I40E_L4_DST_MASK);
3327 if (old_value != new_value)
3328 netif_info(pf, drv, vsi->netdev, "L4 destination port: %s -> %s\n",
3329 old_value ? "ON" : "OFF",
3330 new_value ? "ON" : "OFF");
3331
3332 old_value = !!(old & I40E_VERIFY_TAG_MASK);
3333 new_value = !!(new & I40E_VERIFY_TAG_MASK);
3334 if (old_value != new_value)
3335 netif_info(pf, drv, vsi->netdev, "SCTP verification tag: %s -> %s\n",
3336 old_value ? "ON" : "OFF",
3337 new_value ? "ON" : "OFF");
3338
3339 /* Show change of flexible filter entries */
3340 for (i = 0; i < I40E_FLEX_INDEX_ENTRIES; i++) {
3341 u64 flex_mask = i40e_pit_index_to_mask(i);
3342
3343 old_value = !!(old & flex_mask);
3344 new_value = !!(new & flex_mask);
3345 if (old_value != new_value)
3346 netif_info(pf, drv, vsi->netdev, "FLEX index %d: %s -> %s\n",
3347 i,
3348 old_value ? "ON" : "OFF",
3349 new_value ? "ON" : "OFF");
3350 }
3351
3352 netif_info(pf, drv, vsi->netdev, " Current input set: %0llx\n",
3353 old);
3354 netif_info(pf, drv, vsi->netdev, "Requested input set: %0llx\n",
3355 new);
3356 }
3357
3358 /**
3359 * i40e_check_fdir_input_set - Check that a given rx_flow_spec mask is valid
3360 * @vsi: pointer to the targeted VSI
3361 * @fsp: pointer to Rx flow specification
3362 * @userdef: userdefined data from flow specification
3363 *
3364 * Ensures that a given ethtool_rx_flow_spec has a valid mask. Some support
3365 * for partial matches exists with a few limitations. First, hardware only
3366 * supports masking by word boundary (2 bytes) and not per individual bit.
3367 * Second, hardware is limited to using one mask for a flow type and cannot
3368 * use a separate mask for each filter.
3369 *
3370 * To support these limitations, if we already have a configured filter for
3371 * the specified type, this function enforces that new filters of the type
3372 * match the configured input set. Otherwise, if we do not have a filter of
3373 * the specified type, we allow the input set to be updated to match the
3374 * desired filter.
3375 *
3376 * To help ensure that administrators understand why filters weren't displayed
3377 * as supported, we print a diagnostic message displaying how the input set
3378 * would change and warning to delete the preexisting filters if required.
3379 *
3380 * Returns 0 on successful input set match, and a negative return code on
3381 * failure.
3382 **/
3383 static int i40e_check_fdir_input_set(struct i40e_vsi *vsi,
3384 struct ethtool_rx_flow_spec *fsp,
3385 struct i40e_rx_flow_userdef *userdef)
3386 {
3387 struct i40e_pf *pf = vsi->back;
3388 struct ethtool_tcpip4_spec *tcp_ip4_spec;
3389 struct ethtool_usrip4_spec *usr_ip4_spec;
3390 u64 current_mask, new_mask;
3391 bool new_flex_offset = false;
3392 bool flex_l3 = false;
3393 u16 *fdir_filter_count;
3394 u16 index, src_offset = 0;
3395 u8 pit_index = 0;
3396 int err;
3397
3398 switch (fsp->flow_type & ~FLOW_EXT) {
3399 case SCTP_V4_FLOW:
3400 index = I40E_FILTER_PCTYPE_NONF_IPV4_SCTP;
3401 fdir_filter_count = &pf->fd_sctp4_filter_cnt;
3402 break;
3403 case TCP_V4_FLOW:
3404 index = I40E_FILTER_PCTYPE_NONF_IPV4_TCP;
3405 fdir_filter_count = &pf->fd_tcp4_filter_cnt;
3406 break;
3407 case UDP_V4_FLOW:
3408 index = I40E_FILTER_PCTYPE_NONF_IPV4_UDP;
3409 fdir_filter_count = &pf->fd_udp4_filter_cnt;
3410 break;
3411 case IP_USER_FLOW:
3412 index = I40E_FILTER_PCTYPE_NONF_IPV4_OTHER;
3413 fdir_filter_count = &pf->fd_ip4_filter_cnt;
3414 flex_l3 = true;
3415 break;
3416 default:
3417 return -EOPNOTSUPP;
3418 }
3419
3420 /* Read the current input set from register memory. */
3421 current_mask = i40e_read_fd_input_set(pf, index);
3422 new_mask = current_mask;
3423
3424 /* Determine, if any, the required changes to the input set in order
3425 * to support the provided mask.
3426 *
3427 * Hardware only supports masking at word (2 byte) granularity and does
3428 * not support full bitwise masking. This implementation simplifies
3429 * even further and only supports fully enabled or fully disabled
3430 * masks for each field, even though we could split the ip4src and
3431 * ip4dst fields.
3432 */
3433 switch (fsp->flow_type & ~FLOW_EXT) {
3434 case SCTP_V4_FLOW:
3435 new_mask &= ~I40E_VERIFY_TAG_MASK;
3436 /* Fall through */
3437 case TCP_V4_FLOW:
3438 case UDP_V4_FLOW:
3439 tcp_ip4_spec = &fsp->m_u.tcp_ip4_spec;
3440
3441 /* IPv4 source address */
3442 if (tcp_ip4_spec->ip4src == htonl(0xFFFFFFFF))
3443 new_mask |= I40E_L3_SRC_MASK;
3444 else if (!tcp_ip4_spec->ip4src)
3445 new_mask &= ~I40E_L3_SRC_MASK;
3446 else
3447 return -EOPNOTSUPP;
3448
3449 /* IPv4 destination address */
3450 if (tcp_ip4_spec->ip4dst == htonl(0xFFFFFFFF))
3451 new_mask |= I40E_L3_DST_MASK;
3452 else if (!tcp_ip4_spec->ip4dst)
3453 new_mask &= ~I40E_L3_DST_MASK;
3454 else
3455 return -EOPNOTSUPP;
3456
3457 /* L4 source port */
3458 if (tcp_ip4_spec->psrc == htons(0xFFFF))
3459 new_mask |= I40E_L4_SRC_MASK;
3460 else if (!tcp_ip4_spec->psrc)
3461 new_mask &= ~I40E_L4_SRC_MASK;
3462 else
3463 return -EOPNOTSUPP;
3464
3465 /* L4 destination port */
3466 if (tcp_ip4_spec->pdst == htons(0xFFFF))
3467 new_mask |= I40E_L4_DST_MASK;
3468 else if (!tcp_ip4_spec->pdst)
3469 new_mask &= ~I40E_L4_DST_MASK;
3470 else
3471 return -EOPNOTSUPP;
3472
3473 /* Filtering on Type of Service is not supported. */
3474 if (tcp_ip4_spec->tos)
3475 return -EOPNOTSUPP;
3476
3477 break;
3478 case IP_USER_FLOW:
3479 usr_ip4_spec = &fsp->m_u.usr_ip4_spec;
3480
3481 /* IPv4 source address */
3482 if (usr_ip4_spec->ip4src == htonl(0xFFFFFFFF))
3483 new_mask |= I40E_L3_SRC_MASK;
3484 else if (!usr_ip4_spec->ip4src)
3485 new_mask &= ~I40E_L3_SRC_MASK;
3486 else
3487 return -EOPNOTSUPP;
3488
3489 /* IPv4 destination address */
3490 if (usr_ip4_spec->ip4dst == htonl(0xFFFFFFFF))
3491 new_mask |= I40E_L3_DST_MASK;
3492 else if (!usr_ip4_spec->ip4dst)
3493 new_mask &= ~I40E_L3_DST_MASK;
3494 else
3495 return -EOPNOTSUPP;
3496
3497 /* First 4 bytes of L4 header */
3498 if (usr_ip4_spec->l4_4_bytes == htonl(0xFFFFFFFF))
3499 new_mask |= I40E_L4_SRC_MASK | I40E_L4_DST_MASK;
3500 else if (!usr_ip4_spec->l4_4_bytes)
3501 new_mask &= ~(I40E_L4_SRC_MASK | I40E_L4_DST_MASK);
3502 else
3503 return -EOPNOTSUPP;
3504
3505 /* Filtering on Type of Service is not supported. */
3506 if (usr_ip4_spec->tos)
3507 return -EOPNOTSUPP;
3508
3509 /* Filtering on IP version is not supported */
3510 if (usr_ip4_spec->ip_ver)
3511 return -EINVAL;
3512
3513 /* Filtering on L4 protocol is not supported */
3514 if (usr_ip4_spec->proto)
3515 return -EINVAL;
3516
3517 break;
3518 default:
3519 return -EOPNOTSUPP;
3520 }
3521
3522 /* First, clear all flexible filter entries */
3523 new_mask &= ~I40E_FLEX_INPUT_MASK;
3524
3525 /* If we have a flexible filter, try to add this offset to the correct
3526 * flexible filter PIT list. Once finished, we can update the mask.
3527 * If the src_offset changed, we will get a new mask value which will
3528 * trigger an input set change.
3529 */
3530 if (userdef->flex_filter) {
3531 struct i40e_flex_pit *l3_flex_pit = NULL, *flex_pit = NULL;
3532
3533 /* Flexible offset must be even, since the flexible payload
3534 * must be aligned on 2-byte boundary.
3535 */
3536 if (userdef->flex_offset & 0x1) {
3537 dev_warn(&pf->pdev->dev,
3538 "Flexible data offset must be 2-byte aligned\n");
3539 return -EINVAL;
3540 }
3541
3542 src_offset = userdef->flex_offset >> 1;
3543
3544 /* FLX_PIT source offset value is only so large */
3545 if (src_offset > I40E_MAX_FLEX_SRC_OFFSET) {
3546 dev_warn(&pf->pdev->dev,
3547 "Flexible data must reside within first 64 bytes of the packet payload\n");
3548 return -EINVAL;
3549 }
3550
3551 /* See if this offset has already been programmed. If we get
3552 * an ERR_PTR, then the filter is not safe to add. Otherwise,
3553 * if we get a NULL pointer, this means we will need to add
3554 * the offset.
3555 */
3556 flex_pit = i40e_find_flex_offset(&pf->l4_flex_pit_list,
3557 src_offset);
3558 if (IS_ERR(flex_pit))
3559 return PTR_ERR(flex_pit);
3560
3561 /* IP_USER_FLOW filters match both L4 (ICMP) and L3 (unknown)
3562 * packet types, and thus we need to program both L3 and L4
3563 * flexible values. These must have identical flexible index,
3564 * as otherwise we can't correctly program the input set. So
3565 * we'll find both an L3 and L4 index and make sure they are
3566 * the same.
3567 */
3568 if (flex_l3) {
3569 l3_flex_pit =
3570 i40e_find_flex_offset(&pf->l3_flex_pit_list,
3571 src_offset);
3572 if (IS_ERR(l3_flex_pit))
3573 return PTR_ERR(l3_flex_pit);
3574
3575 if (flex_pit) {
3576 /* If we already had a matching L4 entry, we
3577 * need to make sure that the L3 entry we
3578 * obtained uses the same index.
3579 */
3580 if (l3_flex_pit) {
3581 if (l3_flex_pit->pit_index !=
3582 flex_pit->pit_index) {
3583 return -EINVAL;
3584 }
3585 } else {
3586 new_flex_offset = true;
3587 }
3588 } else {
3589 flex_pit = l3_flex_pit;
3590 }
3591 }
3592
3593 /* If we didn't find an existing flex offset, we need to
3594 * program a new one. However, we don't immediately program it
3595 * here because we will wait to program until after we check
3596 * that it is safe to change the input set.
3597 */
3598 if (!flex_pit) {
3599 new_flex_offset = true;
3600 pit_index = i40e_unused_pit_index(pf);
3601 } else {
3602 pit_index = flex_pit->pit_index;
3603 }
3604
3605 /* Update the mask with the new offset */
3606 new_mask |= i40e_pit_index_to_mask(pit_index);
3607 }
3608
3609 /* If the mask and flexible filter offsets for this filter match the
3610 * currently programmed values we don't need any input set change, so
3611 * this filter is safe to install.
3612 */
3613 if (new_mask == current_mask && !new_flex_offset)
3614 return 0;
3615
3616 netif_info(pf, drv, vsi->netdev, "Input set change requested for %s flows:\n",
3617 i40e_flow_str(fsp));
3618 i40e_print_input_set(vsi, current_mask, new_mask);
3619 if (new_flex_offset) {
3620 netif_info(pf, drv, vsi->netdev, "FLEX index %d: Offset -> %d",
3621 pit_index, src_offset);
3622 }
3623
3624 /* Hardware input sets are global across multiple ports, so even the
3625 * main port cannot change them when in MFP mode as this would impact
3626 * any filters on the other ports.
3627 */
3628 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
3629 netif_err(pf, drv, vsi->netdev, "Cannot change Flow Director input sets while MFP is enabled\n");
3630 return -EOPNOTSUPP;
3631 }
3632
3633 /* This filter requires us to update the input set. However, hardware
3634 * only supports one input set per flow type, and does not support
3635 * separate masks for each filter. This means that we can only support
3636 * a single mask for all filters of a specific type.
3637 *
3638 * If we have preexisting filters, they obviously depend on the
3639 * current programmed input set. Display a diagnostic message in this
3640 * case explaining why the filter could not be accepted.
3641 */
3642 if (*fdir_filter_count) {
3643 netif_err(pf, drv, vsi->netdev, "Cannot change input set for %s flows until %d preexisting filters are removed\n",
3644 i40e_flow_str(fsp),
3645 *fdir_filter_count);
3646 return -EOPNOTSUPP;
3647 }
3648
3649 i40e_write_fd_input_set(pf, index, new_mask);
3650
3651 /* Add the new offset and update table, if necessary */
3652 if (new_flex_offset) {
3653 err = i40e_add_flex_offset(&pf->l4_flex_pit_list, src_offset,
3654 pit_index);
3655 if (err)
3656 return err;
3657
3658 if (flex_l3) {
3659 err = i40e_add_flex_offset(&pf->l3_flex_pit_list,
3660 src_offset,
3661 pit_index);
3662 if (err)
3663 return err;
3664 }
3665
3666 i40e_reprogram_flex_pit(pf);
3667 }
3668
3669 return 0;
3670 }
3671
3672 /**
3673 * i40e_add_fdir_ethtool - Add/Remove Flow Director filters
3674 * @vsi: pointer to the targeted VSI
3675 * @cmd: command to get or set RX flow classification rules
3676 *
3677 * Add Flow Director filters for a specific flow spec based on their
3678 * protocol. Returns 0 if the filters were successfully added.
3679 **/
3680 static int i40e_add_fdir_ethtool(struct i40e_vsi *vsi,
3681 struct ethtool_rxnfc *cmd)
3682 {
3683 struct i40e_rx_flow_userdef userdef;
3684 struct ethtool_rx_flow_spec *fsp;
3685 struct i40e_fdir_filter *input;
3686 u16 dest_vsi = 0, q_index = 0;
3687 struct i40e_pf *pf;
3688 int ret = -EINVAL;
3689 u8 dest_ctl;
3690
3691 if (!vsi)
3692 return -EINVAL;
3693 pf = vsi->back;
3694
3695 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
3696 return -EOPNOTSUPP;
3697
3698 if (pf->flags & I40E_FLAG_FD_SB_AUTO_DISABLED)
3699 return -ENOSPC;
3700
3701 if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) ||
3702 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state))
3703 return -EBUSY;
3704
3705 if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state))
3706 return -EBUSY;
3707
3708 fsp = (struct ethtool_rx_flow_spec *)&cmd->fs;
3709
3710 /* Parse the user-defined field */
3711 if (i40e_parse_rx_flow_user_data(fsp, &userdef))
3712 return -EINVAL;
3713
3714 /* Extended MAC field is not supported */
3715 if (fsp->flow_type & FLOW_MAC_EXT)
3716 return -EINVAL;
3717
3718 ret = i40e_check_fdir_input_set(vsi, fsp, &userdef);
3719 if (ret)
3720 return ret;
3721
3722 if (fsp->location >= (pf->hw.func_caps.fd_filters_best_effort +
3723 pf->hw.func_caps.fd_filters_guaranteed)) {
3724 return -EINVAL;
3725 }
3726
3727 /* ring_cookie is either the drop index, or is a mask of the queue
3728 * index and VF id we wish to target.
3729 */
3730 if (fsp->ring_cookie == RX_CLS_FLOW_DISC) {
3731 dest_ctl = I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET;
3732 } else {
3733 u32 ring = ethtool_get_flow_spec_ring(fsp->ring_cookie);
3734 u8 vf = ethtool_get_flow_spec_ring_vf(fsp->ring_cookie);
3735
3736 if (!vf) {
3737 if (ring >= vsi->num_queue_pairs)
3738 return -EINVAL;
3739 dest_vsi = vsi->id;
3740 } else {
3741 /* VFs are zero-indexed, so we subtract one here */
3742 vf--;
3743
3744 if (vf >= pf->num_alloc_vfs)
3745 return -EINVAL;
3746 if (ring >= pf->vf[vf].num_queue_pairs)
3747 return -EINVAL;
3748 dest_vsi = pf->vf[vf].lan_vsi_id;
3749 }
3750 dest_ctl = I40E_FILTER_PROGRAM_DESC_DEST_DIRECT_PACKET_QINDEX;
3751 q_index = ring;
3752 }
3753
3754 input = kzalloc(sizeof(*input), GFP_KERNEL);
3755
3756 if (!input)
3757 return -ENOMEM;
3758
3759 input->fd_id = fsp->location;
3760 input->q_index = q_index;
3761 input->dest_vsi = dest_vsi;
3762 input->dest_ctl = dest_ctl;
3763 input->fd_status = I40E_FILTER_PROGRAM_DESC_FD_STATUS_FD_ID;
3764 input->cnt_index = I40E_FD_SB_STAT_IDX(pf->hw.pf_id);
3765 input->dst_ip = fsp->h_u.tcp_ip4_spec.ip4src;
3766 input->src_ip = fsp->h_u.tcp_ip4_spec.ip4dst;
3767 input->flow_type = fsp->flow_type & ~FLOW_EXT;
3768 input->ip4_proto = fsp->h_u.usr_ip4_spec.proto;
3769
3770 /* Reverse the src and dest notion, since the HW expects them to be from
3771 * Tx perspective where as the input from user is from Rx filter view.
3772 */
3773 input->dst_port = fsp->h_u.tcp_ip4_spec.psrc;
3774 input->src_port = fsp->h_u.tcp_ip4_spec.pdst;
3775 input->dst_ip = fsp->h_u.tcp_ip4_spec.ip4src;
3776 input->src_ip = fsp->h_u.tcp_ip4_spec.ip4dst;
3777
3778 if (userdef.flex_filter) {
3779 input->flex_filter = true;
3780 input->flex_word = cpu_to_be16(userdef.flex_word);
3781 input->flex_offset = userdef.flex_offset;
3782 }
3783
3784 ret = i40e_add_del_fdir(vsi, input, true);
3785 if (ret)
3786 goto free_input;
3787
3788 /* Add the input filter to the fdir_input_list, possibly replacing
3789 * a previous filter. Do not free the input structure after adding it
3790 * to the list as this would cause a use-after-free bug.
3791 */
3792 i40e_update_ethtool_fdir_entry(vsi, input, fsp->location, NULL);
3793
3794 return 0;
3795
3796 free_input:
3797 kfree(input);
3798 return ret;
3799 }
3800
3801 /**
3802 * i40e_set_rxnfc - command to set RX flow classification rules
3803 * @netdev: network interface device structure
3804 * @cmd: ethtool rxnfc command
3805 *
3806 * Returns Success if the command is supported.
3807 **/
3808 static int i40e_set_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd)
3809 {
3810 struct i40e_netdev_priv *np = netdev_priv(netdev);
3811 struct i40e_vsi *vsi = np->vsi;
3812 struct i40e_pf *pf = vsi->back;
3813 int ret = -EOPNOTSUPP;
3814
3815 switch (cmd->cmd) {
3816 case ETHTOOL_SRXFH:
3817 ret = i40e_set_rss_hash_opt(pf, cmd);
3818 break;
3819 case ETHTOOL_SRXCLSRLINS:
3820 ret = i40e_add_fdir_ethtool(vsi, cmd);
3821 break;
3822 case ETHTOOL_SRXCLSRLDEL:
3823 ret = i40e_del_fdir_entry(vsi, cmd);
3824 break;
3825 default:
3826 break;
3827 }
3828
3829 return ret;
3830 }
3831
3832 /**
3833 * i40e_max_channels - get Max number of combined channels supported
3834 * @vsi: vsi pointer
3835 **/
3836 static unsigned int i40e_max_channels(struct i40e_vsi *vsi)
3837 {
3838 /* TODO: This code assumes DCB and FD is disabled for now. */
3839 return vsi->alloc_queue_pairs;
3840 }
3841
3842 /**
3843 * i40e_get_channels - Get the current channels enabled and max supported etc.
3844 * @netdev: network interface device structure
3845 * @ch: ethtool channels structure
3846 *
3847 * We don't support separate tx and rx queues as channels. The other count
3848 * represents how many queues are being used for control. max_combined counts
3849 * how many queue pairs we can support. They may not be mapped 1 to 1 with
3850 * q_vectors since we support a lot more queue pairs than q_vectors.
3851 **/
3852 static void i40e_get_channels(struct net_device *dev,
3853 struct ethtool_channels *ch)
3854 {
3855 struct i40e_netdev_priv *np = netdev_priv(dev);
3856 struct i40e_vsi *vsi = np->vsi;
3857 struct i40e_pf *pf = vsi->back;
3858
3859 /* report maximum channels */
3860 ch->max_combined = i40e_max_channels(vsi);
3861
3862 /* report info for other vector */
3863 ch->other_count = (pf->flags & I40E_FLAG_FD_SB_ENABLED) ? 1 : 0;
3864 ch->max_other = ch->other_count;
3865
3866 /* Note: This code assumes DCB is disabled for now. */
3867 ch->combined_count = vsi->num_queue_pairs;
3868 }
3869
3870 /**
3871 * i40e_set_channels - Set the new channels count.
3872 * @netdev: network interface device structure
3873 * @ch: ethtool channels structure
3874 *
3875 * The new channels count may not be the same as requested by the user
3876 * since it gets rounded down to a power of 2 value.
3877 **/
3878 static int i40e_set_channels(struct net_device *dev,
3879 struct ethtool_channels *ch)
3880 {
3881 const u8 drop = I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET;
3882 struct i40e_netdev_priv *np = netdev_priv(dev);
3883 unsigned int count = ch->combined_count;
3884 struct i40e_vsi *vsi = np->vsi;
3885 struct i40e_pf *pf = vsi->back;
3886 struct i40e_fdir_filter *rule;
3887 struct hlist_node *node2;
3888 int new_count;
3889 int err = 0;
3890
3891 /* We do not support setting channels for any other VSI at present */
3892 if (vsi->type != I40E_VSI_MAIN)
3893 return -EINVAL;
3894
3895 /* verify they are not requesting separate vectors */
3896 if (!count || ch->rx_count || ch->tx_count)
3897 return -EINVAL;
3898
3899 /* verify other_count has not changed */
3900 if (ch->other_count != ((pf->flags & I40E_FLAG_FD_SB_ENABLED) ? 1 : 0))
3901 return -EINVAL;
3902
3903 /* verify the number of channels does not exceed hardware limits */
3904 if (count > i40e_max_channels(vsi))
3905 return -EINVAL;
3906
3907 /* verify that the number of channels does not invalidate any current
3908 * flow director rules
3909 */
3910 hlist_for_each_entry_safe(rule, node2,
3911 &pf->fdir_filter_list, fdir_node) {
3912 if (rule->dest_ctl != drop && count <= rule->q_index) {
3913 dev_warn(&pf->pdev->dev,
3914 "Existing user defined filter %d assigns flow to queue %d\n",
3915 rule->fd_id, rule->q_index);
3916 err = -EINVAL;
3917 }
3918 }
3919
3920 if (err) {
3921 dev_err(&pf->pdev->dev,
3922 "Existing filter rules must be deleted to reduce combined channel count to %d\n",
3923 count);
3924 return err;
3925 }
3926
3927 /* update feature limits from largest to smallest supported values */
3928 /* TODO: Flow director limit, DCB etc */
3929
3930 /* use rss_reconfig to rebuild with new queue count and update traffic
3931 * class queue mapping
3932 */
3933 new_count = i40e_reconfig_rss_queues(pf, count);
3934 if (new_count > 0)
3935 return 0;
3936 else
3937 return -EINVAL;
3938 }
3939
3940 /**
3941 * i40e_get_rxfh_key_size - get the RSS hash key size
3942 * @netdev: network interface device structure
3943 *
3944 * Returns the table size.
3945 **/
3946 static u32 i40e_get_rxfh_key_size(struct net_device *netdev)
3947 {
3948 return I40E_HKEY_ARRAY_SIZE;
3949 }
3950
3951 /**
3952 * i40e_get_rxfh_indir_size - get the rx flow hash indirection table size
3953 * @netdev: network interface device structure
3954 *
3955 * Returns the table size.
3956 **/
3957 static u32 i40e_get_rxfh_indir_size(struct net_device *netdev)
3958 {
3959 return I40E_HLUT_ARRAY_SIZE;
3960 }
3961
3962 static int i40e_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key,
3963 u8 *hfunc)
3964 {
3965 struct i40e_netdev_priv *np = netdev_priv(netdev);
3966 struct i40e_vsi *vsi = np->vsi;
3967 u8 *lut, *seed = NULL;
3968 int ret;
3969 u16 i;
3970
3971 if (hfunc)
3972 *hfunc = ETH_RSS_HASH_TOP;
3973
3974 if (!indir)
3975 return 0;
3976
3977 seed = key;
3978 lut = kzalloc(I40E_HLUT_ARRAY_SIZE, GFP_KERNEL);
3979 if (!lut)
3980 return -ENOMEM;
3981 ret = i40e_get_rss(vsi, seed, lut, I40E_HLUT_ARRAY_SIZE);
3982 if (ret)
3983 goto out;
3984 for (i = 0; i < I40E_HLUT_ARRAY_SIZE; i++)
3985 indir[i] = (u32)(lut[i]);
3986
3987 out:
3988 kfree(lut);
3989
3990 return ret;
3991 }
3992
3993 /**
3994 * i40e_set_rxfh - set the rx flow hash indirection table
3995 * @netdev: network interface device structure
3996 * @indir: indirection table
3997 * @key: hash key
3998 *
3999 * Returns -EINVAL if the table specifies an invalid queue id, otherwise
4000 * returns 0 after programming the table.
4001 **/
4002 static int i40e_set_rxfh(struct net_device *netdev, const u32 *indir,
4003 const u8 *key, const u8 hfunc)
4004 {
4005 struct i40e_netdev_priv *np = netdev_priv(netdev);
4006 struct i40e_vsi *vsi = np->vsi;
4007 struct i40e_pf *pf = vsi->back;
4008 u8 *seed = NULL;
4009 u16 i;
4010
4011 if (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP)
4012 return -EOPNOTSUPP;
4013
4014 if (key) {
4015 if (!vsi->rss_hkey_user) {
4016 vsi->rss_hkey_user = kzalloc(I40E_HKEY_ARRAY_SIZE,
4017 GFP_KERNEL);
4018 if (!vsi->rss_hkey_user)
4019 return -ENOMEM;
4020 }
4021 memcpy(vsi->rss_hkey_user, key, I40E_HKEY_ARRAY_SIZE);
4022 seed = vsi->rss_hkey_user;
4023 }
4024 if (!vsi->rss_lut_user) {
4025 vsi->rss_lut_user = kzalloc(I40E_HLUT_ARRAY_SIZE, GFP_KERNEL);
4026 if (!vsi->rss_lut_user)
4027 return -ENOMEM;
4028 }
4029
4030 /* Each 32 bits pointed by 'indir' is stored with a lut entry */
4031 if (indir)
4032 for (i = 0; i < I40E_HLUT_ARRAY_SIZE; i++)
4033 vsi->rss_lut_user[i] = (u8)(indir[i]);
4034 else
4035 i40e_fill_rss_lut(pf, vsi->rss_lut_user, I40E_HLUT_ARRAY_SIZE,
4036 vsi->rss_size);
4037
4038 return i40e_config_rss(vsi, seed, vsi->rss_lut_user,
4039 I40E_HLUT_ARRAY_SIZE);
4040 }
4041
4042 /**
4043 * i40e_get_priv_flags - report device private flags
4044 * @dev: network interface device structure
4045 *
4046 * The get string set count and the string set should be matched for each
4047 * flag returned. Add new strings for each flag to the i40e_gstrings_priv_flags
4048 * array.
4049 *
4050 * Returns a u32 bitmap of flags.
4051 **/
4052 static u32 i40e_get_priv_flags(struct net_device *dev)
4053 {
4054 struct i40e_netdev_priv *np = netdev_priv(dev);
4055 struct i40e_vsi *vsi = np->vsi;
4056 struct i40e_pf *pf = vsi->back;
4057 u32 i, j, ret_flags = 0;
4058
4059 for (i = 0; i < I40E_PRIV_FLAGS_STR_LEN; i++) {
4060 const struct i40e_priv_flags *priv_flags;
4061
4062 priv_flags = &i40e_gstrings_priv_flags[i];
4063
4064 if (priv_flags->flag & pf->flags)
4065 ret_flags |= BIT(i);
4066 }
4067
4068 if (pf->hw.pf_id != 0)
4069 return ret_flags;
4070
4071 for (j = 0; j < I40E_GL_PRIV_FLAGS_STR_LEN; j++) {
4072 const struct i40e_priv_flags *priv_flags;
4073
4074 priv_flags = &i40e_gl_gstrings_priv_flags[j];
4075
4076 if (priv_flags->flag & pf->flags)
4077 ret_flags |= BIT(i + j);
4078 }
4079
4080 return ret_flags;
4081 }
4082
4083 /**
4084 * i40e_set_priv_flags - set private flags
4085 * @dev: network interface device structure
4086 * @flags: bit flags to be set
4087 **/
4088 static int i40e_set_priv_flags(struct net_device *dev, u32 flags)
4089 {
4090 struct i40e_netdev_priv *np = netdev_priv(dev);
4091 struct i40e_vsi *vsi = np->vsi;
4092 struct i40e_pf *pf = vsi->back;
4093 u64 orig_flags, new_flags, changed_flags;
4094 u32 i, j;
4095
4096 orig_flags = READ_ONCE(pf->flags);
4097 new_flags = orig_flags;
4098
4099 for (i = 0; i < I40E_PRIV_FLAGS_STR_LEN; i++) {
4100 const struct i40e_priv_flags *priv_flags;
4101
4102 priv_flags = &i40e_gstrings_priv_flags[i];
4103
4104 if (flags & BIT(i))
4105 new_flags |= priv_flags->flag;
4106 else
4107 new_flags &= ~(priv_flags->flag);
4108
4109 /* If this is a read-only flag, it can't be changed */
4110 if (priv_flags->read_only &&
4111 ((orig_flags ^ new_flags) & ~BIT(i)))
4112 return -EOPNOTSUPP;
4113 }
4114
4115 if (pf->hw.pf_id != 0)
4116 goto flags_complete;
4117
4118 for (j = 0; j < I40E_GL_PRIV_FLAGS_STR_LEN; j++) {
4119 const struct i40e_priv_flags *priv_flags;
4120
4121 priv_flags = &i40e_gl_gstrings_priv_flags[j];
4122
4123 if (flags & BIT(i + j))
4124 new_flags |= priv_flags->flag;
4125 else
4126 new_flags &= ~(priv_flags->flag);
4127
4128 /* If this is a read-only flag, it can't be changed */
4129 if (priv_flags->read_only &&
4130 ((orig_flags ^ new_flags) & ~BIT(i)))
4131 return -EOPNOTSUPP;
4132 }
4133
4134 flags_complete:
4135 /* Before we finalize any flag changes, we need to perform some
4136 * checks to ensure that the changes are supported and safe.
4137 */
4138
4139 /* ATR eviction is not supported on all devices */
4140 if ((new_flags & I40E_FLAG_HW_ATR_EVICT_ENABLED) &&
4141 !(pf->hw_features & I40E_HW_ATR_EVICT_CAPABLE))
4142 return -EOPNOTSUPP;
4143
4144 /* Compare and exchange the new flags into place. If we failed, that
4145 * is if cmpxchg64 returns anything but the old value, this means that
4146 * something else has modified the flags variable since we copied it
4147 * originally. We'll just punt with an error and log something in the
4148 * message buffer.
4149 */
4150 if (cmpxchg64(&pf->flags, orig_flags, new_flags) != orig_flags) {
4151 dev_warn(&pf->pdev->dev,
4152 "Unable to update pf->flags as it was modified by another thread...\n");
4153 return -EAGAIN;
4154 }
4155
4156 changed_flags = orig_flags ^ new_flags;
4157
4158 /* Process any additional changes needed as a result of flag changes.
4159 * The changed_flags value reflects the list of bits that were
4160 * changed in the code above.
4161 */
4162
4163 /* Flush current ATR settings if ATR was disabled */
4164 if ((changed_flags & I40E_FLAG_FD_ATR_ENABLED) &&
4165 !(pf->flags & I40E_FLAG_FD_ATR_ENABLED)) {
4166 pf->flags |= I40E_FLAG_FD_ATR_AUTO_DISABLED;
4167 set_bit(__I40E_FD_FLUSH_REQUESTED, pf->state);
4168 }
4169
4170 if (changed_flags & I40E_FLAG_TRUE_PROMISC_SUPPORT) {
4171 u16 sw_flags = 0, valid_flags = 0;
4172 int ret;
4173
4174 if (!(pf->flags & I40E_FLAG_TRUE_PROMISC_SUPPORT))
4175 sw_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC;
4176 valid_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC;
4177 ret = i40e_aq_set_switch_config(&pf->hw, sw_flags, valid_flags,
4178 NULL);
4179 if (ret && pf->hw.aq.asq_last_status != I40E_AQ_RC_ESRCH) {
4180 dev_info(&pf->pdev->dev,
4181 "couldn't set switch config bits, err %s aq_err %s\n",
4182 i40e_stat_str(&pf->hw, ret),
4183 i40e_aq_str(&pf->hw,
4184 pf->hw.aq.asq_last_status));
4185 /* not a fatal problem, just keep going */
4186 }
4187 }
4188
4189 /* Issue reset to cause things to take effect, as additional bits
4190 * are added we will need to create a mask of bits requiring reset
4191 */
4192 if ((changed_flags & I40E_FLAG_VEB_STATS_ENABLED) ||
4193 ((changed_flags & I40E_FLAG_LEGACY_RX) && netif_running(dev)))
4194 i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED), true);
4195
4196 return 0;
4197 }
4198
4199 static const struct ethtool_ops i40e_ethtool_ops = {
4200 .get_drvinfo = i40e_get_drvinfo,
4201 .get_regs_len = i40e_get_regs_len,
4202 .get_regs = i40e_get_regs,
4203 .nway_reset = i40e_nway_reset,
4204 .get_link = ethtool_op_get_link,
4205 .get_wol = i40e_get_wol,
4206 .set_wol = i40e_set_wol,
4207 .set_eeprom = i40e_set_eeprom,
4208 .get_eeprom_len = i40e_get_eeprom_len,
4209 .get_eeprom = i40e_get_eeprom,
4210 .get_ringparam = i40e_get_ringparam,
4211 .set_ringparam = i40e_set_ringparam,
4212 .get_pauseparam = i40e_get_pauseparam,
4213 .set_pauseparam = i40e_set_pauseparam,
4214 .get_msglevel = i40e_get_msglevel,
4215 .set_msglevel = i40e_set_msglevel,
4216 .get_rxnfc = i40e_get_rxnfc,
4217 .set_rxnfc = i40e_set_rxnfc,
4218 .self_test = i40e_diag_test,
4219 .get_strings = i40e_get_strings,
4220 .set_phys_id = i40e_set_phys_id,
4221 .get_sset_count = i40e_get_sset_count,
4222 .get_ethtool_stats = i40e_get_ethtool_stats,
4223 .get_coalesce = i40e_get_coalesce,
4224 .set_coalesce = i40e_set_coalesce,
4225 .get_rxfh_key_size = i40e_get_rxfh_key_size,
4226 .get_rxfh_indir_size = i40e_get_rxfh_indir_size,
4227 .get_rxfh = i40e_get_rxfh,
4228 .set_rxfh = i40e_set_rxfh,
4229 .get_channels = i40e_get_channels,
4230 .set_channels = i40e_set_channels,
4231 .get_ts_info = i40e_get_ts_info,
4232 .get_priv_flags = i40e_get_priv_flags,
4233 .set_priv_flags = i40e_set_priv_flags,
4234 .get_per_queue_coalesce = i40e_get_per_queue_coalesce,
4235 .set_per_queue_coalesce = i40e_set_per_queue_coalesce,
4236 .get_link_ksettings = i40e_get_link_ksettings,
4237 .set_link_ksettings = i40e_set_link_ksettings,
4238 };
4239
4240 void i40e_set_ethtool_ops(struct net_device *netdev)
4241 {
4242 netdev->ethtool_ops = &i40e_ethtool_ops;
4243 }
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