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[mirror_ubuntu-jammy-kernel.git] / drivers / net / ethernet / intel / i40e / i40e_main.c
1 /*******************************************************************************
2 *
3 * Intel Ethernet Controller XL710 Family Linux Driver
4 * Copyright(c) 2013 - 2016 Intel Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
17 *
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
20 *
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 ******************************************************************************/
26
27 #include <linux/etherdevice.h>
28 #include <linux/of_net.h>
29 #include <linux/pci.h>
30
31 /* Local includes */
32 #include "i40e.h"
33 #include "i40e_diag.h"
34 #include <net/udp_tunnel.h>
35
36 const char i40e_driver_name[] = "i40e";
37 static const char i40e_driver_string[] =
38 "Intel(R) Ethernet Connection XL710 Network Driver";
39
40 #define DRV_KERN "-k"
41
42 #define DRV_VERSION_MAJOR 1
43 #define DRV_VERSION_MINOR 6
44 #define DRV_VERSION_BUILD 16
45 #define DRV_VERSION __stringify(DRV_VERSION_MAJOR) "." \
46 __stringify(DRV_VERSION_MINOR) "." \
47 __stringify(DRV_VERSION_BUILD) DRV_KERN
48 const char i40e_driver_version_str[] = DRV_VERSION;
49 static const char i40e_copyright[] = "Copyright (c) 2013 - 2014 Intel Corporation.";
50
51 /* a bit of forward declarations */
52 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi);
53 static void i40e_handle_reset_warning(struct i40e_pf *pf);
54 static int i40e_add_vsi(struct i40e_vsi *vsi);
55 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi);
56 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit);
57 static int i40e_setup_misc_vector(struct i40e_pf *pf);
58 static void i40e_determine_queue_usage(struct i40e_pf *pf);
59 static int i40e_setup_pf_filter_control(struct i40e_pf *pf);
60 static void i40e_fdir_sb_setup(struct i40e_pf *pf);
61 static int i40e_veb_get_bw_info(struct i40e_veb *veb);
62
63 /* i40e_pci_tbl - PCI Device ID Table
64 *
65 * Last entry must be all 0s
66 *
67 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
68 * Class, Class Mask, private data (not used) }
69 */
70 static const struct pci_device_id i40e_pci_tbl[] = {
71 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_XL710), 0},
72 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QEMU), 0},
73 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_B), 0},
74 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_C), 0},
75 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_A), 0},
76 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_B), 0},
77 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_C), 0},
78 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T), 0},
79 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T4), 0},
80 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0},
81 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_X722), 0},
82 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_X722), 0},
83 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_X722), 0},
84 {PCI_VDEVICE(INTEL, I40E_DEV_ID_1G_BASE_T_X722), 0},
85 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T_X722), 0},
86 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_I_X722), 0},
87 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0},
88 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2_A), 0},
89 /* required last entry */
90 {0, }
91 };
92 MODULE_DEVICE_TABLE(pci, i40e_pci_tbl);
93
94 #define I40E_MAX_VF_COUNT 128
95 static int debug = -1;
96 module_param(debug, int, 0);
97 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
98
99 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
100 MODULE_DESCRIPTION("Intel(R) Ethernet Connection XL710 Network Driver");
101 MODULE_LICENSE("GPL");
102 MODULE_VERSION(DRV_VERSION);
103
104 static struct workqueue_struct *i40e_wq;
105
106 /**
107 * i40e_allocate_dma_mem_d - OS specific memory alloc for shared code
108 * @hw: pointer to the HW structure
109 * @mem: ptr to mem struct to fill out
110 * @size: size of memory requested
111 * @alignment: what to align the allocation to
112 **/
113 int i40e_allocate_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem,
114 u64 size, u32 alignment)
115 {
116 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
117
118 mem->size = ALIGN(size, alignment);
119 mem->va = dma_zalloc_coherent(&pf->pdev->dev, mem->size,
120 &mem->pa, GFP_KERNEL);
121 if (!mem->va)
122 return -ENOMEM;
123
124 return 0;
125 }
126
127 /**
128 * i40e_free_dma_mem_d - OS specific memory free for shared code
129 * @hw: pointer to the HW structure
130 * @mem: ptr to mem struct to free
131 **/
132 int i40e_free_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem)
133 {
134 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
135
136 dma_free_coherent(&pf->pdev->dev, mem->size, mem->va, mem->pa);
137 mem->va = NULL;
138 mem->pa = 0;
139 mem->size = 0;
140
141 return 0;
142 }
143
144 /**
145 * i40e_allocate_virt_mem_d - OS specific memory alloc for shared code
146 * @hw: pointer to the HW structure
147 * @mem: ptr to mem struct to fill out
148 * @size: size of memory requested
149 **/
150 int i40e_allocate_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem,
151 u32 size)
152 {
153 mem->size = size;
154 mem->va = kzalloc(size, GFP_KERNEL);
155
156 if (!mem->va)
157 return -ENOMEM;
158
159 return 0;
160 }
161
162 /**
163 * i40e_free_virt_mem_d - OS specific memory free for shared code
164 * @hw: pointer to the HW structure
165 * @mem: ptr to mem struct to free
166 **/
167 int i40e_free_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem)
168 {
169 /* it's ok to kfree a NULL pointer */
170 kfree(mem->va);
171 mem->va = NULL;
172 mem->size = 0;
173
174 return 0;
175 }
176
177 /**
178 * i40e_get_lump - find a lump of free generic resource
179 * @pf: board private structure
180 * @pile: the pile of resource to search
181 * @needed: the number of items needed
182 * @id: an owner id to stick on the items assigned
183 *
184 * Returns the base item index of the lump, or negative for error
185 *
186 * The search_hint trick and lack of advanced fit-finding only work
187 * because we're highly likely to have all the same size lump requests.
188 * Linear search time and any fragmentation should be minimal.
189 **/
190 static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile,
191 u16 needed, u16 id)
192 {
193 int ret = -ENOMEM;
194 int i, j;
195
196 if (!pile || needed == 0 || id >= I40E_PILE_VALID_BIT) {
197 dev_info(&pf->pdev->dev,
198 "param err: pile=%p needed=%d id=0x%04x\n",
199 pile, needed, id);
200 return -EINVAL;
201 }
202
203 /* start the linear search with an imperfect hint */
204 i = pile->search_hint;
205 while (i < pile->num_entries) {
206 /* skip already allocated entries */
207 if (pile->list[i] & I40E_PILE_VALID_BIT) {
208 i++;
209 continue;
210 }
211
212 /* do we have enough in this lump? */
213 for (j = 0; (j < needed) && ((i+j) < pile->num_entries); j++) {
214 if (pile->list[i+j] & I40E_PILE_VALID_BIT)
215 break;
216 }
217
218 if (j == needed) {
219 /* there was enough, so assign it to the requestor */
220 for (j = 0; j < needed; j++)
221 pile->list[i+j] = id | I40E_PILE_VALID_BIT;
222 ret = i;
223 pile->search_hint = i + j;
224 break;
225 }
226
227 /* not enough, so skip over it and continue looking */
228 i += j;
229 }
230
231 return ret;
232 }
233
234 /**
235 * i40e_put_lump - return a lump of generic resource
236 * @pile: the pile of resource to search
237 * @index: the base item index
238 * @id: the owner id of the items assigned
239 *
240 * Returns the count of items in the lump
241 **/
242 static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id)
243 {
244 int valid_id = (id | I40E_PILE_VALID_BIT);
245 int count = 0;
246 int i;
247
248 if (!pile || index >= pile->num_entries)
249 return -EINVAL;
250
251 for (i = index;
252 i < pile->num_entries && pile->list[i] == valid_id;
253 i++) {
254 pile->list[i] = 0;
255 count++;
256 }
257
258 if (count && index < pile->search_hint)
259 pile->search_hint = index;
260
261 return count;
262 }
263
264 /**
265 * i40e_find_vsi_from_id - searches for the vsi with the given id
266 * @pf - the pf structure to search for the vsi
267 * @id - id of the vsi it is searching for
268 **/
269 struct i40e_vsi *i40e_find_vsi_from_id(struct i40e_pf *pf, u16 id)
270 {
271 int i;
272
273 for (i = 0; i < pf->num_alloc_vsi; i++)
274 if (pf->vsi[i] && (pf->vsi[i]->id == id))
275 return pf->vsi[i];
276
277 return NULL;
278 }
279
280 /**
281 * i40e_service_event_schedule - Schedule the service task to wake up
282 * @pf: board private structure
283 *
284 * If not already scheduled, this puts the task into the work queue
285 **/
286 void i40e_service_event_schedule(struct i40e_pf *pf)
287 {
288 if (!test_bit(__I40E_DOWN, &pf->state) &&
289 !test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state) &&
290 !test_and_set_bit(__I40E_SERVICE_SCHED, &pf->state))
291 queue_work(i40e_wq, &pf->service_task);
292 }
293
294 /**
295 * i40e_tx_timeout - Respond to a Tx Hang
296 * @netdev: network interface device structure
297 *
298 * If any port has noticed a Tx timeout, it is likely that the whole
299 * device is munged, not just the one netdev port, so go for the full
300 * reset.
301 **/
302 #ifdef I40E_FCOE
303 void i40e_tx_timeout(struct net_device *netdev)
304 #else
305 static void i40e_tx_timeout(struct net_device *netdev)
306 #endif
307 {
308 struct i40e_netdev_priv *np = netdev_priv(netdev);
309 struct i40e_vsi *vsi = np->vsi;
310 struct i40e_pf *pf = vsi->back;
311 struct i40e_ring *tx_ring = NULL;
312 unsigned int i, hung_queue = 0;
313 u32 head, val;
314
315 pf->tx_timeout_count++;
316
317 /* find the stopped queue the same way the stack does */
318 for (i = 0; i < netdev->num_tx_queues; i++) {
319 struct netdev_queue *q;
320 unsigned long trans_start;
321
322 q = netdev_get_tx_queue(netdev, i);
323 trans_start = q->trans_start;
324 if (netif_xmit_stopped(q) &&
325 time_after(jiffies,
326 (trans_start + netdev->watchdog_timeo))) {
327 hung_queue = i;
328 break;
329 }
330 }
331
332 if (i == netdev->num_tx_queues) {
333 netdev_info(netdev, "tx_timeout: no netdev hung queue found\n");
334 } else {
335 /* now that we have an index, find the tx_ring struct */
336 for (i = 0; i < vsi->num_queue_pairs; i++) {
337 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) {
338 if (hung_queue ==
339 vsi->tx_rings[i]->queue_index) {
340 tx_ring = vsi->tx_rings[i];
341 break;
342 }
343 }
344 }
345 }
346
347 if (time_after(jiffies, (pf->tx_timeout_last_recovery + HZ*20)))
348 pf->tx_timeout_recovery_level = 1; /* reset after some time */
349 else if (time_before(jiffies,
350 (pf->tx_timeout_last_recovery + netdev->watchdog_timeo)))
351 return; /* don't do any new action before the next timeout */
352
353 if (tx_ring) {
354 head = i40e_get_head(tx_ring);
355 /* Read interrupt register */
356 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
357 val = rd32(&pf->hw,
358 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx +
359 tx_ring->vsi->base_vector - 1));
360 else
361 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
362
363 netdev_info(netdev, "tx_timeout: VSI_seid: %d, Q %d, NTC: 0x%x, HWB: 0x%x, NTU: 0x%x, TAIL: 0x%x, INT: 0x%x\n",
364 vsi->seid, hung_queue, tx_ring->next_to_clean,
365 head, tx_ring->next_to_use,
366 readl(tx_ring->tail), val);
367 }
368
369 pf->tx_timeout_last_recovery = jiffies;
370 netdev_info(netdev, "tx_timeout recovery level %d, hung_queue %d\n",
371 pf->tx_timeout_recovery_level, hung_queue);
372
373 switch (pf->tx_timeout_recovery_level) {
374 case 1:
375 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
376 break;
377 case 2:
378 set_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
379 break;
380 case 3:
381 set_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
382 break;
383 default:
384 netdev_err(netdev, "tx_timeout recovery unsuccessful\n");
385 break;
386 }
387
388 i40e_service_event_schedule(pf);
389 pf->tx_timeout_recovery_level++;
390 }
391
392 /**
393 * i40e_get_vsi_stats_struct - Get System Network Statistics
394 * @vsi: the VSI we care about
395 *
396 * Returns the address of the device statistics structure.
397 * The statistics are actually updated from the service task.
398 **/
399 struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi)
400 {
401 return &vsi->net_stats;
402 }
403
404 /**
405 * i40e_get_netdev_stats_struct - Get statistics for netdev interface
406 * @netdev: network interface device structure
407 *
408 * Returns the address of the device statistics structure.
409 * The statistics are actually updated from the service task.
410 **/
411 #ifdef I40E_FCOE
412 struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
413 struct net_device *netdev,
414 struct rtnl_link_stats64 *stats)
415 #else
416 static struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
417 struct net_device *netdev,
418 struct rtnl_link_stats64 *stats)
419 #endif
420 {
421 struct i40e_netdev_priv *np = netdev_priv(netdev);
422 struct i40e_ring *tx_ring, *rx_ring;
423 struct i40e_vsi *vsi = np->vsi;
424 struct rtnl_link_stats64 *vsi_stats = i40e_get_vsi_stats_struct(vsi);
425 int i;
426
427 if (test_bit(__I40E_DOWN, &vsi->state))
428 return stats;
429
430 if (!vsi->tx_rings)
431 return stats;
432
433 rcu_read_lock();
434 for (i = 0; i < vsi->num_queue_pairs; i++) {
435 u64 bytes, packets;
436 unsigned int start;
437
438 tx_ring = ACCESS_ONCE(vsi->tx_rings[i]);
439 if (!tx_ring)
440 continue;
441
442 do {
443 start = u64_stats_fetch_begin_irq(&tx_ring->syncp);
444 packets = tx_ring->stats.packets;
445 bytes = tx_ring->stats.bytes;
446 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start));
447
448 stats->tx_packets += packets;
449 stats->tx_bytes += bytes;
450 rx_ring = &tx_ring[1];
451
452 do {
453 start = u64_stats_fetch_begin_irq(&rx_ring->syncp);
454 packets = rx_ring->stats.packets;
455 bytes = rx_ring->stats.bytes;
456 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start));
457
458 stats->rx_packets += packets;
459 stats->rx_bytes += bytes;
460 }
461 rcu_read_unlock();
462
463 /* following stats updated by i40e_watchdog_subtask() */
464 stats->multicast = vsi_stats->multicast;
465 stats->tx_errors = vsi_stats->tx_errors;
466 stats->tx_dropped = vsi_stats->tx_dropped;
467 stats->rx_errors = vsi_stats->rx_errors;
468 stats->rx_dropped = vsi_stats->rx_dropped;
469 stats->rx_crc_errors = vsi_stats->rx_crc_errors;
470 stats->rx_length_errors = vsi_stats->rx_length_errors;
471
472 return stats;
473 }
474
475 /**
476 * i40e_vsi_reset_stats - Resets all stats of the given vsi
477 * @vsi: the VSI to have its stats reset
478 **/
479 void i40e_vsi_reset_stats(struct i40e_vsi *vsi)
480 {
481 struct rtnl_link_stats64 *ns;
482 int i;
483
484 if (!vsi)
485 return;
486
487 ns = i40e_get_vsi_stats_struct(vsi);
488 memset(ns, 0, sizeof(*ns));
489 memset(&vsi->net_stats_offsets, 0, sizeof(vsi->net_stats_offsets));
490 memset(&vsi->eth_stats, 0, sizeof(vsi->eth_stats));
491 memset(&vsi->eth_stats_offsets, 0, sizeof(vsi->eth_stats_offsets));
492 if (vsi->rx_rings && vsi->rx_rings[0]) {
493 for (i = 0; i < vsi->num_queue_pairs; i++) {
494 memset(&vsi->rx_rings[i]->stats, 0,
495 sizeof(vsi->rx_rings[i]->stats));
496 memset(&vsi->rx_rings[i]->rx_stats, 0,
497 sizeof(vsi->rx_rings[i]->rx_stats));
498 memset(&vsi->tx_rings[i]->stats, 0,
499 sizeof(vsi->tx_rings[i]->stats));
500 memset(&vsi->tx_rings[i]->tx_stats, 0,
501 sizeof(vsi->tx_rings[i]->tx_stats));
502 }
503 }
504 vsi->stat_offsets_loaded = false;
505 }
506
507 /**
508 * i40e_pf_reset_stats - Reset all of the stats for the given PF
509 * @pf: the PF to be reset
510 **/
511 void i40e_pf_reset_stats(struct i40e_pf *pf)
512 {
513 int i;
514
515 memset(&pf->stats, 0, sizeof(pf->stats));
516 memset(&pf->stats_offsets, 0, sizeof(pf->stats_offsets));
517 pf->stat_offsets_loaded = false;
518
519 for (i = 0; i < I40E_MAX_VEB; i++) {
520 if (pf->veb[i]) {
521 memset(&pf->veb[i]->stats, 0,
522 sizeof(pf->veb[i]->stats));
523 memset(&pf->veb[i]->stats_offsets, 0,
524 sizeof(pf->veb[i]->stats_offsets));
525 pf->veb[i]->stat_offsets_loaded = false;
526 }
527 }
528 pf->hw_csum_rx_error = 0;
529 }
530
531 /**
532 * i40e_stat_update48 - read and update a 48 bit stat from the chip
533 * @hw: ptr to the hardware info
534 * @hireg: the high 32 bit reg to read
535 * @loreg: the low 32 bit reg to read
536 * @offset_loaded: has the initial offset been loaded yet
537 * @offset: ptr to current offset value
538 * @stat: ptr to the stat
539 *
540 * Since the device stats are not reset at PFReset, they likely will not
541 * be zeroed when the driver starts. We'll save the first values read
542 * and use them as offsets to be subtracted from the raw values in order
543 * to report stats that count from zero. In the process, we also manage
544 * the potential roll-over.
545 **/
546 static void i40e_stat_update48(struct i40e_hw *hw, u32 hireg, u32 loreg,
547 bool offset_loaded, u64 *offset, u64 *stat)
548 {
549 u64 new_data;
550
551 if (hw->device_id == I40E_DEV_ID_QEMU) {
552 new_data = rd32(hw, loreg);
553 new_data |= ((u64)(rd32(hw, hireg) & 0xFFFF)) << 32;
554 } else {
555 new_data = rd64(hw, loreg);
556 }
557 if (!offset_loaded)
558 *offset = new_data;
559 if (likely(new_data >= *offset))
560 *stat = new_data - *offset;
561 else
562 *stat = (new_data + BIT_ULL(48)) - *offset;
563 *stat &= 0xFFFFFFFFFFFFULL;
564 }
565
566 /**
567 * i40e_stat_update32 - read and update a 32 bit stat from the chip
568 * @hw: ptr to the hardware info
569 * @reg: the hw reg to read
570 * @offset_loaded: has the initial offset been loaded yet
571 * @offset: ptr to current offset value
572 * @stat: ptr to the stat
573 **/
574 static void i40e_stat_update32(struct i40e_hw *hw, u32 reg,
575 bool offset_loaded, u64 *offset, u64 *stat)
576 {
577 u32 new_data;
578
579 new_data = rd32(hw, reg);
580 if (!offset_loaded)
581 *offset = new_data;
582 if (likely(new_data >= *offset))
583 *stat = (u32)(new_data - *offset);
584 else
585 *stat = (u32)((new_data + BIT_ULL(32)) - *offset);
586 }
587
588 /**
589 * i40e_update_eth_stats - Update VSI-specific ethernet statistics counters.
590 * @vsi: the VSI to be updated
591 **/
592 void i40e_update_eth_stats(struct i40e_vsi *vsi)
593 {
594 int stat_idx = le16_to_cpu(vsi->info.stat_counter_idx);
595 struct i40e_pf *pf = vsi->back;
596 struct i40e_hw *hw = &pf->hw;
597 struct i40e_eth_stats *oes;
598 struct i40e_eth_stats *es; /* device's eth stats */
599
600 es = &vsi->eth_stats;
601 oes = &vsi->eth_stats_offsets;
602
603 /* Gather up the stats that the hw collects */
604 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
605 vsi->stat_offsets_loaded,
606 &oes->tx_errors, &es->tx_errors);
607 i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx),
608 vsi->stat_offsets_loaded,
609 &oes->rx_discards, &es->rx_discards);
610 i40e_stat_update32(hw, I40E_GLV_RUPP(stat_idx),
611 vsi->stat_offsets_loaded,
612 &oes->rx_unknown_protocol, &es->rx_unknown_protocol);
613 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
614 vsi->stat_offsets_loaded,
615 &oes->tx_errors, &es->tx_errors);
616
617 i40e_stat_update48(hw, I40E_GLV_GORCH(stat_idx),
618 I40E_GLV_GORCL(stat_idx),
619 vsi->stat_offsets_loaded,
620 &oes->rx_bytes, &es->rx_bytes);
621 i40e_stat_update48(hw, I40E_GLV_UPRCH(stat_idx),
622 I40E_GLV_UPRCL(stat_idx),
623 vsi->stat_offsets_loaded,
624 &oes->rx_unicast, &es->rx_unicast);
625 i40e_stat_update48(hw, I40E_GLV_MPRCH(stat_idx),
626 I40E_GLV_MPRCL(stat_idx),
627 vsi->stat_offsets_loaded,
628 &oes->rx_multicast, &es->rx_multicast);
629 i40e_stat_update48(hw, I40E_GLV_BPRCH(stat_idx),
630 I40E_GLV_BPRCL(stat_idx),
631 vsi->stat_offsets_loaded,
632 &oes->rx_broadcast, &es->rx_broadcast);
633
634 i40e_stat_update48(hw, I40E_GLV_GOTCH(stat_idx),
635 I40E_GLV_GOTCL(stat_idx),
636 vsi->stat_offsets_loaded,
637 &oes->tx_bytes, &es->tx_bytes);
638 i40e_stat_update48(hw, I40E_GLV_UPTCH(stat_idx),
639 I40E_GLV_UPTCL(stat_idx),
640 vsi->stat_offsets_loaded,
641 &oes->tx_unicast, &es->tx_unicast);
642 i40e_stat_update48(hw, I40E_GLV_MPTCH(stat_idx),
643 I40E_GLV_MPTCL(stat_idx),
644 vsi->stat_offsets_loaded,
645 &oes->tx_multicast, &es->tx_multicast);
646 i40e_stat_update48(hw, I40E_GLV_BPTCH(stat_idx),
647 I40E_GLV_BPTCL(stat_idx),
648 vsi->stat_offsets_loaded,
649 &oes->tx_broadcast, &es->tx_broadcast);
650 vsi->stat_offsets_loaded = true;
651 }
652
653 /**
654 * i40e_update_veb_stats - Update Switch component statistics
655 * @veb: the VEB being updated
656 **/
657 static void i40e_update_veb_stats(struct i40e_veb *veb)
658 {
659 struct i40e_pf *pf = veb->pf;
660 struct i40e_hw *hw = &pf->hw;
661 struct i40e_eth_stats *oes;
662 struct i40e_eth_stats *es; /* device's eth stats */
663 struct i40e_veb_tc_stats *veb_oes;
664 struct i40e_veb_tc_stats *veb_es;
665 int i, idx = 0;
666
667 idx = veb->stats_idx;
668 es = &veb->stats;
669 oes = &veb->stats_offsets;
670 veb_es = &veb->tc_stats;
671 veb_oes = &veb->tc_stats_offsets;
672
673 /* Gather up the stats that the hw collects */
674 i40e_stat_update32(hw, I40E_GLSW_TDPC(idx),
675 veb->stat_offsets_loaded,
676 &oes->tx_discards, &es->tx_discards);
677 if (hw->revision_id > 0)
678 i40e_stat_update32(hw, I40E_GLSW_RUPP(idx),
679 veb->stat_offsets_loaded,
680 &oes->rx_unknown_protocol,
681 &es->rx_unknown_protocol);
682 i40e_stat_update48(hw, I40E_GLSW_GORCH(idx), I40E_GLSW_GORCL(idx),
683 veb->stat_offsets_loaded,
684 &oes->rx_bytes, &es->rx_bytes);
685 i40e_stat_update48(hw, I40E_GLSW_UPRCH(idx), I40E_GLSW_UPRCL(idx),
686 veb->stat_offsets_loaded,
687 &oes->rx_unicast, &es->rx_unicast);
688 i40e_stat_update48(hw, I40E_GLSW_MPRCH(idx), I40E_GLSW_MPRCL(idx),
689 veb->stat_offsets_loaded,
690 &oes->rx_multicast, &es->rx_multicast);
691 i40e_stat_update48(hw, I40E_GLSW_BPRCH(idx), I40E_GLSW_BPRCL(idx),
692 veb->stat_offsets_loaded,
693 &oes->rx_broadcast, &es->rx_broadcast);
694
695 i40e_stat_update48(hw, I40E_GLSW_GOTCH(idx), I40E_GLSW_GOTCL(idx),
696 veb->stat_offsets_loaded,
697 &oes->tx_bytes, &es->tx_bytes);
698 i40e_stat_update48(hw, I40E_GLSW_UPTCH(idx), I40E_GLSW_UPTCL(idx),
699 veb->stat_offsets_loaded,
700 &oes->tx_unicast, &es->tx_unicast);
701 i40e_stat_update48(hw, I40E_GLSW_MPTCH(idx), I40E_GLSW_MPTCL(idx),
702 veb->stat_offsets_loaded,
703 &oes->tx_multicast, &es->tx_multicast);
704 i40e_stat_update48(hw, I40E_GLSW_BPTCH(idx), I40E_GLSW_BPTCL(idx),
705 veb->stat_offsets_loaded,
706 &oes->tx_broadcast, &es->tx_broadcast);
707 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
708 i40e_stat_update48(hw, I40E_GLVEBTC_RPCH(i, idx),
709 I40E_GLVEBTC_RPCL(i, idx),
710 veb->stat_offsets_loaded,
711 &veb_oes->tc_rx_packets[i],
712 &veb_es->tc_rx_packets[i]);
713 i40e_stat_update48(hw, I40E_GLVEBTC_RBCH(i, idx),
714 I40E_GLVEBTC_RBCL(i, idx),
715 veb->stat_offsets_loaded,
716 &veb_oes->tc_rx_bytes[i],
717 &veb_es->tc_rx_bytes[i]);
718 i40e_stat_update48(hw, I40E_GLVEBTC_TPCH(i, idx),
719 I40E_GLVEBTC_TPCL(i, idx),
720 veb->stat_offsets_loaded,
721 &veb_oes->tc_tx_packets[i],
722 &veb_es->tc_tx_packets[i]);
723 i40e_stat_update48(hw, I40E_GLVEBTC_TBCH(i, idx),
724 I40E_GLVEBTC_TBCL(i, idx),
725 veb->stat_offsets_loaded,
726 &veb_oes->tc_tx_bytes[i],
727 &veb_es->tc_tx_bytes[i]);
728 }
729 veb->stat_offsets_loaded = true;
730 }
731
732 #ifdef I40E_FCOE
733 /**
734 * i40e_update_fcoe_stats - Update FCoE-specific ethernet statistics counters.
735 * @vsi: the VSI that is capable of doing FCoE
736 **/
737 static void i40e_update_fcoe_stats(struct i40e_vsi *vsi)
738 {
739 struct i40e_pf *pf = vsi->back;
740 struct i40e_hw *hw = &pf->hw;
741 struct i40e_fcoe_stats *ofs;
742 struct i40e_fcoe_stats *fs; /* device's eth stats */
743 int idx;
744
745 if (vsi->type != I40E_VSI_FCOE)
746 return;
747
748 idx = hw->pf_id + I40E_FCOE_PF_STAT_OFFSET;
749 fs = &vsi->fcoe_stats;
750 ofs = &vsi->fcoe_stats_offsets;
751
752 i40e_stat_update32(hw, I40E_GL_FCOEPRC(idx),
753 vsi->fcoe_stat_offsets_loaded,
754 &ofs->rx_fcoe_packets, &fs->rx_fcoe_packets);
755 i40e_stat_update48(hw, I40E_GL_FCOEDWRCH(idx), I40E_GL_FCOEDWRCL(idx),
756 vsi->fcoe_stat_offsets_loaded,
757 &ofs->rx_fcoe_dwords, &fs->rx_fcoe_dwords);
758 i40e_stat_update32(hw, I40E_GL_FCOERPDC(idx),
759 vsi->fcoe_stat_offsets_loaded,
760 &ofs->rx_fcoe_dropped, &fs->rx_fcoe_dropped);
761 i40e_stat_update32(hw, I40E_GL_FCOEPTC(idx),
762 vsi->fcoe_stat_offsets_loaded,
763 &ofs->tx_fcoe_packets, &fs->tx_fcoe_packets);
764 i40e_stat_update48(hw, I40E_GL_FCOEDWTCH(idx), I40E_GL_FCOEDWTCL(idx),
765 vsi->fcoe_stat_offsets_loaded,
766 &ofs->tx_fcoe_dwords, &fs->tx_fcoe_dwords);
767 i40e_stat_update32(hw, I40E_GL_FCOECRC(idx),
768 vsi->fcoe_stat_offsets_loaded,
769 &ofs->fcoe_bad_fccrc, &fs->fcoe_bad_fccrc);
770 i40e_stat_update32(hw, I40E_GL_FCOELAST(idx),
771 vsi->fcoe_stat_offsets_loaded,
772 &ofs->fcoe_last_error, &fs->fcoe_last_error);
773 i40e_stat_update32(hw, I40E_GL_FCOEDDPC(idx),
774 vsi->fcoe_stat_offsets_loaded,
775 &ofs->fcoe_ddp_count, &fs->fcoe_ddp_count);
776
777 vsi->fcoe_stat_offsets_loaded = true;
778 }
779
780 #endif
781 /**
782 * i40e_update_vsi_stats - Update the vsi statistics counters.
783 * @vsi: the VSI to be updated
784 *
785 * There are a few instances where we store the same stat in a
786 * couple of different structs. This is partly because we have
787 * the netdev stats that need to be filled out, which is slightly
788 * different from the "eth_stats" defined by the chip and used in
789 * VF communications. We sort it out here.
790 **/
791 static void i40e_update_vsi_stats(struct i40e_vsi *vsi)
792 {
793 struct i40e_pf *pf = vsi->back;
794 struct rtnl_link_stats64 *ons;
795 struct rtnl_link_stats64 *ns; /* netdev stats */
796 struct i40e_eth_stats *oes;
797 struct i40e_eth_stats *es; /* device's eth stats */
798 u32 tx_restart, tx_busy;
799 u64 tx_lost_interrupt;
800 struct i40e_ring *p;
801 u32 rx_page, rx_buf;
802 u64 bytes, packets;
803 unsigned int start;
804 u64 tx_linearize;
805 u64 tx_force_wb;
806 u64 rx_p, rx_b;
807 u64 tx_p, tx_b;
808 u16 q;
809
810 if (test_bit(__I40E_DOWN, &vsi->state) ||
811 test_bit(__I40E_CONFIG_BUSY, &pf->state))
812 return;
813
814 ns = i40e_get_vsi_stats_struct(vsi);
815 ons = &vsi->net_stats_offsets;
816 es = &vsi->eth_stats;
817 oes = &vsi->eth_stats_offsets;
818
819 /* Gather up the netdev and vsi stats that the driver collects
820 * on the fly during packet processing
821 */
822 rx_b = rx_p = 0;
823 tx_b = tx_p = 0;
824 tx_restart = tx_busy = tx_linearize = tx_force_wb = 0;
825 tx_lost_interrupt = 0;
826 rx_page = 0;
827 rx_buf = 0;
828 rcu_read_lock();
829 for (q = 0; q < vsi->num_queue_pairs; q++) {
830 /* locate Tx ring */
831 p = ACCESS_ONCE(vsi->tx_rings[q]);
832
833 do {
834 start = u64_stats_fetch_begin_irq(&p->syncp);
835 packets = p->stats.packets;
836 bytes = p->stats.bytes;
837 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
838 tx_b += bytes;
839 tx_p += packets;
840 tx_restart += p->tx_stats.restart_queue;
841 tx_busy += p->tx_stats.tx_busy;
842 tx_linearize += p->tx_stats.tx_linearize;
843 tx_force_wb += p->tx_stats.tx_force_wb;
844 tx_lost_interrupt += p->tx_stats.tx_lost_interrupt;
845
846 /* Rx queue is part of the same block as Tx queue */
847 p = &p[1];
848 do {
849 start = u64_stats_fetch_begin_irq(&p->syncp);
850 packets = p->stats.packets;
851 bytes = p->stats.bytes;
852 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
853 rx_b += bytes;
854 rx_p += packets;
855 rx_buf += p->rx_stats.alloc_buff_failed;
856 rx_page += p->rx_stats.alloc_page_failed;
857 }
858 rcu_read_unlock();
859 vsi->tx_restart = tx_restart;
860 vsi->tx_busy = tx_busy;
861 vsi->tx_linearize = tx_linearize;
862 vsi->tx_force_wb = tx_force_wb;
863 vsi->tx_lost_interrupt = tx_lost_interrupt;
864 vsi->rx_page_failed = rx_page;
865 vsi->rx_buf_failed = rx_buf;
866
867 ns->rx_packets = rx_p;
868 ns->rx_bytes = rx_b;
869 ns->tx_packets = tx_p;
870 ns->tx_bytes = tx_b;
871
872 /* update netdev stats from eth stats */
873 i40e_update_eth_stats(vsi);
874 ons->tx_errors = oes->tx_errors;
875 ns->tx_errors = es->tx_errors;
876 ons->multicast = oes->rx_multicast;
877 ns->multicast = es->rx_multicast;
878 ons->rx_dropped = oes->rx_discards;
879 ns->rx_dropped = es->rx_discards;
880 ons->tx_dropped = oes->tx_discards;
881 ns->tx_dropped = es->tx_discards;
882
883 /* pull in a couple PF stats if this is the main vsi */
884 if (vsi == pf->vsi[pf->lan_vsi]) {
885 ns->rx_crc_errors = pf->stats.crc_errors;
886 ns->rx_errors = pf->stats.crc_errors + pf->stats.illegal_bytes;
887 ns->rx_length_errors = pf->stats.rx_length_errors;
888 }
889 }
890
891 /**
892 * i40e_update_pf_stats - Update the PF statistics counters.
893 * @pf: the PF to be updated
894 **/
895 static void i40e_update_pf_stats(struct i40e_pf *pf)
896 {
897 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
898 struct i40e_hw_port_stats *nsd = &pf->stats;
899 struct i40e_hw *hw = &pf->hw;
900 u32 val;
901 int i;
902
903 i40e_stat_update48(hw, I40E_GLPRT_GORCH(hw->port),
904 I40E_GLPRT_GORCL(hw->port),
905 pf->stat_offsets_loaded,
906 &osd->eth.rx_bytes, &nsd->eth.rx_bytes);
907 i40e_stat_update48(hw, I40E_GLPRT_GOTCH(hw->port),
908 I40E_GLPRT_GOTCL(hw->port),
909 pf->stat_offsets_loaded,
910 &osd->eth.tx_bytes, &nsd->eth.tx_bytes);
911 i40e_stat_update32(hw, I40E_GLPRT_RDPC(hw->port),
912 pf->stat_offsets_loaded,
913 &osd->eth.rx_discards,
914 &nsd->eth.rx_discards);
915 i40e_stat_update48(hw, I40E_GLPRT_UPRCH(hw->port),
916 I40E_GLPRT_UPRCL(hw->port),
917 pf->stat_offsets_loaded,
918 &osd->eth.rx_unicast,
919 &nsd->eth.rx_unicast);
920 i40e_stat_update48(hw, I40E_GLPRT_MPRCH(hw->port),
921 I40E_GLPRT_MPRCL(hw->port),
922 pf->stat_offsets_loaded,
923 &osd->eth.rx_multicast,
924 &nsd->eth.rx_multicast);
925 i40e_stat_update48(hw, I40E_GLPRT_BPRCH(hw->port),
926 I40E_GLPRT_BPRCL(hw->port),
927 pf->stat_offsets_loaded,
928 &osd->eth.rx_broadcast,
929 &nsd->eth.rx_broadcast);
930 i40e_stat_update48(hw, I40E_GLPRT_UPTCH(hw->port),
931 I40E_GLPRT_UPTCL(hw->port),
932 pf->stat_offsets_loaded,
933 &osd->eth.tx_unicast,
934 &nsd->eth.tx_unicast);
935 i40e_stat_update48(hw, I40E_GLPRT_MPTCH(hw->port),
936 I40E_GLPRT_MPTCL(hw->port),
937 pf->stat_offsets_loaded,
938 &osd->eth.tx_multicast,
939 &nsd->eth.tx_multicast);
940 i40e_stat_update48(hw, I40E_GLPRT_BPTCH(hw->port),
941 I40E_GLPRT_BPTCL(hw->port),
942 pf->stat_offsets_loaded,
943 &osd->eth.tx_broadcast,
944 &nsd->eth.tx_broadcast);
945
946 i40e_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port),
947 pf->stat_offsets_loaded,
948 &osd->tx_dropped_link_down,
949 &nsd->tx_dropped_link_down);
950
951 i40e_stat_update32(hw, I40E_GLPRT_CRCERRS(hw->port),
952 pf->stat_offsets_loaded,
953 &osd->crc_errors, &nsd->crc_errors);
954
955 i40e_stat_update32(hw, I40E_GLPRT_ILLERRC(hw->port),
956 pf->stat_offsets_loaded,
957 &osd->illegal_bytes, &nsd->illegal_bytes);
958
959 i40e_stat_update32(hw, I40E_GLPRT_MLFC(hw->port),
960 pf->stat_offsets_loaded,
961 &osd->mac_local_faults,
962 &nsd->mac_local_faults);
963 i40e_stat_update32(hw, I40E_GLPRT_MRFC(hw->port),
964 pf->stat_offsets_loaded,
965 &osd->mac_remote_faults,
966 &nsd->mac_remote_faults);
967
968 i40e_stat_update32(hw, I40E_GLPRT_RLEC(hw->port),
969 pf->stat_offsets_loaded,
970 &osd->rx_length_errors,
971 &nsd->rx_length_errors);
972
973 i40e_stat_update32(hw, I40E_GLPRT_LXONRXC(hw->port),
974 pf->stat_offsets_loaded,
975 &osd->link_xon_rx, &nsd->link_xon_rx);
976 i40e_stat_update32(hw, I40E_GLPRT_LXONTXC(hw->port),
977 pf->stat_offsets_loaded,
978 &osd->link_xon_tx, &nsd->link_xon_tx);
979 i40e_stat_update32(hw, I40E_GLPRT_LXOFFRXC(hw->port),
980 pf->stat_offsets_loaded,
981 &osd->link_xoff_rx, &nsd->link_xoff_rx);
982 i40e_stat_update32(hw, I40E_GLPRT_LXOFFTXC(hw->port),
983 pf->stat_offsets_loaded,
984 &osd->link_xoff_tx, &nsd->link_xoff_tx);
985
986 for (i = 0; i < 8; i++) {
987 i40e_stat_update32(hw, I40E_GLPRT_PXOFFRXC(hw->port, i),
988 pf->stat_offsets_loaded,
989 &osd->priority_xoff_rx[i],
990 &nsd->priority_xoff_rx[i]);
991 i40e_stat_update32(hw, I40E_GLPRT_PXONRXC(hw->port, i),
992 pf->stat_offsets_loaded,
993 &osd->priority_xon_rx[i],
994 &nsd->priority_xon_rx[i]);
995 i40e_stat_update32(hw, I40E_GLPRT_PXONTXC(hw->port, i),
996 pf->stat_offsets_loaded,
997 &osd->priority_xon_tx[i],
998 &nsd->priority_xon_tx[i]);
999 i40e_stat_update32(hw, I40E_GLPRT_PXOFFTXC(hw->port, i),
1000 pf->stat_offsets_loaded,
1001 &osd->priority_xoff_tx[i],
1002 &nsd->priority_xoff_tx[i]);
1003 i40e_stat_update32(hw,
1004 I40E_GLPRT_RXON2OFFCNT(hw->port, i),
1005 pf->stat_offsets_loaded,
1006 &osd->priority_xon_2_xoff[i],
1007 &nsd->priority_xon_2_xoff[i]);
1008 }
1009
1010 i40e_stat_update48(hw, I40E_GLPRT_PRC64H(hw->port),
1011 I40E_GLPRT_PRC64L(hw->port),
1012 pf->stat_offsets_loaded,
1013 &osd->rx_size_64, &nsd->rx_size_64);
1014 i40e_stat_update48(hw, I40E_GLPRT_PRC127H(hw->port),
1015 I40E_GLPRT_PRC127L(hw->port),
1016 pf->stat_offsets_loaded,
1017 &osd->rx_size_127, &nsd->rx_size_127);
1018 i40e_stat_update48(hw, I40E_GLPRT_PRC255H(hw->port),
1019 I40E_GLPRT_PRC255L(hw->port),
1020 pf->stat_offsets_loaded,
1021 &osd->rx_size_255, &nsd->rx_size_255);
1022 i40e_stat_update48(hw, I40E_GLPRT_PRC511H(hw->port),
1023 I40E_GLPRT_PRC511L(hw->port),
1024 pf->stat_offsets_loaded,
1025 &osd->rx_size_511, &nsd->rx_size_511);
1026 i40e_stat_update48(hw, I40E_GLPRT_PRC1023H(hw->port),
1027 I40E_GLPRT_PRC1023L(hw->port),
1028 pf->stat_offsets_loaded,
1029 &osd->rx_size_1023, &nsd->rx_size_1023);
1030 i40e_stat_update48(hw, I40E_GLPRT_PRC1522H(hw->port),
1031 I40E_GLPRT_PRC1522L(hw->port),
1032 pf->stat_offsets_loaded,
1033 &osd->rx_size_1522, &nsd->rx_size_1522);
1034 i40e_stat_update48(hw, I40E_GLPRT_PRC9522H(hw->port),
1035 I40E_GLPRT_PRC9522L(hw->port),
1036 pf->stat_offsets_loaded,
1037 &osd->rx_size_big, &nsd->rx_size_big);
1038
1039 i40e_stat_update48(hw, I40E_GLPRT_PTC64H(hw->port),
1040 I40E_GLPRT_PTC64L(hw->port),
1041 pf->stat_offsets_loaded,
1042 &osd->tx_size_64, &nsd->tx_size_64);
1043 i40e_stat_update48(hw, I40E_GLPRT_PTC127H(hw->port),
1044 I40E_GLPRT_PTC127L(hw->port),
1045 pf->stat_offsets_loaded,
1046 &osd->tx_size_127, &nsd->tx_size_127);
1047 i40e_stat_update48(hw, I40E_GLPRT_PTC255H(hw->port),
1048 I40E_GLPRT_PTC255L(hw->port),
1049 pf->stat_offsets_loaded,
1050 &osd->tx_size_255, &nsd->tx_size_255);
1051 i40e_stat_update48(hw, I40E_GLPRT_PTC511H(hw->port),
1052 I40E_GLPRT_PTC511L(hw->port),
1053 pf->stat_offsets_loaded,
1054 &osd->tx_size_511, &nsd->tx_size_511);
1055 i40e_stat_update48(hw, I40E_GLPRT_PTC1023H(hw->port),
1056 I40E_GLPRT_PTC1023L(hw->port),
1057 pf->stat_offsets_loaded,
1058 &osd->tx_size_1023, &nsd->tx_size_1023);
1059 i40e_stat_update48(hw, I40E_GLPRT_PTC1522H(hw->port),
1060 I40E_GLPRT_PTC1522L(hw->port),
1061 pf->stat_offsets_loaded,
1062 &osd->tx_size_1522, &nsd->tx_size_1522);
1063 i40e_stat_update48(hw, I40E_GLPRT_PTC9522H(hw->port),
1064 I40E_GLPRT_PTC9522L(hw->port),
1065 pf->stat_offsets_loaded,
1066 &osd->tx_size_big, &nsd->tx_size_big);
1067
1068 i40e_stat_update32(hw, I40E_GLPRT_RUC(hw->port),
1069 pf->stat_offsets_loaded,
1070 &osd->rx_undersize, &nsd->rx_undersize);
1071 i40e_stat_update32(hw, I40E_GLPRT_RFC(hw->port),
1072 pf->stat_offsets_loaded,
1073 &osd->rx_fragments, &nsd->rx_fragments);
1074 i40e_stat_update32(hw, I40E_GLPRT_ROC(hw->port),
1075 pf->stat_offsets_loaded,
1076 &osd->rx_oversize, &nsd->rx_oversize);
1077 i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port),
1078 pf->stat_offsets_loaded,
1079 &osd->rx_jabber, &nsd->rx_jabber);
1080
1081 /* FDIR stats */
1082 i40e_stat_update32(hw,
1083 I40E_GLQF_PCNT(I40E_FD_ATR_STAT_IDX(pf->hw.pf_id)),
1084 pf->stat_offsets_loaded,
1085 &osd->fd_atr_match, &nsd->fd_atr_match);
1086 i40e_stat_update32(hw,
1087 I40E_GLQF_PCNT(I40E_FD_SB_STAT_IDX(pf->hw.pf_id)),
1088 pf->stat_offsets_loaded,
1089 &osd->fd_sb_match, &nsd->fd_sb_match);
1090 i40e_stat_update32(hw,
1091 I40E_GLQF_PCNT(I40E_FD_ATR_TUNNEL_STAT_IDX(pf->hw.pf_id)),
1092 pf->stat_offsets_loaded,
1093 &osd->fd_atr_tunnel_match, &nsd->fd_atr_tunnel_match);
1094
1095 val = rd32(hw, I40E_PRTPM_EEE_STAT);
1096 nsd->tx_lpi_status =
1097 (val & I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_MASK) >>
1098 I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_SHIFT;
1099 nsd->rx_lpi_status =
1100 (val & I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_MASK) >>
1101 I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_SHIFT;
1102 i40e_stat_update32(hw, I40E_PRTPM_TLPIC,
1103 pf->stat_offsets_loaded,
1104 &osd->tx_lpi_count, &nsd->tx_lpi_count);
1105 i40e_stat_update32(hw, I40E_PRTPM_RLPIC,
1106 pf->stat_offsets_loaded,
1107 &osd->rx_lpi_count, &nsd->rx_lpi_count);
1108
1109 if (pf->flags & I40E_FLAG_FD_SB_ENABLED &&
1110 !(pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED))
1111 nsd->fd_sb_status = true;
1112 else
1113 nsd->fd_sb_status = false;
1114
1115 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED &&
1116 !(pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED))
1117 nsd->fd_atr_status = true;
1118 else
1119 nsd->fd_atr_status = false;
1120
1121 pf->stat_offsets_loaded = true;
1122 }
1123
1124 /**
1125 * i40e_update_stats - Update the various statistics counters.
1126 * @vsi: the VSI to be updated
1127 *
1128 * Update the various stats for this VSI and its related entities.
1129 **/
1130 void i40e_update_stats(struct i40e_vsi *vsi)
1131 {
1132 struct i40e_pf *pf = vsi->back;
1133
1134 if (vsi == pf->vsi[pf->lan_vsi])
1135 i40e_update_pf_stats(pf);
1136
1137 i40e_update_vsi_stats(vsi);
1138 #ifdef I40E_FCOE
1139 i40e_update_fcoe_stats(vsi);
1140 #endif
1141 }
1142
1143 /**
1144 * i40e_find_filter - Search VSI filter list for specific mac/vlan filter
1145 * @vsi: the VSI to be searched
1146 * @macaddr: the MAC address
1147 * @vlan: the vlan
1148 * @is_vf: make sure its a VF filter, else doesn't matter
1149 * @is_netdev: make sure its a netdev filter, else doesn't matter
1150 *
1151 * Returns ptr to the filter object or NULL
1152 **/
1153 static struct i40e_mac_filter *i40e_find_filter(struct i40e_vsi *vsi,
1154 u8 *macaddr, s16 vlan,
1155 bool is_vf, bool is_netdev)
1156 {
1157 struct i40e_mac_filter *f;
1158
1159 if (!vsi || !macaddr)
1160 return NULL;
1161
1162 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1163 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1164 (vlan == f->vlan) &&
1165 (!is_vf || f->is_vf) &&
1166 (!is_netdev || f->is_netdev))
1167 return f;
1168 }
1169 return NULL;
1170 }
1171
1172 /**
1173 * i40e_find_mac - Find a mac addr in the macvlan filters list
1174 * @vsi: the VSI to be searched
1175 * @macaddr: the MAC address we are searching for
1176 * @is_vf: make sure its a VF filter, else doesn't matter
1177 * @is_netdev: make sure its a netdev filter, else doesn't matter
1178 *
1179 * Returns the first filter with the provided MAC address or NULL if
1180 * MAC address was not found
1181 **/
1182 struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, u8 *macaddr,
1183 bool is_vf, bool is_netdev)
1184 {
1185 struct i40e_mac_filter *f;
1186
1187 if (!vsi || !macaddr)
1188 return NULL;
1189
1190 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1191 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1192 (!is_vf || f->is_vf) &&
1193 (!is_netdev || f->is_netdev))
1194 return f;
1195 }
1196 return NULL;
1197 }
1198
1199 /**
1200 * i40e_is_vsi_in_vlan - Check if VSI is in vlan mode
1201 * @vsi: the VSI to be searched
1202 *
1203 * Returns true if VSI is in vlan mode or false otherwise
1204 **/
1205 bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi)
1206 {
1207 struct i40e_mac_filter *f;
1208
1209 /* Only -1 for all the filters denotes not in vlan mode
1210 * so we have to go through all the list in order to make sure
1211 */
1212 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1213 if (f->vlan >= 0 || vsi->info.pvid)
1214 return true;
1215 }
1216
1217 return false;
1218 }
1219
1220 /**
1221 * i40e_put_mac_in_vlan - Make macvlan filters from macaddrs and vlans
1222 * @vsi: the VSI to be searched
1223 * @macaddr: the mac address to be filtered
1224 * @is_vf: true if it is a VF
1225 * @is_netdev: true if it is a netdev
1226 *
1227 * Goes through all the macvlan filters and adds a
1228 * macvlan filter for each unique vlan that already exists
1229 *
1230 * Returns first filter found on success, else NULL
1231 **/
1232 struct i40e_mac_filter *i40e_put_mac_in_vlan(struct i40e_vsi *vsi, u8 *macaddr,
1233 bool is_vf, bool is_netdev)
1234 {
1235 struct i40e_mac_filter *f;
1236
1237 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1238 if (vsi->info.pvid)
1239 f->vlan = le16_to_cpu(vsi->info.pvid);
1240 if (!i40e_find_filter(vsi, macaddr, f->vlan,
1241 is_vf, is_netdev)) {
1242 if (!i40e_add_filter(vsi, macaddr, f->vlan,
1243 is_vf, is_netdev))
1244 return NULL;
1245 }
1246 }
1247
1248 return list_first_entry_or_null(&vsi->mac_filter_list,
1249 struct i40e_mac_filter, list);
1250 }
1251
1252 /**
1253 * i40e_del_mac_all_vlan - Remove a MAC filter from all VLANS
1254 * @vsi: the VSI to be searched
1255 * @macaddr: the mac address to be removed
1256 * @is_vf: true if it is a VF
1257 * @is_netdev: true if it is a netdev
1258 *
1259 * Removes a given MAC address from a VSI, regardless of VLAN
1260 *
1261 * Returns 0 for success, or error
1262 **/
1263 int i40e_del_mac_all_vlan(struct i40e_vsi *vsi, u8 *macaddr,
1264 bool is_vf, bool is_netdev)
1265 {
1266 struct i40e_mac_filter *f = NULL;
1267 int changed = 0;
1268
1269 WARN(!spin_is_locked(&vsi->mac_filter_list_lock),
1270 "Missing mac_filter_list_lock\n");
1271 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1272 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1273 (is_vf == f->is_vf) &&
1274 (is_netdev == f->is_netdev)) {
1275 f->counter--;
1276 changed = 1;
1277 if (f->counter == 0)
1278 f->state = I40E_FILTER_REMOVE;
1279 }
1280 }
1281 if (changed) {
1282 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1283 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1284 return 0;
1285 }
1286 return -ENOENT;
1287 }
1288
1289 /**
1290 * i40e_rm_default_mac_filter - Remove the default MAC filter set by NVM
1291 * @vsi: the PF Main VSI - inappropriate for any other VSI
1292 * @macaddr: the MAC address
1293 *
1294 * Remove whatever filter the firmware set up so the driver can manage
1295 * its own filtering intelligently.
1296 **/
1297 static void i40e_rm_default_mac_filter(struct i40e_vsi *vsi, u8 *macaddr)
1298 {
1299 struct i40e_aqc_remove_macvlan_element_data element;
1300 struct i40e_pf *pf = vsi->back;
1301
1302 /* Only appropriate for the PF main VSI */
1303 if (vsi->type != I40E_VSI_MAIN)
1304 return;
1305
1306 memset(&element, 0, sizeof(element));
1307 ether_addr_copy(element.mac_addr, macaddr);
1308 element.vlan_tag = 0;
1309 /* Ignore error returns, some firmware does it this way... */
1310 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1311 i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1312
1313 memset(&element, 0, sizeof(element));
1314 ether_addr_copy(element.mac_addr, macaddr);
1315 element.vlan_tag = 0;
1316 /* ...and some firmware does it this way. */
1317 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH |
1318 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
1319 i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1320 }
1321
1322 /**
1323 * i40e_add_filter - Add a mac/vlan filter to the VSI
1324 * @vsi: the VSI to be searched
1325 * @macaddr: the MAC address
1326 * @vlan: the vlan
1327 * @is_vf: make sure its a VF filter, else doesn't matter
1328 * @is_netdev: make sure its a netdev filter, else doesn't matter
1329 *
1330 * Returns ptr to the filter object or NULL when no memory available.
1331 *
1332 * NOTE: This function is expected to be called with mac_filter_list_lock
1333 * being held.
1334 **/
1335 struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
1336 u8 *macaddr, s16 vlan,
1337 bool is_vf, bool is_netdev)
1338 {
1339 struct i40e_mac_filter *f;
1340 int changed = false;
1341
1342 if (!vsi || !macaddr)
1343 return NULL;
1344
1345 /* Do not allow broadcast filter to be added since broadcast filter
1346 * is added as part of add VSI for any newly created VSI except
1347 * FDIR VSI
1348 */
1349 if (is_broadcast_ether_addr(macaddr))
1350 return NULL;
1351
1352 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1353 if (!f) {
1354 f = kzalloc(sizeof(*f), GFP_ATOMIC);
1355 if (!f)
1356 goto add_filter_out;
1357
1358 ether_addr_copy(f->macaddr, macaddr);
1359 f->vlan = vlan;
1360 /* If we're in overflow promisc mode, set the state directly
1361 * to failed, so we don't bother to try sending the filter
1362 * to the hardware.
1363 */
1364 if (test_bit(__I40E_FILTER_OVERFLOW_PROMISC, &vsi->state))
1365 f->state = I40E_FILTER_FAILED;
1366 else
1367 f->state = I40E_FILTER_NEW;
1368 changed = true;
1369 INIT_LIST_HEAD(&f->list);
1370 list_add_tail(&f->list, &vsi->mac_filter_list);
1371 }
1372
1373 /* increment counter and add a new flag if needed */
1374 if (is_vf) {
1375 if (!f->is_vf) {
1376 f->is_vf = true;
1377 f->counter++;
1378 }
1379 } else if (is_netdev) {
1380 if (!f->is_netdev) {
1381 f->is_netdev = true;
1382 f->counter++;
1383 }
1384 } else {
1385 f->counter++;
1386 }
1387
1388 if (changed) {
1389 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1390 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1391 }
1392
1393 add_filter_out:
1394 return f;
1395 }
1396
1397 /**
1398 * i40e_del_filter - Remove a mac/vlan filter from the VSI
1399 * @vsi: the VSI to be searched
1400 * @macaddr: the MAC address
1401 * @vlan: the vlan
1402 * @is_vf: make sure it's a VF filter, else doesn't matter
1403 * @is_netdev: make sure it's a netdev filter, else doesn't matter
1404 *
1405 * NOTE: This function is expected to be called with mac_filter_list_lock
1406 * being held.
1407 * ANOTHER NOTE: This function MUST be called from within the context of
1408 * the "safe" variants of any list iterators, e.g. list_for_each_entry_safe()
1409 * instead of list_for_each_entry().
1410 **/
1411 void i40e_del_filter(struct i40e_vsi *vsi,
1412 u8 *macaddr, s16 vlan,
1413 bool is_vf, bool is_netdev)
1414 {
1415 struct i40e_mac_filter *f;
1416
1417 if (!vsi || !macaddr)
1418 return;
1419
1420 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1421 if (!f || f->counter == 0)
1422 return;
1423
1424 if (is_vf) {
1425 if (f->is_vf) {
1426 f->is_vf = false;
1427 f->counter--;
1428 }
1429 } else if (is_netdev) {
1430 if (f->is_netdev) {
1431 f->is_netdev = false;
1432 f->counter--;
1433 }
1434 } else {
1435 /* make sure we don't remove a filter in use by VF or netdev */
1436 int min_f = 0;
1437
1438 min_f += (f->is_vf ? 1 : 0);
1439 min_f += (f->is_netdev ? 1 : 0);
1440
1441 if (f->counter > min_f)
1442 f->counter--;
1443 }
1444
1445 /* counter == 0 tells sync_filters_subtask to
1446 * remove the filter from the firmware's list
1447 */
1448 if (f->counter == 0) {
1449 if ((f->state == I40E_FILTER_FAILED) ||
1450 (f->state == I40E_FILTER_NEW)) {
1451 /* this one never got added by the FW. Just remove it,
1452 * no need to sync anything.
1453 */
1454 list_del(&f->list);
1455 kfree(f);
1456 } else {
1457 f->state = I40E_FILTER_REMOVE;
1458 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1459 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1460 }
1461 }
1462 }
1463
1464 /**
1465 * i40e_set_mac - NDO callback to set mac address
1466 * @netdev: network interface device structure
1467 * @p: pointer to an address structure
1468 *
1469 * Returns 0 on success, negative on failure
1470 **/
1471 #ifdef I40E_FCOE
1472 int i40e_set_mac(struct net_device *netdev, void *p)
1473 #else
1474 static int i40e_set_mac(struct net_device *netdev, void *p)
1475 #endif
1476 {
1477 struct i40e_netdev_priv *np = netdev_priv(netdev);
1478 struct i40e_vsi *vsi = np->vsi;
1479 struct i40e_pf *pf = vsi->back;
1480 struct i40e_hw *hw = &pf->hw;
1481 struct sockaddr *addr = p;
1482
1483 if (!is_valid_ether_addr(addr->sa_data))
1484 return -EADDRNOTAVAIL;
1485
1486 if (ether_addr_equal(netdev->dev_addr, addr->sa_data)) {
1487 netdev_info(netdev, "already using mac address %pM\n",
1488 addr->sa_data);
1489 return 0;
1490 }
1491
1492 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
1493 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
1494 return -EADDRNOTAVAIL;
1495
1496 if (ether_addr_equal(hw->mac.addr, addr->sa_data))
1497 netdev_info(netdev, "returning to hw mac address %pM\n",
1498 hw->mac.addr);
1499 else
1500 netdev_info(netdev, "set new mac address %pM\n", addr->sa_data);
1501
1502 spin_lock_bh(&vsi->mac_filter_list_lock);
1503 i40e_del_mac_all_vlan(vsi, netdev->dev_addr, false, true);
1504 i40e_put_mac_in_vlan(vsi, addr->sa_data, false, true);
1505 spin_unlock_bh(&vsi->mac_filter_list_lock);
1506 ether_addr_copy(netdev->dev_addr, addr->sa_data);
1507 if (vsi->type == I40E_VSI_MAIN) {
1508 i40e_status ret;
1509
1510 ret = i40e_aq_mac_address_write(&vsi->back->hw,
1511 I40E_AQC_WRITE_TYPE_LAA_WOL,
1512 addr->sa_data, NULL);
1513 if (ret)
1514 netdev_info(netdev, "Ignoring error from firmware on LAA update, status %s, AQ ret %s\n",
1515 i40e_stat_str(hw, ret),
1516 i40e_aq_str(hw, hw->aq.asq_last_status));
1517 }
1518
1519 /* schedule our worker thread which will take care of
1520 * applying the new filter changes
1521 */
1522 i40e_service_event_schedule(vsi->back);
1523 return 0;
1524 }
1525
1526 /**
1527 * i40e_vsi_setup_queue_map - Setup a VSI queue map based on enabled_tc
1528 * @vsi: the VSI being setup
1529 * @ctxt: VSI context structure
1530 * @enabled_tc: Enabled TCs bitmap
1531 * @is_add: True if called before Add VSI
1532 *
1533 * Setup VSI queue mapping for enabled traffic classes.
1534 **/
1535 #ifdef I40E_FCOE
1536 void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1537 struct i40e_vsi_context *ctxt,
1538 u8 enabled_tc,
1539 bool is_add)
1540 #else
1541 static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1542 struct i40e_vsi_context *ctxt,
1543 u8 enabled_tc,
1544 bool is_add)
1545 #endif
1546 {
1547 struct i40e_pf *pf = vsi->back;
1548 u16 sections = 0;
1549 u8 netdev_tc = 0;
1550 u16 numtc = 0;
1551 u16 qcount;
1552 u8 offset;
1553 u16 qmap;
1554 int i;
1555 u16 num_tc_qps = 0;
1556
1557 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
1558 offset = 0;
1559
1560 if (enabled_tc && (vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
1561 /* Find numtc from enabled TC bitmap */
1562 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1563 if (enabled_tc & BIT(i)) /* TC is enabled */
1564 numtc++;
1565 }
1566 if (!numtc) {
1567 dev_warn(&pf->pdev->dev, "DCB is enabled but no TC enabled, forcing TC0\n");
1568 numtc = 1;
1569 }
1570 } else {
1571 /* At least TC0 is enabled in case of non-DCB case */
1572 numtc = 1;
1573 }
1574
1575 vsi->tc_config.numtc = numtc;
1576 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
1577 /* Number of queues per enabled TC */
1578 qcount = vsi->alloc_queue_pairs;
1579
1580 num_tc_qps = qcount / numtc;
1581 num_tc_qps = min_t(int, num_tc_qps, i40e_pf_get_max_q_per_tc(pf));
1582
1583 /* Setup queue offset/count for all TCs for given VSI */
1584 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1585 /* See if the given TC is enabled for the given VSI */
1586 if (vsi->tc_config.enabled_tc & BIT(i)) {
1587 /* TC is enabled */
1588 int pow, num_qps;
1589
1590 switch (vsi->type) {
1591 case I40E_VSI_MAIN:
1592 qcount = min_t(int, pf->alloc_rss_size,
1593 num_tc_qps);
1594 break;
1595 #ifdef I40E_FCOE
1596 case I40E_VSI_FCOE:
1597 qcount = num_tc_qps;
1598 break;
1599 #endif
1600 case I40E_VSI_FDIR:
1601 case I40E_VSI_SRIOV:
1602 case I40E_VSI_VMDQ2:
1603 default:
1604 qcount = num_tc_qps;
1605 WARN_ON(i != 0);
1606 break;
1607 }
1608 vsi->tc_config.tc_info[i].qoffset = offset;
1609 vsi->tc_config.tc_info[i].qcount = qcount;
1610
1611 /* find the next higher power-of-2 of num queue pairs */
1612 num_qps = qcount;
1613 pow = 0;
1614 while (num_qps && (BIT_ULL(pow) < qcount)) {
1615 pow++;
1616 num_qps >>= 1;
1617 }
1618
1619 vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++;
1620 qmap =
1621 (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
1622 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
1623
1624 offset += qcount;
1625 } else {
1626 /* TC is not enabled so set the offset to
1627 * default queue and allocate one queue
1628 * for the given TC.
1629 */
1630 vsi->tc_config.tc_info[i].qoffset = 0;
1631 vsi->tc_config.tc_info[i].qcount = 1;
1632 vsi->tc_config.tc_info[i].netdev_tc = 0;
1633
1634 qmap = 0;
1635 }
1636 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap);
1637 }
1638
1639 /* Set actual Tx/Rx queue pairs */
1640 vsi->num_queue_pairs = offset;
1641 if ((vsi->type == I40E_VSI_MAIN) && (numtc == 1)) {
1642 if (vsi->req_queue_pairs > 0)
1643 vsi->num_queue_pairs = vsi->req_queue_pairs;
1644 else if (pf->flags & I40E_FLAG_MSIX_ENABLED)
1645 vsi->num_queue_pairs = pf->num_lan_msix;
1646 }
1647
1648 /* Scheduler section valid can only be set for ADD VSI */
1649 if (is_add) {
1650 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
1651
1652 ctxt->info.up_enable_bits = enabled_tc;
1653 }
1654 if (vsi->type == I40E_VSI_SRIOV) {
1655 ctxt->info.mapping_flags |=
1656 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_NONCONTIG);
1657 for (i = 0; i < vsi->num_queue_pairs; i++)
1658 ctxt->info.queue_mapping[i] =
1659 cpu_to_le16(vsi->base_queue + i);
1660 } else {
1661 ctxt->info.mapping_flags |=
1662 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
1663 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
1664 }
1665 ctxt->info.valid_sections |= cpu_to_le16(sections);
1666 }
1667
1668 /**
1669 * i40e_set_rx_mode - NDO callback to set the netdev filters
1670 * @netdev: network interface device structure
1671 **/
1672 #ifdef I40E_FCOE
1673 void i40e_set_rx_mode(struct net_device *netdev)
1674 #else
1675 static void i40e_set_rx_mode(struct net_device *netdev)
1676 #endif
1677 {
1678 struct i40e_netdev_priv *np = netdev_priv(netdev);
1679 struct i40e_mac_filter *f, *ftmp;
1680 struct i40e_vsi *vsi = np->vsi;
1681 struct netdev_hw_addr *uca;
1682 struct netdev_hw_addr *mca;
1683 struct netdev_hw_addr *ha;
1684
1685 spin_lock_bh(&vsi->mac_filter_list_lock);
1686
1687 /* add addr if not already in the filter list */
1688 netdev_for_each_uc_addr(uca, netdev) {
1689 if (!i40e_find_mac(vsi, uca->addr, false, true)) {
1690 if (i40e_is_vsi_in_vlan(vsi))
1691 i40e_put_mac_in_vlan(vsi, uca->addr,
1692 false, true);
1693 else
1694 i40e_add_filter(vsi, uca->addr, I40E_VLAN_ANY,
1695 false, true);
1696 }
1697 }
1698
1699 netdev_for_each_mc_addr(mca, netdev) {
1700 if (!i40e_find_mac(vsi, mca->addr, false, true)) {
1701 if (i40e_is_vsi_in_vlan(vsi))
1702 i40e_put_mac_in_vlan(vsi, mca->addr,
1703 false, true);
1704 else
1705 i40e_add_filter(vsi, mca->addr, I40E_VLAN_ANY,
1706 false, true);
1707 }
1708 }
1709
1710 /* remove filter if not in netdev list */
1711 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1712
1713 if (!f->is_netdev)
1714 continue;
1715
1716 netdev_for_each_mc_addr(mca, netdev)
1717 if (ether_addr_equal(mca->addr, f->macaddr))
1718 goto bottom_of_search_loop;
1719
1720 netdev_for_each_uc_addr(uca, netdev)
1721 if (ether_addr_equal(uca->addr, f->macaddr))
1722 goto bottom_of_search_loop;
1723
1724 for_each_dev_addr(netdev, ha)
1725 if (ether_addr_equal(ha->addr, f->macaddr))
1726 goto bottom_of_search_loop;
1727
1728 /* f->macaddr wasn't found in uc, mc, or ha list so delete it */
1729 i40e_del_filter(vsi, f->macaddr, I40E_VLAN_ANY, false, true);
1730
1731 bottom_of_search_loop:
1732 continue;
1733 }
1734 spin_unlock_bh(&vsi->mac_filter_list_lock);
1735
1736 /* check for other flag changes */
1737 if (vsi->current_netdev_flags != vsi->netdev->flags) {
1738 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1739 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1740 }
1741
1742 /* schedule our worker thread which will take care of
1743 * applying the new filter changes
1744 */
1745 i40e_service_event_schedule(vsi->back);
1746 }
1747
1748 /**
1749 * i40e_undo_del_filter_entries - Undo the changes made to MAC filter entries
1750 * @vsi: pointer to vsi struct
1751 * @from: Pointer to list which contains MAC filter entries - changes to
1752 * those entries needs to be undone.
1753 *
1754 * MAC filter entries from list were slated to be removed from device.
1755 **/
1756 static void i40e_undo_del_filter_entries(struct i40e_vsi *vsi,
1757 struct list_head *from)
1758 {
1759 struct i40e_mac_filter *f, *ftmp;
1760
1761 list_for_each_entry_safe(f, ftmp, from, list) {
1762 /* Move the element back into MAC filter list*/
1763 list_move_tail(&f->list, &vsi->mac_filter_list);
1764 }
1765 }
1766
1767 /**
1768 * i40e_update_filter_state - Update filter state based on return data
1769 * from firmware
1770 * @count: Number of filters added
1771 * @add_list: return data from fw
1772 * @head: pointer to first filter in current batch
1773 * @aq_err: status from fw
1774 *
1775 * MAC filter entries from list were slated to be added to device. Returns
1776 * number of successful filters. Note that 0 does NOT mean success!
1777 **/
1778 static int
1779 i40e_update_filter_state(int count,
1780 struct i40e_aqc_add_macvlan_element_data *add_list,
1781 struct i40e_mac_filter *add_head, int aq_err)
1782 {
1783 int retval = 0;
1784 int i;
1785
1786
1787 if (!aq_err) {
1788 retval = count;
1789 /* Everything's good, mark all filters active. */
1790 for (i = 0; i < count ; i++) {
1791 add_head->state = I40E_FILTER_ACTIVE;
1792 add_head = list_next_entry(add_head, list);
1793 }
1794 } else if (aq_err == I40E_AQ_RC_ENOSPC) {
1795 /* Device ran out of filter space. Check the return value
1796 * for each filter to see which ones are active.
1797 */
1798 for (i = 0; i < count ; i++) {
1799 if (add_list[i].match_method ==
1800 I40E_AQC_MM_ERR_NO_RES) {
1801 add_head->state = I40E_FILTER_FAILED;
1802 } else {
1803 add_head->state = I40E_FILTER_ACTIVE;
1804 retval++;
1805 }
1806 add_head = list_next_entry(add_head, list);
1807 }
1808 } else {
1809 /* Some other horrible thing happened, fail all filters */
1810 retval = 0;
1811 for (i = 0; i < count ; i++) {
1812 add_head->state = I40E_FILTER_FAILED;
1813 add_head = list_next_entry(add_head, list);
1814 }
1815 }
1816 return retval;
1817 }
1818
1819 /**
1820 * i40e_sync_vsi_filters - Update the VSI filter list to the HW
1821 * @vsi: ptr to the VSI
1822 *
1823 * Push any outstanding VSI filter changes through the AdminQ.
1824 *
1825 * Returns 0 or error value
1826 **/
1827 int i40e_sync_vsi_filters(struct i40e_vsi *vsi)
1828 {
1829 struct i40e_mac_filter *f, *ftmp, *add_head = NULL;
1830 struct list_head tmp_add_list, tmp_del_list;
1831 struct i40e_hw *hw = &vsi->back->hw;
1832 bool promisc_changed = false;
1833 char vsi_name[16] = "PF";
1834 int filter_list_len = 0;
1835 u32 changed_flags = 0;
1836 i40e_status aq_ret = 0;
1837 int retval = 0;
1838 struct i40e_pf *pf;
1839 int num_add = 0;
1840 int num_del = 0;
1841 int aq_err = 0;
1842 u16 cmd_flags;
1843 int list_size;
1844 int fcnt;
1845
1846 /* empty array typed pointers, kcalloc later */
1847 struct i40e_aqc_add_macvlan_element_data *add_list;
1848 struct i40e_aqc_remove_macvlan_element_data *del_list;
1849
1850 while (test_and_set_bit(__I40E_CONFIG_BUSY, &vsi->state))
1851 usleep_range(1000, 2000);
1852 pf = vsi->back;
1853
1854 if (vsi->netdev) {
1855 changed_flags = vsi->current_netdev_flags ^ vsi->netdev->flags;
1856 vsi->current_netdev_flags = vsi->netdev->flags;
1857 }
1858
1859 INIT_LIST_HEAD(&tmp_add_list);
1860 INIT_LIST_HEAD(&tmp_del_list);
1861
1862 if (vsi->type == I40E_VSI_SRIOV)
1863 snprintf(vsi_name, sizeof(vsi_name) - 1, "VF %d", vsi->vf_id);
1864 else if (vsi->type != I40E_VSI_MAIN)
1865 snprintf(vsi_name, sizeof(vsi_name) - 1, "vsi %d", vsi->seid);
1866
1867 if (vsi->flags & I40E_VSI_FLAG_FILTER_CHANGED) {
1868 vsi->flags &= ~I40E_VSI_FLAG_FILTER_CHANGED;
1869
1870 spin_lock_bh(&vsi->mac_filter_list_lock);
1871 /* Create a list of filters to delete. */
1872 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1873 if (f->state == I40E_FILTER_REMOVE) {
1874 WARN_ON(f->counter != 0);
1875 /* Move the element into temporary del_list */
1876 list_move_tail(&f->list, &tmp_del_list);
1877 vsi->active_filters--;
1878 }
1879 if (f->state == I40E_FILTER_NEW) {
1880 WARN_ON(f->counter == 0);
1881 /* Move the element into temporary add_list */
1882 list_move_tail(&f->list, &tmp_add_list);
1883 }
1884 }
1885 spin_unlock_bh(&vsi->mac_filter_list_lock);
1886 }
1887
1888 /* Now process 'del_list' outside the lock */
1889 if (!list_empty(&tmp_del_list)) {
1890 filter_list_len = hw->aq.asq_buf_size /
1891 sizeof(struct i40e_aqc_remove_macvlan_element_data);
1892 list_size = filter_list_len *
1893 sizeof(struct i40e_aqc_remove_macvlan_element_data);
1894 del_list = kzalloc(list_size, GFP_ATOMIC);
1895 if (!del_list) {
1896 /* Undo VSI's MAC filter entry element updates */
1897 spin_lock_bh(&vsi->mac_filter_list_lock);
1898 i40e_undo_del_filter_entries(vsi, &tmp_del_list);
1899 spin_unlock_bh(&vsi->mac_filter_list_lock);
1900 retval = -ENOMEM;
1901 goto out;
1902 }
1903
1904 list_for_each_entry_safe(f, ftmp, &tmp_del_list, list) {
1905 cmd_flags = 0;
1906
1907 /* add to delete list */
1908 ether_addr_copy(del_list[num_del].mac_addr, f->macaddr);
1909 if (f->vlan == I40E_VLAN_ANY) {
1910 del_list[num_del].vlan_tag = 0;
1911 cmd_flags |= I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
1912 } else {
1913 del_list[num_del].vlan_tag =
1914 cpu_to_le16((u16)(f->vlan));
1915 }
1916
1917 cmd_flags |= I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1918 del_list[num_del].flags = cmd_flags;
1919 num_del++;
1920
1921 /* flush a full buffer */
1922 if (num_del == filter_list_len) {
1923 aq_ret = i40e_aq_remove_macvlan(hw, vsi->seid,
1924 del_list,
1925 num_del, NULL);
1926 aq_err = hw->aq.asq_last_status;
1927 num_del = 0;
1928 memset(del_list, 0, list_size);
1929
1930 /* Explicitly ignore and do not report when
1931 * firmware returns ENOENT.
1932 */
1933 if (aq_ret && !(aq_err == I40E_AQ_RC_ENOENT)) {
1934 retval = -EIO;
1935 dev_info(&pf->pdev->dev,
1936 "ignoring delete macvlan error on %s, err %s, aq_err %s\n",
1937 vsi_name,
1938 i40e_stat_str(hw, aq_ret),
1939 i40e_aq_str(hw, aq_err));
1940 }
1941 }
1942 /* Release memory for MAC filter entries which were
1943 * synced up with HW.
1944 */
1945 list_del(&f->list);
1946 kfree(f);
1947 }
1948
1949 if (num_del) {
1950 aq_ret = i40e_aq_remove_macvlan(hw, vsi->seid, del_list,
1951 num_del, NULL);
1952 aq_err = hw->aq.asq_last_status;
1953 num_del = 0;
1954
1955 /* Explicitly ignore and do not report when firmware
1956 * returns ENOENT.
1957 */
1958 if (aq_ret && !(aq_err == I40E_AQ_RC_ENOENT)) {
1959 retval = -EIO;
1960 dev_info(&pf->pdev->dev,
1961 "ignoring delete macvlan error on %s, err %s aq_err %s\n",
1962 vsi_name,
1963 i40e_stat_str(hw, aq_ret),
1964 i40e_aq_str(hw, aq_err));
1965 }
1966 }
1967
1968 kfree(del_list);
1969 del_list = NULL;
1970 }
1971
1972 if (!list_empty(&tmp_add_list)) {
1973 /* Do all the adds now. */
1974 filter_list_len = hw->aq.asq_buf_size /
1975 sizeof(struct i40e_aqc_add_macvlan_element_data);
1976 list_size = filter_list_len *
1977 sizeof(struct i40e_aqc_add_macvlan_element_data);
1978 add_list = kzalloc(list_size, GFP_ATOMIC);
1979 if (!add_list) {
1980 retval = -ENOMEM;
1981 goto out;
1982 }
1983 num_add = 0;
1984 list_for_each_entry(f, &tmp_add_list, list) {
1985 if (test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1986 &vsi->state)) {
1987 f->state = I40E_FILTER_FAILED;
1988 continue;
1989 }
1990 /* add to add array */
1991 if (num_add == 0)
1992 add_head = f;
1993 cmd_flags = 0;
1994 ether_addr_copy(add_list[num_add].mac_addr, f->macaddr);
1995 if (f->vlan == I40E_VLAN_ANY) {
1996 add_list[num_add].vlan_tag = 0;
1997 cmd_flags |= I40E_AQC_MACVLAN_ADD_IGNORE_VLAN;
1998 } else {
1999 add_list[num_add].vlan_tag =
2000 cpu_to_le16((u16)(f->vlan));
2001 }
2002 add_list[num_add].queue_number = 0;
2003 cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH;
2004 add_list[num_add].flags = cpu_to_le16(cmd_flags);
2005 num_add++;
2006
2007 /* flush a full buffer */
2008 if (num_add == filter_list_len) {
2009 aq_ret = i40e_aq_add_macvlan(hw, vsi->seid,
2010 add_list, num_add,
2011 NULL);
2012 aq_err = hw->aq.asq_last_status;
2013 fcnt = i40e_update_filter_state(num_add,
2014 add_list,
2015 add_head,
2016 aq_ret);
2017 vsi->active_filters += fcnt;
2018
2019 if (fcnt != num_add) {
2020 promisc_changed = true;
2021 set_bit(__I40E_FILTER_OVERFLOW_PROMISC,
2022 &vsi->state);
2023 vsi->promisc_threshold =
2024 (vsi->active_filters * 3) / 4;
2025 dev_warn(&pf->pdev->dev,
2026 "Error %s adding RX filters on %s, promiscuous mode forced on\n",
2027 i40e_aq_str(hw, aq_err),
2028 vsi_name);
2029 }
2030 memset(add_list, 0, list_size);
2031 num_add = 0;
2032 }
2033 }
2034 if (num_add) {
2035 aq_ret = i40e_aq_add_macvlan(hw, vsi->seid,
2036 add_list, num_add, NULL);
2037 aq_err = hw->aq.asq_last_status;
2038 fcnt = i40e_update_filter_state(num_add, add_list,
2039 add_head, aq_ret);
2040 vsi->active_filters += fcnt;
2041 if (fcnt != num_add) {
2042 promisc_changed = true;
2043 set_bit(__I40E_FILTER_OVERFLOW_PROMISC,
2044 &vsi->state);
2045 vsi->promisc_threshold =
2046 (vsi->active_filters * 3) / 4;
2047 dev_warn(&pf->pdev->dev,
2048 "Error %s adding RX filters on %s, promiscuous mode forced on\n",
2049 i40e_aq_str(hw, aq_err), vsi_name);
2050 }
2051 }
2052 /* Now move all of the filters from the temp add list back to
2053 * the VSI's list.
2054 */
2055 spin_lock_bh(&vsi->mac_filter_list_lock);
2056 list_for_each_entry_safe(f, ftmp, &tmp_add_list, list) {
2057 list_move_tail(&f->list, &vsi->mac_filter_list);
2058 }
2059 spin_unlock_bh(&vsi->mac_filter_list_lock);
2060 kfree(add_list);
2061 add_list = NULL;
2062 }
2063
2064 /* Check to see if we can drop out of overflow promiscuous mode. */
2065 if (test_bit(__I40E_FILTER_OVERFLOW_PROMISC, &vsi->state) &&
2066 (vsi->active_filters < vsi->promisc_threshold)) {
2067 int failed_count = 0;
2068 /* See if we have any failed filters. We can't drop out of
2069 * promiscuous until these have all been deleted.
2070 */
2071 spin_lock_bh(&vsi->mac_filter_list_lock);
2072 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2073 if (f->state == I40E_FILTER_FAILED)
2074 failed_count++;
2075 }
2076 spin_unlock_bh(&vsi->mac_filter_list_lock);
2077 if (!failed_count) {
2078 dev_info(&pf->pdev->dev,
2079 "filter logjam cleared on %s, leaving overflow promiscuous mode\n",
2080 vsi_name);
2081 clear_bit(__I40E_FILTER_OVERFLOW_PROMISC, &vsi->state);
2082 promisc_changed = true;
2083 vsi->promisc_threshold = 0;
2084 }
2085 }
2086
2087 /* if the VF is not trusted do not do promisc */
2088 if ((vsi->type == I40E_VSI_SRIOV) && !pf->vf[vsi->vf_id].trusted) {
2089 clear_bit(__I40E_FILTER_OVERFLOW_PROMISC, &vsi->state);
2090 goto out;
2091 }
2092
2093 /* check for changes in promiscuous modes */
2094 if (changed_flags & IFF_ALLMULTI) {
2095 bool cur_multipromisc;
2096
2097 cur_multipromisc = !!(vsi->current_netdev_flags & IFF_ALLMULTI);
2098 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(&vsi->back->hw,
2099 vsi->seid,
2100 cur_multipromisc,
2101 NULL);
2102 if (aq_ret) {
2103 retval = i40e_aq_rc_to_posix(aq_ret,
2104 hw->aq.asq_last_status);
2105 dev_info(&pf->pdev->dev,
2106 "set multi promisc failed on %s, err %s aq_err %s\n",
2107 vsi_name,
2108 i40e_stat_str(hw, aq_ret),
2109 i40e_aq_str(hw, hw->aq.asq_last_status));
2110 }
2111 }
2112 if ((changed_flags & IFF_PROMISC) ||
2113 (promisc_changed &&
2114 test_bit(__I40E_FILTER_OVERFLOW_PROMISC, &vsi->state))) {
2115 bool cur_promisc;
2116
2117 cur_promisc = (!!(vsi->current_netdev_flags & IFF_PROMISC) ||
2118 test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
2119 &vsi->state));
2120 if ((vsi->type == I40E_VSI_MAIN) &&
2121 (pf->lan_veb != I40E_NO_VEB) &&
2122 !(pf->flags & I40E_FLAG_MFP_ENABLED)) {
2123 /* set defport ON for Main VSI instead of true promisc
2124 * this way we will get all unicast/multicast and VLAN
2125 * promisc behavior but will not get VF or VMDq traffic
2126 * replicated on the Main VSI.
2127 */
2128 if (pf->cur_promisc != cur_promisc) {
2129 pf->cur_promisc = cur_promisc;
2130 if (cur_promisc)
2131 aq_ret =
2132 i40e_aq_set_default_vsi(hw,
2133 vsi->seid,
2134 NULL);
2135 else
2136 aq_ret =
2137 i40e_aq_clear_default_vsi(hw,
2138 vsi->seid,
2139 NULL);
2140 if (aq_ret) {
2141 retval = i40e_aq_rc_to_posix(aq_ret,
2142 hw->aq.asq_last_status);
2143 dev_info(&pf->pdev->dev,
2144 "Set default VSI failed on %s, err %s, aq_err %s\n",
2145 vsi_name,
2146 i40e_stat_str(hw, aq_ret),
2147 i40e_aq_str(hw,
2148 hw->aq.asq_last_status));
2149 }
2150 }
2151 } else {
2152 aq_ret = i40e_aq_set_vsi_unicast_promiscuous(
2153 hw,
2154 vsi->seid,
2155 cur_promisc, NULL,
2156 true);
2157 if (aq_ret) {
2158 retval =
2159 i40e_aq_rc_to_posix(aq_ret,
2160 hw->aq.asq_last_status);
2161 dev_info(&pf->pdev->dev,
2162 "set unicast promisc failed on %s, err %s, aq_err %s\n",
2163 vsi_name,
2164 i40e_stat_str(hw, aq_ret),
2165 i40e_aq_str(hw,
2166 hw->aq.asq_last_status));
2167 }
2168 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(
2169 hw,
2170 vsi->seid,
2171 cur_promisc, NULL);
2172 if (aq_ret) {
2173 retval =
2174 i40e_aq_rc_to_posix(aq_ret,
2175 hw->aq.asq_last_status);
2176 dev_info(&pf->pdev->dev,
2177 "set multicast promisc failed on %s, err %s, aq_err %s\n",
2178 vsi_name,
2179 i40e_stat_str(hw, aq_ret),
2180 i40e_aq_str(hw,
2181 hw->aq.asq_last_status));
2182 }
2183 }
2184 aq_ret = i40e_aq_set_vsi_broadcast(&vsi->back->hw,
2185 vsi->seid,
2186 cur_promisc, NULL);
2187 if (aq_ret) {
2188 retval = i40e_aq_rc_to_posix(aq_ret,
2189 pf->hw.aq.asq_last_status);
2190 dev_info(&pf->pdev->dev,
2191 "set brdcast promisc failed, err %s, aq_err %s\n",
2192 i40e_stat_str(hw, aq_ret),
2193 i40e_aq_str(hw,
2194 hw->aq.asq_last_status));
2195 }
2196 }
2197 out:
2198 /* if something went wrong then set the changed flag so we try again */
2199 if (retval)
2200 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
2201
2202 clear_bit(__I40E_CONFIG_BUSY, &vsi->state);
2203 return retval;
2204 }
2205
2206 /**
2207 * i40e_sync_filters_subtask - Sync the VSI filter list with HW
2208 * @pf: board private structure
2209 **/
2210 static void i40e_sync_filters_subtask(struct i40e_pf *pf)
2211 {
2212 int v;
2213
2214 if (!pf || !(pf->flags & I40E_FLAG_FILTER_SYNC))
2215 return;
2216 pf->flags &= ~I40E_FLAG_FILTER_SYNC;
2217
2218 for (v = 0; v < pf->num_alloc_vsi; v++) {
2219 if (pf->vsi[v] &&
2220 (pf->vsi[v]->flags & I40E_VSI_FLAG_FILTER_CHANGED)) {
2221 int ret = i40e_sync_vsi_filters(pf->vsi[v]);
2222
2223 if (ret) {
2224 /* come back and try again later */
2225 pf->flags |= I40E_FLAG_FILTER_SYNC;
2226 break;
2227 }
2228 }
2229 }
2230 }
2231
2232 /**
2233 * i40e_change_mtu - NDO callback to change the Maximum Transfer Unit
2234 * @netdev: network interface device structure
2235 * @new_mtu: new value for maximum frame size
2236 *
2237 * Returns 0 on success, negative on failure
2238 **/
2239 static int i40e_change_mtu(struct net_device *netdev, int new_mtu)
2240 {
2241 struct i40e_netdev_priv *np = netdev_priv(netdev);
2242 struct i40e_vsi *vsi = np->vsi;
2243
2244 netdev_info(netdev, "changing MTU from %d to %d\n",
2245 netdev->mtu, new_mtu);
2246 netdev->mtu = new_mtu;
2247 if (netif_running(netdev))
2248 i40e_vsi_reinit_locked(vsi);
2249 i40e_notify_client_of_l2_param_changes(vsi);
2250 return 0;
2251 }
2252
2253 /**
2254 * i40e_ioctl - Access the hwtstamp interface
2255 * @netdev: network interface device structure
2256 * @ifr: interface request data
2257 * @cmd: ioctl command
2258 **/
2259 int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
2260 {
2261 struct i40e_netdev_priv *np = netdev_priv(netdev);
2262 struct i40e_pf *pf = np->vsi->back;
2263
2264 switch (cmd) {
2265 case SIOCGHWTSTAMP:
2266 return i40e_ptp_get_ts_config(pf, ifr);
2267 case SIOCSHWTSTAMP:
2268 return i40e_ptp_set_ts_config(pf, ifr);
2269 default:
2270 return -EOPNOTSUPP;
2271 }
2272 }
2273
2274 /**
2275 * i40e_vlan_stripping_enable - Turn on vlan stripping for the VSI
2276 * @vsi: the vsi being adjusted
2277 **/
2278 void i40e_vlan_stripping_enable(struct i40e_vsi *vsi)
2279 {
2280 struct i40e_vsi_context ctxt;
2281 i40e_status ret;
2282
2283 if ((vsi->info.valid_sections &
2284 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2285 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_MODE_MASK) == 0))
2286 return; /* already enabled */
2287
2288 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2289 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2290 I40E_AQ_VSI_PVLAN_EMOD_STR_BOTH;
2291
2292 ctxt.seid = vsi->seid;
2293 ctxt.info = vsi->info;
2294 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2295 if (ret) {
2296 dev_info(&vsi->back->pdev->dev,
2297 "update vlan stripping failed, err %s aq_err %s\n",
2298 i40e_stat_str(&vsi->back->hw, ret),
2299 i40e_aq_str(&vsi->back->hw,
2300 vsi->back->hw.aq.asq_last_status));
2301 }
2302 }
2303
2304 /**
2305 * i40e_vlan_stripping_disable - Turn off vlan stripping for the VSI
2306 * @vsi: the vsi being adjusted
2307 **/
2308 void i40e_vlan_stripping_disable(struct i40e_vsi *vsi)
2309 {
2310 struct i40e_vsi_context ctxt;
2311 i40e_status ret;
2312
2313 if ((vsi->info.valid_sections &
2314 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2315 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_EMOD_MASK) ==
2316 I40E_AQ_VSI_PVLAN_EMOD_MASK))
2317 return; /* already disabled */
2318
2319 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2320 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2321 I40E_AQ_VSI_PVLAN_EMOD_NOTHING;
2322
2323 ctxt.seid = vsi->seid;
2324 ctxt.info = vsi->info;
2325 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2326 if (ret) {
2327 dev_info(&vsi->back->pdev->dev,
2328 "update vlan stripping failed, err %s aq_err %s\n",
2329 i40e_stat_str(&vsi->back->hw, ret),
2330 i40e_aq_str(&vsi->back->hw,
2331 vsi->back->hw.aq.asq_last_status));
2332 }
2333 }
2334
2335 /**
2336 * i40e_vlan_rx_register - Setup or shutdown vlan offload
2337 * @netdev: network interface to be adjusted
2338 * @features: netdev features to test if VLAN offload is enabled or not
2339 **/
2340 static void i40e_vlan_rx_register(struct net_device *netdev, u32 features)
2341 {
2342 struct i40e_netdev_priv *np = netdev_priv(netdev);
2343 struct i40e_vsi *vsi = np->vsi;
2344
2345 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2346 i40e_vlan_stripping_enable(vsi);
2347 else
2348 i40e_vlan_stripping_disable(vsi);
2349 }
2350
2351 /**
2352 * i40e_vsi_add_vlan - Add vsi membership for given vlan
2353 * @vsi: the vsi being configured
2354 * @vid: vlan id to be added (0 = untagged only , -1 = any)
2355 **/
2356 int i40e_vsi_add_vlan(struct i40e_vsi *vsi, s16 vid)
2357 {
2358 struct i40e_mac_filter *f, *ftmp, *add_f;
2359 bool is_netdev, is_vf;
2360
2361 is_vf = (vsi->type == I40E_VSI_SRIOV);
2362 is_netdev = !!(vsi->netdev);
2363
2364 /* Locked once because all functions invoked below iterates list*/
2365 spin_lock_bh(&vsi->mac_filter_list_lock);
2366
2367 if (is_netdev) {
2368 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, vid,
2369 is_vf, is_netdev);
2370 if (!add_f) {
2371 dev_info(&vsi->back->pdev->dev,
2372 "Could not add vlan filter %d for %pM\n",
2373 vid, vsi->netdev->dev_addr);
2374 spin_unlock_bh(&vsi->mac_filter_list_lock);
2375 return -ENOMEM;
2376 }
2377 }
2378
2379 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
2380 add_f = i40e_add_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
2381 if (!add_f) {
2382 dev_info(&vsi->back->pdev->dev,
2383 "Could not add vlan filter %d for %pM\n",
2384 vid, f->macaddr);
2385 spin_unlock_bh(&vsi->mac_filter_list_lock);
2386 return -ENOMEM;
2387 }
2388 }
2389
2390 /* Now if we add a vlan tag, make sure to check if it is the first
2391 * tag (i.e. a "tag" -1 does exist) and if so replace the -1 "tag"
2392 * with 0, so we now accept untagged and specified tagged traffic
2393 * (and not all tags along with untagged)
2394 */
2395 if (vid > 0) {
2396 if (is_netdev && i40e_find_filter(vsi, vsi->netdev->dev_addr,
2397 I40E_VLAN_ANY,
2398 is_vf, is_netdev)) {
2399 i40e_del_filter(vsi, vsi->netdev->dev_addr,
2400 I40E_VLAN_ANY, is_vf, is_netdev);
2401 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, 0,
2402 is_vf, is_netdev);
2403 if (!add_f) {
2404 dev_info(&vsi->back->pdev->dev,
2405 "Could not add filter 0 for %pM\n",
2406 vsi->netdev->dev_addr);
2407 spin_unlock_bh(&vsi->mac_filter_list_lock);
2408 return -ENOMEM;
2409 }
2410 }
2411 }
2412
2413 /* Do not assume that I40E_VLAN_ANY should be reset to VLAN 0 */
2414 if (vid > 0 && !vsi->info.pvid) {
2415 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
2416 if (!i40e_find_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2417 is_vf, is_netdev))
2418 continue;
2419 i40e_del_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2420 is_vf, is_netdev);
2421 add_f = i40e_add_filter(vsi, f->macaddr,
2422 0, is_vf, is_netdev);
2423 if (!add_f) {
2424 dev_info(&vsi->back->pdev->dev,
2425 "Could not add filter 0 for %pM\n",
2426 f->macaddr);
2427 spin_unlock_bh(&vsi->mac_filter_list_lock);
2428 return -ENOMEM;
2429 }
2430 }
2431 }
2432
2433 spin_unlock_bh(&vsi->mac_filter_list_lock);
2434
2435 /* schedule our worker thread which will take care of
2436 * applying the new filter changes
2437 */
2438 i40e_service_event_schedule(vsi->back);
2439 return 0;
2440 }
2441
2442 /**
2443 * i40e_vsi_kill_vlan - Remove vsi membership for given vlan
2444 * @vsi: the vsi being configured
2445 * @vid: vlan id to be removed (0 = untagged only , -1 = any)
2446 *
2447 * Return: 0 on success or negative otherwise
2448 **/
2449 int i40e_vsi_kill_vlan(struct i40e_vsi *vsi, s16 vid)
2450 {
2451 struct net_device *netdev = vsi->netdev;
2452 struct i40e_mac_filter *f, *ftmp, *add_f;
2453 bool is_vf, is_netdev;
2454 int filter_count = 0;
2455
2456 is_vf = (vsi->type == I40E_VSI_SRIOV);
2457 is_netdev = !!(netdev);
2458
2459 /* Locked once because all functions invoked below iterates list */
2460 spin_lock_bh(&vsi->mac_filter_list_lock);
2461
2462 if (is_netdev)
2463 i40e_del_filter(vsi, netdev->dev_addr, vid, is_vf, is_netdev);
2464
2465 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list)
2466 i40e_del_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
2467
2468 /* go through all the filters for this VSI and if there is only
2469 * vid == 0 it means there are no other filters, so vid 0 must
2470 * be replaced with -1. This signifies that we should from now
2471 * on accept any traffic (with any tag present, or untagged)
2472 */
2473 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2474 if (is_netdev) {
2475 if (f->vlan &&
2476 ether_addr_equal(netdev->dev_addr, f->macaddr))
2477 filter_count++;
2478 }
2479
2480 if (f->vlan)
2481 filter_count++;
2482 }
2483
2484 if (!filter_count && is_netdev) {
2485 i40e_del_filter(vsi, netdev->dev_addr, 0, is_vf, is_netdev);
2486 f = i40e_add_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
2487 is_vf, is_netdev);
2488 if (!f) {
2489 dev_info(&vsi->back->pdev->dev,
2490 "Could not add filter %d for %pM\n",
2491 I40E_VLAN_ANY, netdev->dev_addr);
2492 spin_unlock_bh(&vsi->mac_filter_list_lock);
2493 return -ENOMEM;
2494 }
2495 }
2496
2497 if (!filter_count) {
2498 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
2499 i40e_del_filter(vsi, f->macaddr, 0, is_vf, is_netdev);
2500 add_f = i40e_add_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2501 is_vf, is_netdev);
2502 if (!add_f) {
2503 dev_info(&vsi->back->pdev->dev,
2504 "Could not add filter %d for %pM\n",
2505 I40E_VLAN_ANY, f->macaddr);
2506 spin_unlock_bh(&vsi->mac_filter_list_lock);
2507 return -ENOMEM;
2508 }
2509 }
2510 }
2511
2512 spin_unlock_bh(&vsi->mac_filter_list_lock);
2513
2514 /* schedule our worker thread which will take care of
2515 * applying the new filter changes
2516 */
2517 i40e_service_event_schedule(vsi->back);
2518 return 0;
2519 }
2520
2521 /**
2522 * i40e_vlan_rx_add_vid - Add a vlan id filter to HW offload
2523 * @netdev: network interface to be adjusted
2524 * @vid: vlan id to be added
2525 *
2526 * net_device_ops implementation for adding vlan ids
2527 **/
2528 #ifdef I40E_FCOE
2529 int i40e_vlan_rx_add_vid(struct net_device *netdev,
2530 __always_unused __be16 proto, u16 vid)
2531 #else
2532 static int i40e_vlan_rx_add_vid(struct net_device *netdev,
2533 __always_unused __be16 proto, u16 vid)
2534 #endif
2535 {
2536 struct i40e_netdev_priv *np = netdev_priv(netdev);
2537 struct i40e_vsi *vsi = np->vsi;
2538 int ret = 0;
2539
2540 if (vid > 4095)
2541 return -EINVAL;
2542
2543 /* If the network stack called us with vid = 0 then
2544 * it is asking to receive priority tagged packets with
2545 * vlan id 0. Our HW receives them by default when configured
2546 * to receive untagged packets so there is no need to add an
2547 * extra filter for vlan 0 tagged packets.
2548 */
2549 if (vid)
2550 ret = i40e_vsi_add_vlan(vsi, vid);
2551
2552 if (!ret && (vid < VLAN_N_VID))
2553 set_bit(vid, vsi->active_vlans);
2554
2555 return ret;
2556 }
2557
2558 /**
2559 * i40e_vlan_rx_kill_vid - Remove a vlan id filter from HW offload
2560 * @netdev: network interface to be adjusted
2561 * @vid: vlan id to be removed
2562 *
2563 * net_device_ops implementation for removing vlan ids
2564 **/
2565 #ifdef I40E_FCOE
2566 int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2567 __always_unused __be16 proto, u16 vid)
2568 #else
2569 static int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2570 __always_unused __be16 proto, u16 vid)
2571 #endif
2572 {
2573 struct i40e_netdev_priv *np = netdev_priv(netdev);
2574 struct i40e_vsi *vsi = np->vsi;
2575
2576 /* return code is ignored as there is nothing a user
2577 * can do about failure to remove and a log message was
2578 * already printed from the other function
2579 */
2580 i40e_vsi_kill_vlan(vsi, vid);
2581
2582 clear_bit(vid, vsi->active_vlans);
2583
2584 return 0;
2585 }
2586
2587 /**
2588 * i40e_macaddr_init - explicitly write the mac address filters
2589 *
2590 * @vsi: pointer to the vsi
2591 * @macaddr: the MAC address
2592 *
2593 * This is needed when the macaddr has been obtained by other
2594 * means than the default, e.g., from Open Firmware or IDPROM.
2595 * Returns 0 on success, negative on failure
2596 **/
2597 static int i40e_macaddr_init(struct i40e_vsi *vsi, u8 *macaddr)
2598 {
2599 int ret;
2600 struct i40e_aqc_add_macvlan_element_data element;
2601
2602 ret = i40e_aq_mac_address_write(&vsi->back->hw,
2603 I40E_AQC_WRITE_TYPE_LAA_WOL,
2604 macaddr, NULL);
2605 if (ret) {
2606 dev_info(&vsi->back->pdev->dev,
2607 "Addr change for VSI failed: %d\n", ret);
2608 return -EADDRNOTAVAIL;
2609 }
2610
2611 memset(&element, 0, sizeof(element));
2612 ether_addr_copy(element.mac_addr, macaddr);
2613 element.flags = cpu_to_le16(I40E_AQC_MACVLAN_ADD_PERFECT_MATCH);
2614 ret = i40e_aq_add_macvlan(&vsi->back->hw, vsi->seid, &element, 1, NULL);
2615 if (ret) {
2616 dev_info(&vsi->back->pdev->dev,
2617 "add filter failed err %s aq_err %s\n",
2618 i40e_stat_str(&vsi->back->hw, ret),
2619 i40e_aq_str(&vsi->back->hw,
2620 vsi->back->hw.aq.asq_last_status));
2621 }
2622 return ret;
2623 }
2624
2625 /**
2626 * i40e_restore_vlan - Reinstate vlans when vsi/netdev comes back up
2627 * @vsi: the vsi being brought back up
2628 **/
2629 static void i40e_restore_vlan(struct i40e_vsi *vsi)
2630 {
2631 u16 vid;
2632
2633 if (!vsi->netdev)
2634 return;
2635
2636 i40e_vlan_rx_register(vsi->netdev, vsi->netdev->features);
2637
2638 for_each_set_bit(vid, vsi->active_vlans, VLAN_N_VID)
2639 i40e_vlan_rx_add_vid(vsi->netdev, htons(ETH_P_8021Q),
2640 vid);
2641 }
2642
2643 /**
2644 * i40e_vsi_add_pvid - Add pvid for the VSI
2645 * @vsi: the vsi being adjusted
2646 * @vid: the vlan id to set as a PVID
2647 **/
2648 int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid)
2649 {
2650 struct i40e_vsi_context ctxt;
2651 i40e_status ret;
2652
2653 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2654 vsi->info.pvid = cpu_to_le16(vid);
2655 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_TAGGED |
2656 I40E_AQ_VSI_PVLAN_INSERT_PVID |
2657 I40E_AQ_VSI_PVLAN_EMOD_STR;
2658
2659 ctxt.seid = vsi->seid;
2660 ctxt.info = vsi->info;
2661 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2662 if (ret) {
2663 dev_info(&vsi->back->pdev->dev,
2664 "add pvid failed, err %s aq_err %s\n",
2665 i40e_stat_str(&vsi->back->hw, ret),
2666 i40e_aq_str(&vsi->back->hw,
2667 vsi->back->hw.aq.asq_last_status));
2668 return -ENOENT;
2669 }
2670
2671 return 0;
2672 }
2673
2674 /**
2675 * i40e_vsi_remove_pvid - Remove the pvid from the VSI
2676 * @vsi: the vsi being adjusted
2677 *
2678 * Just use the vlan_rx_register() service to put it back to normal
2679 **/
2680 void i40e_vsi_remove_pvid(struct i40e_vsi *vsi)
2681 {
2682 i40e_vlan_stripping_disable(vsi);
2683
2684 vsi->info.pvid = 0;
2685 }
2686
2687 /**
2688 * i40e_vsi_setup_tx_resources - Allocate VSI Tx queue resources
2689 * @vsi: ptr to the VSI
2690 *
2691 * If this function returns with an error, then it's possible one or
2692 * more of the rings is populated (while the rest are not). It is the
2693 * callers duty to clean those orphaned rings.
2694 *
2695 * Return 0 on success, negative on failure
2696 **/
2697 static int i40e_vsi_setup_tx_resources(struct i40e_vsi *vsi)
2698 {
2699 int i, err = 0;
2700
2701 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2702 err = i40e_setup_tx_descriptors(vsi->tx_rings[i]);
2703
2704 return err;
2705 }
2706
2707 /**
2708 * i40e_vsi_free_tx_resources - Free Tx resources for VSI queues
2709 * @vsi: ptr to the VSI
2710 *
2711 * Free VSI's transmit software resources
2712 **/
2713 static void i40e_vsi_free_tx_resources(struct i40e_vsi *vsi)
2714 {
2715 int i;
2716
2717 if (!vsi->tx_rings)
2718 return;
2719
2720 for (i = 0; i < vsi->num_queue_pairs; i++)
2721 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc)
2722 i40e_free_tx_resources(vsi->tx_rings[i]);
2723 }
2724
2725 /**
2726 * i40e_vsi_setup_rx_resources - Allocate VSI queues Rx resources
2727 * @vsi: ptr to the VSI
2728 *
2729 * If this function returns with an error, then it's possible one or
2730 * more of the rings is populated (while the rest are not). It is the
2731 * callers duty to clean those orphaned rings.
2732 *
2733 * Return 0 on success, negative on failure
2734 **/
2735 static int i40e_vsi_setup_rx_resources(struct i40e_vsi *vsi)
2736 {
2737 int i, err = 0;
2738
2739 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2740 err = i40e_setup_rx_descriptors(vsi->rx_rings[i]);
2741 #ifdef I40E_FCOE
2742 i40e_fcoe_setup_ddp_resources(vsi);
2743 #endif
2744 return err;
2745 }
2746
2747 /**
2748 * i40e_vsi_free_rx_resources - Free Rx Resources for VSI queues
2749 * @vsi: ptr to the VSI
2750 *
2751 * Free all receive software resources
2752 **/
2753 static void i40e_vsi_free_rx_resources(struct i40e_vsi *vsi)
2754 {
2755 int i;
2756
2757 if (!vsi->rx_rings)
2758 return;
2759
2760 for (i = 0; i < vsi->num_queue_pairs; i++)
2761 if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc)
2762 i40e_free_rx_resources(vsi->rx_rings[i]);
2763 #ifdef I40E_FCOE
2764 i40e_fcoe_free_ddp_resources(vsi);
2765 #endif
2766 }
2767
2768 /**
2769 * i40e_config_xps_tx_ring - Configure XPS for a Tx ring
2770 * @ring: The Tx ring to configure
2771 *
2772 * This enables/disables XPS for a given Tx descriptor ring
2773 * based on the TCs enabled for the VSI that ring belongs to.
2774 **/
2775 static void i40e_config_xps_tx_ring(struct i40e_ring *ring)
2776 {
2777 struct i40e_vsi *vsi = ring->vsi;
2778 cpumask_var_t mask;
2779
2780 if (!ring->q_vector || !ring->netdev)
2781 return;
2782
2783 /* Single TC mode enable XPS */
2784 if (vsi->tc_config.numtc <= 1) {
2785 if (!test_and_set_bit(__I40E_TX_XPS_INIT_DONE, &ring->state))
2786 netif_set_xps_queue(ring->netdev,
2787 &ring->q_vector->affinity_mask,
2788 ring->queue_index);
2789 } else if (alloc_cpumask_var(&mask, GFP_KERNEL)) {
2790 /* Disable XPS to allow selection based on TC */
2791 bitmap_zero(cpumask_bits(mask), nr_cpumask_bits);
2792 netif_set_xps_queue(ring->netdev, mask, ring->queue_index);
2793 free_cpumask_var(mask);
2794 }
2795
2796 /* schedule our worker thread which will take care of
2797 * applying the new filter changes
2798 */
2799 i40e_service_event_schedule(vsi->back);
2800 }
2801
2802 /**
2803 * i40e_configure_tx_ring - Configure a transmit ring context and rest
2804 * @ring: The Tx ring to configure
2805 *
2806 * Configure the Tx descriptor ring in the HMC context.
2807 **/
2808 static int i40e_configure_tx_ring(struct i40e_ring *ring)
2809 {
2810 struct i40e_vsi *vsi = ring->vsi;
2811 u16 pf_q = vsi->base_queue + ring->queue_index;
2812 struct i40e_hw *hw = &vsi->back->hw;
2813 struct i40e_hmc_obj_txq tx_ctx;
2814 i40e_status err = 0;
2815 u32 qtx_ctl = 0;
2816
2817 /* some ATR related tx ring init */
2818 if (vsi->back->flags & I40E_FLAG_FD_ATR_ENABLED) {
2819 ring->atr_sample_rate = vsi->back->atr_sample_rate;
2820 ring->atr_count = 0;
2821 } else {
2822 ring->atr_sample_rate = 0;
2823 }
2824
2825 /* configure XPS */
2826 i40e_config_xps_tx_ring(ring);
2827
2828 /* clear the context structure first */
2829 memset(&tx_ctx, 0, sizeof(tx_ctx));
2830
2831 tx_ctx.new_context = 1;
2832 tx_ctx.base = (ring->dma / 128);
2833 tx_ctx.qlen = ring->count;
2834 tx_ctx.fd_ena = !!(vsi->back->flags & (I40E_FLAG_FD_SB_ENABLED |
2835 I40E_FLAG_FD_ATR_ENABLED));
2836 #ifdef I40E_FCOE
2837 tx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
2838 #endif
2839 tx_ctx.timesync_ena = !!(vsi->back->flags & I40E_FLAG_PTP);
2840 /* FDIR VSI tx ring can still use RS bit and writebacks */
2841 if (vsi->type != I40E_VSI_FDIR)
2842 tx_ctx.head_wb_ena = 1;
2843 tx_ctx.head_wb_addr = ring->dma +
2844 (ring->count * sizeof(struct i40e_tx_desc));
2845
2846 /* As part of VSI creation/update, FW allocates certain
2847 * Tx arbitration queue sets for each TC enabled for
2848 * the VSI. The FW returns the handles to these queue
2849 * sets as part of the response buffer to Add VSI,
2850 * Update VSI, etc. AQ commands. It is expected that
2851 * these queue set handles be associated with the Tx
2852 * queues by the driver as part of the TX queue context
2853 * initialization. This has to be done regardless of
2854 * DCB as by default everything is mapped to TC0.
2855 */
2856 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[ring->dcb_tc]);
2857 tx_ctx.rdylist_act = 0;
2858
2859 /* clear the context in the HMC */
2860 err = i40e_clear_lan_tx_queue_context(hw, pf_q);
2861 if (err) {
2862 dev_info(&vsi->back->pdev->dev,
2863 "Failed to clear LAN Tx queue context on Tx ring %d (pf_q %d), error: %d\n",
2864 ring->queue_index, pf_q, err);
2865 return -ENOMEM;
2866 }
2867
2868 /* set the context in the HMC */
2869 err = i40e_set_lan_tx_queue_context(hw, pf_q, &tx_ctx);
2870 if (err) {
2871 dev_info(&vsi->back->pdev->dev,
2872 "Failed to set LAN Tx queue context on Tx ring %d (pf_q %d, error: %d\n",
2873 ring->queue_index, pf_q, err);
2874 return -ENOMEM;
2875 }
2876
2877 /* Now associate this queue with this PCI function */
2878 if (vsi->type == I40E_VSI_VMDQ2) {
2879 qtx_ctl = I40E_QTX_CTL_VM_QUEUE;
2880 qtx_ctl |= ((vsi->id) << I40E_QTX_CTL_VFVM_INDX_SHIFT) &
2881 I40E_QTX_CTL_VFVM_INDX_MASK;
2882 } else {
2883 qtx_ctl = I40E_QTX_CTL_PF_QUEUE;
2884 }
2885
2886 qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) &
2887 I40E_QTX_CTL_PF_INDX_MASK);
2888 wr32(hw, I40E_QTX_CTL(pf_q), qtx_ctl);
2889 i40e_flush(hw);
2890
2891 /* cache tail off for easier writes later */
2892 ring->tail = hw->hw_addr + I40E_QTX_TAIL(pf_q);
2893
2894 return 0;
2895 }
2896
2897 /**
2898 * i40e_configure_rx_ring - Configure a receive ring context
2899 * @ring: The Rx ring to configure
2900 *
2901 * Configure the Rx descriptor ring in the HMC context.
2902 **/
2903 static int i40e_configure_rx_ring(struct i40e_ring *ring)
2904 {
2905 struct i40e_vsi *vsi = ring->vsi;
2906 u32 chain_len = vsi->back->hw.func_caps.rx_buf_chain_len;
2907 u16 pf_q = vsi->base_queue + ring->queue_index;
2908 struct i40e_hw *hw = &vsi->back->hw;
2909 struct i40e_hmc_obj_rxq rx_ctx;
2910 i40e_status err = 0;
2911
2912 ring->state = 0;
2913
2914 /* clear the context structure first */
2915 memset(&rx_ctx, 0, sizeof(rx_ctx));
2916
2917 ring->rx_buf_len = vsi->rx_buf_len;
2918
2919 rx_ctx.dbuff = ring->rx_buf_len >> I40E_RXQ_CTX_DBUFF_SHIFT;
2920
2921 rx_ctx.base = (ring->dma / 128);
2922 rx_ctx.qlen = ring->count;
2923
2924 /* use 32 byte descriptors */
2925 rx_ctx.dsize = 1;
2926
2927 /* descriptor type is always zero
2928 * rx_ctx.dtype = 0;
2929 */
2930 rx_ctx.hsplit_0 = 0;
2931
2932 rx_ctx.rxmax = min_t(u16, vsi->max_frame, chain_len * ring->rx_buf_len);
2933 if (hw->revision_id == 0)
2934 rx_ctx.lrxqthresh = 0;
2935 else
2936 rx_ctx.lrxqthresh = 2;
2937 rx_ctx.crcstrip = 1;
2938 rx_ctx.l2tsel = 1;
2939 /* this controls whether VLAN is stripped from inner headers */
2940 rx_ctx.showiv = 0;
2941 #ifdef I40E_FCOE
2942 rx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
2943 #endif
2944 /* set the prefena field to 1 because the manual says to */
2945 rx_ctx.prefena = 1;
2946
2947 /* clear the context in the HMC */
2948 err = i40e_clear_lan_rx_queue_context(hw, pf_q);
2949 if (err) {
2950 dev_info(&vsi->back->pdev->dev,
2951 "Failed to clear LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2952 ring->queue_index, pf_q, err);
2953 return -ENOMEM;
2954 }
2955
2956 /* set the context in the HMC */
2957 err = i40e_set_lan_rx_queue_context(hw, pf_q, &rx_ctx);
2958 if (err) {
2959 dev_info(&vsi->back->pdev->dev,
2960 "Failed to set LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2961 ring->queue_index, pf_q, err);
2962 return -ENOMEM;
2963 }
2964
2965 /* cache tail for quicker writes, and clear the reg before use */
2966 ring->tail = hw->hw_addr + I40E_QRX_TAIL(pf_q);
2967 writel(0, ring->tail);
2968
2969 i40e_alloc_rx_buffers(ring, I40E_DESC_UNUSED(ring));
2970
2971 return 0;
2972 }
2973
2974 /**
2975 * i40e_vsi_configure_tx - Configure the VSI for Tx
2976 * @vsi: VSI structure describing this set of rings and resources
2977 *
2978 * Configure the Tx VSI for operation.
2979 **/
2980 static int i40e_vsi_configure_tx(struct i40e_vsi *vsi)
2981 {
2982 int err = 0;
2983 u16 i;
2984
2985 for (i = 0; (i < vsi->num_queue_pairs) && !err; i++)
2986 err = i40e_configure_tx_ring(vsi->tx_rings[i]);
2987
2988 return err;
2989 }
2990
2991 /**
2992 * i40e_vsi_configure_rx - Configure the VSI for Rx
2993 * @vsi: the VSI being configured
2994 *
2995 * Configure the Rx VSI for operation.
2996 **/
2997 static int i40e_vsi_configure_rx(struct i40e_vsi *vsi)
2998 {
2999 int err = 0;
3000 u16 i;
3001
3002 if (vsi->netdev && (vsi->netdev->mtu > ETH_DATA_LEN))
3003 vsi->max_frame = vsi->netdev->mtu + ETH_HLEN
3004 + ETH_FCS_LEN + VLAN_HLEN;
3005 else
3006 vsi->max_frame = I40E_RXBUFFER_2048;
3007
3008 vsi->rx_buf_len = I40E_RXBUFFER_2048;
3009
3010 #ifdef I40E_FCOE
3011 /* setup rx buffer for FCoE */
3012 if ((vsi->type == I40E_VSI_FCOE) &&
3013 (vsi->back->flags & I40E_FLAG_FCOE_ENABLED)) {
3014 vsi->rx_buf_len = I40E_RXBUFFER_3072;
3015 vsi->max_frame = I40E_RXBUFFER_3072;
3016 }
3017
3018 #endif /* I40E_FCOE */
3019 /* round up for the chip's needs */
3020 vsi->rx_buf_len = ALIGN(vsi->rx_buf_len,
3021 BIT_ULL(I40E_RXQ_CTX_DBUFF_SHIFT));
3022
3023 /* set up individual rings */
3024 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
3025 err = i40e_configure_rx_ring(vsi->rx_rings[i]);
3026
3027 return err;
3028 }
3029
3030 /**
3031 * i40e_vsi_config_dcb_rings - Update rings to reflect DCB TC
3032 * @vsi: ptr to the VSI
3033 **/
3034 static void i40e_vsi_config_dcb_rings(struct i40e_vsi *vsi)
3035 {
3036 struct i40e_ring *tx_ring, *rx_ring;
3037 u16 qoffset, qcount;
3038 int i, n;
3039
3040 if (!(vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
3041 /* Reset the TC information */
3042 for (i = 0; i < vsi->num_queue_pairs; i++) {
3043 rx_ring = vsi->rx_rings[i];
3044 tx_ring = vsi->tx_rings[i];
3045 rx_ring->dcb_tc = 0;
3046 tx_ring->dcb_tc = 0;
3047 }
3048 }
3049
3050 for (n = 0; n < I40E_MAX_TRAFFIC_CLASS; n++) {
3051 if (!(vsi->tc_config.enabled_tc & BIT_ULL(n)))
3052 continue;
3053
3054 qoffset = vsi->tc_config.tc_info[n].qoffset;
3055 qcount = vsi->tc_config.tc_info[n].qcount;
3056 for (i = qoffset; i < (qoffset + qcount); i++) {
3057 rx_ring = vsi->rx_rings[i];
3058 tx_ring = vsi->tx_rings[i];
3059 rx_ring->dcb_tc = n;
3060 tx_ring->dcb_tc = n;
3061 }
3062 }
3063 }
3064
3065 /**
3066 * i40e_set_vsi_rx_mode - Call set_rx_mode on a VSI
3067 * @vsi: ptr to the VSI
3068 **/
3069 static void i40e_set_vsi_rx_mode(struct i40e_vsi *vsi)
3070 {
3071 struct i40e_pf *pf = vsi->back;
3072 int err;
3073
3074 if (vsi->netdev)
3075 i40e_set_rx_mode(vsi->netdev);
3076
3077 if (!!(pf->flags & I40E_FLAG_PF_MAC)) {
3078 err = i40e_macaddr_init(vsi, pf->hw.mac.addr);
3079 if (err) {
3080 dev_warn(&pf->pdev->dev,
3081 "could not set up macaddr; err %d\n", err);
3082 }
3083 }
3084 }
3085
3086 /**
3087 * i40e_fdir_filter_restore - Restore the Sideband Flow Director filters
3088 * @vsi: Pointer to the targeted VSI
3089 *
3090 * This function replays the hlist on the hw where all the SB Flow Director
3091 * filters were saved.
3092 **/
3093 static void i40e_fdir_filter_restore(struct i40e_vsi *vsi)
3094 {
3095 struct i40e_fdir_filter *filter;
3096 struct i40e_pf *pf = vsi->back;
3097 struct hlist_node *node;
3098
3099 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
3100 return;
3101
3102 hlist_for_each_entry_safe(filter, node,
3103 &pf->fdir_filter_list, fdir_node) {
3104 i40e_add_del_fdir(vsi, filter, true);
3105 }
3106 }
3107
3108 /**
3109 * i40e_vsi_configure - Set up the VSI for action
3110 * @vsi: the VSI being configured
3111 **/
3112 static int i40e_vsi_configure(struct i40e_vsi *vsi)
3113 {
3114 int err;
3115
3116 i40e_set_vsi_rx_mode(vsi);
3117 i40e_restore_vlan(vsi);
3118 i40e_vsi_config_dcb_rings(vsi);
3119 err = i40e_vsi_configure_tx(vsi);
3120 if (!err)
3121 err = i40e_vsi_configure_rx(vsi);
3122
3123 return err;
3124 }
3125
3126 /**
3127 * i40e_vsi_configure_msix - MSIX mode Interrupt Config in the HW
3128 * @vsi: the VSI being configured
3129 **/
3130 static void i40e_vsi_configure_msix(struct i40e_vsi *vsi)
3131 {
3132 struct i40e_pf *pf = vsi->back;
3133 struct i40e_hw *hw = &pf->hw;
3134 u16 vector;
3135 int i, q;
3136 u32 qp;
3137
3138 /* The interrupt indexing is offset by 1 in the PFINT_ITRn
3139 * and PFINT_LNKLSTn registers, e.g.:
3140 * PFINT_ITRn[0..n-1] gets msix-1..msix-n (qpair interrupts)
3141 */
3142 qp = vsi->base_queue;
3143 vector = vsi->base_vector;
3144 for (i = 0; i < vsi->num_q_vectors; i++, vector++) {
3145 struct i40e_q_vector *q_vector = vsi->q_vectors[i];
3146
3147 q_vector->itr_countdown = ITR_COUNTDOWN_START;
3148 q_vector->rx.itr = ITR_TO_REG(vsi->rx_rings[i]->rx_itr_setting);
3149 q_vector->rx.latency_range = I40E_LOW_LATENCY;
3150 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1),
3151 q_vector->rx.itr);
3152 q_vector->tx.itr = ITR_TO_REG(vsi->tx_rings[i]->tx_itr_setting);
3153 q_vector->tx.latency_range = I40E_LOW_LATENCY;
3154 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1),
3155 q_vector->tx.itr);
3156 wr32(hw, I40E_PFINT_RATEN(vector - 1),
3157 INTRL_USEC_TO_REG(vsi->int_rate_limit));
3158
3159 /* Linked list for the queuepairs assigned to this vector */
3160 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), qp);
3161 for (q = 0; q < q_vector->num_ringpairs; q++) {
3162 u32 val;
3163
3164 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3165 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
3166 (vector << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) |
3167 (qp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT)|
3168 (I40E_QUEUE_TYPE_TX
3169 << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT);
3170
3171 wr32(hw, I40E_QINT_RQCTL(qp), val);
3172
3173 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3174 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3175 (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) |
3176 ((qp+1) << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT)|
3177 (I40E_QUEUE_TYPE_RX
3178 << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3179
3180 /* Terminate the linked list */
3181 if (q == (q_vector->num_ringpairs - 1))
3182 val |= (I40E_QUEUE_END_OF_LIST
3183 << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
3184
3185 wr32(hw, I40E_QINT_TQCTL(qp), val);
3186 qp++;
3187 }
3188 }
3189
3190 i40e_flush(hw);
3191 }
3192
3193 /**
3194 * i40e_enable_misc_int_causes - enable the non-queue interrupts
3195 * @hw: ptr to the hardware info
3196 **/
3197 static void i40e_enable_misc_int_causes(struct i40e_pf *pf)
3198 {
3199 struct i40e_hw *hw = &pf->hw;
3200 u32 val;
3201
3202 /* clear things first */
3203 wr32(hw, I40E_PFINT_ICR0_ENA, 0); /* disable all */
3204 rd32(hw, I40E_PFINT_ICR0); /* read to clear */
3205
3206 val = I40E_PFINT_ICR0_ENA_ECC_ERR_MASK |
3207 I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK |
3208 I40E_PFINT_ICR0_ENA_GRST_MASK |
3209 I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK |
3210 I40E_PFINT_ICR0_ENA_GPIO_MASK |
3211 I40E_PFINT_ICR0_ENA_HMC_ERR_MASK |
3212 I40E_PFINT_ICR0_ENA_VFLR_MASK |
3213 I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
3214
3215 if (pf->flags & I40E_FLAG_IWARP_ENABLED)
3216 val |= I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3217
3218 if (pf->flags & I40E_FLAG_PTP)
3219 val |= I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3220
3221 wr32(hw, I40E_PFINT_ICR0_ENA, val);
3222
3223 /* SW_ITR_IDX = 0, but don't change INTENA */
3224 wr32(hw, I40E_PFINT_DYN_CTL0, I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK |
3225 I40E_PFINT_DYN_CTL0_INTENA_MSK_MASK);
3226
3227 /* OTHER_ITR_IDX = 0 */
3228 wr32(hw, I40E_PFINT_STAT_CTL0, 0);
3229 }
3230
3231 /**
3232 * i40e_configure_msi_and_legacy - Legacy mode interrupt config in the HW
3233 * @vsi: the VSI being configured
3234 **/
3235 static void i40e_configure_msi_and_legacy(struct i40e_vsi *vsi)
3236 {
3237 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
3238 struct i40e_pf *pf = vsi->back;
3239 struct i40e_hw *hw = &pf->hw;
3240 u32 val;
3241
3242 /* set the ITR configuration */
3243 q_vector->itr_countdown = ITR_COUNTDOWN_START;
3244 q_vector->rx.itr = ITR_TO_REG(vsi->rx_rings[0]->rx_itr_setting);
3245 q_vector->rx.latency_range = I40E_LOW_LATENCY;
3246 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), q_vector->rx.itr);
3247 q_vector->tx.itr = ITR_TO_REG(vsi->tx_rings[0]->tx_itr_setting);
3248 q_vector->tx.latency_range = I40E_LOW_LATENCY;
3249 wr32(hw, I40E_PFINT_ITR0(I40E_TX_ITR), q_vector->tx.itr);
3250
3251 i40e_enable_misc_int_causes(pf);
3252
3253 /* FIRSTQ_INDX = 0, FIRSTQ_TYPE = 0 (rx) */
3254 wr32(hw, I40E_PFINT_LNKLST0, 0);
3255
3256 /* Associate the queue pair to the vector and enable the queue int */
3257 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3258 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
3259 (I40E_QUEUE_TYPE_TX << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3260
3261 wr32(hw, I40E_QINT_RQCTL(0), val);
3262
3263 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3264 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3265 (I40E_QUEUE_END_OF_LIST << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
3266
3267 wr32(hw, I40E_QINT_TQCTL(0), val);
3268 i40e_flush(hw);
3269 }
3270
3271 /**
3272 * i40e_irq_dynamic_disable_icr0 - Disable default interrupt generation for icr0
3273 * @pf: board private structure
3274 **/
3275 void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf)
3276 {
3277 struct i40e_hw *hw = &pf->hw;
3278
3279 wr32(hw, I40E_PFINT_DYN_CTL0,
3280 I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
3281 i40e_flush(hw);
3282 }
3283
3284 /**
3285 * i40e_irq_dynamic_enable_icr0 - Enable default interrupt generation for icr0
3286 * @pf: board private structure
3287 * @clearpba: true when all pending interrupt events should be cleared
3288 **/
3289 void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf, bool clearpba)
3290 {
3291 struct i40e_hw *hw = &pf->hw;
3292 u32 val;
3293
3294 val = I40E_PFINT_DYN_CTL0_INTENA_MASK |
3295 (clearpba ? I40E_PFINT_DYN_CTL0_CLEARPBA_MASK : 0) |
3296 (I40E_ITR_NONE << I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT);
3297
3298 wr32(hw, I40E_PFINT_DYN_CTL0, val);
3299 i40e_flush(hw);
3300 }
3301
3302 /**
3303 * i40e_msix_clean_rings - MSIX mode Interrupt Handler
3304 * @irq: interrupt number
3305 * @data: pointer to a q_vector
3306 **/
3307 static irqreturn_t i40e_msix_clean_rings(int irq, void *data)
3308 {
3309 struct i40e_q_vector *q_vector = data;
3310
3311 if (!q_vector->tx.ring && !q_vector->rx.ring)
3312 return IRQ_HANDLED;
3313
3314 napi_schedule_irqoff(&q_vector->napi);
3315
3316 return IRQ_HANDLED;
3317 }
3318
3319 /**
3320 * i40e_vsi_request_irq_msix - Initialize MSI-X interrupts
3321 * @vsi: the VSI being configured
3322 * @basename: name for the vector
3323 *
3324 * Allocates MSI-X vectors and requests interrupts from the kernel.
3325 **/
3326 static int i40e_vsi_request_irq_msix(struct i40e_vsi *vsi, char *basename)
3327 {
3328 int q_vectors = vsi->num_q_vectors;
3329 struct i40e_pf *pf = vsi->back;
3330 int base = vsi->base_vector;
3331 int rx_int_idx = 0;
3332 int tx_int_idx = 0;
3333 int vector, err;
3334
3335 for (vector = 0; vector < q_vectors; vector++) {
3336 struct i40e_q_vector *q_vector = vsi->q_vectors[vector];
3337
3338 if (q_vector->tx.ring && q_vector->rx.ring) {
3339 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3340 "%s-%s-%d", basename, "TxRx", rx_int_idx++);
3341 tx_int_idx++;
3342 } else if (q_vector->rx.ring) {
3343 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3344 "%s-%s-%d", basename, "rx", rx_int_idx++);
3345 } else if (q_vector->tx.ring) {
3346 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3347 "%s-%s-%d", basename, "tx", tx_int_idx++);
3348 } else {
3349 /* skip this unused q_vector */
3350 continue;
3351 }
3352 err = request_irq(pf->msix_entries[base + vector].vector,
3353 vsi->irq_handler,
3354 0,
3355 q_vector->name,
3356 q_vector);
3357 if (err) {
3358 dev_info(&pf->pdev->dev,
3359 "MSIX request_irq failed, error: %d\n", err);
3360 goto free_queue_irqs;
3361 }
3362 /* assign the mask for this irq */
3363 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
3364 &q_vector->affinity_mask);
3365 }
3366
3367 vsi->irqs_ready = true;
3368 return 0;
3369
3370 free_queue_irqs:
3371 while (vector) {
3372 vector--;
3373 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
3374 NULL);
3375 free_irq(pf->msix_entries[base + vector].vector,
3376 &(vsi->q_vectors[vector]));
3377 }
3378 return err;
3379 }
3380
3381 /**
3382 * i40e_vsi_disable_irq - Mask off queue interrupt generation on the VSI
3383 * @vsi: the VSI being un-configured
3384 **/
3385 static void i40e_vsi_disable_irq(struct i40e_vsi *vsi)
3386 {
3387 struct i40e_pf *pf = vsi->back;
3388 struct i40e_hw *hw = &pf->hw;
3389 int base = vsi->base_vector;
3390 int i;
3391
3392 for (i = 0; i < vsi->num_queue_pairs; i++) {
3393 wr32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx), 0);
3394 wr32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx), 0);
3395 }
3396
3397 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3398 for (i = vsi->base_vector;
3399 i < (vsi->num_q_vectors + vsi->base_vector); i++)
3400 wr32(hw, I40E_PFINT_DYN_CTLN(i - 1), 0);
3401
3402 i40e_flush(hw);
3403 for (i = 0; i < vsi->num_q_vectors; i++)
3404 synchronize_irq(pf->msix_entries[i + base].vector);
3405 } else {
3406 /* Legacy and MSI mode - this stops all interrupt handling */
3407 wr32(hw, I40E_PFINT_ICR0_ENA, 0);
3408 wr32(hw, I40E_PFINT_DYN_CTL0, 0);
3409 i40e_flush(hw);
3410 synchronize_irq(pf->pdev->irq);
3411 }
3412 }
3413
3414 /**
3415 * i40e_vsi_enable_irq - Enable IRQ for the given VSI
3416 * @vsi: the VSI being configured
3417 **/
3418 static int i40e_vsi_enable_irq(struct i40e_vsi *vsi)
3419 {
3420 struct i40e_pf *pf = vsi->back;
3421 int i;
3422
3423 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3424 for (i = 0; i < vsi->num_q_vectors; i++)
3425 i40e_irq_dynamic_enable(vsi, i);
3426 } else {
3427 i40e_irq_dynamic_enable_icr0(pf, true);
3428 }
3429
3430 i40e_flush(&pf->hw);
3431 return 0;
3432 }
3433
3434 /**
3435 * i40e_stop_misc_vector - Stop the vector that handles non-queue events
3436 * @pf: board private structure
3437 **/
3438 static void i40e_stop_misc_vector(struct i40e_pf *pf)
3439 {
3440 /* Disable ICR 0 */
3441 wr32(&pf->hw, I40E_PFINT_ICR0_ENA, 0);
3442 i40e_flush(&pf->hw);
3443 }
3444
3445 /**
3446 * i40e_intr - MSI/Legacy and non-queue interrupt handler
3447 * @irq: interrupt number
3448 * @data: pointer to a q_vector
3449 *
3450 * This is the handler used for all MSI/Legacy interrupts, and deals
3451 * with both queue and non-queue interrupts. This is also used in
3452 * MSIX mode to handle the non-queue interrupts.
3453 **/
3454 static irqreturn_t i40e_intr(int irq, void *data)
3455 {
3456 struct i40e_pf *pf = (struct i40e_pf *)data;
3457 struct i40e_hw *hw = &pf->hw;
3458 irqreturn_t ret = IRQ_NONE;
3459 u32 icr0, icr0_remaining;
3460 u32 val, ena_mask;
3461
3462 icr0 = rd32(hw, I40E_PFINT_ICR0);
3463 ena_mask = rd32(hw, I40E_PFINT_ICR0_ENA);
3464
3465 /* if sharing a legacy IRQ, we might get called w/o an intr pending */
3466 if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0)
3467 goto enable_intr;
3468
3469 /* if interrupt but no bits showing, must be SWINT */
3470 if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) ||
3471 (icr0 & I40E_PFINT_ICR0_SWINT_MASK))
3472 pf->sw_int_count++;
3473
3474 if ((pf->flags & I40E_FLAG_IWARP_ENABLED) &&
3475 (ena_mask & I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK)) {
3476 ena_mask &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3477 icr0 &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3478 dev_info(&pf->pdev->dev, "cleared PE_CRITERR\n");
3479 }
3480
3481 /* only q0 is used in MSI/Legacy mode, and none are used in MSIX */
3482 if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) {
3483 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
3484 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
3485
3486 /* We do not have a way to disarm Queue causes while leaving
3487 * interrupt enabled for all other causes, ideally
3488 * interrupt should be disabled while we are in NAPI but
3489 * this is not a performance path and napi_schedule()
3490 * can deal with rescheduling.
3491 */
3492 if (!test_bit(__I40E_DOWN, &pf->state))
3493 napi_schedule_irqoff(&q_vector->napi);
3494 }
3495
3496 if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) {
3497 ena_mask &= ~I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
3498 set_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
3499 i40e_debug(&pf->hw, I40E_DEBUG_NVM, "AdminQ event\n");
3500 }
3501
3502 if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) {
3503 ena_mask &= ~I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
3504 set_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
3505 }
3506
3507 if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) {
3508 ena_mask &= ~I40E_PFINT_ICR0_ENA_VFLR_MASK;
3509 set_bit(__I40E_VFLR_EVENT_PENDING, &pf->state);
3510 }
3511
3512 if (icr0 & I40E_PFINT_ICR0_GRST_MASK) {
3513 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
3514 set_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
3515 ena_mask &= ~I40E_PFINT_ICR0_ENA_GRST_MASK;
3516 val = rd32(hw, I40E_GLGEN_RSTAT);
3517 val = (val & I40E_GLGEN_RSTAT_RESET_TYPE_MASK)
3518 >> I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT;
3519 if (val == I40E_RESET_CORER) {
3520 pf->corer_count++;
3521 } else if (val == I40E_RESET_GLOBR) {
3522 pf->globr_count++;
3523 } else if (val == I40E_RESET_EMPR) {
3524 pf->empr_count++;
3525 set_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state);
3526 }
3527 }
3528
3529 if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) {
3530 icr0 &= ~I40E_PFINT_ICR0_HMC_ERR_MASK;
3531 dev_info(&pf->pdev->dev, "HMC error interrupt\n");
3532 dev_info(&pf->pdev->dev, "HMC error info 0x%x, HMC error data 0x%x\n",
3533 rd32(hw, I40E_PFHMC_ERRORINFO),
3534 rd32(hw, I40E_PFHMC_ERRORDATA));
3535 }
3536
3537 if (icr0 & I40E_PFINT_ICR0_TIMESYNC_MASK) {
3538 u32 prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_0);
3539
3540 if (prttsyn_stat & I40E_PRTTSYN_STAT_0_TXTIME_MASK) {
3541 icr0 &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3542 i40e_ptp_tx_hwtstamp(pf);
3543 }
3544 }
3545
3546 /* If a critical error is pending we have no choice but to reset the
3547 * device.
3548 * Report and mask out any remaining unexpected interrupts.
3549 */
3550 icr0_remaining = icr0 & ena_mask;
3551 if (icr0_remaining) {
3552 dev_info(&pf->pdev->dev, "unhandled interrupt icr0=0x%08x\n",
3553 icr0_remaining);
3554 if ((icr0_remaining & I40E_PFINT_ICR0_PE_CRITERR_MASK) ||
3555 (icr0_remaining & I40E_PFINT_ICR0_PCI_EXCEPTION_MASK) ||
3556 (icr0_remaining & I40E_PFINT_ICR0_ECC_ERR_MASK)) {
3557 dev_info(&pf->pdev->dev, "device will be reset\n");
3558 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
3559 i40e_service_event_schedule(pf);
3560 }
3561 ena_mask &= ~icr0_remaining;
3562 }
3563 ret = IRQ_HANDLED;
3564
3565 enable_intr:
3566 /* re-enable interrupt causes */
3567 wr32(hw, I40E_PFINT_ICR0_ENA, ena_mask);
3568 if (!test_bit(__I40E_DOWN, &pf->state)) {
3569 i40e_service_event_schedule(pf);
3570 i40e_irq_dynamic_enable_icr0(pf, false);
3571 }
3572
3573 return ret;
3574 }
3575
3576 /**
3577 * i40e_clean_fdir_tx_irq - Reclaim resources after transmit completes
3578 * @tx_ring: tx ring to clean
3579 * @budget: how many cleans we're allowed
3580 *
3581 * Returns true if there's any budget left (e.g. the clean is finished)
3582 **/
3583 static bool i40e_clean_fdir_tx_irq(struct i40e_ring *tx_ring, int budget)
3584 {
3585 struct i40e_vsi *vsi = tx_ring->vsi;
3586 u16 i = tx_ring->next_to_clean;
3587 struct i40e_tx_buffer *tx_buf;
3588 struct i40e_tx_desc *tx_desc;
3589
3590 tx_buf = &tx_ring->tx_bi[i];
3591 tx_desc = I40E_TX_DESC(tx_ring, i);
3592 i -= tx_ring->count;
3593
3594 do {
3595 struct i40e_tx_desc *eop_desc = tx_buf->next_to_watch;
3596
3597 /* if next_to_watch is not set then there is no work pending */
3598 if (!eop_desc)
3599 break;
3600
3601 /* prevent any other reads prior to eop_desc */
3602 read_barrier_depends();
3603
3604 /* if the descriptor isn't done, no work yet to do */
3605 if (!(eop_desc->cmd_type_offset_bsz &
3606 cpu_to_le64(I40E_TX_DESC_DTYPE_DESC_DONE)))
3607 break;
3608
3609 /* clear next_to_watch to prevent false hangs */
3610 tx_buf->next_to_watch = NULL;
3611
3612 tx_desc->buffer_addr = 0;
3613 tx_desc->cmd_type_offset_bsz = 0;
3614 /* move past filter desc */
3615 tx_buf++;
3616 tx_desc++;
3617 i++;
3618 if (unlikely(!i)) {
3619 i -= tx_ring->count;
3620 tx_buf = tx_ring->tx_bi;
3621 tx_desc = I40E_TX_DESC(tx_ring, 0);
3622 }
3623 /* unmap skb header data */
3624 dma_unmap_single(tx_ring->dev,
3625 dma_unmap_addr(tx_buf, dma),
3626 dma_unmap_len(tx_buf, len),
3627 DMA_TO_DEVICE);
3628 if (tx_buf->tx_flags & I40E_TX_FLAGS_FD_SB)
3629 kfree(tx_buf->raw_buf);
3630
3631 tx_buf->raw_buf = NULL;
3632 tx_buf->tx_flags = 0;
3633 tx_buf->next_to_watch = NULL;
3634 dma_unmap_len_set(tx_buf, len, 0);
3635 tx_desc->buffer_addr = 0;
3636 tx_desc->cmd_type_offset_bsz = 0;
3637
3638 /* move us past the eop_desc for start of next FD desc */
3639 tx_buf++;
3640 tx_desc++;
3641 i++;
3642 if (unlikely(!i)) {
3643 i -= tx_ring->count;
3644 tx_buf = tx_ring->tx_bi;
3645 tx_desc = I40E_TX_DESC(tx_ring, 0);
3646 }
3647
3648 /* update budget accounting */
3649 budget--;
3650 } while (likely(budget));
3651
3652 i += tx_ring->count;
3653 tx_ring->next_to_clean = i;
3654
3655 if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED)
3656 i40e_irq_dynamic_enable(vsi, tx_ring->q_vector->v_idx);
3657
3658 return budget > 0;
3659 }
3660
3661 /**
3662 * i40e_fdir_clean_ring - Interrupt Handler for FDIR SB ring
3663 * @irq: interrupt number
3664 * @data: pointer to a q_vector
3665 **/
3666 static irqreturn_t i40e_fdir_clean_ring(int irq, void *data)
3667 {
3668 struct i40e_q_vector *q_vector = data;
3669 struct i40e_vsi *vsi;
3670
3671 if (!q_vector->tx.ring)
3672 return IRQ_HANDLED;
3673
3674 vsi = q_vector->tx.ring->vsi;
3675 i40e_clean_fdir_tx_irq(q_vector->tx.ring, vsi->work_limit);
3676
3677 return IRQ_HANDLED;
3678 }
3679
3680 /**
3681 * i40e_map_vector_to_qp - Assigns the queue pair to the vector
3682 * @vsi: the VSI being configured
3683 * @v_idx: vector index
3684 * @qp_idx: queue pair index
3685 **/
3686 static void i40e_map_vector_to_qp(struct i40e_vsi *vsi, int v_idx, int qp_idx)
3687 {
3688 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
3689 struct i40e_ring *tx_ring = vsi->tx_rings[qp_idx];
3690 struct i40e_ring *rx_ring = vsi->rx_rings[qp_idx];
3691
3692 tx_ring->q_vector = q_vector;
3693 tx_ring->next = q_vector->tx.ring;
3694 q_vector->tx.ring = tx_ring;
3695 q_vector->tx.count++;
3696
3697 rx_ring->q_vector = q_vector;
3698 rx_ring->next = q_vector->rx.ring;
3699 q_vector->rx.ring = rx_ring;
3700 q_vector->rx.count++;
3701 }
3702
3703 /**
3704 * i40e_vsi_map_rings_to_vectors - Maps descriptor rings to vectors
3705 * @vsi: the VSI being configured
3706 *
3707 * This function maps descriptor rings to the queue-specific vectors
3708 * we were allotted through the MSI-X enabling code. Ideally, we'd have
3709 * one vector per queue pair, but on a constrained vector budget, we
3710 * group the queue pairs as "efficiently" as possible.
3711 **/
3712 static void i40e_vsi_map_rings_to_vectors(struct i40e_vsi *vsi)
3713 {
3714 int qp_remaining = vsi->num_queue_pairs;
3715 int q_vectors = vsi->num_q_vectors;
3716 int num_ringpairs;
3717 int v_start = 0;
3718 int qp_idx = 0;
3719
3720 /* If we don't have enough vectors for a 1-to-1 mapping, we'll have to
3721 * group them so there are multiple queues per vector.
3722 * It is also important to go through all the vectors available to be
3723 * sure that if we don't use all the vectors, that the remaining vectors
3724 * are cleared. This is especially important when decreasing the
3725 * number of queues in use.
3726 */
3727 for (; v_start < q_vectors; v_start++) {
3728 struct i40e_q_vector *q_vector = vsi->q_vectors[v_start];
3729
3730 num_ringpairs = DIV_ROUND_UP(qp_remaining, q_vectors - v_start);
3731
3732 q_vector->num_ringpairs = num_ringpairs;
3733
3734 q_vector->rx.count = 0;
3735 q_vector->tx.count = 0;
3736 q_vector->rx.ring = NULL;
3737 q_vector->tx.ring = NULL;
3738
3739 while (num_ringpairs--) {
3740 i40e_map_vector_to_qp(vsi, v_start, qp_idx);
3741 qp_idx++;
3742 qp_remaining--;
3743 }
3744 }
3745 }
3746
3747 /**
3748 * i40e_vsi_request_irq - Request IRQ from the OS
3749 * @vsi: the VSI being configured
3750 * @basename: name for the vector
3751 **/
3752 static int i40e_vsi_request_irq(struct i40e_vsi *vsi, char *basename)
3753 {
3754 struct i40e_pf *pf = vsi->back;
3755 int err;
3756
3757 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
3758 err = i40e_vsi_request_irq_msix(vsi, basename);
3759 else if (pf->flags & I40E_FLAG_MSI_ENABLED)
3760 err = request_irq(pf->pdev->irq, i40e_intr, 0,
3761 pf->int_name, pf);
3762 else
3763 err = request_irq(pf->pdev->irq, i40e_intr, IRQF_SHARED,
3764 pf->int_name, pf);
3765
3766 if (err)
3767 dev_info(&pf->pdev->dev, "request_irq failed, Error %d\n", err);
3768
3769 return err;
3770 }
3771
3772 #ifdef CONFIG_NET_POLL_CONTROLLER
3773 /**
3774 * i40e_netpoll - A Polling 'interrupt' handler
3775 * @netdev: network interface device structure
3776 *
3777 * This is used by netconsole to send skbs without having to re-enable
3778 * interrupts. It's not called while the normal interrupt routine is executing.
3779 **/
3780 #ifdef I40E_FCOE
3781 void i40e_netpoll(struct net_device *netdev)
3782 #else
3783 static void i40e_netpoll(struct net_device *netdev)
3784 #endif
3785 {
3786 struct i40e_netdev_priv *np = netdev_priv(netdev);
3787 struct i40e_vsi *vsi = np->vsi;
3788 struct i40e_pf *pf = vsi->back;
3789 int i;
3790
3791 /* if interface is down do nothing */
3792 if (test_bit(__I40E_DOWN, &vsi->state))
3793 return;
3794
3795 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3796 for (i = 0; i < vsi->num_q_vectors; i++)
3797 i40e_msix_clean_rings(0, vsi->q_vectors[i]);
3798 } else {
3799 i40e_intr(pf->pdev->irq, netdev);
3800 }
3801 }
3802 #endif
3803
3804 /**
3805 * i40e_pf_txq_wait - Wait for a PF's Tx queue to be enabled or disabled
3806 * @pf: the PF being configured
3807 * @pf_q: the PF queue
3808 * @enable: enable or disable state of the queue
3809 *
3810 * This routine will wait for the given Tx queue of the PF to reach the
3811 * enabled or disabled state.
3812 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3813 * multiple retries; else will return 0 in case of success.
3814 **/
3815 static int i40e_pf_txq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3816 {
3817 int i;
3818 u32 tx_reg;
3819
3820 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3821 tx_reg = rd32(&pf->hw, I40E_QTX_ENA(pf_q));
3822 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3823 break;
3824
3825 usleep_range(10, 20);
3826 }
3827 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3828 return -ETIMEDOUT;
3829
3830 return 0;
3831 }
3832
3833 /**
3834 * i40e_vsi_control_tx - Start or stop a VSI's rings
3835 * @vsi: the VSI being configured
3836 * @enable: start or stop the rings
3837 **/
3838 static int i40e_vsi_control_tx(struct i40e_vsi *vsi, bool enable)
3839 {
3840 struct i40e_pf *pf = vsi->back;
3841 struct i40e_hw *hw = &pf->hw;
3842 int i, j, pf_q, ret = 0;
3843 u32 tx_reg;
3844
3845 pf_q = vsi->base_queue;
3846 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3847
3848 /* warn the TX unit of coming changes */
3849 i40e_pre_tx_queue_cfg(&pf->hw, pf_q, enable);
3850 if (!enable)
3851 usleep_range(10, 20);
3852
3853 for (j = 0; j < 50; j++) {
3854 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q));
3855 if (((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT) & 1) ==
3856 ((tx_reg >> I40E_QTX_ENA_QENA_STAT_SHIFT) & 1))
3857 break;
3858 usleep_range(1000, 2000);
3859 }
3860 /* Skip if the queue is already in the requested state */
3861 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3862 continue;
3863
3864 /* turn on/off the queue */
3865 if (enable) {
3866 wr32(hw, I40E_QTX_HEAD(pf_q), 0);
3867 tx_reg |= I40E_QTX_ENA_QENA_REQ_MASK;
3868 } else {
3869 tx_reg &= ~I40E_QTX_ENA_QENA_REQ_MASK;
3870 }
3871
3872 wr32(hw, I40E_QTX_ENA(pf_q), tx_reg);
3873 /* No waiting for the Tx queue to disable */
3874 if (!enable && test_bit(__I40E_PORT_TX_SUSPENDED, &pf->state))
3875 continue;
3876
3877 /* wait for the change to finish */
3878 ret = i40e_pf_txq_wait(pf, pf_q, enable);
3879 if (ret) {
3880 dev_info(&pf->pdev->dev,
3881 "VSI seid %d Tx ring %d %sable timeout\n",
3882 vsi->seid, pf_q, (enable ? "en" : "dis"));
3883 break;
3884 }
3885 }
3886
3887 if (hw->revision_id == 0)
3888 mdelay(50);
3889 return ret;
3890 }
3891
3892 /**
3893 * i40e_pf_rxq_wait - Wait for a PF's Rx queue to be enabled or disabled
3894 * @pf: the PF being configured
3895 * @pf_q: the PF queue
3896 * @enable: enable or disable state of the queue
3897 *
3898 * This routine will wait for the given Rx queue of the PF to reach the
3899 * enabled or disabled state.
3900 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3901 * multiple retries; else will return 0 in case of success.
3902 **/
3903 static int i40e_pf_rxq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3904 {
3905 int i;
3906 u32 rx_reg;
3907
3908 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3909 rx_reg = rd32(&pf->hw, I40E_QRX_ENA(pf_q));
3910 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3911 break;
3912
3913 usleep_range(10, 20);
3914 }
3915 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3916 return -ETIMEDOUT;
3917
3918 return 0;
3919 }
3920
3921 /**
3922 * i40e_vsi_control_rx - Start or stop a VSI's rings
3923 * @vsi: the VSI being configured
3924 * @enable: start or stop the rings
3925 **/
3926 static int i40e_vsi_control_rx(struct i40e_vsi *vsi, bool enable)
3927 {
3928 struct i40e_pf *pf = vsi->back;
3929 struct i40e_hw *hw = &pf->hw;
3930 int i, j, pf_q, ret = 0;
3931 u32 rx_reg;
3932
3933 pf_q = vsi->base_queue;
3934 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3935 for (j = 0; j < 50; j++) {
3936 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q));
3937 if (((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT) & 1) ==
3938 ((rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT) & 1))
3939 break;
3940 usleep_range(1000, 2000);
3941 }
3942
3943 /* Skip if the queue is already in the requested state */
3944 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3945 continue;
3946
3947 /* turn on/off the queue */
3948 if (enable)
3949 rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK;
3950 else
3951 rx_reg &= ~I40E_QRX_ENA_QENA_REQ_MASK;
3952 wr32(hw, I40E_QRX_ENA(pf_q), rx_reg);
3953 /* No waiting for the Tx queue to disable */
3954 if (!enable && test_bit(__I40E_PORT_TX_SUSPENDED, &pf->state))
3955 continue;
3956
3957 /* wait for the change to finish */
3958 ret = i40e_pf_rxq_wait(pf, pf_q, enable);
3959 if (ret) {
3960 dev_info(&pf->pdev->dev,
3961 "VSI seid %d Rx ring %d %sable timeout\n",
3962 vsi->seid, pf_q, (enable ? "en" : "dis"));
3963 break;
3964 }
3965 }
3966
3967 return ret;
3968 }
3969
3970 /**
3971 * i40e_vsi_control_rings - Start or stop a VSI's rings
3972 * @vsi: the VSI being configured
3973 * @enable: start or stop the rings
3974 **/
3975 int i40e_vsi_control_rings(struct i40e_vsi *vsi, bool request)
3976 {
3977 int ret = 0;
3978
3979 /* do rx first for enable and last for disable */
3980 if (request) {
3981 ret = i40e_vsi_control_rx(vsi, request);
3982 if (ret)
3983 return ret;
3984 ret = i40e_vsi_control_tx(vsi, request);
3985 } else {
3986 /* Ignore return value, we need to shutdown whatever we can */
3987 i40e_vsi_control_tx(vsi, request);
3988 i40e_vsi_control_rx(vsi, request);
3989 }
3990
3991 return ret;
3992 }
3993
3994 /**
3995 * i40e_vsi_free_irq - Free the irq association with the OS
3996 * @vsi: the VSI being configured
3997 **/
3998 static void i40e_vsi_free_irq(struct i40e_vsi *vsi)
3999 {
4000 struct i40e_pf *pf = vsi->back;
4001 struct i40e_hw *hw = &pf->hw;
4002 int base = vsi->base_vector;
4003 u32 val, qp;
4004 int i;
4005
4006 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4007 if (!vsi->q_vectors)
4008 return;
4009
4010 if (!vsi->irqs_ready)
4011 return;
4012
4013 vsi->irqs_ready = false;
4014 for (i = 0; i < vsi->num_q_vectors; i++) {
4015 u16 vector = i + base;
4016
4017 /* free only the irqs that were actually requested */
4018 if (!vsi->q_vectors[i] ||
4019 !vsi->q_vectors[i]->num_ringpairs)
4020 continue;
4021
4022 /* clear the affinity_mask in the IRQ descriptor */
4023 irq_set_affinity_hint(pf->msix_entries[vector].vector,
4024 NULL);
4025 synchronize_irq(pf->msix_entries[vector].vector);
4026 free_irq(pf->msix_entries[vector].vector,
4027 vsi->q_vectors[i]);
4028
4029 /* Tear down the interrupt queue link list
4030 *
4031 * We know that they come in pairs and always
4032 * the Rx first, then the Tx. To clear the
4033 * link list, stick the EOL value into the
4034 * next_q field of the registers.
4035 */
4036 val = rd32(hw, I40E_PFINT_LNKLSTN(vector - 1));
4037 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
4038 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4039 val |= I40E_QUEUE_END_OF_LIST
4040 << I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4041 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), val);
4042
4043 while (qp != I40E_QUEUE_END_OF_LIST) {
4044 u32 next;
4045
4046 val = rd32(hw, I40E_QINT_RQCTL(qp));
4047
4048 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
4049 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
4050 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
4051 I40E_QINT_RQCTL_INTEVENT_MASK);
4052
4053 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
4054 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
4055
4056 wr32(hw, I40E_QINT_RQCTL(qp), val);
4057
4058 val = rd32(hw, I40E_QINT_TQCTL(qp));
4059
4060 next = (val & I40E_QINT_TQCTL_NEXTQ_INDX_MASK)
4061 >> I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT;
4062
4063 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
4064 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
4065 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
4066 I40E_QINT_TQCTL_INTEVENT_MASK);
4067
4068 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
4069 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
4070
4071 wr32(hw, I40E_QINT_TQCTL(qp), val);
4072 qp = next;
4073 }
4074 }
4075 } else {
4076 free_irq(pf->pdev->irq, pf);
4077
4078 val = rd32(hw, I40E_PFINT_LNKLST0);
4079 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
4080 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4081 val |= I40E_QUEUE_END_OF_LIST
4082 << I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT;
4083 wr32(hw, I40E_PFINT_LNKLST0, val);
4084
4085 val = rd32(hw, I40E_QINT_RQCTL(qp));
4086 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
4087 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
4088 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
4089 I40E_QINT_RQCTL_INTEVENT_MASK);
4090
4091 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
4092 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
4093
4094 wr32(hw, I40E_QINT_RQCTL(qp), val);
4095
4096 val = rd32(hw, I40E_QINT_TQCTL(qp));
4097
4098 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
4099 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
4100 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
4101 I40E_QINT_TQCTL_INTEVENT_MASK);
4102
4103 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
4104 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
4105
4106 wr32(hw, I40E_QINT_TQCTL(qp), val);
4107 }
4108 }
4109
4110 /**
4111 * i40e_free_q_vector - Free memory allocated for specific interrupt vector
4112 * @vsi: the VSI being configured
4113 * @v_idx: Index of vector to be freed
4114 *
4115 * This function frees the memory allocated to the q_vector. In addition if
4116 * NAPI is enabled it will delete any references to the NAPI struct prior
4117 * to freeing the q_vector.
4118 **/
4119 static void i40e_free_q_vector(struct i40e_vsi *vsi, int v_idx)
4120 {
4121 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
4122 struct i40e_ring *ring;
4123
4124 if (!q_vector)
4125 return;
4126
4127 /* disassociate q_vector from rings */
4128 i40e_for_each_ring(ring, q_vector->tx)
4129 ring->q_vector = NULL;
4130
4131 i40e_for_each_ring(ring, q_vector->rx)
4132 ring->q_vector = NULL;
4133
4134 /* only VSI w/ an associated netdev is set up w/ NAPI */
4135 if (vsi->netdev)
4136 netif_napi_del(&q_vector->napi);
4137
4138 vsi->q_vectors[v_idx] = NULL;
4139
4140 kfree_rcu(q_vector, rcu);
4141 }
4142
4143 /**
4144 * i40e_vsi_free_q_vectors - Free memory allocated for interrupt vectors
4145 * @vsi: the VSI being un-configured
4146 *
4147 * This frees the memory allocated to the q_vectors and
4148 * deletes references to the NAPI struct.
4149 **/
4150 static void i40e_vsi_free_q_vectors(struct i40e_vsi *vsi)
4151 {
4152 int v_idx;
4153
4154 for (v_idx = 0; v_idx < vsi->num_q_vectors; v_idx++)
4155 i40e_free_q_vector(vsi, v_idx);
4156 }
4157
4158 /**
4159 * i40e_reset_interrupt_capability - Disable interrupt setup in OS
4160 * @pf: board private structure
4161 **/
4162 static void i40e_reset_interrupt_capability(struct i40e_pf *pf)
4163 {
4164 /* If we're in Legacy mode, the interrupt was cleaned in vsi_close */
4165 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4166 pci_disable_msix(pf->pdev);
4167 kfree(pf->msix_entries);
4168 pf->msix_entries = NULL;
4169 kfree(pf->irq_pile);
4170 pf->irq_pile = NULL;
4171 } else if (pf->flags & I40E_FLAG_MSI_ENABLED) {
4172 pci_disable_msi(pf->pdev);
4173 }
4174 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED);
4175 }
4176
4177 /**
4178 * i40e_clear_interrupt_scheme - Clear the current interrupt scheme settings
4179 * @pf: board private structure
4180 *
4181 * We go through and clear interrupt specific resources and reset the structure
4182 * to pre-load conditions
4183 **/
4184 static void i40e_clear_interrupt_scheme(struct i40e_pf *pf)
4185 {
4186 int i;
4187
4188 i40e_stop_misc_vector(pf);
4189 if (pf->flags & I40E_FLAG_MSIX_ENABLED && pf->msix_entries) {
4190 synchronize_irq(pf->msix_entries[0].vector);
4191 free_irq(pf->msix_entries[0].vector, pf);
4192 }
4193
4194 i40e_put_lump(pf->irq_pile, pf->iwarp_base_vector,
4195 I40E_IWARP_IRQ_PILE_ID);
4196
4197 i40e_put_lump(pf->irq_pile, 0, I40E_PILE_VALID_BIT-1);
4198 for (i = 0; i < pf->num_alloc_vsi; i++)
4199 if (pf->vsi[i])
4200 i40e_vsi_free_q_vectors(pf->vsi[i]);
4201 i40e_reset_interrupt_capability(pf);
4202 }
4203
4204 /**
4205 * i40e_napi_enable_all - Enable NAPI for all q_vectors in the VSI
4206 * @vsi: the VSI being configured
4207 **/
4208 static void i40e_napi_enable_all(struct i40e_vsi *vsi)
4209 {
4210 int q_idx;
4211
4212 if (!vsi->netdev)
4213 return;
4214
4215 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
4216 napi_enable(&vsi->q_vectors[q_idx]->napi);
4217 }
4218
4219 /**
4220 * i40e_napi_disable_all - Disable NAPI for all q_vectors in the VSI
4221 * @vsi: the VSI being configured
4222 **/
4223 static void i40e_napi_disable_all(struct i40e_vsi *vsi)
4224 {
4225 int q_idx;
4226
4227 if (!vsi->netdev)
4228 return;
4229
4230 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
4231 napi_disable(&vsi->q_vectors[q_idx]->napi);
4232 }
4233
4234 /**
4235 * i40e_vsi_close - Shut down a VSI
4236 * @vsi: the vsi to be quelled
4237 **/
4238 static void i40e_vsi_close(struct i40e_vsi *vsi)
4239 {
4240 bool reset = false;
4241
4242 if (!test_and_set_bit(__I40E_DOWN, &vsi->state))
4243 i40e_down(vsi);
4244 i40e_vsi_free_irq(vsi);
4245 i40e_vsi_free_tx_resources(vsi);
4246 i40e_vsi_free_rx_resources(vsi);
4247 vsi->current_netdev_flags = 0;
4248 if (test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
4249 reset = true;
4250 i40e_notify_client_of_netdev_close(vsi, reset);
4251 }
4252
4253 /**
4254 * i40e_quiesce_vsi - Pause a given VSI
4255 * @vsi: the VSI being paused
4256 **/
4257 static void i40e_quiesce_vsi(struct i40e_vsi *vsi)
4258 {
4259 if (test_bit(__I40E_DOWN, &vsi->state))
4260 return;
4261
4262 /* No need to disable FCoE VSI when Tx suspended */
4263 if ((test_bit(__I40E_PORT_TX_SUSPENDED, &vsi->back->state)) &&
4264 vsi->type == I40E_VSI_FCOE) {
4265 dev_dbg(&vsi->back->pdev->dev,
4266 "VSI seid %d skipping FCoE VSI disable\n", vsi->seid);
4267 return;
4268 }
4269
4270 set_bit(__I40E_NEEDS_RESTART, &vsi->state);
4271 if (vsi->netdev && netif_running(vsi->netdev))
4272 vsi->netdev->netdev_ops->ndo_stop(vsi->netdev);
4273 else
4274 i40e_vsi_close(vsi);
4275 }
4276
4277 /**
4278 * i40e_unquiesce_vsi - Resume a given VSI
4279 * @vsi: the VSI being resumed
4280 **/
4281 static void i40e_unquiesce_vsi(struct i40e_vsi *vsi)
4282 {
4283 if (!test_bit(__I40E_NEEDS_RESTART, &vsi->state))
4284 return;
4285
4286 clear_bit(__I40E_NEEDS_RESTART, &vsi->state);
4287 if (vsi->netdev && netif_running(vsi->netdev))
4288 vsi->netdev->netdev_ops->ndo_open(vsi->netdev);
4289 else
4290 i40e_vsi_open(vsi); /* this clears the DOWN bit */
4291 }
4292
4293 /**
4294 * i40e_pf_quiesce_all_vsi - Pause all VSIs on a PF
4295 * @pf: the PF
4296 **/
4297 static void i40e_pf_quiesce_all_vsi(struct i40e_pf *pf)
4298 {
4299 int v;
4300
4301 for (v = 0; v < pf->num_alloc_vsi; v++) {
4302 if (pf->vsi[v])
4303 i40e_quiesce_vsi(pf->vsi[v]);
4304 }
4305 }
4306
4307 /**
4308 * i40e_pf_unquiesce_all_vsi - Resume all VSIs on a PF
4309 * @pf: the PF
4310 **/
4311 static void i40e_pf_unquiesce_all_vsi(struct i40e_pf *pf)
4312 {
4313 int v;
4314
4315 for (v = 0; v < pf->num_alloc_vsi; v++) {
4316 if (pf->vsi[v])
4317 i40e_unquiesce_vsi(pf->vsi[v]);
4318 }
4319 }
4320
4321 #ifdef CONFIG_I40E_DCB
4322 /**
4323 * i40e_vsi_wait_queues_disabled - Wait for VSI's queues to be disabled
4324 * @vsi: the VSI being configured
4325 *
4326 * This function waits for the given VSI's queues to be disabled.
4327 **/
4328 static int i40e_vsi_wait_queues_disabled(struct i40e_vsi *vsi)
4329 {
4330 struct i40e_pf *pf = vsi->back;
4331 int i, pf_q, ret;
4332
4333 pf_q = vsi->base_queue;
4334 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4335 /* Check and wait for the disable status of the queue */
4336 ret = i40e_pf_txq_wait(pf, pf_q, false);
4337 if (ret) {
4338 dev_info(&pf->pdev->dev,
4339 "VSI seid %d Tx ring %d disable timeout\n",
4340 vsi->seid, pf_q);
4341 return ret;
4342 }
4343 }
4344
4345 pf_q = vsi->base_queue;
4346 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4347 /* Check and wait for the disable status of the queue */
4348 ret = i40e_pf_rxq_wait(pf, pf_q, false);
4349 if (ret) {
4350 dev_info(&pf->pdev->dev,
4351 "VSI seid %d Rx ring %d disable timeout\n",
4352 vsi->seid, pf_q);
4353 return ret;
4354 }
4355 }
4356
4357 return 0;
4358 }
4359
4360 /**
4361 * i40e_pf_wait_queues_disabled - Wait for all queues of PF VSIs to be disabled
4362 * @pf: the PF
4363 *
4364 * This function waits for the queues to be in disabled state for all the
4365 * VSIs that are managed by this PF.
4366 **/
4367 static int i40e_pf_wait_queues_disabled(struct i40e_pf *pf)
4368 {
4369 int v, ret = 0;
4370
4371 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
4372 /* No need to wait for FCoE VSI queues */
4373 if (pf->vsi[v] && pf->vsi[v]->type != I40E_VSI_FCOE) {
4374 ret = i40e_vsi_wait_queues_disabled(pf->vsi[v]);
4375 if (ret)
4376 break;
4377 }
4378 }
4379
4380 return ret;
4381 }
4382
4383 #endif
4384
4385 /**
4386 * i40e_detect_recover_hung_queue - Function to detect and recover hung_queue
4387 * @q_idx: TX queue number
4388 * @vsi: Pointer to VSI struct
4389 *
4390 * This function checks specified queue for given VSI. Detects hung condition.
4391 * Sets hung bit since it is two step process. Before next run of service task
4392 * if napi_poll runs, it reset 'hung' bit for respective q_vector. If not,
4393 * hung condition remain unchanged and during subsequent run, this function
4394 * issues SW interrupt to recover from hung condition.
4395 **/
4396 static void i40e_detect_recover_hung_queue(int q_idx, struct i40e_vsi *vsi)
4397 {
4398 struct i40e_ring *tx_ring = NULL;
4399 struct i40e_pf *pf;
4400 u32 head, val, tx_pending_hw;
4401 int i;
4402
4403 pf = vsi->back;
4404
4405 /* now that we have an index, find the tx_ring struct */
4406 for (i = 0; i < vsi->num_queue_pairs; i++) {
4407 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) {
4408 if (q_idx == vsi->tx_rings[i]->queue_index) {
4409 tx_ring = vsi->tx_rings[i];
4410 break;
4411 }
4412 }
4413 }
4414
4415 if (!tx_ring)
4416 return;
4417
4418 /* Read interrupt register */
4419 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
4420 val = rd32(&pf->hw,
4421 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx +
4422 tx_ring->vsi->base_vector - 1));
4423 else
4424 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
4425
4426 head = i40e_get_head(tx_ring);
4427
4428 tx_pending_hw = i40e_get_tx_pending(tx_ring, false);
4429
4430 /* HW is done executing descriptors, updated HEAD write back,
4431 * but SW hasn't processed those descriptors. If interrupt is
4432 * not generated from this point ON, it could result into
4433 * dev_watchdog detecting timeout on those netdev_queue,
4434 * hence proactively trigger SW interrupt.
4435 */
4436 if (tx_pending_hw && (!(val & I40E_PFINT_DYN_CTLN_INTENA_MASK))) {
4437 /* NAPI Poll didn't run and clear since it was set */
4438 if (test_and_clear_bit(I40E_Q_VECTOR_HUNG_DETECT,
4439 &tx_ring->q_vector->hung_detected)) {
4440 netdev_info(vsi->netdev, "VSI_seid %d, Hung TX queue %d, tx_pending_hw: %d, NTC:0x%x, HWB: 0x%x, NTU: 0x%x, TAIL: 0x%x\n",
4441 vsi->seid, q_idx, tx_pending_hw,
4442 tx_ring->next_to_clean, head,
4443 tx_ring->next_to_use,
4444 readl(tx_ring->tail));
4445 netdev_info(vsi->netdev, "VSI_seid %d, Issuing force_wb for TX queue %d, Interrupt Reg: 0x%x\n",
4446 vsi->seid, q_idx, val);
4447 i40e_force_wb(vsi, tx_ring->q_vector);
4448 } else {
4449 /* First Chance - detected possible hung */
4450 set_bit(I40E_Q_VECTOR_HUNG_DETECT,
4451 &tx_ring->q_vector->hung_detected);
4452 }
4453 }
4454
4455 /* This is the case where we have interrupts missing,
4456 * so the tx_pending in HW will most likely be 0, but we
4457 * will have tx_pending in SW since the WB happened but the
4458 * interrupt got lost.
4459 */
4460 if ((!tx_pending_hw) && i40e_get_tx_pending(tx_ring, true) &&
4461 (!(val & I40E_PFINT_DYN_CTLN_INTENA_MASK))) {
4462 if (napi_reschedule(&tx_ring->q_vector->napi))
4463 tx_ring->tx_stats.tx_lost_interrupt++;
4464 }
4465 }
4466
4467 /**
4468 * i40e_detect_recover_hung - Function to detect and recover hung_queues
4469 * @pf: pointer to PF struct
4470 *
4471 * LAN VSI has netdev and netdev has TX queues. This function is to check
4472 * each of those TX queues if they are hung, trigger recovery by issuing
4473 * SW interrupt.
4474 **/
4475 static void i40e_detect_recover_hung(struct i40e_pf *pf)
4476 {
4477 struct net_device *netdev;
4478 struct i40e_vsi *vsi;
4479 int i;
4480
4481 /* Only for LAN VSI */
4482 vsi = pf->vsi[pf->lan_vsi];
4483
4484 if (!vsi)
4485 return;
4486
4487 /* Make sure, VSI state is not DOWN/RECOVERY_PENDING */
4488 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
4489 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
4490 return;
4491
4492 /* Make sure type is MAIN VSI */
4493 if (vsi->type != I40E_VSI_MAIN)
4494 return;
4495
4496 netdev = vsi->netdev;
4497 if (!netdev)
4498 return;
4499
4500 /* Bail out if netif_carrier is not OK */
4501 if (!netif_carrier_ok(netdev))
4502 return;
4503
4504 /* Go thru' TX queues for netdev */
4505 for (i = 0; i < netdev->num_tx_queues; i++) {
4506 struct netdev_queue *q;
4507
4508 q = netdev_get_tx_queue(netdev, i);
4509 if (q)
4510 i40e_detect_recover_hung_queue(i, vsi);
4511 }
4512 }
4513
4514 /**
4515 * i40e_get_iscsi_tc_map - Return TC map for iSCSI APP
4516 * @pf: pointer to PF
4517 *
4518 * Get TC map for ISCSI PF type that will include iSCSI TC
4519 * and LAN TC.
4520 **/
4521 static u8 i40e_get_iscsi_tc_map(struct i40e_pf *pf)
4522 {
4523 struct i40e_dcb_app_priority_table app;
4524 struct i40e_hw *hw = &pf->hw;
4525 u8 enabled_tc = 1; /* TC0 is always enabled */
4526 u8 tc, i;
4527 /* Get the iSCSI APP TLV */
4528 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4529
4530 for (i = 0; i < dcbcfg->numapps; i++) {
4531 app = dcbcfg->app[i];
4532 if (app.selector == I40E_APP_SEL_TCPIP &&
4533 app.protocolid == I40E_APP_PROTOID_ISCSI) {
4534 tc = dcbcfg->etscfg.prioritytable[app.priority];
4535 enabled_tc |= BIT(tc);
4536 break;
4537 }
4538 }
4539
4540 return enabled_tc;
4541 }
4542
4543 /**
4544 * i40e_dcb_get_num_tc - Get the number of TCs from DCBx config
4545 * @dcbcfg: the corresponding DCBx configuration structure
4546 *
4547 * Return the number of TCs from given DCBx configuration
4548 **/
4549 static u8 i40e_dcb_get_num_tc(struct i40e_dcbx_config *dcbcfg)
4550 {
4551 int i, tc_unused = 0;
4552 u8 num_tc = 0;
4553 u8 ret = 0;
4554
4555 /* Scan the ETS Config Priority Table to find
4556 * traffic class enabled for a given priority
4557 * and create a bitmask of enabled TCs
4558 */
4559 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++)
4560 num_tc |= BIT(dcbcfg->etscfg.prioritytable[i]);
4561
4562 /* Now scan the bitmask to check for
4563 * contiguous TCs starting with TC0
4564 */
4565 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4566 if (num_tc & BIT(i)) {
4567 if (!tc_unused) {
4568 ret++;
4569 } else {
4570 pr_err("Non-contiguous TC - Disabling DCB\n");
4571 return 1;
4572 }
4573 } else {
4574 tc_unused = 1;
4575 }
4576 }
4577
4578 /* There is always at least TC0 */
4579 if (!ret)
4580 ret = 1;
4581
4582 return ret;
4583 }
4584
4585 /**
4586 * i40e_dcb_get_enabled_tc - Get enabled traffic classes
4587 * @dcbcfg: the corresponding DCBx configuration structure
4588 *
4589 * Query the current DCB configuration and return the number of
4590 * traffic classes enabled from the given DCBX config
4591 **/
4592 static u8 i40e_dcb_get_enabled_tc(struct i40e_dcbx_config *dcbcfg)
4593 {
4594 u8 num_tc = i40e_dcb_get_num_tc(dcbcfg);
4595 u8 enabled_tc = 1;
4596 u8 i;
4597
4598 for (i = 0; i < num_tc; i++)
4599 enabled_tc |= BIT(i);
4600
4601 return enabled_tc;
4602 }
4603
4604 /**
4605 * i40e_pf_get_num_tc - Get enabled traffic classes for PF
4606 * @pf: PF being queried
4607 *
4608 * Return number of traffic classes enabled for the given PF
4609 **/
4610 static u8 i40e_pf_get_num_tc(struct i40e_pf *pf)
4611 {
4612 struct i40e_hw *hw = &pf->hw;
4613 u8 i, enabled_tc = 1;
4614 u8 num_tc = 0;
4615 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4616
4617 /* If DCB is not enabled then always in single TC */
4618 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4619 return 1;
4620
4621 /* SFP mode will be enabled for all TCs on port */
4622 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
4623 return i40e_dcb_get_num_tc(dcbcfg);
4624
4625 /* MFP mode return count of enabled TCs for this PF */
4626 if (pf->hw.func_caps.iscsi)
4627 enabled_tc = i40e_get_iscsi_tc_map(pf);
4628 else
4629 return 1; /* Only TC0 */
4630
4631 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4632 if (enabled_tc & BIT(i))
4633 num_tc++;
4634 }
4635 return num_tc;
4636 }
4637
4638 /**
4639 * i40e_pf_get_default_tc - Get bitmap for first enabled TC
4640 * @pf: PF being queried
4641 *
4642 * Return a bitmap for first enabled traffic class for this PF.
4643 **/
4644 static u8 i40e_pf_get_default_tc(struct i40e_pf *pf)
4645 {
4646 u8 enabled_tc = pf->hw.func_caps.enabled_tcmap;
4647 u8 i = 0;
4648
4649 if (!enabled_tc)
4650 return 0x1; /* TC0 */
4651
4652 /* Find the first enabled TC */
4653 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4654 if (enabled_tc & BIT(i))
4655 break;
4656 }
4657
4658 return BIT(i);
4659 }
4660
4661 /**
4662 * i40e_pf_get_pf_tc_map - Get bitmap for enabled traffic classes
4663 * @pf: PF being queried
4664 *
4665 * Return a bitmap for enabled traffic classes for this PF.
4666 **/
4667 static u8 i40e_pf_get_tc_map(struct i40e_pf *pf)
4668 {
4669 /* If DCB is not enabled for this PF then just return default TC */
4670 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4671 return i40e_pf_get_default_tc(pf);
4672
4673 /* SFP mode we want PF to be enabled for all TCs */
4674 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
4675 return i40e_dcb_get_enabled_tc(&pf->hw.local_dcbx_config);
4676
4677 /* MFP enabled and iSCSI PF type */
4678 if (pf->hw.func_caps.iscsi)
4679 return i40e_get_iscsi_tc_map(pf);
4680 else
4681 return i40e_pf_get_default_tc(pf);
4682 }
4683
4684 /**
4685 * i40e_vsi_get_bw_info - Query VSI BW Information
4686 * @vsi: the VSI being queried
4687 *
4688 * Returns 0 on success, negative value on failure
4689 **/
4690 static int i40e_vsi_get_bw_info(struct i40e_vsi *vsi)
4691 {
4692 struct i40e_aqc_query_vsi_ets_sla_config_resp bw_ets_config = {0};
4693 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0};
4694 struct i40e_pf *pf = vsi->back;
4695 struct i40e_hw *hw = &pf->hw;
4696 i40e_status ret;
4697 u32 tc_bw_max;
4698 int i;
4699
4700 /* Get the VSI level BW configuration */
4701 ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL);
4702 if (ret) {
4703 dev_info(&pf->pdev->dev,
4704 "couldn't get PF vsi bw config, err %s aq_err %s\n",
4705 i40e_stat_str(&pf->hw, ret),
4706 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4707 return -EINVAL;
4708 }
4709
4710 /* Get the VSI level BW configuration per TC */
4711 ret = i40e_aq_query_vsi_ets_sla_config(hw, vsi->seid, &bw_ets_config,
4712 NULL);
4713 if (ret) {
4714 dev_info(&pf->pdev->dev,
4715 "couldn't get PF vsi ets bw config, err %s aq_err %s\n",
4716 i40e_stat_str(&pf->hw, ret),
4717 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4718 return -EINVAL;
4719 }
4720
4721 if (bw_config.tc_valid_bits != bw_ets_config.tc_valid_bits) {
4722 dev_info(&pf->pdev->dev,
4723 "Enabled TCs mismatch from querying VSI BW info 0x%08x 0x%08x\n",
4724 bw_config.tc_valid_bits,
4725 bw_ets_config.tc_valid_bits);
4726 /* Still continuing */
4727 }
4728
4729 vsi->bw_limit = le16_to_cpu(bw_config.port_bw_limit);
4730 vsi->bw_max_quanta = bw_config.max_bw;
4731 tc_bw_max = le16_to_cpu(bw_ets_config.tc_bw_max[0]) |
4732 (le16_to_cpu(bw_ets_config.tc_bw_max[1]) << 16);
4733 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4734 vsi->bw_ets_share_credits[i] = bw_ets_config.share_credits[i];
4735 vsi->bw_ets_limit_credits[i] =
4736 le16_to_cpu(bw_ets_config.credits[i]);
4737 /* 3 bits out of 4 for each TC */
4738 vsi->bw_ets_max_quanta[i] = (u8)((tc_bw_max >> (i*4)) & 0x7);
4739 }
4740
4741 return 0;
4742 }
4743
4744 /**
4745 * i40e_vsi_configure_bw_alloc - Configure VSI BW allocation per TC
4746 * @vsi: the VSI being configured
4747 * @enabled_tc: TC bitmap
4748 * @bw_credits: BW shared credits per TC
4749 *
4750 * Returns 0 on success, negative value on failure
4751 **/
4752 static int i40e_vsi_configure_bw_alloc(struct i40e_vsi *vsi, u8 enabled_tc,
4753 u8 *bw_share)
4754 {
4755 struct i40e_aqc_configure_vsi_tc_bw_data bw_data;
4756 i40e_status ret;
4757 int i;
4758
4759 bw_data.tc_valid_bits = enabled_tc;
4760 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4761 bw_data.tc_bw_credits[i] = bw_share[i];
4762
4763 ret = i40e_aq_config_vsi_tc_bw(&vsi->back->hw, vsi->seid, &bw_data,
4764 NULL);
4765 if (ret) {
4766 dev_info(&vsi->back->pdev->dev,
4767 "AQ command Config VSI BW allocation per TC failed = %d\n",
4768 vsi->back->hw.aq.asq_last_status);
4769 return -EINVAL;
4770 }
4771
4772 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4773 vsi->info.qs_handle[i] = bw_data.qs_handles[i];
4774
4775 return 0;
4776 }
4777
4778 /**
4779 * i40e_vsi_config_netdev_tc - Setup the netdev TC configuration
4780 * @vsi: the VSI being configured
4781 * @enabled_tc: TC map to be enabled
4782 *
4783 **/
4784 static void i40e_vsi_config_netdev_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4785 {
4786 struct net_device *netdev = vsi->netdev;
4787 struct i40e_pf *pf = vsi->back;
4788 struct i40e_hw *hw = &pf->hw;
4789 u8 netdev_tc = 0;
4790 int i;
4791 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4792
4793 if (!netdev)
4794 return;
4795
4796 if (!enabled_tc) {
4797 netdev_reset_tc(netdev);
4798 return;
4799 }
4800
4801 /* Set up actual enabled TCs on the VSI */
4802 if (netdev_set_num_tc(netdev, vsi->tc_config.numtc))
4803 return;
4804
4805 /* set per TC queues for the VSI */
4806 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4807 /* Only set TC queues for enabled tcs
4808 *
4809 * e.g. For a VSI that has TC0 and TC3 enabled the
4810 * enabled_tc bitmap would be 0x00001001; the driver
4811 * will set the numtc for netdev as 2 that will be
4812 * referenced by the netdev layer as TC 0 and 1.
4813 */
4814 if (vsi->tc_config.enabled_tc & BIT(i))
4815 netdev_set_tc_queue(netdev,
4816 vsi->tc_config.tc_info[i].netdev_tc,
4817 vsi->tc_config.tc_info[i].qcount,
4818 vsi->tc_config.tc_info[i].qoffset);
4819 }
4820
4821 /* Assign UP2TC map for the VSI */
4822 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
4823 /* Get the actual TC# for the UP */
4824 u8 ets_tc = dcbcfg->etscfg.prioritytable[i];
4825 /* Get the mapped netdev TC# for the UP */
4826 netdev_tc = vsi->tc_config.tc_info[ets_tc].netdev_tc;
4827 netdev_set_prio_tc_map(netdev, i, netdev_tc);
4828 }
4829 }
4830
4831 /**
4832 * i40e_vsi_update_queue_map - Update our copy of VSi info with new queue map
4833 * @vsi: the VSI being configured
4834 * @ctxt: the ctxt buffer returned from AQ VSI update param command
4835 **/
4836 static void i40e_vsi_update_queue_map(struct i40e_vsi *vsi,
4837 struct i40e_vsi_context *ctxt)
4838 {
4839 /* copy just the sections touched not the entire info
4840 * since not all sections are valid as returned by
4841 * update vsi params
4842 */
4843 vsi->info.mapping_flags = ctxt->info.mapping_flags;
4844 memcpy(&vsi->info.queue_mapping,
4845 &ctxt->info.queue_mapping, sizeof(vsi->info.queue_mapping));
4846 memcpy(&vsi->info.tc_mapping, ctxt->info.tc_mapping,
4847 sizeof(vsi->info.tc_mapping));
4848 }
4849
4850 /**
4851 * i40e_vsi_config_tc - Configure VSI Tx Scheduler for given TC map
4852 * @vsi: VSI to be configured
4853 * @enabled_tc: TC bitmap
4854 *
4855 * This configures a particular VSI for TCs that are mapped to the
4856 * given TC bitmap. It uses default bandwidth share for TCs across
4857 * VSIs to configure TC for a particular VSI.
4858 *
4859 * NOTE:
4860 * It is expected that the VSI queues have been quisced before calling
4861 * this function.
4862 **/
4863 static int i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4864 {
4865 u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0};
4866 struct i40e_vsi_context ctxt;
4867 int ret = 0;
4868 int i;
4869
4870 /* Check if enabled_tc is same as existing or new TCs */
4871 if (vsi->tc_config.enabled_tc == enabled_tc)
4872 return ret;
4873
4874 /* Enable ETS TCs with equal BW Share for now across all VSIs */
4875 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4876 if (enabled_tc & BIT(i))
4877 bw_share[i] = 1;
4878 }
4879
4880 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share);
4881 if (ret) {
4882 dev_info(&vsi->back->pdev->dev,
4883 "Failed configuring TC map %d for VSI %d\n",
4884 enabled_tc, vsi->seid);
4885 goto out;
4886 }
4887
4888 /* Update Queue Pairs Mapping for currently enabled UPs */
4889 ctxt.seid = vsi->seid;
4890 ctxt.pf_num = vsi->back->hw.pf_id;
4891 ctxt.vf_num = 0;
4892 ctxt.uplink_seid = vsi->uplink_seid;
4893 ctxt.info = vsi->info;
4894 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
4895
4896 if (vsi->back->flags & I40E_FLAG_IWARP_ENABLED) {
4897 ctxt.info.valid_sections |=
4898 cpu_to_le16(I40E_AQ_VSI_PROP_QUEUE_OPT_VALID);
4899 ctxt.info.queueing_opt_flags |= I40E_AQ_VSI_QUE_OPT_TCP_ENA;
4900 }
4901
4902 /* Update the VSI after updating the VSI queue-mapping information */
4903 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
4904 if (ret) {
4905 dev_info(&vsi->back->pdev->dev,
4906 "Update vsi tc config failed, err %s aq_err %s\n",
4907 i40e_stat_str(&vsi->back->hw, ret),
4908 i40e_aq_str(&vsi->back->hw,
4909 vsi->back->hw.aq.asq_last_status));
4910 goto out;
4911 }
4912 /* update the local VSI info with updated queue map */
4913 i40e_vsi_update_queue_map(vsi, &ctxt);
4914 vsi->info.valid_sections = 0;
4915
4916 /* Update current VSI BW information */
4917 ret = i40e_vsi_get_bw_info(vsi);
4918 if (ret) {
4919 dev_info(&vsi->back->pdev->dev,
4920 "Failed updating vsi bw info, err %s aq_err %s\n",
4921 i40e_stat_str(&vsi->back->hw, ret),
4922 i40e_aq_str(&vsi->back->hw,
4923 vsi->back->hw.aq.asq_last_status));
4924 goto out;
4925 }
4926
4927 /* Update the netdev TC setup */
4928 i40e_vsi_config_netdev_tc(vsi, enabled_tc);
4929 out:
4930 return ret;
4931 }
4932
4933 /**
4934 * i40e_veb_config_tc - Configure TCs for given VEB
4935 * @veb: given VEB
4936 * @enabled_tc: TC bitmap
4937 *
4938 * Configures given TC bitmap for VEB (switching) element
4939 **/
4940 int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc)
4941 {
4942 struct i40e_aqc_configure_switching_comp_bw_config_data bw_data = {0};
4943 struct i40e_pf *pf = veb->pf;
4944 int ret = 0;
4945 int i;
4946
4947 /* No TCs or already enabled TCs just return */
4948 if (!enabled_tc || veb->enabled_tc == enabled_tc)
4949 return ret;
4950
4951 bw_data.tc_valid_bits = enabled_tc;
4952 /* bw_data.absolute_credits is not set (relative) */
4953
4954 /* Enable ETS TCs with equal BW Share for now */
4955 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4956 if (enabled_tc & BIT(i))
4957 bw_data.tc_bw_share_credits[i] = 1;
4958 }
4959
4960 ret = i40e_aq_config_switch_comp_bw_config(&pf->hw, veb->seid,
4961 &bw_data, NULL);
4962 if (ret) {
4963 dev_info(&pf->pdev->dev,
4964 "VEB bw config failed, err %s aq_err %s\n",
4965 i40e_stat_str(&pf->hw, ret),
4966 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4967 goto out;
4968 }
4969
4970 /* Update the BW information */
4971 ret = i40e_veb_get_bw_info(veb);
4972 if (ret) {
4973 dev_info(&pf->pdev->dev,
4974 "Failed getting veb bw config, err %s aq_err %s\n",
4975 i40e_stat_str(&pf->hw, ret),
4976 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4977 }
4978
4979 out:
4980 return ret;
4981 }
4982
4983 #ifdef CONFIG_I40E_DCB
4984 /**
4985 * i40e_dcb_reconfigure - Reconfigure all VEBs and VSIs
4986 * @pf: PF struct
4987 *
4988 * Reconfigure VEB/VSIs on a given PF; it is assumed that
4989 * the caller would've quiesce all the VSIs before calling
4990 * this function
4991 **/
4992 static void i40e_dcb_reconfigure(struct i40e_pf *pf)
4993 {
4994 u8 tc_map = 0;
4995 int ret;
4996 u8 v;
4997
4998 /* Enable the TCs available on PF to all VEBs */
4999 tc_map = i40e_pf_get_tc_map(pf);
5000 for (v = 0; v < I40E_MAX_VEB; v++) {
5001 if (!pf->veb[v])
5002 continue;
5003 ret = i40e_veb_config_tc(pf->veb[v], tc_map);
5004 if (ret) {
5005 dev_info(&pf->pdev->dev,
5006 "Failed configuring TC for VEB seid=%d\n",
5007 pf->veb[v]->seid);
5008 /* Will try to configure as many components */
5009 }
5010 }
5011
5012 /* Update each VSI */
5013 for (v = 0; v < pf->num_alloc_vsi; v++) {
5014 if (!pf->vsi[v])
5015 continue;
5016
5017 /* - Enable all TCs for the LAN VSI
5018 #ifdef I40E_FCOE
5019 * - For FCoE VSI only enable the TC configured
5020 * as per the APP TLV
5021 #endif
5022 * - For all others keep them at TC0 for now
5023 */
5024 if (v == pf->lan_vsi)
5025 tc_map = i40e_pf_get_tc_map(pf);
5026 else
5027 tc_map = i40e_pf_get_default_tc(pf);
5028 #ifdef I40E_FCOE
5029 if (pf->vsi[v]->type == I40E_VSI_FCOE)
5030 tc_map = i40e_get_fcoe_tc_map(pf);
5031 #endif /* #ifdef I40E_FCOE */
5032
5033 ret = i40e_vsi_config_tc(pf->vsi[v], tc_map);
5034 if (ret) {
5035 dev_info(&pf->pdev->dev,
5036 "Failed configuring TC for VSI seid=%d\n",
5037 pf->vsi[v]->seid);
5038 /* Will try to configure as many components */
5039 } else {
5040 /* Re-configure VSI vectors based on updated TC map */
5041 i40e_vsi_map_rings_to_vectors(pf->vsi[v]);
5042 if (pf->vsi[v]->netdev)
5043 i40e_dcbnl_set_all(pf->vsi[v]);
5044 }
5045 }
5046 }
5047
5048 /**
5049 * i40e_resume_port_tx - Resume port Tx
5050 * @pf: PF struct
5051 *
5052 * Resume a port's Tx and issue a PF reset in case of failure to
5053 * resume.
5054 **/
5055 static int i40e_resume_port_tx(struct i40e_pf *pf)
5056 {
5057 struct i40e_hw *hw = &pf->hw;
5058 int ret;
5059
5060 ret = i40e_aq_resume_port_tx(hw, NULL);
5061 if (ret) {
5062 dev_info(&pf->pdev->dev,
5063 "Resume Port Tx failed, err %s aq_err %s\n",
5064 i40e_stat_str(&pf->hw, ret),
5065 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5066 /* Schedule PF reset to recover */
5067 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
5068 i40e_service_event_schedule(pf);
5069 }
5070
5071 return ret;
5072 }
5073
5074 /**
5075 * i40e_init_pf_dcb - Initialize DCB configuration
5076 * @pf: PF being configured
5077 *
5078 * Query the current DCB configuration and cache it
5079 * in the hardware structure
5080 **/
5081 static int i40e_init_pf_dcb(struct i40e_pf *pf)
5082 {
5083 struct i40e_hw *hw = &pf->hw;
5084 int err = 0;
5085
5086 /* Do not enable DCB for SW1 and SW2 images even if the FW is capable */
5087 if (pf->flags & I40E_FLAG_NO_DCB_SUPPORT)
5088 goto out;
5089
5090 /* Get the initial DCB configuration */
5091 err = i40e_init_dcb(hw);
5092 if (!err) {
5093 /* Device/Function is not DCBX capable */
5094 if ((!hw->func_caps.dcb) ||
5095 (hw->dcbx_status == I40E_DCBX_STATUS_DISABLED)) {
5096 dev_info(&pf->pdev->dev,
5097 "DCBX offload is not supported or is disabled for this PF.\n");
5098
5099 if (pf->flags & I40E_FLAG_MFP_ENABLED)
5100 goto out;
5101
5102 } else {
5103 /* When status is not DISABLED then DCBX in FW */
5104 pf->dcbx_cap = DCB_CAP_DCBX_LLD_MANAGED |
5105 DCB_CAP_DCBX_VER_IEEE;
5106
5107 pf->flags |= I40E_FLAG_DCB_CAPABLE;
5108 /* Enable DCB tagging only when more than one TC
5109 * or explicitly disable if only one TC
5110 */
5111 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
5112 pf->flags |= I40E_FLAG_DCB_ENABLED;
5113 else
5114 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
5115 dev_dbg(&pf->pdev->dev,
5116 "DCBX offload is supported for this PF.\n");
5117 }
5118 } else {
5119 dev_info(&pf->pdev->dev,
5120 "Query for DCB configuration failed, err %s aq_err %s\n",
5121 i40e_stat_str(&pf->hw, err),
5122 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5123 }
5124
5125 out:
5126 return err;
5127 }
5128 #endif /* CONFIG_I40E_DCB */
5129 #define SPEED_SIZE 14
5130 #define FC_SIZE 8
5131 /**
5132 * i40e_print_link_message - print link up or down
5133 * @vsi: the VSI for which link needs a message
5134 */
5135 void i40e_print_link_message(struct i40e_vsi *vsi, bool isup)
5136 {
5137 char *speed = "Unknown";
5138 char *fc = "Unknown";
5139
5140 if (vsi->current_isup == isup)
5141 return;
5142 vsi->current_isup = isup;
5143 if (!isup) {
5144 netdev_info(vsi->netdev, "NIC Link is Down\n");
5145 return;
5146 }
5147
5148 /* Warn user if link speed on NPAR enabled partition is not at
5149 * least 10GB
5150 */
5151 if (vsi->back->hw.func_caps.npar_enable &&
5152 (vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_1GB ||
5153 vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_100MB))
5154 netdev_warn(vsi->netdev,
5155 "The partition detected link speed that is less than 10Gbps\n");
5156
5157 switch (vsi->back->hw.phy.link_info.link_speed) {
5158 case I40E_LINK_SPEED_40GB:
5159 speed = "40 G";
5160 break;
5161 case I40E_LINK_SPEED_20GB:
5162 speed = "20 G";
5163 break;
5164 case I40E_LINK_SPEED_10GB:
5165 speed = "10 G";
5166 break;
5167 case I40E_LINK_SPEED_1GB:
5168 speed = "1000 M";
5169 break;
5170 case I40E_LINK_SPEED_100MB:
5171 speed = "100 M";
5172 break;
5173 default:
5174 break;
5175 }
5176
5177 switch (vsi->back->hw.fc.current_mode) {
5178 case I40E_FC_FULL:
5179 fc = "RX/TX";
5180 break;
5181 case I40E_FC_TX_PAUSE:
5182 fc = "TX";
5183 break;
5184 case I40E_FC_RX_PAUSE:
5185 fc = "RX";
5186 break;
5187 default:
5188 fc = "None";
5189 break;
5190 }
5191
5192 netdev_info(vsi->netdev, "NIC Link is Up %sbps Full Duplex, Flow Control: %s\n",
5193 speed, fc);
5194 }
5195
5196 /**
5197 * i40e_up_complete - Finish the last steps of bringing up a connection
5198 * @vsi: the VSI being configured
5199 **/
5200 static int i40e_up_complete(struct i40e_vsi *vsi)
5201 {
5202 struct i40e_pf *pf = vsi->back;
5203 int err;
5204
5205 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
5206 i40e_vsi_configure_msix(vsi);
5207 else
5208 i40e_configure_msi_and_legacy(vsi);
5209
5210 /* start rings */
5211 err = i40e_vsi_control_rings(vsi, true);
5212 if (err)
5213 return err;
5214
5215 clear_bit(__I40E_DOWN, &vsi->state);
5216 i40e_napi_enable_all(vsi);
5217 i40e_vsi_enable_irq(vsi);
5218
5219 if ((pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP) &&
5220 (vsi->netdev)) {
5221 i40e_print_link_message(vsi, true);
5222 netif_tx_start_all_queues(vsi->netdev);
5223 netif_carrier_on(vsi->netdev);
5224 } else if (vsi->netdev) {
5225 i40e_print_link_message(vsi, false);
5226 /* need to check for qualified module here*/
5227 if ((pf->hw.phy.link_info.link_info &
5228 I40E_AQ_MEDIA_AVAILABLE) &&
5229 (!(pf->hw.phy.link_info.an_info &
5230 I40E_AQ_QUALIFIED_MODULE)))
5231 netdev_err(vsi->netdev,
5232 "the driver failed to link because an unqualified module was detected.");
5233 }
5234
5235 /* replay FDIR SB filters */
5236 if (vsi->type == I40E_VSI_FDIR) {
5237 /* reset fd counters */
5238 pf->fd_add_err = pf->fd_atr_cnt = 0;
5239 if (pf->fd_tcp_rule > 0) {
5240 pf->auto_disable_flags |= I40E_FLAG_FD_ATR_ENABLED;
5241 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5242 dev_info(&pf->pdev->dev, "Forcing ATR off, sideband rules for TCP/IPv4 exist\n");
5243 pf->fd_tcp_rule = 0;
5244 }
5245 i40e_fdir_filter_restore(vsi);
5246 }
5247
5248 /* On the next run of the service_task, notify any clients of the new
5249 * opened netdev
5250 */
5251 pf->flags |= I40E_FLAG_SERVICE_CLIENT_REQUESTED;
5252 i40e_service_event_schedule(pf);
5253
5254 return 0;
5255 }
5256
5257 /**
5258 * i40e_vsi_reinit_locked - Reset the VSI
5259 * @vsi: the VSI being configured
5260 *
5261 * Rebuild the ring structs after some configuration
5262 * has changed, e.g. MTU size.
5263 **/
5264 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi)
5265 {
5266 struct i40e_pf *pf = vsi->back;
5267
5268 WARN_ON(in_interrupt());
5269 while (test_and_set_bit(__I40E_CONFIG_BUSY, &pf->state))
5270 usleep_range(1000, 2000);
5271 i40e_down(vsi);
5272
5273 i40e_up(vsi);
5274 clear_bit(__I40E_CONFIG_BUSY, &pf->state);
5275 }
5276
5277 /**
5278 * i40e_up - Bring the connection back up after being down
5279 * @vsi: the VSI being configured
5280 **/
5281 int i40e_up(struct i40e_vsi *vsi)
5282 {
5283 int err;
5284
5285 err = i40e_vsi_configure(vsi);
5286 if (!err)
5287 err = i40e_up_complete(vsi);
5288
5289 return err;
5290 }
5291
5292 /**
5293 * i40e_down - Shutdown the connection processing
5294 * @vsi: the VSI being stopped
5295 **/
5296 void i40e_down(struct i40e_vsi *vsi)
5297 {
5298 int i;
5299
5300 /* It is assumed that the caller of this function
5301 * sets the vsi->state __I40E_DOWN bit.
5302 */
5303 if (vsi->netdev) {
5304 netif_carrier_off(vsi->netdev);
5305 netif_tx_disable(vsi->netdev);
5306 }
5307 i40e_vsi_disable_irq(vsi);
5308 i40e_vsi_control_rings(vsi, false);
5309 i40e_napi_disable_all(vsi);
5310
5311 for (i = 0; i < vsi->num_queue_pairs; i++) {
5312 i40e_clean_tx_ring(vsi->tx_rings[i]);
5313 i40e_clean_rx_ring(vsi->rx_rings[i]);
5314 }
5315
5316 i40e_notify_client_of_netdev_close(vsi, false);
5317
5318 }
5319
5320 /**
5321 * i40e_setup_tc - configure multiple traffic classes
5322 * @netdev: net device to configure
5323 * @tc: number of traffic classes to enable
5324 **/
5325 static int i40e_setup_tc(struct net_device *netdev, u8 tc)
5326 {
5327 struct i40e_netdev_priv *np = netdev_priv(netdev);
5328 struct i40e_vsi *vsi = np->vsi;
5329 struct i40e_pf *pf = vsi->back;
5330 u8 enabled_tc = 0;
5331 int ret = -EINVAL;
5332 int i;
5333
5334 /* Check if DCB enabled to continue */
5335 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) {
5336 netdev_info(netdev, "DCB is not enabled for adapter\n");
5337 goto exit;
5338 }
5339
5340 /* Check if MFP enabled */
5341 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
5342 netdev_info(netdev, "Configuring TC not supported in MFP mode\n");
5343 goto exit;
5344 }
5345
5346 /* Check whether tc count is within enabled limit */
5347 if (tc > i40e_pf_get_num_tc(pf)) {
5348 netdev_info(netdev, "TC count greater than enabled on link for adapter\n");
5349 goto exit;
5350 }
5351
5352 /* Generate TC map for number of tc requested */
5353 for (i = 0; i < tc; i++)
5354 enabled_tc |= BIT(i);
5355
5356 /* Requesting same TC configuration as already enabled */
5357 if (enabled_tc == vsi->tc_config.enabled_tc)
5358 return 0;
5359
5360 /* Quiesce VSI queues */
5361 i40e_quiesce_vsi(vsi);
5362
5363 /* Configure VSI for enabled TCs */
5364 ret = i40e_vsi_config_tc(vsi, enabled_tc);
5365 if (ret) {
5366 netdev_info(netdev, "Failed configuring TC for VSI seid=%d\n",
5367 vsi->seid);
5368 goto exit;
5369 }
5370
5371 /* Unquiesce VSI */
5372 i40e_unquiesce_vsi(vsi);
5373
5374 exit:
5375 return ret;
5376 }
5377
5378 #ifdef I40E_FCOE
5379 int __i40e_setup_tc(struct net_device *netdev, u32 handle, __be16 proto,
5380 struct tc_to_netdev *tc)
5381 #else
5382 static int __i40e_setup_tc(struct net_device *netdev, u32 handle, __be16 proto,
5383 struct tc_to_netdev *tc)
5384 #endif
5385 {
5386 if (handle != TC_H_ROOT || tc->type != TC_SETUP_MQPRIO)
5387 return -EINVAL;
5388 return i40e_setup_tc(netdev, tc->tc);
5389 }
5390
5391 /**
5392 * i40e_open - Called when a network interface is made active
5393 * @netdev: network interface device structure
5394 *
5395 * The open entry point is called when a network interface is made
5396 * active by the system (IFF_UP). At this point all resources needed
5397 * for transmit and receive operations are allocated, the interrupt
5398 * handler is registered with the OS, the netdev watchdog subtask is
5399 * enabled, and the stack is notified that the interface is ready.
5400 *
5401 * Returns 0 on success, negative value on failure
5402 **/
5403 int i40e_open(struct net_device *netdev)
5404 {
5405 struct i40e_netdev_priv *np = netdev_priv(netdev);
5406 struct i40e_vsi *vsi = np->vsi;
5407 struct i40e_pf *pf = vsi->back;
5408 int err;
5409
5410 /* disallow open during test or if eeprom is broken */
5411 if (test_bit(__I40E_TESTING, &pf->state) ||
5412 test_bit(__I40E_BAD_EEPROM, &pf->state))
5413 return -EBUSY;
5414
5415 netif_carrier_off(netdev);
5416
5417 err = i40e_vsi_open(vsi);
5418 if (err)
5419 return err;
5420
5421 /* configure global TSO hardware offload settings */
5422 wr32(&pf->hw, I40E_GLLAN_TSOMSK_F, be32_to_cpu(TCP_FLAG_PSH |
5423 TCP_FLAG_FIN) >> 16);
5424 wr32(&pf->hw, I40E_GLLAN_TSOMSK_M, be32_to_cpu(TCP_FLAG_PSH |
5425 TCP_FLAG_FIN |
5426 TCP_FLAG_CWR) >> 16);
5427 wr32(&pf->hw, I40E_GLLAN_TSOMSK_L, be32_to_cpu(TCP_FLAG_CWR) >> 16);
5428
5429 udp_tunnel_get_rx_info(netdev);
5430
5431 return 0;
5432 }
5433
5434 /**
5435 * i40e_vsi_open -
5436 * @vsi: the VSI to open
5437 *
5438 * Finish initialization of the VSI.
5439 *
5440 * Returns 0 on success, negative value on failure
5441 **/
5442 int i40e_vsi_open(struct i40e_vsi *vsi)
5443 {
5444 struct i40e_pf *pf = vsi->back;
5445 char int_name[I40E_INT_NAME_STR_LEN];
5446 int err;
5447
5448 /* allocate descriptors */
5449 err = i40e_vsi_setup_tx_resources(vsi);
5450 if (err)
5451 goto err_setup_tx;
5452 err = i40e_vsi_setup_rx_resources(vsi);
5453 if (err)
5454 goto err_setup_rx;
5455
5456 err = i40e_vsi_configure(vsi);
5457 if (err)
5458 goto err_setup_rx;
5459
5460 if (vsi->netdev) {
5461 snprintf(int_name, sizeof(int_name) - 1, "%s-%s",
5462 dev_driver_string(&pf->pdev->dev), vsi->netdev->name);
5463 err = i40e_vsi_request_irq(vsi, int_name);
5464 if (err)
5465 goto err_setup_rx;
5466
5467 /* Notify the stack of the actual queue counts. */
5468 err = netif_set_real_num_tx_queues(vsi->netdev,
5469 vsi->num_queue_pairs);
5470 if (err)
5471 goto err_set_queues;
5472
5473 err = netif_set_real_num_rx_queues(vsi->netdev,
5474 vsi->num_queue_pairs);
5475 if (err)
5476 goto err_set_queues;
5477
5478 } else if (vsi->type == I40E_VSI_FDIR) {
5479 snprintf(int_name, sizeof(int_name) - 1, "%s-%s:fdir",
5480 dev_driver_string(&pf->pdev->dev),
5481 dev_name(&pf->pdev->dev));
5482 err = i40e_vsi_request_irq(vsi, int_name);
5483
5484 } else {
5485 err = -EINVAL;
5486 goto err_setup_rx;
5487 }
5488
5489 err = i40e_up_complete(vsi);
5490 if (err)
5491 goto err_up_complete;
5492
5493 return 0;
5494
5495 err_up_complete:
5496 i40e_down(vsi);
5497 err_set_queues:
5498 i40e_vsi_free_irq(vsi);
5499 err_setup_rx:
5500 i40e_vsi_free_rx_resources(vsi);
5501 err_setup_tx:
5502 i40e_vsi_free_tx_resources(vsi);
5503 if (vsi == pf->vsi[pf->lan_vsi])
5504 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
5505
5506 return err;
5507 }
5508
5509 /**
5510 * i40e_fdir_filter_exit - Cleans up the Flow Director accounting
5511 * @pf: Pointer to PF
5512 *
5513 * This function destroys the hlist where all the Flow Director
5514 * filters were saved.
5515 **/
5516 static void i40e_fdir_filter_exit(struct i40e_pf *pf)
5517 {
5518 struct i40e_fdir_filter *filter;
5519 struct hlist_node *node2;
5520
5521 hlist_for_each_entry_safe(filter, node2,
5522 &pf->fdir_filter_list, fdir_node) {
5523 hlist_del(&filter->fdir_node);
5524 kfree(filter);
5525 }
5526 pf->fdir_pf_active_filters = 0;
5527 }
5528
5529 /**
5530 * i40e_close - Disables a network interface
5531 * @netdev: network interface device structure
5532 *
5533 * The close entry point is called when an interface is de-activated
5534 * by the OS. The hardware is still under the driver's control, but
5535 * this netdev interface is disabled.
5536 *
5537 * Returns 0, this is not allowed to fail
5538 **/
5539 int i40e_close(struct net_device *netdev)
5540 {
5541 struct i40e_netdev_priv *np = netdev_priv(netdev);
5542 struct i40e_vsi *vsi = np->vsi;
5543
5544 i40e_vsi_close(vsi);
5545
5546 return 0;
5547 }
5548
5549 /**
5550 * i40e_do_reset - Start a PF or Core Reset sequence
5551 * @pf: board private structure
5552 * @reset_flags: which reset is requested
5553 *
5554 * The essential difference in resets is that the PF Reset
5555 * doesn't clear the packet buffers, doesn't reset the PE
5556 * firmware, and doesn't bother the other PFs on the chip.
5557 **/
5558 void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags)
5559 {
5560 u32 val;
5561
5562 WARN_ON(in_interrupt());
5563
5564
5565 /* do the biggest reset indicated */
5566 if (reset_flags & BIT_ULL(__I40E_GLOBAL_RESET_REQUESTED)) {
5567
5568 /* Request a Global Reset
5569 *
5570 * This will start the chip's countdown to the actual full
5571 * chip reset event, and a warning interrupt to be sent
5572 * to all PFs, including the requestor. Our handler
5573 * for the warning interrupt will deal with the shutdown
5574 * and recovery of the switch setup.
5575 */
5576 dev_dbg(&pf->pdev->dev, "GlobalR requested\n");
5577 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5578 val |= I40E_GLGEN_RTRIG_GLOBR_MASK;
5579 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5580
5581 } else if (reset_flags & BIT_ULL(__I40E_CORE_RESET_REQUESTED)) {
5582
5583 /* Request a Core Reset
5584 *
5585 * Same as Global Reset, except does *not* include the MAC/PHY
5586 */
5587 dev_dbg(&pf->pdev->dev, "CoreR requested\n");
5588 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5589 val |= I40E_GLGEN_RTRIG_CORER_MASK;
5590 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5591 i40e_flush(&pf->hw);
5592
5593 } else if (reset_flags & BIT_ULL(__I40E_PF_RESET_REQUESTED)) {
5594
5595 /* Request a PF Reset
5596 *
5597 * Resets only the PF-specific registers
5598 *
5599 * This goes directly to the tear-down and rebuild of
5600 * the switch, since we need to do all the recovery as
5601 * for the Core Reset.
5602 */
5603 dev_dbg(&pf->pdev->dev, "PFR requested\n");
5604 i40e_handle_reset_warning(pf);
5605
5606 } else if (reset_flags & BIT_ULL(__I40E_REINIT_REQUESTED)) {
5607 int v;
5608
5609 /* Find the VSI(s) that requested a re-init */
5610 dev_info(&pf->pdev->dev,
5611 "VSI reinit requested\n");
5612 for (v = 0; v < pf->num_alloc_vsi; v++) {
5613 struct i40e_vsi *vsi = pf->vsi[v];
5614
5615 if (vsi != NULL &&
5616 test_bit(__I40E_REINIT_REQUESTED, &vsi->state)) {
5617 i40e_vsi_reinit_locked(pf->vsi[v]);
5618 clear_bit(__I40E_REINIT_REQUESTED, &vsi->state);
5619 }
5620 }
5621 } else if (reset_flags & BIT_ULL(__I40E_DOWN_REQUESTED)) {
5622 int v;
5623
5624 /* Find the VSI(s) that needs to be brought down */
5625 dev_info(&pf->pdev->dev, "VSI down requested\n");
5626 for (v = 0; v < pf->num_alloc_vsi; v++) {
5627 struct i40e_vsi *vsi = pf->vsi[v];
5628
5629 if (vsi != NULL &&
5630 test_bit(__I40E_DOWN_REQUESTED, &vsi->state)) {
5631 set_bit(__I40E_DOWN, &vsi->state);
5632 i40e_down(vsi);
5633 clear_bit(__I40E_DOWN_REQUESTED, &vsi->state);
5634 }
5635 }
5636 } else {
5637 dev_info(&pf->pdev->dev,
5638 "bad reset request 0x%08x\n", reset_flags);
5639 }
5640 }
5641
5642 #ifdef CONFIG_I40E_DCB
5643 /**
5644 * i40e_dcb_need_reconfig - Check if DCB needs reconfig
5645 * @pf: board private structure
5646 * @old_cfg: current DCB config
5647 * @new_cfg: new DCB config
5648 **/
5649 bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
5650 struct i40e_dcbx_config *old_cfg,
5651 struct i40e_dcbx_config *new_cfg)
5652 {
5653 bool need_reconfig = false;
5654
5655 /* Check if ETS configuration has changed */
5656 if (memcmp(&new_cfg->etscfg,
5657 &old_cfg->etscfg,
5658 sizeof(new_cfg->etscfg))) {
5659 /* If Priority Table has changed reconfig is needed */
5660 if (memcmp(&new_cfg->etscfg.prioritytable,
5661 &old_cfg->etscfg.prioritytable,
5662 sizeof(new_cfg->etscfg.prioritytable))) {
5663 need_reconfig = true;
5664 dev_dbg(&pf->pdev->dev, "ETS UP2TC changed.\n");
5665 }
5666
5667 if (memcmp(&new_cfg->etscfg.tcbwtable,
5668 &old_cfg->etscfg.tcbwtable,
5669 sizeof(new_cfg->etscfg.tcbwtable)))
5670 dev_dbg(&pf->pdev->dev, "ETS TC BW Table changed.\n");
5671
5672 if (memcmp(&new_cfg->etscfg.tsatable,
5673 &old_cfg->etscfg.tsatable,
5674 sizeof(new_cfg->etscfg.tsatable)))
5675 dev_dbg(&pf->pdev->dev, "ETS TSA Table changed.\n");
5676 }
5677
5678 /* Check if PFC configuration has changed */
5679 if (memcmp(&new_cfg->pfc,
5680 &old_cfg->pfc,
5681 sizeof(new_cfg->pfc))) {
5682 need_reconfig = true;
5683 dev_dbg(&pf->pdev->dev, "PFC config change detected.\n");
5684 }
5685
5686 /* Check if APP Table has changed */
5687 if (memcmp(&new_cfg->app,
5688 &old_cfg->app,
5689 sizeof(new_cfg->app))) {
5690 need_reconfig = true;
5691 dev_dbg(&pf->pdev->dev, "APP Table change detected.\n");
5692 }
5693
5694 dev_dbg(&pf->pdev->dev, "dcb need_reconfig=%d\n", need_reconfig);
5695 return need_reconfig;
5696 }
5697
5698 /**
5699 * i40e_handle_lldp_event - Handle LLDP Change MIB event
5700 * @pf: board private structure
5701 * @e: event info posted on ARQ
5702 **/
5703 static int i40e_handle_lldp_event(struct i40e_pf *pf,
5704 struct i40e_arq_event_info *e)
5705 {
5706 struct i40e_aqc_lldp_get_mib *mib =
5707 (struct i40e_aqc_lldp_get_mib *)&e->desc.params.raw;
5708 struct i40e_hw *hw = &pf->hw;
5709 struct i40e_dcbx_config tmp_dcbx_cfg;
5710 bool need_reconfig = false;
5711 int ret = 0;
5712 u8 type;
5713
5714 /* Not DCB capable or capability disabled */
5715 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
5716 return ret;
5717
5718 /* Ignore if event is not for Nearest Bridge */
5719 type = ((mib->type >> I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT)
5720 & I40E_AQ_LLDP_BRIDGE_TYPE_MASK);
5721 dev_dbg(&pf->pdev->dev, "LLDP event mib bridge type 0x%x\n", type);
5722 if (type != I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE)
5723 return ret;
5724
5725 /* Check MIB Type and return if event for Remote MIB update */
5726 type = mib->type & I40E_AQ_LLDP_MIB_TYPE_MASK;
5727 dev_dbg(&pf->pdev->dev,
5728 "LLDP event mib type %s\n", type ? "remote" : "local");
5729 if (type == I40E_AQ_LLDP_MIB_REMOTE) {
5730 /* Update the remote cached instance and return */
5731 ret = i40e_aq_get_dcb_config(hw, I40E_AQ_LLDP_MIB_REMOTE,
5732 I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE,
5733 &hw->remote_dcbx_config);
5734 goto exit;
5735 }
5736
5737 /* Store the old configuration */
5738 tmp_dcbx_cfg = hw->local_dcbx_config;
5739
5740 /* Reset the old DCBx configuration data */
5741 memset(&hw->local_dcbx_config, 0, sizeof(hw->local_dcbx_config));
5742 /* Get updated DCBX data from firmware */
5743 ret = i40e_get_dcb_config(&pf->hw);
5744 if (ret) {
5745 dev_info(&pf->pdev->dev,
5746 "Failed querying DCB configuration data from firmware, err %s aq_err %s\n",
5747 i40e_stat_str(&pf->hw, ret),
5748 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5749 goto exit;
5750 }
5751
5752 /* No change detected in DCBX configs */
5753 if (!memcmp(&tmp_dcbx_cfg, &hw->local_dcbx_config,
5754 sizeof(tmp_dcbx_cfg))) {
5755 dev_dbg(&pf->pdev->dev, "No change detected in DCBX configuration.\n");
5756 goto exit;
5757 }
5758
5759 need_reconfig = i40e_dcb_need_reconfig(pf, &tmp_dcbx_cfg,
5760 &hw->local_dcbx_config);
5761
5762 i40e_dcbnl_flush_apps(pf, &tmp_dcbx_cfg, &hw->local_dcbx_config);
5763
5764 if (!need_reconfig)
5765 goto exit;
5766
5767 /* Enable DCB tagging only when more than one TC */
5768 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
5769 pf->flags |= I40E_FLAG_DCB_ENABLED;
5770 else
5771 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
5772
5773 set_bit(__I40E_PORT_TX_SUSPENDED, &pf->state);
5774 /* Reconfiguration needed quiesce all VSIs */
5775 i40e_pf_quiesce_all_vsi(pf);
5776
5777 /* Changes in configuration update VEB/VSI */
5778 i40e_dcb_reconfigure(pf);
5779
5780 ret = i40e_resume_port_tx(pf);
5781
5782 clear_bit(__I40E_PORT_TX_SUSPENDED, &pf->state);
5783 /* In case of error no point in resuming VSIs */
5784 if (ret)
5785 goto exit;
5786
5787 /* Wait for the PF's queues to be disabled */
5788 ret = i40e_pf_wait_queues_disabled(pf);
5789 if (ret) {
5790 /* Schedule PF reset to recover */
5791 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
5792 i40e_service_event_schedule(pf);
5793 } else {
5794 i40e_pf_unquiesce_all_vsi(pf);
5795 /* Notify the client for the DCB changes */
5796 i40e_notify_client_of_l2_param_changes(pf->vsi[pf->lan_vsi]);
5797 }
5798
5799 exit:
5800 return ret;
5801 }
5802 #endif /* CONFIG_I40E_DCB */
5803
5804 /**
5805 * i40e_do_reset_safe - Protected reset path for userland calls.
5806 * @pf: board private structure
5807 * @reset_flags: which reset is requested
5808 *
5809 **/
5810 void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags)
5811 {
5812 rtnl_lock();
5813 i40e_do_reset(pf, reset_flags);
5814 rtnl_unlock();
5815 }
5816
5817 /**
5818 * i40e_handle_lan_overflow_event - Handler for LAN queue overflow event
5819 * @pf: board private structure
5820 * @e: event info posted on ARQ
5821 *
5822 * Handler for LAN Queue Overflow Event generated by the firmware for PF
5823 * and VF queues
5824 **/
5825 static void i40e_handle_lan_overflow_event(struct i40e_pf *pf,
5826 struct i40e_arq_event_info *e)
5827 {
5828 struct i40e_aqc_lan_overflow *data =
5829 (struct i40e_aqc_lan_overflow *)&e->desc.params.raw;
5830 u32 queue = le32_to_cpu(data->prtdcb_rupto);
5831 u32 qtx_ctl = le32_to_cpu(data->otx_ctl);
5832 struct i40e_hw *hw = &pf->hw;
5833 struct i40e_vf *vf;
5834 u16 vf_id;
5835
5836 dev_dbg(&pf->pdev->dev, "overflow Rx Queue Number = %d QTX_CTL=0x%08x\n",
5837 queue, qtx_ctl);
5838
5839 /* Queue belongs to VF, find the VF and issue VF reset */
5840 if (((qtx_ctl & I40E_QTX_CTL_PFVF_Q_MASK)
5841 >> I40E_QTX_CTL_PFVF_Q_SHIFT) == I40E_QTX_CTL_VF_QUEUE) {
5842 vf_id = (u16)((qtx_ctl & I40E_QTX_CTL_VFVM_INDX_MASK)
5843 >> I40E_QTX_CTL_VFVM_INDX_SHIFT);
5844 vf_id -= hw->func_caps.vf_base_id;
5845 vf = &pf->vf[vf_id];
5846 i40e_vc_notify_vf_reset(vf);
5847 /* Allow VF to process pending reset notification */
5848 msleep(20);
5849 i40e_reset_vf(vf, false);
5850 }
5851 }
5852
5853 /**
5854 * i40e_service_event_complete - Finish up the service event
5855 * @pf: board private structure
5856 **/
5857 static void i40e_service_event_complete(struct i40e_pf *pf)
5858 {
5859 WARN_ON(!test_bit(__I40E_SERVICE_SCHED, &pf->state));
5860
5861 /* flush memory to make sure state is correct before next watchog */
5862 smp_mb__before_atomic();
5863 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
5864 }
5865
5866 /**
5867 * i40e_get_cur_guaranteed_fd_count - Get the consumed guaranteed FD filters
5868 * @pf: board private structure
5869 **/
5870 u32 i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf)
5871 {
5872 u32 val, fcnt_prog;
5873
5874 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
5875 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK);
5876 return fcnt_prog;
5877 }
5878
5879 /**
5880 * i40e_get_current_fd_count - Get total FD filters programmed for this PF
5881 * @pf: board private structure
5882 **/
5883 u32 i40e_get_current_fd_count(struct i40e_pf *pf)
5884 {
5885 u32 val, fcnt_prog;
5886
5887 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
5888 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK) +
5889 ((val & I40E_PFQF_FDSTAT_BEST_CNT_MASK) >>
5890 I40E_PFQF_FDSTAT_BEST_CNT_SHIFT);
5891 return fcnt_prog;
5892 }
5893
5894 /**
5895 * i40e_get_global_fd_count - Get total FD filters programmed on device
5896 * @pf: board private structure
5897 **/
5898 u32 i40e_get_global_fd_count(struct i40e_pf *pf)
5899 {
5900 u32 val, fcnt_prog;
5901
5902 val = rd32(&pf->hw, I40E_GLQF_FDCNT_0);
5903 fcnt_prog = (val & I40E_GLQF_FDCNT_0_GUARANT_CNT_MASK) +
5904 ((val & I40E_GLQF_FDCNT_0_BESTCNT_MASK) >>
5905 I40E_GLQF_FDCNT_0_BESTCNT_SHIFT);
5906 return fcnt_prog;
5907 }
5908
5909 /**
5910 * i40e_fdir_check_and_reenable - Function to reenabe FD ATR or SB if disabled
5911 * @pf: board private structure
5912 **/
5913 void i40e_fdir_check_and_reenable(struct i40e_pf *pf)
5914 {
5915 struct i40e_fdir_filter *filter;
5916 u32 fcnt_prog, fcnt_avail;
5917 struct hlist_node *node;
5918
5919 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
5920 return;
5921
5922 /* Check if, FD SB or ATR was auto disabled and if there is enough room
5923 * to re-enable
5924 */
5925 fcnt_prog = i40e_get_global_fd_count(pf);
5926 fcnt_avail = pf->fdir_pf_filter_count;
5927 if ((fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM)) ||
5928 (pf->fd_add_err == 0) ||
5929 (i40e_get_current_atr_cnt(pf) < pf->fd_atr_cnt)) {
5930 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) &&
5931 (pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED)) {
5932 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
5933 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5934 dev_info(&pf->pdev->dev, "FD Sideband/ntuple is being enabled since we have space in the table now\n");
5935 }
5936 }
5937
5938 /* Wait for some more space to be available to turn on ATR. We also
5939 * must check that no existing ntuple rules for TCP are in effect
5940 */
5941 if (fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM * 2)) {
5942 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
5943 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED) &&
5944 (pf->fd_tcp_rule == 0)) {
5945 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5946 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5947 dev_info(&pf->pdev->dev, "ATR is being enabled since we have space in the table and there are no conflicting ntuple rules\n");
5948 }
5949 }
5950
5951 /* if hw had a problem adding a filter, delete it */
5952 if (pf->fd_inv > 0) {
5953 hlist_for_each_entry_safe(filter, node,
5954 &pf->fdir_filter_list, fdir_node) {
5955 if (filter->fd_id == pf->fd_inv) {
5956 hlist_del(&filter->fdir_node);
5957 kfree(filter);
5958 pf->fdir_pf_active_filters--;
5959 }
5960 }
5961 }
5962 }
5963
5964 #define I40E_MIN_FD_FLUSH_INTERVAL 10
5965 #define I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE 30
5966 /**
5967 * i40e_fdir_flush_and_replay - Function to flush all FD filters and replay SB
5968 * @pf: board private structure
5969 **/
5970 static void i40e_fdir_flush_and_replay(struct i40e_pf *pf)
5971 {
5972 unsigned long min_flush_time;
5973 int flush_wait_retry = 50;
5974 bool disable_atr = false;
5975 int fd_room;
5976 int reg;
5977
5978 if (!time_after(jiffies, pf->fd_flush_timestamp +
5979 (I40E_MIN_FD_FLUSH_INTERVAL * HZ)))
5980 return;
5981
5982 /* If the flush is happening too quick and we have mostly SB rules we
5983 * should not re-enable ATR for some time.
5984 */
5985 min_flush_time = pf->fd_flush_timestamp +
5986 (I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE * HZ);
5987 fd_room = pf->fdir_pf_filter_count - pf->fdir_pf_active_filters;
5988
5989 if (!(time_after(jiffies, min_flush_time)) &&
5990 (fd_room < I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR)) {
5991 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5992 dev_info(&pf->pdev->dev, "ATR disabled, not enough FD filter space.\n");
5993 disable_atr = true;
5994 }
5995
5996 pf->fd_flush_timestamp = jiffies;
5997 pf->auto_disable_flags |= I40E_FLAG_FD_ATR_ENABLED;
5998 /* flush all filters */
5999 wr32(&pf->hw, I40E_PFQF_CTL_1,
6000 I40E_PFQF_CTL_1_CLEARFDTABLE_MASK);
6001 i40e_flush(&pf->hw);
6002 pf->fd_flush_cnt++;
6003 pf->fd_add_err = 0;
6004 do {
6005 /* Check FD flush status every 5-6msec */
6006 usleep_range(5000, 6000);
6007 reg = rd32(&pf->hw, I40E_PFQF_CTL_1);
6008 if (!(reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK))
6009 break;
6010 } while (flush_wait_retry--);
6011 if (reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK) {
6012 dev_warn(&pf->pdev->dev, "FD table did not flush, needs more time\n");
6013 } else {
6014 /* replay sideband filters */
6015 i40e_fdir_filter_restore(pf->vsi[pf->lan_vsi]);
6016 if (!disable_atr)
6017 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
6018 clear_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state);
6019 if (I40E_DEBUG_FD & pf->hw.debug_mask)
6020 dev_info(&pf->pdev->dev, "FD Filter table flushed and FD-SB replayed.\n");
6021 }
6022 }
6023
6024 /**
6025 * i40e_get_current_atr_count - Get the count of total FD ATR filters programmed
6026 * @pf: board private structure
6027 **/
6028 u32 i40e_get_current_atr_cnt(struct i40e_pf *pf)
6029 {
6030 return i40e_get_current_fd_count(pf) - pf->fdir_pf_active_filters;
6031 }
6032
6033 /* We can see up to 256 filter programming desc in transit if the filters are
6034 * being applied really fast; before we see the first
6035 * filter miss error on Rx queue 0. Accumulating enough error messages before
6036 * reacting will make sure we don't cause flush too often.
6037 */
6038 #define I40E_MAX_FD_PROGRAM_ERROR 256
6039
6040 /**
6041 * i40e_fdir_reinit_subtask - Worker thread to reinit FDIR filter table
6042 * @pf: board private structure
6043 **/
6044 static void i40e_fdir_reinit_subtask(struct i40e_pf *pf)
6045 {
6046
6047 /* if interface is down do nothing */
6048 if (test_bit(__I40E_DOWN, &pf->state))
6049 return;
6050
6051 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
6052 i40e_fdir_flush_and_replay(pf);
6053
6054 i40e_fdir_check_and_reenable(pf);
6055
6056 }
6057
6058 /**
6059 * i40e_vsi_link_event - notify VSI of a link event
6060 * @vsi: vsi to be notified
6061 * @link_up: link up or down
6062 **/
6063 static void i40e_vsi_link_event(struct i40e_vsi *vsi, bool link_up)
6064 {
6065 if (!vsi || test_bit(__I40E_DOWN, &vsi->state))
6066 return;
6067
6068 switch (vsi->type) {
6069 case I40E_VSI_MAIN:
6070 #ifdef I40E_FCOE
6071 case I40E_VSI_FCOE:
6072 #endif
6073 if (!vsi->netdev || !vsi->netdev_registered)
6074 break;
6075
6076 if (link_up) {
6077 netif_carrier_on(vsi->netdev);
6078 netif_tx_wake_all_queues(vsi->netdev);
6079 } else {
6080 netif_carrier_off(vsi->netdev);
6081 netif_tx_stop_all_queues(vsi->netdev);
6082 }
6083 break;
6084
6085 case I40E_VSI_SRIOV:
6086 case I40E_VSI_VMDQ2:
6087 case I40E_VSI_CTRL:
6088 case I40E_VSI_IWARP:
6089 case I40E_VSI_MIRROR:
6090 default:
6091 /* there is no notification for other VSIs */
6092 break;
6093 }
6094 }
6095
6096 /**
6097 * i40e_veb_link_event - notify elements on the veb of a link event
6098 * @veb: veb to be notified
6099 * @link_up: link up or down
6100 **/
6101 static void i40e_veb_link_event(struct i40e_veb *veb, bool link_up)
6102 {
6103 struct i40e_pf *pf;
6104 int i;
6105
6106 if (!veb || !veb->pf)
6107 return;
6108 pf = veb->pf;
6109
6110 /* depth first... */
6111 for (i = 0; i < I40E_MAX_VEB; i++)
6112 if (pf->veb[i] && (pf->veb[i]->uplink_seid == veb->seid))
6113 i40e_veb_link_event(pf->veb[i], link_up);
6114
6115 /* ... now the local VSIs */
6116 for (i = 0; i < pf->num_alloc_vsi; i++)
6117 if (pf->vsi[i] && (pf->vsi[i]->uplink_seid == veb->seid))
6118 i40e_vsi_link_event(pf->vsi[i], link_up);
6119 }
6120
6121 /**
6122 * i40e_link_event - Update netif_carrier status
6123 * @pf: board private structure
6124 **/
6125 static void i40e_link_event(struct i40e_pf *pf)
6126 {
6127 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6128 u8 new_link_speed, old_link_speed;
6129 i40e_status status;
6130 bool new_link, old_link;
6131
6132 /* save off old link status information */
6133 pf->hw.phy.link_info_old = pf->hw.phy.link_info;
6134
6135 /* set this to force the get_link_status call to refresh state */
6136 pf->hw.phy.get_link_info = true;
6137
6138 old_link = (pf->hw.phy.link_info_old.link_info & I40E_AQ_LINK_UP);
6139
6140 status = i40e_get_link_status(&pf->hw, &new_link);
6141 if (status) {
6142 dev_dbg(&pf->pdev->dev, "couldn't get link state, status: %d\n",
6143 status);
6144 return;
6145 }
6146
6147 old_link_speed = pf->hw.phy.link_info_old.link_speed;
6148 new_link_speed = pf->hw.phy.link_info.link_speed;
6149
6150 if (new_link == old_link &&
6151 new_link_speed == old_link_speed &&
6152 (test_bit(__I40E_DOWN, &vsi->state) ||
6153 new_link == netif_carrier_ok(vsi->netdev)))
6154 return;
6155
6156 if (!test_bit(__I40E_DOWN, &vsi->state))
6157 i40e_print_link_message(vsi, new_link);
6158
6159 /* Notify the base of the switch tree connected to
6160 * the link. Floating VEBs are not notified.
6161 */
6162 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
6163 i40e_veb_link_event(pf->veb[pf->lan_veb], new_link);
6164 else
6165 i40e_vsi_link_event(vsi, new_link);
6166
6167 if (pf->vf)
6168 i40e_vc_notify_link_state(pf);
6169
6170 if (pf->flags & I40E_FLAG_PTP)
6171 i40e_ptp_set_increment(pf);
6172 }
6173
6174 /**
6175 * i40e_watchdog_subtask - periodic checks not using event driven response
6176 * @pf: board private structure
6177 **/
6178 static void i40e_watchdog_subtask(struct i40e_pf *pf)
6179 {
6180 int i;
6181
6182 /* if interface is down do nothing */
6183 if (test_bit(__I40E_DOWN, &pf->state) ||
6184 test_bit(__I40E_CONFIG_BUSY, &pf->state))
6185 return;
6186
6187 /* make sure we don't do these things too often */
6188 if (time_before(jiffies, (pf->service_timer_previous +
6189 pf->service_timer_period)))
6190 return;
6191 pf->service_timer_previous = jiffies;
6192
6193 if (pf->flags & I40E_FLAG_LINK_POLLING_ENABLED)
6194 i40e_link_event(pf);
6195
6196 /* Update the stats for active netdevs so the network stack
6197 * can look at updated numbers whenever it cares to
6198 */
6199 for (i = 0; i < pf->num_alloc_vsi; i++)
6200 if (pf->vsi[i] && pf->vsi[i]->netdev)
6201 i40e_update_stats(pf->vsi[i]);
6202
6203 if (pf->flags & I40E_FLAG_VEB_STATS_ENABLED) {
6204 /* Update the stats for the active switching components */
6205 for (i = 0; i < I40E_MAX_VEB; i++)
6206 if (pf->veb[i])
6207 i40e_update_veb_stats(pf->veb[i]);
6208 }
6209
6210 i40e_ptp_rx_hang(pf->vsi[pf->lan_vsi]);
6211 }
6212
6213 /**
6214 * i40e_reset_subtask - Set up for resetting the device and driver
6215 * @pf: board private structure
6216 **/
6217 static void i40e_reset_subtask(struct i40e_pf *pf)
6218 {
6219 u32 reset_flags = 0;
6220
6221 rtnl_lock();
6222 if (test_bit(__I40E_REINIT_REQUESTED, &pf->state)) {
6223 reset_flags |= BIT(__I40E_REINIT_REQUESTED);
6224 clear_bit(__I40E_REINIT_REQUESTED, &pf->state);
6225 }
6226 if (test_bit(__I40E_PF_RESET_REQUESTED, &pf->state)) {
6227 reset_flags |= BIT(__I40E_PF_RESET_REQUESTED);
6228 clear_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
6229 }
6230 if (test_bit(__I40E_CORE_RESET_REQUESTED, &pf->state)) {
6231 reset_flags |= BIT(__I40E_CORE_RESET_REQUESTED);
6232 clear_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
6233 }
6234 if (test_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state)) {
6235 reset_flags |= BIT(__I40E_GLOBAL_RESET_REQUESTED);
6236 clear_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
6237 }
6238 if (test_bit(__I40E_DOWN_REQUESTED, &pf->state)) {
6239 reset_flags |= BIT(__I40E_DOWN_REQUESTED);
6240 clear_bit(__I40E_DOWN_REQUESTED, &pf->state);
6241 }
6242
6243 /* If there's a recovery already waiting, it takes
6244 * precedence before starting a new reset sequence.
6245 */
6246 if (test_bit(__I40E_RESET_INTR_RECEIVED, &pf->state)) {
6247 i40e_handle_reset_warning(pf);
6248 goto unlock;
6249 }
6250
6251 /* If we're already down or resetting, just bail */
6252 if (reset_flags &&
6253 !test_bit(__I40E_DOWN, &pf->state) &&
6254 !test_bit(__I40E_CONFIG_BUSY, &pf->state))
6255 i40e_do_reset(pf, reset_flags);
6256
6257 unlock:
6258 rtnl_unlock();
6259 }
6260
6261 /**
6262 * i40e_handle_link_event - Handle link event
6263 * @pf: board private structure
6264 * @e: event info posted on ARQ
6265 **/
6266 static void i40e_handle_link_event(struct i40e_pf *pf,
6267 struct i40e_arq_event_info *e)
6268 {
6269 struct i40e_aqc_get_link_status *status =
6270 (struct i40e_aqc_get_link_status *)&e->desc.params.raw;
6271
6272 /* Do a new status request to re-enable LSE reporting
6273 * and load new status information into the hw struct
6274 * This completely ignores any state information
6275 * in the ARQ event info, instead choosing to always
6276 * issue the AQ update link status command.
6277 */
6278 i40e_link_event(pf);
6279
6280 /* check for unqualified module, if link is down */
6281 if ((status->link_info & I40E_AQ_MEDIA_AVAILABLE) &&
6282 (!(status->an_info & I40E_AQ_QUALIFIED_MODULE)) &&
6283 (!(status->link_info & I40E_AQ_LINK_UP)))
6284 dev_err(&pf->pdev->dev,
6285 "The driver failed to link because an unqualified module was detected.\n");
6286 }
6287
6288 /**
6289 * i40e_clean_adminq_subtask - Clean the AdminQ rings
6290 * @pf: board private structure
6291 **/
6292 static void i40e_clean_adminq_subtask(struct i40e_pf *pf)
6293 {
6294 struct i40e_arq_event_info event;
6295 struct i40e_hw *hw = &pf->hw;
6296 u16 pending, i = 0;
6297 i40e_status ret;
6298 u16 opcode;
6299 u32 oldval;
6300 u32 val;
6301
6302 /* Do not run clean AQ when PF reset fails */
6303 if (test_bit(__I40E_RESET_FAILED, &pf->state))
6304 return;
6305
6306 /* check for error indications */
6307 val = rd32(&pf->hw, pf->hw.aq.arq.len);
6308 oldval = val;
6309 if (val & I40E_PF_ARQLEN_ARQVFE_MASK) {
6310 if (hw->debug_mask & I40E_DEBUG_AQ)
6311 dev_info(&pf->pdev->dev, "ARQ VF Error detected\n");
6312 val &= ~I40E_PF_ARQLEN_ARQVFE_MASK;
6313 }
6314 if (val & I40E_PF_ARQLEN_ARQOVFL_MASK) {
6315 if (hw->debug_mask & I40E_DEBUG_AQ)
6316 dev_info(&pf->pdev->dev, "ARQ Overflow Error detected\n");
6317 val &= ~I40E_PF_ARQLEN_ARQOVFL_MASK;
6318 pf->arq_overflows++;
6319 }
6320 if (val & I40E_PF_ARQLEN_ARQCRIT_MASK) {
6321 if (hw->debug_mask & I40E_DEBUG_AQ)
6322 dev_info(&pf->pdev->dev, "ARQ Critical Error detected\n");
6323 val &= ~I40E_PF_ARQLEN_ARQCRIT_MASK;
6324 }
6325 if (oldval != val)
6326 wr32(&pf->hw, pf->hw.aq.arq.len, val);
6327
6328 val = rd32(&pf->hw, pf->hw.aq.asq.len);
6329 oldval = val;
6330 if (val & I40E_PF_ATQLEN_ATQVFE_MASK) {
6331 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
6332 dev_info(&pf->pdev->dev, "ASQ VF Error detected\n");
6333 val &= ~I40E_PF_ATQLEN_ATQVFE_MASK;
6334 }
6335 if (val & I40E_PF_ATQLEN_ATQOVFL_MASK) {
6336 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
6337 dev_info(&pf->pdev->dev, "ASQ Overflow Error detected\n");
6338 val &= ~I40E_PF_ATQLEN_ATQOVFL_MASK;
6339 }
6340 if (val & I40E_PF_ATQLEN_ATQCRIT_MASK) {
6341 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
6342 dev_info(&pf->pdev->dev, "ASQ Critical Error detected\n");
6343 val &= ~I40E_PF_ATQLEN_ATQCRIT_MASK;
6344 }
6345 if (oldval != val)
6346 wr32(&pf->hw, pf->hw.aq.asq.len, val);
6347
6348 event.buf_len = I40E_MAX_AQ_BUF_SIZE;
6349 event.msg_buf = kzalloc(event.buf_len, GFP_KERNEL);
6350 if (!event.msg_buf)
6351 return;
6352
6353 do {
6354 ret = i40e_clean_arq_element(hw, &event, &pending);
6355 if (ret == I40E_ERR_ADMIN_QUEUE_NO_WORK)
6356 break;
6357 else if (ret) {
6358 dev_info(&pf->pdev->dev, "ARQ event error %d\n", ret);
6359 break;
6360 }
6361
6362 opcode = le16_to_cpu(event.desc.opcode);
6363 switch (opcode) {
6364
6365 case i40e_aqc_opc_get_link_status:
6366 i40e_handle_link_event(pf, &event);
6367 break;
6368 case i40e_aqc_opc_send_msg_to_pf:
6369 ret = i40e_vc_process_vf_msg(pf,
6370 le16_to_cpu(event.desc.retval),
6371 le32_to_cpu(event.desc.cookie_high),
6372 le32_to_cpu(event.desc.cookie_low),
6373 event.msg_buf,
6374 event.msg_len);
6375 break;
6376 case i40e_aqc_opc_lldp_update_mib:
6377 dev_dbg(&pf->pdev->dev, "ARQ: Update LLDP MIB event received\n");
6378 #ifdef CONFIG_I40E_DCB
6379 rtnl_lock();
6380 ret = i40e_handle_lldp_event(pf, &event);
6381 rtnl_unlock();
6382 #endif /* CONFIG_I40E_DCB */
6383 break;
6384 case i40e_aqc_opc_event_lan_overflow:
6385 dev_dbg(&pf->pdev->dev, "ARQ LAN queue overflow event received\n");
6386 i40e_handle_lan_overflow_event(pf, &event);
6387 break;
6388 case i40e_aqc_opc_send_msg_to_peer:
6389 dev_info(&pf->pdev->dev, "ARQ: Msg from other pf\n");
6390 break;
6391 case i40e_aqc_opc_nvm_erase:
6392 case i40e_aqc_opc_nvm_update:
6393 case i40e_aqc_opc_oem_post_update:
6394 i40e_debug(&pf->hw, I40E_DEBUG_NVM,
6395 "ARQ NVM operation 0x%04x completed\n",
6396 opcode);
6397 break;
6398 default:
6399 dev_info(&pf->pdev->dev,
6400 "ARQ: Unknown event 0x%04x ignored\n",
6401 opcode);
6402 break;
6403 }
6404 } while (pending && (i++ < pf->adminq_work_limit));
6405
6406 clear_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
6407 /* re-enable Admin queue interrupt cause */
6408 val = rd32(hw, I40E_PFINT_ICR0_ENA);
6409 val |= I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
6410 wr32(hw, I40E_PFINT_ICR0_ENA, val);
6411 i40e_flush(hw);
6412
6413 kfree(event.msg_buf);
6414 }
6415
6416 /**
6417 * i40e_verify_eeprom - make sure eeprom is good to use
6418 * @pf: board private structure
6419 **/
6420 static void i40e_verify_eeprom(struct i40e_pf *pf)
6421 {
6422 int err;
6423
6424 err = i40e_diag_eeprom_test(&pf->hw);
6425 if (err) {
6426 /* retry in case of garbage read */
6427 err = i40e_diag_eeprom_test(&pf->hw);
6428 if (err) {
6429 dev_info(&pf->pdev->dev, "eeprom check failed (%d), Tx/Rx traffic disabled\n",
6430 err);
6431 set_bit(__I40E_BAD_EEPROM, &pf->state);
6432 }
6433 }
6434
6435 if (!err && test_bit(__I40E_BAD_EEPROM, &pf->state)) {
6436 dev_info(&pf->pdev->dev, "eeprom check passed, Tx/Rx traffic enabled\n");
6437 clear_bit(__I40E_BAD_EEPROM, &pf->state);
6438 }
6439 }
6440
6441 /**
6442 * i40e_enable_pf_switch_lb
6443 * @pf: pointer to the PF structure
6444 *
6445 * enable switch loop back or die - no point in a return value
6446 **/
6447 static void i40e_enable_pf_switch_lb(struct i40e_pf *pf)
6448 {
6449 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6450 struct i40e_vsi_context ctxt;
6451 int ret;
6452
6453 ctxt.seid = pf->main_vsi_seid;
6454 ctxt.pf_num = pf->hw.pf_id;
6455 ctxt.vf_num = 0;
6456 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
6457 if (ret) {
6458 dev_info(&pf->pdev->dev,
6459 "couldn't get PF vsi config, err %s aq_err %s\n",
6460 i40e_stat_str(&pf->hw, ret),
6461 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6462 return;
6463 }
6464 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6465 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6466 ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6467
6468 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
6469 if (ret) {
6470 dev_info(&pf->pdev->dev,
6471 "update vsi switch failed, err %s aq_err %s\n",
6472 i40e_stat_str(&pf->hw, ret),
6473 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6474 }
6475 }
6476
6477 /**
6478 * i40e_disable_pf_switch_lb
6479 * @pf: pointer to the PF structure
6480 *
6481 * disable switch loop back or die - no point in a return value
6482 **/
6483 static void i40e_disable_pf_switch_lb(struct i40e_pf *pf)
6484 {
6485 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6486 struct i40e_vsi_context ctxt;
6487 int ret;
6488
6489 ctxt.seid = pf->main_vsi_seid;
6490 ctxt.pf_num = pf->hw.pf_id;
6491 ctxt.vf_num = 0;
6492 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
6493 if (ret) {
6494 dev_info(&pf->pdev->dev,
6495 "couldn't get PF vsi config, err %s aq_err %s\n",
6496 i40e_stat_str(&pf->hw, ret),
6497 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6498 return;
6499 }
6500 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6501 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6502 ctxt.info.switch_id &= ~cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6503
6504 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
6505 if (ret) {
6506 dev_info(&pf->pdev->dev,
6507 "update vsi switch failed, err %s aq_err %s\n",
6508 i40e_stat_str(&pf->hw, ret),
6509 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6510 }
6511 }
6512
6513 /**
6514 * i40e_config_bridge_mode - Configure the HW bridge mode
6515 * @veb: pointer to the bridge instance
6516 *
6517 * Configure the loop back mode for the LAN VSI that is downlink to the
6518 * specified HW bridge instance. It is expected this function is called
6519 * when a new HW bridge is instantiated.
6520 **/
6521 static void i40e_config_bridge_mode(struct i40e_veb *veb)
6522 {
6523 struct i40e_pf *pf = veb->pf;
6524
6525 if (pf->hw.debug_mask & I40E_DEBUG_LAN)
6526 dev_info(&pf->pdev->dev, "enabling bridge mode: %s\n",
6527 veb->bridge_mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
6528 if (veb->bridge_mode & BRIDGE_MODE_VEPA)
6529 i40e_disable_pf_switch_lb(pf);
6530 else
6531 i40e_enable_pf_switch_lb(pf);
6532 }
6533
6534 /**
6535 * i40e_reconstitute_veb - rebuild the VEB and anything connected to it
6536 * @veb: pointer to the VEB instance
6537 *
6538 * This is a recursive function that first builds the attached VSIs then
6539 * recurses in to build the next layer of VEB. We track the connections
6540 * through our own index numbers because the seid's from the HW could
6541 * change across the reset.
6542 **/
6543 static int i40e_reconstitute_veb(struct i40e_veb *veb)
6544 {
6545 struct i40e_vsi *ctl_vsi = NULL;
6546 struct i40e_pf *pf = veb->pf;
6547 int v, veb_idx;
6548 int ret;
6549
6550 /* build VSI that owns this VEB, temporarily attached to base VEB */
6551 for (v = 0; v < pf->num_alloc_vsi && !ctl_vsi; v++) {
6552 if (pf->vsi[v] &&
6553 pf->vsi[v]->veb_idx == veb->idx &&
6554 pf->vsi[v]->flags & I40E_VSI_FLAG_VEB_OWNER) {
6555 ctl_vsi = pf->vsi[v];
6556 break;
6557 }
6558 }
6559 if (!ctl_vsi) {
6560 dev_info(&pf->pdev->dev,
6561 "missing owner VSI for veb_idx %d\n", veb->idx);
6562 ret = -ENOENT;
6563 goto end_reconstitute;
6564 }
6565 if (ctl_vsi != pf->vsi[pf->lan_vsi])
6566 ctl_vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
6567 ret = i40e_add_vsi(ctl_vsi);
6568 if (ret) {
6569 dev_info(&pf->pdev->dev,
6570 "rebuild of veb_idx %d owner VSI failed: %d\n",
6571 veb->idx, ret);
6572 goto end_reconstitute;
6573 }
6574 i40e_vsi_reset_stats(ctl_vsi);
6575
6576 /* create the VEB in the switch and move the VSI onto the VEB */
6577 ret = i40e_add_veb(veb, ctl_vsi);
6578 if (ret)
6579 goto end_reconstitute;
6580
6581 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
6582 veb->bridge_mode = BRIDGE_MODE_VEB;
6583 else
6584 veb->bridge_mode = BRIDGE_MODE_VEPA;
6585 i40e_config_bridge_mode(veb);
6586
6587 /* create the remaining VSIs attached to this VEB */
6588 for (v = 0; v < pf->num_alloc_vsi; v++) {
6589 if (!pf->vsi[v] || pf->vsi[v] == ctl_vsi)
6590 continue;
6591
6592 if (pf->vsi[v]->veb_idx == veb->idx) {
6593 struct i40e_vsi *vsi = pf->vsi[v];
6594
6595 vsi->uplink_seid = veb->seid;
6596 ret = i40e_add_vsi(vsi);
6597 if (ret) {
6598 dev_info(&pf->pdev->dev,
6599 "rebuild of vsi_idx %d failed: %d\n",
6600 v, ret);
6601 goto end_reconstitute;
6602 }
6603 i40e_vsi_reset_stats(vsi);
6604 }
6605 }
6606
6607 /* create any VEBs attached to this VEB - RECURSION */
6608 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
6609 if (pf->veb[veb_idx] && pf->veb[veb_idx]->veb_idx == veb->idx) {
6610 pf->veb[veb_idx]->uplink_seid = veb->seid;
6611 ret = i40e_reconstitute_veb(pf->veb[veb_idx]);
6612 if (ret)
6613 break;
6614 }
6615 }
6616
6617 end_reconstitute:
6618 return ret;
6619 }
6620
6621 /**
6622 * i40e_get_capabilities - get info about the HW
6623 * @pf: the PF struct
6624 **/
6625 static int i40e_get_capabilities(struct i40e_pf *pf)
6626 {
6627 struct i40e_aqc_list_capabilities_element_resp *cap_buf;
6628 u16 data_size;
6629 int buf_len;
6630 int err;
6631
6632 buf_len = 40 * sizeof(struct i40e_aqc_list_capabilities_element_resp);
6633 do {
6634 cap_buf = kzalloc(buf_len, GFP_KERNEL);
6635 if (!cap_buf)
6636 return -ENOMEM;
6637
6638 /* this loads the data into the hw struct for us */
6639 err = i40e_aq_discover_capabilities(&pf->hw, cap_buf, buf_len,
6640 &data_size,
6641 i40e_aqc_opc_list_func_capabilities,
6642 NULL);
6643 /* data loaded, buffer no longer needed */
6644 kfree(cap_buf);
6645
6646 if (pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) {
6647 /* retry with a larger buffer */
6648 buf_len = data_size;
6649 } else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK) {
6650 dev_info(&pf->pdev->dev,
6651 "capability discovery failed, err %s aq_err %s\n",
6652 i40e_stat_str(&pf->hw, err),
6653 i40e_aq_str(&pf->hw,
6654 pf->hw.aq.asq_last_status));
6655 return -ENODEV;
6656 }
6657 } while (err);
6658
6659 if (pf->hw.debug_mask & I40E_DEBUG_USER)
6660 dev_info(&pf->pdev->dev,
6661 "pf=%d, num_vfs=%d, msix_pf=%d, msix_vf=%d, fd_g=%d, fd_b=%d, pf_max_q=%d num_vsi=%d\n",
6662 pf->hw.pf_id, pf->hw.func_caps.num_vfs,
6663 pf->hw.func_caps.num_msix_vectors,
6664 pf->hw.func_caps.num_msix_vectors_vf,
6665 pf->hw.func_caps.fd_filters_guaranteed,
6666 pf->hw.func_caps.fd_filters_best_effort,
6667 pf->hw.func_caps.num_tx_qp,
6668 pf->hw.func_caps.num_vsis);
6669
6670 #define DEF_NUM_VSI (1 + (pf->hw.func_caps.fcoe ? 1 : 0) \
6671 + pf->hw.func_caps.num_vfs)
6672 if (pf->hw.revision_id == 0 && (DEF_NUM_VSI > pf->hw.func_caps.num_vsis)) {
6673 dev_info(&pf->pdev->dev,
6674 "got num_vsis %d, setting num_vsis to %d\n",
6675 pf->hw.func_caps.num_vsis, DEF_NUM_VSI);
6676 pf->hw.func_caps.num_vsis = DEF_NUM_VSI;
6677 }
6678
6679 return 0;
6680 }
6681
6682 static int i40e_vsi_clear(struct i40e_vsi *vsi);
6683
6684 /**
6685 * i40e_fdir_sb_setup - initialize the Flow Director resources for Sideband
6686 * @pf: board private structure
6687 **/
6688 static void i40e_fdir_sb_setup(struct i40e_pf *pf)
6689 {
6690 struct i40e_vsi *vsi;
6691 int i;
6692
6693 /* quick workaround for an NVM issue that leaves a critical register
6694 * uninitialized
6695 */
6696 if (!rd32(&pf->hw, I40E_GLQF_HKEY(0))) {
6697 static const u32 hkey[] = {
6698 0xe640d33f, 0xcdfe98ab, 0x73fa7161, 0x0d7a7d36,
6699 0xeacb7d61, 0xaa4f05b6, 0x9c5c89ed, 0xfc425ddb,
6700 0xa4654832, 0xfc7461d4, 0x8f827619, 0xf5c63c21,
6701 0x95b3a76d};
6702
6703 for (i = 0; i <= I40E_GLQF_HKEY_MAX_INDEX; i++)
6704 wr32(&pf->hw, I40E_GLQF_HKEY(i), hkey[i]);
6705 }
6706
6707 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
6708 return;
6709
6710 /* find existing VSI and see if it needs configuring */
6711 vsi = NULL;
6712 for (i = 0; i < pf->num_alloc_vsi; i++) {
6713 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
6714 vsi = pf->vsi[i];
6715 break;
6716 }
6717 }
6718
6719 /* create a new VSI if none exists */
6720 if (!vsi) {
6721 vsi = i40e_vsi_setup(pf, I40E_VSI_FDIR,
6722 pf->vsi[pf->lan_vsi]->seid, 0);
6723 if (!vsi) {
6724 dev_info(&pf->pdev->dev, "Couldn't create FDir VSI\n");
6725 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
6726 return;
6727 }
6728 }
6729
6730 i40e_vsi_setup_irqhandler(vsi, i40e_fdir_clean_ring);
6731 }
6732
6733 /**
6734 * i40e_fdir_teardown - release the Flow Director resources
6735 * @pf: board private structure
6736 **/
6737 static void i40e_fdir_teardown(struct i40e_pf *pf)
6738 {
6739 int i;
6740
6741 i40e_fdir_filter_exit(pf);
6742 for (i = 0; i < pf->num_alloc_vsi; i++) {
6743 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
6744 i40e_vsi_release(pf->vsi[i]);
6745 break;
6746 }
6747 }
6748 }
6749
6750 /**
6751 * i40e_prep_for_reset - prep for the core to reset
6752 * @pf: board private structure
6753 *
6754 * Close up the VFs and other things in prep for PF Reset.
6755 **/
6756 static void i40e_prep_for_reset(struct i40e_pf *pf)
6757 {
6758 struct i40e_hw *hw = &pf->hw;
6759 i40e_status ret = 0;
6760 u32 v;
6761
6762 clear_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
6763 if (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
6764 return;
6765 if (i40e_check_asq_alive(&pf->hw))
6766 i40e_vc_notify_reset(pf);
6767
6768 dev_dbg(&pf->pdev->dev, "Tearing down internal switch for reset\n");
6769
6770 /* quiesce the VSIs and their queues that are not already DOWN */
6771 i40e_pf_quiesce_all_vsi(pf);
6772
6773 for (v = 0; v < pf->num_alloc_vsi; v++) {
6774 if (pf->vsi[v])
6775 pf->vsi[v]->seid = 0;
6776 }
6777
6778 i40e_shutdown_adminq(&pf->hw);
6779
6780 /* call shutdown HMC */
6781 if (hw->hmc.hmc_obj) {
6782 ret = i40e_shutdown_lan_hmc(hw);
6783 if (ret)
6784 dev_warn(&pf->pdev->dev,
6785 "shutdown_lan_hmc failed: %d\n", ret);
6786 }
6787 }
6788
6789 /**
6790 * i40e_send_version - update firmware with driver version
6791 * @pf: PF struct
6792 */
6793 static void i40e_send_version(struct i40e_pf *pf)
6794 {
6795 struct i40e_driver_version dv;
6796
6797 dv.major_version = DRV_VERSION_MAJOR;
6798 dv.minor_version = DRV_VERSION_MINOR;
6799 dv.build_version = DRV_VERSION_BUILD;
6800 dv.subbuild_version = 0;
6801 strlcpy(dv.driver_string, DRV_VERSION, sizeof(dv.driver_string));
6802 i40e_aq_send_driver_version(&pf->hw, &dv, NULL);
6803 }
6804
6805 /**
6806 * i40e_reset_and_rebuild - reset and rebuild using a saved config
6807 * @pf: board private structure
6808 * @reinit: if the Main VSI needs to re-initialized.
6809 **/
6810 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit)
6811 {
6812 struct i40e_hw *hw = &pf->hw;
6813 u8 set_fc_aq_fail = 0;
6814 i40e_status ret;
6815 u32 val;
6816 u32 v;
6817
6818 /* Now we wait for GRST to settle out.
6819 * We don't have to delete the VEBs or VSIs from the hw switch
6820 * because the reset will make them disappear.
6821 */
6822 ret = i40e_pf_reset(hw);
6823 if (ret) {
6824 dev_info(&pf->pdev->dev, "PF reset failed, %d\n", ret);
6825 set_bit(__I40E_RESET_FAILED, &pf->state);
6826 goto clear_recovery;
6827 }
6828 pf->pfr_count++;
6829
6830 if (test_bit(__I40E_DOWN, &pf->state))
6831 goto clear_recovery;
6832 dev_dbg(&pf->pdev->dev, "Rebuilding internal switch\n");
6833
6834 /* rebuild the basics for the AdminQ, HMC, and initial HW switch */
6835 ret = i40e_init_adminq(&pf->hw);
6836 if (ret) {
6837 dev_info(&pf->pdev->dev, "Rebuild AdminQ failed, err %s aq_err %s\n",
6838 i40e_stat_str(&pf->hw, ret),
6839 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6840 goto clear_recovery;
6841 }
6842
6843 /* re-verify the eeprom if we just had an EMP reset */
6844 if (test_and_clear_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state))
6845 i40e_verify_eeprom(pf);
6846
6847 i40e_clear_pxe_mode(hw);
6848 ret = i40e_get_capabilities(pf);
6849 if (ret)
6850 goto end_core_reset;
6851
6852 ret = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
6853 hw->func_caps.num_rx_qp,
6854 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
6855 if (ret) {
6856 dev_info(&pf->pdev->dev, "init_lan_hmc failed: %d\n", ret);
6857 goto end_core_reset;
6858 }
6859 ret = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
6860 if (ret) {
6861 dev_info(&pf->pdev->dev, "configure_lan_hmc failed: %d\n", ret);
6862 goto end_core_reset;
6863 }
6864
6865 #ifdef CONFIG_I40E_DCB
6866 ret = i40e_init_pf_dcb(pf);
6867 if (ret) {
6868 dev_info(&pf->pdev->dev, "DCB init failed %d, disabled\n", ret);
6869 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
6870 /* Continue without DCB enabled */
6871 }
6872 #endif /* CONFIG_I40E_DCB */
6873 #ifdef I40E_FCOE
6874 i40e_init_pf_fcoe(pf);
6875
6876 #endif
6877 /* do basic switch setup */
6878 ret = i40e_setup_pf_switch(pf, reinit);
6879 if (ret)
6880 goto end_core_reset;
6881
6882 /* The driver only wants link up/down and module qualification
6883 * reports from firmware. Note the negative logic.
6884 */
6885 ret = i40e_aq_set_phy_int_mask(&pf->hw,
6886 ~(I40E_AQ_EVENT_LINK_UPDOWN |
6887 I40E_AQ_EVENT_MEDIA_NA |
6888 I40E_AQ_EVENT_MODULE_QUAL_FAIL), NULL);
6889 if (ret)
6890 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
6891 i40e_stat_str(&pf->hw, ret),
6892 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6893
6894 /* make sure our flow control settings are restored */
6895 ret = i40e_set_fc(&pf->hw, &set_fc_aq_fail, true);
6896 if (ret)
6897 dev_dbg(&pf->pdev->dev, "setting flow control: ret = %s last_status = %s\n",
6898 i40e_stat_str(&pf->hw, ret),
6899 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6900
6901 /* Rebuild the VSIs and VEBs that existed before reset.
6902 * They are still in our local switch element arrays, so only
6903 * need to rebuild the switch model in the HW.
6904 *
6905 * If there were VEBs but the reconstitution failed, we'll try
6906 * try to recover minimal use by getting the basic PF VSI working.
6907 */
6908 if (pf->vsi[pf->lan_vsi]->uplink_seid != pf->mac_seid) {
6909 dev_dbg(&pf->pdev->dev, "attempting to rebuild switch\n");
6910 /* find the one VEB connected to the MAC, and find orphans */
6911 for (v = 0; v < I40E_MAX_VEB; v++) {
6912 if (!pf->veb[v])
6913 continue;
6914
6915 if (pf->veb[v]->uplink_seid == pf->mac_seid ||
6916 pf->veb[v]->uplink_seid == 0) {
6917 ret = i40e_reconstitute_veb(pf->veb[v]);
6918
6919 if (!ret)
6920 continue;
6921
6922 /* If Main VEB failed, we're in deep doodoo,
6923 * so give up rebuilding the switch and set up
6924 * for minimal rebuild of PF VSI.
6925 * If orphan failed, we'll report the error
6926 * but try to keep going.
6927 */
6928 if (pf->veb[v]->uplink_seid == pf->mac_seid) {
6929 dev_info(&pf->pdev->dev,
6930 "rebuild of switch failed: %d, will try to set up simple PF connection\n",
6931 ret);
6932 pf->vsi[pf->lan_vsi]->uplink_seid
6933 = pf->mac_seid;
6934 break;
6935 } else if (pf->veb[v]->uplink_seid == 0) {
6936 dev_info(&pf->pdev->dev,
6937 "rebuild of orphan VEB failed: %d\n",
6938 ret);
6939 }
6940 }
6941 }
6942 }
6943
6944 if (pf->vsi[pf->lan_vsi]->uplink_seid == pf->mac_seid) {
6945 dev_dbg(&pf->pdev->dev, "attempting to rebuild PF VSI\n");
6946 /* no VEB, so rebuild only the Main VSI */
6947 ret = i40e_add_vsi(pf->vsi[pf->lan_vsi]);
6948 if (ret) {
6949 dev_info(&pf->pdev->dev,
6950 "rebuild of Main VSI failed: %d\n", ret);
6951 goto end_core_reset;
6952 }
6953 }
6954
6955 /* Reconfigure hardware for allowing smaller MSS in the case
6956 * of TSO, so that we avoid the MDD being fired and causing
6957 * a reset in the case of small MSS+TSO.
6958 */
6959 #define I40E_REG_MSS 0x000E64DC
6960 #define I40E_REG_MSS_MIN_MASK 0x3FF0000
6961 #define I40E_64BYTE_MSS 0x400000
6962 val = rd32(hw, I40E_REG_MSS);
6963 if ((val & I40E_REG_MSS_MIN_MASK) > I40E_64BYTE_MSS) {
6964 val &= ~I40E_REG_MSS_MIN_MASK;
6965 val |= I40E_64BYTE_MSS;
6966 wr32(hw, I40E_REG_MSS, val);
6967 }
6968
6969 if (pf->flags & I40E_FLAG_RESTART_AUTONEG) {
6970 msleep(75);
6971 ret = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
6972 if (ret)
6973 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
6974 i40e_stat_str(&pf->hw, ret),
6975 i40e_aq_str(&pf->hw,
6976 pf->hw.aq.asq_last_status));
6977 }
6978 /* reinit the misc interrupt */
6979 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
6980 ret = i40e_setup_misc_vector(pf);
6981
6982 /* Add a filter to drop all Flow control frames from any VSI from being
6983 * transmitted. By doing so we stop a malicious VF from sending out
6984 * PAUSE or PFC frames and potentially controlling traffic for other
6985 * PF/VF VSIs.
6986 * The FW can still send Flow control frames if enabled.
6987 */
6988 i40e_add_filter_to_drop_tx_flow_control_frames(&pf->hw,
6989 pf->main_vsi_seid);
6990
6991 /* restart the VSIs that were rebuilt and running before the reset */
6992 i40e_pf_unquiesce_all_vsi(pf);
6993
6994 if (pf->num_alloc_vfs) {
6995 for (v = 0; v < pf->num_alloc_vfs; v++)
6996 i40e_reset_vf(&pf->vf[v], true);
6997 }
6998
6999 /* tell the firmware that we're starting */
7000 i40e_send_version(pf);
7001
7002 end_core_reset:
7003 clear_bit(__I40E_RESET_FAILED, &pf->state);
7004 clear_recovery:
7005 clear_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state);
7006 }
7007
7008 /**
7009 * i40e_handle_reset_warning - prep for the PF to reset, reset and rebuild
7010 * @pf: board private structure
7011 *
7012 * Close up the VFs and other things in prep for a Core Reset,
7013 * then get ready to rebuild the world.
7014 **/
7015 static void i40e_handle_reset_warning(struct i40e_pf *pf)
7016 {
7017 i40e_prep_for_reset(pf);
7018 i40e_reset_and_rebuild(pf, false);
7019 }
7020
7021 /**
7022 * i40e_handle_mdd_event
7023 * @pf: pointer to the PF structure
7024 *
7025 * Called from the MDD irq handler to identify possibly malicious vfs
7026 **/
7027 static void i40e_handle_mdd_event(struct i40e_pf *pf)
7028 {
7029 struct i40e_hw *hw = &pf->hw;
7030 bool mdd_detected = false;
7031 bool pf_mdd_detected = false;
7032 struct i40e_vf *vf;
7033 u32 reg;
7034 int i;
7035
7036 if (!test_bit(__I40E_MDD_EVENT_PENDING, &pf->state))
7037 return;
7038
7039 /* find what triggered the MDD event */
7040 reg = rd32(hw, I40E_GL_MDET_TX);
7041 if (reg & I40E_GL_MDET_TX_VALID_MASK) {
7042 u8 pf_num = (reg & I40E_GL_MDET_TX_PF_NUM_MASK) >>
7043 I40E_GL_MDET_TX_PF_NUM_SHIFT;
7044 u16 vf_num = (reg & I40E_GL_MDET_TX_VF_NUM_MASK) >>
7045 I40E_GL_MDET_TX_VF_NUM_SHIFT;
7046 u8 event = (reg & I40E_GL_MDET_TX_EVENT_MASK) >>
7047 I40E_GL_MDET_TX_EVENT_SHIFT;
7048 u16 queue = ((reg & I40E_GL_MDET_TX_QUEUE_MASK) >>
7049 I40E_GL_MDET_TX_QUEUE_SHIFT) -
7050 pf->hw.func_caps.base_queue;
7051 if (netif_msg_tx_err(pf))
7052 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on TX queue %d PF number 0x%02x VF number 0x%02x\n",
7053 event, queue, pf_num, vf_num);
7054 wr32(hw, I40E_GL_MDET_TX, 0xffffffff);
7055 mdd_detected = true;
7056 }
7057 reg = rd32(hw, I40E_GL_MDET_RX);
7058 if (reg & I40E_GL_MDET_RX_VALID_MASK) {
7059 u8 func = (reg & I40E_GL_MDET_RX_FUNCTION_MASK) >>
7060 I40E_GL_MDET_RX_FUNCTION_SHIFT;
7061 u8 event = (reg & I40E_GL_MDET_RX_EVENT_MASK) >>
7062 I40E_GL_MDET_RX_EVENT_SHIFT;
7063 u16 queue = ((reg & I40E_GL_MDET_RX_QUEUE_MASK) >>
7064 I40E_GL_MDET_RX_QUEUE_SHIFT) -
7065 pf->hw.func_caps.base_queue;
7066 if (netif_msg_rx_err(pf))
7067 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on RX queue %d of function 0x%02x\n",
7068 event, queue, func);
7069 wr32(hw, I40E_GL_MDET_RX, 0xffffffff);
7070 mdd_detected = true;
7071 }
7072
7073 if (mdd_detected) {
7074 reg = rd32(hw, I40E_PF_MDET_TX);
7075 if (reg & I40E_PF_MDET_TX_VALID_MASK) {
7076 wr32(hw, I40E_PF_MDET_TX, 0xFFFF);
7077 dev_info(&pf->pdev->dev, "TX driver issue detected, PF reset issued\n");
7078 pf_mdd_detected = true;
7079 }
7080 reg = rd32(hw, I40E_PF_MDET_RX);
7081 if (reg & I40E_PF_MDET_RX_VALID_MASK) {
7082 wr32(hw, I40E_PF_MDET_RX, 0xFFFF);
7083 dev_info(&pf->pdev->dev, "RX driver issue detected, PF reset issued\n");
7084 pf_mdd_detected = true;
7085 }
7086 /* Queue belongs to the PF, initiate a reset */
7087 if (pf_mdd_detected) {
7088 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
7089 i40e_service_event_schedule(pf);
7090 }
7091 }
7092
7093 /* see if one of the VFs needs its hand slapped */
7094 for (i = 0; i < pf->num_alloc_vfs && mdd_detected; i++) {
7095 vf = &(pf->vf[i]);
7096 reg = rd32(hw, I40E_VP_MDET_TX(i));
7097 if (reg & I40E_VP_MDET_TX_VALID_MASK) {
7098 wr32(hw, I40E_VP_MDET_TX(i), 0xFFFF);
7099 vf->num_mdd_events++;
7100 dev_info(&pf->pdev->dev, "TX driver issue detected on VF %d\n",
7101 i);
7102 }
7103
7104 reg = rd32(hw, I40E_VP_MDET_RX(i));
7105 if (reg & I40E_VP_MDET_RX_VALID_MASK) {
7106 wr32(hw, I40E_VP_MDET_RX(i), 0xFFFF);
7107 vf->num_mdd_events++;
7108 dev_info(&pf->pdev->dev, "RX driver issue detected on VF %d\n",
7109 i);
7110 }
7111
7112 if (vf->num_mdd_events > I40E_DEFAULT_NUM_MDD_EVENTS_ALLOWED) {
7113 dev_info(&pf->pdev->dev,
7114 "Too many MDD events on VF %d, disabled\n", i);
7115 dev_info(&pf->pdev->dev,
7116 "Use PF Control I/F to re-enable the VF\n");
7117 set_bit(I40E_VF_STAT_DISABLED, &vf->vf_states);
7118 }
7119 }
7120
7121 /* re-enable mdd interrupt cause */
7122 clear_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
7123 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
7124 reg |= I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
7125 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
7126 i40e_flush(hw);
7127 }
7128
7129 /**
7130 * i40e_sync_udp_filters_subtask - Sync the VSI filter list with HW
7131 * @pf: board private structure
7132 **/
7133 static void i40e_sync_udp_filters_subtask(struct i40e_pf *pf)
7134 {
7135 struct i40e_hw *hw = &pf->hw;
7136 i40e_status ret;
7137 __be16 port;
7138 int i;
7139
7140 if (!(pf->flags & I40E_FLAG_UDP_FILTER_SYNC))
7141 return;
7142
7143 pf->flags &= ~I40E_FLAG_UDP_FILTER_SYNC;
7144
7145 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
7146 if (pf->pending_udp_bitmap & BIT_ULL(i)) {
7147 pf->pending_udp_bitmap &= ~BIT_ULL(i);
7148 port = pf->udp_ports[i].index;
7149 if (port)
7150 ret = i40e_aq_add_udp_tunnel(hw, port,
7151 pf->udp_ports[i].type,
7152 NULL, NULL);
7153 else
7154 ret = i40e_aq_del_udp_tunnel(hw, i, NULL);
7155
7156 if (ret) {
7157 dev_dbg(&pf->pdev->dev,
7158 "%s %s port %d, index %d failed, err %s aq_err %s\n",
7159 pf->udp_ports[i].type ? "vxlan" : "geneve",
7160 port ? "add" : "delete",
7161 ntohs(port), i,
7162 i40e_stat_str(&pf->hw, ret),
7163 i40e_aq_str(&pf->hw,
7164 pf->hw.aq.asq_last_status));
7165 pf->udp_ports[i].index = 0;
7166 }
7167 }
7168 }
7169 }
7170
7171 /**
7172 * i40e_service_task - Run the driver's async subtasks
7173 * @work: pointer to work_struct containing our data
7174 **/
7175 static void i40e_service_task(struct work_struct *work)
7176 {
7177 struct i40e_pf *pf = container_of(work,
7178 struct i40e_pf,
7179 service_task);
7180 unsigned long start_time = jiffies;
7181
7182 /* don't bother with service tasks if a reset is in progress */
7183 if (test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
7184 i40e_service_event_complete(pf);
7185 return;
7186 }
7187
7188 i40e_detect_recover_hung(pf);
7189 i40e_sync_filters_subtask(pf);
7190 i40e_reset_subtask(pf);
7191 i40e_handle_mdd_event(pf);
7192 i40e_vc_process_vflr_event(pf);
7193 i40e_watchdog_subtask(pf);
7194 i40e_fdir_reinit_subtask(pf);
7195 i40e_client_subtask(pf);
7196 i40e_sync_filters_subtask(pf);
7197 i40e_sync_udp_filters_subtask(pf);
7198 i40e_clean_adminq_subtask(pf);
7199
7200 i40e_service_event_complete(pf);
7201
7202 /* If the tasks have taken longer than one timer cycle or there
7203 * is more work to be done, reschedule the service task now
7204 * rather than wait for the timer to tick again.
7205 */
7206 if (time_after(jiffies, (start_time + pf->service_timer_period)) ||
7207 test_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state) ||
7208 test_bit(__I40E_MDD_EVENT_PENDING, &pf->state) ||
7209 test_bit(__I40E_VFLR_EVENT_PENDING, &pf->state))
7210 i40e_service_event_schedule(pf);
7211 }
7212
7213 /**
7214 * i40e_service_timer - timer callback
7215 * @data: pointer to PF struct
7216 **/
7217 static void i40e_service_timer(unsigned long data)
7218 {
7219 struct i40e_pf *pf = (struct i40e_pf *)data;
7220
7221 mod_timer(&pf->service_timer,
7222 round_jiffies(jiffies + pf->service_timer_period));
7223 i40e_service_event_schedule(pf);
7224 }
7225
7226 /**
7227 * i40e_set_num_rings_in_vsi - Determine number of rings in the VSI
7228 * @vsi: the VSI being configured
7229 **/
7230 static int i40e_set_num_rings_in_vsi(struct i40e_vsi *vsi)
7231 {
7232 struct i40e_pf *pf = vsi->back;
7233
7234 switch (vsi->type) {
7235 case I40E_VSI_MAIN:
7236 vsi->alloc_queue_pairs = pf->num_lan_qps;
7237 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7238 I40E_REQ_DESCRIPTOR_MULTIPLE);
7239 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
7240 vsi->num_q_vectors = pf->num_lan_msix;
7241 else
7242 vsi->num_q_vectors = 1;
7243
7244 break;
7245
7246 case I40E_VSI_FDIR:
7247 vsi->alloc_queue_pairs = 1;
7248 vsi->num_desc = ALIGN(I40E_FDIR_RING_COUNT,
7249 I40E_REQ_DESCRIPTOR_MULTIPLE);
7250 vsi->num_q_vectors = pf->num_fdsb_msix;
7251 break;
7252
7253 case I40E_VSI_VMDQ2:
7254 vsi->alloc_queue_pairs = pf->num_vmdq_qps;
7255 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7256 I40E_REQ_DESCRIPTOR_MULTIPLE);
7257 vsi->num_q_vectors = pf->num_vmdq_msix;
7258 break;
7259
7260 case I40E_VSI_SRIOV:
7261 vsi->alloc_queue_pairs = pf->num_vf_qps;
7262 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7263 I40E_REQ_DESCRIPTOR_MULTIPLE);
7264 break;
7265
7266 #ifdef I40E_FCOE
7267 case I40E_VSI_FCOE:
7268 vsi->alloc_queue_pairs = pf->num_fcoe_qps;
7269 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7270 I40E_REQ_DESCRIPTOR_MULTIPLE);
7271 vsi->num_q_vectors = pf->num_fcoe_msix;
7272 break;
7273
7274 #endif /* I40E_FCOE */
7275 default:
7276 WARN_ON(1);
7277 return -ENODATA;
7278 }
7279
7280 return 0;
7281 }
7282
7283 /**
7284 * i40e_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the vsi
7285 * @type: VSI pointer
7286 * @alloc_qvectors: a bool to specify if q_vectors need to be allocated.
7287 *
7288 * On error: returns error code (negative)
7289 * On success: returns 0
7290 **/
7291 static int i40e_vsi_alloc_arrays(struct i40e_vsi *vsi, bool alloc_qvectors)
7292 {
7293 int size;
7294 int ret = 0;
7295
7296 /* allocate memory for both Tx and Rx ring pointers */
7297 size = sizeof(struct i40e_ring *) * vsi->alloc_queue_pairs * 2;
7298 vsi->tx_rings = kzalloc(size, GFP_KERNEL);
7299 if (!vsi->tx_rings)
7300 return -ENOMEM;
7301 vsi->rx_rings = &vsi->tx_rings[vsi->alloc_queue_pairs];
7302
7303 if (alloc_qvectors) {
7304 /* allocate memory for q_vector pointers */
7305 size = sizeof(struct i40e_q_vector *) * vsi->num_q_vectors;
7306 vsi->q_vectors = kzalloc(size, GFP_KERNEL);
7307 if (!vsi->q_vectors) {
7308 ret = -ENOMEM;
7309 goto err_vectors;
7310 }
7311 }
7312 return ret;
7313
7314 err_vectors:
7315 kfree(vsi->tx_rings);
7316 return ret;
7317 }
7318
7319 /**
7320 * i40e_vsi_mem_alloc - Allocates the next available struct vsi in the PF
7321 * @pf: board private structure
7322 * @type: type of VSI
7323 *
7324 * On error: returns error code (negative)
7325 * On success: returns vsi index in PF (positive)
7326 **/
7327 static int i40e_vsi_mem_alloc(struct i40e_pf *pf, enum i40e_vsi_type type)
7328 {
7329 int ret = -ENODEV;
7330 struct i40e_vsi *vsi;
7331 int vsi_idx;
7332 int i;
7333
7334 /* Need to protect the allocation of the VSIs at the PF level */
7335 mutex_lock(&pf->switch_mutex);
7336
7337 /* VSI list may be fragmented if VSI creation/destruction has
7338 * been happening. We can afford to do a quick scan to look
7339 * for any free VSIs in the list.
7340 *
7341 * find next empty vsi slot, looping back around if necessary
7342 */
7343 i = pf->next_vsi;
7344 while (i < pf->num_alloc_vsi && pf->vsi[i])
7345 i++;
7346 if (i >= pf->num_alloc_vsi) {
7347 i = 0;
7348 while (i < pf->next_vsi && pf->vsi[i])
7349 i++;
7350 }
7351
7352 if (i < pf->num_alloc_vsi && !pf->vsi[i]) {
7353 vsi_idx = i; /* Found one! */
7354 } else {
7355 ret = -ENODEV;
7356 goto unlock_pf; /* out of VSI slots! */
7357 }
7358 pf->next_vsi = ++i;
7359
7360 vsi = kzalloc(sizeof(*vsi), GFP_KERNEL);
7361 if (!vsi) {
7362 ret = -ENOMEM;
7363 goto unlock_pf;
7364 }
7365 vsi->type = type;
7366 vsi->back = pf;
7367 set_bit(__I40E_DOWN, &vsi->state);
7368 vsi->flags = 0;
7369 vsi->idx = vsi_idx;
7370 vsi->int_rate_limit = 0;
7371 vsi->rss_table_size = (vsi->type == I40E_VSI_MAIN) ?
7372 pf->rss_table_size : 64;
7373 vsi->netdev_registered = false;
7374 vsi->work_limit = I40E_DEFAULT_IRQ_WORK;
7375 INIT_LIST_HEAD(&vsi->mac_filter_list);
7376 vsi->irqs_ready = false;
7377
7378 ret = i40e_set_num_rings_in_vsi(vsi);
7379 if (ret)
7380 goto err_rings;
7381
7382 ret = i40e_vsi_alloc_arrays(vsi, true);
7383 if (ret)
7384 goto err_rings;
7385
7386 /* Setup default MSIX irq handler for VSI */
7387 i40e_vsi_setup_irqhandler(vsi, i40e_msix_clean_rings);
7388
7389 /* Initialize VSI lock */
7390 spin_lock_init(&vsi->mac_filter_list_lock);
7391 pf->vsi[vsi_idx] = vsi;
7392 ret = vsi_idx;
7393 goto unlock_pf;
7394
7395 err_rings:
7396 pf->next_vsi = i - 1;
7397 kfree(vsi);
7398 unlock_pf:
7399 mutex_unlock(&pf->switch_mutex);
7400 return ret;
7401 }
7402
7403 /**
7404 * i40e_vsi_free_arrays - Free queue and vector pointer arrays for the VSI
7405 * @type: VSI pointer
7406 * @free_qvectors: a bool to specify if q_vectors need to be freed.
7407 *
7408 * On error: returns error code (negative)
7409 * On success: returns 0
7410 **/
7411 static void i40e_vsi_free_arrays(struct i40e_vsi *vsi, bool free_qvectors)
7412 {
7413 /* free the ring and vector containers */
7414 if (free_qvectors) {
7415 kfree(vsi->q_vectors);
7416 vsi->q_vectors = NULL;
7417 }
7418 kfree(vsi->tx_rings);
7419 vsi->tx_rings = NULL;
7420 vsi->rx_rings = NULL;
7421 }
7422
7423 /**
7424 * i40e_clear_rss_config_user - clear the user configured RSS hash keys
7425 * and lookup table
7426 * @vsi: Pointer to VSI structure
7427 */
7428 static void i40e_clear_rss_config_user(struct i40e_vsi *vsi)
7429 {
7430 if (!vsi)
7431 return;
7432
7433 kfree(vsi->rss_hkey_user);
7434 vsi->rss_hkey_user = NULL;
7435
7436 kfree(vsi->rss_lut_user);
7437 vsi->rss_lut_user = NULL;
7438 }
7439
7440 /**
7441 * i40e_vsi_clear - Deallocate the VSI provided
7442 * @vsi: the VSI being un-configured
7443 **/
7444 static int i40e_vsi_clear(struct i40e_vsi *vsi)
7445 {
7446 struct i40e_pf *pf;
7447
7448 if (!vsi)
7449 return 0;
7450
7451 if (!vsi->back)
7452 goto free_vsi;
7453 pf = vsi->back;
7454
7455 mutex_lock(&pf->switch_mutex);
7456 if (!pf->vsi[vsi->idx]) {
7457 dev_err(&pf->pdev->dev, "pf->vsi[%d] is NULL, just free vsi[%d](%p,type %d)\n",
7458 vsi->idx, vsi->idx, vsi, vsi->type);
7459 goto unlock_vsi;
7460 }
7461
7462 if (pf->vsi[vsi->idx] != vsi) {
7463 dev_err(&pf->pdev->dev,
7464 "pf->vsi[%d](%p, type %d) != vsi[%d](%p,type %d): no free!\n",
7465 pf->vsi[vsi->idx]->idx,
7466 pf->vsi[vsi->idx],
7467 pf->vsi[vsi->idx]->type,
7468 vsi->idx, vsi, vsi->type);
7469 goto unlock_vsi;
7470 }
7471
7472 /* updates the PF for this cleared vsi */
7473 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
7474 i40e_put_lump(pf->irq_pile, vsi->base_vector, vsi->idx);
7475
7476 i40e_vsi_free_arrays(vsi, true);
7477 i40e_clear_rss_config_user(vsi);
7478
7479 pf->vsi[vsi->idx] = NULL;
7480 if (vsi->idx < pf->next_vsi)
7481 pf->next_vsi = vsi->idx;
7482
7483 unlock_vsi:
7484 mutex_unlock(&pf->switch_mutex);
7485 free_vsi:
7486 kfree(vsi);
7487
7488 return 0;
7489 }
7490
7491 /**
7492 * i40e_vsi_clear_rings - Deallocates the Rx and Tx rings for the provided VSI
7493 * @vsi: the VSI being cleaned
7494 **/
7495 static void i40e_vsi_clear_rings(struct i40e_vsi *vsi)
7496 {
7497 int i;
7498
7499 if (vsi->tx_rings && vsi->tx_rings[0]) {
7500 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
7501 kfree_rcu(vsi->tx_rings[i], rcu);
7502 vsi->tx_rings[i] = NULL;
7503 vsi->rx_rings[i] = NULL;
7504 }
7505 }
7506 }
7507
7508 /**
7509 * i40e_alloc_rings - Allocates the Rx and Tx rings for the provided VSI
7510 * @vsi: the VSI being configured
7511 **/
7512 static int i40e_alloc_rings(struct i40e_vsi *vsi)
7513 {
7514 struct i40e_ring *tx_ring, *rx_ring;
7515 struct i40e_pf *pf = vsi->back;
7516 int i;
7517
7518 /* Set basic values in the rings to be used later during open() */
7519 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
7520 /* allocate space for both Tx and Rx in one shot */
7521 tx_ring = kzalloc(sizeof(struct i40e_ring) * 2, GFP_KERNEL);
7522 if (!tx_ring)
7523 goto err_out;
7524
7525 tx_ring->queue_index = i;
7526 tx_ring->reg_idx = vsi->base_queue + i;
7527 tx_ring->ring_active = false;
7528 tx_ring->vsi = vsi;
7529 tx_ring->netdev = vsi->netdev;
7530 tx_ring->dev = &pf->pdev->dev;
7531 tx_ring->count = vsi->num_desc;
7532 tx_ring->size = 0;
7533 tx_ring->dcb_tc = 0;
7534 if (vsi->back->flags & I40E_FLAG_WB_ON_ITR_CAPABLE)
7535 tx_ring->flags = I40E_TXR_FLAGS_WB_ON_ITR;
7536 tx_ring->tx_itr_setting = pf->tx_itr_default;
7537 vsi->tx_rings[i] = tx_ring;
7538
7539 rx_ring = &tx_ring[1];
7540 rx_ring->queue_index = i;
7541 rx_ring->reg_idx = vsi->base_queue + i;
7542 rx_ring->ring_active = false;
7543 rx_ring->vsi = vsi;
7544 rx_ring->netdev = vsi->netdev;
7545 rx_ring->dev = &pf->pdev->dev;
7546 rx_ring->count = vsi->num_desc;
7547 rx_ring->size = 0;
7548 rx_ring->dcb_tc = 0;
7549 rx_ring->rx_itr_setting = pf->rx_itr_default;
7550 vsi->rx_rings[i] = rx_ring;
7551 }
7552
7553 return 0;
7554
7555 err_out:
7556 i40e_vsi_clear_rings(vsi);
7557 return -ENOMEM;
7558 }
7559
7560 /**
7561 * i40e_reserve_msix_vectors - Reserve MSI-X vectors in the kernel
7562 * @pf: board private structure
7563 * @vectors: the number of MSI-X vectors to request
7564 *
7565 * Returns the number of vectors reserved, or error
7566 **/
7567 static int i40e_reserve_msix_vectors(struct i40e_pf *pf, int vectors)
7568 {
7569 vectors = pci_enable_msix_range(pf->pdev, pf->msix_entries,
7570 I40E_MIN_MSIX, vectors);
7571 if (vectors < 0) {
7572 dev_info(&pf->pdev->dev,
7573 "MSI-X vector reservation failed: %d\n", vectors);
7574 vectors = 0;
7575 }
7576
7577 return vectors;
7578 }
7579
7580 /**
7581 * i40e_init_msix - Setup the MSIX capability
7582 * @pf: board private structure
7583 *
7584 * Work with the OS to set up the MSIX vectors needed.
7585 *
7586 * Returns the number of vectors reserved or negative on failure
7587 **/
7588 static int i40e_init_msix(struct i40e_pf *pf)
7589 {
7590 struct i40e_hw *hw = &pf->hw;
7591 int vectors_left;
7592 int v_budget, i;
7593 int v_actual;
7594 int iwarp_requested = 0;
7595
7596 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
7597 return -ENODEV;
7598
7599 /* The number of vectors we'll request will be comprised of:
7600 * - Add 1 for "other" cause for Admin Queue events, etc.
7601 * - The number of LAN queue pairs
7602 * - Queues being used for RSS.
7603 * We don't need as many as max_rss_size vectors.
7604 * use rss_size instead in the calculation since that
7605 * is governed by number of cpus in the system.
7606 * - assumes symmetric Tx/Rx pairing
7607 * - The number of VMDq pairs
7608 * - The CPU count within the NUMA node if iWARP is enabled
7609 #ifdef I40E_FCOE
7610 * - The number of FCOE qps.
7611 #endif
7612 * Once we count this up, try the request.
7613 *
7614 * If we can't get what we want, we'll simplify to nearly nothing
7615 * and try again. If that still fails, we punt.
7616 */
7617 vectors_left = hw->func_caps.num_msix_vectors;
7618 v_budget = 0;
7619
7620 /* reserve one vector for miscellaneous handler */
7621 if (vectors_left) {
7622 v_budget++;
7623 vectors_left--;
7624 }
7625
7626 /* reserve vectors for the main PF traffic queues */
7627 pf->num_lan_msix = min_t(int, num_online_cpus(), vectors_left);
7628 vectors_left -= pf->num_lan_msix;
7629 v_budget += pf->num_lan_msix;
7630
7631 /* reserve one vector for sideband flow director */
7632 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
7633 if (vectors_left) {
7634 pf->num_fdsb_msix = 1;
7635 v_budget++;
7636 vectors_left--;
7637 } else {
7638 pf->num_fdsb_msix = 0;
7639 }
7640 }
7641
7642 #ifdef I40E_FCOE
7643 /* can we reserve enough for FCoE? */
7644 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7645 if (!vectors_left)
7646 pf->num_fcoe_msix = 0;
7647 else if (vectors_left >= pf->num_fcoe_qps)
7648 pf->num_fcoe_msix = pf->num_fcoe_qps;
7649 else
7650 pf->num_fcoe_msix = 1;
7651 v_budget += pf->num_fcoe_msix;
7652 vectors_left -= pf->num_fcoe_msix;
7653 }
7654
7655 #endif
7656 /* can we reserve enough for iWARP? */
7657 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
7658 iwarp_requested = pf->num_iwarp_msix;
7659
7660 if (!vectors_left)
7661 pf->num_iwarp_msix = 0;
7662 else if (vectors_left < pf->num_iwarp_msix)
7663 pf->num_iwarp_msix = 1;
7664 v_budget += pf->num_iwarp_msix;
7665 vectors_left -= pf->num_iwarp_msix;
7666 }
7667
7668 /* any vectors left over go for VMDq support */
7669 if (pf->flags & I40E_FLAG_VMDQ_ENABLED) {
7670 int vmdq_vecs_wanted = pf->num_vmdq_vsis * pf->num_vmdq_qps;
7671 int vmdq_vecs = min_t(int, vectors_left, vmdq_vecs_wanted);
7672
7673 if (!vectors_left) {
7674 pf->num_vmdq_msix = 0;
7675 pf->num_vmdq_qps = 0;
7676 } else {
7677 /* if we're short on vectors for what's desired, we limit
7678 * the queues per vmdq. If this is still more than are
7679 * available, the user will need to change the number of
7680 * queues/vectors used by the PF later with the ethtool
7681 * channels command
7682 */
7683 if (vmdq_vecs < vmdq_vecs_wanted)
7684 pf->num_vmdq_qps = 1;
7685 pf->num_vmdq_msix = pf->num_vmdq_qps;
7686
7687 v_budget += vmdq_vecs;
7688 vectors_left -= vmdq_vecs;
7689 }
7690 }
7691
7692 pf->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry),
7693 GFP_KERNEL);
7694 if (!pf->msix_entries)
7695 return -ENOMEM;
7696
7697 for (i = 0; i < v_budget; i++)
7698 pf->msix_entries[i].entry = i;
7699 v_actual = i40e_reserve_msix_vectors(pf, v_budget);
7700
7701 if (v_actual < I40E_MIN_MSIX) {
7702 pf->flags &= ~I40E_FLAG_MSIX_ENABLED;
7703 kfree(pf->msix_entries);
7704 pf->msix_entries = NULL;
7705 return -ENODEV;
7706
7707 } else if (v_actual == I40E_MIN_MSIX) {
7708 /* Adjust for minimal MSIX use */
7709 pf->num_vmdq_vsis = 0;
7710 pf->num_vmdq_qps = 0;
7711 pf->num_lan_qps = 1;
7712 pf->num_lan_msix = 1;
7713
7714 } else if (!vectors_left) {
7715 /* If we have limited resources, we will start with no vectors
7716 * for the special features and then allocate vectors to some
7717 * of these features based on the policy and at the end disable
7718 * the features that did not get any vectors.
7719 */
7720 int vec;
7721
7722 dev_info(&pf->pdev->dev,
7723 "MSI-X vector limit reached, attempting to redistribute vectors\n");
7724 /* reserve the misc vector */
7725 vec = v_actual - 1;
7726
7727 /* Scale vector usage down */
7728 pf->num_vmdq_msix = 1; /* force VMDqs to only one vector */
7729 pf->num_vmdq_vsis = 1;
7730 pf->num_vmdq_qps = 1;
7731 #ifdef I40E_FCOE
7732 pf->num_fcoe_qps = 0;
7733 pf->num_fcoe_msix = 0;
7734 #endif
7735
7736 /* partition out the remaining vectors */
7737 switch (vec) {
7738 case 2:
7739 pf->num_lan_msix = 1;
7740 break;
7741 case 3:
7742 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
7743 pf->num_lan_msix = 1;
7744 pf->num_iwarp_msix = 1;
7745 } else {
7746 pf->num_lan_msix = 2;
7747 }
7748 #ifdef I40E_FCOE
7749 /* give one vector to FCoE */
7750 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7751 pf->num_lan_msix = 1;
7752 pf->num_fcoe_msix = 1;
7753 }
7754 #endif
7755 break;
7756 default:
7757 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
7758 pf->num_iwarp_msix = min_t(int, (vec / 3),
7759 iwarp_requested);
7760 pf->num_vmdq_vsis = min_t(int, (vec / 3),
7761 I40E_DEFAULT_NUM_VMDQ_VSI);
7762 } else {
7763 pf->num_vmdq_vsis = min_t(int, (vec / 2),
7764 I40E_DEFAULT_NUM_VMDQ_VSI);
7765 }
7766 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
7767 pf->num_fdsb_msix = 1;
7768 vec--;
7769 }
7770 pf->num_lan_msix = min_t(int,
7771 (vec - (pf->num_iwarp_msix + pf->num_vmdq_vsis)),
7772 pf->num_lan_msix);
7773 pf->num_lan_qps = pf->num_lan_msix;
7774 #ifdef I40E_FCOE
7775 /* give one vector to FCoE */
7776 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7777 pf->num_fcoe_msix = 1;
7778 vec--;
7779 }
7780 #endif
7781 break;
7782 }
7783 }
7784
7785 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) &&
7786 (pf->num_fdsb_msix == 0)) {
7787 dev_info(&pf->pdev->dev, "Sideband Flowdir disabled, not enough MSI-X vectors\n");
7788 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
7789 }
7790 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
7791 (pf->num_vmdq_msix == 0)) {
7792 dev_info(&pf->pdev->dev, "VMDq disabled, not enough MSI-X vectors\n");
7793 pf->flags &= ~I40E_FLAG_VMDQ_ENABLED;
7794 }
7795
7796 if ((pf->flags & I40E_FLAG_IWARP_ENABLED) &&
7797 (pf->num_iwarp_msix == 0)) {
7798 dev_info(&pf->pdev->dev, "IWARP disabled, not enough MSI-X vectors\n");
7799 pf->flags &= ~I40E_FLAG_IWARP_ENABLED;
7800 }
7801 #ifdef I40E_FCOE
7802
7803 if ((pf->flags & I40E_FLAG_FCOE_ENABLED) && (pf->num_fcoe_msix == 0)) {
7804 dev_info(&pf->pdev->dev, "FCOE disabled, not enough MSI-X vectors\n");
7805 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
7806 }
7807 #endif
7808 i40e_debug(&pf->hw, I40E_DEBUG_INIT,
7809 "MSI-X vector distribution: PF %d, VMDq %d, FDSB %d, iWARP %d\n",
7810 pf->num_lan_msix,
7811 pf->num_vmdq_msix * pf->num_vmdq_vsis,
7812 pf->num_fdsb_msix,
7813 pf->num_iwarp_msix);
7814
7815 return v_actual;
7816 }
7817
7818 /**
7819 * i40e_vsi_alloc_q_vector - Allocate memory for a single interrupt vector
7820 * @vsi: the VSI being configured
7821 * @v_idx: index of the vector in the vsi struct
7822 * @cpu: cpu to be used on affinity_mask
7823 *
7824 * We allocate one q_vector. If allocation fails we return -ENOMEM.
7825 **/
7826 static int i40e_vsi_alloc_q_vector(struct i40e_vsi *vsi, int v_idx, int cpu)
7827 {
7828 struct i40e_q_vector *q_vector;
7829
7830 /* allocate q_vector */
7831 q_vector = kzalloc(sizeof(struct i40e_q_vector), GFP_KERNEL);
7832 if (!q_vector)
7833 return -ENOMEM;
7834
7835 q_vector->vsi = vsi;
7836 q_vector->v_idx = v_idx;
7837 cpumask_set_cpu(cpu, &q_vector->affinity_mask);
7838
7839 if (vsi->netdev)
7840 netif_napi_add(vsi->netdev, &q_vector->napi,
7841 i40e_napi_poll, NAPI_POLL_WEIGHT);
7842
7843 q_vector->rx.latency_range = I40E_LOW_LATENCY;
7844 q_vector->tx.latency_range = I40E_LOW_LATENCY;
7845
7846 /* tie q_vector and vsi together */
7847 vsi->q_vectors[v_idx] = q_vector;
7848
7849 return 0;
7850 }
7851
7852 /**
7853 * i40e_vsi_alloc_q_vectors - Allocate memory for interrupt vectors
7854 * @vsi: the VSI being configured
7855 *
7856 * We allocate one q_vector per queue interrupt. If allocation fails we
7857 * return -ENOMEM.
7858 **/
7859 static int i40e_vsi_alloc_q_vectors(struct i40e_vsi *vsi)
7860 {
7861 struct i40e_pf *pf = vsi->back;
7862 int err, v_idx, num_q_vectors, current_cpu;
7863
7864 /* if not MSIX, give the one vector only to the LAN VSI */
7865 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
7866 num_q_vectors = vsi->num_q_vectors;
7867 else if (vsi == pf->vsi[pf->lan_vsi])
7868 num_q_vectors = 1;
7869 else
7870 return -EINVAL;
7871
7872 current_cpu = cpumask_first(cpu_online_mask);
7873
7874 for (v_idx = 0; v_idx < num_q_vectors; v_idx++) {
7875 err = i40e_vsi_alloc_q_vector(vsi, v_idx, current_cpu);
7876 if (err)
7877 goto err_out;
7878 current_cpu = cpumask_next(current_cpu, cpu_online_mask);
7879 if (unlikely(current_cpu >= nr_cpu_ids))
7880 current_cpu = cpumask_first(cpu_online_mask);
7881 }
7882
7883 return 0;
7884
7885 err_out:
7886 while (v_idx--)
7887 i40e_free_q_vector(vsi, v_idx);
7888
7889 return err;
7890 }
7891
7892 /**
7893 * i40e_init_interrupt_scheme - Determine proper interrupt scheme
7894 * @pf: board private structure to initialize
7895 **/
7896 static int i40e_init_interrupt_scheme(struct i40e_pf *pf)
7897 {
7898 int vectors = 0;
7899 ssize_t size;
7900
7901 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
7902 vectors = i40e_init_msix(pf);
7903 if (vectors < 0) {
7904 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED |
7905 I40E_FLAG_IWARP_ENABLED |
7906 #ifdef I40E_FCOE
7907 I40E_FLAG_FCOE_ENABLED |
7908 #endif
7909 I40E_FLAG_RSS_ENABLED |
7910 I40E_FLAG_DCB_CAPABLE |
7911 I40E_FLAG_DCB_ENABLED |
7912 I40E_FLAG_SRIOV_ENABLED |
7913 I40E_FLAG_FD_SB_ENABLED |
7914 I40E_FLAG_FD_ATR_ENABLED |
7915 I40E_FLAG_VMDQ_ENABLED);
7916
7917 /* rework the queue expectations without MSIX */
7918 i40e_determine_queue_usage(pf);
7919 }
7920 }
7921
7922 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED) &&
7923 (pf->flags & I40E_FLAG_MSI_ENABLED)) {
7924 dev_info(&pf->pdev->dev, "MSI-X not available, trying MSI\n");
7925 vectors = pci_enable_msi(pf->pdev);
7926 if (vectors < 0) {
7927 dev_info(&pf->pdev->dev, "MSI init failed - %d\n",
7928 vectors);
7929 pf->flags &= ~I40E_FLAG_MSI_ENABLED;
7930 }
7931 vectors = 1; /* one MSI or Legacy vector */
7932 }
7933
7934 if (!(pf->flags & (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED)))
7935 dev_info(&pf->pdev->dev, "MSI-X and MSI not available, falling back to Legacy IRQ\n");
7936
7937 /* set up vector assignment tracking */
7938 size = sizeof(struct i40e_lump_tracking) + (sizeof(u16) * vectors);
7939 pf->irq_pile = kzalloc(size, GFP_KERNEL);
7940 if (!pf->irq_pile) {
7941 dev_err(&pf->pdev->dev, "error allocating irq_pile memory\n");
7942 return -ENOMEM;
7943 }
7944 pf->irq_pile->num_entries = vectors;
7945 pf->irq_pile->search_hint = 0;
7946
7947 /* track first vector for misc interrupts, ignore return */
7948 (void)i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT - 1);
7949
7950 return 0;
7951 }
7952
7953 /**
7954 * i40e_setup_misc_vector - Setup the misc vector to handle non queue events
7955 * @pf: board private structure
7956 *
7957 * This sets up the handler for MSIX 0, which is used to manage the
7958 * non-queue interrupts, e.g. AdminQ and errors. This is not used
7959 * when in MSI or Legacy interrupt mode.
7960 **/
7961 static int i40e_setup_misc_vector(struct i40e_pf *pf)
7962 {
7963 struct i40e_hw *hw = &pf->hw;
7964 int err = 0;
7965
7966 /* Only request the irq if this is the first time through, and
7967 * not when we're rebuilding after a Reset
7968 */
7969 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
7970 err = request_irq(pf->msix_entries[0].vector,
7971 i40e_intr, 0, pf->int_name, pf);
7972 if (err) {
7973 dev_info(&pf->pdev->dev,
7974 "request_irq for %s failed: %d\n",
7975 pf->int_name, err);
7976 return -EFAULT;
7977 }
7978 }
7979
7980 i40e_enable_misc_int_causes(pf);
7981
7982 /* associate no queues to the misc vector */
7983 wr32(hw, I40E_PFINT_LNKLST0, I40E_QUEUE_END_OF_LIST);
7984 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), I40E_ITR_8K);
7985
7986 i40e_flush(hw);
7987
7988 i40e_irq_dynamic_enable_icr0(pf, true);
7989
7990 return err;
7991 }
7992
7993 /**
7994 * i40e_config_rss_aq - Prepare for RSS using AQ commands
7995 * @vsi: vsi structure
7996 * @seed: RSS hash seed
7997 **/
7998 static int i40e_config_rss_aq(struct i40e_vsi *vsi, const u8 *seed,
7999 u8 *lut, u16 lut_size)
8000 {
8001 struct i40e_pf *pf = vsi->back;
8002 struct i40e_hw *hw = &pf->hw;
8003 int ret = 0;
8004
8005 if (seed) {
8006 struct i40e_aqc_get_set_rss_key_data *seed_dw =
8007 (struct i40e_aqc_get_set_rss_key_data *)seed;
8008 ret = i40e_aq_set_rss_key(hw, vsi->id, seed_dw);
8009 if (ret) {
8010 dev_info(&pf->pdev->dev,
8011 "Cannot set RSS key, err %s aq_err %s\n",
8012 i40e_stat_str(hw, ret),
8013 i40e_aq_str(hw, hw->aq.asq_last_status));
8014 return ret;
8015 }
8016 }
8017 if (lut) {
8018 bool pf_lut = vsi->type == I40E_VSI_MAIN ? true : false;
8019
8020 ret = i40e_aq_set_rss_lut(hw, vsi->id, pf_lut, lut, lut_size);
8021 if (ret) {
8022 dev_info(&pf->pdev->dev,
8023 "Cannot set RSS lut, err %s aq_err %s\n",
8024 i40e_stat_str(hw, ret),
8025 i40e_aq_str(hw, hw->aq.asq_last_status));
8026 return ret;
8027 }
8028 }
8029 return ret;
8030 }
8031
8032 /**
8033 * i40e_get_rss_aq - Get RSS keys and lut by using AQ commands
8034 * @vsi: Pointer to vsi structure
8035 * @seed: Buffter to store the hash keys
8036 * @lut: Buffer to store the lookup table entries
8037 * @lut_size: Size of buffer to store the lookup table entries
8038 *
8039 * Return 0 on success, negative on failure
8040 */
8041 static int i40e_get_rss_aq(struct i40e_vsi *vsi, const u8 *seed,
8042 u8 *lut, u16 lut_size)
8043 {
8044 struct i40e_pf *pf = vsi->back;
8045 struct i40e_hw *hw = &pf->hw;
8046 int ret = 0;
8047
8048 if (seed) {
8049 ret = i40e_aq_get_rss_key(hw, vsi->id,
8050 (struct i40e_aqc_get_set_rss_key_data *)seed);
8051 if (ret) {
8052 dev_info(&pf->pdev->dev,
8053 "Cannot get RSS key, err %s aq_err %s\n",
8054 i40e_stat_str(&pf->hw, ret),
8055 i40e_aq_str(&pf->hw,
8056 pf->hw.aq.asq_last_status));
8057 return ret;
8058 }
8059 }
8060
8061 if (lut) {
8062 bool pf_lut = vsi->type == I40E_VSI_MAIN ? true : false;
8063
8064 ret = i40e_aq_get_rss_lut(hw, vsi->id, pf_lut, lut, lut_size);
8065 if (ret) {
8066 dev_info(&pf->pdev->dev,
8067 "Cannot get RSS lut, err %s aq_err %s\n",
8068 i40e_stat_str(&pf->hw, ret),
8069 i40e_aq_str(&pf->hw,
8070 pf->hw.aq.asq_last_status));
8071 return ret;
8072 }
8073 }
8074
8075 return ret;
8076 }
8077
8078 /**
8079 * i40e_vsi_config_rss - Prepare for VSI(VMDq) RSS if used
8080 * @vsi: VSI structure
8081 **/
8082 static int i40e_vsi_config_rss(struct i40e_vsi *vsi)
8083 {
8084 u8 seed[I40E_HKEY_ARRAY_SIZE];
8085 struct i40e_pf *pf = vsi->back;
8086 u8 *lut;
8087 int ret;
8088
8089 if (!(pf->flags & I40E_FLAG_RSS_AQ_CAPABLE))
8090 return 0;
8091
8092 if (!vsi->rss_size)
8093 vsi->rss_size = min_t(int, pf->alloc_rss_size,
8094 vsi->num_queue_pairs);
8095 if (!vsi->rss_size)
8096 return -EINVAL;
8097
8098 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
8099 if (!lut)
8100 return -ENOMEM;
8101 /* Use the user configured hash keys and lookup table if there is one,
8102 * otherwise use default
8103 */
8104 if (vsi->rss_lut_user)
8105 memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size);
8106 else
8107 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, vsi->rss_size);
8108 if (vsi->rss_hkey_user)
8109 memcpy(seed, vsi->rss_hkey_user, I40E_HKEY_ARRAY_SIZE);
8110 else
8111 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
8112 ret = i40e_config_rss_aq(vsi, seed, lut, vsi->rss_table_size);
8113 kfree(lut);
8114
8115 return ret;
8116 }
8117
8118 /**
8119 * i40e_config_rss_reg - Configure RSS keys and lut by writing registers
8120 * @vsi: Pointer to vsi structure
8121 * @seed: RSS hash seed
8122 * @lut: Lookup table
8123 * @lut_size: Lookup table size
8124 *
8125 * Returns 0 on success, negative on failure
8126 **/
8127 static int i40e_config_rss_reg(struct i40e_vsi *vsi, const u8 *seed,
8128 const u8 *lut, u16 lut_size)
8129 {
8130 struct i40e_pf *pf = vsi->back;
8131 struct i40e_hw *hw = &pf->hw;
8132 u16 vf_id = vsi->vf_id;
8133 u8 i;
8134
8135 /* Fill out hash function seed */
8136 if (seed) {
8137 u32 *seed_dw = (u32 *)seed;
8138
8139 if (vsi->type == I40E_VSI_MAIN) {
8140 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
8141 i40e_write_rx_ctl(hw, I40E_PFQF_HKEY(i),
8142 seed_dw[i]);
8143 } else if (vsi->type == I40E_VSI_SRIOV) {
8144 for (i = 0; i <= I40E_VFQF_HKEY1_MAX_INDEX; i++)
8145 i40e_write_rx_ctl(hw,
8146 I40E_VFQF_HKEY1(i, vf_id),
8147 seed_dw[i]);
8148 } else {
8149 dev_err(&pf->pdev->dev, "Cannot set RSS seed - invalid VSI type\n");
8150 }
8151 }
8152
8153 if (lut) {
8154 u32 *lut_dw = (u32 *)lut;
8155
8156 if (vsi->type == I40E_VSI_MAIN) {
8157 if (lut_size != I40E_HLUT_ARRAY_SIZE)
8158 return -EINVAL;
8159 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
8160 wr32(hw, I40E_PFQF_HLUT(i), lut_dw[i]);
8161 } else if (vsi->type == I40E_VSI_SRIOV) {
8162 if (lut_size != I40E_VF_HLUT_ARRAY_SIZE)
8163 return -EINVAL;
8164 for (i = 0; i <= I40E_VFQF_HLUT_MAX_INDEX; i++)
8165 i40e_write_rx_ctl(hw,
8166 I40E_VFQF_HLUT1(i, vf_id),
8167 lut_dw[i]);
8168 } else {
8169 dev_err(&pf->pdev->dev, "Cannot set RSS LUT - invalid VSI type\n");
8170 }
8171 }
8172 i40e_flush(hw);
8173
8174 return 0;
8175 }
8176
8177 /**
8178 * i40e_get_rss_reg - Get the RSS keys and lut by reading registers
8179 * @vsi: Pointer to VSI structure
8180 * @seed: Buffer to store the keys
8181 * @lut: Buffer to store the lookup table entries
8182 * @lut_size: Size of buffer to store the lookup table entries
8183 *
8184 * Returns 0 on success, negative on failure
8185 */
8186 static int i40e_get_rss_reg(struct i40e_vsi *vsi, u8 *seed,
8187 u8 *lut, u16 lut_size)
8188 {
8189 struct i40e_pf *pf = vsi->back;
8190 struct i40e_hw *hw = &pf->hw;
8191 u16 i;
8192
8193 if (seed) {
8194 u32 *seed_dw = (u32 *)seed;
8195
8196 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
8197 seed_dw[i] = i40e_read_rx_ctl(hw, I40E_PFQF_HKEY(i));
8198 }
8199 if (lut) {
8200 u32 *lut_dw = (u32 *)lut;
8201
8202 if (lut_size != I40E_HLUT_ARRAY_SIZE)
8203 return -EINVAL;
8204 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
8205 lut_dw[i] = rd32(hw, I40E_PFQF_HLUT(i));
8206 }
8207
8208 return 0;
8209 }
8210
8211 /**
8212 * i40e_config_rss - Configure RSS keys and lut
8213 * @vsi: Pointer to VSI structure
8214 * @seed: RSS hash seed
8215 * @lut: Lookup table
8216 * @lut_size: Lookup table size
8217 *
8218 * Returns 0 on success, negative on failure
8219 */
8220 int i40e_config_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size)
8221 {
8222 struct i40e_pf *pf = vsi->back;
8223
8224 if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE)
8225 return i40e_config_rss_aq(vsi, seed, lut, lut_size);
8226 else
8227 return i40e_config_rss_reg(vsi, seed, lut, lut_size);
8228 }
8229
8230 /**
8231 * i40e_get_rss - Get RSS keys and lut
8232 * @vsi: Pointer to VSI structure
8233 * @seed: Buffer to store the keys
8234 * @lut: Buffer to store the lookup table entries
8235 * lut_size: Size of buffer to store the lookup table entries
8236 *
8237 * Returns 0 on success, negative on failure
8238 */
8239 int i40e_get_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size)
8240 {
8241 struct i40e_pf *pf = vsi->back;
8242
8243 if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE)
8244 return i40e_get_rss_aq(vsi, seed, lut, lut_size);
8245 else
8246 return i40e_get_rss_reg(vsi, seed, lut, lut_size);
8247 }
8248
8249 /**
8250 * i40e_fill_rss_lut - Fill the RSS lookup table with default values
8251 * @pf: Pointer to board private structure
8252 * @lut: Lookup table
8253 * @rss_table_size: Lookup table size
8254 * @rss_size: Range of queue number for hashing
8255 */
8256 void i40e_fill_rss_lut(struct i40e_pf *pf, u8 *lut,
8257 u16 rss_table_size, u16 rss_size)
8258 {
8259 u16 i;
8260
8261 for (i = 0; i < rss_table_size; i++)
8262 lut[i] = i % rss_size;
8263 }
8264
8265 /**
8266 * i40e_pf_config_rss - Prepare for RSS if used
8267 * @pf: board private structure
8268 **/
8269 static int i40e_pf_config_rss(struct i40e_pf *pf)
8270 {
8271 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
8272 u8 seed[I40E_HKEY_ARRAY_SIZE];
8273 u8 *lut;
8274 struct i40e_hw *hw = &pf->hw;
8275 u32 reg_val;
8276 u64 hena;
8277 int ret;
8278
8279 /* By default we enable TCP/UDP with IPv4/IPv6 ptypes */
8280 hena = (u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(0)) |
8281 ((u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(1)) << 32);
8282 hena |= i40e_pf_get_default_rss_hena(pf);
8283
8284 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), (u32)hena);
8285 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));
8286
8287 /* Determine the RSS table size based on the hardware capabilities */
8288 reg_val = i40e_read_rx_ctl(hw, I40E_PFQF_CTL_0);
8289 reg_val = (pf->rss_table_size == 512) ?
8290 (reg_val | I40E_PFQF_CTL_0_HASHLUTSIZE_512) :
8291 (reg_val & ~I40E_PFQF_CTL_0_HASHLUTSIZE_512);
8292 i40e_write_rx_ctl(hw, I40E_PFQF_CTL_0, reg_val);
8293
8294 /* Determine the RSS size of the VSI */
8295 if (!vsi->rss_size)
8296 vsi->rss_size = min_t(int, pf->alloc_rss_size,
8297 vsi->num_queue_pairs);
8298 if (!vsi->rss_size)
8299 return -EINVAL;
8300
8301 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
8302 if (!lut)
8303 return -ENOMEM;
8304
8305 /* Use user configured lut if there is one, otherwise use default */
8306 if (vsi->rss_lut_user)
8307 memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size);
8308 else
8309 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, vsi->rss_size);
8310
8311 /* Use user configured hash key if there is one, otherwise
8312 * use default.
8313 */
8314 if (vsi->rss_hkey_user)
8315 memcpy(seed, vsi->rss_hkey_user, I40E_HKEY_ARRAY_SIZE);
8316 else
8317 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
8318 ret = i40e_config_rss(vsi, seed, lut, vsi->rss_table_size);
8319 kfree(lut);
8320
8321 return ret;
8322 }
8323
8324 /**
8325 * i40e_reconfig_rss_queues - change number of queues for rss and rebuild
8326 * @pf: board private structure
8327 * @queue_count: the requested queue count for rss.
8328 *
8329 * returns 0 if rss is not enabled, if enabled returns the final rss queue
8330 * count which may be different from the requested queue count.
8331 **/
8332 int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count)
8333 {
8334 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
8335 int new_rss_size;
8336
8337 if (!(pf->flags & I40E_FLAG_RSS_ENABLED))
8338 return 0;
8339
8340 new_rss_size = min_t(int, queue_count, pf->rss_size_max);
8341
8342 if (queue_count != vsi->num_queue_pairs) {
8343 vsi->req_queue_pairs = queue_count;
8344 i40e_prep_for_reset(pf);
8345
8346 pf->alloc_rss_size = new_rss_size;
8347
8348 i40e_reset_and_rebuild(pf, true);
8349
8350 /* Discard the user configured hash keys and lut, if less
8351 * queues are enabled.
8352 */
8353 if (queue_count < vsi->rss_size) {
8354 i40e_clear_rss_config_user(vsi);
8355 dev_dbg(&pf->pdev->dev,
8356 "discard user configured hash keys and lut\n");
8357 }
8358
8359 /* Reset vsi->rss_size, as number of enabled queues changed */
8360 vsi->rss_size = min_t(int, pf->alloc_rss_size,
8361 vsi->num_queue_pairs);
8362
8363 i40e_pf_config_rss(pf);
8364 }
8365 dev_info(&pf->pdev->dev, "RSS count/HW max RSS count: %d/%d\n",
8366 pf->alloc_rss_size, pf->rss_size_max);
8367 return pf->alloc_rss_size;
8368 }
8369
8370 /**
8371 * i40e_get_npar_bw_setting - Retrieve BW settings for this PF partition
8372 * @pf: board private structure
8373 **/
8374 i40e_status i40e_get_npar_bw_setting(struct i40e_pf *pf)
8375 {
8376 i40e_status status;
8377 bool min_valid, max_valid;
8378 u32 max_bw, min_bw;
8379
8380 status = i40e_read_bw_from_alt_ram(&pf->hw, &max_bw, &min_bw,
8381 &min_valid, &max_valid);
8382
8383 if (!status) {
8384 if (min_valid)
8385 pf->npar_min_bw = min_bw;
8386 if (max_valid)
8387 pf->npar_max_bw = max_bw;
8388 }
8389
8390 return status;
8391 }
8392
8393 /**
8394 * i40e_set_npar_bw_setting - Set BW settings for this PF partition
8395 * @pf: board private structure
8396 **/
8397 i40e_status i40e_set_npar_bw_setting(struct i40e_pf *pf)
8398 {
8399 struct i40e_aqc_configure_partition_bw_data bw_data;
8400 i40e_status status;
8401
8402 /* Set the valid bit for this PF */
8403 bw_data.pf_valid_bits = cpu_to_le16(BIT(pf->hw.pf_id));
8404 bw_data.max_bw[pf->hw.pf_id] = pf->npar_max_bw & I40E_ALT_BW_VALUE_MASK;
8405 bw_data.min_bw[pf->hw.pf_id] = pf->npar_min_bw & I40E_ALT_BW_VALUE_MASK;
8406
8407 /* Set the new bandwidths */
8408 status = i40e_aq_configure_partition_bw(&pf->hw, &bw_data, NULL);
8409
8410 return status;
8411 }
8412
8413 /**
8414 * i40e_commit_npar_bw_setting - Commit BW settings for this PF partition
8415 * @pf: board private structure
8416 **/
8417 i40e_status i40e_commit_npar_bw_setting(struct i40e_pf *pf)
8418 {
8419 /* Commit temporary BW setting to permanent NVM image */
8420 enum i40e_admin_queue_err last_aq_status;
8421 i40e_status ret;
8422 u16 nvm_word;
8423
8424 if (pf->hw.partition_id != 1) {
8425 dev_info(&pf->pdev->dev,
8426 "Commit BW only works on partition 1! This is partition %d",
8427 pf->hw.partition_id);
8428 ret = I40E_NOT_SUPPORTED;
8429 goto bw_commit_out;
8430 }
8431
8432 /* Acquire NVM for read access */
8433 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_READ);
8434 last_aq_status = pf->hw.aq.asq_last_status;
8435 if (ret) {
8436 dev_info(&pf->pdev->dev,
8437 "Cannot acquire NVM for read access, err %s aq_err %s\n",
8438 i40e_stat_str(&pf->hw, ret),
8439 i40e_aq_str(&pf->hw, last_aq_status));
8440 goto bw_commit_out;
8441 }
8442
8443 /* Read word 0x10 of NVM - SW compatibility word 1 */
8444 ret = i40e_aq_read_nvm(&pf->hw,
8445 I40E_SR_NVM_CONTROL_WORD,
8446 0x10, sizeof(nvm_word), &nvm_word,
8447 false, NULL);
8448 /* Save off last admin queue command status before releasing
8449 * the NVM
8450 */
8451 last_aq_status = pf->hw.aq.asq_last_status;
8452 i40e_release_nvm(&pf->hw);
8453 if (ret) {
8454 dev_info(&pf->pdev->dev, "NVM read error, err %s aq_err %s\n",
8455 i40e_stat_str(&pf->hw, ret),
8456 i40e_aq_str(&pf->hw, last_aq_status));
8457 goto bw_commit_out;
8458 }
8459
8460 /* Wait a bit for NVM release to complete */
8461 msleep(50);
8462
8463 /* Acquire NVM for write access */
8464 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_WRITE);
8465 last_aq_status = pf->hw.aq.asq_last_status;
8466 if (ret) {
8467 dev_info(&pf->pdev->dev,
8468 "Cannot acquire NVM for write access, err %s aq_err %s\n",
8469 i40e_stat_str(&pf->hw, ret),
8470 i40e_aq_str(&pf->hw, last_aq_status));
8471 goto bw_commit_out;
8472 }
8473 /* Write it back out unchanged to initiate update NVM,
8474 * which will force a write of the shadow (alt) RAM to
8475 * the NVM - thus storing the bandwidth values permanently.
8476 */
8477 ret = i40e_aq_update_nvm(&pf->hw,
8478 I40E_SR_NVM_CONTROL_WORD,
8479 0x10, sizeof(nvm_word),
8480 &nvm_word, true, NULL);
8481 /* Save off last admin queue command status before releasing
8482 * the NVM
8483 */
8484 last_aq_status = pf->hw.aq.asq_last_status;
8485 i40e_release_nvm(&pf->hw);
8486 if (ret)
8487 dev_info(&pf->pdev->dev,
8488 "BW settings NOT SAVED, err %s aq_err %s\n",
8489 i40e_stat_str(&pf->hw, ret),
8490 i40e_aq_str(&pf->hw, last_aq_status));
8491 bw_commit_out:
8492
8493 return ret;
8494 }
8495
8496 /**
8497 * i40e_sw_init - Initialize general software structures (struct i40e_pf)
8498 * @pf: board private structure to initialize
8499 *
8500 * i40e_sw_init initializes the Adapter private data structure.
8501 * Fields are initialized based on PCI device information and
8502 * OS network device settings (MTU size).
8503 **/
8504 static int i40e_sw_init(struct i40e_pf *pf)
8505 {
8506 int err = 0;
8507 int size;
8508
8509 pf->msg_enable = netif_msg_init(I40E_DEFAULT_MSG_ENABLE,
8510 (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK));
8511 if (debug != -1 && debug != I40E_DEFAULT_MSG_ENABLE) {
8512 if (I40E_DEBUG_USER & debug)
8513 pf->hw.debug_mask = debug;
8514 pf->msg_enable = netif_msg_init((debug & ~I40E_DEBUG_USER),
8515 I40E_DEFAULT_MSG_ENABLE);
8516 }
8517
8518 /* Set default capability flags */
8519 pf->flags = I40E_FLAG_RX_CSUM_ENABLED |
8520 I40E_FLAG_MSI_ENABLED |
8521 I40E_FLAG_MSIX_ENABLED;
8522
8523 /* Set default ITR */
8524 pf->rx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_RX_DEF;
8525 pf->tx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_TX_DEF;
8526
8527 /* Depending on PF configurations, it is possible that the RSS
8528 * maximum might end up larger than the available queues
8529 */
8530 pf->rss_size_max = BIT(pf->hw.func_caps.rss_table_entry_width);
8531 pf->alloc_rss_size = 1;
8532 pf->rss_table_size = pf->hw.func_caps.rss_table_size;
8533 pf->rss_size_max = min_t(int, pf->rss_size_max,
8534 pf->hw.func_caps.num_tx_qp);
8535 if (pf->hw.func_caps.rss) {
8536 pf->flags |= I40E_FLAG_RSS_ENABLED;
8537 pf->alloc_rss_size = min_t(int, pf->rss_size_max,
8538 num_online_cpus());
8539 }
8540
8541 /* MFP mode enabled */
8542 if (pf->hw.func_caps.npar_enable || pf->hw.func_caps.flex10_enable) {
8543 pf->flags |= I40E_FLAG_MFP_ENABLED;
8544 dev_info(&pf->pdev->dev, "MFP mode Enabled\n");
8545 if (i40e_get_npar_bw_setting(pf))
8546 dev_warn(&pf->pdev->dev,
8547 "Could not get NPAR bw settings\n");
8548 else
8549 dev_info(&pf->pdev->dev,
8550 "Min BW = %8.8x, Max BW = %8.8x\n",
8551 pf->npar_min_bw, pf->npar_max_bw);
8552 }
8553
8554 /* FW/NVM is not yet fixed in this regard */
8555 if ((pf->hw.func_caps.fd_filters_guaranteed > 0) ||
8556 (pf->hw.func_caps.fd_filters_best_effort > 0)) {
8557 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
8558 pf->atr_sample_rate = I40E_DEFAULT_ATR_SAMPLE_RATE;
8559 if (pf->flags & I40E_FLAG_MFP_ENABLED &&
8560 pf->hw.num_partitions > 1)
8561 dev_info(&pf->pdev->dev,
8562 "Flow Director Sideband mode Disabled in MFP mode\n");
8563 else
8564 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
8565 pf->fdir_pf_filter_count =
8566 pf->hw.func_caps.fd_filters_guaranteed;
8567 pf->hw.fdir_shared_filter_count =
8568 pf->hw.func_caps.fd_filters_best_effort;
8569 }
8570
8571 if (i40e_is_mac_710(&pf->hw) &&
8572 (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
8573 (pf->hw.aq.fw_maj_ver < 4))) {
8574 pf->flags |= I40E_FLAG_RESTART_AUTONEG;
8575 /* No DCB support for FW < v4.33 */
8576 pf->flags |= I40E_FLAG_NO_DCB_SUPPORT;
8577 }
8578
8579 /* Disable FW LLDP if FW < v4.3 */
8580 if (i40e_is_mac_710(&pf->hw) &&
8581 (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 3)) ||
8582 (pf->hw.aq.fw_maj_ver < 4)))
8583 pf->flags |= I40E_FLAG_STOP_FW_LLDP;
8584
8585 /* Use the FW Set LLDP MIB API if FW > v4.40 */
8586 if (i40e_is_mac_710(&pf->hw) &&
8587 (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver >= 40)) ||
8588 (pf->hw.aq.fw_maj_ver >= 5)))
8589 pf->flags |= I40E_FLAG_USE_SET_LLDP_MIB;
8590
8591 if (pf->hw.func_caps.vmdq) {
8592 pf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI;
8593 pf->flags |= I40E_FLAG_VMDQ_ENABLED;
8594 pf->num_vmdq_qps = i40e_default_queues_per_vmdq(pf);
8595 }
8596
8597 if (pf->hw.func_caps.iwarp) {
8598 pf->flags |= I40E_FLAG_IWARP_ENABLED;
8599 /* IWARP needs one extra vector for CQP just like MISC.*/
8600 pf->num_iwarp_msix = (int)num_online_cpus() + 1;
8601 }
8602
8603 #ifdef I40E_FCOE
8604 i40e_init_pf_fcoe(pf);
8605
8606 #endif /* I40E_FCOE */
8607 #ifdef CONFIG_PCI_IOV
8608 if (pf->hw.func_caps.num_vfs && pf->hw.partition_id == 1) {
8609 pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF;
8610 pf->flags |= I40E_FLAG_SRIOV_ENABLED;
8611 pf->num_req_vfs = min_t(int,
8612 pf->hw.func_caps.num_vfs,
8613 I40E_MAX_VF_COUNT);
8614 }
8615 #endif /* CONFIG_PCI_IOV */
8616 if (pf->hw.mac.type == I40E_MAC_X722) {
8617 pf->flags |= I40E_FLAG_RSS_AQ_CAPABLE |
8618 I40E_FLAG_128_QP_RSS_CAPABLE |
8619 I40E_FLAG_HW_ATR_EVICT_CAPABLE |
8620 I40E_FLAG_OUTER_UDP_CSUM_CAPABLE |
8621 I40E_FLAG_WB_ON_ITR_CAPABLE |
8622 I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE |
8623 I40E_FLAG_NO_PCI_LINK_CHECK |
8624 I40E_FLAG_USE_SET_LLDP_MIB |
8625 I40E_FLAG_GENEVE_OFFLOAD_CAPABLE;
8626 } else if ((pf->hw.aq.api_maj_ver > 1) ||
8627 ((pf->hw.aq.api_maj_ver == 1) &&
8628 (pf->hw.aq.api_min_ver > 4))) {
8629 /* Supported in FW API version higher than 1.4 */
8630 pf->flags |= I40E_FLAG_GENEVE_OFFLOAD_CAPABLE;
8631 pf->auto_disable_flags = I40E_FLAG_HW_ATR_EVICT_CAPABLE;
8632 } else {
8633 pf->auto_disable_flags = I40E_FLAG_HW_ATR_EVICT_CAPABLE;
8634 }
8635
8636 pf->eeprom_version = 0xDEAD;
8637 pf->lan_veb = I40E_NO_VEB;
8638 pf->lan_vsi = I40E_NO_VSI;
8639
8640 /* By default FW has this off for performance reasons */
8641 pf->flags &= ~I40E_FLAG_VEB_STATS_ENABLED;
8642
8643 /* set up queue assignment tracking */
8644 size = sizeof(struct i40e_lump_tracking)
8645 + (sizeof(u16) * pf->hw.func_caps.num_tx_qp);
8646 pf->qp_pile = kzalloc(size, GFP_KERNEL);
8647 if (!pf->qp_pile) {
8648 err = -ENOMEM;
8649 goto sw_init_done;
8650 }
8651 pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp;
8652 pf->qp_pile->search_hint = 0;
8653
8654 pf->tx_timeout_recovery_level = 1;
8655
8656 mutex_init(&pf->switch_mutex);
8657
8658 /* If NPAR is enabled nudge the Tx scheduler */
8659 if (pf->hw.func_caps.npar_enable && (!i40e_get_npar_bw_setting(pf)))
8660 i40e_set_npar_bw_setting(pf);
8661
8662 sw_init_done:
8663 return err;
8664 }
8665
8666 /**
8667 * i40e_set_ntuple - set the ntuple feature flag and take action
8668 * @pf: board private structure to initialize
8669 * @features: the feature set that the stack is suggesting
8670 *
8671 * returns a bool to indicate if reset needs to happen
8672 **/
8673 bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features)
8674 {
8675 bool need_reset = false;
8676
8677 /* Check if Flow Director n-tuple support was enabled or disabled. If
8678 * the state changed, we need to reset.
8679 */
8680 if (features & NETIF_F_NTUPLE) {
8681 /* Enable filters and mark for reset */
8682 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
8683 need_reset = true;
8684 /* enable FD_SB only if there is MSI-X vector */
8685 if (pf->num_fdsb_msix > 0)
8686 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
8687 } else {
8688 /* turn off filters, mark for reset and clear SW filter list */
8689 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
8690 need_reset = true;
8691 i40e_fdir_filter_exit(pf);
8692 }
8693 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
8694 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
8695 /* reset fd counters */
8696 pf->fd_add_err = pf->fd_atr_cnt = pf->fd_tcp_rule = 0;
8697 pf->fdir_pf_active_filters = 0;
8698 /* if ATR was auto disabled it can be re-enabled. */
8699 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
8700 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED)) {
8701 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
8702 if (I40E_DEBUG_FD & pf->hw.debug_mask)
8703 dev_info(&pf->pdev->dev, "ATR re-enabled.\n");
8704 }
8705 }
8706 return need_reset;
8707 }
8708
8709 /**
8710 * i40e_clear_rss_lut - clear the rx hash lookup table
8711 * @vsi: the VSI being configured
8712 **/
8713 static void i40e_clear_rss_lut(struct i40e_vsi *vsi)
8714 {
8715 struct i40e_pf *pf = vsi->back;
8716 struct i40e_hw *hw = &pf->hw;
8717 u16 vf_id = vsi->vf_id;
8718 u8 i;
8719
8720 if (vsi->type == I40E_VSI_MAIN) {
8721 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
8722 wr32(hw, I40E_PFQF_HLUT(i), 0);
8723 } else if (vsi->type == I40E_VSI_SRIOV) {
8724 for (i = 0; i <= I40E_VFQF_HLUT_MAX_INDEX; i++)
8725 i40e_write_rx_ctl(hw, I40E_VFQF_HLUT1(i, vf_id), 0);
8726 } else {
8727 dev_err(&pf->pdev->dev, "Cannot set RSS LUT - invalid VSI type\n");
8728 }
8729 }
8730
8731 /**
8732 * i40e_set_features - set the netdev feature flags
8733 * @netdev: ptr to the netdev being adjusted
8734 * @features: the feature set that the stack is suggesting
8735 **/
8736 static int i40e_set_features(struct net_device *netdev,
8737 netdev_features_t features)
8738 {
8739 struct i40e_netdev_priv *np = netdev_priv(netdev);
8740 struct i40e_vsi *vsi = np->vsi;
8741 struct i40e_pf *pf = vsi->back;
8742 bool need_reset;
8743
8744 if (features & NETIF_F_RXHASH && !(netdev->features & NETIF_F_RXHASH))
8745 i40e_pf_config_rss(pf);
8746 else if (!(features & NETIF_F_RXHASH) &&
8747 netdev->features & NETIF_F_RXHASH)
8748 i40e_clear_rss_lut(vsi);
8749
8750 if (features & NETIF_F_HW_VLAN_CTAG_RX)
8751 i40e_vlan_stripping_enable(vsi);
8752 else
8753 i40e_vlan_stripping_disable(vsi);
8754
8755 need_reset = i40e_set_ntuple(pf, features);
8756
8757 if (need_reset)
8758 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
8759
8760 return 0;
8761 }
8762
8763 /**
8764 * i40e_get_udp_port_idx - Lookup a possibly offloaded for Rx UDP port
8765 * @pf: board private structure
8766 * @port: The UDP port to look up
8767 *
8768 * Returns the index number or I40E_MAX_PF_UDP_OFFLOAD_PORTS if port not found
8769 **/
8770 static u8 i40e_get_udp_port_idx(struct i40e_pf *pf, __be16 port)
8771 {
8772 u8 i;
8773
8774 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
8775 if (pf->udp_ports[i].index == port)
8776 return i;
8777 }
8778
8779 return i;
8780 }
8781
8782 /**
8783 * i40e_udp_tunnel_add - Get notifications about UDP tunnel ports that come up
8784 * @netdev: This physical port's netdev
8785 * @ti: Tunnel endpoint information
8786 **/
8787 static void i40e_udp_tunnel_add(struct net_device *netdev,
8788 struct udp_tunnel_info *ti)
8789 {
8790 struct i40e_netdev_priv *np = netdev_priv(netdev);
8791 struct i40e_vsi *vsi = np->vsi;
8792 struct i40e_pf *pf = vsi->back;
8793 __be16 port = ti->port;
8794 u8 next_idx;
8795 u8 idx;
8796
8797 idx = i40e_get_udp_port_idx(pf, port);
8798
8799 /* Check if port already exists */
8800 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8801 netdev_info(netdev, "port %d already offloaded\n",
8802 ntohs(port));
8803 return;
8804 }
8805
8806 /* Now check if there is space to add the new port */
8807 next_idx = i40e_get_udp_port_idx(pf, 0);
8808
8809 if (next_idx == I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8810 netdev_info(netdev, "maximum number of offloaded UDP ports reached, not adding port %d\n",
8811 ntohs(port));
8812 return;
8813 }
8814
8815 switch (ti->type) {
8816 case UDP_TUNNEL_TYPE_VXLAN:
8817 pf->udp_ports[next_idx].type = I40E_AQC_TUNNEL_TYPE_VXLAN;
8818 break;
8819 case UDP_TUNNEL_TYPE_GENEVE:
8820 if (!(pf->flags & I40E_FLAG_GENEVE_OFFLOAD_CAPABLE))
8821 return;
8822 pf->udp_ports[next_idx].type = I40E_AQC_TUNNEL_TYPE_NGE;
8823 break;
8824 default:
8825 return;
8826 }
8827
8828 /* New port: add it and mark its index in the bitmap */
8829 pf->udp_ports[next_idx].index = port;
8830 pf->pending_udp_bitmap |= BIT_ULL(next_idx);
8831 pf->flags |= I40E_FLAG_UDP_FILTER_SYNC;
8832 }
8833
8834 /**
8835 * i40e_udp_tunnel_del - Get notifications about UDP tunnel ports that go away
8836 * @netdev: This physical port's netdev
8837 * @ti: Tunnel endpoint information
8838 **/
8839 static void i40e_udp_tunnel_del(struct net_device *netdev,
8840 struct udp_tunnel_info *ti)
8841 {
8842 struct i40e_netdev_priv *np = netdev_priv(netdev);
8843 struct i40e_vsi *vsi = np->vsi;
8844 struct i40e_pf *pf = vsi->back;
8845 __be16 port = ti->port;
8846 u8 idx;
8847
8848 idx = i40e_get_udp_port_idx(pf, port);
8849
8850 /* Check if port already exists */
8851 if (idx >= I40E_MAX_PF_UDP_OFFLOAD_PORTS)
8852 goto not_found;
8853
8854 switch (ti->type) {
8855 case UDP_TUNNEL_TYPE_VXLAN:
8856 if (pf->udp_ports[idx].type != I40E_AQC_TUNNEL_TYPE_VXLAN)
8857 goto not_found;
8858 break;
8859 case UDP_TUNNEL_TYPE_GENEVE:
8860 if (pf->udp_ports[idx].type != I40E_AQC_TUNNEL_TYPE_NGE)
8861 goto not_found;
8862 break;
8863 default:
8864 goto not_found;
8865 }
8866
8867 /* if port exists, set it to 0 (mark for deletion)
8868 * and make it pending
8869 */
8870 pf->udp_ports[idx].index = 0;
8871 pf->pending_udp_bitmap |= BIT_ULL(idx);
8872 pf->flags |= I40E_FLAG_UDP_FILTER_SYNC;
8873
8874 return;
8875 not_found:
8876 netdev_warn(netdev, "UDP port %d was not found, not deleting\n",
8877 ntohs(port));
8878 }
8879
8880 static int i40e_get_phys_port_id(struct net_device *netdev,
8881 struct netdev_phys_item_id *ppid)
8882 {
8883 struct i40e_netdev_priv *np = netdev_priv(netdev);
8884 struct i40e_pf *pf = np->vsi->back;
8885 struct i40e_hw *hw = &pf->hw;
8886
8887 if (!(pf->flags & I40E_FLAG_PORT_ID_VALID))
8888 return -EOPNOTSUPP;
8889
8890 ppid->id_len = min_t(int, sizeof(hw->mac.port_addr), sizeof(ppid->id));
8891 memcpy(ppid->id, hw->mac.port_addr, ppid->id_len);
8892
8893 return 0;
8894 }
8895
8896 /**
8897 * i40e_ndo_fdb_add - add an entry to the hardware database
8898 * @ndm: the input from the stack
8899 * @tb: pointer to array of nladdr (unused)
8900 * @dev: the net device pointer
8901 * @addr: the MAC address entry being added
8902 * @flags: instructions from stack about fdb operation
8903 */
8904 static int i40e_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
8905 struct net_device *dev,
8906 const unsigned char *addr, u16 vid,
8907 u16 flags)
8908 {
8909 struct i40e_netdev_priv *np = netdev_priv(dev);
8910 struct i40e_pf *pf = np->vsi->back;
8911 int err = 0;
8912
8913 if (!(pf->flags & I40E_FLAG_SRIOV_ENABLED))
8914 return -EOPNOTSUPP;
8915
8916 if (vid) {
8917 pr_info("%s: vlans aren't supported yet for dev_uc|mc_add()\n", dev->name);
8918 return -EINVAL;
8919 }
8920
8921 /* Hardware does not support aging addresses so if a
8922 * ndm_state is given only allow permanent addresses
8923 */
8924 if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
8925 netdev_info(dev, "FDB only supports static addresses\n");
8926 return -EINVAL;
8927 }
8928
8929 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr))
8930 err = dev_uc_add_excl(dev, addr);
8931 else if (is_multicast_ether_addr(addr))
8932 err = dev_mc_add_excl(dev, addr);
8933 else
8934 err = -EINVAL;
8935
8936 /* Only return duplicate errors if NLM_F_EXCL is set */
8937 if (err == -EEXIST && !(flags & NLM_F_EXCL))
8938 err = 0;
8939
8940 return err;
8941 }
8942
8943 /**
8944 * i40e_ndo_bridge_setlink - Set the hardware bridge mode
8945 * @dev: the netdev being configured
8946 * @nlh: RTNL message
8947 *
8948 * Inserts a new hardware bridge if not already created and
8949 * enables the bridging mode requested (VEB or VEPA). If the
8950 * hardware bridge has already been inserted and the request
8951 * is to change the mode then that requires a PF reset to
8952 * allow rebuild of the components with required hardware
8953 * bridge mode enabled.
8954 **/
8955 static int i40e_ndo_bridge_setlink(struct net_device *dev,
8956 struct nlmsghdr *nlh,
8957 u16 flags)
8958 {
8959 struct i40e_netdev_priv *np = netdev_priv(dev);
8960 struct i40e_vsi *vsi = np->vsi;
8961 struct i40e_pf *pf = vsi->back;
8962 struct i40e_veb *veb = NULL;
8963 struct nlattr *attr, *br_spec;
8964 int i, rem;
8965
8966 /* Only for PF VSI for now */
8967 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
8968 return -EOPNOTSUPP;
8969
8970 /* Find the HW bridge for PF VSI */
8971 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
8972 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
8973 veb = pf->veb[i];
8974 }
8975
8976 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
8977
8978 nla_for_each_nested(attr, br_spec, rem) {
8979 __u16 mode;
8980
8981 if (nla_type(attr) != IFLA_BRIDGE_MODE)
8982 continue;
8983
8984 mode = nla_get_u16(attr);
8985 if ((mode != BRIDGE_MODE_VEPA) &&
8986 (mode != BRIDGE_MODE_VEB))
8987 return -EINVAL;
8988
8989 /* Insert a new HW bridge */
8990 if (!veb) {
8991 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
8992 vsi->tc_config.enabled_tc);
8993 if (veb) {
8994 veb->bridge_mode = mode;
8995 i40e_config_bridge_mode(veb);
8996 } else {
8997 /* No Bridge HW offload available */
8998 return -ENOENT;
8999 }
9000 break;
9001 } else if (mode != veb->bridge_mode) {
9002 /* Existing HW bridge but different mode needs reset */
9003 veb->bridge_mode = mode;
9004 /* TODO: If no VFs or VMDq VSIs, disallow VEB mode */
9005 if (mode == BRIDGE_MODE_VEB)
9006 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
9007 else
9008 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
9009 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
9010 break;
9011 }
9012 }
9013
9014 return 0;
9015 }
9016
9017 /**
9018 * i40e_ndo_bridge_getlink - Get the hardware bridge mode
9019 * @skb: skb buff
9020 * @pid: process id
9021 * @seq: RTNL message seq #
9022 * @dev: the netdev being configured
9023 * @filter_mask: unused
9024 * @nlflags: netlink flags passed in
9025 *
9026 * Return the mode in which the hardware bridge is operating in
9027 * i.e VEB or VEPA.
9028 **/
9029 static int i40e_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
9030 struct net_device *dev,
9031 u32 __always_unused filter_mask,
9032 int nlflags)
9033 {
9034 struct i40e_netdev_priv *np = netdev_priv(dev);
9035 struct i40e_vsi *vsi = np->vsi;
9036 struct i40e_pf *pf = vsi->back;
9037 struct i40e_veb *veb = NULL;
9038 int i;
9039
9040 /* Only for PF VSI for now */
9041 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
9042 return -EOPNOTSUPP;
9043
9044 /* Find the HW bridge for the PF VSI */
9045 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
9046 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
9047 veb = pf->veb[i];
9048 }
9049
9050 if (!veb)
9051 return 0;
9052
9053 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, veb->bridge_mode,
9054 nlflags, 0, 0, filter_mask, NULL);
9055 }
9056
9057 /* Hardware supports L4 tunnel length of 128B (=2^7) which includes
9058 * inner mac plus all inner ethertypes.
9059 */
9060 #define I40E_MAX_TUNNEL_HDR_LEN 128
9061 /**
9062 * i40e_features_check - Validate encapsulated packet conforms to limits
9063 * @skb: skb buff
9064 * @dev: This physical port's netdev
9065 * @features: Offload features that the stack believes apply
9066 **/
9067 static netdev_features_t i40e_features_check(struct sk_buff *skb,
9068 struct net_device *dev,
9069 netdev_features_t features)
9070 {
9071 if (skb->encapsulation &&
9072 ((skb_inner_network_header(skb) - skb_transport_header(skb)) >
9073 I40E_MAX_TUNNEL_HDR_LEN))
9074 return features & ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK);
9075
9076 return features;
9077 }
9078
9079 static const struct net_device_ops i40e_netdev_ops = {
9080 .ndo_open = i40e_open,
9081 .ndo_stop = i40e_close,
9082 .ndo_start_xmit = i40e_lan_xmit_frame,
9083 .ndo_get_stats64 = i40e_get_netdev_stats_struct,
9084 .ndo_set_rx_mode = i40e_set_rx_mode,
9085 .ndo_validate_addr = eth_validate_addr,
9086 .ndo_set_mac_address = i40e_set_mac,
9087 .ndo_change_mtu = i40e_change_mtu,
9088 .ndo_do_ioctl = i40e_ioctl,
9089 .ndo_tx_timeout = i40e_tx_timeout,
9090 .ndo_vlan_rx_add_vid = i40e_vlan_rx_add_vid,
9091 .ndo_vlan_rx_kill_vid = i40e_vlan_rx_kill_vid,
9092 #ifdef CONFIG_NET_POLL_CONTROLLER
9093 .ndo_poll_controller = i40e_netpoll,
9094 #endif
9095 .ndo_setup_tc = __i40e_setup_tc,
9096 #ifdef I40E_FCOE
9097 .ndo_fcoe_enable = i40e_fcoe_enable,
9098 .ndo_fcoe_disable = i40e_fcoe_disable,
9099 #endif
9100 .ndo_set_features = i40e_set_features,
9101 .ndo_set_vf_mac = i40e_ndo_set_vf_mac,
9102 .ndo_set_vf_vlan = i40e_ndo_set_vf_port_vlan,
9103 .ndo_set_vf_rate = i40e_ndo_set_vf_bw,
9104 .ndo_get_vf_config = i40e_ndo_get_vf_config,
9105 .ndo_set_vf_link_state = i40e_ndo_set_vf_link_state,
9106 .ndo_set_vf_spoofchk = i40e_ndo_set_vf_spoofchk,
9107 .ndo_set_vf_trust = i40e_ndo_set_vf_trust,
9108 .ndo_udp_tunnel_add = i40e_udp_tunnel_add,
9109 .ndo_udp_tunnel_del = i40e_udp_tunnel_del,
9110 .ndo_get_phys_port_id = i40e_get_phys_port_id,
9111 .ndo_fdb_add = i40e_ndo_fdb_add,
9112 .ndo_features_check = i40e_features_check,
9113 .ndo_bridge_getlink = i40e_ndo_bridge_getlink,
9114 .ndo_bridge_setlink = i40e_ndo_bridge_setlink,
9115 };
9116
9117 /**
9118 * i40e_config_netdev - Setup the netdev flags
9119 * @vsi: the VSI being configured
9120 *
9121 * Returns 0 on success, negative value on failure
9122 **/
9123 static int i40e_config_netdev(struct i40e_vsi *vsi)
9124 {
9125 struct i40e_pf *pf = vsi->back;
9126 struct i40e_hw *hw = &pf->hw;
9127 struct i40e_netdev_priv *np;
9128 struct net_device *netdev;
9129 u8 mac_addr[ETH_ALEN];
9130 int etherdev_size;
9131
9132 etherdev_size = sizeof(struct i40e_netdev_priv);
9133 netdev = alloc_etherdev_mq(etherdev_size, vsi->alloc_queue_pairs);
9134 if (!netdev)
9135 return -ENOMEM;
9136
9137 vsi->netdev = netdev;
9138 np = netdev_priv(netdev);
9139 np->vsi = vsi;
9140
9141 netdev->hw_enc_features |= NETIF_F_SG |
9142 NETIF_F_IP_CSUM |
9143 NETIF_F_IPV6_CSUM |
9144 NETIF_F_HIGHDMA |
9145 NETIF_F_SOFT_FEATURES |
9146 NETIF_F_TSO |
9147 NETIF_F_TSO_ECN |
9148 NETIF_F_TSO6 |
9149 NETIF_F_GSO_GRE |
9150 NETIF_F_GSO_GRE_CSUM |
9151 NETIF_F_GSO_IPXIP4 |
9152 NETIF_F_GSO_IPXIP6 |
9153 NETIF_F_GSO_UDP_TUNNEL |
9154 NETIF_F_GSO_UDP_TUNNEL_CSUM |
9155 NETIF_F_GSO_PARTIAL |
9156 NETIF_F_SCTP_CRC |
9157 NETIF_F_RXHASH |
9158 NETIF_F_RXCSUM |
9159 0;
9160
9161 if (!(pf->flags & I40E_FLAG_OUTER_UDP_CSUM_CAPABLE))
9162 netdev->gso_partial_features |= NETIF_F_GSO_UDP_TUNNEL_CSUM;
9163
9164 netdev->gso_partial_features |= NETIF_F_GSO_GRE_CSUM;
9165
9166 /* record features VLANs can make use of */
9167 netdev->vlan_features |= netdev->hw_enc_features |
9168 NETIF_F_TSO_MANGLEID;
9169
9170 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
9171 netdev->hw_features |= NETIF_F_NTUPLE;
9172
9173 netdev->hw_features |= netdev->hw_enc_features |
9174 NETIF_F_HW_VLAN_CTAG_TX |
9175 NETIF_F_HW_VLAN_CTAG_RX;
9176
9177 netdev->features |= netdev->hw_features | NETIF_F_HW_VLAN_CTAG_FILTER;
9178 netdev->hw_enc_features |= NETIF_F_TSO_MANGLEID;
9179
9180 if (vsi->type == I40E_VSI_MAIN) {
9181 SET_NETDEV_DEV(netdev, &pf->pdev->dev);
9182 ether_addr_copy(mac_addr, hw->mac.perm_addr);
9183 /* The following steps are necessary to prevent reception
9184 * of tagged packets - some older NVM configurations load a
9185 * default a MAC-VLAN filter that accepts any tagged packet
9186 * which must be replaced by a normal filter.
9187 */
9188 i40e_rm_default_mac_filter(vsi, mac_addr);
9189 spin_lock_bh(&vsi->mac_filter_list_lock);
9190 i40e_add_filter(vsi, mac_addr, I40E_VLAN_ANY, false, true);
9191 spin_unlock_bh(&vsi->mac_filter_list_lock);
9192 } else {
9193 /* relate the VSI_VMDQ name to the VSI_MAIN name */
9194 snprintf(netdev->name, IFNAMSIZ, "%sv%%d",
9195 pf->vsi[pf->lan_vsi]->netdev->name);
9196 random_ether_addr(mac_addr);
9197
9198 spin_lock_bh(&vsi->mac_filter_list_lock);
9199 i40e_add_filter(vsi, mac_addr, I40E_VLAN_ANY, false, false);
9200 spin_unlock_bh(&vsi->mac_filter_list_lock);
9201 }
9202
9203 ether_addr_copy(netdev->dev_addr, mac_addr);
9204 ether_addr_copy(netdev->perm_addr, mac_addr);
9205
9206 netdev->priv_flags |= IFF_UNICAST_FLT;
9207 netdev->priv_flags |= IFF_SUPP_NOFCS;
9208 /* Setup netdev TC information */
9209 i40e_vsi_config_netdev_tc(vsi, vsi->tc_config.enabled_tc);
9210
9211 netdev->netdev_ops = &i40e_netdev_ops;
9212 netdev->watchdog_timeo = 5 * HZ;
9213 i40e_set_ethtool_ops(netdev);
9214 #ifdef I40E_FCOE
9215 i40e_fcoe_config_netdev(netdev, vsi);
9216 #endif
9217
9218 /* MTU range: 68 - 9706 */
9219 netdev->min_mtu = ETH_MIN_MTU;
9220 netdev->max_mtu = I40E_MAX_RXBUFFER -
9221 (ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN);
9222
9223 return 0;
9224 }
9225
9226 /**
9227 * i40e_vsi_delete - Delete a VSI from the switch
9228 * @vsi: the VSI being removed
9229 *
9230 * Returns 0 on success, negative value on failure
9231 **/
9232 static void i40e_vsi_delete(struct i40e_vsi *vsi)
9233 {
9234 /* remove default VSI is not allowed */
9235 if (vsi == vsi->back->vsi[vsi->back->lan_vsi])
9236 return;
9237
9238 i40e_aq_delete_element(&vsi->back->hw, vsi->seid, NULL);
9239 }
9240
9241 /**
9242 * i40e_is_vsi_uplink_mode_veb - Check if the VSI's uplink bridge mode is VEB
9243 * @vsi: the VSI being queried
9244 *
9245 * Returns 1 if HW bridge mode is VEB and return 0 in case of VEPA mode
9246 **/
9247 int i40e_is_vsi_uplink_mode_veb(struct i40e_vsi *vsi)
9248 {
9249 struct i40e_veb *veb;
9250 struct i40e_pf *pf = vsi->back;
9251
9252 /* Uplink is not a bridge so default to VEB */
9253 if (vsi->veb_idx == I40E_NO_VEB)
9254 return 1;
9255
9256 veb = pf->veb[vsi->veb_idx];
9257 if (!veb) {
9258 dev_info(&pf->pdev->dev,
9259 "There is no veb associated with the bridge\n");
9260 return -ENOENT;
9261 }
9262
9263 /* Uplink is a bridge in VEPA mode */
9264 if (veb->bridge_mode & BRIDGE_MODE_VEPA) {
9265 return 0;
9266 } else {
9267 /* Uplink is a bridge in VEB mode */
9268 return 1;
9269 }
9270
9271 /* VEPA is now default bridge, so return 0 */
9272 return 0;
9273 }
9274
9275 /**
9276 * i40e_add_vsi - Add a VSI to the switch
9277 * @vsi: the VSI being configured
9278 *
9279 * This initializes a VSI context depending on the VSI type to be added and
9280 * passes it down to the add_vsi aq command.
9281 **/
9282 static int i40e_add_vsi(struct i40e_vsi *vsi)
9283 {
9284 int ret = -ENODEV;
9285 i40e_status aq_ret = 0;
9286 struct i40e_pf *pf = vsi->back;
9287 struct i40e_hw *hw = &pf->hw;
9288 struct i40e_vsi_context ctxt;
9289 struct i40e_mac_filter *f, *ftmp;
9290
9291 u8 enabled_tc = 0x1; /* TC0 enabled */
9292 int f_count = 0;
9293
9294 memset(&ctxt, 0, sizeof(ctxt));
9295 switch (vsi->type) {
9296 case I40E_VSI_MAIN:
9297 /* The PF's main VSI is already setup as part of the
9298 * device initialization, so we'll not bother with
9299 * the add_vsi call, but we will retrieve the current
9300 * VSI context.
9301 */
9302 ctxt.seid = pf->main_vsi_seid;
9303 ctxt.pf_num = pf->hw.pf_id;
9304 ctxt.vf_num = 0;
9305 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
9306 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
9307 if (ret) {
9308 dev_info(&pf->pdev->dev,
9309 "couldn't get PF vsi config, err %s aq_err %s\n",
9310 i40e_stat_str(&pf->hw, ret),
9311 i40e_aq_str(&pf->hw,
9312 pf->hw.aq.asq_last_status));
9313 return -ENOENT;
9314 }
9315 vsi->info = ctxt.info;
9316 vsi->info.valid_sections = 0;
9317
9318 vsi->seid = ctxt.seid;
9319 vsi->id = ctxt.vsi_number;
9320
9321 enabled_tc = i40e_pf_get_tc_map(pf);
9322
9323 /* MFP mode setup queue map and update VSI */
9324 if ((pf->flags & I40E_FLAG_MFP_ENABLED) &&
9325 !(pf->hw.func_caps.iscsi)) { /* NIC type PF */
9326 memset(&ctxt, 0, sizeof(ctxt));
9327 ctxt.seid = pf->main_vsi_seid;
9328 ctxt.pf_num = pf->hw.pf_id;
9329 ctxt.vf_num = 0;
9330 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
9331 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
9332 if (ret) {
9333 dev_info(&pf->pdev->dev,
9334 "update vsi failed, err %s aq_err %s\n",
9335 i40e_stat_str(&pf->hw, ret),
9336 i40e_aq_str(&pf->hw,
9337 pf->hw.aq.asq_last_status));
9338 ret = -ENOENT;
9339 goto err;
9340 }
9341 /* update the local VSI info queue map */
9342 i40e_vsi_update_queue_map(vsi, &ctxt);
9343 vsi->info.valid_sections = 0;
9344 } else {
9345 /* Default/Main VSI is only enabled for TC0
9346 * reconfigure it to enable all TCs that are
9347 * available on the port in SFP mode.
9348 * For MFP case the iSCSI PF would use this
9349 * flow to enable LAN+iSCSI TC.
9350 */
9351 ret = i40e_vsi_config_tc(vsi, enabled_tc);
9352 if (ret) {
9353 dev_info(&pf->pdev->dev,
9354 "failed to configure TCs for main VSI tc_map 0x%08x, err %s aq_err %s\n",
9355 enabled_tc,
9356 i40e_stat_str(&pf->hw, ret),
9357 i40e_aq_str(&pf->hw,
9358 pf->hw.aq.asq_last_status));
9359 ret = -ENOENT;
9360 }
9361 }
9362 break;
9363
9364 case I40E_VSI_FDIR:
9365 ctxt.pf_num = hw->pf_id;
9366 ctxt.vf_num = 0;
9367 ctxt.uplink_seid = vsi->uplink_seid;
9368 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
9369 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
9370 if ((pf->flags & I40E_FLAG_VEB_MODE_ENABLED) &&
9371 (i40e_is_vsi_uplink_mode_veb(vsi))) {
9372 ctxt.info.valid_sections |=
9373 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
9374 ctxt.info.switch_id =
9375 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
9376 }
9377 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
9378 break;
9379
9380 case I40E_VSI_VMDQ2:
9381 ctxt.pf_num = hw->pf_id;
9382 ctxt.vf_num = 0;
9383 ctxt.uplink_seid = vsi->uplink_seid;
9384 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
9385 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2;
9386
9387 /* This VSI is connected to VEB so the switch_id
9388 * should be set to zero by default.
9389 */
9390 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
9391 ctxt.info.valid_sections |=
9392 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
9393 ctxt.info.switch_id =
9394 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
9395 }
9396
9397 /* Setup the VSI tx/rx queue map for TC0 only for now */
9398 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
9399 break;
9400
9401 case I40E_VSI_SRIOV:
9402 ctxt.pf_num = hw->pf_id;
9403 ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id;
9404 ctxt.uplink_seid = vsi->uplink_seid;
9405 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
9406 ctxt.flags = I40E_AQ_VSI_TYPE_VF;
9407
9408 /* This VSI is connected to VEB so the switch_id
9409 * should be set to zero by default.
9410 */
9411 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
9412 ctxt.info.valid_sections |=
9413 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
9414 ctxt.info.switch_id =
9415 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
9416 }
9417
9418 if (vsi->back->flags & I40E_FLAG_IWARP_ENABLED) {
9419 ctxt.info.valid_sections |=
9420 cpu_to_le16(I40E_AQ_VSI_PROP_QUEUE_OPT_VALID);
9421 ctxt.info.queueing_opt_flags |=
9422 (I40E_AQ_VSI_QUE_OPT_TCP_ENA |
9423 I40E_AQ_VSI_QUE_OPT_RSS_LUT_VSI);
9424 }
9425
9426 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
9427 ctxt.info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_MODE_ALL;
9428 if (pf->vf[vsi->vf_id].spoofchk) {
9429 ctxt.info.valid_sections |=
9430 cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID);
9431 ctxt.info.sec_flags |=
9432 (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK |
9433 I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK);
9434 }
9435 /* Setup the VSI tx/rx queue map for TC0 only for now */
9436 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
9437 break;
9438
9439 #ifdef I40E_FCOE
9440 case I40E_VSI_FCOE:
9441 ret = i40e_fcoe_vsi_init(vsi, &ctxt);
9442 if (ret) {
9443 dev_info(&pf->pdev->dev, "failed to initialize FCoE VSI\n");
9444 return ret;
9445 }
9446 break;
9447
9448 #endif /* I40E_FCOE */
9449 case I40E_VSI_IWARP:
9450 /* send down message to iWARP */
9451 break;
9452
9453 default:
9454 return -ENODEV;
9455 }
9456
9457 if (vsi->type != I40E_VSI_MAIN) {
9458 ret = i40e_aq_add_vsi(hw, &ctxt, NULL);
9459 if (ret) {
9460 dev_info(&vsi->back->pdev->dev,
9461 "add vsi failed, err %s aq_err %s\n",
9462 i40e_stat_str(&pf->hw, ret),
9463 i40e_aq_str(&pf->hw,
9464 pf->hw.aq.asq_last_status));
9465 ret = -ENOENT;
9466 goto err;
9467 }
9468 vsi->info = ctxt.info;
9469 vsi->info.valid_sections = 0;
9470 vsi->seid = ctxt.seid;
9471 vsi->id = ctxt.vsi_number;
9472 }
9473 /* Except FDIR VSI, for all othet VSI set the broadcast filter */
9474 if (vsi->type != I40E_VSI_FDIR) {
9475 aq_ret = i40e_aq_set_vsi_broadcast(hw, vsi->seid, true, NULL);
9476 if (aq_ret) {
9477 ret = i40e_aq_rc_to_posix(aq_ret,
9478 hw->aq.asq_last_status);
9479 dev_info(&pf->pdev->dev,
9480 "set brdcast promisc failed, err %s, aq_err %s\n",
9481 i40e_stat_str(hw, aq_ret),
9482 i40e_aq_str(hw, hw->aq.asq_last_status));
9483 }
9484 }
9485
9486 vsi->active_filters = 0;
9487 clear_bit(__I40E_FILTER_OVERFLOW_PROMISC, &vsi->state);
9488 spin_lock_bh(&vsi->mac_filter_list_lock);
9489 /* If macvlan filters already exist, force them to get loaded */
9490 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
9491 f->state = I40E_FILTER_NEW;
9492 f_count++;
9493 }
9494 spin_unlock_bh(&vsi->mac_filter_list_lock);
9495
9496 if (f_count) {
9497 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
9498 pf->flags |= I40E_FLAG_FILTER_SYNC;
9499 }
9500
9501 /* Update VSI BW information */
9502 ret = i40e_vsi_get_bw_info(vsi);
9503 if (ret) {
9504 dev_info(&pf->pdev->dev,
9505 "couldn't get vsi bw info, err %s aq_err %s\n",
9506 i40e_stat_str(&pf->hw, ret),
9507 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9508 /* VSI is already added so not tearing that up */
9509 ret = 0;
9510 }
9511
9512 err:
9513 return ret;
9514 }
9515
9516 /**
9517 * i40e_vsi_release - Delete a VSI and free its resources
9518 * @vsi: the VSI being removed
9519 *
9520 * Returns 0 on success or < 0 on error
9521 **/
9522 int i40e_vsi_release(struct i40e_vsi *vsi)
9523 {
9524 struct i40e_mac_filter *f, *ftmp;
9525 struct i40e_veb *veb = NULL;
9526 struct i40e_pf *pf;
9527 u16 uplink_seid;
9528 int i, n;
9529
9530 pf = vsi->back;
9531
9532 /* release of a VEB-owner or last VSI is not allowed */
9533 if (vsi->flags & I40E_VSI_FLAG_VEB_OWNER) {
9534 dev_info(&pf->pdev->dev, "VSI %d has existing VEB %d\n",
9535 vsi->seid, vsi->uplink_seid);
9536 return -ENODEV;
9537 }
9538 if (vsi == pf->vsi[pf->lan_vsi] &&
9539 !test_bit(__I40E_DOWN, &pf->state)) {
9540 dev_info(&pf->pdev->dev, "Can't remove PF VSI\n");
9541 return -ENODEV;
9542 }
9543
9544 uplink_seid = vsi->uplink_seid;
9545 if (vsi->type != I40E_VSI_SRIOV) {
9546 if (vsi->netdev_registered) {
9547 vsi->netdev_registered = false;
9548 if (vsi->netdev) {
9549 /* results in a call to i40e_close() */
9550 unregister_netdev(vsi->netdev);
9551 }
9552 } else {
9553 i40e_vsi_close(vsi);
9554 }
9555 i40e_vsi_disable_irq(vsi);
9556 }
9557
9558 spin_lock_bh(&vsi->mac_filter_list_lock);
9559 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list)
9560 i40e_del_filter(vsi, f->macaddr, f->vlan,
9561 f->is_vf, f->is_netdev);
9562 spin_unlock_bh(&vsi->mac_filter_list_lock);
9563
9564 i40e_sync_vsi_filters(vsi);
9565
9566 i40e_vsi_delete(vsi);
9567 i40e_vsi_free_q_vectors(vsi);
9568 if (vsi->netdev) {
9569 free_netdev(vsi->netdev);
9570 vsi->netdev = NULL;
9571 }
9572 i40e_vsi_clear_rings(vsi);
9573 i40e_vsi_clear(vsi);
9574
9575 /* If this was the last thing on the VEB, except for the
9576 * controlling VSI, remove the VEB, which puts the controlling
9577 * VSI onto the next level down in the switch.
9578 *
9579 * Well, okay, there's one more exception here: don't remove
9580 * the orphan VEBs yet. We'll wait for an explicit remove request
9581 * from up the network stack.
9582 */
9583 for (n = 0, i = 0; i < pf->num_alloc_vsi; i++) {
9584 if (pf->vsi[i] &&
9585 pf->vsi[i]->uplink_seid == uplink_seid &&
9586 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
9587 n++; /* count the VSIs */
9588 }
9589 }
9590 for (i = 0; i < I40E_MAX_VEB; i++) {
9591 if (!pf->veb[i])
9592 continue;
9593 if (pf->veb[i]->uplink_seid == uplink_seid)
9594 n++; /* count the VEBs */
9595 if (pf->veb[i]->seid == uplink_seid)
9596 veb = pf->veb[i];
9597 }
9598 if (n == 0 && veb && veb->uplink_seid != 0)
9599 i40e_veb_release(veb);
9600
9601 return 0;
9602 }
9603
9604 /**
9605 * i40e_vsi_setup_vectors - Set up the q_vectors for the given VSI
9606 * @vsi: ptr to the VSI
9607 *
9608 * This should only be called after i40e_vsi_mem_alloc() which allocates the
9609 * corresponding SW VSI structure and initializes num_queue_pairs for the
9610 * newly allocated VSI.
9611 *
9612 * Returns 0 on success or negative on failure
9613 **/
9614 static int i40e_vsi_setup_vectors(struct i40e_vsi *vsi)
9615 {
9616 int ret = -ENOENT;
9617 struct i40e_pf *pf = vsi->back;
9618
9619 if (vsi->q_vectors[0]) {
9620 dev_info(&pf->pdev->dev, "VSI %d has existing q_vectors\n",
9621 vsi->seid);
9622 return -EEXIST;
9623 }
9624
9625 if (vsi->base_vector) {
9626 dev_info(&pf->pdev->dev, "VSI %d has non-zero base vector %d\n",
9627 vsi->seid, vsi->base_vector);
9628 return -EEXIST;
9629 }
9630
9631 ret = i40e_vsi_alloc_q_vectors(vsi);
9632 if (ret) {
9633 dev_info(&pf->pdev->dev,
9634 "failed to allocate %d q_vector for VSI %d, ret=%d\n",
9635 vsi->num_q_vectors, vsi->seid, ret);
9636 vsi->num_q_vectors = 0;
9637 goto vector_setup_out;
9638 }
9639
9640 /* In Legacy mode, we do not have to get any other vector since we
9641 * piggyback on the misc/ICR0 for queue interrupts.
9642 */
9643 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
9644 return ret;
9645 if (vsi->num_q_vectors)
9646 vsi->base_vector = i40e_get_lump(pf, pf->irq_pile,
9647 vsi->num_q_vectors, vsi->idx);
9648 if (vsi->base_vector < 0) {
9649 dev_info(&pf->pdev->dev,
9650 "failed to get tracking for %d vectors for VSI %d, err=%d\n",
9651 vsi->num_q_vectors, vsi->seid, vsi->base_vector);
9652 i40e_vsi_free_q_vectors(vsi);
9653 ret = -ENOENT;
9654 goto vector_setup_out;
9655 }
9656
9657 vector_setup_out:
9658 return ret;
9659 }
9660
9661 /**
9662 * i40e_vsi_reinit_setup - return and reallocate resources for a VSI
9663 * @vsi: pointer to the vsi.
9664 *
9665 * This re-allocates a vsi's queue resources.
9666 *
9667 * Returns pointer to the successfully allocated and configured VSI sw struct
9668 * on success, otherwise returns NULL on failure.
9669 **/
9670 static struct i40e_vsi *i40e_vsi_reinit_setup(struct i40e_vsi *vsi)
9671 {
9672 struct i40e_pf *pf;
9673 u8 enabled_tc;
9674 int ret;
9675
9676 if (!vsi)
9677 return NULL;
9678
9679 pf = vsi->back;
9680
9681 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
9682 i40e_vsi_clear_rings(vsi);
9683
9684 i40e_vsi_free_arrays(vsi, false);
9685 i40e_set_num_rings_in_vsi(vsi);
9686 ret = i40e_vsi_alloc_arrays(vsi, false);
9687 if (ret)
9688 goto err_vsi;
9689
9690 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs, vsi->idx);
9691 if (ret < 0) {
9692 dev_info(&pf->pdev->dev,
9693 "failed to get tracking for %d queues for VSI %d err %d\n",
9694 vsi->alloc_queue_pairs, vsi->seid, ret);
9695 goto err_vsi;
9696 }
9697 vsi->base_queue = ret;
9698
9699 /* Update the FW view of the VSI. Force a reset of TC and queue
9700 * layout configurations.
9701 */
9702 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
9703 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
9704 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
9705 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
9706 if (vsi->type == I40E_VSI_MAIN)
9707 i40e_rm_default_mac_filter(vsi, pf->hw.mac.perm_addr);
9708
9709 /* assign it some queues */
9710 ret = i40e_alloc_rings(vsi);
9711 if (ret)
9712 goto err_rings;
9713
9714 /* map all of the rings to the q_vectors */
9715 i40e_vsi_map_rings_to_vectors(vsi);
9716 return vsi;
9717
9718 err_rings:
9719 i40e_vsi_free_q_vectors(vsi);
9720 if (vsi->netdev_registered) {
9721 vsi->netdev_registered = false;
9722 unregister_netdev(vsi->netdev);
9723 free_netdev(vsi->netdev);
9724 vsi->netdev = NULL;
9725 }
9726 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
9727 err_vsi:
9728 i40e_vsi_clear(vsi);
9729 return NULL;
9730 }
9731
9732 /**
9733 * i40e_vsi_setup - Set up a VSI by a given type
9734 * @pf: board private structure
9735 * @type: VSI type
9736 * @uplink_seid: the switch element to link to
9737 * @param1: usage depends upon VSI type. For VF types, indicates VF id
9738 *
9739 * This allocates the sw VSI structure and its queue resources, then add a VSI
9740 * to the identified VEB.
9741 *
9742 * Returns pointer to the successfully allocated and configure VSI sw struct on
9743 * success, otherwise returns NULL on failure.
9744 **/
9745 struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
9746 u16 uplink_seid, u32 param1)
9747 {
9748 struct i40e_vsi *vsi = NULL;
9749 struct i40e_veb *veb = NULL;
9750 int ret, i;
9751 int v_idx;
9752
9753 /* The requested uplink_seid must be either
9754 * - the PF's port seid
9755 * no VEB is needed because this is the PF
9756 * or this is a Flow Director special case VSI
9757 * - seid of an existing VEB
9758 * - seid of a VSI that owns an existing VEB
9759 * - seid of a VSI that doesn't own a VEB
9760 * a new VEB is created and the VSI becomes the owner
9761 * - seid of the PF VSI, which is what creates the first VEB
9762 * this is a special case of the previous
9763 *
9764 * Find which uplink_seid we were given and create a new VEB if needed
9765 */
9766 for (i = 0; i < I40E_MAX_VEB; i++) {
9767 if (pf->veb[i] && pf->veb[i]->seid == uplink_seid) {
9768 veb = pf->veb[i];
9769 break;
9770 }
9771 }
9772
9773 if (!veb && uplink_seid != pf->mac_seid) {
9774
9775 for (i = 0; i < pf->num_alloc_vsi; i++) {
9776 if (pf->vsi[i] && pf->vsi[i]->seid == uplink_seid) {
9777 vsi = pf->vsi[i];
9778 break;
9779 }
9780 }
9781 if (!vsi) {
9782 dev_info(&pf->pdev->dev, "no such uplink_seid %d\n",
9783 uplink_seid);
9784 return NULL;
9785 }
9786
9787 if (vsi->uplink_seid == pf->mac_seid)
9788 veb = i40e_veb_setup(pf, 0, pf->mac_seid, vsi->seid,
9789 vsi->tc_config.enabled_tc);
9790 else if ((vsi->flags & I40E_VSI_FLAG_VEB_OWNER) == 0)
9791 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
9792 vsi->tc_config.enabled_tc);
9793 if (veb) {
9794 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid) {
9795 dev_info(&vsi->back->pdev->dev,
9796 "New VSI creation error, uplink seid of LAN VSI expected.\n");
9797 return NULL;
9798 }
9799 /* We come up by default in VEPA mode if SRIOV is not
9800 * already enabled, in which case we can't force VEPA
9801 * mode.
9802 */
9803 if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) {
9804 veb->bridge_mode = BRIDGE_MODE_VEPA;
9805 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
9806 }
9807 i40e_config_bridge_mode(veb);
9808 }
9809 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
9810 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
9811 veb = pf->veb[i];
9812 }
9813 if (!veb) {
9814 dev_info(&pf->pdev->dev, "couldn't add VEB\n");
9815 return NULL;
9816 }
9817
9818 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
9819 uplink_seid = veb->seid;
9820 }
9821
9822 /* get vsi sw struct */
9823 v_idx = i40e_vsi_mem_alloc(pf, type);
9824 if (v_idx < 0)
9825 goto err_alloc;
9826 vsi = pf->vsi[v_idx];
9827 if (!vsi)
9828 goto err_alloc;
9829 vsi->type = type;
9830 vsi->veb_idx = (veb ? veb->idx : I40E_NO_VEB);
9831
9832 if (type == I40E_VSI_MAIN)
9833 pf->lan_vsi = v_idx;
9834 else if (type == I40E_VSI_SRIOV)
9835 vsi->vf_id = param1;
9836 /* assign it some queues */
9837 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs,
9838 vsi->idx);
9839 if (ret < 0) {
9840 dev_info(&pf->pdev->dev,
9841 "failed to get tracking for %d queues for VSI %d err=%d\n",
9842 vsi->alloc_queue_pairs, vsi->seid, ret);
9843 goto err_vsi;
9844 }
9845 vsi->base_queue = ret;
9846
9847 /* get a VSI from the hardware */
9848 vsi->uplink_seid = uplink_seid;
9849 ret = i40e_add_vsi(vsi);
9850 if (ret)
9851 goto err_vsi;
9852
9853 switch (vsi->type) {
9854 /* setup the netdev if needed */
9855 case I40E_VSI_MAIN:
9856 /* Apply relevant filters if a platform-specific mac
9857 * address was selected.
9858 */
9859 if (!!(pf->flags & I40E_FLAG_PF_MAC)) {
9860 ret = i40e_macaddr_init(vsi, pf->hw.mac.addr);
9861 if (ret) {
9862 dev_warn(&pf->pdev->dev,
9863 "could not set up macaddr; err %d\n",
9864 ret);
9865 }
9866 }
9867 case I40E_VSI_VMDQ2:
9868 case I40E_VSI_FCOE:
9869 ret = i40e_config_netdev(vsi);
9870 if (ret)
9871 goto err_netdev;
9872 ret = register_netdev(vsi->netdev);
9873 if (ret)
9874 goto err_netdev;
9875 vsi->netdev_registered = true;
9876 netif_carrier_off(vsi->netdev);
9877 #ifdef CONFIG_I40E_DCB
9878 /* Setup DCB netlink interface */
9879 i40e_dcbnl_setup(vsi);
9880 #endif /* CONFIG_I40E_DCB */
9881 /* fall through */
9882
9883 case I40E_VSI_FDIR:
9884 /* set up vectors and rings if needed */
9885 ret = i40e_vsi_setup_vectors(vsi);
9886 if (ret)
9887 goto err_msix;
9888
9889 ret = i40e_alloc_rings(vsi);
9890 if (ret)
9891 goto err_rings;
9892
9893 /* map all of the rings to the q_vectors */
9894 i40e_vsi_map_rings_to_vectors(vsi);
9895
9896 i40e_vsi_reset_stats(vsi);
9897 break;
9898
9899 default:
9900 /* no netdev or rings for the other VSI types */
9901 break;
9902 }
9903
9904 if ((pf->flags & I40E_FLAG_RSS_AQ_CAPABLE) &&
9905 (vsi->type == I40E_VSI_VMDQ2)) {
9906 ret = i40e_vsi_config_rss(vsi);
9907 }
9908 return vsi;
9909
9910 err_rings:
9911 i40e_vsi_free_q_vectors(vsi);
9912 err_msix:
9913 if (vsi->netdev_registered) {
9914 vsi->netdev_registered = false;
9915 unregister_netdev(vsi->netdev);
9916 free_netdev(vsi->netdev);
9917 vsi->netdev = NULL;
9918 }
9919 err_netdev:
9920 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
9921 err_vsi:
9922 i40e_vsi_clear(vsi);
9923 err_alloc:
9924 return NULL;
9925 }
9926
9927 /**
9928 * i40e_veb_get_bw_info - Query VEB BW information
9929 * @veb: the veb to query
9930 *
9931 * Query the Tx scheduler BW configuration data for given VEB
9932 **/
9933 static int i40e_veb_get_bw_info(struct i40e_veb *veb)
9934 {
9935 struct i40e_aqc_query_switching_comp_ets_config_resp ets_data;
9936 struct i40e_aqc_query_switching_comp_bw_config_resp bw_data;
9937 struct i40e_pf *pf = veb->pf;
9938 struct i40e_hw *hw = &pf->hw;
9939 u32 tc_bw_max;
9940 int ret = 0;
9941 int i;
9942
9943 ret = i40e_aq_query_switch_comp_bw_config(hw, veb->seid,
9944 &bw_data, NULL);
9945 if (ret) {
9946 dev_info(&pf->pdev->dev,
9947 "query veb bw config failed, err %s aq_err %s\n",
9948 i40e_stat_str(&pf->hw, ret),
9949 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
9950 goto out;
9951 }
9952
9953 ret = i40e_aq_query_switch_comp_ets_config(hw, veb->seid,
9954 &ets_data, NULL);
9955 if (ret) {
9956 dev_info(&pf->pdev->dev,
9957 "query veb bw ets config failed, err %s aq_err %s\n",
9958 i40e_stat_str(&pf->hw, ret),
9959 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
9960 goto out;
9961 }
9962
9963 veb->bw_limit = le16_to_cpu(ets_data.port_bw_limit);
9964 veb->bw_max_quanta = ets_data.tc_bw_max;
9965 veb->is_abs_credits = bw_data.absolute_credits_enable;
9966 veb->enabled_tc = ets_data.tc_valid_bits;
9967 tc_bw_max = le16_to_cpu(bw_data.tc_bw_max[0]) |
9968 (le16_to_cpu(bw_data.tc_bw_max[1]) << 16);
9969 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
9970 veb->bw_tc_share_credits[i] = bw_data.tc_bw_share_credits[i];
9971 veb->bw_tc_limit_credits[i] =
9972 le16_to_cpu(bw_data.tc_bw_limits[i]);
9973 veb->bw_tc_max_quanta[i] = ((tc_bw_max >> (i*4)) & 0x7);
9974 }
9975
9976 out:
9977 return ret;
9978 }
9979
9980 /**
9981 * i40e_veb_mem_alloc - Allocates the next available struct veb in the PF
9982 * @pf: board private structure
9983 *
9984 * On error: returns error code (negative)
9985 * On success: returns vsi index in PF (positive)
9986 **/
9987 static int i40e_veb_mem_alloc(struct i40e_pf *pf)
9988 {
9989 int ret = -ENOENT;
9990 struct i40e_veb *veb;
9991 int i;
9992
9993 /* Need to protect the allocation of switch elements at the PF level */
9994 mutex_lock(&pf->switch_mutex);
9995
9996 /* VEB list may be fragmented if VEB creation/destruction has
9997 * been happening. We can afford to do a quick scan to look
9998 * for any free slots in the list.
9999 *
10000 * find next empty veb slot, looping back around if necessary
10001 */
10002 i = 0;
10003 while ((i < I40E_MAX_VEB) && (pf->veb[i] != NULL))
10004 i++;
10005 if (i >= I40E_MAX_VEB) {
10006 ret = -ENOMEM;
10007 goto err_alloc_veb; /* out of VEB slots! */
10008 }
10009
10010 veb = kzalloc(sizeof(*veb), GFP_KERNEL);
10011 if (!veb) {
10012 ret = -ENOMEM;
10013 goto err_alloc_veb;
10014 }
10015 veb->pf = pf;
10016 veb->idx = i;
10017 veb->enabled_tc = 1;
10018
10019 pf->veb[i] = veb;
10020 ret = i;
10021 err_alloc_veb:
10022 mutex_unlock(&pf->switch_mutex);
10023 return ret;
10024 }
10025
10026 /**
10027 * i40e_switch_branch_release - Delete a branch of the switch tree
10028 * @branch: where to start deleting
10029 *
10030 * This uses recursion to find the tips of the branch to be
10031 * removed, deleting until we get back to and can delete this VEB.
10032 **/
10033 static void i40e_switch_branch_release(struct i40e_veb *branch)
10034 {
10035 struct i40e_pf *pf = branch->pf;
10036 u16 branch_seid = branch->seid;
10037 u16 veb_idx = branch->idx;
10038 int i;
10039
10040 /* release any VEBs on this VEB - RECURSION */
10041 for (i = 0; i < I40E_MAX_VEB; i++) {
10042 if (!pf->veb[i])
10043 continue;
10044 if (pf->veb[i]->uplink_seid == branch->seid)
10045 i40e_switch_branch_release(pf->veb[i]);
10046 }
10047
10048 /* Release the VSIs on this VEB, but not the owner VSI.
10049 *
10050 * NOTE: Removing the last VSI on a VEB has the SIDE EFFECT of removing
10051 * the VEB itself, so don't use (*branch) after this loop.
10052 */
10053 for (i = 0; i < pf->num_alloc_vsi; i++) {
10054 if (!pf->vsi[i])
10055 continue;
10056 if (pf->vsi[i]->uplink_seid == branch_seid &&
10057 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
10058 i40e_vsi_release(pf->vsi[i]);
10059 }
10060 }
10061
10062 /* There's one corner case where the VEB might not have been
10063 * removed, so double check it here and remove it if needed.
10064 * This case happens if the veb was created from the debugfs
10065 * commands and no VSIs were added to it.
10066 */
10067 if (pf->veb[veb_idx])
10068 i40e_veb_release(pf->veb[veb_idx]);
10069 }
10070
10071 /**
10072 * i40e_veb_clear - remove veb struct
10073 * @veb: the veb to remove
10074 **/
10075 static void i40e_veb_clear(struct i40e_veb *veb)
10076 {
10077 if (!veb)
10078 return;
10079
10080 if (veb->pf) {
10081 struct i40e_pf *pf = veb->pf;
10082
10083 mutex_lock(&pf->switch_mutex);
10084 if (pf->veb[veb->idx] == veb)
10085 pf->veb[veb->idx] = NULL;
10086 mutex_unlock(&pf->switch_mutex);
10087 }
10088
10089 kfree(veb);
10090 }
10091
10092 /**
10093 * i40e_veb_release - Delete a VEB and free its resources
10094 * @veb: the VEB being removed
10095 **/
10096 void i40e_veb_release(struct i40e_veb *veb)
10097 {
10098 struct i40e_vsi *vsi = NULL;
10099 struct i40e_pf *pf;
10100 int i, n = 0;
10101
10102 pf = veb->pf;
10103
10104 /* find the remaining VSI and check for extras */
10105 for (i = 0; i < pf->num_alloc_vsi; i++) {
10106 if (pf->vsi[i] && pf->vsi[i]->uplink_seid == veb->seid) {
10107 n++;
10108 vsi = pf->vsi[i];
10109 }
10110 }
10111 if (n != 1) {
10112 dev_info(&pf->pdev->dev,
10113 "can't remove VEB %d with %d VSIs left\n",
10114 veb->seid, n);
10115 return;
10116 }
10117
10118 /* move the remaining VSI to uplink veb */
10119 vsi->flags &= ~I40E_VSI_FLAG_VEB_OWNER;
10120 if (veb->uplink_seid) {
10121 vsi->uplink_seid = veb->uplink_seid;
10122 if (veb->uplink_seid == pf->mac_seid)
10123 vsi->veb_idx = I40E_NO_VEB;
10124 else
10125 vsi->veb_idx = veb->veb_idx;
10126 } else {
10127 /* floating VEB */
10128 vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
10129 vsi->veb_idx = pf->vsi[pf->lan_vsi]->veb_idx;
10130 }
10131
10132 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
10133 i40e_veb_clear(veb);
10134 }
10135
10136 /**
10137 * i40e_add_veb - create the VEB in the switch
10138 * @veb: the VEB to be instantiated
10139 * @vsi: the controlling VSI
10140 **/
10141 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi)
10142 {
10143 struct i40e_pf *pf = veb->pf;
10144 bool enable_stats = !!(pf->flags & I40E_FLAG_VEB_STATS_ENABLED);
10145 int ret;
10146
10147 ret = i40e_aq_add_veb(&pf->hw, veb->uplink_seid, vsi->seid,
10148 veb->enabled_tc, false,
10149 &veb->seid, enable_stats, NULL);
10150
10151 /* get a VEB from the hardware */
10152 if (ret) {
10153 dev_info(&pf->pdev->dev,
10154 "couldn't add VEB, err %s aq_err %s\n",
10155 i40e_stat_str(&pf->hw, ret),
10156 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10157 return -EPERM;
10158 }
10159
10160 /* get statistics counter */
10161 ret = i40e_aq_get_veb_parameters(&pf->hw, veb->seid, NULL, NULL,
10162 &veb->stats_idx, NULL, NULL, NULL);
10163 if (ret) {
10164 dev_info(&pf->pdev->dev,
10165 "couldn't get VEB statistics idx, err %s aq_err %s\n",
10166 i40e_stat_str(&pf->hw, ret),
10167 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10168 return -EPERM;
10169 }
10170 ret = i40e_veb_get_bw_info(veb);
10171 if (ret) {
10172 dev_info(&pf->pdev->dev,
10173 "couldn't get VEB bw info, err %s aq_err %s\n",
10174 i40e_stat_str(&pf->hw, ret),
10175 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10176 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
10177 return -ENOENT;
10178 }
10179
10180 vsi->uplink_seid = veb->seid;
10181 vsi->veb_idx = veb->idx;
10182 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
10183
10184 return 0;
10185 }
10186
10187 /**
10188 * i40e_veb_setup - Set up a VEB
10189 * @pf: board private structure
10190 * @flags: VEB setup flags
10191 * @uplink_seid: the switch element to link to
10192 * @vsi_seid: the initial VSI seid
10193 * @enabled_tc: Enabled TC bit-map
10194 *
10195 * This allocates the sw VEB structure and links it into the switch
10196 * It is possible and legal for this to be a duplicate of an already
10197 * existing VEB. It is also possible for both uplink and vsi seids
10198 * to be zero, in order to create a floating VEB.
10199 *
10200 * Returns pointer to the successfully allocated VEB sw struct on
10201 * success, otherwise returns NULL on failure.
10202 **/
10203 struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags,
10204 u16 uplink_seid, u16 vsi_seid,
10205 u8 enabled_tc)
10206 {
10207 struct i40e_veb *veb, *uplink_veb = NULL;
10208 int vsi_idx, veb_idx;
10209 int ret;
10210
10211 /* if one seid is 0, the other must be 0 to create a floating relay */
10212 if ((uplink_seid == 0 || vsi_seid == 0) &&
10213 (uplink_seid + vsi_seid != 0)) {
10214 dev_info(&pf->pdev->dev,
10215 "one, not both seid's are 0: uplink=%d vsi=%d\n",
10216 uplink_seid, vsi_seid);
10217 return NULL;
10218 }
10219
10220 /* make sure there is such a vsi and uplink */
10221 for (vsi_idx = 0; vsi_idx < pf->num_alloc_vsi; vsi_idx++)
10222 if (pf->vsi[vsi_idx] && pf->vsi[vsi_idx]->seid == vsi_seid)
10223 break;
10224 if (vsi_idx >= pf->num_alloc_vsi && vsi_seid != 0) {
10225 dev_info(&pf->pdev->dev, "vsi seid %d not found\n",
10226 vsi_seid);
10227 return NULL;
10228 }
10229
10230 if (uplink_seid && uplink_seid != pf->mac_seid) {
10231 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
10232 if (pf->veb[veb_idx] &&
10233 pf->veb[veb_idx]->seid == uplink_seid) {
10234 uplink_veb = pf->veb[veb_idx];
10235 break;
10236 }
10237 }
10238 if (!uplink_veb) {
10239 dev_info(&pf->pdev->dev,
10240 "uplink seid %d not found\n", uplink_seid);
10241 return NULL;
10242 }
10243 }
10244
10245 /* get veb sw struct */
10246 veb_idx = i40e_veb_mem_alloc(pf);
10247 if (veb_idx < 0)
10248 goto err_alloc;
10249 veb = pf->veb[veb_idx];
10250 veb->flags = flags;
10251 veb->uplink_seid = uplink_seid;
10252 veb->veb_idx = (uplink_veb ? uplink_veb->idx : I40E_NO_VEB);
10253 veb->enabled_tc = (enabled_tc ? enabled_tc : 0x1);
10254
10255 /* create the VEB in the switch */
10256 ret = i40e_add_veb(veb, pf->vsi[vsi_idx]);
10257 if (ret)
10258 goto err_veb;
10259 if (vsi_idx == pf->lan_vsi)
10260 pf->lan_veb = veb->idx;
10261
10262 return veb;
10263
10264 err_veb:
10265 i40e_veb_clear(veb);
10266 err_alloc:
10267 return NULL;
10268 }
10269
10270 /**
10271 * i40e_setup_pf_switch_element - set PF vars based on switch type
10272 * @pf: board private structure
10273 * @ele: element we are building info from
10274 * @num_reported: total number of elements
10275 * @printconfig: should we print the contents
10276 *
10277 * helper function to assist in extracting a few useful SEID values.
10278 **/
10279 static void i40e_setup_pf_switch_element(struct i40e_pf *pf,
10280 struct i40e_aqc_switch_config_element_resp *ele,
10281 u16 num_reported, bool printconfig)
10282 {
10283 u16 downlink_seid = le16_to_cpu(ele->downlink_seid);
10284 u16 uplink_seid = le16_to_cpu(ele->uplink_seid);
10285 u8 element_type = ele->element_type;
10286 u16 seid = le16_to_cpu(ele->seid);
10287
10288 if (printconfig)
10289 dev_info(&pf->pdev->dev,
10290 "type=%d seid=%d uplink=%d downlink=%d\n",
10291 element_type, seid, uplink_seid, downlink_seid);
10292
10293 switch (element_type) {
10294 case I40E_SWITCH_ELEMENT_TYPE_MAC:
10295 pf->mac_seid = seid;
10296 break;
10297 case I40E_SWITCH_ELEMENT_TYPE_VEB:
10298 /* Main VEB? */
10299 if (uplink_seid != pf->mac_seid)
10300 break;
10301 if (pf->lan_veb == I40E_NO_VEB) {
10302 int v;
10303
10304 /* find existing or else empty VEB */
10305 for (v = 0; v < I40E_MAX_VEB; v++) {
10306 if (pf->veb[v] && (pf->veb[v]->seid == seid)) {
10307 pf->lan_veb = v;
10308 break;
10309 }
10310 }
10311 if (pf->lan_veb == I40E_NO_VEB) {
10312 v = i40e_veb_mem_alloc(pf);
10313 if (v < 0)
10314 break;
10315 pf->lan_veb = v;
10316 }
10317 }
10318
10319 pf->veb[pf->lan_veb]->seid = seid;
10320 pf->veb[pf->lan_veb]->uplink_seid = pf->mac_seid;
10321 pf->veb[pf->lan_veb]->pf = pf;
10322 pf->veb[pf->lan_veb]->veb_idx = I40E_NO_VEB;
10323 break;
10324 case I40E_SWITCH_ELEMENT_TYPE_VSI:
10325 if (num_reported != 1)
10326 break;
10327 /* This is immediately after a reset so we can assume this is
10328 * the PF's VSI
10329 */
10330 pf->mac_seid = uplink_seid;
10331 pf->pf_seid = downlink_seid;
10332 pf->main_vsi_seid = seid;
10333 if (printconfig)
10334 dev_info(&pf->pdev->dev,
10335 "pf_seid=%d main_vsi_seid=%d\n",
10336 pf->pf_seid, pf->main_vsi_seid);
10337 break;
10338 case I40E_SWITCH_ELEMENT_TYPE_PF:
10339 case I40E_SWITCH_ELEMENT_TYPE_VF:
10340 case I40E_SWITCH_ELEMENT_TYPE_EMP:
10341 case I40E_SWITCH_ELEMENT_TYPE_BMC:
10342 case I40E_SWITCH_ELEMENT_TYPE_PE:
10343 case I40E_SWITCH_ELEMENT_TYPE_PA:
10344 /* ignore these for now */
10345 break;
10346 default:
10347 dev_info(&pf->pdev->dev, "unknown element type=%d seid=%d\n",
10348 element_type, seid);
10349 break;
10350 }
10351 }
10352
10353 /**
10354 * i40e_fetch_switch_configuration - Get switch config from firmware
10355 * @pf: board private structure
10356 * @printconfig: should we print the contents
10357 *
10358 * Get the current switch configuration from the device and
10359 * extract a few useful SEID values.
10360 **/
10361 int i40e_fetch_switch_configuration(struct i40e_pf *pf, bool printconfig)
10362 {
10363 struct i40e_aqc_get_switch_config_resp *sw_config;
10364 u16 next_seid = 0;
10365 int ret = 0;
10366 u8 *aq_buf;
10367 int i;
10368
10369 aq_buf = kzalloc(I40E_AQ_LARGE_BUF, GFP_KERNEL);
10370 if (!aq_buf)
10371 return -ENOMEM;
10372
10373 sw_config = (struct i40e_aqc_get_switch_config_resp *)aq_buf;
10374 do {
10375 u16 num_reported, num_total;
10376
10377 ret = i40e_aq_get_switch_config(&pf->hw, sw_config,
10378 I40E_AQ_LARGE_BUF,
10379 &next_seid, NULL);
10380 if (ret) {
10381 dev_info(&pf->pdev->dev,
10382 "get switch config failed err %s aq_err %s\n",
10383 i40e_stat_str(&pf->hw, ret),
10384 i40e_aq_str(&pf->hw,
10385 pf->hw.aq.asq_last_status));
10386 kfree(aq_buf);
10387 return -ENOENT;
10388 }
10389
10390 num_reported = le16_to_cpu(sw_config->header.num_reported);
10391 num_total = le16_to_cpu(sw_config->header.num_total);
10392
10393 if (printconfig)
10394 dev_info(&pf->pdev->dev,
10395 "header: %d reported %d total\n",
10396 num_reported, num_total);
10397
10398 for (i = 0; i < num_reported; i++) {
10399 struct i40e_aqc_switch_config_element_resp *ele =
10400 &sw_config->element[i];
10401
10402 i40e_setup_pf_switch_element(pf, ele, num_reported,
10403 printconfig);
10404 }
10405 } while (next_seid != 0);
10406
10407 kfree(aq_buf);
10408 return ret;
10409 }
10410
10411 /**
10412 * i40e_setup_pf_switch - Setup the HW switch on startup or after reset
10413 * @pf: board private structure
10414 * @reinit: if the Main VSI needs to re-initialized.
10415 *
10416 * Returns 0 on success, negative value on failure
10417 **/
10418 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit)
10419 {
10420 u16 flags = 0;
10421 int ret;
10422
10423 /* find out what's out there already */
10424 ret = i40e_fetch_switch_configuration(pf, false);
10425 if (ret) {
10426 dev_info(&pf->pdev->dev,
10427 "couldn't fetch switch config, err %s aq_err %s\n",
10428 i40e_stat_str(&pf->hw, ret),
10429 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10430 return ret;
10431 }
10432 i40e_pf_reset_stats(pf);
10433
10434 /* set the switch config bit for the whole device to
10435 * support limited promisc or true promisc
10436 * when user requests promisc. The default is limited
10437 * promisc.
10438 */
10439
10440 if ((pf->hw.pf_id == 0) &&
10441 !(pf->flags & I40E_FLAG_TRUE_PROMISC_SUPPORT))
10442 flags = I40E_AQ_SET_SWITCH_CFG_PROMISC;
10443
10444 if (pf->hw.pf_id == 0) {
10445 u16 valid_flags;
10446
10447 valid_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC;
10448 ret = i40e_aq_set_switch_config(&pf->hw, flags, valid_flags,
10449 NULL);
10450 if (ret && pf->hw.aq.asq_last_status != I40E_AQ_RC_ESRCH) {
10451 dev_info(&pf->pdev->dev,
10452 "couldn't set switch config bits, err %s aq_err %s\n",
10453 i40e_stat_str(&pf->hw, ret),
10454 i40e_aq_str(&pf->hw,
10455 pf->hw.aq.asq_last_status));
10456 /* not a fatal problem, just keep going */
10457 }
10458 }
10459
10460 /* first time setup */
10461 if (pf->lan_vsi == I40E_NO_VSI || reinit) {
10462 struct i40e_vsi *vsi = NULL;
10463 u16 uplink_seid;
10464
10465 /* Set up the PF VSI associated with the PF's main VSI
10466 * that is already in the HW switch
10467 */
10468 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
10469 uplink_seid = pf->veb[pf->lan_veb]->seid;
10470 else
10471 uplink_seid = pf->mac_seid;
10472 if (pf->lan_vsi == I40E_NO_VSI)
10473 vsi = i40e_vsi_setup(pf, I40E_VSI_MAIN, uplink_seid, 0);
10474 else if (reinit)
10475 vsi = i40e_vsi_reinit_setup(pf->vsi[pf->lan_vsi]);
10476 if (!vsi) {
10477 dev_info(&pf->pdev->dev, "setup of MAIN VSI failed\n");
10478 i40e_fdir_teardown(pf);
10479 return -EAGAIN;
10480 }
10481 } else {
10482 /* force a reset of TC and queue layout configurations */
10483 u8 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
10484
10485 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
10486 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
10487 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
10488 }
10489 i40e_vlan_stripping_disable(pf->vsi[pf->lan_vsi]);
10490
10491 i40e_fdir_sb_setup(pf);
10492
10493 /* Setup static PF queue filter control settings */
10494 ret = i40e_setup_pf_filter_control(pf);
10495 if (ret) {
10496 dev_info(&pf->pdev->dev, "setup_pf_filter_control failed: %d\n",
10497 ret);
10498 /* Failure here should not stop continuing other steps */
10499 }
10500
10501 /* enable RSS in the HW, even for only one queue, as the stack can use
10502 * the hash
10503 */
10504 if ((pf->flags & I40E_FLAG_RSS_ENABLED))
10505 i40e_pf_config_rss(pf);
10506
10507 /* fill in link information and enable LSE reporting */
10508 i40e_update_link_info(&pf->hw);
10509 i40e_link_event(pf);
10510
10511 /* Initialize user-specific link properties */
10512 pf->fc_autoneg_status = ((pf->hw.phy.link_info.an_info &
10513 I40E_AQ_AN_COMPLETED) ? true : false);
10514
10515 i40e_ptp_init(pf);
10516
10517 return ret;
10518 }
10519
10520 /**
10521 * i40e_determine_queue_usage - Work out queue distribution
10522 * @pf: board private structure
10523 **/
10524 static void i40e_determine_queue_usage(struct i40e_pf *pf)
10525 {
10526 int queues_left;
10527
10528 pf->num_lan_qps = 0;
10529 #ifdef I40E_FCOE
10530 pf->num_fcoe_qps = 0;
10531 #endif
10532
10533 /* Find the max queues to be put into basic use. We'll always be
10534 * using TC0, whether or not DCB is running, and TC0 will get the
10535 * big RSS set.
10536 */
10537 queues_left = pf->hw.func_caps.num_tx_qp;
10538
10539 if ((queues_left == 1) ||
10540 !(pf->flags & I40E_FLAG_MSIX_ENABLED)) {
10541 /* one qp for PF, no queues for anything else */
10542 queues_left = 0;
10543 pf->alloc_rss_size = pf->num_lan_qps = 1;
10544
10545 /* make sure all the fancies are disabled */
10546 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
10547 I40E_FLAG_IWARP_ENABLED |
10548 #ifdef I40E_FCOE
10549 I40E_FLAG_FCOE_ENABLED |
10550 #endif
10551 I40E_FLAG_FD_SB_ENABLED |
10552 I40E_FLAG_FD_ATR_ENABLED |
10553 I40E_FLAG_DCB_CAPABLE |
10554 I40E_FLAG_DCB_ENABLED |
10555 I40E_FLAG_SRIOV_ENABLED |
10556 I40E_FLAG_VMDQ_ENABLED);
10557 } else if (!(pf->flags & (I40E_FLAG_RSS_ENABLED |
10558 I40E_FLAG_FD_SB_ENABLED |
10559 I40E_FLAG_FD_ATR_ENABLED |
10560 I40E_FLAG_DCB_CAPABLE))) {
10561 /* one qp for PF */
10562 pf->alloc_rss_size = pf->num_lan_qps = 1;
10563 queues_left -= pf->num_lan_qps;
10564
10565 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
10566 I40E_FLAG_IWARP_ENABLED |
10567 #ifdef I40E_FCOE
10568 I40E_FLAG_FCOE_ENABLED |
10569 #endif
10570 I40E_FLAG_FD_SB_ENABLED |
10571 I40E_FLAG_FD_ATR_ENABLED |
10572 I40E_FLAG_DCB_ENABLED |
10573 I40E_FLAG_VMDQ_ENABLED);
10574 } else {
10575 /* Not enough queues for all TCs */
10576 if ((pf->flags & I40E_FLAG_DCB_CAPABLE) &&
10577 (queues_left < I40E_MAX_TRAFFIC_CLASS)) {
10578 pf->flags &= ~(I40E_FLAG_DCB_CAPABLE |
10579 I40E_FLAG_DCB_ENABLED);
10580 dev_info(&pf->pdev->dev, "not enough queues for DCB. DCB is disabled.\n");
10581 }
10582 pf->num_lan_qps = max_t(int, pf->rss_size_max,
10583 num_online_cpus());
10584 pf->num_lan_qps = min_t(int, pf->num_lan_qps,
10585 pf->hw.func_caps.num_tx_qp);
10586
10587 queues_left -= pf->num_lan_qps;
10588 }
10589
10590 #ifdef I40E_FCOE
10591 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
10592 if (I40E_DEFAULT_FCOE <= queues_left) {
10593 pf->num_fcoe_qps = I40E_DEFAULT_FCOE;
10594 } else if (I40E_MINIMUM_FCOE <= queues_left) {
10595 pf->num_fcoe_qps = I40E_MINIMUM_FCOE;
10596 } else {
10597 pf->num_fcoe_qps = 0;
10598 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
10599 dev_info(&pf->pdev->dev, "not enough queues for FCoE. FCoE feature will be disabled\n");
10600 }
10601
10602 queues_left -= pf->num_fcoe_qps;
10603 }
10604
10605 #endif
10606 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
10607 if (queues_left > 1) {
10608 queues_left -= 1; /* save 1 queue for FD */
10609 } else {
10610 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
10611 dev_info(&pf->pdev->dev, "not enough queues for Flow Director. Flow Director feature is disabled\n");
10612 }
10613 }
10614
10615 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
10616 pf->num_vf_qps && pf->num_req_vfs && queues_left) {
10617 pf->num_req_vfs = min_t(int, pf->num_req_vfs,
10618 (queues_left / pf->num_vf_qps));
10619 queues_left -= (pf->num_req_vfs * pf->num_vf_qps);
10620 }
10621
10622 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
10623 pf->num_vmdq_vsis && pf->num_vmdq_qps && queues_left) {
10624 pf->num_vmdq_vsis = min_t(int, pf->num_vmdq_vsis,
10625 (queues_left / pf->num_vmdq_qps));
10626 queues_left -= (pf->num_vmdq_vsis * pf->num_vmdq_qps);
10627 }
10628
10629 pf->queues_left = queues_left;
10630 dev_dbg(&pf->pdev->dev,
10631 "qs_avail=%d FD SB=%d lan_qs=%d lan_tc0=%d vf=%d*%d vmdq=%d*%d, remaining=%d\n",
10632 pf->hw.func_caps.num_tx_qp,
10633 !!(pf->flags & I40E_FLAG_FD_SB_ENABLED),
10634 pf->num_lan_qps, pf->alloc_rss_size, pf->num_req_vfs,
10635 pf->num_vf_qps, pf->num_vmdq_vsis, pf->num_vmdq_qps,
10636 queues_left);
10637 #ifdef I40E_FCOE
10638 dev_dbg(&pf->pdev->dev, "fcoe queues = %d\n", pf->num_fcoe_qps);
10639 #endif
10640 }
10641
10642 /**
10643 * i40e_setup_pf_filter_control - Setup PF static filter control
10644 * @pf: PF to be setup
10645 *
10646 * i40e_setup_pf_filter_control sets up a PF's initial filter control
10647 * settings. If PE/FCoE are enabled then it will also set the per PF
10648 * based filter sizes required for them. It also enables Flow director,
10649 * ethertype and macvlan type filter settings for the pf.
10650 *
10651 * Returns 0 on success, negative on failure
10652 **/
10653 static int i40e_setup_pf_filter_control(struct i40e_pf *pf)
10654 {
10655 struct i40e_filter_control_settings *settings = &pf->filter_settings;
10656
10657 settings->hash_lut_size = I40E_HASH_LUT_SIZE_128;
10658
10659 /* Flow Director is enabled */
10660 if (pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED))
10661 settings->enable_fdir = true;
10662
10663 /* Ethtype and MACVLAN filters enabled for PF */
10664 settings->enable_ethtype = true;
10665 settings->enable_macvlan = true;
10666
10667 if (i40e_set_filter_control(&pf->hw, settings))
10668 return -ENOENT;
10669
10670 return 0;
10671 }
10672
10673 #define INFO_STRING_LEN 255
10674 #define REMAIN(__x) (INFO_STRING_LEN - (__x))
10675 static void i40e_print_features(struct i40e_pf *pf)
10676 {
10677 struct i40e_hw *hw = &pf->hw;
10678 char *buf;
10679 int i;
10680
10681 buf = kmalloc(INFO_STRING_LEN, GFP_KERNEL);
10682 if (!buf)
10683 return;
10684
10685 i = snprintf(buf, INFO_STRING_LEN, "Features: PF-id[%d]", hw->pf_id);
10686 #ifdef CONFIG_PCI_IOV
10687 i += snprintf(&buf[i], REMAIN(i), " VFs: %d", pf->num_req_vfs);
10688 #endif
10689 i += snprintf(&buf[i], REMAIN(i), " VSIs: %d QP: %d",
10690 pf->hw.func_caps.num_vsis,
10691 pf->vsi[pf->lan_vsi]->num_queue_pairs);
10692 if (pf->flags & I40E_FLAG_RSS_ENABLED)
10693 i += snprintf(&buf[i], REMAIN(i), " RSS");
10694 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED)
10695 i += snprintf(&buf[i], REMAIN(i), " FD_ATR");
10696 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
10697 i += snprintf(&buf[i], REMAIN(i), " FD_SB");
10698 i += snprintf(&buf[i], REMAIN(i), " NTUPLE");
10699 }
10700 if (pf->flags & I40E_FLAG_DCB_CAPABLE)
10701 i += snprintf(&buf[i], REMAIN(i), " DCB");
10702 i += snprintf(&buf[i], REMAIN(i), " VxLAN");
10703 i += snprintf(&buf[i], REMAIN(i), " Geneve");
10704 if (pf->flags & I40E_FLAG_PTP)
10705 i += snprintf(&buf[i], REMAIN(i), " PTP");
10706 #ifdef I40E_FCOE
10707 if (pf->flags & I40E_FLAG_FCOE_ENABLED)
10708 i += snprintf(&buf[i], REMAIN(i), " FCOE");
10709 #endif
10710 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
10711 i += snprintf(&buf[i], REMAIN(i), " VEB");
10712 else
10713 i += snprintf(&buf[i], REMAIN(i), " VEPA");
10714
10715 dev_info(&pf->pdev->dev, "%s\n", buf);
10716 kfree(buf);
10717 WARN_ON(i > INFO_STRING_LEN);
10718 }
10719
10720 /**
10721 * i40e_get_platform_mac_addr - get platform-specific MAC address
10722 *
10723 * @pdev: PCI device information struct
10724 * @pf: board private structure
10725 *
10726 * Look up the MAC address in Open Firmware on systems that support it,
10727 * and use IDPROM on SPARC if no OF address is found. On return, the
10728 * I40E_FLAG_PF_MAC will be wset in pf->flags if a platform-specific value
10729 * has been selected.
10730 **/
10731 static void i40e_get_platform_mac_addr(struct pci_dev *pdev, struct i40e_pf *pf)
10732 {
10733 pf->flags &= ~I40E_FLAG_PF_MAC;
10734 if (!eth_platform_get_mac_address(&pdev->dev, pf->hw.mac.addr))
10735 pf->flags |= I40E_FLAG_PF_MAC;
10736 }
10737
10738 /**
10739 * i40e_probe - Device initialization routine
10740 * @pdev: PCI device information struct
10741 * @ent: entry in i40e_pci_tbl
10742 *
10743 * i40e_probe initializes a PF identified by a pci_dev structure.
10744 * The OS initialization, configuring of the PF private structure,
10745 * and a hardware reset occur.
10746 *
10747 * Returns 0 on success, negative on failure
10748 **/
10749 static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
10750 {
10751 struct i40e_aq_get_phy_abilities_resp abilities;
10752 struct i40e_pf *pf;
10753 struct i40e_hw *hw;
10754 static u16 pfs_found;
10755 u16 wol_nvm_bits;
10756 u16 link_status;
10757 int err;
10758 u32 val;
10759 u32 i;
10760 u8 set_fc_aq_fail;
10761
10762 err = pci_enable_device_mem(pdev);
10763 if (err)
10764 return err;
10765
10766 /* set up for high or low dma */
10767 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
10768 if (err) {
10769 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
10770 if (err) {
10771 dev_err(&pdev->dev,
10772 "DMA configuration failed: 0x%x\n", err);
10773 goto err_dma;
10774 }
10775 }
10776
10777 /* set up pci connections */
10778 err = pci_request_mem_regions(pdev, i40e_driver_name);
10779 if (err) {
10780 dev_info(&pdev->dev,
10781 "pci_request_selected_regions failed %d\n", err);
10782 goto err_pci_reg;
10783 }
10784
10785 pci_enable_pcie_error_reporting(pdev);
10786 pci_set_master(pdev);
10787
10788 /* Now that we have a PCI connection, we need to do the
10789 * low level device setup. This is primarily setting up
10790 * the Admin Queue structures and then querying for the
10791 * device's current profile information.
10792 */
10793 pf = kzalloc(sizeof(*pf), GFP_KERNEL);
10794 if (!pf) {
10795 err = -ENOMEM;
10796 goto err_pf_alloc;
10797 }
10798 pf->next_vsi = 0;
10799 pf->pdev = pdev;
10800 set_bit(__I40E_DOWN, &pf->state);
10801
10802 hw = &pf->hw;
10803 hw->back = pf;
10804
10805 pf->ioremap_len = min_t(int, pci_resource_len(pdev, 0),
10806 I40E_MAX_CSR_SPACE);
10807
10808 hw->hw_addr = ioremap(pci_resource_start(pdev, 0), pf->ioremap_len);
10809 if (!hw->hw_addr) {
10810 err = -EIO;
10811 dev_info(&pdev->dev, "ioremap(0x%04x, 0x%04x) failed: 0x%x\n",
10812 (unsigned int)pci_resource_start(pdev, 0),
10813 pf->ioremap_len, err);
10814 goto err_ioremap;
10815 }
10816 hw->vendor_id = pdev->vendor;
10817 hw->device_id = pdev->device;
10818 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
10819 hw->subsystem_vendor_id = pdev->subsystem_vendor;
10820 hw->subsystem_device_id = pdev->subsystem_device;
10821 hw->bus.device = PCI_SLOT(pdev->devfn);
10822 hw->bus.func = PCI_FUNC(pdev->devfn);
10823 pf->instance = pfs_found;
10824
10825 /* set up the locks for the AQ, do this only once in probe
10826 * and destroy them only once in remove
10827 */
10828 mutex_init(&hw->aq.asq_mutex);
10829 mutex_init(&hw->aq.arq_mutex);
10830
10831 if (debug != -1) {
10832 pf->msg_enable = pf->hw.debug_mask;
10833 pf->msg_enable = debug;
10834 }
10835
10836 /* do a special CORER for clearing PXE mode once at init */
10837 if (hw->revision_id == 0 &&
10838 (rd32(hw, I40E_GLLAN_RCTL_0) & I40E_GLLAN_RCTL_0_PXE_MODE_MASK)) {
10839 wr32(hw, I40E_GLGEN_RTRIG, I40E_GLGEN_RTRIG_CORER_MASK);
10840 i40e_flush(hw);
10841 msleep(200);
10842 pf->corer_count++;
10843
10844 i40e_clear_pxe_mode(hw);
10845 }
10846
10847 /* Reset here to make sure all is clean and to define PF 'n' */
10848 i40e_clear_hw(hw);
10849 err = i40e_pf_reset(hw);
10850 if (err) {
10851 dev_info(&pdev->dev, "Initial pf_reset failed: %d\n", err);
10852 goto err_pf_reset;
10853 }
10854 pf->pfr_count++;
10855
10856 hw->aq.num_arq_entries = I40E_AQ_LEN;
10857 hw->aq.num_asq_entries = I40E_AQ_LEN;
10858 hw->aq.arq_buf_size = I40E_MAX_AQ_BUF_SIZE;
10859 hw->aq.asq_buf_size = I40E_MAX_AQ_BUF_SIZE;
10860 pf->adminq_work_limit = I40E_AQ_WORK_LIMIT;
10861
10862 snprintf(pf->int_name, sizeof(pf->int_name) - 1,
10863 "%s-%s:misc",
10864 dev_driver_string(&pf->pdev->dev), dev_name(&pdev->dev));
10865
10866 err = i40e_init_shared_code(hw);
10867 if (err) {
10868 dev_warn(&pdev->dev, "unidentified MAC or BLANK NVM: %d\n",
10869 err);
10870 goto err_pf_reset;
10871 }
10872
10873 /* set up a default setting for link flow control */
10874 pf->hw.fc.requested_mode = I40E_FC_NONE;
10875
10876 err = i40e_init_adminq(hw);
10877 if (err) {
10878 if (err == I40E_ERR_FIRMWARE_API_VERSION)
10879 dev_info(&pdev->dev,
10880 "The driver for the device stopped because the NVM image is newer than expected. You must install the most recent version of the network driver.\n");
10881 else
10882 dev_info(&pdev->dev,
10883 "The driver for the device stopped because the device firmware failed to init. Try updating your NVM image.\n");
10884
10885 goto err_pf_reset;
10886 }
10887
10888 /* provide nvm, fw, api versions */
10889 dev_info(&pdev->dev, "fw %d.%d.%05d api %d.%d nvm %s\n",
10890 hw->aq.fw_maj_ver, hw->aq.fw_min_ver, hw->aq.fw_build,
10891 hw->aq.api_maj_ver, hw->aq.api_min_ver,
10892 i40e_nvm_version_str(hw));
10893
10894 if (hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR &&
10895 hw->aq.api_min_ver > I40E_FW_API_VERSION_MINOR)
10896 dev_info(&pdev->dev,
10897 "The driver for the device detected a newer version of the NVM image than expected. Please install the most recent version of the network driver.\n");
10898 else if (hw->aq.api_maj_ver < I40E_FW_API_VERSION_MAJOR ||
10899 hw->aq.api_min_ver < (I40E_FW_API_VERSION_MINOR - 1))
10900 dev_info(&pdev->dev,
10901 "The driver for the device detected an older version of the NVM image than expected. Please update the NVM image.\n");
10902
10903 i40e_verify_eeprom(pf);
10904
10905 /* Rev 0 hardware was never productized */
10906 if (hw->revision_id < 1)
10907 dev_warn(&pdev->dev, "This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\n");
10908
10909 i40e_clear_pxe_mode(hw);
10910 err = i40e_get_capabilities(pf);
10911 if (err)
10912 goto err_adminq_setup;
10913
10914 err = i40e_sw_init(pf);
10915 if (err) {
10916 dev_info(&pdev->dev, "sw_init failed: %d\n", err);
10917 goto err_sw_init;
10918 }
10919
10920 err = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
10921 hw->func_caps.num_rx_qp,
10922 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
10923 if (err) {
10924 dev_info(&pdev->dev, "init_lan_hmc failed: %d\n", err);
10925 goto err_init_lan_hmc;
10926 }
10927
10928 err = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
10929 if (err) {
10930 dev_info(&pdev->dev, "configure_lan_hmc failed: %d\n", err);
10931 err = -ENOENT;
10932 goto err_configure_lan_hmc;
10933 }
10934
10935 /* Disable LLDP for NICs that have firmware versions lower than v4.3.
10936 * Ignore error return codes because if it was already disabled via
10937 * hardware settings this will fail
10938 */
10939 if (pf->flags & I40E_FLAG_STOP_FW_LLDP) {
10940 dev_info(&pdev->dev, "Stopping firmware LLDP agent.\n");
10941 i40e_aq_stop_lldp(hw, true, NULL);
10942 }
10943
10944 i40e_get_mac_addr(hw, hw->mac.addr);
10945 /* allow a platform config to override the HW addr */
10946 i40e_get_platform_mac_addr(pdev, pf);
10947 if (!is_valid_ether_addr(hw->mac.addr)) {
10948 dev_info(&pdev->dev, "invalid MAC address %pM\n", hw->mac.addr);
10949 err = -EIO;
10950 goto err_mac_addr;
10951 }
10952 dev_info(&pdev->dev, "MAC address: %pM\n", hw->mac.addr);
10953 ether_addr_copy(hw->mac.perm_addr, hw->mac.addr);
10954 i40e_get_port_mac_addr(hw, hw->mac.port_addr);
10955 if (is_valid_ether_addr(hw->mac.port_addr))
10956 pf->flags |= I40E_FLAG_PORT_ID_VALID;
10957 #ifdef I40E_FCOE
10958 err = i40e_get_san_mac_addr(hw, hw->mac.san_addr);
10959 if (err)
10960 dev_info(&pdev->dev,
10961 "(non-fatal) SAN MAC retrieval failed: %d\n", err);
10962 if (!is_valid_ether_addr(hw->mac.san_addr)) {
10963 dev_warn(&pdev->dev, "invalid SAN MAC address %pM, falling back to LAN MAC\n",
10964 hw->mac.san_addr);
10965 ether_addr_copy(hw->mac.san_addr, hw->mac.addr);
10966 }
10967 dev_info(&pf->pdev->dev, "SAN MAC: %pM\n", hw->mac.san_addr);
10968 #endif /* I40E_FCOE */
10969
10970 pci_set_drvdata(pdev, pf);
10971 pci_save_state(pdev);
10972 #ifdef CONFIG_I40E_DCB
10973 err = i40e_init_pf_dcb(pf);
10974 if (err) {
10975 dev_info(&pdev->dev, "DCB init failed %d, disabled\n", err);
10976 pf->flags &= ~(I40E_FLAG_DCB_CAPABLE & I40E_FLAG_DCB_ENABLED);
10977 /* Continue without DCB enabled */
10978 }
10979 #endif /* CONFIG_I40E_DCB */
10980
10981 /* set up periodic task facility */
10982 setup_timer(&pf->service_timer, i40e_service_timer, (unsigned long)pf);
10983 pf->service_timer_period = HZ;
10984
10985 INIT_WORK(&pf->service_task, i40e_service_task);
10986 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
10987 pf->flags |= I40E_FLAG_NEED_LINK_UPDATE;
10988
10989 /* NVM bit on means WoL disabled for the port */
10990 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits);
10991 if (BIT (hw->port) & wol_nvm_bits || hw->partition_id != 1)
10992 pf->wol_en = false;
10993 else
10994 pf->wol_en = true;
10995 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en);
10996
10997 /* set up the main switch operations */
10998 i40e_determine_queue_usage(pf);
10999 err = i40e_init_interrupt_scheme(pf);
11000 if (err)
11001 goto err_switch_setup;
11002
11003 /* The number of VSIs reported by the FW is the minimum guaranteed
11004 * to us; HW supports far more and we share the remaining pool with
11005 * the other PFs. We allocate space for more than the guarantee with
11006 * the understanding that we might not get them all later.
11007 */
11008 if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC)
11009 pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC;
11010 else
11011 pf->num_alloc_vsi = pf->hw.func_caps.num_vsis;
11012
11013 /* Set up the *vsi struct and our local tracking of the MAIN PF vsi. */
11014 pf->vsi = kcalloc(pf->num_alloc_vsi, sizeof(struct i40e_vsi *),
11015 GFP_KERNEL);
11016 if (!pf->vsi) {
11017 err = -ENOMEM;
11018 goto err_switch_setup;
11019 }
11020
11021 #ifdef CONFIG_PCI_IOV
11022 /* prep for VF support */
11023 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
11024 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
11025 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
11026 if (pci_num_vf(pdev))
11027 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
11028 }
11029 #endif
11030 err = i40e_setup_pf_switch(pf, false);
11031 if (err) {
11032 dev_info(&pdev->dev, "setup_pf_switch failed: %d\n", err);
11033 goto err_vsis;
11034 }
11035
11036 /* Make sure flow control is set according to current settings */
11037 err = i40e_set_fc(hw, &set_fc_aq_fail, true);
11038 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_GET)
11039 dev_dbg(&pf->pdev->dev,
11040 "Set fc with err %s aq_err %s on get_phy_cap\n",
11041 i40e_stat_str(hw, err),
11042 i40e_aq_str(hw, hw->aq.asq_last_status));
11043 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_SET)
11044 dev_dbg(&pf->pdev->dev,
11045 "Set fc with err %s aq_err %s on set_phy_config\n",
11046 i40e_stat_str(hw, err),
11047 i40e_aq_str(hw, hw->aq.asq_last_status));
11048 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_UPDATE)
11049 dev_dbg(&pf->pdev->dev,
11050 "Set fc with err %s aq_err %s on get_link_info\n",
11051 i40e_stat_str(hw, err),
11052 i40e_aq_str(hw, hw->aq.asq_last_status));
11053
11054 /* if FDIR VSI was set up, start it now */
11055 for (i = 0; i < pf->num_alloc_vsi; i++) {
11056 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
11057 i40e_vsi_open(pf->vsi[i]);
11058 break;
11059 }
11060 }
11061
11062 /* The driver only wants link up/down and module qualification
11063 * reports from firmware. Note the negative logic.
11064 */
11065 err = i40e_aq_set_phy_int_mask(&pf->hw,
11066 ~(I40E_AQ_EVENT_LINK_UPDOWN |
11067 I40E_AQ_EVENT_MEDIA_NA |
11068 I40E_AQ_EVENT_MODULE_QUAL_FAIL), NULL);
11069 if (err)
11070 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
11071 i40e_stat_str(&pf->hw, err),
11072 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
11073
11074 /* Reconfigure hardware for allowing smaller MSS in the case
11075 * of TSO, so that we avoid the MDD being fired and causing
11076 * a reset in the case of small MSS+TSO.
11077 */
11078 val = rd32(hw, I40E_REG_MSS);
11079 if ((val & I40E_REG_MSS_MIN_MASK) > I40E_64BYTE_MSS) {
11080 val &= ~I40E_REG_MSS_MIN_MASK;
11081 val |= I40E_64BYTE_MSS;
11082 wr32(hw, I40E_REG_MSS, val);
11083 }
11084
11085 if (pf->flags & I40E_FLAG_RESTART_AUTONEG) {
11086 msleep(75);
11087 err = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
11088 if (err)
11089 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
11090 i40e_stat_str(&pf->hw, err),
11091 i40e_aq_str(&pf->hw,
11092 pf->hw.aq.asq_last_status));
11093 }
11094 /* The main driver is (mostly) up and happy. We need to set this state
11095 * before setting up the misc vector or we get a race and the vector
11096 * ends up disabled forever.
11097 */
11098 clear_bit(__I40E_DOWN, &pf->state);
11099
11100 /* In case of MSIX we are going to setup the misc vector right here
11101 * to handle admin queue events etc. In case of legacy and MSI
11102 * the misc functionality and queue processing is combined in
11103 * the same vector and that gets setup at open.
11104 */
11105 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
11106 err = i40e_setup_misc_vector(pf);
11107 if (err) {
11108 dev_info(&pdev->dev,
11109 "setup of misc vector failed: %d\n", err);
11110 goto err_vsis;
11111 }
11112 }
11113
11114 #ifdef CONFIG_PCI_IOV
11115 /* prep for VF support */
11116 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
11117 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
11118 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
11119 /* disable link interrupts for VFs */
11120 val = rd32(hw, I40E_PFGEN_PORTMDIO_NUM);
11121 val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK;
11122 wr32(hw, I40E_PFGEN_PORTMDIO_NUM, val);
11123 i40e_flush(hw);
11124
11125 if (pci_num_vf(pdev)) {
11126 dev_info(&pdev->dev,
11127 "Active VFs found, allocating resources.\n");
11128 err = i40e_alloc_vfs(pf, pci_num_vf(pdev));
11129 if (err)
11130 dev_info(&pdev->dev,
11131 "Error %d allocating resources for existing VFs\n",
11132 err);
11133 }
11134 }
11135 #endif /* CONFIG_PCI_IOV */
11136
11137 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
11138 pf->iwarp_base_vector = i40e_get_lump(pf, pf->irq_pile,
11139 pf->num_iwarp_msix,
11140 I40E_IWARP_IRQ_PILE_ID);
11141 if (pf->iwarp_base_vector < 0) {
11142 dev_info(&pdev->dev,
11143 "failed to get tracking for %d vectors for IWARP err=%d\n",
11144 pf->num_iwarp_msix, pf->iwarp_base_vector);
11145 pf->flags &= ~I40E_FLAG_IWARP_ENABLED;
11146 }
11147 }
11148
11149 i40e_dbg_pf_init(pf);
11150
11151 /* tell the firmware that we're starting */
11152 i40e_send_version(pf);
11153
11154 /* since everything's happy, start the service_task timer */
11155 mod_timer(&pf->service_timer,
11156 round_jiffies(jiffies + pf->service_timer_period));
11157
11158 /* add this PF to client device list and launch a client service task */
11159 err = i40e_lan_add_device(pf);
11160 if (err)
11161 dev_info(&pdev->dev, "Failed to add PF to client API service list: %d\n",
11162 err);
11163
11164 #ifdef I40E_FCOE
11165 /* create FCoE interface */
11166 i40e_fcoe_vsi_setup(pf);
11167
11168 #endif
11169 #define PCI_SPEED_SIZE 8
11170 #define PCI_WIDTH_SIZE 8
11171 /* Devices on the IOSF bus do not have this information
11172 * and will report PCI Gen 1 x 1 by default so don't bother
11173 * checking them.
11174 */
11175 if (!(pf->flags & I40E_FLAG_NO_PCI_LINK_CHECK)) {
11176 char speed[PCI_SPEED_SIZE] = "Unknown";
11177 char width[PCI_WIDTH_SIZE] = "Unknown";
11178
11179 /* Get the negotiated link width and speed from PCI config
11180 * space
11181 */
11182 pcie_capability_read_word(pf->pdev, PCI_EXP_LNKSTA,
11183 &link_status);
11184
11185 i40e_set_pci_config_data(hw, link_status);
11186
11187 switch (hw->bus.speed) {
11188 case i40e_bus_speed_8000:
11189 strncpy(speed, "8.0", PCI_SPEED_SIZE); break;
11190 case i40e_bus_speed_5000:
11191 strncpy(speed, "5.0", PCI_SPEED_SIZE); break;
11192 case i40e_bus_speed_2500:
11193 strncpy(speed, "2.5", PCI_SPEED_SIZE); break;
11194 default:
11195 break;
11196 }
11197 switch (hw->bus.width) {
11198 case i40e_bus_width_pcie_x8:
11199 strncpy(width, "8", PCI_WIDTH_SIZE); break;
11200 case i40e_bus_width_pcie_x4:
11201 strncpy(width, "4", PCI_WIDTH_SIZE); break;
11202 case i40e_bus_width_pcie_x2:
11203 strncpy(width, "2", PCI_WIDTH_SIZE); break;
11204 case i40e_bus_width_pcie_x1:
11205 strncpy(width, "1", PCI_WIDTH_SIZE); break;
11206 default:
11207 break;
11208 }
11209
11210 dev_info(&pdev->dev, "PCI-Express: Speed %sGT/s Width x%s\n",
11211 speed, width);
11212
11213 if (hw->bus.width < i40e_bus_width_pcie_x8 ||
11214 hw->bus.speed < i40e_bus_speed_8000) {
11215 dev_warn(&pdev->dev, "PCI-Express bandwidth available for this device may be insufficient for optimal performance.\n");
11216 dev_warn(&pdev->dev, "Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\n");
11217 }
11218 }
11219
11220 /* get the requested speeds from the fw */
11221 err = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, NULL);
11222 if (err)
11223 dev_dbg(&pf->pdev->dev, "get requested speeds ret = %s last_status = %s\n",
11224 i40e_stat_str(&pf->hw, err),
11225 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
11226 pf->hw.phy.link_info.requested_speeds = abilities.link_speed;
11227
11228 /* get the supported phy types from the fw */
11229 err = i40e_aq_get_phy_capabilities(hw, false, true, &abilities, NULL);
11230 if (err)
11231 dev_dbg(&pf->pdev->dev, "get supported phy types ret = %s last_status = %s\n",
11232 i40e_stat_str(&pf->hw, err),
11233 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
11234 pf->hw.phy.phy_types = le32_to_cpu(abilities.phy_type);
11235
11236 /* Add a filter to drop all Flow control frames from any VSI from being
11237 * transmitted. By doing so we stop a malicious VF from sending out
11238 * PAUSE or PFC frames and potentially controlling traffic for other
11239 * PF/VF VSIs.
11240 * The FW can still send Flow control frames if enabled.
11241 */
11242 i40e_add_filter_to_drop_tx_flow_control_frames(&pf->hw,
11243 pf->main_vsi_seid);
11244
11245 if ((pf->hw.device_id == I40E_DEV_ID_10G_BASE_T) ||
11246 (pf->hw.device_id == I40E_DEV_ID_10G_BASE_T4))
11247 pf->flags |= I40E_FLAG_HAVE_10GBASET_PHY;
11248
11249 /* print a string summarizing features */
11250 i40e_print_features(pf);
11251
11252 return 0;
11253
11254 /* Unwind what we've done if something failed in the setup */
11255 err_vsis:
11256 set_bit(__I40E_DOWN, &pf->state);
11257 i40e_clear_interrupt_scheme(pf);
11258 kfree(pf->vsi);
11259 err_switch_setup:
11260 i40e_reset_interrupt_capability(pf);
11261 del_timer_sync(&pf->service_timer);
11262 err_mac_addr:
11263 err_configure_lan_hmc:
11264 (void)i40e_shutdown_lan_hmc(hw);
11265 err_init_lan_hmc:
11266 kfree(pf->qp_pile);
11267 err_sw_init:
11268 err_adminq_setup:
11269 err_pf_reset:
11270 iounmap(hw->hw_addr);
11271 err_ioremap:
11272 kfree(pf);
11273 err_pf_alloc:
11274 pci_disable_pcie_error_reporting(pdev);
11275 pci_release_mem_regions(pdev);
11276 err_pci_reg:
11277 err_dma:
11278 pci_disable_device(pdev);
11279 return err;
11280 }
11281
11282 /**
11283 * i40e_remove - Device removal routine
11284 * @pdev: PCI device information struct
11285 *
11286 * i40e_remove is called by the PCI subsystem to alert the driver
11287 * that is should release a PCI device. This could be caused by a
11288 * Hot-Plug event, or because the driver is going to be removed from
11289 * memory.
11290 **/
11291 static void i40e_remove(struct pci_dev *pdev)
11292 {
11293 struct i40e_pf *pf = pci_get_drvdata(pdev);
11294 struct i40e_hw *hw = &pf->hw;
11295 i40e_status ret_code;
11296 int i;
11297
11298 i40e_dbg_pf_exit(pf);
11299
11300 i40e_ptp_stop(pf);
11301
11302 /* Disable RSS in hw */
11303 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), 0);
11304 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), 0);
11305
11306 /* no more scheduling of any task */
11307 set_bit(__I40E_SUSPENDED, &pf->state);
11308 set_bit(__I40E_DOWN, &pf->state);
11309 if (pf->service_timer.data)
11310 del_timer_sync(&pf->service_timer);
11311 if (pf->service_task.func)
11312 cancel_work_sync(&pf->service_task);
11313
11314 if (pf->flags & I40E_FLAG_SRIOV_ENABLED) {
11315 i40e_free_vfs(pf);
11316 pf->flags &= ~I40E_FLAG_SRIOV_ENABLED;
11317 }
11318
11319 i40e_fdir_teardown(pf);
11320
11321 /* If there is a switch structure or any orphans, remove them.
11322 * This will leave only the PF's VSI remaining.
11323 */
11324 for (i = 0; i < I40E_MAX_VEB; i++) {
11325 if (!pf->veb[i])
11326 continue;
11327
11328 if (pf->veb[i]->uplink_seid == pf->mac_seid ||
11329 pf->veb[i]->uplink_seid == 0)
11330 i40e_switch_branch_release(pf->veb[i]);
11331 }
11332
11333 /* Now we can shutdown the PF's VSI, just before we kill
11334 * adminq and hmc.
11335 */
11336 if (pf->vsi[pf->lan_vsi])
11337 i40e_vsi_release(pf->vsi[pf->lan_vsi]);
11338
11339 /* remove attached clients */
11340 ret_code = i40e_lan_del_device(pf);
11341 if (ret_code) {
11342 dev_warn(&pdev->dev, "Failed to delete client device: %d\n",
11343 ret_code);
11344 }
11345
11346 /* shutdown and destroy the HMC */
11347 if (hw->hmc.hmc_obj) {
11348 ret_code = i40e_shutdown_lan_hmc(hw);
11349 if (ret_code)
11350 dev_warn(&pdev->dev,
11351 "Failed to destroy the HMC resources: %d\n",
11352 ret_code);
11353 }
11354
11355 /* shutdown the adminq */
11356 i40e_shutdown_adminq(hw);
11357
11358 /* destroy the locks only once, here */
11359 mutex_destroy(&hw->aq.arq_mutex);
11360 mutex_destroy(&hw->aq.asq_mutex);
11361
11362 /* Clear all dynamic memory lists of rings, q_vectors, and VSIs */
11363 i40e_clear_interrupt_scheme(pf);
11364 for (i = 0; i < pf->num_alloc_vsi; i++) {
11365 if (pf->vsi[i]) {
11366 i40e_vsi_clear_rings(pf->vsi[i]);
11367 i40e_vsi_clear(pf->vsi[i]);
11368 pf->vsi[i] = NULL;
11369 }
11370 }
11371
11372 for (i = 0; i < I40E_MAX_VEB; i++) {
11373 kfree(pf->veb[i]);
11374 pf->veb[i] = NULL;
11375 }
11376
11377 kfree(pf->qp_pile);
11378 kfree(pf->vsi);
11379
11380 iounmap(hw->hw_addr);
11381 kfree(pf);
11382 pci_release_mem_regions(pdev);
11383
11384 pci_disable_pcie_error_reporting(pdev);
11385 pci_disable_device(pdev);
11386 }
11387
11388 /**
11389 * i40e_pci_error_detected - warning that something funky happened in PCI land
11390 * @pdev: PCI device information struct
11391 *
11392 * Called to warn that something happened and the error handling steps
11393 * are in progress. Allows the driver to quiesce things, be ready for
11394 * remediation.
11395 **/
11396 static pci_ers_result_t i40e_pci_error_detected(struct pci_dev *pdev,
11397 enum pci_channel_state error)
11398 {
11399 struct i40e_pf *pf = pci_get_drvdata(pdev);
11400
11401 dev_info(&pdev->dev, "%s: error %d\n", __func__, error);
11402
11403 if (!pf) {
11404 dev_info(&pdev->dev,
11405 "Cannot recover - error happened during device probe\n");
11406 return PCI_ERS_RESULT_DISCONNECT;
11407 }
11408
11409 /* shutdown all operations */
11410 if (!test_bit(__I40E_SUSPENDED, &pf->state)) {
11411 rtnl_lock();
11412 i40e_prep_for_reset(pf);
11413 rtnl_unlock();
11414 }
11415
11416 /* Request a slot reset */
11417 return PCI_ERS_RESULT_NEED_RESET;
11418 }
11419
11420 /**
11421 * i40e_pci_error_slot_reset - a PCI slot reset just happened
11422 * @pdev: PCI device information struct
11423 *
11424 * Called to find if the driver can work with the device now that
11425 * the pci slot has been reset. If a basic connection seems good
11426 * (registers are readable and have sane content) then return a
11427 * happy little PCI_ERS_RESULT_xxx.
11428 **/
11429 static pci_ers_result_t i40e_pci_error_slot_reset(struct pci_dev *pdev)
11430 {
11431 struct i40e_pf *pf = pci_get_drvdata(pdev);
11432 pci_ers_result_t result;
11433 int err;
11434 u32 reg;
11435
11436 dev_dbg(&pdev->dev, "%s\n", __func__);
11437 if (pci_enable_device_mem(pdev)) {
11438 dev_info(&pdev->dev,
11439 "Cannot re-enable PCI device after reset.\n");
11440 result = PCI_ERS_RESULT_DISCONNECT;
11441 } else {
11442 pci_set_master(pdev);
11443 pci_restore_state(pdev);
11444 pci_save_state(pdev);
11445 pci_wake_from_d3(pdev, false);
11446
11447 reg = rd32(&pf->hw, I40E_GLGEN_RTRIG);
11448 if (reg == 0)
11449 result = PCI_ERS_RESULT_RECOVERED;
11450 else
11451 result = PCI_ERS_RESULT_DISCONNECT;
11452 }
11453
11454 err = pci_cleanup_aer_uncorrect_error_status(pdev);
11455 if (err) {
11456 dev_info(&pdev->dev,
11457 "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n",
11458 err);
11459 /* non-fatal, continue */
11460 }
11461
11462 return result;
11463 }
11464
11465 /**
11466 * i40e_pci_error_resume - restart operations after PCI error recovery
11467 * @pdev: PCI device information struct
11468 *
11469 * Called to allow the driver to bring things back up after PCI error
11470 * and/or reset recovery has finished.
11471 **/
11472 static void i40e_pci_error_resume(struct pci_dev *pdev)
11473 {
11474 struct i40e_pf *pf = pci_get_drvdata(pdev);
11475
11476 dev_dbg(&pdev->dev, "%s\n", __func__);
11477 if (test_bit(__I40E_SUSPENDED, &pf->state))
11478 return;
11479
11480 rtnl_lock();
11481 i40e_handle_reset_warning(pf);
11482 rtnl_unlock();
11483 }
11484
11485 /**
11486 * i40e_shutdown - PCI callback for shutting down
11487 * @pdev: PCI device information struct
11488 **/
11489 static void i40e_shutdown(struct pci_dev *pdev)
11490 {
11491 struct i40e_pf *pf = pci_get_drvdata(pdev);
11492 struct i40e_hw *hw = &pf->hw;
11493
11494 set_bit(__I40E_SUSPENDED, &pf->state);
11495 set_bit(__I40E_DOWN, &pf->state);
11496 rtnl_lock();
11497 i40e_prep_for_reset(pf);
11498 rtnl_unlock();
11499
11500 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
11501 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
11502
11503 del_timer_sync(&pf->service_timer);
11504 cancel_work_sync(&pf->service_task);
11505 i40e_fdir_teardown(pf);
11506
11507 rtnl_lock();
11508 i40e_prep_for_reset(pf);
11509 rtnl_unlock();
11510
11511 wr32(hw, I40E_PFPM_APM,
11512 (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
11513 wr32(hw, I40E_PFPM_WUFC,
11514 (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
11515
11516 i40e_clear_interrupt_scheme(pf);
11517
11518 if (system_state == SYSTEM_POWER_OFF) {
11519 pci_wake_from_d3(pdev, pf->wol_en);
11520 pci_set_power_state(pdev, PCI_D3hot);
11521 }
11522 }
11523
11524 #ifdef CONFIG_PM
11525 /**
11526 * i40e_suspend - PCI callback for moving to D3
11527 * @pdev: PCI device information struct
11528 **/
11529 static int i40e_suspend(struct pci_dev *pdev, pm_message_t state)
11530 {
11531 struct i40e_pf *pf = pci_get_drvdata(pdev);
11532 struct i40e_hw *hw = &pf->hw;
11533 int retval = 0;
11534
11535 set_bit(__I40E_SUSPENDED, &pf->state);
11536 set_bit(__I40E_DOWN, &pf->state);
11537
11538 rtnl_lock();
11539 i40e_prep_for_reset(pf);
11540 rtnl_unlock();
11541
11542 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
11543 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
11544
11545 i40e_stop_misc_vector(pf);
11546
11547 retval = pci_save_state(pdev);
11548 if (retval)
11549 return retval;
11550
11551 pci_wake_from_d3(pdev, pf->wol_en);
11552 pci_set_power_state(pdev, PCI_D3hot);
11553
11554 return retval;
11555 }
11556
11557 /**
11558 * i40e_resume - PCI callback for waking up from D3
11559 * @pdev: PCI device information struct
11560 **/
11561 static int i40e_resume(struct pci_dev *pdev)
11562 {
11563 struct i40e_pf *pf = pci_get_drvdata(pdev);
11564 u32 err;
11565
11566 pci_set_power_state(pdev, PCI_D0);
11567 pci_restore_state(pdev);
11568 /* pci_restore_state() clears dev->state_saves, so
11569 * call pci_save_state() again to restore it.
11570 */
11571 pci_save_state(pdev);
11572
11573 err = pci_enable_device_mem(pdev);
11574 if (err) {
11575 dev_err(&pdev->dev, "Cannot enable PCI device from suspend\n");
11576 return err;
11577 }
11578 pci_set_master(pdev);
11579
11580 /* no wakeup events while running */
11581 pci_wake_from_d3(pdev, false);
11582
11583 /* handling the reset will rebuild the device state */
11584 if (test_and_clear_bit(__I40E_SUSPENDED, &pf->state)) {
11585 clear_bit(__I40E_DOWN, &pf->state);
11586 rtnl_lock();
11587 i40e_reset_and_rebuild(pf, false);
11588 rtnl_unlock();
11589 }
11590
11591 return 0;
11592 }
11593
11594 #endif
11595 static const struct pci_error_handlers i40e_err_handler = {
11596 .error_detected = i40e_pci_error_detected,
11597 .slot_reset = i40e_pci_error_slot_reset,
11598 .resume = i40e_pci_error_resume,
11599 };
11600
11601 static struct pci_driver i40e_driver = {
11602 .name = i40e_driver_name,
11603 .id_table = i40e_pci_tbl,
11604 .probe = i40e_probe,
11605 .remove = i40e_remove,
11606 #ifdef CONFIG_PM
11607 .suspend = i40e_suspend,
11608 .resume = i40e_resume,
11609 #endif
11610 .shutdown = i40e_shutdown,
11611 .err_handler = &i40e_err_handler,
11612 .sriov_configure = i40e_pci_sriov_configure,
11613 };
11614
11615 /**
11616 * i40e_init_module - Driver registration routine
11617 *
11618 * i40e_init_module is the first routine called when the driver is
11619 * loaded. All it does is register with the PCI subsystem.
11620 **/
11621 static int __init i40e_init_module(void)
11622 {
11623 pr_info("%s: %s - version %s\n", i40e_driver_name,
11624 i40e_driver_string, i40e_driver_version_str);
11625 pr_info("%s: %s\n", i40e_driver_name, i40e_copyright);
11626
11627 /* we will see if single thread per module is enough for now,
11628 * it can't be any worse than using the system workqueue which
11629 * was already single threaded
11630 */
11631 i40e_wq = alloc_workqueue("%s", WQ_UNBOUND | WQ_MEM_RECLAIM, 1,
11632 i40e_driver_name);
11633 if (!i40e_wq) {
11634 pr_err("%s: Failed to create workqueue\n", i40e_driver_name);
11635 return -ENOMEM;
11636 }
11637
11638 i40e_dbg_init();
11639 return pci_register_driver(&i40e_driver);
11640 }
11641 module_init(i40e_init_module);
11642
11643 /**
11644 * i40e_exit_module - Driver exit cleanup routine
11645 *
11646 * i40e_exit_module is called just before the driver is removed
11647 * from memory.
11648 **/
11649 static void __exit i40e_exit_module(void)
11650 {
11651 pci_unregister_driver(&i40e_driver);
11652 destroy_workqueue(i40e_wq);
11653 i40e_dbg_exit();
11654 }
11655 module_exit(i40e_exit_module);
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