]> git.proxmox.com Git - mirror_ubuntu-zesty-kernel.git/blob - drivers/net/ethernet/intel/i40e/i40e_main.c
projects / mirror_ubuntu-zesty-kernel.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
blame | history | raw | HEAD
Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net
[mirror_ubuntu-zesty-kernel.git] / drivers / net / ethernet / intel / i40e / i40e_main.c
1 /*******************************************************************************
2 *
3 * Intel Ethernet Controller XL710 Family Linux Driver
4 * Copyright(c) 2013 - 2016 Intel Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
17 *
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
20 *
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 ******************************************************************************/
26
27 #include <linux/etherdevice.h>
28 #include <linux/of_net.h>
29 #include <linux/pci.h>
30
31 /* Local includes */
32 #include "i40e.h"
33 #include "i40e_diag.h"
34 #include <net/udp_tunnel.h>
35
36 const char i40e_driver_name[] = "i40e";
37 static const char i40e_driver_string[] =
38 "Intel(R) Ethernet Connection XL710 Network Driver";
39
40 #define DRV_KERN "-k"
41
42 #define DRV_VERSION_MAJOR 1
43 #define DRV_VERSION_MINOR 6
44 #define DRV_VERSION_BUILD 21
45 #define DRV_VERSION __stringify(DRV_VERSION_MAJOR) "." \
46 __stringify(DRV_VERSION_MINOR) "." \
47 __stringify(DRV_VERSION_BUILD) DRV_KERN
48 const char i40e_driver_version_str[] = DRV_VERSION;
49 static const char i40e_copyright[] = "Copyright (c) 2013 - 2014 Intel Corporation.";
50
51 /* a bit of forward declarations */
52 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi);
53 static void i40e_handle_reset_warning(struct i40e_pf *pf);
54 static int i40e_add_vsi(struct i40e_vsi *vsi);
55 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi);
56 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit);
57 static int i40e_setup_misc_vector(struct i40e_pf *pf);
58 static void i40e_determine_queue_usage(struct i40e_pf *pf);
59 static int i40e_setup_pf_filter_control(struct i40e_pf *pf);
60 static void i40e_fdir_sb_setup(struct i40e_pf *pf);
61 static int i40e_veb_get_bw_info(struct i40e_veb *veb);
62
63 /* i40e_pci_tbl - PCI Device ID Table
64 *
65 * Last entry must be all 0s
66 *
67 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
68 * Class, Class Mask, private data (not used) }
69 */
70 static const struct pci_device_id i40e_pci_tbl[] = {
71 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_XL710), 0},
72 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QEMU), 0},
73 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_B), 0},
74 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_C), 0},
75 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_A), 0},
76 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_B), 0},
77 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_C), 0},
78 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T), 0},
79 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T4), 0},
80 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0},
81 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_X722), 0},
82 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_X722), 0},
83 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_X722), 0},
84 {PCI_VDEVICE(INTEL, I40E_DEV_ID_1G_BASE_T_X722), 0},
85 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T_X722), 0},
86 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_I_X722), 0},
87 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0},
88 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2_A), 0},
89 /* required last entry */
90 {0, }
91 };
92 MODULE_DEVICE_TABLE(pci, i40e_pci_tbl);
93
94 #define I40E_MAX_VF_COUNT 128
95 static int debug = -1;
96 module_param(debug, uint, 0);
97 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all), Debug mask (0x8XXXXXXX)");
98
99 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
100 MODULE_DESCRIPTION("Intel(R) Ethernet Connection XL710 Network Driver");
101 MODULE_LICENSE("GPL");
102 MODULE_VERSION(DRV_VERSION);
103
104 static struct workqueue_struct *i40e_wq;
105
106 /**
107 * i40e_allocate_dma_mem_d - OS specific memory alloc for shared code
108 * @hw: pointer to the HW structure
109 * @mem: ptr to mem struct to fill out
110 * @size: size of memory requested
111 * @alignment: what to align the allocation to
112 **/
113 int i40e_allocate_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem,
114 u64 size, u32 alignment)
115 {
116 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
117
118 mem->size = ALIGN(size, alignment);
119 mem->va = dma_zalloc_coherent(&pf->pdev->dev, mem->size,
120 &mem->pa, GFP_KERNEL);
121 if (!mem->va)
122 return -ENOMEM;
123
124 return 0;
125 }
126
127 /**
128 * i40e_free_dma_mem_d - OS specific memory free for shared code
129 * @hw: pointer to the HW structure
130 * @mem: ptr to mem struct to free
131 **/
132 int i40e_free_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem)
133 {
134 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
135
136 dma_free_coherent(&pf->pdev->dev, mem->size, mem->va, mem->pa);
137 mem->va = NULL;
138 mem->pa = 0;
139 mem->size = 0;
140
141 return 0;
142 }
143
144 /**
145 * i40e_allocate_virt_mem_d - OS specific memory alloc for shared code
146 * @hw: pointer to the HW structure
147 * @mem: ptr to mem struct to fill out
148 * @size: size of memory requested
149 **/
150 int i40e_allocate_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem,
151 u32 size)
152 {
153 mem->size = size;
154 mem->va = kzalloc(size, GFP_KERNEL);
155
156 if (!mem->va)
157 return -ENOMEM;
158
159 return 0;
160 }
161
162 /**
163 * i40e_free_virt_mem_d - OS specific memory free for shared code
164 * @hw: pointer to the HW structure
165 * @mem: ptr to mem struct to free
166 **/
167 int i40e_free_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem)
168 {
169 /* it's ok to kfree a NULL pointer */
170 kfree(mem->va);
171 mem->va = NULL;
172 mem->size = 0;
173
174 return 0;
175 }
176
177 /**
178 * i40e_get_lump - find a lump of free generic resource
179 * @pf: board private structure
180 * @pile: the pile of resource to search
181 * @needed: the number of items needed
182 * @id: an owner id to stick on the items assigned
183 *
184 * Returns the base item index of the lump, or negative for error
185 *
186 * The search_hint trick and lack of advanced fit-finding only work
187 * because we're highly likely to have all the same size lump requests.
188 * Linear search time and any fragmentation should be minimal.
189 **/
190 static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile,
191 u16 needed, u16 id)
192 {
193 int ret = -ENOMEM;
194 int i, j;
195
196 if (!pile || needed == 0 || id >= I40E_PILE_VALID_BIT) {
197 dev_info(&pf->pdev->dev,
198 "param err: pile=%p needed=%d id=0x%04x\n",
199 pile, needed, id);
200 return -EINVAL;
201 }
202
203 /* start the linear search with an imperfect hint */
204 i = pile->search_hint;
205 while (i < pile->num_entries) {
206 /* skip already allocated entries */
207 if (pile->list[i] & I40E_PILE_VALID_BIT) {
208 i++;
209 continue;
210 }
211
212 /* do we have enough in this lump? */
213 for (j = 0; (j < needed) && ((i+j) < pile->num_entries); j++) {
214 if (pile->list[i+j] & I40E_PILE_VALID_BIT)
215 break;
216 }
217
218 if (j == needed) {
219 /* there was enough, so assign it to the requestor */
220 for (j = 0; j < needed; j++)
221 pile->list[i+j] = id | I40E_PILE_VALID_BIT;
222 ret = i;
223 pile->search_hint = i + j;
224 break;
225 }
226
227 /* not enough, so skip over it and continue looking */
228 i += j;
229 }
230
231 return ret;
232 }
233
234 /**
235 * i40e_put_lump - return a lump of generic resource
236 * @pile: the pile of resource to search
237 * @index: the base item index
238 * @id: the owner id of the items assigned
239 *
240 * Returns the count of items in the lump
241 **/
242 static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id)
243 {
244 int valid_id = (id | I40E_PILE_VALID_BIT);
245 int count = 0;
246 int i;
247
248 if (!pile || index >= pile->num_entries)
249 return -EINVAL;
250
251 for (i = index;
252 i < pile->num_entries && pile->list[i] == valid_id;
253 i++) {
254 pile->list[i] = 0;
255 count++;
256 }
257
258 if (count && index < pile->search_hint)
259 pile->search_hint = index;
260
261 return count;
262 }
263
264 /**
265 * i40e_find_vsi_from_id - searches for the vsi with the given id
266 * @pf - the pf structure to search for the vsi
267 * @id - id of the vsi it is searching for
268 **/
269 struct i40e_vsi *i40e_find_vsi_from_id(struct i40e_pf *pf, u16 id)
270 {
271 int i;
272
273 for (i = 0; i < pf->num_alloc_vsi; i++)
274 if (pf->vsi[i] && (pf->vsi[i]->id == id))
275 return pf->vsi[i];
276
277 return NULL;
278 }
279
280 /**
281 * i40e_service_event_schedule - Schedule the service task to wake up
282 * @pf: board private structure
283 *
284 * If not already scheduled, this puts the task into the work queue
285 **/
286 void i40e_service_event_schedule(struct i40e_pf *pf)
287 {
288 if (!test_bit(__I40E_DOWN, &pf->state) &&
289 !test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state) &&
290 !test_and_set_bit(__I40E_SERVICE_SCHED, &pf->state))
291 queue_work(i40e_wq, &pf->service_task);
292 }
293
294 /**
295 * i40e_tx_timeout - Respond to a Tx Hang
296 * @netdev: network interface device structure
297 *
298 * If any port has noticed a Tx timeout, it is likely that the whole
299 * device is munged, not just the one netdev port, so go for the full
300 * reset.
301 **/
302 #ifdef I40E_FCOE
303 void i40e_tx_timeout(struct net_device *netdev)
304 #else
305 static void i40e_tx_timeout(struct net_device *netdev)
306 #endif
307 {
308 struct i40e_netdev_priv *np = netdev_priv(netdev);
309 struct i40e_vsi *vsi = np->vsi;
310 struct i40e_pf *pf = vsi->back;
311 struct i40e_ring *tx_ring = NULL;
312 unsigned int i, hung_queue = 0;
313 u32 head, val;
314
315 pf->tx_timeout_count++;
316
317 /* find the stopped queue the same way the stack does */
318 for (i = 0; i < netdev->num_tx_queues; i++) {
319 struct netdev_queue *q;
320 unsigned long trans_start;
321
322 q = netdev_get_tx_queue(netdev, i);
323 trans_start = q->trans_start;
324 if (netif_xmit_stopped(q) &&
325 time_after(jiffies,
326 (trans_start + netdev->watchdog_timeo))) {
327 hung_queue = i;
328 break;
329 }
330 }
331
332 if (i == netdev->num_tx_queues) {
333 netdev_info(netdev, "tx_timeout: no netdev hung queue found\n");
334 } else {
335 /* now that we have an index, find the tx_ring struct */
336 for (i = 0; i < vsi->num_queue_pairs; i++) {
337 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) {
338 if (hung_queue ==
339 vsi->tx_rings[i]->queue_index) {
340 tx_ring = vsi->tx_rings[i];
341 break;
342 }
343 }
344 }
345 }
346
347 if (time_after(jiffies, (pf->tx_timeout_last_recovery + HZ*20)))
348 pf->tx_timeout_recovery_level = 1; /* reset after some time */
349 else if (time_before(jiffies,
350 (pf->tx_timeout_last_recovery + netdev->watchdog_timeo)))
351 return; /* don't do any new action before the next timeout */
352
353 if (tx_ring) {
354 head = i40e_get_head(tx_ring);
355 /* Read interrupt register */
356 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
357 val = rd32(&pf->hw,
358 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx +
359 tx_ring->vsi->base_vector - 1));
360 else
361 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
362
363 netdev_info(netdev, "tx_timeout: VSI_seid: %d, Q %d, NTC: 0x%x, HWB: 0x%x, NTU: 0x%x, TAIL: 0x%x, INT: 0x%x\n",
364 vsi->seid, hung_queue, tx_ring->next_to_clean,
365 head, tx_ring->next_to_use,
366 readl(tx_ring->tail), val);
367 }
368
369 pf->tx_timeout_last_recovery = jiffies;
370 netdev_info(netdev, "tx_timeout recovery level %d, hung_queue %d\n",
371 pf->tx_timeout_recovery_level, hung_queue);
372
373 switch (pf->tx_timeout_recovery_level) {
374 case 1:
375 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
376 break;
377 case 2:
378 set_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
379 break;
380 case 3:
381 set_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
382 break;
383 default:
384 netdev_err(netdev, "tx_timeout recovery unsuccessful\n");
385 break;
386 }
387
388 i40e_service_event_schedule(pf);
389 pf->tx_timeout_recovery_level++;
390 }
391
392 /**
393 * i40e_get_vsi_stats_struct - Get System Network Statistics
394 * @vsi: the VSI we care about
395 *
396 * Returns the address of the device statistics structure.
397 * The statistics are actually updated from the service task.
398 **/
399 struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi)
400 {
401 return &vsi->net_stats;
402 }
403
404 /**
405 * i40e_get_netdev_stats_struct - Get statistics for netdev interface
406 * @netdev: network interface device structure
407 *
408 * Returns the address of the device statistics structure.
409 * The statistics are actually updated from the service task.
410 **/
411 #ifdef I40E_FCOE
412 struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
413 struct net_device *netdev,
414 struct rtnl_link_stats64 *stats)
415 #else
416 static struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
417 struct net_device *netdev,
418 struct rtnl_link_stats64 *stats)
419 #endif
420 {
421 struct i40e_netdev_priv *np = netdev_priv(netdev);
422 struct i40e_ring *tx_ring, *rx_ring;
423 struct i40e_vsi *vsi = np->vsi;
424 struct rtnl_link_stats64 *vsi_stats = i40e_get_vsi_stats_struct(vsi);
425 int i;
426
427 if (test_bit(__I40E_DOWN, &vsi->state))
428 return stats;
429
430 if (!vsi->tx_rings)
431 return stats;
432
433 rcu_read_lock();
434 for (i = 0; i < vsi->num_queue_pairs; i++) {
435 u64 bytes, packets;
436 unsigned int start;
437
438 tx_ring = ACCESS_ONCE(vsi->tx_rings[i]);
439 if (!tx_ring)
440 continue;
441
442 do {
443 start = u64_stats_fetch_begin_irq(&tx_ring->syncp);
444 packets = tx_ring->stats.packets;
445 bytes = tx_ring->stats.bytes;
446 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start));
447
448 stats->tx_packets += packets;
449 stats->tx_bytes += bytes;
450 rx_ring = &tx_ring[1];
451
452 do {
453 start = u64_stats_fetch_begin_irq(&rx_ring->syncp);
454 packets = rx_ring->stats.packets;
455 bytes = rx_ring->stats.bytes;
456 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start));
457
458 stats->rx_packets += packets;
459 stats->rx_bytes += bytes;
460 }
461 rcu_read_unlock();
462
463 /* following stats updated by i40e_watchdog_subtask() */
464 stats->multicast = vsi_stats->multicast;
465 stats->tx_errors = vsi_stats->tx_errors;
466 stats->tx_dropped = vsi_stats->tx_dropped;
467 stats->rx_errors = vsi_stats->rx_errors;
468 stats->rx_dropped = vsi_stats->rx_dropped;
469 stats->rx_crc_errors = vsi_stats->rx_crc_errors;
470 stats->rx_length_errors = vsi_stats->rx_length_errors;
471
472 return stats;
473 }
474
475 /**
476 * i40e_vsi_reset_stats - Resets all stats of the given vsi
477 * @vsi: the VSI to have its stats reset
478 **/
479 void i40e_vsi_reset_stats(struct i40e_vsi *vsi)
480 {
481 struct rtnl_link_stats64 *ns;
482 int i;
483
484 if (!vsi)
485 return;
486
487 ns = i40e_get_vsi_stats_struct(vsi);
488 memset(ns, 0, sizeof(*ns));
489 memset(&vsi->net_stats_offsets, 0, sizeof(vsi->net_stats_offsets));
490 memset(&vsi->eth_stats, 0, sizeof(vsi->eth_stats));
491 memset(&vsi->eth_stats_offsets, 0, sizeof(vsi->eth_stats_offsets));
492 if (vsi->rx_rings && vsi->rx_rings[0]) {
493 for (i = 0; i < vsi->num_queue_pairs; i++) {
494 memset(&vsi->rx_rings[i]->stats, 0,
495 sizeof(vsi->rx_rings[i]->stats));
496 memset(&vsi->rx_rings[i]->rx_stats, 0,
497 sizeof(vsi->rx_rings[i]->rx_stats));
498 memset(&vsi->tx_rings[i]->stats, 0,
499 sizeof(vsi->tx_rings[i]->stats));
500 memset(&vsi->tx_rings[i]->tx_stats, 0,
501 sizeof(vsi->tx_rings[i]->tx_stats));
502 }
503 }
504 vsi->stat_offsets_loaded = false;
505 }
506
507 /**
508 * i40e_pf_reset_stats - Reset all of the stats for the given PF
509 * @pf: the PF to be reset
510 **/
511 void i40e_pf_reset_stats(struct i40e_pf *pf)
512 {
513 int i;
514
515 memset(&pf->stats, 0, sizeof(pf->stats));
516 memset(&pf->stats_offsets, 0, sizeof(pf->stats_offsets));
517 pf->stat_offsets_loaded = false;
518
519 for (i = 0; i < I40E_MAX_VEB; i++) {
520 if (pf->veb[i]) {
521 memset(&pf->veb[i]->stats, 0,
522 sizeof(pf->veb[i]->stats));
523 memset(&pf->veb[i]->stats_offsets, 0,
524 sizeof(pf->veb[i]->stats_offsets));
525 pf->veb[i]->stat_offsets_loaded = false;
526 }
527 }
528 pf->hw_csum_rx_error = 0;
529 }
530
531 /**
532 * i40e_stat_update48 - read and update a 48 bit stat from the chip
533 * @hw: ptr to the hardware info
534 * @hireg: the high 32 bit reg to read
535 * @loreg: the low 32 bit reg to read
536 * @offset_loaded: has the initial offset been loaded yet
537 * @offset: ptr to current offset value
538 * @stat: ptr to the stat
539 *
540 * Since the device stats are not reset at PFReset, they likely will not
541 * be zeroed when the driver starts. We'll save the first values read
542 * and use them as offsets to be subtracted from the raw values in order
543 * to report stats that count from zero. In the process, we also manage
544 * the potential roll-over.
545 **/
546 static void i40e_stat_update48(struct i40e_hw *hw, u32 hireg, u32 loreg,
547 bool offset_loaded, u64 *offset, u64 *stat)
548 {
549 u64 new_data;
550
551 if (hw->device_id == I40E_DEV_ID_QEMU) {
552 new_data = rd32(hw, loreg);
553 new_data |= ((u64)(rd32(hw, hireg) & 0xFFFF)) << 32;
554 } else {
555 new_data = rd64(hw, loreg);
556 }
557 if (!offset_loaded)
558 *offset = new_data;
559 if (likely(new_data >= *offset))
560 *stat = new_data - *offset;
561 else
562 *stat = (new_data + BIT_ULL(48)) - *offset;
563 *stat &= 0xFFFFFFFFFFFFULL;
564 }
565
566 /**
567 * i40e_stat_update32 - read and update a 32 bit stat from the chip
568 * @hw: ptr to the hardware info
569 * @reg: the hw reg to read
570 * @offset_loaded: has the initial offset been loaded yet
571 * @offset: ptr to current offset value
572 * @stat: ptr to the stat
573 **/
574 static void i40e_stat_update32(struct i40e_hw *hw, u32 reg,
575 bool offset_loaded, u64 *offset, u64 *stat)
576 {
577 u32 new_data;
578
579 new_data = rd32(hw, reg);
580 if (!offset_loaded)
581 *offset = new_data;
582 if (likely(new_data >= *offset))
583 *stat = (u32)(new_data - *offset);
584 else
585 *stat = (u32)((new_data + BIT_ULL(32)) - *offset);
586 }
587
588 /**
589 * i40e_update_eth_stats - Update VSI-specific ethernet statistics counters.
590 * @vsi: the VSI to be updated
591 **/
592 void i40e_update_eth_stats(struct i40e_vsi *vsi)
593 {
594 int stat_idx = le16_to_cpu(vsi->info.stat_counter_idx);
595 struct i40e_pf *pf = vsi->back;
596 struct i40e_hw *hw = &pf->hw;
597 struct i40e_eth_stats *oes;
598 struct i40e_eth_stats *es; /* device's eth stats */
599
600 es = &vsi->eth_stats;
601 oes = &vsi->eth_stats_offsets;
602
603 /* Gather up the stats that the hw collects */
604 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
605 vsi->stat_offsets_loaded,
606 &oes->tx_errors, &es->tx_errors);
607 i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx),
608 vsi->stat_offsets_loaded,
609 &oes->rx_discards, &es->rx_discards);
610 i40e_stat_update32(hw, I40E_GLV_RUPP(stat_idx),
611 vsi->stat_offsets_loaded,
612 &oes->rx_unknown_protocol, &es->rx_unknown_protocol);
613 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
614 vsi->stat_offsets_loaded,
615 &oes->tx_errors, &es->tx_errors);
616
617 i40e_stat_update48(hw, I40E_GLV_GORCH(stat_idx),
618 I40E_GLV_GORCL(stat_idx),
619 vsi->stat_offsets_loaded,
620 &oes->rx_bytes, &es->rx_bytes);
621 i40e_stat_update48(hw, I40E_GLV_UPRCH(stat_idx),
622 I40E_GLV_UPRCL(stat_idx),
623 vsi->stat_offsets_loaded,
624 &oes->rx_unicast, &es->rx_unicast);
625 i40e_stat_update48(hw, I40E_GLV_MPRCH(stat_idx),
626 I40E_GLV_MPRCL(stat_idx),
627 vsi->stat_offsets_loaded,
628 &oes->rx_multicast, &es->rx_multicast);
629 i40e_stat_update48(hw, I40E_GLV_BPRCH(stat_idx),
630 I40E_GLV_BPRCL(stat_idx),
631 vsi->stat_offsets_loaded,
632 &oes->rx_broadcast, &es->rx_broadcast);
633
634 i40e_stat_update48(hw, I40E_GLV_GOTCH(stat_idx),
635 I40E_GLV_GOTCL(stat_idx),
636 vsi->stat_offsets_loaded,
637 &oes->tx_bytes, &es->tx_bytes);
638 i40e_stat_update48(hw, I40E_GLV_UPTCH(stat_idx),
639 I40E_GLV_UPTCL(stat_idx),
640 vsi->stat_offsets_loaded,
641 &oes->tx_unicast, &es->tx_unicast);
642 i40e_stat_update48(hw, I40E_GLV_MPTCH(stat_idx),
643 I40E_GLV_MPTCL(stat_idx),
644 vsi->stat_offsets_loaded,
645 &oes->tx_multicast, &es->tx_multicast);
646 i40e_stat_update48(hw, I40E_GLV_BPTCH(stat_idx),
647 I40E_GLV_BPTCL(stat_idx),
648 vsi->stat_offsets_loaded,
649 &oes->tx_broadcast, &es->tx_broadcast);
650 vsi->stat_offsets_loaded = true;
651 }
652
653 /**
654 * i40e_update_veb_stats - Update Switch component statistics
655 * @veb: the VEB being updated
656 **/
657 static void i40e_update_veb_stats(struct i40e_veb *veb)
658 {
659 struct i40e_pf *pf = veb->pf;
660 struct i40e_hw *hw = &pf->hw;
661 struct i40e_eth_stats *oes;
662 struct i40e_eth_stats *es; /* device's eth stats */
663 struct i40e_veb_tc_stats *veb_oes;
664 struct i40e_veb_tc_stats *veb_es;
665 int i, idx = 0;
666
667 idx = veb->stats_idx;
668 es = &veb->stats;
669 oes = &veb->stats_offsets;
670 veb_es = &veb->tc_stats;
671 veb_oes = &veb->tc_stats_offsets;
672
673 /* Gather up the stats that the hw collects */
674 i40e_stat_update32(hw, I40E_GLSW_TDPC(idx),
675 veb->stat_offsets_loaded,
676 &oes->tx_discards, &es->tx_discards);
677 if (hw->revision_id > 0)
678 i40e_stat_update32(hw, I40E_GLSW_RUPP(idx),
679 veb->stat_offsets_loaded,
680 &oes->rx_unknown_protocol,
681 &es->rx_unknown_protocol);
682 i40e_stat_update48(hw, I40E_GLSW_GORCH(idx), I40E_GLSW_GORCL(idx),
683 veb->stat_offsets_loaded,
684 &oes->rx_bytes, &es->rx_bytes);
685 i40e_stat_update48(hw, I40E_GLSW_UPRCH(idx), I40E_GLSW_UPRCL(idx),
686 veb->stat_offsets_loaded,
687 &oes->rx_unicast, &es->rx_unicast);
688 i40e_stat_update48(hw, I40E_GLSW_MPRCH(idx), I40E_GLSW_MPRCL(idx),
689 veb->stat_offsets_loaded,
690 &oes->rx_multicast, &es->rx_multicast);
691 i40e_stat_update48(hw, I40E_GLSW_BPRCH(idx), I40E_GLSW_BPRCL(idx),
692 veb->stat_offsets_loaded,
693 &oes->rx_broadcast, &es->rx_broadcast);
694
695 i40e_stat_update48(hw, I40E_GLSW_GOTCH(idx), I40E_GLSW_GOTCL(idx),
696 veb->stat_offsets_loaded,
697 &oes->tx_bytes, &es->tx_bytes);
698 i40e_stat_update48(hw, I40E_GLSW_UPTCH(idx), I40E_GLSW_UPTCL(idx),
699 veb->stat_offsets_loaded,
700 &oes->tx_unicast, &es->tx_unicast);
701 i40e_stat_update48(hw, I40E_GLSW_MPTCH(idx), I40E_GLSW_MPTCL(idx),
702 veb->stat_offsets_loaded,
703 &oes->tx_multicast, &es->tx_multicast);
704 i40e_stat_update48(hw, I40E_GLSW_BPTCH(idx), I40E_GLSW_BPTCL(idx),
705 veb->stat_offsets_loaded,
706 &oes->tx_broadcast, &es->tx_broadcast);
707 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
708 i40e_stat_update48(hw, I40E_GLVEBTC_RPCH(i, idx),
709 I40E_GLVEBTC_RPCL(i, idx),
710 veb->stat_offsets_loaded,
711 &veb_oes->tc_rx_packets[i],
712 &veb_es->tc_rx_packets[i]);
713 i40e_stat_update48(hw, I40E_GLVEBTC_RBCH(i, idx),
714 I40E_GLVEBTC_RBCL(i, idx),
715 veb->stat_offsets_loaded,
716 &veb_oes->tc_rx_bytes[i],
717 &veb_es->tc_rx_bytes[i]);
718 i40e_stat_update48(hw, I40E_GLVEBTC_TPCH(i, idx),
719 I40E_GLVEBTC_TPCL(i, idx),
720 veb->stat_offsets_loaded,
721 &veb_oes->tc_tx_packets[i],
722 &veb_es->tc_tx_packets[i]);
723 i40e_stat_update48(hw, I40E_GLVEBTC_TBCH(i, idx),
724 I40E_GLVEBTC_TBCL(i, idx),
725 veb->stat_offsets_loaded,
726 &veb_oes->tc_tx_bytes[i],
727 &veb_es->tc_tx_bytes[i]);
728 }
729 veb->stat_offsets_loaded = true;
730 }
731
732 #ifdef I40E_FCOE
733 /**
734 * i40e_update_fcoe_stats - Update FCoE-specific ethernet statistics counters.
735 * @vsi: the VSI that is capable of doing FCoE
736 **/
737 static void i40e_update_fcoe_stats(struct i40e_vsi *vsi)
738 {
739 struct i40e_pf *pf = vsi->back;
740 struct i40e_hw *hw = &pf->hw;
741 struct i40e_fcoe_stats *ofs;
742 struct i40e_fcoe_stats *fs; /* device's eth stats */
743 int idx;
744
745 if (vsi->type != I40E_VSI_FCOE)
746 return;
747
748 idx = hw->pf_id + I40E_FCOE_PF_STAT_OFFSET;
749 fs = &vsi->fcoe_stats;
750 ofs = &vsi->fcoe_stats_offsets;
751
752 i40e_stat_update32(hw, I40E_GL_FCOEPRC(idx),
753 vsi->fcoe_stat_offsets_loaded,
754 &ofs->rx_fcoe_packets, &fs->rx_fcoe_packets);
755 i40e_stat_update48(hw, I40E_GL_FCOEDWRCH(idx), I40E_GL_FCOEDWRCL(idx),
756 vsi->fcoe_stat_offsets_loaded,
757 &ofs->rx_fcoe_dwords, &fs->rx_fcoe_dwords);
758 i40e_stat_update32(hw, I40E_GL_FCOERPDC(idx),
759 vsi->fcoe_stat_offsets_loaded,
760 &ofs->rx_fcoe_dropped, &fs->rx_fcoe_dropped);
761 i40e_stat_update32(hw, I40E_GL_FCOEPTC(idx),
762 vsi->fcoe_stat_offsets_loaded,
763 &ofs->tx_fcoe_packets, &fs->tx_fcoe_packets);
764 i40e_stat_update48(hw, I40E_GL_FCOEDWTCH(idx), I40E_GL_FCOEDWTCL(idx),
765 vsi->fcoe_stat_offsets_loaded,
766 &ofs->tx_fcoe_dwords, &fs->tx_fcoe_dwords);
767 i40e_stat_update32(hw, I40E_GL_FCOECRC(idx),
768 vsi->fcoe_stat_offsets_loaded,
769 &ofs->fcoe_bad_fccrc, &fs->fcoe_bad_fccrc);
770 i40e_stat_update32(hw, I40E_GL_FCOELAST(idx),
771 vsi->fcoe_stat_offsets_loaded,
772 &ofs->fcoe_last_error, &fs->fcoe_last_error);
773 i40e_stat_update32(hw, I40E_GL_FCOEDDPC(idx),
774 vsi->fcoe_stat_offsets_loaded,
775 &ofs->fcoe_ddp_count, &fs->fcoe_ddp_count);
776
777 vsi->fcoe_stat_offsets_loaded = true;
778 }
779
780 #endif
781 /**
782 * i40e_update_vsi_stats - Update the vsi statistics counters.
783 * @vsi: the VSI to be updated
784 *
785 * There are a few instances where we store the same stat in a
786 * couple of different structs. This is partly because we have
787 * the netdev stats that need to be filled out, which is slightly
788 * different from the "eth_stats" defined by the chip and used in
789 * VF communications. We sort it out here.
790 **/
791 static void i40e_update_vsi_stats(struct i40e_vsi *vsi)
792 {
793 struct i40e_pf *pf = vsi->back;
794 struct rtnl_link_stats64 *ons;
795 struct rtnl_link_stats64 *ns; /* netdev stats */
796 struct i40e_eth_stats *oes;
797 struct i40e_eth_stats *es; /* device's eth stats */
798 u32 tx_restart, tx_busy;
799 u64 tx_lost_interrupt;
800 struct i40e_ring *p;
801 u32 rx_page, rx_buf;
802 u64 bytes, packets;
803 unsigned int start;
804 u64 tx_linearize;
805 u64 tx_force_wb;
806 u64 rx_p, rx_b;
807 u64 tx_p, tx_b;
808 u16 q;
809
810 if (test_bit(__I40E_DOWN, &vsi->state) ||
811 test_bit(__I40E_CONFIG_BUSY, &pf->state))
812 return;
813
814 ns = i40e_get_vsi_stats_struct(vsi);
815 ons = &vsi->net_stats_offsets;
816 es = &vsi->eth_stats;
817 oes = &vsi->eth_stats_offsets;
818
819 /* Gather up the netdev and vsi stats that the driver collects
820 * on the fly during packet processing
821 */
822 rx_b = rx_p = 0;
823 tx_b = tx_p = 0;
824 tx_restart = tx_busy = tx_linearize = tx_force_wb = 0;
825 tx_lost_interrupt = 0;
826 rx_page = 0;
827 rx_buf = 0;
828 rcu_read_lock();
829 for (q = 0; q < vsi->num_queue_pairs; q++) {
830 /* locate Tx ring */
831 p = ACCESS_ONCE(vsi->tx_rings[q]);
832
833 do {
834 start = u64_stats_fetch_begin_irq(&p->syncp);
835 packets = p->stats.packets;
836 bytes = p->stats.bytes;
837 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
838 tx_b += bytes;
839 tx_p += packets;
840 tx_restart += p->tx_stats.restart_queue;
841 tx_busy += p->tx_stats.tx_busy;
842 tx_linearize += p->tx_stats.tx_linearize;
843 tx_force_wb += p->tx_stats.tx_force_wb;
844 tx_lost_interrupt += p->tx_stats.tx_lost_interrupt;
845
846 /* Rx queue is part of the same block as Tx queue */
847 p = &p[1];
848 do {
849 start = u64_stats_fetch_begin_irq(&p->syncp);
850 packets = p->stats.packets;
851 bytes = p->stats.bytes;
852 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
853 rx_b += bytes;
854 rx_p += packets;
855 rx_buf += p->rx_stats.alloc_buff_failed;
856 rx_page += p->rx_stats.alloc_page_failed;
857 }
858 rcu_read_unlock();
859 vsi->tx_restart = tx_restart;
860 vsi->tx_busy = tx_busy;
861 vsi->tx_linearize = tx_linearize;
862 vsi->tx_force_wb = tx_force_wb;
863 vsi->tx_lost_interrupt = tx_lost_interrupt;
864 vsi->rx_page_failed = rx_page;
865 vsi->rx_buf_failed = rx_buf;
866
867 ns->rx_packets = rx_p;
868 ns->rx_bytes = rx_b;
869 ns->tx_packets = tx_p;
870 ns->tx_bytes = tx_b;
871
872 /* update netdev stats from eth stats */
873 i40e_update_eth_stats(vsi);
874 ons->tx_errors = oes->tx_errors;
875 ns->tx_errors = es->tx_errors;
876 ons->multicast = oes->rx_multicast;
877 ns->multicast = es->rx_multicast;
878 ons->rx_dropped = oes->rx_discards;
879 ns->rx_dropped = es->rx_discards;
880 ons->tx_dropped = oes->tx_discards;
881 ns->tx_dropped = es->tx_discards;
882
883 /* pull in a couple PF stats if this is the main vsi */
884 if (vsi == pf->vsi[pf->lan_vsi]) {
885 ns->rx_crc_errors = pf->stats.crc_errors;
886 ns->rx_errors = pf->stats.crc_errors + pf->stats.illegal_bytes;
887 ns->rx_length_errors = pf->stats.rx_length_errors;
888 }
889 }
890
891 /**
892 * i40e_update_pf_stats - Update the PF statistics counters.
893 * @pf: the PF to be updated
894 **/
895 static void i40e_update_pf_stats(struct i40e_pf *pf)
896 {
897 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
898 struct i40e_hw_port_stats *nsd = &pf->stats;
899 struct i40e_hw *hw = &pf->hw;
900 u32 val;
901 int i;
902
903 i40e_stat_update48(hw, I40E_GLPRT_GORCH(hw->port),
904 I40E_GLPRT_GORCL(hw->port),
905 pf->stat_offsets_loaded,
906 &osd->eth.rx_bytes, &nsd->eth.rx_bytes);
907 i40e_stat_update48(hw, I40E_GLPRT_GOTCH(hw->port),
908 I40E_GLPRT_GOTCL(hw->port),
909 pf->stat_offsets_loaded,
910 &osd->eth.tx_bytes, &nsd->eth.tx_bytes);
911 i40e_stat_update32(hw, I40E_GLPRT_RDPC(hw->port),
912 pf->stat_offsets_loaded,
913 &osd->eth.rx_discards,
914 &nsd->eth.rx_discards);
915 i40e_stat_update48(hw, I40E_GLPRT_UPRCH(hw->port),
916 I40E_GLPRT_UPRCL(hw->port),
917 pf->stat_offsets_loaded,
918 &osd->eth.rx_unicast,
919 &nsd->eth.rx_unicast);
920 i40e_stat_update48(hw, I40E_GLPRT_MPRCH(hw->port),
921 I40E_GLPRT_MPRCL(hw->port),
922 pf->stat_offsets_loaded,
923 &osd->eth.rx_multicast,
924 &nsd->eth.rx_multicast);
925 i40e_stat_update48(hw, I40E_GLPRT_BPRCH(hw->port),
926 I40E_GLPRT_BPRCL(hw->port),
927 pf->stat_offsets_loaded,
928 &osd->eth.rx_broadcast,
929 &nsd->eth.rx_broadcast);
930 i40e_stat_update48(hw, I40E_GLPRT_UPTCH(hw->port),
931 I40E_GLPRT_UPTCL(hw->port),
932 pf->stat_offsets_loaded,
933 &osd->eth.tx_unicast,
934 &nsd->eth.tx_unicast);
935 i40e_stat_update48(hw, I40E_GLPRT_MPTCH(hw->port),
936 I40E_GLPRT_MPTCL(hw->port),
937 pf->stat_offsets_loaded,
938 &osd->eth.tx_multicast,
939 &nsd->eth.tx_multicast);
940 i40e_stat_update48(hw, I40E_GLPRT_BPTCH(hw->port),
941 I40E_GLPRT_BPTCL(hw->port),
942 pf->stat_offsets_loaded,
943 &osd->eth.tx_broadcast,
944 &nsd->eth.tx_broadcast);
945
946 i40e_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port),
947 pf->stat_offsets_loaded,
948 &osd->tx_dropped_link_down,
949 &nsd->tx_dropped_link_down);
950
951 i40e_stat_update32(hw, I40E_GLPRT_CRCERRS(hw->port),
952 pf->stat_offsets_loaded,
953 &osd->crc_errors, &nsd->crc_errors);
954
955 i40e_stat_update32(hw, I40E_GLPRT_ILLERRC(hw->port),
956 pf->stat_offsets_loaded,
957 &osd->illegal_bytes, &nsd->illegal_bytes);
958
959 i40e_stat_update32(hw, I40E_GLPRT_MLFC(hw->port),
960 pf->stat_offsets_loaded,
961 &osd->mac_local_faults,
962 &nsd->mac_local_faults);
963 i40e_stat_update32(hw, I40E_GLPRT_MRFC(hw->port),
964 pf->stat_offsets_loaded,
965 &osd->mac_remote_faults,
966 &nsd->mac_remote_faults);
967
968 i40e_stat_update32(hw, I40E_GLPRT_RLEC(hw->port),
969 pf->stat_offsets_loaded,
970 &osd->rx_length_errors,
971 &nsd->rx_length_errors);
972
973 i40e_stat_update32(hw, I40E_GLPRT_LXONRXC(hw->port),
974 pf->stat_offsets_loaded,
975 &osd->link_xon_rx, &nsd->link_xon_rx);
976 i40e_stat_update32(hw, I40E_GLPRT_LXONTXC(hw->port),
977 pf->stat_offsets_loaded,
978 &osd->link_xon_tx, &nsd->link_xon_tx);
979 i40e_stat_update32(hw, I40E_GLPRT_LXOFFRXC(hw->port),
980 pf->stat_offsets_loaded,
981 &osd->link_xoff_rx, &nsd->link_xoff_rx);
982 i40e_stat_update32(hw, I40E_GLPRT_LXOFFTXC(hw->port),
983 pf->stat_offsets_loaded,
984 &osd->link_xoff_tx, &nsd->link_xoff_tx);
985
986 for (i = 0; i < 8; i++) {
987 i40e_stat_update32(hw, I40E_GLPRT_PXOFFRXC(hw->port, i),
988 pf->stat_offsets_loaded,
989 &osd->priority_xoff_rx[i],
990 &nsd->priority_xoff_rx[i]);
991 i40e_stat_update32(hw, I40E_GLPRT_PXONRXC(hw->port, i),
992 pf->stat_offsets_loaded,
993 &osd->priority_xon_rx[i],
994 &nsd->priority_xon_rx[i]);
995 i40e_stat_update32(hw, I40E_GLPRT_PXONTXC(hw->port, i),
996 pf->stat_offsets_loaded,
997 &osd->priority_xon_tx[i],
998 &nsd->priority_xon_tx[i]);
999 i40e_stat_update32(hw, I40E_GLPRT_PXOFFTXC(hw->port, i),
1000 pf->stat_offsets_loaded,
1001 &osd->priority_xoff_tx[i],
1002 &nsd->priority_xoff_tx[i]);
1003 i40e_stat_update32(hw,
1004 I40E_GLPRT_RXON2OFFCNT(hw->port, i),
1005 pf->stat_offsets_loaded,
1006 &osd->priority_xon_2_xoff[i],
1007 &nsd->priority_xon_2_xoff[i]);
1008 }
1009
1010 i40e_stat_update48(hw, I40E_GLPRT_PRC64H(hw->port),
1011 I40E_GLPRT_PRC64L(hw->port),
1012 pf->stat_offsets_loaded,
1013 &osd->rx_size_64, &nsd->rx_size_64);
1014 i40e_stat_update48(hw, I40E_GLPRT_PRC127H(hw->port),
1015 I40E_GLPRT_PRC127L(hw->port),
1016 pf->stat_offsets_loaded,
1017 &osd->rx_size_127, &nsd->rx_size_127);
1018 i40e_stat_update48(hw, I40E_GLPRT_PRC255H(hw->port),
1019 I40E_GLPRT_PRC255L(hw->port),
1020 pf->stat_offsets_loaded,
1021 &osd->rx_size_255, &nsd->rx_size_255);
1022 i40e_stat_update48(hw, I40E_GLPRT_PRC511H(hw->port),
1023 I40E_GLPRT_PRC511L(hw->port),
1024 pf->stat_offsets_loaded,
1025 &osd->rx_size_511, &nsd->rx_size_511);
1026 i40e_stat_update48(hw, I40E_GLPRT_PRC1023H(hw->port),
1027 I40E_GLPRT_PRC1023L(hw->port),
1028 pf->stat_offsets_loaded,
1029 &osd->rx_size_1023, &nsd->rx_size_1023);
1030 i40e_stat_update48(hw, I40E_GLPRT_PRC1522H(hw->port),
1031 I40E_GLPRT_PRC1522L(hw->port),
1032 pf->stat_offsets_loaded,
1033 &osd->rx_size_1522, &nsd->rx_size_1522);
1034 i40e_stat_update48(hw, I40E_GLPRT_PRC9522H(hw->port),
1035 I40E_GLPRT_PRC9522L(hw->port),
1036 pf->stat_offsets_loaded,
1037 &osd->rx_size_big, &nsd->rx_size_big);
1038
1039 i40e_stat_update48(hw, I40E_GLPRT_PTC64H(hw->port),
1040 I40E_GLPRT_PTC64L(hw->port),
1041 pf->stat_offsets_loaded,
1042 &osd->tx_size_64, &nsd->tx_size_64);
1043 i40e_stat_update48(hw, I40E_GLPRT_PTC127H(hw->port),
1044 I40E_GLPRT_PTC127L(hw->port),
1045 pf->stat_offsets_loaded,
1046 &osd->tx_size_127, &nsd->tx_size_127);
1047 i40e_stat_update48(hw, I40E_GLPRT_PTC255H(hw->port),
1048 I40E_GLPRT_PTC255L(hw->port),
1049 pf->stat_offsets_loaded,
1050 &osd->tx_size_255, &nsd->tx_size_255);
1051 i40e_stat_update48(hw, I40E_GLPRT_PTC511H(hw->port),
1052 I40E_GLPRT_PTC511L(hw->port),
1053 pf->stat_offsets_loaded,
1054 &osd->tx_size_511, &nsd->tx_size_511);
1055 i40e_stat_update48(hw, I40E_GLPRT_PTC1023H(hw->port),
1056 I40E_GLPRT_PTC1023L(hw->port),
1057 pf->stat_offsets_loaded,
1058 &osd->tx_size_1023, &nsd->tx_size_1023);
1059 i40e_stat_update48(hw, I40E_GLPRT_PTC1522H(hw->port),
1060 I40E_GLPRT_PTC1522L(hw->port),
1061 pf->stat_offsets_loaded,
1062 &osd->tx_size_1522, &nsd->tx_size_1522);
1063 i40e_stat_update48(hw, I40E_GLPRT_PTC9522H(hw->port),
1064 I40E_GLPRT_PTC9522L(hw->port),
1065 pf->stat_offsets_loaded,
1066 &osd->tx_size_big, &nsd->tx_size_big);
1067
1068 i40e_stat_update32(hw, I40E_GLPRT_RUC(hw->port),
1069 pf->stat_offsets_loaded,
1070 &osd->rx_undersize, &nsd->rx_undersize);
1071 i40e_stat_update32(hw, I40E_GLPRT_RFC(hw->port),
1072 pf->stat_offsets_loaded,
1073 &osd->rx_fragments, &nsd->rx_fragments);
1074 i40e_stat_update32(hw, I40E_GLPRT_ROC(hw->port),
1075 pf->stat_offsets_loaded,
1076 &osd->rx_oversize, &nsd->rx_oversize);
1077 i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port),
1078 pf->stat_offsets_loaded,
1079 &osd->rx_jabber, &nsd->rx_jabber);
1080
1081 /* FDIR stats */
1082 i40e_stat_update32(hw,
1083 I40E_GLQF_PCNT(I40E_FD_ATR_STAT_IDX(pf->hw.pf_id)),
1084 pf->stat_offsets_loaded,
1085 &osd->fd_atr_match, &nsd->fd_atr_match);
1086 i40e_stat_update32(hw,
1087 I40E_GLQF_PCNT(I40E_FD_SB_STAT_IDX(pf->hw.pf_id)),
1088 pf->stat_offsets_loaded,
1089 &osd->fd_sb_match, &nsd->fd_sb_match);
1090 i40e_stat_update32(hw,
1091 I40E_GLQF_PCNT(I40E_FD_ATR_TUNNEL_STAT_IDX(pf->hw.pf_id)),
1092 pf->stat_offsets_loaded,
1093 &osd->fd_atr_tunnel_match, &nsd->fd_atr_tunnel_match);
1094
1095 val = rd32(hw, I40E_PRTPM_EEE_STAT);
1096 nsd->tx_lpi_status =
1097 (val & I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_MASK) >>
1098 I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_SHIFT;
1099 nsd->rx_lpi_status =
1100 (val & I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_MASK) >>
1101 I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_SHIFT;
1102 i40e_stat_update32(hw, I40E_PRTPM_TLPIC,
1103 pf->stat_offsets_loaded,
1104 &osd->tx_lpi_count, &nsd->tx_lpi_count);
1105 i40e_stat_update32(hw, I40E_PRTPM_RLPIC,
1106 pf->stat_offsets_loaded,
1107 &osd->rx_lpi_count, &nsd->rx_lpi_count);
1108
1109 if (pf->flags & I40E_FLAG_FD_SB_ENABLED &&
1110 !(pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED))
1111 nsd->fd_sb_status = true;
1112 else
1113 nsd->fd_sb_status = false;
1114
1115 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED &&
1116 !(pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED))
1117 nsd->fd_atr_status = true;
1118 else
1119 nsd->fd_atr_status = false;
1120
1121 pf->stat_offsets_loaded = true;
1122 }
1123
1124 /**
1125 * i40e_update_stats - Update the various statistics counters.
1126 * @vsi: the VSI to be updated
1127 *
1128 * Update the various stats for this VSI and its related entities.
1129 **/
1130 void i40e_update_stats(struct i40e_vsi *vsi)
1131 {
1132 struct i40e_pf *pf = vsi->back;
1133
1134 if (vsi == pf->vsi[pf->lan_vsi])
1135 i40e_update_pf_stats(pf);
1136
1137 i40e_update_vsi_stats(vsi);
1138 #ifdef I40E_FCOE
1139 i40e_update_fcoe_stats(vsi);
1140 #endif
1141 }
1142
1143 /**
1144 * i40e_find_filter - Search VSI filter list for specific mac/vlan filter
1145 * @vsi: the VSI to be searched
1146 * @macaddr: the MAC address
1147 * @vlan: the vlan
1148 * @is_vf: make sure its a VF filter, else doesn't matter
1149 * @is_netdev: make sure its a netdev filter, else doesn't matter
1150 *
1151 * Returns ptr to the filter object or NULL
1152 **/
1153 static struct i40e_mac_filter *i40e_find_filter(struct i40e_vsi *vsi,
1154 u8 *macaddr, s16 vlan,
1155 bool is_vf, bool is_netdev)
1156 {
1157 struct i40e_mac_filter *f;
1158
1159 if (!vsi || !macaddr)
1160 return NULL;
1161
1162 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1163 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1164 (vlan == f->vlan) &&
1165 (!is_vf || f->is_vf) &&
1166 (!is_netdev || f->is_netdev))
1167 return f;
1168 }
1169 return NULL;
1170 }
1171
1172 /**
1173 * i40e_find_mac - Find a mac addr in the macvlan filters list
1174 * @vsi: the VSI to be searched
1175 * @macaddr: the MAC address we are searching for
1176 * @is_vf: make sure its a VF filter, else doesn't matter
1177 * @is_netdev: make sure its a netdev filter, else doesn't matter
1178 *
1179 * Returns the first filter with the provided MAC address or NULL if
1180 * MAC address was not found
1181 **/
1182 struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, u8 *macaddr,
1183 bool is_vf, bool is_netdev)
1184 {
1185 struct i40e_mac_filter *f;
1186
1187 if (!vsi || !macaddr)
1188 return NULL;
1189
1190 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1191 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1192 (!is_vf || f->is_vf) &&
1193 (!is_netdev || f->is_netdev))
1194 return f;
1195 }
1196 return NULL;
1197 }
1198
1199 /**
1200 * i40e_is_vsi_in_vlan - Check if VSI is in vlan mode
1201 * @vsi: the VSI to be searched
1202 *
1203 * Returns true if VSI is in vlan mode or false otherwise
1204 **/
1205 bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi)
1206 {
1207 struct i40e_mac_filter *f;
1208
1209 /* Only -1 for all the filters denotes not in vlan mode
1210 * so we have to go through all the list in order to make sure
1211 */
1212 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1213 if (f->vlan >= 0 || vsi->info.pvid)
1214 return true;
1215 }
1216
1217 return false;
1218 }
1219
1220 /**
1221 * i40e_put_mac_in_vlan - Make macvlan filters from macaddrs and vlans
1222 * @vsi: the VSI to be searched
1223 * @macaddr: the mac address to be filtered
1224 * @is_vf: true if it is a VF
1225 * @is_netdev: true if it is a netdev
1226 *
1227 * Goes through all the macvlan filters and adds a
1228 * macvlan filter for each unique vlan that already exists
1229 *
1230 * Returns first filter found on success, else NULL
1231 **/
1232 struct i40e_mac_filter *i40e_put_mac_in_vlan(struct i40e_vsi *vsi, u8 *macaddr,
1233 bool is_vf, bool is_netdev)
1234 {
1235 struct i40e_mac_filter *f;
1236
1237 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1238 if (vsi->info.pvid)
1239 f->vlan = le16_to_cpu(vsi->info.pvid);
1240 if (!i40e_find_filter(vsi, macaddr, f->vlan,
1241 is_vf, is_netdev)) {
1242 if (!i40e_add_filter(vsi, macaddr, f->vlan,
1243 is_vf, is_netdev))
1244 return NULL;
1245 }
1246 }
1247
1248 return list_first_entry_or_null(&vsi->mac_filter_list,
1249 struct i40e_mac_filter, list);
1250 }
1251
1252 /**
1253 * i40e_del_mac_all_vlan - Remove a MAC filter from all VLANS
1254 * @vsi: the VSI to be searched
1255 * @macaddr: the mac address to be removed
1256 * @is_vf: true if it is a VF
1257 * @is_netdev: true if it is a netdev
1258 *
1259 * Removes a given MAC address from a VSI, regardless of VLAN
1260 *
1261 * Returns 0 for success, or error
1262 **/
1263 int i40e_del_mac_all_vlan(struct i40e_vsi *vsi, u8 *macaddr,
1264 bool is_vf, bool is_netdev)
1265 {
1266 struct i40e_mac_filter *f = NULL;
1267 int changed = 0;
1268
1269 WARN(!spin_is_locked(&vsi->mac_filter_list_lock),
1270 "Missing mac_filter_list_lock\n");
1271 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1272 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1273 (is_vf == f->is_vf) &&
1274 (is_netdev == f->is_netdev)) {
1275 f->counter--;
1276 changed = 1;
1277 if (f->counter == 0)
1278 f->state = I40E_FILTER_REMOVE;
1279 }
1280 }
1281 if (changed) {
1282 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1283 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1284 return 0;
1285 }
1286 return -ENOENT;
1287 }
1288
1289 /**
1290 * i40e_add_filter - Add a mac/vlan filter to the VSI
1291 * @vsi: the VSI to be searched
1292 * @macaddr: the MAC address
1293 * @vlan: the vlan
1294 * @is_vf: make sure its a VF filter, else doesn't matter
1295 * @is_netdev: make sure its a netdev filter, else doesn't matter
1296 *
1297 * Returns ptr to the filter object or NULL when no memory available.
1298 *
1299 * NOTE: This function is expected to be called with mac_filter_list_lock
1300 * being held.
1301 **/
1302 struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
1303 u8 *macaddr, s16 vlan,
1304 bool is_vf, bool is_netdev)
1305 {
1306 struct i40e_mac_filter *f;
1307 int changed = false;
1308
1309 if (!vsi || !macaddr)
1310 return NULL;
1311
1312 /* Do not allow broadcast filter to be added since broadcast filter
1313 * is added as part of add VSI for any newly created VSI except
1314 * FDIR VSI
1315 */
1316 if (is_broadcast_ether_addr(macaddr))
1317 return NULL;
1318
1319 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1320 if (!f) {
1321 f = kzalloc(sizeof(*f), GFP_ATOMIC);
1322 if (!f)
1323 goto add_filter_out;
1324
1325 ether_addr_copy(f->macaddr, macaddr);
1326 f->vlan = vlan;
1327 /* If we're in overflow promisc mode, set the state directly
1328 * to failed, so we don't bother to try sending the filter
1329 * to the hardware.
1330 */
1331 if (test_bit(__I40E_FILTER_OVERFLOW_PROMISC, &vsi->state))
1332 f->state = I40E_FILTER_FAILED;
1333 else
1334 f->state = I40E_FILTER_NEW;
1335 changed = true;
1336 INIT_LIST_HEAD(&f->list);
1337 list_add_tail(&f->list, &vsi->mac_filter_list);
1338 }
1339
1340 /* increment counter and add a new flag if needed */
1341 if (is_vf) {
1342 if (!f->is_vf) {
1343 f->is_vf = true;
1344 f->counter++;
1345 }
1346 } else if (is_netdev) {
1347 if (!f->is_netdev) {
1348 f->is_netdev = true;
1349 f->counter++;
1350 }
1351 } else {
1352 f->counter++;
1353 }
1354
1355 if (changed) {
1356 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1357 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1358 }
1359
1360 add_filter_out:
1361 return f;
1362 }
1363
1364 /**
1365 * i40e_del_filter - Remove a mac/vlan filter from the VSI
1366 * @vsi: the VSI to be searched
1367 * @macaddr: the MAC address
1368 * @vlan: the vlan
1369 * @is_vf: make sure it's a VF filter, else doesn't matter
1370 * @is_netdev: make sure it's a netdev filter, else doesn't matter
1371 *
1372 * NOTE: This function is expected to be called with mac_filter_list_lock
1373 * being held.
1374 * ANOTHER NOTE: This function MUST be called from within the context of
1375 * the "safe" variants of any list iterators, e.g. list_for_each_entry_safe()
1376 * instead of list_for_each_entry().
1377 **/
1378 void i40e_del_filter(struct i40e_vsi *vsi,
1379 u8 *macaddr, s16 vlan,
1380 bool is_vf, bool is_netdev)
1381 {
1382 struct i40e_mac_filter *f;
1383
1384 if (!vsi || !macaddr)
1385 return;
1386
1387 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1388 if (!f || f->counter == 0)
1389 return;
1390
1391 if (is_vf) {
1392 if (f->is_vf) {
1393 f->is_vf = false;
1394 f->counter--;
1395 }
1396 } else if (is_netdev) {
1397 if (f->is_netdev) {
1398 f->is_netdev = false;
1399 f->counter--;
1400 }
1401 } else {
1402 /* make sure we don't remove a filter in use by VF or netdev */
1403 int min_f = 0;
1404
1405 min_f += (f->is_vf ? 1 : 0);
1406 min_f += (f->is_netdev ? 1 : 0);
1407
1408 if (f->counter > min_f)
1409 f->counter--;
1410 }
1411
1412 /* counter == 0 tells sync_filters_subtask to
1413 * remove the filter from the firmware's list
1414 */
1415 if (f->counter == 0) {
1416 if ((f->state == I40E_FILTER_FAILED) ||
1417 (f->state == I40E_FILTER_NEW)) {
1418 /* this one never got added by the FW. Just remove it,
1419 * no need to sync anything.
1420 */
1421 list_del(&f->list);
1422 kfree(f);
1423 } else {
1424 f->state = I40E_FILTER_REMOVE;
1425 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1426 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1427 }
1428 }
1429 }
1430
1431 /**
1432 * i40e_set_mac - NDO callback to set mac address
1433 * @netdev: network interface device structure
1434 * @p: pointer to an address structure
1435 *
1436 * Returns 0 on success, negative on failure
1437 **/
1438 #ifdef I40E_FCOE
1439 int i40e_set_mac(struct net_device *netdev, void *p)
1440 #else
1441 static int i40e_set_mac(struct net_device *netdev, void *p)
1442 #endif
1443 {
1444 struct i40e_netdev_priv *np = netdev_priv(netdev);
1445 struct i40e_vsi *vsi = np->vsi;
1446 struct i40e_pf *pf = vsi->back;
1447 struct i40e_hw *hw = &pf->hw;
1448 struct sockaddr *addr = p;
1449
1450 if (!is_valid_ether_addr(addr->sa_data))
1451 return -EADDRNOTAVAIL;
1452
1453 if (ether_addr_equal(netdev->dev_addr, addr->sa_data)) {
1454 netdev_info(netdev, "already using mac address %pM\n",
1455 addr->sa_data);
1456 return 0;
1457 }
1458
1459 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
1460 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
1461 return -EADDRNOTAVAIL;
1462
1463 if (ether_addr_equal(hw->mac.addr, addr->sa_data))
1464 netdev_info(netdev, "returning to hw mac address %pM\n",
1465 hw->mac.addr);
1466 else
1467 netdev_info(netdev, "set new mac address %pM\n", addr->sa_data);
1468
1469 spin_lock_bh(&vsi->mac_filter_list_lock);
1470 i40e_del_mac_all_vlan(vsi, netdev->dev_addr, false, true);
1471 i40e_put_mac_in_vlan(vsi, addr->sa_data, false, true);
1472 spin_unlock_bh(&vsi->mac_filter_list_lock);
1473 ether_addr_copy(netdev->dev_addr, addr->sa_data);
1474 if (vsi->type == I40E_VSI_MAIN) {
1475 i40e_status ret;
1476
1477 ret = i40e_aq_mac_address_write(&vsi->back->hw,
1478 I40E_AQC_WRITE_TYPE_LAA_WOL,
1479 addr->sa_data, NULL);
1480 if (ret)
1481 netdev_info(netdev, "Ignoring error from firmware on LAA update, status %s, AQ ret %s\n",
1482 i40e_stat_str(hw, ret),
1483 i40e_aq_str(hw, hw->aq.asq_last_status));
1484 }
1485
1486 /* schedule our worker thread which will take care of
1487 * applying the new filter changes
1488 */
1489 i40e_service_event_schedule(vsi->back);
1490 return 0;
1491 }
1492
1493 /**
1494 * i40e_vsi_setup_queue_map - Setup a VSI queue map based on enabled_tc
1495 * @vsi: the VSI being setup
1496 * @ctxt: VSI context structure
1497 * @enabled_tc: Enabled TCs bitmap
1498 * @is_add: True if called before Add VSI
1499 *
1500 * Setup VSI queue mapping for enabled traffic classes.
1501 **/
1502 #ifdef I40E_FCOE
1503 void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1504 struct i40e_vsi_context *ctxt,
1505 u8 enabled_tc,
1506 bool is_add)
1507 #else
1508 static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1509 struct i40e_vsi_context *ctxt,
1510 u8 enabled_tc,
1511 bool is_add)
1512 #endif
1513 {
1514 struct i40e_pf *pf = vsi->back;
1515 u16 sections = 0;
1516 u8 netdev_tc = 0;
1517 u16 numtc = 0;
1518 u16 qcount;
1519 u8 offset;
1520 u16 qmap;
1521 int i;
1522 u16 num_tc_qps = 0;
1523
1524 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
1525 offset = 0;
1526
1527 if (enabled_tc && (vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
1528 /* Find numtc from enabled TC bitmap */
1529 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1530 if (enabled_tc & BIT(i)) /* TC is enabled */
1531 numtc++;
1532 }
1533 if (!numtc) {
1534 dev_warn(&pf->pdev->dev, "DCB is enabled but no TC enabled, forcing TC0\n");
1535 numtc = 1;
1536 }
1537 } else {
1538 /* At least TC0 is enabled in case of non-DCB case */
1539 numtc = 1;
1540 }
1541
1542 vsi->tc_config.numtc = numtc;
1543 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
1544 /* Number of queues per enabled TC */
1545 qcount = vsi->alloc_queue_pairs;
1546
1547 num_tc_qps = qcount / numtc;
1548 num_tc_qps = min_t(int, num_tc_qps, i40e_pf_get_max_q_per_tc(pf));
1549
1550 /* Setup queue offset/count for all TCs for given VSI */
1551 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1552 /* See if the given TC is enabled for the given VSI */
1553 if (vsi->tc_config.enabled_tc & BIT(i)) {
1554 /* TC is enabled */
1555 int pow, num_qps;
1556
1557 switch (vsi->type) {
1558 case I40E_VSI_MAIN:
1559 qcount = min_t(int, pf->alloc_rss_size,
1560 num_tc_qps);
1561 break;
1562 #ifdef I40E_FCOE
1563 case I40E_VSI_FCOE:
1564 qcount = num_tc_qps;
1565 break;
1566 #endif
1567 case I40E_VSI_FDIR:
1568 case I40E_VSI_SRIOV:
1569 case I40E_VSI_VMDQ2:
1570 default:
1571 qcount = num_tc_qps;
1572 WARN_ON(i != 0);
1573 break;
1574 }
1575 vsi->tc_config.tc_info[i].qoffset = offset;
1576 vsi->tc_config.tc_info[i].qcount = qcount;
1577
1578 /* find the next higher power-of-2 of num queue pairs */
1579 num_qps = qcount;
1580 pow = 0;
1581 while (num_qps && (BIT_ULL(pow) < qcount)) {
1582 pow++;
1583 num_qps >>= 1;
1584 }
1585
1586 vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++;
1587 qmap =
1588 (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
1589 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
1590
1591 offset += qcount;
1592 } else {
1593 /* TC is not enabled so set the offset to
1594 * default queue and allocate one queue
1595 * for the given TC.
1596 */
1597 vsi->tc_config.tc_info[i].qoffset = 0;
1598 vsi->tc_config.tc_info[i].qcount = 1;
1599 vsi->tc_config.tc_info[i].netdev_tc = 0;
1600
1601 qmap = 0;
1602 }
1603 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap);
1604 }
1605
1606 /* Set actual Tx/Rx queue pairs */
1607 vsi->num_queue_pairs = offset;
1608 if ((vsi->type == I40E_VSI_MAIN) && (numtc == 1)) {
1609 if (vsi->req_queue_pairs > 0)
1610 vsi->num_queue_pairs = vsi->req_queue_pairs;
1611 else if (pf->flags & I40E_FLAG_MSIX_ENABLED)
1612 vsi->num_queue_pairs = pf->num_lan_msix;
1613 }
1614
1615 /* Scheduler section valid can only be set for ADD VSI */
1616 if (is_add) {
1617 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
1618
1619 ctxt->info.up_enable_bits = enabled_tc;
1620 }
1621 if (vsi->type == I40E_VSI_SRIOV) {
1622 ctxt->info.mapping_flags |=
1623 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_NONCONTIG);
1624 for (i = 0; i < vsi->num_queue_pairs; i++)
1625 ctxt->info.queue_mapping[i] =
1626 cpu_to_le16(vsi->base_queue + i);
1627 } else {
1628 ctxt->info.mapping_flags |=
1629 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
1630 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
1631 }
1632 ctxt->info.valid_sections |= cpu_to_le16(sections);
1633 }
1634
1635 /**
1636 * i40e_set_rx_mode - NDO callback to set the netdev filters
1637 * @netdev: network interface device structure
1638 **/
1639 #ifdef I40E_FCOE
1640 void i40e_set_rx_mode(struct net_device *netdev)
1641 #else
1642 static void i40e_set_rx_mode(struct net_device *netdev)
1643 #endif
1644 {
1645 struct i40e_netdev_priv *np = netdev_priv(netdev);
1646 struct i40e_mac_filter *f, *ftmp;
1647 struct i40e_vsi *vsi = np->vsi;
1648 struct netdev_hw_addr *uca;
1649 struct netdev_hw_addr *mca;
1650 struct netdev_hw_addr *ha;
1651
1652 spin_lock_bh(&vsi->mac_filter_list_lock);
1653
1654 /* add addr if not already in the filter list */
1655 netdev_for_each_uc_addr(uca, netdev) {
1656 if (!i40e_find_mac(vsi, uca->addr, false, true)) {
1657 if (i40e_is_vsi_in_vlan(vsi))
1658 i40e_put_mac_in_vlan(vsi, uca->addr,
1659 false, true);
1660 else
1661 i40e_add_filter(vsi, uca->addr, I40E_VLAN_ANY,
1662 false, true);
1663 }
1664 }
1665
1666 netdev_for_each_mc_addr(mca, netdev) {
1667 if (!i40e_find_mac(vsi, mca->addr, false, true)) {
1668 if (i40e_is_vsi_in_vlan(vsi))
1669 i40e_put_mac_in_vlan(vsi, mca->addr,
1670 false, true);
1671 else
1672 i40e_add_filter(vsi, mca->addr, I40E_VLAN_ANY,
1673 false, true);
1674 }
1675 }
1676
1677 /* remove filter if not in netdev list */
1678 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1679
1680 if (!f->is_netdev)
1681 continue;
1682
1683 netdev_for_each_mc_addr(mca, netdev)
1684 if (ether_addr_equal(mca->addr, f->macaddr))
1685 goto bottom_of_search_loop;
1686
1687 netdev_for_each_uc_addr(uca, netdev)
1688 if (ether_addr_equal(uca->addr, f->macaddr))
1689 goto bottom_of_search_loop;
1690
1691 for_each_dev_addr(netdev, ha)
1692 if (ether_addr_equal(ha->addr, f->macaddr))
1693 goto bottom_of_search_loop;
1694
1695 /* f->macaddr wasn't found in uc, mc, or ha list so delete it */
1696 i40e_del_filter(vsi, f->macaddr, I40E_VLAN_ANY, false, true);
1697
1698 bottom_of_search_loop:
1699 continue;
1700 }
1701 spin_unlock_bh(&vsi->mac_filter_list_lock);
1702
1703 /* check for other flag changes */
1704 if (vsi->current_netdev_flags != vsi->netdev->flags) {
1705 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1706 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1707 }
1708
1709 /* schedule our worker thread which will take care of
1710 * applying the new filter changes
1711 */
1712 i40e_service_event_schedule(vsi->back);
1713 }
1714
1715 /**
1716 * i40e_undo_del_filter_entries - Undo the changes made to MAC filter entries
1717 * @vsi: pointer to vsi struct
1718 * @from: Pointer to list which contains MAC filter entries - changes to
1719 * those entries needs to be undone.
1720 *
1721 * MAC filter entries from list were slated to be removed from device.
1722 **/
1723 static void i40e_undo_del_filter_entries(struct i40e_vsi *vsi,
1724 struct list_head *from)
1725 {
1726 struct i40e_mac_filter *f, *ftmp;
1727
1728 list_for_each_entry_safe(f, ftmp, from, list) {
1729 /* Move the element back into MAC filter list*/
1730 list_move_tail(&f->list, &vsi->mac_filter_list);
1731 }
1732 }
1733
1734 /**
1735 * i40e_update_filter_state - Update filter state based on return data
1736 * from firmware
1737 * @count: Number of filters added
1738 * @add_list: return data from fw
1739 * @head: pointer to first filter in current batch
1740 * @aq_err: status from fw
1741 *
1742 * MAC filter entries from list were slated to be added to device. Returns
1743 * number of successful filters. Note that 0 does NOT mean success!
1744 **/
1745 static int
1746 i40e_update_filter_state(int count,
1747 struct i40e_aqc_add_macvlan_element_data *add_list,
1748 struct i40e_mac_filter *add_head, int aq_err)
1749 {
1750 int retval = 0;
1751 int i;
1752
1753
1754 if (!aq_err) {
1755 retval = count;
1756 /* Everything's good, mark all filters active. */
1757 for (i = 0; i < count ; i++) {
1758 add_head->state = I40E_FILTER_ACTIVE;
1759 add_head = list_next_entry(add_head, list);
1760 }
1761 } else if (aq_err == I40E_AQ_RC_ENOSPC) {
1762 /* Device ran out of filter space. Check the return value
1763 * for each filter to see which ones are active.
1764 */
1765 for (i = 0; i < count ; i++) {
1766 if (add_list[i].match_method ==
1767 I40E_AQC_MM_ERR_NO_RES) {
1768 add_head->state = I40E_FILTER_FAILED;
1769 } else {
1770 add_head->state = I40E_FILTER_ACTIVE;
1771 retval++;
1772 }
1773 add_head = list_next_entry(add_head, list);
1774 }
1775 } else {
1776 /* Some other horrible thing happened, fail all filters */
1777 retval = 0;
1778 for (i = 0; i < count ; i++) {
1779 add_head->state = I40E_FILTER_FAILED;
1780 add_head = list_next_entry(add_head, list);
1781 }
1782 }
1783 return retval;
1784 }
1785
1786 /**
1787 * i40e_sync_vsi_filters - Update the VSI filter list to the HW
1788 * @vsi: ptr to the VSI
1789 *
1790 * Push any outstanding VSI filter changes through the AdminQ.
1791 *
1792 * Returns 0 or error value
1793 **/
1794 int i40e_sync_vsi_filters(struct i40e_vsi *vsi)
1795 {
1796 struct i40e_mac_filter *f, *ftmp, *add_head = NULL;
1797 struct list_head tmp_add_list, tmp_del_list;
1798 struct i40e_hw *hw = &vsi->back->hw;
1799 bool promisc_changed = false;
1800 char vsi_name[16] = "PF";
1801 int filter_list_len = 0;
1802 u32 changed_flags = 0;
1803 i40e_status aq_ret = 0;
1804 int retval = 0;
1805 struct i40e_pf *pf;
1806 int num_add = 0;
1807 int num_del = 0;
1808 int aq_err = 0;
1809 u16 cmd_flags;
1810 int list_size;
1811 int fcnt;
1812
1813 /* empty array typed pointers, kcalloc later */
1814 struct i40e_aqc_add_macvlan_element_data *add_list;
1815 struct i40e_aqc_remove_macvlan_element_data *del_list;
1816
1817 while (test_and_set_bit(__I40E_CONFIG_BUSY, &vsi->state))
1818 usleep_range(1000, 2000);
1819 pf = vsi->back;
1820
1821 if (vsi->netdev) {
1822 changed_flags = vsi->current_netdev_flags ^ vsi->netdev->flags;
1823 vsi->current_netdev_flags = vsi->netdev->flags;
1824 }
1825
1826 INIT_LIST_HEAD(&tmp_add_list);
1827 INIT_LIST_HEAD(&tmp_del_list);
1828
1829 if (vsi->type == I40E_VSI_SRIOV)
1830 snprintf(vsi_name, sizeof(vsi_name) - 1, "VF %d", vsi->vf_id);
1831 else if (vsi->type != I40E_VSI_MAIN)
1832 snprintf(vsi_name, sizeof(vsi_name) - 1, "vsi %d", vsi->seid);
1833
1834 if (vsi->flags & I40E_VSI_FLAG_FILTER_CHANGED) {
1835 vsi->flags &= ~I40E_VSI_FLAG_FILTER_CHANGED;
1836
1837 spin_lock_bh(&vsi->mac_filter_list_lock);
1838 /* Create a list of filters to delete. */
1839 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1840 if (f->state == I40E_FILTER_REMOVE) {
1841 WARN_ON(f->counter != 0);
1842 /* Move the element into temporary del_list */
1843 list_move_tail(&f->list, &tmp_del_list);
1844 vsi->active_filters--;
1845 }
1846 if (f->state == I40E_FILTER_NEW) {
1847 WARN_ON(f->counter == 0);
1848 /* Move the element into temporary add_list */
1849 list_move_tail(&f->list, &tmp_add_list);
1850 }
1851 }
1852 spin_unlock_bh(&vsi->mac_filter_list_lock);
1853 }
1854
1855 /* Now process 'del_list' outside the lock */
1856 if (!list_empty(&tmp_del_list)) {
1857 filter_list_len = hw->aq.asq_buf_size /
1858 sizeof(struct i40e_aqc_remove_macvlan_element_data);
1859 list_size = filter_list_len *
1860 sizeof(struct i40e_aqc_remove_macvlan_element_data);
1861 del_list = kzalloc(list_size, GFP_ATOMIC);
1862 if (!del_list) {
1863 /* Undo VSI's MAC filter entry element updates */
1864 spin_lock_bh(&vsi->mac_filter_list_lock);
1865 i40e_undo_del_filter_entries(vsi, &tmp_del_list);
1866 spin_unlock_bh(&vsi->mac_filter_list_lock);
1867 retval = -ENOMEM;
1868 goto out;
1869 }
1870
1871 list_for_each_entry_safe(f, ftmp, &tmp_del_list, list) {
1872 cmd_flags = 0;
1873
1874 /* add to delete list */
1875 ether_addr_copy(del_list[num_del].mac_addr, f->macaddr);
1876 if (f->vlan == I40E_VLAN_ANY) {
1877 del_list[num_del].vlan_tag = 0;
1878 cmd_flags |= I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
1879 } else {
1880 del_list[num_del].vlan_tag =
1881 cpu_to_le16((u16)(f->vlan));
1882 }
1883
1884 cmd_flags |= I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1885 del_list[num_del].flags = cmd_flags;
1886 num_del++;
1887
1888 /* flush a full buffer */
1889 if (num_del == filter_list_len) {
1890 aq_ret = i40e_aq_remove_macvlan(hw, vsi->seid,
1891 del_list,
1892 num_del, NULL);
1893 aq_err = hw->aq.asq_last_status;
1894 num_del = 0;
1895 memset(del_list, 0, list_size);
1896
1897 /* Explicitly ignore and do not report when
1898 * firmware returns ENOENT.
1899 */
1900 if (aq_ret && !(aq_err == I40E_AQ_RC_ENOENT)) {
1901 retval = -EIO;
1902 dev_info(&pf->pdev->dev,
1903 "ignoring delete macvlan error on %s, err %s, aq_err %s\n",
1904 vsi_name,
1905 i40e_stat_str(hw, aq_ret),
1906 i40e_aq_str(hw, aq_err));
1907 }
1908 }
1909 /* Release memory for MAC filter entries which were
1910 * synced up with HW.
1911 */
1912 list_del(&f->list);
1913 kfree(f);
1914 }
1915
1916 if (num_del) {
1917 aq_ret = i40e_aq_remove_macvlan(hw, vsi->seid, del_list,
1918 num_del, NULL);
1919 aq_err = hw->aq.asq_last_status;
1920 num_del = 0;
1921
1922 /* Explicitly ignore and do not report when firmware
1923 * returns ENOENT.
1924 */
1925 if (aq_ret && !(aq_err == I40E_AQ_RC_ENOENT)) {
1926 retval = -EIO;
1927 dev_info(&pf->pdev->dev,
1928 "ignoring delete macvlan error on %s, err %s aq_err %s\n",
1929 vsi_name,
1930 i40e_stat_str(hw, aq_ret),
1931 i40e_aq_str(hw, aq_err));
1932 }
1933 }
1934
1935 kfree(del_list);
1936 del_list = NULL;
1937 }
1938
1939 if (!list_empty(&tmp_add_list)) {
1940 /* Do all the adds now. */
1941 filter_list_len = hw->aq.asq_buf_size /
1942 sizeof(struct i40e_aqc_add_macvlan_element_data);
1943 list_size = filter_list_len *
1944 sizeof(struct i40e_aqc_add_macvlan_element_data);
1945 add_list = kzalloc(list_size, GFP_ATOMIC);
1946 if (!add_list) {
1947 retval = -ENOMEM;
1948 goto out;
1949 }
1950 num_add = 0;
1951 list_for_each_entry(f, &tmp_add_list, list) {
1952 if (test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1953 &vsi->state)) {
1954 f->state = I40E_FILTER_FAILED;
1955 continue;
1956 }
1957 /* add to add array */
1958 if (num_add == 0)
1959 add_head = f;
1960 cmd_flags = 0;
1961 ether_addr_copy(add_list[num_add].mac_addr, f->macaddr);
1962 if (f->vlan == I40E_VLAN_ANY) {
1963 add_list[num_add].vlan_tag = 0;
1964 cmd_flags |= I40E_AQC_MACVLAN_ADD_IGNORE_VLAN;
1965 } else {
1966 add_list[num_add].vlan_tag =
1967 cpu_to_le16((u16)(f->vlan));
1968 }
1969 add_list[num_add].queue_number = 0;
1970 cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH;
1971 add_list[num_add].flags = cpu_to_le16(cmd_flags);
1972 num_add++;
1973
1974 /* flush a full buffer */
1975 if (num_add == filter_list_len) {
1976 aq_ret = i40e_aq_add_macvlan(hw, vsi->seid,
1977 add_list, num_add,
1978 NULL);
1979 aq_err = hw->aq.asq_last_status;
1980 fcnt = i40e_update_filter_state(num_add,
1981 add_list,
1982 add_head,
1983 aq_ret);
1984 vsi->active_filters += fcnt;
1985
1986 if (fcnt != num_add) {
1987 promisc_changed = true;
1988 set_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1989 &vsi->state);
1990 vsi->promisc_threshold =
1991 (vsi->active_filters * 3) / 4;
1992 dev_warn(&pf->pdev->dev,
1993 "Error %s adding RX filters on %s, promiscuous mode forced on\n",
1994 i40e_aq_str(hw, aq_err),
1995 vsi_name);
1996 }
1997 memset(add_list, 0, list_size);
1998 num_add = 0;
1999 }
2000 }
2001 if (num_add) {
2002 aq_ret = i40e_aq_add_macvlan(hw, vsi->seid,
2003 add_list, num_add, NULL);
2004 aq_err = hw->aq.asq_last_status;
2005 fcnt = i40e_update_filter_state(num_add, add_list,
2006 add_head, aq_ret);
2007 vsi->active_filters += fcnt;
2008 if (fcnt != num_add) {
2009 promisc_changed = true;
2010 set_bit(__I40E_FILTER_OVERFLOW_PROMISC,
2011 &vsi->state);
2012 vsi->promisc_threshold =
2013 (vsi->active_filters * 3) / 4;
2014 dev_warn(&pf->pdev->dev,
2015 "Error %s adding RX filters on %s, promiscuous mode forced on\n",
2016 i40e_aq_str(hw, aq_err), vsi_name);
2017 }
2018 }
2019 /* Now move all of the filters from the temp add list back to
2020 * the VSI's list.
2021 */
2022 spin_lock_bh(&vsi->mac_filter_list_lock);
2023 list_for_each_entry_safe(f, ftmp, &tmp_add_list, list) {
2024 list_move_tail(&f->list, &vsi->mac_filter_list);
2025 }
2026 spin_unlock_bh(&vsi->mac_filter_list_lock);
2027 kfree(add_list);
2028 add_list = NULL;
2029 }
2030
2031 /* Check to see if we can drop out of overflow promiscuous mode. */
2032 if (test_bit(__I40E_FILTER_OVERFLOW_PROMISC, &vsi->state) &&
2033 (vsi->active_filters < vsi->promisc_threshold)) {
2034 int failed_count = 0;
2035 /* See if we have any failed filters. We can't drop out of
2036 * promiscuous until these have all been deleted.
2037 */
2038 spin_lock_bh(&vsi->mac_filter_list_lock);
2039 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2040 if (f->state == I40E_FILTER_FAILED)
2041 failed_count++;
2042 }
2043 spin_unlock_bh(&vsi->mac_filter_list_lock);
2044 if (!failed_count) {
2045 dev_info(&pf->pdev->dev,
2046 "filter logjam cleared on %s, leaving overflow promiscuous mode\n",
2047 vsi_name);
2048 clear_bit(__I40E_FILTER_OVERFLOW_PROMISC, &vsi->state);
2049 promisc_changed = true;
2050 vsi->promisc_threshold = 0;
2051 }
2052 }
2053
2054 /* if the VF is not trusted do not do promisc */
2055 if ((vsi->type == I40E_VSI_SRIOV) && !pf->vf[vsi->vf_id].trusted) {
2056 clear_bit(__I40E_FILTER_OVERFLOW_PROMISC, &vsi->state);
2057 goto out;
2058 }
2059
2060 /* check for changes in promiscuous modes */
2061 if (changed_flags & IFF_ALLMULTI) {
2062 bool cur_multipromisc;
2063
2064 cur_multipromisc = !!(vsi->current_netdev_flags & IFF_ALLMULTI);
2065 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(&vsi->back->hw,
2066 vsi->seid,
2067 cur_multipromisc,
2068 NULL);
2069 if (aq_ret) {
2070 retval = i40e_aq_rc_to_posix(aq_ret,
2071 hw->aq.asq_last_status);
2072 dev_info(&pf->pdev->dev,
2073 "set multi promisc failed on %s, err %s aq_err %s\n",
2074 vsi_name,
2075 i40e_stat_str(hw, aq_ret),
2076 i40e_aq_str(hw, hw->aq.asq_last_status));
2077 }
2078 }
2079 if ((changed_flags & IFF_PROMISC) ||
2080 (promisc_changed &&
2081 test_bit(__I40E_FILTER_OVERFLOW_PROMISC, &vsi->state))) {
2082 bool cur_promisc;
2083
2084 cur_promisc = (!!(vsi->current_netdev_flags & IFF_PROMISC) ||
2085 test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
2086 &vsi->state));
2087 if ((vsi->type == I40E_VSI_MAIN) &&
2088 (pf->lan_veb != I40E_NO_VEB) &&
2089 !(pf->flags & I40E_FLAG_MFP_ENABLED)) {
2090 /* set defport ON for Main VSI instead of true promisc
2091 * this way we will get all unicast/multicast and VLAN
2092 * promisc behavior but will not get VF or VMDq traffic
2093 * replicated on the Main VSI.
2094 */
2095 if (pf->cur_promisc != cur_promisc) {
2096 pf->cur_promisc = cur_promisc;
2097 if (cur_promisc)
2098 aq_ret =
2099 i40e_aq_set_default_vsi(hw,
2100 vsi->seid,
2101 NULL);
2102 else
2103 aq_ret =
2104 i40e_aq_clear_default_vsi(hw,
2105 vsi->seid,
2106 NULL);
2107 if (aq_ret) {
2108 retval = i40e_aq_rc_to_posix(aq_ret,
2109 hw->aq.asq_last_status);
2110 dev_info(&pf->pdev->dev,
2111 "Set default VSI failed on %s, err %s, aq_err %s\n",
2112 vsi_name,
2113 i40e_stat_str(hw, aq_ret),
2114 i40e_aq_str(hw,
2115 hw->aq.asq_last_status));
2116 }
2117 }
2118 } else {
2119 aq_ret = i40e_aq_set_vsi_unicast_promiscuous(
2120 hw,
2121 vsi->seid,
2122 cur_promisc, NULL,
2123 true);
2124 if (aq_ret) {
2125 retval =
2126 i40e_aq_rc_to_posix(aq_ret,
2127 hw->aq.asq_last_status);
2128 dev_info(&pf->pdev->dev,
2129 "set unicast promisc failed on %s, err %s, aq_err %s\n",
2130 vsi_name,
2131 i40e_stat_str(hw, aq_ret),
2132 i40e_aq_str(hw,
2133 hw->aq.asq_last_status));
2134 }
2135 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(
2136 hw,
2137 vsi->seid,
2138 cur_promisc, NULL);
2139 if (aq_ret) {
2140 retval =
2141 i40e_aq_rc_to_posix(aq_ret,
2142 hw->aq.asq_last_status);
2143 dev_info(&pf->pdev->dev,
2144 "set multicast promisc failed on %s, err %s, aq_err %s\n",
2145 vsi_name,
2146 i40e_stat_str(hw, aq_ret),
2147 i40e_aq_str(hw,
2148 hw->aq.asq_last_status));
2149 }
2150 }
2151 aq_ret = i40e_aq_set_vsi_broadcast(&vsi->back->hw,
2152 vsi->seid,
2153 cur_promisc, NULL);
2154 if (aq_ret) {
2155 retval = i40e_aq_rc_to_posix(aq_ret,
2156 pf->hw.aq.asq_last_status);
2157 dev_info(&pf->pdev->dev,
2158 "set brdcast promisc failed, err %s, aq_err %s\n",
2159 i40e_stat_str(hw, aq_ret),
2160 i40e_aq_str(hw,
2161 hw->aq.asq_last_status));
2162 }
2163 }
2164 out:
2165 /* if something went wrong then set the changed flag so we try again */
2166 if (retval)
2167 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
2168
2169 clear_bit(__I40E_CONFIG_BUSY, &vsi->state);
2170 return retval;
2171 }
2172
2173 /**
2174 * i40e_sync_filters_subtask - Sync the VSI filter list with HW
2175 * @pf: board private structure
2176 **/
2177 static void i40e_sync_filters_subtask(struct i40e_pf *pf)
2178 {
2179 int v;
2180
2181 if (!pf || !(pf->flags & I40E_FLAG_FILTER_SYNC))
2182 return;
2183 pf->flags &= ~I40E_FLAG_FILTER_SYNC;
2184
2185 for (v = 0; v < pf->num_alloc_vsi; v++) {
2186 if (pf->vsi[v] &&
2187 (pf->vsi[v]->flags & I40E_VSI_FLAG_FILTER_CHANGED)) {
2188 int ret = i40e_sync_vsi_filters(pf->vsi[v]);
2189
2190 if (ret) {
2191 /* come back and try again later */
2192 pf->flags |= I40E_FLAG_FILTER_SYNC;
2193 break;
2194 }
2195 }
2196 }
2197 }
2198
2199 /**
2200 * i40e_change_mtu - NDO callback to change the Maximum Transfer Unit
2201 * @netdev: network interface device structure
2202 * @new_mtu: new value for maximum frame size
2203 *
2204 * Returns 0 on success, negative on failure
2205 **/
2206 static int i40e_change_mtu(struct net_device *netdev, int new_mtu)
2207 {
2208 struct i40e_netdev_priv *np = netdev_priv(netdev);
2209 struct i40e_vsi *vsi = np->vsi;
2210
2211 netdev_info(netdev, "changing MTU from %d to %d\n",
2212 netdev->mtu, new_mtu);
2213 netdev->mtu = new_mtu;
2214 if (netif_running(netdev))
2215 i40e_vsi_reinit_locked(vsi);
2216 i40e_notify_client_of_l2_param_changes(vsi);
2217 return 0;
2218 }
2219
2220 /**
2221 * i40e_ioctl - Access the hwtstamp interface
2222 * @netdev: network interface device structure
2223 * @ifr: interface request data
2224 * @cmd: ioctl command
2225 **/
2226 int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
2227 {
2228 struct i40e_netdev_priv *np = netdev_priv(netdev);
2229 struct i40e_pf *pf = np->vsi->back;
2230
2231 switch (cmd) {
2232 case SIOCGHWTSTAMP:
2233 return i40e_ptp_get_ts_config(pf, ifr);
2234 case SIOCSHWTSTAMP:
2235 return i40e_ptp_set_ts_config(pf, ifr);
2236 default:
2237 return -EOPNOTSUPP;
2238 }
2239 }
2240
2241 /**
2242 * i40e_vlan_stripping_enable - Turn on vlan stripping for the VSI
2243 * @vsi: the vsi being adjusted
2244 **/
2245 void i40e_vlan_stripping_enable(struct i40e_vsi *vsi)
2246 {
2247 struct i40e_vsi_context ctxt;
2248 i40e_status ret;
2249
2250 if ((vsi->info.valid_sections &
2251 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2252 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_MODE_MASK) == 0))
2253 return; /* already enabled */
2254
2255 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2256 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2257 I40E_AQ_VSI_PVLAN_EMOD_STR_BOTH;
2258
2259 ctxt.seid = vsi->seid;
2260 ctxt.info = vsi->info;
2261 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2262 if (ret) {
2263 dev_info(&vsi->back->pdev->dev,
2264 "update vlan stripping failed, err %s aq_err %s\n",
2265 i40e_stat_str(&vsi->back->hw, ret),
2266 i40e_aq_str(&vsi->back->hw,
2267 vsi->back->hw.aq.asq_last_status));
2268 }
2269 }
2270
2271 /**
2272 * i40e_vlan_stripping_disable - Turn off vlan stripping for the VSI
2273 * @vsi: the vsi being adjusted
2274 **/
2275 void i40e_vlan_stripping_disable(struct i40e_vsi *vsi)
2276 {
2277 struct i40e_vsi_context ctxt;
2278 i40e_status ret;
2279
2280 if ((vsi->info.valid_sections &
2281 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2282 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_EMOD_MASK) ==
2283 I40E_AQ_VSI_PVLAN_EMOD_MASK))
2284 return; /* already disabled */
2285
2286 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2287 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2288 I40E_AQ_VSI_PVLAN_EMOD_NOTHING;
2289
2290 ctxt.seid = vsi->seid;
2291 ctxt.info = vsi->info;
2292 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2293 if (ret) {
2294 dev_info(&vsi->back->pdev->dev,
2295 "update vlan stripping failed, err %s aq_err %s\n",
2296 i40e_stat_str(&vsi->back->hw, ret),
2297 i40e_aq_str(&vsi->back->hw,
2298 vsi->back->hw.aq.asq_last_status));
2299 }
2300 }
2301
2302 /**
2303 * i40e_vlan_rx_register - Setup or shutdown vlan offload
2304 * @netdev: network interface to be adjusted
2305 * @features: netdev features to test if VLAN offload is enabled or not
2306 **/
2307 static void i40e_vlan_rx_register(struct net_device *netdev, u32 features)
2308 {
2309 struct i40e_netdev_priv *np = netdev_priv(netdev);
2310 struct i40e_vsi *vsi = np->vsi;
2311
2312 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2313 i40e_vlan_stripping_enable(vsi);
2314 else
2315 i40e_vlan_stripping_disable(vsi);
2316 }
2317
2318 /**
2319 * i40e_vsi_add_vlan - Add vsi membership for given vlan
2320 * @vsi: the vsi being configured
2321 * @vid: vlan id to be added (0 = untagged only , -1 = any)
2322 **/
2323 int i40e_vsi_add_vlan(struct i40e_vsi *vsi, s16 vid)
2324 {
2325 struct i40e_mac_filter *f, *ftmp, *add_f;
2326 bool is_netdev, is_vf;
2327
2328 is_vf = (vsi->type == I40E_VSI_SRIOV);
2329 is_netdev = !!(vsi->netdev);
2330
2331 /* Locked once because all functions invoked below iterates list*/
2332 spin_lock_bh(&vsi->mac_filter_list_lock);
2333
2334 if (is_netdev) {
2335 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, vid,
2336 is_vf, is_netdev);
2337 if (!add_f) {
2338 dev_info(&vsi->back->pdev->dev,
2339 "Could not add vlan filter %d for %pM\n",
2340 vid, vsi->netdev->dev_addr);
2341 spin_unlock_bh(&vsi->mac_filter_list_lock);
2342 return -ENOMEM;
2343 }
2344 }
2345
2346 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
2347 add_f = i40e_add_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
2348 if (!add_f) {
2349 dev_info(&vsi->back->pdev->dev,
2350 "Could not add vlan filter %d for %pM\n",
2351 vid, f->macaddr);
2352 spin_unlock_bh(&vsi->mac_filter_list_lock);
2353 return -ENOMEM;
2354 }
2355 }
2356
2357 /* Now if we add a vlan tag, make sure to check if it is the first
2358 * tag (i.e. a "tag" -1 does exist) and if so replace the -1 "tag"
2359 * with 0, so we now accept untagged and specified tagged traffic
2360 * (and not all tags along with untagged)
2361 */
2362 if (vid > 0) {
2363 if (is_netdev && i40e_find_filter(vsi, vsi->netdev->dev_addr,
2364 I40E_VLAN_ANY,
2365 is_vf, is_netdev)) {
2366 i40e_del_filter(vsi, vsi->netdev->dev_addr,
2367 I40E_VLAN_ANY, is_vf, is_netdev);
2368 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, 0,
2369 is_vf, is_netdev);
2370 if (!add_f) {
2371 dev_info(&vsi->back->pdev->dev,
2372 "Could not add filter 0 for %pM\n",
2373 vsi->netdev->dev_addr);
2374 spin_unlock_bh(&vsi->mac_filter_list_lock);
2375 return -ENOMEM;
2376 }
2377 }
2378 }
2379
2380 /* Do not assume that I40E_VLAN_ANY should be reset to VLAN 0 */
2381 if (vid > 0 && !vsi->info.pvid) {
2382 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
2383 if (!i40e_find_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2384 is_vf, is_netdev))
2385 continue;
2386 i40e_del_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2387 is_vf, is_netdev);
2388 add_f = i40e_add_filter(vsi, f->macaddr,
2389 0, is_vf, is_netdev);
2390 if (!add_f) {
2391 dev_info(&vsi->back->pdev->dev,
2392 "Could not add filter 0 for %pM\n",
2393 f->macaddr);
2394 spin_unlock_bh(&vsi->mac_filter_list_lock);
2395 return -ENOMEM;
2396 }
2397 }
2398 }
2399
2400 spin_unlock_bh(&vsi->mac_filter_list_lock);
2401
2402 /* schedule our worker thread which will take care of
2403 * applying the new filter changes
2404 */
2405 i40e_service_event_schedule(vsi->back);
2406 return 0;
2407 }
2408
2409 /**
2410 * i40e_vsi_kill_vlan - Remove vsi membership for given vlan
2411 * @vsi: the vsi being configured
2412 * @vid: vlan id to be removed (0 = untagged only , -1 = any)
2413 *
2414 * Return: 0 on success or negative otherwise
2415 **/
2416 int i40e_vsi_kill_vlan(struct i40e_vsi *vsi, s16 vid)
2417 {
2418 struct net_device *netdev = vsi->netdev;
2419 struct i40e_mac_filter *f, *ftmp, *add_f;
2420 bool is_vf, is_netdev;
2421 int filter_count = 0;
2422
2423 is_vf = (vsi->type == I40E_VSI_SRIOV);
2424 is_netdev = !!(netdev);
2425
2426 /* Locked once because all functions invoked below iterates list */
2427 spin_lock_bh(&vsi->mac_filter_list_lock);
2428
2429 if (is_netdev)
2430 i40e_del_filter(vsi, netdev->dev_addr, vid, is_vf, is_netdev);
2431
2432 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list)
2433 i40e_del_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
2434
2435 /* go through all the filters for this VSI and if there is only
2436 * vid == 0 it means there are no other filters, so vid 0 must
2437 * be replaced with -1. This signifies that we should from now
2438 * on accept any traffic (with any tag present, or untagged)
2439 */
2440 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2441 if (is_netdev) {
2442 if (f->vlan &&
2443 ether_addr_equal(netdev->dev_addr, f->macaddr))
2444 filter_count++;
2445 }
2446
2447 if (f->vlan)
2448 filter_count++;
2449 }
2450
2451 if (!filter_count && is_netdev) {
2452 i40e_del_filter(vsi, netdev->dev_addr, 0, is_vf, is_netdev);
2453 f = i40e_add_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
2454 is_vf, is_netdev);
2455 if (!f) {
2456 dev_info(&vsi->back->pdev->dev,
2457 "Could not add filter %d for %pM\n",
2458 I40E_VLAN_ANY, netdev->dev_addr);
2459 spin_unlock_bh(&vsi->mac_filter_list_lock);
2460 return -ENOMEM;
2461 }
2462 }
2463
2464 if (!filter_count) {
2465 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
2466 i40e_del_filter(vsi, f->macaddr, 0, is_vf, is_netdev);
2467 add_f = i40e_add_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2468 is_vf, is_netdev);
2469 if (!add_f) {
2470 dev_info(&vsi->back->pdev->dev,
2471 "Could not add filter %d for %pM\n",
2472 I40E_VLAN_ANY, f->macaddr);
2473 spin_unlock_bh(&vsi->mac_filter_list_lock);
2474 return -ENOMEM;
2475 }
2476 }
2477 }
2478
2479 spin_unlock_bh(&vsi->mac_filter_list_lock);
2480
2481 /* schedule our worker thread which will take care of
2482 * applying the new filter changes
2483 */
2484 i40e_service_event_schedule(vsi->back);
2485 return 0;
2486 }
2487
2488 /**
2489 * i40e_vlan_rx_add_vid - Add a vlan id filter to HW offload
2490 * @netdev: network interface to be adjusted
2491 * @vid: vlan id to be added
2492 *
2493 * net_device_ops implementation for adding vlan ids
2494 **/
2495 #ifdef I40E_FCOE
2496 int i40e_vlan_rx_add_vid(struct net_device *netdev,
2497 __always_unused __be16 proto, u16 vid)
2498 #else
2499 static int i40e_vlan_rx_add_vid(struct net_device *netdev,
2500 __always_unused __be16 proto, u16 vid)
2501 #endif
2502 {
2503 struct i40e_netdev_priv *np = netdev_priv(netdev);
2504 struct i40e_vsi *vsi = np->vsi;
2505 int ret = 0;
2506
2507 if (vid > 4095)
2508 return -EINVAL;
2509
2510 /* If the network stack called us with vid = 0 then
2511 * it is asking to receive priority tagged packets with
2512 * vlan id 0. Our HW receives them by default when configured
2513 * to receive untagged packets so there is no need to add an
2514 * extra filter for vlan 0 tagged packets.
2515 */
2516 if (vid)
2517 ret = i40e_vsi_add_vlan(vsi, vid);
2518
2519 if (!ret && (vid < VLAN_N_VID))
2520 set_bit(vid, vsi->active_vlans);
2521
2522 return ret;
2523 }
2524
2525 /**
2526 * i40e_vlan_rx_kill_vid - Remove a vlan id filter from HW offload
2527 * @netdev: network interface to be adjusted
2528 * @vid: vlan id to be removed
2529 *
2530 * net_device_ops implementation for removing vlan ids
2531 **/
2532 #ifdef I40E_FCOE
2533 int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2534 __always_unused __be16 proto, u16 vid)
2535 #else
2536 static int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2537 __always_unused __be16 proto, u16 vid)
2538 #endif
2539 {
2540 struct i40e_netdev_priv *np = netdev_priv(netdev);
2541 struct i40e_vsi *vsi = np->vsi;
2542
2543 /* return code is ignored as there is nothing a user
2544 * can do about failure to remove and a log message was
2545 * already printed from the other function
2546 */
2547 i40e_vsi_kill_vlan(vsi, vid);
2548
2549 clear_bit(vid, vsi->active_vlans);
2550
2551 return 0;
2552 }
2553
2554 /**
2555 * i40e_macaddr_init - explicitly write the mac address filters
2556 *
2557 * @vsi: pointer to the vsi
2558 * @macaddr: the MAC address
2559 *
2560 * This is needed when the macaddr has been obtained by other
2561 * means than the default, e.g., from Open Firmware or IDPROM.
2562 * Returns 0 on success, negative on failure
2563 **/
2564 static int i40e_macaddr_init(struct i40e_vsi *vsi, u8 *macaddr)
2565 {
2566 int ret;
2567 struct i40e_aqc_add_macvlan_element_data element;
2568
2569 ret = i40e_aq_mac_address_write(&vsi->back->hw,
2570 I40E_AQC_WRITE_TYPE_LAA_WOL,
2571 macaddr, NULL);
2572 if (ret) {
2573 dev_info(&vsi->back->pdev->dev,
2574 "Addr change for VSI failed: %d\n", ret);
2575 return -EADDRNOTAVAIL;
2576 }
2577
2578 memset(&element, 0, sizeof(element));
2579 ether_addr_copy(element.mac_addr, macaddr);
2580 element.flags = cpu_to_le16(I40E_AQC_MACVLAN_ADD_PERFECT_MATCH);
2581 ret = i40e_aq_add_macvlan(&vsi->back->hw, vsi->seid, &element, 1, NULL);
2582 if (ret) {
2583 dev_info(&vsi->back->pdev->dev,
2584 "add filter failed err %s aq_err %s\n",
2585 i40e_stat_str(&vsi->back->hw, ret),
2586 i40e_aq_str(&vsi->back->hw,
2587 vsi->back->hw.aq.asq_last_status));
2588 }
2589 return ret;
2590 }
2591
2592 /**
2593 * i40e_restore_vlan - Reinstate vlans when vsi/netdev comes back up
2594 * @vsi: the vsi being brought back up
2595 **/
2596 static void i40e_restore_vlan(struct i40e_vsi *vsi)
2597 {
2598 u16 vid;
2599
2600 if (!vsi->netdev)
2601 return;
2602
2603 i40e_vlan_rx_register(vsi->netdev, vsi->netdev->features);
2604
2605 for_each_set_bit(vid, vsi->active_vlans, VLAN_N_VID)
2606 i40e_vlan_rx_add_vid(vsi->netdev, htons(ETH_P_8021Q),
2607 vid);
2608 }
2609
2610 /**
2611 * i40e_vsi_add_pvid - Add pvid for the VSI
2612 * @vsi: the vsi being adjusted
2613 * @vid: the vlan id to set as a PVID
2614 **/
2615 int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid)
2616 {
2617 struct i40e_vsi_context ctxt;
2618 i40e_status ret;
2619
2620 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2621 vsi->info.pvid = cpu_to_le16(vid);
2622 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_TAGGED |
2623 I40E_AQ_VSI_PVLAN_INSERT_PVID |
2624 I40E_AQ_VSI_PVLAN_EMOD_STR;
2625
2626 ctxt.seid = vsi->seid;
2627 ctxt.info = vsi->info;
2628 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2629 if (ret) {
2630 dev_info(&vsi->back->pdev->dev,
2631 "add pvid failed, err %s aq_err %s\n",
2632 i40e_stat_str(&vsi->back->hw, ret),
2633 i40e_aq_str(&vsi->back->hw,
2634 vsi->back->hw.aq.asq_last_status));
2635 return -ENOENT;
2636 }
2637
2638 return 0;
2639 }
2640
2641 /**
2642 * i40e_vsi_remove_pvid - Remove the pvid from the VSI
2643 * @vsi: the vsi being adjusted
2644 *
2645 * Just use the vlan_rx_register() service to put it back to normal
2646 **/
2647 void i40e_vsi_remove_pvid(struct i40e_vsi *vsi)
2648 {
2649 i40e_vlan_stripping_disable(vsi);
2650
2651 vsi->info.pvid = 0;
2652 }
2653
2654 /**
2655 * i40e_vsi_setup_tx_resources - Allocate VSI Tx queue resources
2656 * @vsi: ptr to the VSI
2657 *
2658 * If this function returns with an error, then it's possible one or
2659 * more of the rings is populated (while the rest are not). It is the
2660 * callers duty to clean those orphaned rings.
2661 *
2662 * Return 0 on success, negative on failure
2663 **/
2664 static int i40e_vsi_setup_tx_resources(struct i40e_vsi *vsi)
2665 {
2666 int i, err = 0;
2667
2668 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2669 err = i40e_setup_tx_descriptors(vsi->tx_rings[i]);
2670
2671 return err;
2672 }
2673
2674 /**
2675 * i40e_vsi_free_tx_resources - Free Tx resources for VSI queues
2676 * @vsi: ptr to the VSI
2677 *
2678 * Free VSI's transmit software resources
2679 **/
2680 static void i40e_vsi_free_tx_resources(struct i40e_vsi *vsi)
2681 {
2682 int i;
2683
2684 if (!vsi->tx_rings)
2685 return;
2686
2687 for (i = 0; i < vsi->num_queue_pairs; i++)
2688 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc)
2689 i40e_free_tx_resources(vsi->tx_rings[i]);
2690 }
2691
2692 /**
2693 * i40e_vsi_setup_rx_resources - Allocate VSI queues Rx resources
2694 * @vsi: ptr to the VSI
2695 *
2696 * If this function returns with an error, then it's possible one or
2697 * more of the rings is populated (while the rest are not). It is the
2698 * callers duty to clean those orphaned rings.
2699 *
2700 * Return 0 on success, negative on failure
2701 **/
2702 static int i40e_vsi_setup_rx_resources(struct i40e_vsi *vsi)
2703 {
2704 int i, err = 0;
2705
2706 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2707 err = i40e_setup_rx_descriptors(vsi->rx_rings[i]);
2708 #ifdef I40E_FCOE
2709 i40e_fcoe_setup_ddp_resources(vsi);
2710 #endif
2711 return err;
2712 }
2713
2714 /**
2715 * i40e_vsi_free_rx_resources - Free Rx Resources for VSI queues
2716 * @vsi: ptr to the VSI
2717 *
2718 * Free all receive software resources
2719 **/
2720 static void i40e_vsi_free_rx_resources(struct i40e_vsi *vsi)
2721 {
2722 int i;
2723
2724 if (!vsi->rx_rings)
2725 return;
2726
2727 for (i = 0; i < vsi->num_queue_pairs; i++)
2728 if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc)
2729 i40e_free_rx_resources(vsi->rx_rings[i]);
2730 #ifdef I40E_FCOE
2731 i40e_fcoe_free_ddp_resources(vsi);
2732 #endif
2733 }
2734
2735 /**
2736 * i40e_config_xps_tx_ring - Configure XPS for a Tx ring
2737 * @ring: The Tx ring to configure
2738 *
2739 * This enables/disables XPS for a given Tx descriptor ring
2740 * based on the TCs enabled for the VSI that ring belongs to.
2741 **/
2742 static void i40e_config_xps_tx_ring(struct i40e_ring *ring)
2743 {
2744 struct i40e_vsi *vsi = ring->vsi;
2745 cpumask_var_t mask;
2746
2747 if (!ring->q_vector || !ring->netdev)
2748 return;
2749
2750 /* Single TC mode enable XPS */
2751 if (vsi->tc_config.numtc <= 1) {
2752 if (!test_and_set_bit(__I40E_TX_XPS_INIT_DONE, &ring->state))
2753 netif_set_xps_queue(ring->netdev,
2754 &ring->q_vector->affinity_mask,
2755 ring->queue_index);
2756 } else if (alloc_cpumask_var(&mask, GFP_KERNEL)) {
2757 /* Disable XPS to allow selection based on TC */
2758 bitmap_zero(cpumask_bits(mask), nr_cpumask_bits);
2759 netif_set_xps_queue(ring->netdev, mask, ring->queue_index);
2760 free_cpumask_var(mask);
2761 }
2762
2763 /* schedule our worker thread which will take care of
2764 * applying the new filter changes
2765 */
2766 i40e_service_event_schedule(vsi->back);
2767 }
2768
2769 /**
2770 * i40e_configure_tx_ring - Configure a transmit ring context and rest
2771 * @ring: The Tx ring to configure
2772 *
2773 * Configure the Tx descriptor ring in the HMC context.
2774 **/
2775 static int i40e_configure_tx_ring(struct i40e_ring *ring)
2776 {
2777 struct i40e_vsi *vsi = ring->vsi;
2778 u16 pf_q = vsi->base_queue + ring->queue_index;
2779 struct i40e_hw *hw = &vsi->back->hw;
2780 struct i40e_hmc_obj_txq tx_ctx;
2781 i40e_status err = 0;
2782 u32 qtx_ctl = 0;
2783
2784 /* some ATR related tx ring init */
2785 if (vsi->back->flags & I40E_FLAG_FD_ATR_ENABLED) {
2786 ring->atr_sample_rate = vsi->back->atr_sample_rate;
2787 ring->atr_count = 0;
2788 } else {
2789 ring->atr_sample_rate = 0;
2790 }
2791
2792 /* configure XPS */
2793 i40e_config_xps_tx_ring(ring);
2794
2795 /* clear the context structure first */
2796 memset(&tx_ctx, 0, sizeof(tx_ctx));
2797
2798 tx_ctx.new_context = 1;
2799 tx_ctx.base = (ring->dma / 128);
2800 tx_ctx.qlen = ring->count;
2801 tx_ctx.fd_ena = !!(vsi->back->flags & (I40E_FLAG_FD_SB_ENABLED |
2802 I40E_FLAG_FD_ATR_ENABLED));
2803 #ifdef I40E_FCOE
2804 tx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
2805 #endif
2806 tx_ctx.timesync_ena = !!(vsi->back->flags & I40E_FLAG_PTP);
2807 /* FDIR VSI tx ring can still use RS bit and writebacks */
2808 if (vsi->type != I40E_VSI_FDIR)
2809 tx_ctx.head_wb_ena = 1;
2810 tx_ctx.head_wb_addr = ring->dma +
2811 (ring->count * sizeof(struct i40e_tx_desc));
2812
2813 /* As part of VSI creation/update, FW allocates certain
2814 * Tx arbitration queue sets for each TC enabled for
2815 * the VSI. The FW returns the handles to these queue
2816 * sets as part of the response buffer to Add VSI,
2817 * Update VSI, etc. AQ commands. It is expected that
2818 * these queue set handles be associated with the Tx
2819 * queues by the driver as part of the TX queue context
2820 * initialization. This has to be done regardless of
2821 * DCB as by default everything is mapped to TC0.
2822 */
2823 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[ring->dcb_tc]);
2824 tx_ctx.rdylist_act = 0;
2825
2826 /* clear the context in the HMC */
2827 err = i40e_clear_lan_tx_queue_context(hw, pf_q);
2828 if (err) {
2829 dev_info(&vsi->back->pdev->dev,
2830 "Failed to clear LAN Tx queue context on Tx ring %d (pf_q %d), error: %d\n",
2831 ring->queue_index, pf_q, err);
2832 return -ENOMEM;
2833 }
2834
2835 /* set the context in the HMC */
2836 err = i40e_set_lan_tx_queue_context(hw, pf_q, &tx_ctx);
2837 if (err) {
2838 dev_info(&vsi->back->pdev->dev,
2839 "Failed to set LAN Tx queue context on Tx ring %d (pf_q %d, error: %d\n",
2840 ring->queue_index, pf_q, err);
2841 return -ENOMEM;
2842 }
2843
2844 /* Now associate this queue with this PCI function */
2845 if (vsi->type == I40E_VSI_VMDQ2) {
2846 qtx_ctl = I40E_QTX_CTL_VM_QUEUE;
2847 qtx_ctl |= ((vsi->id) << I40E_QTX_CTL_VFVM_INDX_SHIFT) &
2848 I40E_QTX_CTL_VFVM_INDX_MASK;
2849 } else {
2850 qtx_ctl = I40E_QTX_CTL_PF_QUEUE;
2851 }
2852
2853 qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) &
2854 I40E_QTX_CTL_PF_INDX_MASK);
2855 wr32(hw, I40E_QTX_CTL(pf_q), qtx_ctl);
2856 i40e_flush(hw);
2857
2858 /* cache tail off for easier writes later */
2859 ring->tail = hw->hw_addr + I40E_QTX_TAIL(pf_q);
2860
2861 return 0;
2862 }
2863
2864 /**
2865 * i40e_configure_rx_ring - Configure a receive ring context
2866 * @ring: The Rx ring to configure
2867 *
2868 * Configure the Rx descriptor ring in the HMC context.
2869 **/
2870 static int i40e_configure_rx_ring(struct i40e_ring *ring)
2871 {
2872 struct i40e_vsi *vsi = ring->vsi;
2873 u32 chain_len = vsi->back->hw.func_caps.rx_buf_chain_len;
2874 u16 pf_q = vsi->base_queue + ring->queue_index;
2875 struct i40e_hw *hw = &vsi->back->hw;
2876 struct i40e_hmc_obj_rxq rx_ctx;
2877 i40e_status err = 0;
2878
2879 ring->state = 0;
2880
2881 /* clear the context structure first */
2882 memset(&rx_ctx, 0, sizeof(rx_ctx));
2883
2884 ring->rx_buf_len = vsi->rx_buf_len;
2885
2886 rx_ctx.dbuff = ring->rx_buf_len >> I40E_RXQ_CTX_DBUFF_SHIFT;
2887
2888 rx_ctx.base = (ring->dma / 128);
2889 rx_ctx.qlen = ring->count;
2890
2891 /* use 32 byte descriptors */
2892 rx_ctx.dsize = 1;
2893
2894 /* descriptor type is always zero
2895 * rx_ctx.dtype = 0;
2896 */
2897 rx_ctx.hsplit_0 = 0;
2898
2899 rx_ctx.rxmax = min_t(u16, vsi->max_frame, chain_len * ring->rx_buf_len);
2900 if (hw->revision_id == 0)
2901 rx_ctx.lrxqthresh = 0;
2902 else
2903 rx_ctx.lrxqthresh = 2;
2904 rx_ctx.crcstrip = 1;
2905 rx_ctx.l2tsel = 1;
2906 /* this controls whether VLAN is stripped from inner headers */
2907 rx_ctx.showiv = 0;
2908 #ifdef I40E_FCOE
2909 rx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
2910 #endif
2911 /* set the prefena field to 1 because the manual says to */
2912 rx_ctx.prefena = 1;
2913
2914 /* clear the context in the HMC */
2915 err = i40e_clear_lan_rx_queue_context(hw, pf_q);
2916 if (err) {
2917 dev_info(&vsi->back->pdev->dev,
2918 "Failed to clear LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2919 ring->queue_index, pf_q, err);
2920 return -ENOMEM;
2921 }
2922
2923 /* set the context in the HMC */
2924 err = i40e_set_lan_rx_queue_context(hw, pf_q, &rx_ctx);
2925 if (err) {
2926 dev_info(&vsi->back->pdev->dev,
2927 "Failed to set LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2928 ring->queue_index, pf_q, err);
2929 return -ENOMEM;
2930 }
2931
2932 /* cache tail for quicker writes, and clear the reg before use */
2933 ring->tail = hw->hw_addr + I40E_QRX_TAIL(pf_q);
2934 writel(0, ring->tail);
2935
2936 i40e_alloc_rx_buffers(ring, I40E_DESC_UNUSED(ring));
2937
2938 return 0;
2939 }
2940
2941 /**
2942 * i40e_vsi_configure_tx - Configure the VSI for Tx
2943 * @vsi: VSI structure describing this set of rings and resources
2944 *
2945 * Configure the Tx VSI for operation.
2946 **/
2947 static int i40e_vsi_configure_tx(struct i40e_vsi *vsi)
2948 {
2949 int err = 0;
2950 u16 i;
2951
2952 for (i = 0; (i < vsi->num_queue_pairs) && !err; i++)
2953 err = i40e_configure_tx_ring(vsi->tx_rings[i]);
2954
2955 return err;
2956 }
2957
2958 /**
2959 * i40e_vsi_configure_rx - Configure the VSI for Rx
2960 * @vsi: the VSI being configured
2961 *
2962 * Configure the Rx VSI for operation.
2963 **/
2964 static int i40e_vsi_configure_rx(struct i40e_vsi *vsi)
2965 {
2966 int err = 0;
2967 u16 i;
2968
2969 if (vsi->netdev && (vsi->netdev->mtu > ETH_DATA_LEN))
2970 vsi->max_frame = vsi->netdev->mtu + ETH_HLEN
2971 + ETH_FCS_LEN + VLAN_HLEN;
2972 else
2973 vsi->max_frame = I40E_RXBUFFER_2048;
2974
2975 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2976
2977 #ifdef I40E_FCOE
2978 /* setup rx buffer for FCoE */
2979 if ((vsi->type == I40E_VSI_FCOE) &&
2980 (vsi->back->flags & I40E_FLAG_FCOE_ENABLED)) {
2981 vsi->rx_buf_len = I40E_RXBUFFER_3072;
2982 vsi->max_frame = I40E_RXBUFFER_3072;
2983 }
2984
2985 #endif /* I40E_FCOE */
2986 /* round up for the chip's needs */
2987 vsi->rx_buf_len = ALIGN(vsi->rx_buf_len,
2988 BIT_ULL(I40E_RXQ_CTX_DBUFF_SHIFT));
2989
2990 /* set up individual rings */
2991 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2992 err = i40e_configure_rx_ring(vsi->rx_rings[i]);
2993
2994 return err;
2995 }
2996
2997 /**
2998 * i40e_vsi_config_dcb_rings - Update rings to reflect DCB TC
2999 * @vsi: ptr to the VSI
3000 **/
3001 static void i40e_vsi_config_dcb_rings(struct i40e_vsi *vsi)
3002 {
3003 struct i40e_ring *tx_ring, *rx_ring;
3004 u16 qoffset, qcount;
3005 int i, n;
3006
3007 if (!(vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
3008 /* Reset the TC information */
3009 for (i = 0; i < vsi->num_queue_pairs; i++) {
3010 rx_ring = vsi->rx_rings[i];
3011 tx_ring = vsi->tx_rings[i];
3012 rx_ring->dcb_tc = 0;
3013 tx_ring->dcb_tc = 0;
3014 }
3015 }
3016
3017 for (n = 0; n < I40E_MAX_TRAFFIC_CLASS; n++) {
3018 if (!(vsi->tc_config.enabled_tc & BIT_ULL(n)))
3019 continue;
3020
3021 qoffset = vsi->tc_config.tc_info[n].qoffset;
3022 qcount = vsi->tc_config.tc_info[n].qcount;
3023 for (i = qoffset; i < (qoffset + qcount); i++) {
3024 rx_ring = vsi->rx_rings[i];
3025 tx_ring = vsi->tx_rings[i];
3026 rx_ring->dcb_tc = n;
3027 tx_ring->dcb_tc = n;
3028 }
3029 }
3030 }
3031
3032 /**
3033 * i40e_set_vsi_rx_mode - Call set_rx_mode on a VSI
3034 * @vsi: ptr to the VSI
3035 **/
3036 static void i40e_set_vsi_rx_mode(struct i40e_vsi *vsi)
3037 {
3038 struct i40e_pf *pf = vsi->back;
3039 int err;
3040
3041 if (vsi->netdev)
3042 i40e_set_rx_mode(vsi->netdev);
3043
3044 if (!!(pf->flags & I40E_FLAG_PF_MAC)) {
3045 err = i40e_macaddr_init(vsi, pf->hw.mac.addr);
3046 if (err) {
3047 dev_warn(&pf->pdev->dev,
3048 "could not set up macaddr; err %d\n", err);
3049 }
3050 }
3051 }
3052
3053 /**
3054 * i40e_fdir_filter_restore - Restore the Sideband Flow Director filters
3055 * @vsi: Pointer to the targeted VSI
3056 *
3057 * This function replays the hlist on the hw where all the SB Flow Director
3058 * filters were saved.
3059 **/
3060 static void i40e_fdir_filter_restore(struct i40e_vsi *vsi)
3061 {
3062 struct i40e_fdir_filter *filter;
3063 struct i40e_pf *pf = vsi->back;
3064 struct hlist_node *node;
3065
3066 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
3067 return;
3068
3069 hlist_for_each_entry_safe(filter, node,
3070 &pf->fdir_filter_list, fdir_node) {
3071 i40e_add_del_fdir(vsi, filter, true);
3072 }
3073 }
3074
3075 /**
3076 * i40e_vsi_configure - Set up the VSI for action
3077 * @vsi: the VSI being configured
3078 **/
3079 static int i40e_vsi_configure(struct i40e_vsi *vsi)
3080 {
3081 int err;
3082
3083 i40e_set_vsi_rx_mode(vsi);
3084 i40e_restore_vlan(vsi);
3085 i40e_vsi_config_dcb_rings(vsi);
3086 err = i40e_vsi_configure_tx(vsi);
3087 if (!err)
3088 err = i40e_vsi_configure_rx(vsi);
3089
3090 return err;
3091 }
3092
3093 /**
3094 * i40e_vsi_configure_msix - MSIX mode Interrupt Config in the HW
3095 * @vsi: the VSI being configured
3096 **/
3097 static void i40e_vsi_configure_msix(struct i40e_vsi *vsi)
3098 {
3099 struct i40e_pf *pf = vsi->back;
3100 struct i40e_hw *hw = &pf->hw;
3101 u16 vector;
3102 int i, q;
3103 u32 qp;
3104
3105 /* The interrupt indexing is offset by 1 in the PFINT_ITRn
3106 * and PFINT_LNKLSTn registers, e.g.:
3107 * PFINT_ITRn[0..n-1] gets msix-1..msix-n (qpair interrupts)
3108 */
3109 qp = vsi->base_queue;
3110 vector = vsi->base_vector;
3111 for (i = 0; i < vsi->num_q_vectors; i++, vector++) {
3112 struct i40e_q_vector *q_vector = vsi->q_vectors[i];
3113
3114 q_vector->itr_countdown = ITR_COUNTDOWN_START;
3115 q_vector->rx.itr = ITR_TO_REG(vsi->rx_rings[i]->rx_itr_setting);
3116 q_vector->rx.latency_range = I40E_LOW_LATENCY;
3117 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1),
3118 q_vector->rx.itr);
3119 q_vector->tx.itr = ITR_TO_REG(vsi->tx_rings[i]->tx_itr_setting);
3120 q_vector->tx.latency_range = I40E_LOW_LATENCY;
3121 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1),
3122 q_vector->tx.itr);
3123 wr32(hw, I40E_PFINT_RATEN(vector - 1),
3124 INTRL_USEC_TO_REG(vsi->int_rate_limit));
3125
3126 /* Linked list for the queuepairs assigned to this vector */
3127 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), qp);
3128 for (q = 0; q < q_vector->num_ringpairs; q++) {
3129 u32 val;
3130
3131 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3132 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
3133 (vector << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) |
3134 (qp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT)|
3135 (I40E_QUEUE_TYPE_TX
3136 << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT);
3137
3138 wr32(hw, I40E_QINT_RQCTL(qp), val);
3139
3140 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3141 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3142 (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) |
3143 ((qp+1) << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT)|
3144 (I40E_QUEUE_TYPE_RX
3145 << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3146
3147 /* Terminate the linked list */
3148 if (q == (q_vector->num_ringpairs - 1))
3149 val |= (I40E_QUEUE_END_OF_LIST
3150 << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
3151
3152 wr32(hw, I40E_QINT_TQCTL(qp), val);
3153 qp++;
3154 }
3155 }
3156
3157 i40e_flush(hw);
3158 }
3159
3160 /**
3161 * i40e_enable_misc_int_causes - enable the non-queue interrupts
3162 * @hw: ptr to the hardware info
3163 **/
3164 static void i40e_enable_misc_int_causes(struct i40e_pf *pf)
3165 {
3166 struct i40e_hw *hw = &pf->hw;
3167 u32 val;
3168
3169 /* clear things first */
3170 wr32(hw, I40E_PFINT_ICR0_ENA, 0); /* disable all */
3171 rd32(hw, I40E_PFINT_ICR0); /* read to clear */
3172
3173 val = I40E_PFINT_ICR0_ENA_ECC_ERR_MASK |
3174 I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK |
3175 I40E_PFINT_ICR0_ENA_GRST_MASK |
3176 I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK |
3177 I40E_PFINT_ICR0_ENA_GPIO_MASK |
3178 I40E_PFINT_ICR0_ENA_HMC_ERR_MASK |
3179 I40E_PFINT_ICR0_ENA_VFLR_MASK |
3180 I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
3181
3182 if (pf->flags & I40E_FLAG_IWARP_ENABLED)
3183 val |= I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3184
3185 if (pf->flags & I40E_FLAG_PTP)
3186 val |= I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3187
3188 wr32(hw, I40E_PFINT_ICR0_ENA, val);
3189
3190 /* SW_ITR_IDX = 0, but don't change INTENA */
3191 wr32(hw, I40E_PFINT_DYN_CTL0, I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK |
3192 I40E_PFINT_DYN_CTL0_INTENA_MSK_MASK);
3193
3194 /* OTHER_ITR_IDX = 0 */
3195 wr32(hw, I40E_PFINT_STAT_CTL0, 0);
3196 }
3197
3198 /**
3199 * i40e_configure_msi_and_legacy - Legacy mode interrupt config in the HW
3200 * @vsi: the VSI being configured
3201 **/
3202 static void i40e_configure_msi_and_legacy(struct i40e_vsi *vsi)
3203 {
3204 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
3205 struct i40e_pf *pf = vsi->back;
3206 struct i40e_hw *hw = &pf->hw;
3207 u32 val;
3208
3209 /* set the ITR configuration */
3210 q_vector->itr_countdown = ITR_COUNTDOWN_START;
3211 q_vector->rx.itr = ITR_TO_REG(vsi->rx_rings[0]->rx_itr_setting);
3212 q_vector->rx.latency_range = I40E_LOW_LATENCY;
3213 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), q_vector->rx.itr);
3214 q_vector->tx.itr = ITR_TO_REG(vsi->tx_rings[0]->tx_itr_setting);
3215 q_vector->tx.latency_range = I40E_LOW_LATENCY;
3216 wr32(hw, I40E_PFINT_ITR0(I40E_TX_ITR), q_vector->tx.itr);
3217
3218 i40e_enable_misc_int_causes(pf);
3219
3220 /* FIRSTQ_INDX = 0, FIRSTQ_TYPE = 0 (rx) */
3221 wr32(hw, I40E_PFINT_LNKLST0, 0);
3222
3223 /* Associate the queue pair to the vector and enable the queue int */
3224 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3225 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
3226 (I40E_QUEUE_TYPE_TX << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
3227
3228 wr32(hw, I40E_QINT_RQCTL(0), val);
3229
3230 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3231 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
3232 (I40E_QUEUE_END_OF_LIST << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
3233
3234 wr32(hw, I40E_QINT_TQCTL(0), val);
3235 i40e_flush(hw);
3236 }
3237
3238 /**
3239 * i40e_irq_dynamic_disable_icr0 - Disable default interrupt generation for icr0
3240 * @pf: board private structure
3241 **/
3242 void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf)
3243 {
3244 struct i40e_hw *hw = &pf->hw;
3245
3246 wr32(hw, I40E_PFINT_DYN_CTL0,
3247 I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
3248 i40e_flush(hw);
3249 }
3250
3251 /**
3252 * i40e_irq_dynamic_enable_icr0 - Enable default interrupt generation for icr0
3253 * @pf: board private structure
3254 * @clearpba: true when all pending interrupt events should be cleared
3255 **/
3256 void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf, bool clearpba)
3257 {
3258 struct i40e_hw *hw = &pf->hw;
3259 u32 val;
3260
3261 val = I40E_PFINT_DYN_CTL0_INTENA_MASK |
3262 (clearpba ? I40E_PFINT_DYN_CTL0_CLEARPBA_MASK : 0) |
3263 (I40E_ITR_NONE << I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT);
3264
3265 wr32(hw, I40E_PFINT_DYN_CTL0, val);
3266 i40e_flush(hw);
3267 }
3268
3269 /**
3270 * i40e_msix_clean_rings - MSIX mode Interrupt Handler
3271 * @irq: interrupt number
3272 * @data: pointer to a q_vector
3273 **/
3274 static irqreturn_t i40e_msix_clean_rings(int irq, void *data)
3275 {
3276 struct i40e_q_vector *q_vector = data;
3277
3278 if (!q_vector->tx.ring && !q_vector->rx.ring)
3279 return IRQ_HANDLED;
3280
3281 napi_schedule_irqoff(&q_vector->napi);
3282
3283 return IRQ_HANDLED;
3284 }
3285
3286 /**
3287 * i40e_irq_affinity_notify - Callback for affinity changes
3288 * @notify: context as to what irq was changed
3289 * @mask: the new affinity mask
3290 *
3291 * This is a callback function used by the irq_set_affinity_notifier function
3292 * so that we may register to receive changes to the irq affinity masks.
3293 **/
3294 static void i40e_irq_affinity_notify(struct irq_affinity_notify *notify,
3295 const cpumask_t *mask)
3296 {
3297 struct i40e_q_vector *q_vector =
3298 container_of(notify, struct i40e_q_vector, affinity_notify);
3299
3300 q_vector->affinity_mask = *mask;
3301 }
3302
3303 /**
3304 * i40e_irq_affinity_release - Callback for affinity notifier release
3305 * @ref: internal core kernel usage
3306 *
3307 * This is a callback function used by the irq_set_affinity_notifier function
3308 * to inform the current notification subscriber that they will no longer
3309 * receive notifications.
3310 **/
3311 static void i40e_irq_affinity_release(struct kref *ref) {}
3312
3313 /**
3314 * i40e_vsi_request_irq_msix - Initialize MSI-X interrupts
3315 * @vsi: the VSI being configured
3316 * @basename: name for the vector
3317 *
3318 * Allocates MSI-X vectors and requests interrupts from the kernel.
3319 **/
3320 static int i40e_vsi_request_irq_msix(struct i40e_vsi *vsi, char *basename)
3321 {
3322 int q_vectors = vsi->num_q_vectors;
3323 struct i40e_pf *pf = vsi->back;
3324 int base = vsi->base_vector;
3325 int rx_int_idx = 0;
3326 int tx_int_idx = 0;
3327 int vector, err;
3328 int irq_num;
3329
3330 for (vector = 0; vector < q_vectors; vector++) {
3331 struct i40e_q_vector *q_vector = vsi->q_vectors[vector];
3332
3333 irq_num = pf->msix_entries[base + vector].vector;
3334
3335 if (q_vector->tx.ring && q_vector->rx.ring) {
3336 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3337 "%s-%s-%d", basename, "TxRx", rx_int_idx++);
3338 tx_int_idx++;
3339 } else if (q_vector->rx.ring) {
3340 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3341 "%s-%s-%d", basename, "rx", rx_int_idx++);
3342 } else if (q_vector->tx.ring) {
3343 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3344 "%s-%s-%d", basename, "tx", tx_int_idx++);
3345 } else {
3346 /* skip this unused q_vector */
3347 continue;
3348 }
3349 err = request_irq(irq_num,
3350 vsi->irq_handler,
3351 0,
3352 q_vector->name,
3353 q_vector);
3354 if (err) {
3355 dev_info(&pf->pdev->dev,
3356 "MSIX request_irq failed, error: %d\n", err);
3357 goto free_queue_irqs;
3358 }
3359
3360 /* register for affinity change notifications */
3361 q_vector->affinity_notify.notify = i40e_irq_affinity_notify;
3362 q_vector->affinity_notify.release = i40e_irq_affinity_release;
3363 irq_set_affinity_notifier(irq_num, &q_vector->affinity_notify);
3364 /* assign the mask for this irq */
3365 irq_set_affinity_hint(irq_num, &q_vector->affinity_mask);
3366 }
3367
3368 vsi->irqs_ready = true;
3369 return 0;
3370
3371 free_queue_irqs:
3372 while (vector) {
3373 vector--;
3374 irq_num = pf->msix_entries[base + vector].vector;
3375 irq_set_affinity_notifier(irq_num, NULL);
3376 irq_set_affinity_hint(irq_num, NULL);
3377 free_irq(irq_num, &vsi->q_vectors[vector]);
3378 }
3379 return err;
3380 }
3381
3382 /**
3383 * i40e_vsi_disable_irq - Mask off queue interrupt generation on the VSI
3384 * @vsi: the VSI being un-configured
3385 **/
3386 static void i40e_vsi_disable_irq(struct i40e_vsi *vsi)
3387 {
3388 struct i40e_pf *pf = vsi->back;
3389 struct i40e_hw *hw = &pf->hw;
3390 int base = vsi->base_vector;
3391 int i;
3392
3393 for (i = 0; i < vsi->num_queue_pairs; i++) {
3394 wr32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx), 0);
3395 wr32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx), 0);
3396 }
3397
3398 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3399 for (i = vsi->base_vector;
3400 i < (vsi->num_q_vectors + vsi->base_vector); i++)
3401 wr32(hw, I40E_PFINT_DYN_CTLN(i - 1), 0);
3402
3403 i40e_flush(hw);
3404 for (i = 0; i < vsi->num_q_vectors; i++)
3405 synchronize_irq(pf->msix_entries[i + base].vector);
3406 } else {
3407 /* Legacy and MSI mode - this stops all interrupt handling */
3408 wr32(hw, I40E_PFINT_ICR0_ENA, 0);
3409 wr32(hw, I40E_PFINT_DYN_CTL0, 0);
3410 i40e_flush(hw);
3411 synchronize_irq(pf->pdev->irq);
3412 }
3413 }
3414
3415 /**
3416 * i40e_vsi_enable_irq - Enable IRQ for the given VSI
3417 * @vsi: the VSI being configured
3418 **/
3419 static int i40e_vsi_enable_irq(struct i40e_vsi *vsi)
3420 {
3421 struct i40e_pf *pf = vsi->back;
3422 int i;
3423
3424 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3425 for (i = 0; i < vsi->num_q_vectors; i++)
3426 i40e_irq_dynamic_enable(vsi, i);
3427 } else {
3428 i40e_irq_dynamic_enable_icr0(pf, true);
3429 }
3430
3431 i40e_flush(&pf->hw);
3432 return 0;
3433 }
3434
3435 /**
3436 * i40e_stop_misc_vector - Stop the vector that handles non-queue events
3437 * @pf: board private structure
3438 **/
3439 static void i40e_stop_misc_vector(struct i40e_pf *pf)
3440 {
3441 /* Disable ICR 0 */
3442 wr32(&pf->hw, I40E_PFINT_ICR0_ENA, 0);
3443 i40e_flush(&pf->hw);
3444 }
3445
3446 /**
3447 * i40e_intr - MSI/Legacy and non-queue interrupt handler
3448 * @irq: interrupt number
3449 * @data: pointer to a q_vector
3450 *
3451 * This is the handler used for all MSI/Legacy interrupts, and deals
3452 * with both queue and non-queue interrupts. This is also used in
3453 * MSIX mode to handle the non-queue interrupts.
3454 **/
3455 static irqreturn_t i40e_intr(int irq, void *data)
3456 {
3457 struct i40e_pf *pf = (struct i40e_pf *)data;
3458 struct i40e_hw *hw = &pf->hw;
3459 irqreturn_t ret = IRQ_NONE;
3460 u32 icr0, icr0_remaining;
3461 u32 val, ena_mask;
3462
3463 icr0 = rd32(hw, I40E_PFINT_ICR0);
3464 ena_mask = rd32(hw, I40E_PFINT_ICR0_ENA);
3465
3466 /* if sharing a legacy IRQ, we might get called w/o an intr pending */
3467 if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0)
3468 goto enable_intr;
3469
3470 /* if interrupt but no bits showing, must be SWINT */
3471 if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) ||
3472 (icr0 & I40E_PFINT_ICR0_SWINT_MASK))
3473 pf->sw_int_count++;
3474
3475 if ((pf->flags & I40E_FLAG_IWARP_ENABLED) &&
3476 (ena_mask & I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK)) {
3477 ena_mask &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3478 icr0 &= ~I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK;
3479 dev_info(&pf->pdev->dev, "cleared PE_CRITERR\n");
3480 }
3481
3482 /* only q0 is used in MSI/Legacy mode, and none are used in MSIX */
3483 if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) {
3484 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
3485 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
3486
3487 /* We do not have a way to disarm Queue causes while leaving
3488 * interrupt enabled for all other causes, ideally
3489 * interrupt should be disabled while we are in NAPI but
3490 * this is not a performance path and napi_schedule()
3491 * can deal with rescheduling.
3492 */
3493 if (!test_bit(__I40E_DOWN, &pf->state))
3494 napi_schedule_irqoff(&q_vector->napi);
3495 }
3496
3497 if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) {
3498 ena_mask &= ~I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
3499 set_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
3500 i40e_debug(&pf->hw, I40E_DEBUG_NVM, "AdminQ event\n");
3501 }
3502
3503 if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) {
3504 ena_mask &= ~I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
3505 set_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
3506 }
3507
3508 if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) {
3509 ena_mask &= ~I40E_PFINT_ICR0_ENA_VFLR_MASK;
3510 set_bit(__I40E_VFLR_EVENT_PENDING, &pf->state);
3511 }
3512
3513 if (icr0 & I40E_PFINT_ICR0_GRST_MASK) {
3514 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
3515 set_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
3516 ena_mask &= ~I40E_PFINT_ICR0_ENA_GRST_MASK;
3517 val = rd32(hw, I40E_GLGEN_RSTAT);
3518 val = (val & I40E_GLGEN_RSTAT_RESET_TYPE_MASK)
3519 >> I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT;
3520 if (val == I40E_RESET_CORER) {
3521 pf->corer_count++;
3522 } else if (val == I40E_RESET_GLOBR) {
3523 pf->globr_count++;
3524 } else if (val == I40E_RESET_EMPR) {
3525 pf->empr_count++;
3526 set_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state);
3527 }
3528 }
3529
3530 if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) {
3531 icr0 &= ~I40E_PFINT_ICR0_HMC_ERR_MASK;
3532 dev_info(&pf->pdev->dev, "HMC error interrupt\n");
3533 dev_info(&pf->pdev->dev, "HMC error info 0x%x, HMC error data 0x%x\n",
3534 rd32(hw, I40E_PFHMC_ERRORINFO),
3535 rd32(hw, I40E_PFHMC_ERRORDATA));
3536 }
3537
3538 if (icr0 & I40E_PFINT_ICR0_TIMESYNC_MASK) {
3539 u32 prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_0);
3540
3541 if (prttsyn_stat & I40E_PRTTSYN_STAT_0_TXTIME_MASK) {
3542 icr0 &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3543 i40e_ptp_tx_hwtstamp(pf);
3544 }
3545 }
3546
3547 /* If a critical error is pending we have no choice but to reset the
3548 * device.
3549 * Report and mask out any remaining unexpected interrupts.
3550 */
3551 icr0_remaining = icr0 & ena_mask;
3552 if (icr0_remaining) {
3553 dev_info(&pf->pdev->dev, "unhandled interrupt icr0=0x%08x\n",
3554 icr0_remaining);
3555 if ((icr0_remaining & I40E_PFINT_ICR0_PE_CRITERR_MASK) ||
3556 (icr0_remaining & I40E_PFINT_ICR0_PCI_EXCEPTION_MASK) ||
3557 (icr0_remaining & I40E_PFINT_ICR0_ECC_ERR_MASK)) {
3558 dev_info(&pf->pdev->dev, "device will be reset\n");
3559 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
3560 i40e_service_event_schedule(pf);
3561 }
3562 ena_mask &= ~icr0_remaining;
3563 }
3564 ret = IRQ_HANDLED;
3565
3566 enable_intr:
3567 /* re-enable interrupt causes */
3568 wr32(hw, I40E_PFINT_ICR0_ENA, ena_mask);
3569 if (!test_bit(__I40E_DOWN, &pf->state)) {
3570 i40e_service_event_schedule(pf);
3571 i40e_irq_dynamic_enable_icr0(pf, false);
3572 }
3573
3574 return ret;
3575 }
3576
3577 /**
3578 * i40e_clean_fdir_tx_irq - Reclaim resources after transmit completes
3579 * @tx_ring: tx ring to clean
3580 * @budget: how many cleans we're allowed
3581 *
3582 * Returns true if there's any budget left (e.g. the clean is finished)
3583 **/
3584 static bool i40e_clean_fdir_tx_irq(struct i40e_ring *tx_ring, int budget)
3585 {
3586 struct i40e_vsi *vsi = tx_ring->vsi;
3587 u16 i = tx_ring->next_to_clean;
3588 struct i40e_tx_buffer *tx_buf;
3589 struct i40e_tx_desc *tx_desc;
3590
3591 tx_buf = &tx_ring->tx_bi[i];
3592 tx_desc = I40E_TX_DESC(tx_ring, i);
3593 i -= tx_ring->count;
3594
3595 do {
3596 struct i40e_tx_desc *eop_desc = tx_buf->next_to_watch;
3597
3598 /* if next_to_watch is not set then there is no work pending */
3599 if (!eop_desc)
3600 break;
3601
3602 /* prevent any other reads prior to eop_desc */
3603 read_barrier_depends();
3604
3605 /* if the descriptor isn't done, no work yet to do */
3606 if (!(eop_desc->cmd_type_offset_bsz &
3607 cpu_to_le64(I40E_TX_DESC_DTYPE_DESC_DONE)))
3608 break;
3609
3610 /* clear next_to_watch to prevent false hangs */
3611 tx_buf->next_to_watch = NULL;
3612
3613 tx_desc->buffer_addr = 0;
3614 tx_desc->cmd_type_offset_bsz = 0;
3615 /* move past filter desc */
3616 tx_buf++;
3617 tx_desc++;
3618 i++;
3619 if (unlikely(!i)) {
3620 i -= tx_ring->count;
3621 tx_buf = tx_ring->tx_bi;
3622 tx_desc = I40E_TX_DESC(tx_ring, 0);
3623 }
3624 /* unmap skb header data */
3625 dma_unmap_single(tx_ring->dev,
3626 dma_unmap_addr(tx_buf, dma),
3627 dma_unmap_len(tx_buf, len),
3628 DMA_TO_DEVICE);
3629 if (tx_buf->tx_flags & I40E_TX_FLAGS_FD_SB)
3630 kfree(tx_buf->raw_buf);
3631
3632 tx_buf->raw_buf = NULL;
3633 tx_buf->tx_flags = 0;
3634 tx_buf->next_to_watch = NULL;
3635 dma_unmap_len_set(tx_buf, len, 0);
3636 tx_desc->buffer_addr = 0;
3637 tx_desc->cmd_type_offset_bsz = 0;
3638
3639 /* move us past the eop_desc for start of next FD desc */
3640 tx_buf++;
3641 tx_desc++;
3642 i++;
3643 if (unlikely(!i)) {
3644 i -= tx_ring->count;
3645 tx_buf = tx_ring->tx_bi;
3646 tx_desc = I40E_TX_DESC(tx_ring, 0);
3647 }
3648
3649 /* update budget accounting */
3650 budget--;
3651 } while (likely(budget));
3652
3653 i += tx_ring->count;
3654 tx_ring->next_to_clean = i;
3655
3656 if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED)
3657 i40e_irq_dynamic_enable(vsi, tx_ring->q_vector->v_idx);
3658
3659 return budget > 0;
3660 }
3661
3662 /**
3663 * i40e_fdir_clean_ring - Interrupt Handler for FDIR SB ring
3664 * @irq: interrupt number
3665 * @data: pointer to a q_vector
3666 **/
3667 static irqreturn_t i40e_fdir_clean_ring(int irq, void *data)
3668 {
3669 struct i40e_q_vector *q_vector = data;
3670 struct i40e_vsi *vsi;
3671
3672 if (!q_vector->tx.ring)
3673 return IRQ_HANDLED;
3674
3675 vsi = q_vector->tx.ring->vsi;
3676 i40e_clean_fdir_tx_irq(q_vector->tx.ring, vsi->work_limit);
3677
3678 return IRQ_HANDLED;
3679 }
3680
3681 /**
3682 * i40e_map_vector_to_qp - Assigns the queue pair to the vector
3683 * @vsi: the VSI being configured
3684 * @v_idx: vector index
3685 * @qp_idx: queue pair index
3686 **/
3687 static void i40e_map_vector_to_qp(struct i40e_vsi *vsi, int v_idx, int qp_idx)
3688 {
3689 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
3690 struct i40e_ring *tx_ring = vsi->tx_rings[qp_idx];
3691 struct i40e_ring *rx_ring = vsi->rx_rings[qp_idx];
3692
3693 tx_ring->q_vector = q_vector;
3694 tx_ring->next = q_vector->tx.ring;
3695 q_vector->tx.ring = tx_ring;
3696 q_vector->tx.count++;
3697
3698 rx_ring->q_vector = q_vector;
3699 rx_ring->next = q_vector->rx.ring;
3700 q_vector->rx.ring = rx_ring;
3701 q_vector->rx.count++;
3702 }
3703
3704 /**
3705 * i40e_vsi_map_rings_to_vectors - Maps descriptor rings to vectors
3706 * @vsi: the VSI being configured
3707 *
3708 * This function maps descriptor rings to the queue-specific vectors
3709 * we were allotted through the MSI-X enabling code. Ideally, we'd have
3710 * one vector per queue pair, but on a constrained vector budget, we
3711 * group the queue pairs as "efficiently" as possible.
3712 **/
3713 static void i40e_vsi_map_rings_to_vectors(struct i40e_vsi *vsi)
3714 {
3715 int qp_remaining = vsi->num_queue_pairs;
3716 int q_vectors = vsi->num_q_vectors;
3717 int num_ringpairs;
3718 int v_start = 0;
3719 int qp_idx = 0;
3720
3721 /* If we don't have enough vectors for a 1-to-1 mapping, we'll have to
3722 * group them so there are multiple queues per vector.
3723 * It is also important to go through all the vectors available to be
3724 * sure that if we don't use all the vectors, that the remaining vectors
3725 * are cleared. This is especially important when decreasing the
3726 * number of queues in use.
3727 */
3728 for (; v_start < q_vectors; v_start++) {
3729 struct i40e_q_vector *q_vector = vsi->q_vectors[v_start];
3730
3731 num_ringpairs = DIV_ROUND_UP(qp_remaining, q_vectors - v_start);
3732
3733 q_vector->num_ringpairs = num_ringpairs;
3734
3735 q_vector->rx.count = 0;
3736 q_vector->tx.count = 0;
3737 q_vector->rx.ring = NULL;
3738 q_vector->tx.ring = NULL;
3739
3740 while (num_ringpairs--) {
3741 i40e_map_vector_to_qp(vsi, v_start, qp_idx);
3742 qp_idx++;
3743 qp_remaining--;
3744 }
3745 }
3746 }
3747
3748 /**
3749 * i40e_vsi_request_irq - Request IRQ from the OS
3750 * @vsi: the VSI being configured
3751 * @basename: name for the vector
3752 **/
3753 static int i40e_vsi_request_irq(struct i40e_vsi *vsi, char *basename)
3754 {
3755 struct i40e_pf *pf = vsi->back;
3756 int err;
3757
3758 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
3759 err = i40e_vsi_request_irq_msix(vsi, basename);
3760 else if (pf->flags & I40E_FLAG_MSI_ENABLED)
3761 err = request_irq(pf->pdev->irq, i40e_intr, 0,
3762 pf->int_name, pf);
3763 else
3764 err = request_irq(pf->pdev->irq, i40e_intr, IRQF_SHARED,
3765 pf->int_name, pf);
3766
3767 if (err)
3768 dev_info(&pf->pdev->dev, "request_irq failed, Error %d\n", err);
3769
3770 return err;
3771 }
3772
3773 #ifdef CONFIG_NET_POLL_CONTROLLER
3774 /**
3775 * i40e_netpoll - A Polling 'interrupt' handler
3776 * @netdev: network interface device structure
3777 *
3778 * This is used by netconsole to send skbs without having to re-enable
3779 * interrupts. It's not called while the normal interrupt routine is executing.
3780 **/
3781 #ifdef I40E_FCOE
3782 void i40e_netpoll(struct net_device *netdev)
3783 #else
3784 static void i40e_netpoll(struct net_device *netdev)
3785 #endif
3786 {
3787 struct i40e_netdev_priv *np = netdev_priv(netdev);
3788 struct i40e_vsi *vsi = np->vsi;
3789 struct i40e_pf *pf = vsi->back;
3790 int i;
3791
3792 /* if interface is down do nothing */
3793 if (test_bit(__I40E_DOWN, &vsi->state))
3794 return;
3795
3796 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3797 for (i = 0; i < vsi->num_q_vectors; i++)
3798 i40e_msix_clean_rings(0, vsi->q_vectors[i]);
3799 } else {
3800 i40e_intr(pf->pdev->irq, netdev);
3801 }
3802 }
3803 #endif
3804
3805 /**
3806 * i40e_pf_txq_wait - Wait for a PF's Tx queue to be enabled or disabled
3807 * @pf: the PF being configured
3808 * @pf_q: the PF queue
3809 * @enable: enable or disable state of the queue
3810 *
3811 * This routine will wait for the given Tx queue of the PF to reach the
3812 * enabled or disabled state.
3813 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3814 * multiple retries; else will return 0 in case of success.
3815 **/
3816 static int i40e_pf_txq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3817 {
3818 int i;
3819 u32 tx_reg;
3820
3821 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3822 tx_reg = rd32(&pf->hw, I40E_QTX_ENA(pf_q));
3823 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3824 break;
3825
3826 usleep_range(10, 20);
3827 }
3828 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3829 return -ETIMEDOUT;
3830
3831 return 0;
3832 }
3833
3834 /**
3835 * i40e_vsi_control_tx - Start or stop a VSI's rings
3836 * @vsi: the VSI being configured
3837 * @enable: start or stop the rings
3838 **/
3839 static int i40e_vsi_control_tx(struct i40e_vsi *vsi, bool enable)
3840 {
3841 struct i40e_pf *pf = vsi->back;
3842 struct i40e_hw *hw = &pf->hw;
3843 int i, j, pf_q, ret = 0;
3844 u32 tx_reg;
3845
3846 pf_q = vsi->base_queue;
3847 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3848
3849 /* warn the TX unit of coming changes */
3850 i40e_pre_tx_queue_cfg(&pf->hw, pf_q, enable);
3851 if (!enable)
3852 usleep_range(10, 20);
3853
3854 for (j = 0; j < 50; j++) {
3855 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q));
3856 if (((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT) & 1) ==
3857 ((tx_reg >> I40E_QTX_ENA_QENA_STAT_SHIFT) & 1))
3858 break;
3859 usleep_range(1000, 2000);
3860 }
3861 /* Skip if the queue is already in the requested state */
3862 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3863 continue;
3864
3865 /* turn on/off the queue */
3866 if (enable) {
3867 wr32(hw, I40E_QTX_HEAD(pf_q), 0);
3868 tx_reg |= I40E_QTX_ENA_QENA_REQ_MASK;
3869 } else {
3870 tx_reg &= ~I40E_QTX_ENA_QENA_REQ_MASK;
3871 }
3872
3873 wr32(hw, I40E_QTX_ENA(pf_q), tx_reg);
3874 /* No waiting for the Tx queue to disable */
3875 if (!enable && test_bit(__I40E_PORT_TX_SUSPENDED, &pf->state))
3876 continue;
3877
3878 /* wait for the change to finish */
3879 ret = i40e_pf_txq_wait(pf, pf_q, enable);
3880 if (ret) {
3881 dev_info(&pf->pdev->dev,
3882 "VSI seid %d Tx ring %d %sable timeout\n",
3883 vsi->seid, pf_q, (enable ? "en" : "dis"));
3884 break;
3885 }
3886 }
3887
3888 if (hw->revision_id == 0)
3889 mdelay(50);
3890 return ret;
3891 }
3892
3893 /**
3894 * i40e_pf_rxq_wait - Wait for a PF's Rx queue to be enabled or disabled
3895 * @pf: the PF being configured
3896 * @pf_q: the PF queue
3897 * @enable: enable or disable state of the queue
3898 *
3899 * This routine will wait for the given Rx queue of the PF to reach the
3900 * enabled or disabled state.
3901 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3902 * multiple retries; else will return 0 in case of success.
3903 **/
3904 static int i40e_pf_rxq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3905 {
3906 int i;
3907 u32 rx_reg;
3908
3909 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3910 rx_reg = rd32(&pf->hw, I40E_QRX_ENA(pf_q));
3911 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3912 break;
3913
3914 usleep_range(10, 20);
3915 }
3916 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3917 return -ETIMEDOUT;
3918
3919 return 0;
3920 }
3921
3922 /**
3923 * i40e_vsi_control_rx - Start or stop a VSI's rings
3924 * @vsi: the VSI being configured
3925 * @enable: start or stop the rings
3926 **/
3927 static int i40e_vsi_control_rx(struct i40e_vsi *vsi, bool enable)
3928 {
3929 struct i40e_pf *pf = vsi->back;
3930 struct i40e_hw *hw = &pf->hw;
3931 int i, j, pf_q, ret = 0;
3932 u32 rx_reg;
3933
3934 pf_q = vsi->base_queue;
3935 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3936 for (j = 0; j < 50; j++) {
3937 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q));
3938 if (((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT) & 1) ==
3939 ((rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT) & 1))
3940 break;
3941 usleep_range(1000, 2000);
3942 }
3943
3944 /* Skip if the queue is already in the requested state */
3945 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3946 continue;
3947
3948 /* turn on/off the queue */
3949 if (enable)
3950 rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK;
3951 else
3952 rx_reg &= ~I40E_QRX_ENA_QENA_REQ_MASK;
3953 wr32(hw, I40E_QRX_ENA(pf_q), rx_reg);
3954 /* No waiting for the Tx queue to disable */
3955 if (!enable && test_bit(__I40E_PORT_TX_SUSPENDED, &pf->state))
3956 continue;
3957
3958 /* wait for the change to finish */
3959 ret = i40e_pf_rxq_wait(pf, pf_q, enable);
3960 if (ret) {
3961 dev_info(&pf->pdev->dev,
3962 "VSI seid %d Rx ring %d %sable timeout\n",
3963 vsi->seid, pf_q, (enable ? "en" : "dis"));
3964 break;
3965 }
3966 }
3967
3968 return ret;
3969 }
3970
3971 /**
3972 * i40e_vsi_control_rings - Start or stop a VSI's rings
3973 * @vsi: the VSI being configured
3974 * @enable: start or stop the rings
3975 **/
3976 int i40e_vsi_control_rings(struct i40e_vsi *vsi, bool request)
3977 {
3978 int ret = 0;
3979
3980 /* do rx first for enable and last for disable */
3981 if (request) {
3982 ret = i40e_vsi_control_rx(vsi, request);
3983 if (ret)
3984 return ret;
3985 ret = i40e_vsi_control_tx(vsi, request);
3986 } else {
3987 /* Ignore return value, we need to shutdown whatever we can */
3988 i40e_vsi_control_tx(vsi, request);
3989 i40e_vsi_control_rx(vsi, request);
3990 }
3991
3992 return ret;
3993 }
3994
3995 /**
3996 * i40e_vsi_free_irq - Free the irq association with the OS
3997 * @vsi: the VSI being configured
3998 **/
3999 static void i40e_vsi_free_irq(struct i40e_vsi *vsi)
4000 {
4001 struct i40e_pf *pf = vsi->back;
4002 struct i40e_hw *hw = &pf->hw;
4003 int base = vsi->base_vector;
4004 u32 val, qp;
4005 int i;
4006
4007 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4008 if (!vsi->q_vectors)
4009 return;
4010
4011 if (!vsi->irqs_ready)
4012 return;
4013
4014 vsi->irqs_ready = false;
4015 for (i = 0; i < vsi->num_q_vectors; i++) {
4016 int irq_num;
4017 u16 vector;
4018
4019 vector = i + base;
4020 irq_num = pf->msix_entries[vector].vector;
4021
4022 /* free only the irqs that were actually requested */
4023 if (!vsi->q_vectors[i] ||
4024 !vsi->q_vectors[i]->num_ringpairs)
4025 continue;
4026
4027 /* clear the affinity notifier in the IRQ descriptor */
4028 irq_set_affinity_notifier(irq_num, NULL);
4029 /* clear the affinity_mask in the IRQ descriptor */
4030 irq_set_affinity_hint(irq_num, NULL);
4031 synchronize_irq(irq_num);
4032 free_irq(irq_num, vsi->q_vectors[i]);
4033
4034 /* Tear down the interrupt queue link list
4035 *
4036 * We know that they come in pairs and always
4037 * the Rx first, then the Tx. To clear the
4038 * link list, stick the EOL value into the
4039 * next_q field of the registers.
4040 */
4041 val = rd32(hw, I40E_PFINT_LNKLSTN(vector - 1));
4042 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
4043 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4044 val |= I40E_QUEUE_END_OF_LIST
4045 << I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4046 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), val);
4047
4048 while (qp != I40E_QUEUE_END_OF_LIST) {
4049 u32 next;
4050
4051 val = rd32(hw, I40E_QINT_RQCTL(qp));
4052
4053 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
4054 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
4055 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
4056 I40E_QINT_RQCTL_INTEVENT_MASK);
4057
4058 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
4059 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
4060
4061 wr32(hw, I40E_QINT_RQCTL(qp), val);
4062
4063 val = rd32(hw, I40E_QINT_TQCTL(qp));
4064
4065 next = (val & I40E_QINT_TQCTL_NEXTQ_INDX_MASK)
4066 >> I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT;
4067
4068 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
4069 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
4070 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
4071 I40E_QINT_TQCTL_INTEVENT_MASK);
4072
4073 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
4074 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
4075
4076 wr32(hw, I40E_QINT_TQCTL(qp), val);
4077 qp = next;
4078 }
4079 }
4080 } else {
4081 free_irq(pf->pdev->irq, pf);
4082
4083 val = rd32(hw, I40E_PFINT_LNKLST0);
4084 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
4085 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
4086 val |= I40E_QUEUE_END_OF_LIST
4087 << I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT;
4088 wr32(hw, I40E_PFINT_LNKLST0, val);
4089
4090 val = rd32(hw, I40E_QINT_RQCTL(qp));
4091 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
4092 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
4093 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
4094 I40E_QINT_RQCTL_INTEVENT_MASK);
4095
4096 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
4097 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
4098
4099 wr32(hw, I40E_QINT_RQCTL(qp), val);
4100
4101 val = rd32(hw, I40E_QINT_TQCTL(qp));
4102
4103 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
4104 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
4105 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
4106 I40E_QINT_TQCTL_INTEVENT_MASK);
4107
4108 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
4109 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
4110
4111 wr32(hw, I40E_QINT_TQCTL(qp), val);
4112 }
4113 }
4114
4115 /**
4116 * i40e_free_q_vector - Free memory allocated for specific interrupt vector
4117 * @vsi: the VSI being configured
4118 * @v_idx: Index of vector to be freed
4119 *
4120 * This function frees the memory allocated to the q_vector. In addition if
4121 * NAPI is enabled it will delete any references to the NAPI struct prior
4122 * to freeing the q_vector.
4123 **/
4124 static void i40e_free_q_vector(struct i40e_vsi *vsi, int v_idx)
4125 {
4126 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
4127 struct i40e_ring *ring;
4128
4129 if (!q_vector)
4130 return;
4131
4132 /* disassociate q_vector from rings */
4133 i40e_for_each_ring(ring, q_vector->tx)
4134 ring->q_vector = NULL;
4135
4136 i40e_for_each_ring(ring, q_vector->rx)
4137 ring->q_vector = NULL;
4138
4139 /* only VSI w/ an associated netdev is set up w/ NAPI */
4140 if (vsi->netdev)
4141 netif_napi_del(&q_vector->napi);
4142
4143 vsi->q_vectors[v_idx] = NULL;
4144
4145 kfree_rcu(q_vector, rcu);
4146 }
4147
4148 /**
4149 * i40e_vsi_free_q_vectors - Free memory allocated for interrupt vectors
4150 * @vsi: the VSI being un-configured
4151 *
4152 * This frees the memory allocated to the q_vectors and
4153 * deletes references to the NAPI struct.
4154 **/
4155 static void i40e_vsi_free_q_vectors(struct i40e_vsi *vsi)
4156 {
4157 int v_idx;
4158
4159 for (v_idx = 0; v_idx < vsi->num_q_vectors; v_idx++)
4160 i40e_free_q_vector(vsi, v_idx);
4161 }
4162
4163 /**
4164 * i40e_reset_interrupt_capability - Disable interrupt setup in OS
4165 * @pf: board private structure
4166 **/
4167 static void i40e_reset_interrupt_capability(struct i40e_pf *pf)
4168 {
4169 /* If we're in Legacy mode, the interrupt was cleaned in vsi_close */
4170 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
4171 pci_disable_msix(pf->pdev);
4172 kfree(pf->msix_entries);
4173 pf->msix_entries = NULL;
4174 kfree(pf->irq_pile);
4175 pf->irq_pile = NULL;
4176 } else if (pf->flags & I40E_FLAG_MSI_ENABLED) {
4177 pci_disable_msi(pf->pdev);
4178 }
4179 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED);
4180 }
4181
4182 /**
4183 * i40e_clear_interrupt_scheme - Clear the current interrupt scheme settings
4184 * @pf: board private structure
4185 *
4186 * We go through and clear interrupt specific resources and reset the structure
4187 * to pre-load conditions
4188 **/
4189 static void i40e_clear_interrupt_scheme(struct i40e_pf *pf)
4190 {
4191 int i;
4192
4193 i40e_stop_misc_vector(pf);
4194 if (pf->flags & I40E_FLAG_MSIX_ENABLED && pf->msix_entries) {
4195 synchronize_irq(pf->msix_entries[0].vector);
4196 free_irq(pf->msix_entries[0].vector, pf);
4197 }
4198
4199 i40e_put_lump(pf->irq_pile, pf->iwarp_base_vector,
4200 I40E_IWARP_IRQ_PILE_ID);
4201
4202 i40e_put_lump(pf->irq_pile, 0, I40E_PILE_VALID_BIT-1);
4203 for (i = 0; i < pf->num_alloc_vsi; i++)
4204 if (pf->vsi[i])
4205 i40e_vsi_free_q_vectors(pf->vsi[i]);
4206 i40e_reset_interrupt_capability(pf);
4207 }
4208
4209 /**
4210 * i40e_napi_enable_all - Enable NAPI for all q_vectors in the VSI
4211 * @vsi: the VSI being configured
4212 **/
4213 static void i40e_napi_enable_all(struct i40e_vsi *vsi)
4214 {
4215 int q_idx;
4216
4217 if (!vsi->netdev)
4218 return;
4219
4220 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
4221 napi_enable(&vsi->q_vectors[q_idx]->napi);
4222 }
4223
4224 /**
4225 * i40e_napi_disable_all - Disable NAPI for all q_vectors in the VSI
4226 * @vsi: the VSI being configured
4227 **/
4228 static void i40e_napi_disable_all(struct i40e_vsi *vsi)
4229 {
4230 int q_idx;
4231
4232 if (!vsi->netdev)
4233 return;
4234
4235 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
4236 napi_disable(&vsi->q_vectors[q_idx]->napi);
4237 }
4238
4239 /**
4240 * i40e_vsi_close - Shut down a VSI
4241 * @vsi: the vsi to be quelled
4242 **/
4243 static void i40e_vsi_close(struct i40e_vsi *vsi)
4244 {
4245 bool reset = false;
4246
4247 if (!test_and_set_bit(__I40E_DOWN, &vsi->state))
4248 i40e_down(vsi);
4249 i40e_vsi_free_irq(vsi);
4250 i40e_vsi_free_tx_resources(vsi);
4251 i40e_vsi_free_rx_resources(vsi);
4252 vsi->current_netdev_flags = 0;
4253 if (test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
4254 reset = true;
4255 i40e_notify_client_of_netdev_close(vsi, reset);
4256 }
4257
4258 /**
4259 * i40e_quiesce_vsi - Pause a given VSI
4260 * @vsi: the VSI being paused
4261 **/
4262 static void i40e_quiesce_vsi(struct i40e_vsi *vsi)
4263 {
4264 if (test_bit(__I40E_DOWN, &vsi->state))
4265 return;
4266
4267 /* No need to disable FCoE VSI when Tx suspended */
4268 if ((test_bit(__I40E_PORT_TX_SUSPENDED, &vsi->back->state)) &&
4269 vsi->type == I40E_VSI_FCOE) {
4270 dev_dbg(&vsi->back->pdev->dev,
4271 "VSI seid %d skipping FCoE VSI disable\n", vsi->seid);
4272 return;
4273 }
4274
4275 set_bit(__I40E_NEEDS_RESTART, &vsi->state);
4276 if (vsi->netdev && netif_running(vsi->netdev))
4277 vsi->netdev->netdev_ops->ndo_stop(vsi->netdev);
4278 else
4279 i40e_vsi_close(vsi);
4280 }
4281
4282 /**
4283 * i40e_unquiesce_vsi - Resume a given VSI
4284 * @vsi: the VSI being resumed
4285 **/
4286 static void i40e_unquiesce_vsi(struct i40e_vsi *vsi)
4287 {
4288 if (!test_bit(__I40E_NEEDS_RESTART, &vsi->state))
4289 return;
4290
4291 clear_bit(__I40E_NEEDS_RESTART, &vsi->state);
4292 if (vsi->netdev && netif_running(vsi->netdev))
4293 vsi->netdev->netdev_ops->ndo_open(vsi->netdev);
4294 else
4295 i40e_vsi_open(vsi); /* this clears the DOWN bit */
4296 }
4297
4298 /**
4299 * i40e_pf_quiesce_all_vsi - Pause all VSIs on a PF
4300 * @pf: the PF
4301 **/
4302 static void i40e_pf_quiesce_all_vsi(struct i40e_pf *pf)
4303 {
4304 int v;
4305
4306 for (v = 0; v < pf->num_alloc_vsi; v++) {
4307 if (pf->vsi[v])
4308 i40e_quiesce_vsi(pf->vsi[v]);
4309 }
4310 }
4311
4312 /**
4313 * i40e_pf_unquiesce_all_vsi - Resume all VSIs on a PF
4314 * @pf: the PF
4315 **/
4316 static void i40e_pf_unquiesce_all_vsi(struct i40e_pf *pf)
4317 {
4318 int v;
4319
4320 for (v = 0; v < pf->num_alloc_vsi; v++) {
4321 if (pf->vsi[v])
4322 i40e_unquiesce_vsi(pf->vsi[v]);
4323 }
4324 }
4325
4326 #ifdef CONFIG_I40E_DCB
4327 /**
4328 * i40e_vsi_wait_queues_disabled - Wait for VSI's queues to be disabled
4329 * @vsi: the VSI being configured
4330 *
4331 * This function waits for the given VSI's queues to be disabled.
4332 **/
4333 static int i40e_vsi_wait_queues_disabled(struct i40e_vsi *vsi)
4334 {
4335 struct i40e_pf *pf = vsi->back;
4336 int i, pf_q, ret;
4337
4338 pf_q = vsi->base_queue;
4339 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4340 /* Check and wait for the disable status of the queue */
4341 ret = i40e_pf_txq_wait(pf, pf_q, false);
4342 if (ret) {
4343 dev_info(&pf->pdev->dev,
4344 "VSI seid %d Tx ring %d disable timeout\n",
4345 vsi->seid, pf_q);
4346 return ret;
4347 }
4348 }
4349
4350 pf_q = vsi->base_queue;
4351 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4352 /* Check and wait for the disable status of the queue */
4353 ret = i40e_pf_rxq_wait(pf, pf_q, false);
4354 if (ret) {
4355 dev_info(&pf->pdev->dev,
4356 "VSI seid %d Rx ring %d disable timeout\n",
4357 vsi->seid, pf_q);
4358 return ret;
4359 }
4360 }
4361
4362 return 0;
4363 }
4364
4365 /**
4366 * i40e_pf_wait_queues_disabled - Wait for all queues of PF VSIs to be disabled
4367 * @pf: the PF
4368 *
4369 * This function waits for the queues to be in disabled state for all the
4370 * VSIs that are managed by this PF.
4371 **/
4372 static int i40e_pf_wait_queues_disabled(struct i40e_pf *pf)
4373 {
4374 int v, ret = 0;
4375
4376 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
4377 /* No need to wait for FCoE VSI queues */
4378 if (pf->vsi[v] && pf->vsi[v]->type != I40E_VSI_FCOE) {
4379 ret = i40e_vsi_wait_queues_disabled(pf->vsi[v]);
4380 if (ret)
4381 break;
4382 }
4383 }
4384
4385 return ret;
4386 }
4387
4388 #endif
4389
4390 /**
4391 * i40e_detect_recover_hung_queue - Function to detect and recover hung_queue
4392 * @q_idx: TX queue number
4393 * @vsi: Pointer to VSI struct
4394 *
4395 * This function checks specified queue for given VSI. Detects hung condition.
4396 * Sets hung bit since it is two step process. Before next run of service task
4397 * if napi_poll runs, it reset 'hung' bit for respective q_vector. If not,
4398 * hung condition remain unchanged and during subsequent run, this function
4399 * issues SW interrupt to recover from hung condition.
4400 **/
4401 static void i40e_detect_recover_hung_queue(int q_idx, struct i40e_vsi *vsi)
4402 {
4403 struct i40e_ring *tx_ring = NULL;
4404 struct i40e_pf *pf;
4405 u32 head, val, tx_pending_hw;
4406 int i;
4407
4408 pf = vsi->back;
4409
4410 /* now that we have an index, find the tx_ring struct */
4411 for (i = 0; i < vsi->num_queue_pairs; i++) {
4412 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc) {
4413 if (q_idx == vsi->tx_rings[i]->queue_index) {
4414 tx_ring = vsi->tx_rings[i];
4415 break;
4416 }
4417 }
4418 }
4419
4420 if (!tx_ring)
4421 return;
4422
4423 /* Read interrupt register */
4424 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
4425 val = rd32(&pf->hw,
4426 I40E_PFINT_DYN_CTLN(tx_ring->q_vector->v_idx +
4427 tx_ring->vsi->base_vector - 1));
4428 else
4429 val = rd32(&pf->hw, I40E_PFINT_DYN_CTL0);
4430
4431 head = i40e_get_head(tx_ring);
4432
4433 tx_pending_hw = i40e_get_tx_pending(tx_ring, false);
4434
4435 /* HW is done executing descriptors, updated HEAD write back,
4436 * but SW hasn't processed those descriptors. If interrupt is
4437 * not generated from this point ON, it could result into
4438 * dev_watchdog detecting timeout on those netdev_queue,
4439 * hence proactively trigger SW interrupt.
4440 */
4441 if (tx_pending_hw && (!(val & I40E_PFINT_DYN_CTLN_INTENA_MASK))) {
4442 /* NAPI Poll didn't run and clear since it was set */
4443 if (test_and_clear_bit(I40E_Q_VECTOR_HUNG_DETECT,
4444 &tx_ring->q_vector->hung_detected)) {
4445 netdev_info(vsi->netdev, "VSI_seid %d, Hung TX queue %d, tx_pending_hw: %d, NTC:0x%x, HWB: 0x%x, NTU: 0x%x, TAIL: 0x%x\n",
4446 vsi->seid, q_idx, tx_pending_hw,
4447 tx_ring->next_to_clean, head,
4448 tx_ring->next_to_use,
4449 readl(tx_ring->tail));
4450 netdev_info(vsi->netdev, "VSI_seid %d, Issuing force_wb for TX queue %d, Interrupt Reg: 0x%x\n",
4451 vsi->seid, q_idx, val);
4452 i40e_force_wb(vsi, tx_ring->q_vector);
4453 } else {
4454 /* First Chance - detected possible hung */
4455 set_bit(I40E_Q_VECTOR_HUNG_DETECT,
4456 &tx_ring->q_vector->hung_detected);
4457 }
4458 }
4459
4460 /* This is the case where we have interrupts missing,
4461 * so the tx_pending in HW will most likely be 0, but we
4462 * will have tx_pending in SW since the WB happened but the
4463 * interrupt got lost.
4464 */
4465 if ((!tx_pending_hw) && i40e_get_tx_pending(tx_ring, true) &&
4466 (!(val & I40E_PFINT_DYN_CTLN_INTENA_MASK))) {
4467 if (napi_reschedule(&tx_ring->q_vector->napi))
4468 tx_ring->tx_stats.tx_lost_interrupt++;
4469 }
4470 }
4471
4472 /**
4473 * i40e_detect_recover_hung - Function to detect and recover hung_queues
4474 * @pf: pointer to PF struct
4475 *
4476 * LAN VSI has netdev and netdev has TX queues. This function is to check
4477 * each of those TX queues if they are hung, trigger recovery by issuing
4478 * SW interrupt.
4479 **/
4480 static void i40e_detect_recover_hung(struct i40e_pf *pf)
4481 {
4482 struct net_device *netdev;
4483 struct i40e_vsi *vsi;
4484 int i;
4485
4486 /* Only for LAN VSI */
4487 vsi = pf->vsi[pf->lan_vsi];
4488
4489 if (!vsi)
4490 return;
4491
4492 /* Make sure, VSI state is not DOWN/RECOVERY_PENDING */
4493 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
4494 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
4495 return;
4496
4497 /* Make sure type is MAIN VSI */
4498 if (vsi->type != I40E_VSI_MAIN)
4499 return;
4500
4501 netdev = vsi->netdev;
4502 if (!netdev)
4503 return;
4504
4505 /* Bail out if netif_carrier is not OK */
4506 if (!netif_carrier_ok(netdev))
4507 return;
4508
4509 /* Go thru' TX queues for netdev */
4510 for (i = 0; i < netdev->num_tx_queues; i++) {
4511 struct netdev_queue *q;
4512
4513 q = netdev_get_tx_queue(netdev, i);
4514 if (q)
4515 i40e_detect_recover_hung_queue(i, vsi);
4516 }
4517 }
4518
4519 /**
4520 * i40e_get_iscsi_tc_map - Return TC map for iSCSI APP
4521 * @pf: pointer to PF
4522 *
4523 * Get TC map for ISCSI PF type that will include iSCSI TC
4524 * and LAN TC.
4525 **/
4526 static u8 i40e_get_iscsi_tc_map(struct i40e_pf *pf)
4527 {
4528 struct i40e_dcb_app_priority_table app;
4529 struct i40e_hw *hw = &pf->hw;
4530 u8 enabled_tc = 1; /* TC0 is always enabled */
4531 u8 tc, i;
4532 /* Get the iSCSI APP TLV */
4533 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4534
4535 for (i = 0; i < dcbcfg->numapps; i++) {
4536 app = dcbcfg->app[i];
4537 if (app.selector == I40E_APP_SEL_TCPIP &&
4538 app.protocolid == I40E_APP_PROTOID_ISCSI) {
4539 tc = dcbcfg->etscfg.prioritytable[app.priority];
4540 enabled_tc |= BIT(tc);
4541 break;
4542 }
4543 }
4544
4545 return enabled_tc;
4546 }
4547
4548 /**
4549 * i40e_dcb_get_num_tc - Get the number of TCs from DCBx config
4550 * @dcbcfg: the corresponding DCBx configuration structure
4551 *
4552 * Return the number of TCs from given DCBx configuration
4553 **/
4554 static u8 i40e_dcb_get_num_tc(struct i40e_dcbx_config *dcbcfg)
4555 {
4556 int i, tc_unused = 0;
4557 u8 num_tc = 0;
4558 u8 ret = 0;
4559
4560 /* Scan the ETS Config Priority Table to find
4561 * traffic class enabled for a given priority
4562 * and create a bitmask of enabled TCs
4563 */
4564 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++)
4565 num_tc |= BIT(dcbcfg->etscfg.prioritytable[i]);
4566
4567 /* Now scan the bitmask to check for
4568 * contiguous TCs starting with TC0
4569 */
4570 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4571 if (num_tc & BIT(i)) {
4572 if (!tc_unused) {
4573 ret++;
4574 } else {
4575 pr_err("Non-contiguous TC - Disabling DCB\n");
4576 return 1;
4577 }
4578 } else {
4579 tc_unused = 1;
4580 }
4581 }
4582
4583 /* There is always at least TC0 */
4584 if (!ret)
4585 ret = 1;
4586
4587 return ret;
4588 }
4589
4590 /**
4591 * i40e_dcb_get_enabled_tc - Get enabled traffic classes
4592 * @dcbcfg: the corresponding DCBx configuration structure
4593 *
4594 * Query the current DCB configuration and return the number of
4595 * traffic classes enabled from the given DCBX config
4596 **/
4597 static u8 i40e_dcb_get_enabled_tc(struct i40e_dcbx_config *dcbcfg)
4598 {
4599 u8 num_tc = i40e_dcb_get_num_tc(dcbcfg);
4600 u8 enabled_tc = 1;
4601 u8 i;
4602
4603 for (i = 0; i < num_tc; i++)
4604 enabled_tc |= BIT(i);
4605
4606 return enabled_tc;
4607 }
4608
4609 /**
4610 * i40e_pf_get_num_tc - Get enabled traffic classes for PF
4611 * @pf: PF being queried
4612 *
4613 * Return number of traffic classes enabled for the given PF
4614 **/
4615 static u8 i40e_pf_get_num_tc(struct i40e_pf *pf)
4616 {
4617 struct i40e_hw *hw = &pf->hw;
4618 u8 i, enabled_tc = 1;
4619 u8 num_tc = 0;
4620 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4621
4622 /* If DCB is not enabled then always in single TC */
4623 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4624 return 1;
4625
4626 /* SFP mode will be enabled for all TCs on port */
4627 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
4628 return i40e_dcb_get_num_tc(dcbcfg);
4629
4630 /* MFP mode return count of enabled TCs for this PF */
4631 if (pf->hw.func_caps.iscsi)
4632 enabled_tc = i40e_get_iscsi_tc_map(pf);
4633 else
4634 return 1; /* Only TC0 */
4635
4636 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4637 if (enabled_tc & BIT(i))
4638 num_tc++;
4639 }
4640 return num_tc;
4641 }
4642
4643 /**
4644 * i40e_pf_get_pf_tc_map - Get bitmap for enabled traffic classes
4645 * @pf: PF being queried
4646 *
4647 * Return a bitmap for enabled traffic classes for this PF.
4648 **/
4649 static u8 i40e_pf_get_tc_map(struct i40e_pf *pf)
4650 {
4651 /* If DCB is not enabled for this PF then just return default TC */
4652 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4653 return I40E_DEFAULT_TRAFFIC_CLASS;
4654
4655 /* SFP mode we want PF to be enabled for all TCs */
4656 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
4657 return i40e_dcb_get_enabled_tc(&pf->hw.local_dcbx_config);
4658
4659 /* MFP enabled and iSCSI PF type */
4660 if (pf->hw.func_caps.iscsi)
4661 return i40e_get_iscsi_tc_map(pf);
4662 else
4663 return I40E_DEFAULT_TRAFFIC_CLASS;
4664 }
4665
4666 /**
4667 * i40e_vsi_get_bw_info - Query VSI BW Information
4668 * @vsi: the VSI being queried
4669 *
4670 * Returns 0 on success, negative value on failure
4671 **/
4672 static int i40e_vsi_get_bw_info(struct i40e_vsi *vsi)
4673 {
4674 struct i40e_aqc_query_vsi_ets_sla_config_resp bw_ets_config = {0};
4675 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0};
4676 struct i40e_pf *pf = vsi->back;
4677 struct i40e_hw *hw = &pf->hw;
4678 i40e_status ret;
4679 u32 tc_bw_max;
4680 int i;
4681
4682 /* Get the VSI level BW configuration */
4683 ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL);
4684 if (ret) {
4685 dev_info(&pf->pdev->dev,
4686 "couldn't get PF vsi bw config, err %s aq_err %s\n",
4687 i40e_stat_str(&pf->hw, ret),
4688 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4689 return -EINVAL;
4690 }
4691
4692 /* Get the VSI level BW configuration per TC */
4693 ret = i40e_aq_query_vsi_ets_sla_config(hw, vsi->seid, &bw_ets_config,
4694 NULL);
4695 if (ret) {
4696 dev_info(&pf->pdev->dev,
4697 "couldn't get PF vsi ets bw config, err %s aq_err %s\n",
4698 i40e_stat_str(&pf->hw, ret),
4699 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4700 return -EINVAL;
4701 }
4702
4703 if (bw_config.tc_valid_bits != bw_ets_config.tc_valid_bits) {
4704 dev_info(&pf->pdev->dev,
4705 "Enabled TCs mismatch from querying VSI BW info 0x%08x 0x%08x\n",
4706 bw_config.tc_valid_bits,
4707 bw_ets_config.tc_valid_bits);
4708 /* Still continuing */
4709 }
4710
4711 vsi->bw_limit = le16_to_cpu(bw_config.port_bw_limit);
4712 vsi->bw_max_quanta = bw_config.max_bw;
4713 tc_bw_max = le16_to_cpu(bw_ets_config.tc_bw_max[0]) |
4714 (le16_to_cpu(bw_ets_config.tc_bw_max[1]) << 16);
4715 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4716 vsi->bw_ets_share_credits[i] = bw_ets_config.share_credits[i];
4717 vsi->bw_ets_limit_credits[i] =
4718 le16_to_cpu(bw_ets_config.credits[i]);
4719 /* 3 bits out of 4 for each TC */
4720 vsi->bw_ets_max_quanta[i] = (u8)((tc_bw_max >> (i*4)) & 0x7);
4721 }
4722
4723 return 0;
4724 }
4725
4726 /**
4727 * i40e_vsi_configure_bw_alloc - Configure VSI BW allocation per TC
4728 * @vsi: the VSI being configured
4729 * @enabled_tc: TC bitmap
4730 * @bw_credits: BW shared credits per TC
4731 *
4732 * Returns 0 on success, negative value on failure
4733 **/
4734 static int i40e_vsi_configure_bw_alloc(struct i40e_vsi *vsi, u8 enabled_tc,
4735 u8 *bw_share)
4736 {
4737 struct i40e_aqc_configure_vsi_tc_bw_data bw_data;
4738 i40e_status ret;
4739 int i;
4740
4741 bw_data.tc_valid_bits = enabled_tc;
4742 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4743 bw_data.tc_bw_credits[i] = bw_share[i];
4744
4745 ret = i40e_aq_config_vsi_tc_bw(&vsi->back->hw, vsi->seid, &bw_data,
4746 NULL);
4747 if (ret) {
4748 dev_info(&vsi->back->pdev->dev,
4749 "AQ command Config VSI BW allocation per TC failed = %d\n",
4750 vsi->back->hw.aq.asq_last_status);
4751 return -EINVAL;
4752 }
4753
4754 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4755 vsi->info.qs_handle[i] = bw_data.qs_handles[i];
4756
4757 return 0;
4758 }
4759
4760 /**
4761 * i40e_vsi_config_netdev_tc - Setup the netdev TC configuration
4762 * @vsi: the VSI being configured
4763 * @enabled_tc: TC map to be enabled
4764 *
4765 **/
4766 static void i40e_vsi_config_netdev_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4767 {
4768 struct net_device *netdev = vsi->netdev;
4769 struct i40e_pf *pf = vsi->back;
4770 struct i40e_hw *hw = &pf->hw;
4771 u8 netdev_tc = 0;
4772 int i;
4773 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4774
4775 if (!netdev)
4776 return;
4777
4778 if (!enabled_tc) {
4779 netdev_reset_tc(netdev);
4780 return;
4781 }
4782
4783 /* Set up actual enabled TCs on the VSI */
4784 if (netdev_set_num_tc(netdev, vsi->tc_config.numtc))
4785 return;
4786
4787 /* set per TC queues for the VSI */
4788 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4789 /* Only set TC queues for enabled tcs
4790 *
4791 * e.g. For a VSI that has TC0 and TC3 enabled the
4792 * enabled_tc bitmap would be 0x00001001; the driver
4793 * will set the numtc for netdev as 2 that will be
4794 * referenced by the netdev layer as TC 0 and 1.
4795 */
4796 if (vsi->tc_config.enabled_tc & BIT(i))
4797 netdev_set_tc_queue(netdev,
4798 vsi->tc_config.tc_info[i].netdev_tc,
4799 vsi->tc_config.tc_info[i].qcount,
4800 vsi->tc_config.tc_info[i].qoffset);
4801 }
4802
4803 /* Assign UP2TC map for the VSI */
4804 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
4805 /* Get the actual TC# for the UP */
4806 u8 ets_tc = dcbcfg->etscfg.prioritytable[i];
4807 /* Get the mapped netdev TC# for the UP */
4808 netdev_tc = vsi->tc_config.tc_info[ets_tc].netdev_tc;
4809 netdev_set_prio_tc_map(netdev, i, netdev_tc);
4810 }
4811 }
4812
4813 /**
4814 * i40e_vsi_update_queue_map - Update our copy of VSi info with new queue map
4815 * @vsi: the VSI being configured
4816 * @ctxt: the ctxt buffer returned from AQ VSI update param command
4817 **/
4818 static void i40e_vsi_update_queue_map(struct i40e_vsi *vsi,
4819 struct i40e_vsi_context *ctxt)
4820 {
4821 /* copy just the sections touched not the entire info
4822 * since not all sections are valid as returned by
4823 * update vsi params
4824 */
4825 vsi->info.mapping_flags = ctxt->info.mapping_flags;
4826 memcpy(&vsi->info.queue_mapping,
4827 &ctxt->info.queue_mapping, sizeof(vsi->info.queue_mapping));
4828 memcpy(&vsi->info.tc_mapping, ctxt->info.tc_mapping,
4829 sizeof(vsi->info.tc_mapping));
4830 }
4831
4832 /**
4833 * i40e_vsi_config_tc - Configure VSI Tx Scheduler for given TC map
4834 * @vsi: VSI to be configured
4835 * @enabled_tc: TC bitmap
4836 *
4837 * This configures a particular VSI for TCs that are mapped to the
4838 * given TC bitmap. It uses default bandwidth share for TCs across
4839 * VSIs to configure TC for a particular VSI.
4840 *
4841 * NOTE:
4842 * It is expected that the VSI queues have been quisced before calling
4843 * this function.
4844 **/
4845 static int i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4846 {
4847 u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0};
4848 struct i40e_vsi_context ctxt;
4849 int ret = 0;
4850 int i;
4851
4852 /* Check if enabled_tc is same as existing or new TCs */
4853 if (vsi->tc_config.enabled_tc == enabled_tc)
4854 return ret;
4855
4856 /* Enable ETS TCs with equal BW Share for now across all VSIs */
4857 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4858 if (enabled_tc & BIT(i))
4859 bw_share[i] = 1;
4860 }
4861
4862 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share);
4863 if (ret) {
4864 dev_info(&vsi->back->pdev->dev,
4865 "Failed configuring TC map %d for VSI %d\n",
4866 enabled_tc, vsi->seid);
4867 goto out;
4868 }
4869
4870 /* Update Queue Pairs Mapping for currently enabled UPs */
4871 ctxt.seid = vsi->seid;
4872 ctxt.pf_num = vsi->back->hw.pf_id;
4873 ctxt.vf_num = 0;
4874 ctxt.uplink_seid = vsi->uplink_seid;
4875 ctxt.info = vsi->info;
4876 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
4877
4878 if (vsi->back->flags & I40E_FLAG_IWARP_ENABLED) {
4879 ctxt.info.valid_sections |=
4880 cpu_to_le16(I40E_AQ_VSI_PROP_QUEUE_OPT_VALID);
4881 ctxt.info.queueing_opt_flags |= I40E_AQ_VSI_QUE_OPT_TCP_ENA;
4882 }
4883
4884 /* Update the VSI after updating the VSI queue-mapping information */
4885 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
4886 if (ret) {
4887 dev_info(&vsi->back->pdev->dev,
4888 "Update vsi tc config failed, err %s aq_err %s\n",
4889 i40e_stat_str(&vsi->back->hw, ret),
4890 i40e_aq_str(&vsi->back->hw,
4891 vsi->back->hw.aq.asq_last_status));
4892 goto out;
4893 }
4894 /* update the local VSI info with updated queue map */
4895 i40e_vsi_update_queue_map(vsi, &ctxt);
4896 vsi->info.valid_sections = 0;
4897
4898 /* Update current VSI BW information */
4899 ret = i40e_vsi_get_bw_info(vsi);
4900 if (ret) {
4901 dev_info(&vsi->back->pdev->dev,
4902 "Failed updating vsi bw info, err %s aq_err %s\n",
4903 i40e_stat_str(&vsi->back->hw, ret),
4904 i40e_aq_str(&vsi->back->hw,
4905 vsi->back->hw.aq.asq_last_status));
4906 goto out;
4907 }
4908
4909 /* Update the netdev TC setup */
4910 i40e_vsi_config_netdev_tc(vsi, enabled_tc);
4911 out:
4912 return ret;
4913 }
4914
4915 /**
4916 * i40e_veb_config_tc - Configure TCs for given VEB
4917 * @veb: given VEB
4918 * @enabled_tc: TC bitmap
4919 *
4920 * Configures given TC bitmap for VEB (switching) element
4921 **/
4922 int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc)
4923 {
4924 struct i40e_aqc_configure_switching_comp_bw_config_data bw_data = {0};
4925 struct i40e_pf *pf = veb->pf;
4926 int ret = 0;
4927 int i;
4928
4929 /* No TCs or already enabled TCs just return */
4930 if (!enabled_tc || veb->enabled_tc == enabled_tc)
4931 return ret;
4932
4933 bw_data.tc_valid_bits = enabled_tc;
4934 /* bw_data.absolute_credits is not set (relative) */
4935
4936 /* Enable ETS TCs with equal BW Share for now */
4937 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4938 if (enabled_tc & BIT(i))
4939 bw_data.tc_bw_share_credits[i] = 1;
4940 }
4941
4942 ret = i40e_aq_config_switch_comp_bw_config(&pf->hw, veb->seid,
4943 &bw_data, NULL);
4944 if (ret) {
4945 dev_info(&pf->pdev->dev,
4946 "VEB bw config failed, err %s aq_err %s\n",
4947 i40e_stat_str(&pf->hw, ret),
4948 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4949 goto out;
4950 }
4951
4952 /* Update the BW information */
4953 ret = i40e_veb_get_bw_info(veb);
4954 if (ret) {
4955 dev_info(&pf->pdev->dev,
4956 "Failed getting veb bw config, err %s aq_err %s\n",
4957 i40e_stat_str(&pf->hw, ret),
4958 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
4959 }
4960
4961 out:
4962 return ret;
4963 }
4964
4965 #ifdef CONFIG_I40E_DCB
4966 /**
4967 * i40e_dcb_reconfigure - Reconfigure all VEBs and VSIs
4968 * @pf: PF struct
4969 *
4970 * Reconfigure VEB/VSIs on a given PF; it is assumed that
4971 * the caller would've quiesce all the VSIs before calling
4972 * this function
4973 **/
4974 static void i40e_dcb_reconfigure(struct i40e_pf *pf)
4975 {
4976 u8 tc_map = 0;
4977 int ret;
4978 u8 v;
4979
4980 /* Enable the TCs available on PF to all VEBs */
4981 tc_map = i40e_pf_get_tc_map(pf);
4982 for (v = 0; v < I40E_MAX_VEB; v++) {
4983 if (!pf->veb[v])
4984 continue;
4985 ret = i40e_veb_config_tc(pf->veb[v], tc_map);
4986 if (ret) {
4987 dev_info(&pf->pdev->dev,
4988 "Failed configuring TC for VEB seid=%d\n",
4989 pf->veb[v]->seid);
4990 /* Will try to configure as many components */
4991 }
4992 }
4993
4994 /* Update each VSI */
4995 for (v = 0; v < pf->num_alloc_vsi; v++) {
4996 if (!pf->vsi[v])
4997 continue;
4998
4999 /* - Enable all TCs for the LAN VSI
5000 #ifdef I40E_FCOE
5001 * - For FCoE VSI only enable the TC configured
5002 * as per the APP TLV
5003 #endif
5004 * - For all others keep them at TC0 for now
5005 */
5006 if (v == pf->lan_vsi)
5007 tc_map = i40e_pf_get_tc_map(pf);
5008 else
5009 tc_map = I40E_DEFAULT_TRAFFIC_CLASS;
5010 #ifdef I40E_FCOE
5011 if (pf->vsi[v]->type == I40E_VSI_FCOE)
5012 tc_map = i40e_get_fcoe_tc_map(pf);
5013 #endif /* #ifdef I40E_FCOE */
5014
5015 ret = i40e_vsi_config_tc(pf->vsi[v], tc_map);
5016 if (ret) {
5017 dev_info(&pf->pdev->dev,
5018 "Failed configuring TC for VSI seid=%d\n",
5019 pf->vsi[v]->seid);
5020 /* Will try to configure as many components */
5021 } else {
5022 /* Re-configure VSI vectors based on updated TC map */
5023 i40e_vsi_map_rings_to_vectors(pf->vsi[v]);
5024 if (pf->vsi[v]->netdev)
5025 i40e_dcbnl_set_all(pf->vsi[v]);
5026 }
5027 }
5028 }
5029
5030 /**
5031 * i40e_resume_port_tx - Resume port Tx
5032 * @pf: PF struct
5033 *
5034 * Resume a port's Tx and issue a PF reset in case of failure to
5035 * resume.
5036 **/
5037 static int i40e_resume_port_tx(struct i40e_pf *pf)
5038 {
5039 struct i40e_hw *hw = &pf->hw;
5040 int ret;
5041
5042 ret = i40e_aq_resume_port_tx(hw, NULL);
5043 if (ret) {
5044 dev_info(&pf->pdev->dev,
5045 "Resume Port Tx failed, err %s aq_err %s\n",
5046 i40e_stat_str(&pf->hw, ret),
5047 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5048 /* Schedule PF reset to recover */
5049 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
5050 i40e_service_event_schedule(pf);
5051 }
5052
5053 return ret;
5054 }
5055
5056 /**
5057 * i40e_init_pf_dcb - Initialize DCB configuration
5058 * @pf: PF being configured
5059 *
5060 * Query the current DCB configuration and cache it
5061 * in the hardware structure
5062 **/
5063 static int i40e_init_pf_dcb(struct i40e_pf *pf)
5064 {
5065 struct i40e_hw *hw = &pf->hw;
5066 int err = 0;
5067
5068 /* Do not enable DCB for SW1 and SW2 images even if the FW is capable */
5069 if (pf->flags & I40E_FLAG_NO_DCB_SUPPORT)
5070 goto out;
5071
5072 /* Get the initial DCB configuration */
5073 err = i40e_init_dcb(hw);
5074 if (!err) {
5075 /* Device/Function is not DCBX capable */
5076 if ((!hw->func_caps.dcb) ||
5077 (hw->dcbx_status == I40E_DCBX_STATUS_DISABLED)) {
5078 dev_info(&pf->pdev->dev,
5079 "DCBX offload is not supported or is disabled for this PF.\n");
5080
5081 if (pf->flags & I40E_FLAG_MFP_ENABLED)
5082 goto out;
5083
5084 } else {
5085 /* When status is not DISABLED then DCBX in FW */
5086 pf->dcbx_cap = DCB_CAP_DCBX_LLD_MANAGED |
5087 DCB_CAP_DCBX_VER_IEEE;
5088
5089 pf->flags |= I40E_FLAG_DCB_CAPABLE;
5090 /* Enable DCB tagging only when more than one TC
5091 * or explicitly disable if only one TC
5092 */
5093 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
5094 pf->flags |= I40E_FLAG_DCB_ENABLED;
5095 else
5096 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
5097 dev_dbg(&pf->pdev->dev,
5098 "DCBX offload is supported for this PF.\n");
5099 }
5100 } else {
5101 dev_info(&pf->pdev->dev,
5102 "Query for DCB configuration failed, err %s aq_err %s\n",
5103 i40e_stat_str(&pf->hw, err),
5104 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5105 }
5106
5107 out:
5108 return err;
5109 }
5110 #endif /* CONFIG_I40E_DCB */
5111 #define SPEED_SIZE 14
5112 #define FC_SIZE 8
5113 /**
5114 * i40e_print_link_message - print link up or down
5115 * @vsi: the VSI for which link needs a message
5116 */
5117 void i40e_print_link_message(struct i40e_vsi *vsi, bool isup)
5118 {
5119 char *speed = "Unknown";
5120 char *fc = "Unknown";
5121
5122 if (vsi->current_isup == isup)
5123 return;
5124 vsi->current_isup = isup;
5125 if (!isup) {
5126 netdev_info(vsi->netdev, "NIC Link is Down\n");
5127 return;
5128 }
5129
5130 /* Warn user if link speed on NPAR enabled partition is not at
5131 * least 10GB
5132 */
5133 if (vsi->back->hw.func_caps.npar_enable &&
5134 (vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_1GB ||
5135 vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_100MB))
5136 netdev_warn(vsi->netdev,
5137 "The partition detected link speed that is less than 10Gbps\n");
5138
5139 switch (vsi->back->hw.phy.link_info.link_speed) {
5140 case I40E_LINK_SPEED_40GB:
5141 speed = "40 G";
5142 break;
5143 case I40E_LINK_SPEED_20GB:
5144 speed = "20 G";
5145 break;
5146 case I40E_LINK_SPEED_10GB:
5147 speed = "10 G";
5148 break;
5149 case I40E_LINK_SPEED_1GB:
5150 speed = "1000 M";
5151 break;
5152 case I40E_LINK_SPEED_100MB:
5153 speed = "100 M";
5154 break;
5155 default:
5156 break;
5157 }
5158
5159 switch (vsi->back->hw.fc.current_mode) {
5160 case I40E_FC_FULL:
5161 fc = "RX/TX";
5162 break;
5163 case I40E_FC_TX_PAUSE:
5164 fc = "TX";
5165 break;
5166 case I40E_FC_RX_PAUSE:
5167 fc = "RX";
5168 break;
5169 default:
5170 fc = "None";
5171 break;
5172 }
5173
5174 netdev_info(vsi->netdev, "NIC Link is Up %sbps Full Duplex, Flow Control: %s\n",
5175 speed, fc);
5176 }
5177
5178 /**
5179 * i40e_up_complete - Finish the last steps of bringing up a connection
5180 * @vsi: the VSI being configured
5181 **/
5182 static int i40e_up_complete(struct i40e_vsi *vsi)
5183 {
5184 struct i40e_pf *pf = vsi->back;
5185 int err;
5186
5187 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
5188 i40e_vsi_configure_msix(vsi);
5189 else
5190 i40e_configure_msi_and_legacy(vsi);
5191
5192 /* start rings */
5193 err = i40e_vsi_control_rings(vsi, true);
5194 if (err)
5195 return err;
5196
5197 clear_bit(__I40E_DOWN, &vsi->state);
5198 i40e_napi_enable_all(vsi);
5199 i40e_vsi_enable_irq(vsi);
5200
5201 if ((pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP) &&
5202 (vsi->netdev)) {
5203 i40e_print_link_message(vsi, true);
5204 netif_tx_start_all_queues(vsi->netdev);
5205 netif_carrier_on(vsi->netdev);
5206 } else if (vsi->netdev) {
5207 i40e_print_link_message(vsi, false);
5208 /* need to check for qualified module here*/
5209 if ((pf->hw.phy.link_info.link_info &
5210 I40E_AQ_MEDIA_AVAILABLE) &&
5211 (!(pf->hw.phy.link_info.an_info &
5212 I40E_AQ_QUALIFIED_MODULE)))
5213 netdev_err(vsi->netdev,
5214 "the driver failed to link because an unqualified module was detected.");
5215 }
5216
5217 /* replay FDIR SB filters */
5218 if (vsi->type == I40E_VSI_FDIR) {
5219 /* reset fd counters */
5220 pf->fd_add_err = pf->fd_atr_cnt = 0;
5221 if (pf->fd_tcp_rule > 0) {
5222 pf->auto_disable_flags |= I40E_FLAG_FD_ATR_ENABLED;
5223 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5224 dev_info(&pf->pdev->dev, "Forcing ATR off, sideband rules for TCP/IPv4 exist\n");
5225 pf->fd_tcp_rule = 0;
5226 }
5227 i40e_fdir_filter_restore(vsi);
5228 }
5229
5230 /* On the next run of the service_task, notify any clients of the new
5231 * opened netdev
5232 */
5233 pf->flags |= I40E_FLAG_SERVICE_CLIENT_REQUESTED;
5234 i40e_service_event_schedule(pf);
5235
5236 return 0;
5237 }
5238
5239 /**
5240 * i40e_vsi_reinit_locked - Reset the VSI
5241 * @vsi: the VSI being configured
5242 *
5243 * Rebuild the ring structs after some configuration
5244 * has changed, e.g. MTU size.
5245 **/
5246 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi)
5247 {
5248 struct i40e_pf *pf = vsi->back;
5249
5250 WARN_ON(in_interrupt());
5251 while (test_and_set_bit(__I40E_CONFIG_BUSY, &pf->state))
5252 usleep_range(1000, 2000);
5253 i40e_down(vsi);
5254
5255 i40e_up(vsi);
5256 clear_bit(__I40E_CONFIG_BUSY, &pf->state);
5257 }
5258
5259 /**
5260 * i40e_up - Bring the connection back up after being down
5261 * @vsi: the VSI being configured
5262 **/
5263 int i40e_up(struct i40e_vsi *vsi)
5264 {
5265 int err;
5266
5267 err = i40e_vsi_configure(vsi);
5268 if (!err)
5269 err = i40e_up_complete(vsi);
5270
5271 return err;
5272 }
5273
5274 /**
5275 * i40e_down - Shutdown the connection processing
5276 * @vsi: the VSI being stopped
5277 **/
5278 void i40e_down(struct i40e_vsi *vsi)
5279 {
5280 int i;
5281
5282 /* It is assumed that the caller of this function
5283 * sets the vsi->state __I40E_DOWN bit.
5284 */
5285 if (vsi->netdev) {
5286 netif_carrier_off(vsi->netdev);
5287 netif_tx_disable(vsi->netdev);
5288 }
5289 i40e_vsi_disable_irq(vsi);
5290 i40e_vsi_control_rings(vsi, false);
5291 i40e_napi_disable_all(vsi);
5292
5293 for (i = 0; i < vsi->num_queue_pairs; i++) {
5294 i40e_clean_tx_ring(vsi->tx_rings[i]);
5295 i40e_clean_rx_ring(vsi->rx_rings[i]);
5296 }
5297
5298 i40e_notify_client_of_netdev_close(vsi, false);
5299
5300 }
5301
5302 /**
5303 * i40e_setup_tc - configure multiple traffic classes
5304 * @netdev: net device to configure
5305 * @tc: number of traffic classes to enable
5306 **/
5307 static int i40e_setup_tc(struct net_device *netdev, u8 tc)
5308 {
5309 struct i40e_netdev_priv *np = netdev_priv(netdev);
5310 struct i40e_vsi *vsi = np->vsi;
5311 struct i40e_pf *pf = vsi->back;
5312 u8 enabled_tc = 0;
5313 int ret = -EINVAL;
5314 int i;
5315
5316 /* Check if DCB enabled to continue */
5317 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) {
5318 netdev_info(netdev, "DCB is not enabled for adapter\n");
5319 goto exit;
5320 }
5321
5322 /* Check if MFP enabled */
5323 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
5324 netdev_info(netdev, "Configuring TC not supported in MFP mode\n");
5325 goto exit;
5326 }
5327
5328 /* Check whether tc count is within enabled limit */
5329 if (tc > i40e_pf_get_num_tc(pf)) {
5330 netdev_info(netdev, "TC count greater than enabled on link for adapter\n");
5331 goto exit;
5332 }
5333
5334 /* Generate TC map for number of tc requested */
5335 for (i = 0; i < tc; i++)
5336 enabled_tc |= BIT(i);
5337
5338 /* Requesting same TC configuration as already enabled */
5339 if (enabled_tc == vsi->tc_config.enabled_tc)
5340 return 0;
5341
5342 /* Quiesce VSI queues */
5343 i40e_quiesce_vsi(vsi);
5344
5345 /* Configure VSI for enabled TCs */
5346 ret = i40e_vsi_config_tc(vsi, enabled_tc);
5347 if (ret) {
5348 netdev_info(netdev, "Failed configuring TC for VSI seid=%d\n",
5349 vsi->seid);
5350 goto exit;
5351 }
5352
5353 /* Unquiesce VSI */
5354 i40e_unquiesce_vsi(vsi);
5355
5356 exit:
5357 return ret;
5358 }
5359
5360 #ifdef I40E_FCOE
5361 int __i40e_setup_tc(struct net_device *netdev, u32 handle, __be16 proto,
5362 struct tc_to_netdev *tc)
5363 #else
5364 static int __i40e_setup_tc(struct net_device *netdev, u32 handle, __be16 proto,
5365 struct tc_to_netdev *tc)
5366 #endif
5367 {
5368 if (handle != TC_H_ROOT || tc->type != TC_SETUP_MQPRIO)
5369 return -EINVAL;
5370 return i40e_setup_tc(netdev, tc->tc);
5371 }
5372
5373 /**
5374 * i40e_open - Called when a network interface is made active
5375 * @netdev: network interface device structure
5376 *
5377 * The open entry point is called when a network interface is made
5378 * active by the system (IFF_UP). At this point all resources needed
5379 * for transmit and receive operations are allocated, the interrupt
5380 * handler is registered with the OS, the netdev watchdog subtask is
5381 * enabled, and the stack is notified that the interface is ready.
5382 *
5383 * Returns 0 on success, negative value on failure
5384 **/
5385 int i40e_open(struct net_device *netdev)
5386 {
5387 struct i40e_netdev_priv *np = netdev_priv(netdev);
5388 struct i40e_vsi *vsi = np->vsi;
5389 struct i40e_pf *pf = vsi->back;
5390 int err;
5391
5392 /* disallow open during test or if eeprom is broken */
5393 if (test_bit(__I40E_TESTING, &pf->state) ||
5394 test_bit(__I40E_BAD_EEPROM, &pf->state))
5395 return -EBUSY;
5396
5397 netif_carrier_off(netdev);
5398
5399 err = i40e_vsi_open(vsi);
5400 if (err)
5401 return err;
5402
5403 /* configure global TSO hardware offload settings */
5404 wr32(&pf->hw, I40E_GLLAN_TSOMSK_F, be32_to_cpu(TCP_FLAG_PSH |
5405 TCP_FLAG_FIN) >> 16);
5406 wr32(&pf->hw, I40E_GLLAN_TSOMSK_M, be32_to_cpu(TCP_FLAG_PSH |
5407 TCP_FLAG_FIN |
5408 TCP_FLAG_CWR) >> 16);
5409 wr32(&pf->hw, I40E_GLLAN_TSOMSK_L, be32_to_cpu(TCP_FLAG_CWR) >> 16);
5410
5411 udp_tunnel_get_rx_info(netdev);
5412
5413 return 0;
5414 }
5415
5416 /**
5417 * i40e_vsi_open -
5418 * @vsi: the VSI to open
5419 *
5420 * Finish initialization of the VSI.
5421 *
5422 * Returns 0 on success, negative value on failure
5423 **/
5424 int i40e_vsi_open(struct i40e_vsi *vsi)
5425 {
5426 struct i40e_pf *pf = vsi->back;
5427 char int_name[I40E_INT_NAME_STR_LEN];
5428 int err;
5429
5430 /* allocate descriptors */
5431 err = i40e_vsi_setup_tx_resources(vsi);
5432 if (err)
5433 goto err_setup_tx;
5434 err = i40e_vsi_setup_rx_resources(vsi);
5435 if (err)
5436 goto err_setup_rx;
5437
5438 err = i40e_vsi_configure(vsi);
5439 if (err)
5440 goto err_setup_rx;
5441
5442 if (vsi->netdev) {
5443 snprintf(int_name, sizeof(int_name) - 1, "%s-%s",
5444 dev_driver_string(&pf->pdev->dev), vsi->netdev->name);
5445 err = i40e_vsi_request_irq(vsi, int_name);
5446 if (err)
5447 goto err_setup_rx;
5448
5449 /* Notify the stack of the actual queue counts. */
5450 err = netif_set_real_num_tx_queues(vsi->netdev,
5451 vsi->num_queue_pairs);
5452 if (err)
5453 goto err_set_queues;
5454
5455 err = netif_set_real_num_rx_queues(vsi->netdev,
5456 vsi->num_queue_pairs);
5457 if (err)
5458 goto err_set_queues;
5459
5460 } else if (vsi->type == I40E_VSI_FDIR) {
5461 snprintf(int_name, sizeof(int_name) - 1, "%s-%s:fdir",
5462 dev_driver_string(&pf->pdev->dev),
5463 dev_name(&pf->pdev->dev));
5464 err = i40e_vsi_request_irq(vsi, int_name);
5465
5466 } else {
5467 err = -EINVAL;
5468 goto err_setup_rx;
5469 }
5470
5471 err = i40e_up_complete(vsi);
5472 if (err)
5473 goto err_up_complete;
5474
5475 return 0;
5476
5477 err_up_complete:
5478 i40e_down(vsi);
5479 err_set_queues:
5480 i40e_vsi_free_irq(vsi);
5481 err_setup_rx:
5482 i40e_vsi_free_rx_resources(vsi);
5483 err_setup_tx:
5484 i40e_vsi_free_tx_resources(vsi);
5485 if (vsi == pf->vsi[pf->lan_vsi])
5486 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
5487
5488 return err;
5489 }
5490
5491 /**
5492 * i40e_fdir_filter_exit - Cleans up the Flow Director accounting
5493 * @pf: Pointer to PF
5494 *
5495 * This function destroys the hlist where all the Flow Director
5496 * filters were saved.
5497 **/
5498 static void i40e_fdir_filter_exit(struct i40e_pf *pf)
5499 {
5500 struct i40e_fdir_filter *filter;
5501 struct hlist_node *node2;
5502
5503 hlist_for_each_entry_safe(filter, node2,
5504 &pf->fdir_filter_list, fdir_node) {
5505 hlist_del(&filter->fdir_node);
5506 kfree(filter);
5507 }
5508 pf->fdir_pf_active_filters = 0;
5509 }
5510
5511 /**
5512 * i40e_close - Disables a network interface
5513 * @netdev: network interface device structure
5514 *
5515 * The close entry point is called when an interface is de-activated
5516 * by the OS. The hardware is still under the driver's control, but
5517 * this netdev interface is disabled.
5518 *
5519 * Returns 0, this is not allowed to fail
5520 **/
5521 int i40e_close(struct net_device *netdev)
5522 {
5523 struct i40e_netdev_priv *np = netdev_priv(netdev);
5524 struct i40e_vsi *vsi = np->vsi;
5525
5526 i40e_vsi_close(vsi);
5527
5528 return 0;
5529 }
5530
5531 /**
5532 * i40e_do_reset - Start a PF or Core Reset sequence
5533 * @pf: board private structure
5534 * @reset_flags: which reset is requested
5535 *
5536 * The essential difference in resets is that the PF Reset
5537 * doesn't clear the packet buffers, doesn't reset the PE
5538 * firmware, and doesn't bother the other PFs on the chip.
5539 **/
5540 void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags)
5541 {
5542 u32 val;
5543
5544 WARN_ON(in_interrupt());
5545
5546
5547 /* do the biggest reset indicated */
5548 if (reset_flags & BIT_ULL(__I40E_GLOBAL_RESET_REQUESTED)) {
5549
5550 /* Request a Global Reset
5551 *
5552 * This will start the chip's countdown to the actual full
5553 * chip reset event, and a warning interrupt to be sent
5554 * to all PFs, including the requestor. Our handler
5555 * for the warning interrupt will deal with the shutdown
5556 * and recovery of the switch setup.
5557 */
5558 dev_dbg(&pf->pdev->dev, "GlobalR requested\n");
5559 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5560 val |= I40E_GLGEN_RTRIG_GLOBR_MASK;
5561 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5562
5563 } else if (reset_flags & BIT_ULL(__I40E_CORE_RESET_REQUESTED)) {
5564
5565 /* Request a Core Reset
5566 *
5567 * Same as Global Reset, except does *not* include the MAC/PHY
5568 */
5569 dev_dbg(&pf->pdev->dev, "CoreR requested\n");
5570 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5571 val |= I40E_GLGEN_RTRIG_CORER_MASK;
5572 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5573 i40e_flush(&pf->hw);
5574
5575 } else if (reset_flags & BIT_ULL(__I40E_PF_RESET_REQUESTED)) {
5576
5577 /* Request a PF Reset
5578 *
5579 * Resets only the PF-specific registers
5580 *
5581 * This goes directly to the tear-down and rebuild of
5582 * the switch, since we need to do all the recovery as
5583 * for the Core Reset.
5584 */
5585 dev_dbg(&pf->pdev->dev, "PFR requested\n");
5586 i40e_handle_reset_warning(pf);
5587
5588 } else if (reset_flags & BIT_ULL(__I40E_REINIT_REQUESTED)) {
5589 int v;
5590
5591 /* Find the VSI(s) that requested a re-init */
5592 dev_info(&pf->pdev->dev,
5593 "VSI reinit requested\n");
5594 for (v = 0; v < pf->num_alloc_vsi; v++) {
5595 struct i40e_vsi *vsi = pf->vsi[v];
5596
5597 if (vsi != NULL &&
5598 test_bit(__I40E_REINIT_REQUESTED, &vsi->state)) {
5599 i40e_vsi_reinit_locked(pf->vsi[v]);
5600 clear_bit(__I40E_REINIT_REQUESTED, &vsi->state);
5601 }
5602 }
5603 } else if (reset_flags & BIT_ULL(__I40E_DOWN_REQUESTED)) {
5604 int v;
5605
5606 /* Find the VSI(s) that needs to be brought down */
5607 dev_info(&pf->pdev->dev, "VSI down requested\n");
5608 for (v = 0; v < pf->num_alloc_vsi; v++) {
5609 struct i40e_vsi *vsi = pf->vsi[v];
5610
5611 if (vsi != NULL &&
5612 test_bit(__I40E_DOWN_REQUESTED, &vsi->state)) {
5613 set_bit(__I40E_DOWN, &vsi->state);
5614 i40e_down(vsi);
5615 clear_bit(__I40E_DOWN_REQUESTED, &vsi->state);
5616 }
5617 }
5618 } else {
5619 dev_info(&pf->pdev->dev,
5620 "bad reset request 0x%08x\n", reset_flags);
5621 }
5622 }
5623
5624 #ifdef CONFIG_I40E_DCB
5625 /**
5626 * i40e_dcb_need_reconfig - Check if DCB needs reconfig
5627 * @pf: board private structure
5628 * @old_cfg: current DCB config
5629 * @new_cfg: new DCB config
5630 **/
5631 bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
5632 struct i40e_dcbx_config *old_cfg,
5633 struct i40e_dcbx_config *new_cfg)
5634 {
5635 bool need_reconfig = false;
5636
5637 /* Check if ETS configuration has changed */
5638 if (memcmp(&new_cfg->etscfg,
5639 &old_cfg->etscfg,
5640 sizeof(new_cfg->etscfg))) {
5641 /* If Priority Table has changed reconfig is needed */
5642 if (memcmp(&new_cfg->etscfg.prioritytable,
5643 &old_cfg->etscfg.prioritytable,
5644 sizeof(new_cfg->etscfg.prioritytable))) {
5645 need_reconfig = true;
5646 dev_dbg(&pf->pdev->dev, "ETS UP2TC changed.\n");
5647 }
5648
5649 if (memcmp(&new_cfg->etscfg.tcbwtable,
5650 &old_cfg->etscfg.tcbwtable,
5651 sizeof(new_cfg->etscfg.tcbwtable)))
5652 dev_dbg(&pf->pdev->dev, "ETS TC BW Table changed.\n");
5653
5654 if (memcmp(&new_cfg->etscfg.tsatable,
5655 &old_cfg->etscfg.tsatable,
5656 sizeof(new_cfg->etscfg.tsatable)))
5657 dev_dbg(&pf->pdev->dev, "ETS TSA Table changed.\n");
5658 }
5659
5660 /* Check if PFC configuration has changed */
5661 if (memcmp(&new_cfg->pfc,
5662 &old_cfg->pfc,
5663 sizeof(new_cfg->pfc))) {
5664 need_reconfig = true;
5665 dev_dbg(&pf->pdev->dev, "PFC config change detected.\n");
5666 }
5667
5668 /* Check if APP Table has changed */
5669 if (memcmp(&new_cfg->app,
5670 &old_cfg->app,
5671 sizeof(new_cfg->app))) {
5672 need_reconfig = true;
5673 dev_dbg(&pf->pdev->dev, "APP Table change detected.\n");
5674 }
5675
5676 dev_dbg(&pf->pdev->dev, "dcb need_reconfig=%d\n", need_reconfig);
5677 return need_reconfig;
5678 }
5679
5680 /**
5681 * i40e_handle_lldp_event - Handle LLDP Change MIB event
5682 * @pf: board private structure
5683 * @e: event info posted on ARQ
5684 **/
5685 static int i40e_handle_lldp_event(struct i40e_pf *pf,
5686 struct i40e_arq_event_info *e)
5687 {
5688 struct i40e_aqc_lldp_get_mib *mib =
5689 (struct i40e_aqc_lldp_get_mib *)&e->desc.params.raw;
5690 struct i40e_hw *hw = &pf->hw;
5691 struct i40e_dcbx_config tmp_dcbx_cfg;
5692 bool need_reconfig = false;
5693 int ret = 0;
5694 u8 type;
5695
5696 /* Not DCB capable or capability disabled */
5697 if (!(pf->flags & I40E_FLAG_DCB_CAPABLE))
5698 return ret;
5699
5700 /* Ignore if event is not for Nearest Bridge */
5701 type = ((mib->type >> I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT)
5702 & I40E_AQ_LLDP_BRIDGE_TYPE_MASK);
5703 dev_dbg(&pf->pdev->dev, "LLDP event mib bridge type 0x%x\n", type);
5704 if (type != I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE)
5705 return ret;
5706
5707 /* Check MIB Type and return if event for Remote MIB update */
5708 type = mib->type & I40E_AQ_LLDP_MIB_TYPE_MASK;
5709 dev_dbg(&pf->pdev->dev,
5710 "LLDP event mib type %s\n", type ? "remote" : "local");
5711 if (type == I40E_AQ_LLDP_MIB_REMOTE) {
5712 /* Update the remote cached instance and return */
5713 ret = i40e_aq_get_dcb_config(hw, I40E_AQ_LLDP_MIB_REMOTE,
5714 I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE,
5715 &hw->remote_dcbx_config);
5716 goto exit;
5717 }
5718
5719 /* Store the old configuration */
5720 tmp_dcbx_cfg = hw->local_dcbx_config;
5721
5722 /* Reset the old DCBx configuration data */
5723 memset(&hw->local_dcbx_config, 0, sizeof(hw->local_dcbx_config));
5724 /* Get updated DCBX data from firmware */
5725 ret = i40e_get_dcb_config(&pf->hw);
5726 if (ret) {
5727 dev_info(&pf->pdev->dev,
5728 "Failed querying DCB configuration data from firmware, err %s aq_err %s\n",
5729 i40e_stat_str(&pf->hw, ret),
5730 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
5731 goto exit;
5732 }
5733
5734 /* No change detected in DCBX configs */
5735 if (!memcmp(&tmp_dcbx_cfg, &hw->local_dcbx_config,
5736 sizeof(tmp_dcbx_cfg))) {
5737 dev_dbg(&pf->pdev->dev, "No change detected in DCBX configuration.\n");
5738 goto exit;
5739 }
5740
5741 need_reconfig = i40e_dcb_need_reconfig(pf, &tmp_dcbx_cfg,
5742 &hw->local_dcbx_config);
5743
5744 i40e_dcbnl_flush_apps(pf, &tmp_dcbx_cfg, &hw->local_dcbx_config);
5745
5746 if (!need_reconfig)
5747 goto exit;
5748
5749 /* Enable DCB tagging only when more than one TC */
5750 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
5751 pf->flags |= I40E_FLAG_DCB_ENABLED;
5752 else
5753 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
5754
5755 set_bit(__I40E_PORT_TX_SUSPENDED, &pf->state);
5756 /* Reconfiguration needed quiesce all VSIs */
5757 i40e_pf_quiesce_all_vsi(pf);
5758
5759 /* Changes in configuration update VEB/VSI */
5760 i40e_dcb_reconfigure(pf);
5761
5762 ret = i40e_resume_port_tx(pf);
5763
5764 clear_bit(__I40E_PORT_TX_SUSPENDED, &pf->state);
5765 /* In case of error no point in resuming VSIs */
5766 if (ret)
5767 goto exit;
5768
5769 /* Wait for the PF's queues to be disabled */
5770 ret = i40e_pf_wait_queues_disabled(pf);
5771 if (ret) {
5772 /* Schedule PF reset to recover */
5773 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
5774 i40e_service_event_schedule(pf);
5775 } else {
5776 i40e_pf_unquiesce_all_vsi(pf);
5777 /* Notify the client for the DCB changes */
5778 i40e_notify_client_of_l2_param_changes(pf->vsi[pf->lan_vsi]);
5779 }
5780
5781 exit:
5782 return ret;
5783 }
5784 #endif /* CONFIG_I40E_DCB */
5785
5786 /**
5787 * i40e_do_reset_safe - Protected reset path for userland calls.
5788 * @pf: board private structure
5789 * @reset_flags: which reset is requested
5790 *
5791 **/
5792 void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags)
5793 {
5794 rtnl_lock();
5795 i40e_do_reset(pf, reset_flags);
5796 rtnl_unlock();
5797 }
5798
5799 /**
5800 * i40e_handle_lan_overflow_event - Handler for LAN queue overflow event
5801 * @pf: board private structure
5802 * @e: event info posted on ARQ
5803 *
5804 * Handler for LAN Queue Overflow Event generated by the firmware for PF
5805 * and VF queues
5806 **/
5807 static void i40e_handle_lan_overflow_event(struct i40e_pf *pf,
5808 struct i40e_arq_event_info *e)
5809 {
5810 struct i40e_aqc_lan_overflow *data =
5811 (struct i40e_aqc_lan_overflow *)&e->desc.params.raw;
5812 u32 queue = le32_to_cpu(data->prtdcb_rupto);
5813 u32 qtx_ctl = le32_to_cpu(data->otx_ctl);
5814 struct i40e_hw *hw = &pf->hw;
5815 struct i40e_vf *vf;
5816 u16 vf_id;
5817
5818 dev_dbg(&pf->pdev->dev, "overflow Rx Queue Number = %d QTX_CTL=0x%08x\n",
5819 queue, qtx_ctl);
5820
5821 /* Queue belongs to VF, find the VF and issue VF reset */
5822 if (((qtx_ctl & I40E_QTX_CTL_PFVF_Q_MASK)
5823 >> I40E_QTX_CTL_PFVF_Q_SHIFT) == I40E_QTX_CTL_VF_QUEUE) {
5824 vf_id = (u16)((qtx_ctl & I40E_QTX_CTL_VFVM_INDX_MASK)
5825 >> I40E_QTX_CTL_VFVM_INDX_SHIFT);
5826 vf_id -= hw->func_caps.vf_base_id;
5827 vf = &pf->vf[vf_id];
5828 i40e_vc_notify_vf_reset(vf);
5829 /* Allow VF to process pending reset notification */
5830 msleep(20);
5831 i40e_reset_vf(vf, false);
5832 }
5833 }
5834
5835 /**
5836 * i40e_service_event_complete - Finish up the service event
5837 * @pf: board private structure
5838 **/
5839 static void i40e_service_event_complete(struct i40e_pf *pf)
5840 {
5841 WARN_ON(!test_bit(__I40E_SERVICE_SCHED, &pf->state));
5842
5843 /* flush memory to make sure state is correct before next watchog */
5844 smp_mb__before_atomic();
5845 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
5846 }
5847
5848 /**
5849 * i40e_get_cur_guaranteed_fd_count - Get the consumed guaranteed FD filters
5850 * @pf: board private structure
5851 **/
5852 u32 i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf)
5853 {
5854 u32 val, fcnt_prog;
5855
5856 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
5857 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK);
5858 return fcnt_prog;
5859 }
5860
5861 /**
5862 * i40e_get_current_fd_count - Get total FD filters programmed for this PF
5863 * @pf: board private structure
5864 **/
5865 u32 i40e_get_current_fd_count(struct i40e_pf *pf)
5866 {
5867 u32 val, fcnt_prog;
5868
5869 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
5870 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK) +
5871 ((val & I40E_PFQF_FDSTAT_BEST_CNT_MASK) >>
5872 I40E_PFQF_FDSTAT_BEST_CNT_SHIFT);
5873 return fcnt_prog;
5874 }
5875
5876 /**
5877 * i40e_get_global_fd_count - Get total FD filters programmed on device
5878 * @pf: board private structure
5879 **/
5880 u32 i40e_get_global_fd_count(struct i40e_pf *pf)
5881 {
5882 u32 val, fcnt_prog;
5883
5884 val = rd32(&pf->hw, I40E_GLQF_FDCNT_0);
5885 fcnt_prog = (val & I40E_GLQF_FDCNT_0_GUARANT_CNT_MASK) +
5886 ((val & I40E_GLQF_FDCNT_0_BESTCNT_MASK) >>
5887 I40E_GLQF_FDCNT_0_BESTCNT_SHIFT);
5888 return fcnt_prog;
5889 }
5890
5891 /**
5892 * i40e_fdir_check_and_reenable - Function to reenabe FD ATR or SB if disabled
5893 * @pf: board private structure
5894 **/
5895 void i40e_fdir_check_and_reenable(struct i40e_pf *pf)
5896 {
5897 struct i40e_fdir_filter *filter;
5898 u32 fcnt_prog, fcnt_avail;
5899 struct hlist_node *node;
5900
5901 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
5902 return;
5903
5904 /* Check if, FD SB or ATR was auto disabled and if there is enough room
5905 * to re-enable
5906 */
5907 fcnt_prog = i40e_get_global_fd_count(pf);
5908 fcnt_avail = pf->fdir_pf_filter_count;
5909 if ((fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM)) ||
5910 (pf->fd_add_err == 0) ||
5911 (i40e_get_current_atr_cnt(pf) < pf->fd_atr_cnt)) {
5912 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) &&
5913 (pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED)) {
5914 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
5915 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5916 dev_info(&pf->pdev->dev, "FD Sideband/ntuple is being enabled since we have space in the table now\n");
5917 }
5918 }
5919
5920 /* Wait for some more space to be available to turn on ATR. We also
5921 * must check that no existing ntuple rules for TCP are in effect
5922 */
5923 if (fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM * 2)) {
5924 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
5925 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED) &&
5926 (pf->fd_tcp_rule == 0)) {
5927 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5928 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5929 dev_info(&pf->pdev->dev, "ATR is being enabled since we have space in the table and there are no conflicting ntuple rules\n");
5930 }
5931 }
5932
5933 /* if hw had a problem adding a filter, delete it */
5934 if (pf->fd_inv > 0) {
5935 hlist_for_each_entry_safe(filter, node,
5936 &pf->fdir_filter_list, fdir_node) {
5937 if (filter->fd_id == pf->fd_inv) {
5938 hlist_del(&filter->fdir_node);
5939 kfree(filter);
5940 pf->fdir_pf_active_filters--;
5941 }
5942 }
5943 }
5944 }
5945
5946 #define I40E_MIN_FD_FLUSH_INTERVAL 10
5947 #define I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE 30
5948 /**
5949 * i40e_fdir_flush_and_replay - Function to flush all FD filters and replay SB
5950 * @pf: board private structure
5951 **/
5952 static void i40e_fdir_flush_and_replay(struct i40e_pf *pf)
5953 {
5954 unsigned long min_flush_time;
5955 int flush_wait_retry = 50;
5956 bool disable_atr = false;
5957 int fd_room;
5958 int reg;
5959
5960 if (!time_after(jiffies, pf->fd_flush_timestamp +
5961 (I40E_MIN_FD_FLUSH_INTERVAL * HZ)))
5962 return;
5963
5964 /* If the flush is happening too quick and we have mostly SB rules we
5965 * should not re-enable ATR for some time.
5966 */
5967 min_flush_time = pf->fd_flush_timestamp +
5968 (I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE * HZ);
5969 fd_room = pf->fdir_pf_filter_count - pf->fdir_pf_active_filters;
5970
5971 if (!(time_after(jiffies, min_flush_time)) &&
5972 (fd_room < I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR)) {
5973 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5974 dev_info(&pf->pdev->dev, "ATR disabled, not enough FD filter space.\n");
5975 disable_atr = true;
5976 }
5977
5978 pf->fd_flush_timestamp = jiffies;
5979 pf->auto_disable_flags |= I40E_FLAG_FD_ATR_ENABLED;
5980 /* flush all filters */
5981 wr32(&pf->hw, I40E_PFQF_CTL_1,
5982 I40E_PFQF_CTL_1_CLEARFDTABLE_MASK);
5983 i40e_flush(&pf->hw);
5984 pf->fd_flush_cnt++;
5985 pf->fd_add_err = 0;
5986 do {
5987 /* Check FD flush status every 5-6msec */
5988 usleep_range(5000, 6000);
5989 reg = rd32(&pf->hw, I40E_PFQF_CTL_1);
5990 if (!(reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK))
5991 break;
5992 } while (flush_wait_retry--);
5993 if (reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK) {
5994 dev_warn(&pf->pdev->dev, "FD table did not flush, needs more time\n");
5995 } else {
5996 /* replay sideband filters */
5997 i40e_fdir_filter_restore(pf->vsi[pf->lan_vsi]);
5998 if (!disable_atr)
5999 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
6000 clear_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state);
6001 if (I40E_DEBUG_FD & pf->hw.debug_mask)
6002 dev_info(&pf->pdev->dev, "FD Filter table flushed and FD-SB replayed.\n");
6003 }
6004 }
6005
6006 /**
6007 * i40e_get_current_atr_count - Get the count of total FD ATR filters programmed
6008 * @pf: board private structure
6009 **/
6010 u32 i40e_get_current_atr_cnt(struct i40e_pf *pf)
6011 {
6012 return i40e_get_current_fd_count(pf) - pf->fdir_pf_active_filters;
6013 }
6014
6015 /* We can see up to 256 filter programming desc in transit if the filters are
6016 * being applied really fast; before we see the first
6017 * filter miss error on Rx queue 0. Accumulating enough error messages before
6018 * reacting will make sure we don't cause flush too often.
6019 */
6020 #define I40E_MAX_FD_PROGRAM_ERROR 256
6021
6022 /**
6023 * i40e_fdir_reinit_subtask - Worker thread to reinit FDIR filter table
6024 * @pf: board private structure
6025 **/
6026 static void i40e_fdir_reinit_subtask(struct i40e_pf *pf)
6027 {
6028
6029 /* if interface is down do nothing */
6030 if (test_bit(__I40E_DOWN, &pf->state))
6031 return;
6032
6033 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
6034 i40e_fdir_flush_and_replay(pf);
6035
6036 i40e_fdir_check_and_reenable(pf);
6037
6038 }
6039
6040 /**
6041 * i40e_vsi_link_event - notify VSI of a link event
6042 * @vsi: vsi to be notified
6043 * @link_up: link up or down
6044 **/
6045 static void i40e_vsi_link_event(struct i40e_vsi *vsi, bool link_up)
6046 {
6047 if (!vsi || test_bit(__I40E_DOWN, &vsi->state))
6048 return;
6049
6050 switch (vsi->type) {
6051 case I40E_VSI_MAIN:
6052 #ifdef I40E_FCOE
6053 case I40E_VSI_FCOE:
6054 #endif
6055 if (!vsi->netdev || !vsi->netdev_registered)
6056 break;
6057
6058 if (link_up) {
6059 netif_carrier_on(vsi->netdev);
6060 netif_tx_wake_all_queues(vsi->netdev);
6061 } else {
6062 netif_carrier_off(vsi->netdev);
6063 netif_tx_stop_all_queues(vsi->netdev);
6064 }
6065 break;
6066
6067 case I40E_VSI_SRIOV:
6068 case I40E_VSI_VMDQ2:
6069 case I40E_VSI_CTRL:
6070 case I40E_VSI_IWARP:
6071 case I40E_VSI_MIRROR:
6072 default:
6073 /* there is no notification for other VSIs */
6074 break;
6075 }
6076 }
6077
6078 /**
6079 * i40e_veb_link_event - notify elements on the veb of a link event
6080 * @veb: veb to be notified
6081 * @link_up: link up or down
6082 **/
6083 static void i40e_veb_link_event(struct i40e_veb *veb, bool link_up)
6084 {
6085 struct i40e_pf *pf;
6086 int i;
6087
6088 if (!veb || !veb->pf)
6089 return;
6090 pf = veb->pf;
6091
6092 /* depth first... */
6093 for (i = 0; i < I40E_MAX_VEB; i++)
6094 if (pf->veb[i] && (pf->veb[i]->uplink_seid == veb->seid))
6095 i40e_veb_link_event(pf->veb[i], link_up);
6096
6097 /* ... now the local VSIs */
6098 for (i = 0; i < pf->num_alloc_vsi; i++)
6099 if (pf->vsi[i] && (pf->vsi[i]->uplink_seid == veb->seid))
6100 i40e_vsi_link_event(pf->vsi[i], link_up);
6101 }
6102
6103 /**
6104 * i40e_link_event - Update netif_carrier status
6105 * @pf: board private structure
6106 **/
6107 static void i40e_link_event(struct i40e_pf *pf)
6108 {
6109 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6110 u8 new_link_speed, old_link_speed;
6111 i40e_status status;
6112 bool new_link, old_link;
6113
6114 /* save off old link status information */
6115 pf->hw.phy.link_info_old = pf->hw.phy.link_info;
6116
6117 /* set this to force the get_link_status call to refresh state */
6118 pf->hw.phy.get_link_info = true;
6119
6120 old_link = (pf->hw.phy.link_info_old.link_info & I40E_AQ_LINK_UP);
6121
6122 status = i40e_get_link_status(&pf->hw, &new_link);
6123 if (status) {
6124 dev_dbg(&pf->pdev->dev, "couldn't get link state, status: %d\n",
6125 status);
6126 return;
6127 }
6128
6129 old_link_speed = pf->hw.phy.link_info_old.link_speed;
6130 new_link_speed = pf->hw.phy.link_info.link_speed;
6131
6132 if (new_link == old_link &&
6133 new_link_speed == old_link_speed &&
6134 (test_bit(__I40E_DOWN, &vsi->state) ||
6135 new_link == netif_carrier_ok(vsi->netdev)))
6136 return;
6137
6138 if (!test_bit(__I40E_DOWN, &vsi->state))
6139 i40e_print_link_message(vsi, new_link);
6140
6141 /* Notify the base of the switch tree connected to
6142 * the link. Floating VEBs are not notified.
6143 */
6144 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
6145 i40e_veb_link_event(pf->veb[pf->lan_veb], new_link);
6146 else
6147 i40e_vsi_link_event(vsi, new_link);
6148
6149 if (pf->vf)
6150 i40e_vc_notify_link_state(pf);
6151
6152 if (pf->flags & I40E_FLAG_PTP)
6153 i40e_ptp_set_increment(pf);
6154 }
6155
6156 /**
6157 * i40e_watchdog_subtask - periodic checks not using event driven response
6158 * @pf: board private structure
6159 **/
6160 static void i40e_watchdog_subtask(struct i40e_pf *pf)
6161 {
6162 int i;
6163
6164 /* if interface is down do nothing */
6165 if (test_bit(__I40E_DOWN, &pf->state) ||
6166 test_bit(__I40E_CONFIG_BUSY, &pf->state))
6167 return;
6168
6169 /* make sure we don't do these things too often */
6170 if (time_before(jiffies, (pf->service_timer_previous +
6171 pf->service_timer_period)))
6172 return;
6173 pf->service_timer_previous = jiffies;
6174
6175 if (pf->flags & I40E_FLAG_LINK_POLLING_ENABLED)
6176 i40e_link_event(pf);
6177
6178 /* Update the stats for active netdevs so the network stack
6179 * can look at updated numbers whenever it cares to
6180 */
6181 for (i = 0; i < pf->num_alloc_vsi; i++)
6182 if (pf->vsi[i] && pf->vsi[i]->netdev)
6183 i40e_update_stats(pf->vsi[i]);
6184
6185 if (pf->flags & I40E_FLAG_VEB_STATS_ENABLED) {
6186 /* Update the stats for the active switching components */
6187 for (i = 0; i < I40E_MAX_VEB; i++)
6188 if (pf->veb[i])
6189 i40e_update_veb_stats(pf->veb[i]);
6190 }
6191
6192 i40e_ptp_rx_hang(pf->vsi[pf->lan_vsi]);
6193 }
6194
6195 /**
6196 * i40e_reset_subtask - Set up for resetting the device and driver
6197 * @pf: board private structure
6198 **/
6199 static void i40e_reset_subtask(struct i40e_pf *pf)
6200 {
6201 u32 reset_flags = 0;
6202
6203 rtnl_lock();
6204 if (test_bit(__I40E_REINIT_REQUESTED, &pf->state)) {
6205 reset_flags |= BIT(__I40E_REINIT_REQUESTED);
6206 clear_bit(__I40E_REINIT_REQUESTED, &pf->state);
6207 }
6208 if (test_bit(__I40E_PF_RESET_REQUESTED, &pf->state)) {
6209 reset_flags |= BIT(__I40E_PF_RESET_REQUESTED);
6210 clear_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
6211 }
6212 if (test_bit(__I40E_CORE_RESET_REQUESTED, &pf->state)) {
6213 reset_flags |= BIT(__I40E_CORE_RESET_REQUESTED);
6214 clear_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
6215 }
6216 if (test_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state)) {
6217 reset_flags |= BIT(__I40E_GLOBAL_RESET_REQUESTED);
6218 clear_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
6219 }
6220 if (test_bit(__I40E_DOWN_REQUESTED, &pf->state)) {
6221 reset_flags |= BIT(__I40E_DOWN_REQUESTED);
6222 clear_bit(__I40E_DOWN_REQUESTED, &pf->state);
6223 }
6224
6225 /* If there's a recovery already waiting, it takes
6226 * precedence before starting a new reset sequence.
6227 */
6228 if (test_bit(__I40E_RESET_INTR_RECEIVED, &pf->state)) {
6229 i40e_handle_reset_warning(pf);
6230 goto unlock;
6231 }
6232
6233 /* If we're already down or resetting, just bail */
6234 if (reset_flags &&
6235 !test_bit(__I40E_DOWN, &pf->state) &&
6236 !test_bit(__I40E_CONFIG_BUSY, &pf->state))
6237 i40e_do_reset(pf, reset_flags);
6238
6239 unlock:
6240 rtnl_unlock();
6241 }
6242
6243 /**
6244 * i40e_handle_link_event - Handle link event
6245 * @pf: board private structure
6246 * @e: event info posted on ARQ
6247 **/
6248 static void i40e_handle_link_event(struct i40e_pf *pf,
6249 struct i40e_arq_event_info *e)
6250 {
6251 struct i40e_aqc_get_link_status *status =
6252 (struct i40e_aqc_get_link_status *)&e->desc.params.raw;
6253
6254 /* Do a new status request to re-enable LSE reporting
6255 * and load new status information into the hw struct
6256 * This completely ignores any state information
6257 * in the ARQ event info, instead choosing to always
6258 * issue the AQ update link status command.
6259 */
6260 i40e_link_event(pf);
6261
6262 /* check for unqualified module, if link is down */
6263 if ((status->link_info & I40E_AQ_MEDIA_AVAILABLE) &&
6264 (!(status->an_info & I40E_AQ_QUALIFIED_MODULE)) &&
6265 (!(status->link_info & I40E_AQ_LINK_UP)))
6266 dev_err(&pf->pdev->dev,
6267 "The driver failed to link because an unqualified module was detected.\n");
6268 }
6269
6270 /**
6271 * i40e_clean_adminq_subtask - Clean the AdminQ rings
6272 * @pf: board private structure
6273 **/
6274 static void i40e_clean_adminq_subtask(struct i40e_pf *pf)
6275 {
6276 struct i40e_arq_event_info event;
6277 struct i40e_hw *hw = &pf->hw;
6278 u16 pending, i = 0;
6279 i40e_status ret;
6280 u16 opcode;
6281 u32 oldval;
6282 u32 val;
6283
6284 /* Do not run clean AQ when PF reset fails */
6285 if (test_bit(__I40E_RESET_FAILED, &pf->state))
6286 return;
6287
6288 /* check for error indications */
6289 val = rd32(&pf->hw, pf->hw.aq.arq.len);
6290 oldval = val;
6291 if (val & I40E_PF_ARQLEN_ARQVFE_MASK) {
6292 if (hw->debug_mask & I40E_DEBUG_AQ)
6293 dev_info(&pf->pdev->dev, "ARQ VF Error detected\n");
6294 val &= ~I40E_PF_ARQLEN_ARQVFE_MASK;
6295 }
6296 if (val & I40E_PF_ARQLEN_ARQOVFL_MASK) {
6297 if (hw->debug_mask & I40E_DEBUG_AQ)
6298 dev_info(&pf->pdev->dev, "ARQ Overflow Error detected\n");
6299 val &= ~I40E_PF_ARQLEN_ARQOVFL_MASK;
6300 pf->arq_overflows++;
6301 }
6302 if (val & I40E_PF_ARQLEN_ARQCRIT_MASK) {
6303 if (hw->debug_mask & I40E_DEBUG_AQ)
6304 dev_info(&pf->pdev->dev, "ARQ Critical Error detected\n");
6305 val &= ~I40E_PF_ARQLEN_ARQCRIT_MASK;
6306 }
6307 if (oldval != val)
6308 wr32(&pf->hw, pf->hw.aq.arq.len, val);
6309
6310 val = rd32(&pf->hw, pf->hw.aq.asq.len);
6311 oldval = val;
6312 if (val & I40E_PF_ATQLEN_ATQVFE_MASK) {
6313 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
6314 dev_info(&pf->pdev->dev, "ASQ VF Error detected\n");
6315 val &= ~I40E_PF_ATQLEN_ATQVFE_MASK;
6316 }
6317 if (val & I40E_PF_ATQLEN_ATQOVFL_MASK) {
6318 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
6319 dev_info(&pf->pdev->dev, "ASQ Overflow Error detected\n");
6320 val &= ~I40E_PF_ATQLEN_ATQOVFL_MASK;
6321 }
6322 if (val & I40E_PF_ATQLEN_ATQCRIT_MASK) {
6323 if (pf->hw.debug_mask & I40E_DEBUG_AQ)
6324 dev_info(&pf->pdev->dev, "ASQ Critical Error detected\n");
6325 val &= ~I40E_PF_ATQLEN_ATQCRIT_MASK;
6326 }
6327 if (oldval != val)
6328 wr32(&pf->hw, pf->hw.aq.asq.len, val);
6329
6330 event.buf_len = I40E_MAX_AQ_BUF_SIZE;
6331 event.msg_buf = kzalloc(event.buf_len, GFP_KERNEL);
6332 if (!event.msg_buf)
6333 return;
6334
6335 do {
6336 ret = i40e_clean_arq_element(hw, &event, &pending);
6337 if (ret == I40E_ERR_ADMIN_QUEUE_NO_WORK)
6338 break;
6339 else if (ret) {
6340 dev_info(&pf->pdev->dev, "ARQ event error %d\n", ret);
6341 break;
6342 }
6343
6344 opcode = le16_to_cpu(event.desc.opcode);
6345 switch (opcode) {
6346
6347 case i40e_aqc_opc_get_link_status:
6348 i40e_handle_link_event(pf, &event);
6349 break;
6350 case i40e_aqc_opc_send_msg_to_pf:
6351 ret = i40e_vc_process_vf_msg(pf,
6352 le16_to_cpu(event.desc.retval),
6353 le32_to_cpu(event.desc.cookie_high),
6354 le32_to_cpu(event.desc.cookie_low),
6355 event.msg_buf,
6356 event.msg_len);
6357 break;
6358 case i40e_aqc_opc_lldp_update_mib:
6359 dev_dbg(&pf->pdev->dev, "ARQ: Update LLDP MIB event received\n");
6360 #ifdef CONFIG_I40E_DCB
6361 rtnl_lock();
6362 ret = i40e_handle_lldp_event(pf, &event);
6363 rtnl_unlock();
6364 #endif /* CONFIG_I40E_DCB */
6365 break;
6366 case i40e_aqc_opc_event_lan_overflow:
6367 dev_dbg(&pf->pdev->dev, "ARQ LAN queue overflow event received\n");
6368 i40e_handle_lan_overflow_event(pf, &event);
6369 break;
6370 case i40e_aqc_opc_send_msg_to_peer:
6371 dev_info(&pf->pdev->dev, "ARQ: Msg from other pf\n");
6372 break;
6373 case i40e_aqc_opc_nvm_erase:
6374 case i40e_aqc_opc_nvm_update:
6375 case i40e_aqc_opc_oem_post_update:
6376 i40e_debug(&pf->hw, I40E_DEBUG_NVM,
6377 "ARQ NVM operation 0x%04x completed\n",
6378 opcode);
6379 break;
6380 default:
6381 dev_info(&pf->pdev->dev,
6382 "ARQ: Unknown event 0x%04x ignored\n",
6383 opcode);
6384 break;
6385 }
6386 } while (pending && (i++ < pf->adminq_work_limit));
6387
6388 clear_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
6389 /* re-enable Admin queue interrupt cause */
6390 val = rd32(hw, I40E_PFINT_ICR0_ENA);
6391 val |= I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
6392 wr32(hw, I40E_PFINT_ICR0_ENA, val);
6393 i40e_flush(hw);
6394
6395 kfree(event.msg_buf);
6396 }
6397
6398 /**
6399 * i40e_verify_eeprom - make sure eeprom is good to use
6400 * @pf: board private structure
6401 **/
6402 static void i40e_verify_eeprom(struct i40e_pf *pf)
6403 {
6404 int err;
6405
6406 err = i40e_diag_eeprom_test(&pf->hw);
6407 if (err) {
6408 /* retry in case of garbage read */
6409 err = i40e_diag_eeprom_test(&pf->hw);
6410 if (err) {
6411 dev_info(&pf->pdev->dev, "eeprom check failed (%d), Tx/Rx traffic disabled\n",
6412 err);
6413 set_bit(__I40E_BAD_EEPROM, &pf->state);
6414 }
6415 }
6416
6417 if (!err && test_bit(__I40E_BAD_EEPROM, &pf->state)) {
6418 dev_info(&pf->pdev->dev, "eeprom check passed, Tx/Rx traffic enabled\n");
6419 clear_bit(__I40E_BAD_EEPROM, &pf->state);
6420 }
6421 }
6422
6423 /**
6424 * i40e_enable_pf_switch_lb
6425 * @pf: pointer to the PF structure
6426 *
6427 * enable switch loop back or die - no point in a return value
6428 **/
6429 static void i40e_enable_pf_switch_lb(struct i40e_pf *pf)
6430 {
6431 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6432 struct i40e_vsi_context ctxt;
6433 int ret;
6434
6435 ctxt.seid = pf->main_vsi_seid;
6436 ctxt.pf_num = pf->hw.pf_id;
6437 ctxt.vf_num = 0;
6438 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
6439 if (ret) {
6440 dev_info(&pf->pdev->dev,
6441 "couldn't get PF vsi config, err %s aq_err %s\n",
6442 i40e_stat_str(&pf->hw, ret),
6443 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6444 return;
6445 }
6446 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6447 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6448 ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6449
6450 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
6451 if (ret) {
6452 dev_info(&pf->pdev->dev,
6453 "update vsi switch failed, err %s aq_err %s\n",
6454 i40e_stat_str(&pf->hw, ret),
6455 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6456 }
6457 }
6458
6459 /**
6460 * i40e_disable_pf_switch_lb
6461 * @pf: pointer to the PF structure
6462 *
6463 * disable switch loop back or die - no point in a return value
6464 **/
6465 static void i40e_disable_pf_switch_lb(struct i40e_pf *pf)
6466 {
6467 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6468 struct i40e_vsi_context ctxt;
6469 int ret;
6470
6471 ctxt.seid = pf->main_vsi_seid;
6472 ctxt.pf_num = pf->hw.pf_id;
6473 ctxt.vf_num = 0;
6474 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
6475 if (ret) {
6476 dev_info(&pf->pdev->dev,
6477 "couldn't get PF vsi config, err %s aq_err %s\n",
6478 i40e_stat_str(&pf->hw, ret),
6479 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6480 return;
6481 }
6482 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6483 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6484 ctxt.info.switch_id &= ~cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6485
6486 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
6487 if (ret) {
6488 dev_info(&pf->pdev->dev,
6489 "update vsi switch failed, err %s aq_err %s\n",
6490 i40e_stat_str(&pf->hw, ret),
6491 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6492 }
6493 }
6494
6495 /**
6496 * i40e_config_bridge_mode - Configure the HW bridge mode
6497 * @veb: pointer to the bridge instance
6498 *
6499 * Configure the loop back mode for the LAN VSI that is downlink to the
6500 * specified HW bridge instance. It is expected this function is called
6501 * when a new HW bridge is instantiated.
6502 **/
6503 static void i40e_config_bridge_mode(struct i40e_veb *veb)
6504 {
6505 struct i40e_pf *pf = veb->pf;
6506
6507 if (pf->hw.debug_mask & I40E_DEBUG_LAN)
6508 dev_info(&pf->pdev->dev, "enabling bridge mode: %s\n",
6509 veb->bridge_mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
6510 if (veb->bridge_mode & BRIDGE_MODE_VEPA)
6511 i40e_disable_pf_switch_lb(pf);
6512 else
6513 i40e_enable_pf_switch_lb(pf);
6514 }
6515
6516 /**
6517 * i40e_reconstitute_veb - rebuild the VEB and anything connected to it
6518 * @veb: pointer to the VEB instance
6519 *
6520 * This is a recursive function that first builds the attached VSIs then
6521 * recurses in to build the next layer of VEB. We track the connections
6522 * through our own index numbers because the seid's from the HW could
6523 * change across the reset.
6524 **/
6525 static int i40e_reconstitute_veb(struct i40e_veb *veb)
6526 {
6527 struct i40e_vsi *ctl_vsi = NULL;
6528 struct i40e_pf *pf = veb->pf;
6529 int v, veb_idx;
6530 int ret;
6531
6532 /* build VSI that owns this VEB, temporarily attached to base VEB */
6533 for (v = 0; v < pf->num_alloc_vsi && !ctl_vsi; v++) {
6534 if (pf->vsi[v] &&
6535 pf->vsi[v]->veb_idx == veb->idx &&
6536 pf->vsi[v]->flags & I40E_VSI_FLAG_VEB_OWNER) {
6537 ctl_vsi = pf->vsi[v];
6538 break;
6539 }
6540 }
6541 if (!ctl_vsi) {
6542 dev_info(&pf->pdev->dev,
6543 "missing owner VSI for veb_idx %d\n", veb->idx);
6544 ret = -ENOENT;
6545 goto end_reconstitute;
6546 }
6547 if (ctl_vsi != pf->vsi[pf->lan_vsi])
6548 ctl_vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
6549 ret = i40e_add_vsi(ctl_vsi);
6550 if (ret) {
6551 dev_info(&pf->pdev->dev,
6552 "rebuild of veb_idx %d owner VSI failed: %d\n",
6553 veb->idx, ret);
6554 goto end_reconstitute;
6555 }
6556 i40e_vsi_reset_stats(ctl_vsi);
6557
6558 /* create the VEB in the switch and move the VSI onto the VEB */
6559 ret = i40e_add_veb(veb, ctl_vsi);
6560 if (ret)
6561 goto end_reconstitute;
6562
6563 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
6564 veb->bridge_mode = BRIDGE_MODE_VEB;
6565 else
6566 veb->bridge_mode = BRIDGE_MODE_VEPA;
6567 i40e_config_bridge_mode(veb);
6568
6569 /* create the remaining VSIs attached to this VEB */
6570 for (v = 0; v < pf->num_alloc_vsi; v++) {
6571 if (!pf->vsi[v] || pf->vsi[v] == ctl_vsi)
6572 continue;
6573
6574 if (pf->vsi[v]->veb_idx == veb->idx) {
6575 struct i40e_vsi *vsi = pf->vsi[v];
6576
6577 vsi->uplink_seid = veb->seid;
6578 ret = i40e_add_vsi(vsi);
6579 if (ret) {
6580 dev_info(&pf->pdev->dev,
6581 "rebuild of vsi_idx %d failed: %d\n",
6582 v, ret);
6583 goto end_reconstitute;
6584 }
6585 i40e_vsi_reset_stats(vsi);
6586 }
6587 }
6588
6589 /* create any VEBs attached to this VEB - RECURSION */
6590 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
6591 if (pf->veb[veb_idx] && pf->veb[veb_idx]->veb_idx == veb->idx) {
6592 pf->veb[veb_idx]->uplink_seid = veb->seid;
6593 ret = i40e_reconstitute_veb(pf->veb[veb_idx]);
6594 if (ret)
6595 break;
6596 }
6597 }
6598
6599 end_reconstitute:
6600 return ret;
6601 }
6602
6603 /**
6604 * i40e_get_capabilities - get info about the HW
6605 * @pf: the PF struct
6606 **/
6607 static int i40e_get_capabilities(struct i40e_pf *pf)
6608 {
6609 struct i40e_aqc_list_capabilities_element_resp *cap_buf;
6610 u16 data_size;
6611 int buf_len;
6612 int err;
6613
6614 buf_len = 40 * sizeof(struct i40e_aqc_list_capabilities_element_resp);
6615 do {
6616 cap_buf = kzalloc(buf_len, GFP_KERNEL);
6617 if (!cap_buf)
6618 return -ENOMEM;
6619
6620 /* this loads the data into the hw struct for us */
6621 err = i40e_aq_discover_capabilities(&pf->hw, cap_buf, buf_len,
6622 &data_size,
6623 i40e_aqc_opc_list_func_capabilities,
6624 NULL);
6625 /* data loaded, buffer no longer needed */
6626 kfree(cap_buf);
6627
6628 if (pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) {
6629 /* retry with a larger buffer */
6630 buf_len = data_size;
6631 } else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK) {
6632 dev_info(&pf->pdev->dev,
6633 "capability discovery failed, err %s aq_err %s\n",
6634 i40e_stat_str(&pf->hw, err),
6635 i40e_aq_str(&pf->hw,
6636 pf->hw.aq.asq_last_status));
6637 return -ENODEV;
6638 }
6639 } while (err);
6640
6641 if (pf->hw.debug_mask & I40E_DEBUG_USER)
6642 dev_info(&pf->pdev->dev,
6643 "pf=%d, num_vfs=%d, msix_pf=%d, msix_vf=%d, fd_g=%d, fd_b=%d, pf_max_q=%d num_vsi=%d\n",
6644 pf->hw.pf_id, pf->hw.func_caps.num_vfs,
6645 pf->hw.func_caps.num_msix_vectors,
6646 pf->hw.func_caps.num_msix_vectors_vf,
6647 pf->hw.func_caps.fd_filters_guaranteed,
6648 pf->hw.func_caps.fd_filters_best_effort,
6649 pf->hw.func_caps.num_tx_qp,
6650 pf->hw.func_caps.num_vsis);
6651
6652 #define DEF_NUM_VSI (1 + (pf->hw.func_caps.fcoe ? 1 : 0) \
6653 + pf->hw.func_caps.num_vfs)
6654 if (pf->hw.revision_id == 0 && (DEF_NUM_VSI > pf->hw.func_caps.num_vsis)) {
6655 dev_info(&pf->pdev->dev,
6656 "got num_vsis %d, setting num_vsis to %d\n",
6657 pf->hw.func_caps.num_vsis, DEF_NUM_VSI);
6658 pf->hw.func_caps.num_vsis = DEF_NUM_VSI;
6659 }
6660
6661 return 0;
6662 }
6663
6664 static int i40e_vsi_clear(struct i40e_vsi *vsi);
6665
6666 /**
6667 * i40e_fdir_sb_setup - initialize the Flow Director resources for Sideband
6668 * @pf: board private structure
6669 **/
6670 static void i40e_fdir_sb_setup(struct i40e_pf *pf)
6671 {
6672 struct i40e_vsi *vsi;
6673 int i;
6674
6675 /* quick workaround for an NVM issue that leaves a critical register
6676 * uninitialized
6677 */
6678 if (!rd32(&pf->hw, I40E_GLQF_HKEY(0))) {
6679 static const u32 hkey[] = {
6680 0xe640d33f, 0xcdfe98ab, 0x73fa7161, 0x0d7a7d36,
6681 0xeacb7d61, 0xaa4f05b6, 0x9c5c89ed, 0xfc425ddb,
6682 0xa4654832, 0xfc7461d4, 0x8f827619, 0xf5c63c21,
6683 0x95b3a76d};
6684
6685 for (i = 0; i <= I40E_GLQF_HKEY_MAX_INDEX; i++)
6686 wr32(&pf->hw, I40E_GLQF_HKEY(i), hkey[i]);
6687 }
6688
6689 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
6690 return;
6691
6692 /* find existing VSI and see if it needs configuring */
6693 vsi = NULL;
6694 for (i = 0; i < pf->num_alloc_vsi; i++) {
6695 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
6696 vsi = pf->vsi[i];
6697 break;
6698 }
6699 }
6700
6701 /* create a new VSI if none exists */
6702 if (!vsi) {
6703 vsi = i40e_vsi_setup(pf, I40E_VSI_FDIR,
6704 pf->vsi[pf->lan_vsi]->seid, 0);
6705 if (!vsi) {
6706 dev_info(&pf->pdev->dev, "Couldn't create FDir VSI\n");
6707 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
6708 return;
6709 }
6710 }
6711
6712 i40e_vsi_setup_irqhandler(vsi, i40e_fdir_clean_ring);
6713 }
6714
6715 /**
6716 * i40e_fdir_teardown - release the Flow Director resources
6717 * @pf: board private structure
6718 **/
6719 static void i40e_fdir_teardown(struct i40e_pf *pf)
6720 {
6721 int i;
6722
6723 i40e_fdir_filter_exit(pf);
6724 for (i = 0; i < pf->num_alloc_vsi; i++) {
6725 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
6726 i40e_vsi_release(pf->vsi[i]);
6727 break;
6728 }
6729 }
6730 }
6731
6732 /**
6733 * i40e_prep_for_reset - prep for the core to reset
6734 * @pf: board private structure
6735 *
6736 * Close up the VFs and other things in prep for PF Reset.
6737 **/
6738 static void i40e_prep_for_reset(struct i40e_pf *pf)
6739 {
6740 struct i40e_hw *hw = &pf->hw;
6741 i40e_status ret = 0;
6742 u32 v;
6743
6744 clear_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
6745 if (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
6746 return;
6747 if (i40e_check_asq_alive(&pf->hw))
6748 i40e_vc_notify_reset(pf);
6749
6750 dev_dbg(&pf->pdev->dev, "Tearing down internal switch for reset\n");
6751
6752 /* quiesce the VSIs and their queues that are not already DOWN */
6753 i40e_pf_quiesce_all_vsi(pf);
6754
6755 for (v = 0; v < pf->num_alloc_vsi; v++) {
6756 if (pf->vsi[v])
6757 pf->vsi[v]->seid = 0;
6758 }
6759
6760 i40e_shutdown_adminq(&pf->hw);
6761
6762 /* call shutdown HMC */
6763 if (hw->hmc.hmc_obj) {
6764 ret = i40e_shutdown_lan_hmc(hw);
6765 if (ret)
6766 dev_warn(&pf->pdev->dev,
6767 "shutdown_lan_hmc failed: %d\n", ret);
6768 }
6769 }
6770
6771 /**
6772 * i40e_send_version - update firmware with driver version
6773 * @pf: PF struct
6774 */
6775 static void i40e_send_version(struct i40e_pf *pf)
6776 {
6777 struct i40e_driver_version dv;
6778
6779 dv.major_version = DRV_VERSION_MAJOR;
6780 dv.minor_version = DRV_VERSION_MINOR;
6781 dv.build_version = DRV_VERSION_BUILD;
6782 dv.subbuild_version = 0;
6783 strlcpy(dv.driver_string, DRV_VERSION, sizeof(dv.driver_string));
6784 i40e_aq_send_driver_version(&pf->hw, &dv, NULL);
6785 }
6786
6787 /**
6788 * i40e_reset_and_rebuild - reset and rebuild using a saved config
6789 * @pf: board private structure
6790 * @reinit: if the Main VSI needs to re-initialized.
6791 **/
6792 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit)
6793 {
6794 struct i40e_hw *hw = &pf->hw;
6795 u8 set_fc_aq_fail = 0;
6796 i40e_status ret;
6797 u32 val;
6798 u32 v;
6799
6800 /* Now we wait for GRST to settle out.
6801 * We don't have to delete the VEBs or VSIs from the hw switch
6802 * because the reset will make them disappear.
6803 */
6804 ret = i40e_pf_reset(hw);
6805 if (ret) {
6806 dev_info(&pf->pdev->dev, "PF reset failed, %d\n", ret);
6807 set_bit(__I40E_RESET_FAILED, &pf->state);
6808 goto clear_recovery;
6809 }
6810 pf->pfr_count++;
6811
6812 if (test_bit(__I40E_DOWN, &pf->state))
6813 goto clear_recovery;
6814 dev_dbg(&pf->pdev->dev, "Rebuilding internal switch\n");
6815
6816 /* rebuild the basics for the AdminQ, HMC, and initial HW switch */
6817 ret = i40e_init_adminq(&pf->hw);
6818 if (ret) {
6819 dev_info(&pf->pdev->dev, "Rebuild AdminQ failed, err %s aq_err %s\n",
6820 i40e_stat_str(&pf->hw, ret),
6821 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6822 goto clear_recovery;
6823 }
6824
6825 /* re-verify the eeprom if we just had an EMP reset */
6826 if (test_and_clear_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state))
6827 i40e_verify_eeprom(pf);
6828
6829 i40e_clear_pxe_mode(hw);
6830 ret = i40e_get_capabilities(pf);
6831 if (ret)
6832 goto end_core_reset;
6833
6834 ret = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
6835 hw->func_caps.num_rx_qp,
6836 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
6837 if (ret) {
6838 dev_info(&pf->pdev->dev, "init_lan_hmc failed: %d\n", ret);
6839 goto end_core_reset;
6840 }
6841 ret = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
6842 if (ret) {
6843 dev_info(&pf->pdev->dev, "configure_lan_hmc failed: %d\n", ret);
6844 goto end_core_reset;
6845 }
6846
6847 #ifdef CONFIG_I40E_DCB
6848 ret = i40e_init_pf_dcb(pf);
6849 if (ret) {
6850 dev_info(&pf->pdev->dev, "DCB init failed %d, disabled\n", ret);
6851 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
6852 /* Continue without DCB enabled */
6853 }
6854 #endif /* CONFIG_I40E_DCB */
6855 #ifdef I40E_FCOE
6856 i40e_init_pf_fcoe(pf);
6857
6858 #endif
6859 /* do basic switch setup */
6860 ret = i40e_setup_pf_switch(pf, reinit);
6861 if (ret)
6862 goto end_core_reset;
6863
6864 /* The driver only wants link up/down and module qualification
6865 * reports from firmware. Note the negative logic.
6866 */
6867 ret = i40e_aq_set_phy_int_mask(&pf->hw,
6868 ~(I40E_AQ_EVENT_LINK_UPDOWN |
6869 I40E_AQ_EVENT_MEDIA_NA |
6870 I40E_AQ_EVENT_MODULE_QUAL_FAIL), NULL);
6871 if (ret)
6872 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
6873 i40e_stat_str(&pf->hw, ret),
6874 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6875
6876 /* make sure our flow control settings are restored */
6877 ret = i40e_set_fc(&pf->hw, &set_fc_aq_fail, true);
6878 if (ret)
6879 dev_dbg(&pf->pdev->dev, "setting flow control: ret = %s last_status = %s\n",
6880 i40e_stat_str(&pf->hw, ret),
6881 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
6882
6883 /* Rebuild the VSIs and VEBs that existed before reset.
6884 * They are still in our local switch element arrays, so only
6885 * need to rebuild the switch model in the HW.
6886 *
6887 * If there were VEBs but the reconstitution failed, we'll try
6888 * try to recover minimal use by getting the basic PF VSI working.
6889 */
6890 if (pf->vsi[pf->lan_vsi]->uplink_seid != pf->mac_seid) {
6891 dev_dbg(&pf->pdev->dev, "attempting to rebuild switch\n");
6892 /* find the one VEB connected to the MAC, and find orphans */
6893 for (v = 0; v < I40E_MAX_VEB; v++) {
6894 if (!pf->veb[v])
6895 continue;
6896
6897 if (pf->veb[v]->uplink_seid == pf->mac_seid ||
6898 pf->veb[v]->uplink_seid == 0) {
6899 ret = i40e_reconstitute_veb(pf->veb[v]);
6900
6901 if (!ret)
6902 continue;
6903
6904 /* If Main VEB failed, we're in deep doodoo,
6905 * so give up rebuilding the switch and set up
6906 * for minimal rebuild of PF VSI.
6907 * If orphan failed, we'll report the error
6908 * but try to keep going.
6909 */
6910 if (pf->veb[v]->uplink_seid == pf->mac_seid) {
6911 dev_info(&pf->pdev->dev,
6912 "rebuild of switch failed: %d, will try to set up simple PF connection\n",
6913 ret);
6914 pf->vsi[pf->lan_vsi]->uplink_seid
6915 = pf->mac_seid;
6916 break;
6917 } else if (pf->veb[v]->uplink_seid == 0) {
6918 dev_info(&pf->pdev->dev,
6919 "rebuild of orphan VEB failed: %d\n",
6920 ret);
6921 }
6922 }
6923 }
6924 }
6925
6926 if (pf->vsi[pf->lan_vsi]->uplink_seid == pf->mac_seid) {
6927 dev_dbg(&pf->pdev->dev, "attempting to rebuild PF VSI\n");
6928 /* no VEB, so rebuild only the Main VSI */
6929 ret = i40e_add_vsi(pf->vsi[pf->lan_vsi]);
6930 if (ret) {
6931 dev_info(&pf->pdev->dev,
6932 "rebuild of Main VSI failed: %d\n", ret);
6933 goto end_core_reset;
6934 }
6935 }
6936
6937 /* Reconfigure hardware for allowing smaller MSS in the case
6938 * of TSO, so that we avoid the MDD being fired and causing
6939 * a reset in the case of small MSS+TSO.
6940 */
6941 #define I40E_REG_MSS 0x000E64DC
6942 #define I40E_REG_MSS_MIN_MASK 0x3FF0000
6943 #define I40E_64BYTE_MSS 0x400000
6944 val = rd32(hw, I40E_REG_MSS);
6945 if ((val & I40E_REG_MSS_MIN_MASK) > I40E_64BYTE_MSS) {
6946 val &= ~I40E_REG_MSS_MIN_MASK;
6947 val |= I40E_64BYTE_MSS;
6948 wr32(hw, I40E_REG_MSS, val);
6949 }
6950
6951 if (pf->flags & I40E_FLAG_RESTART_AUTONEG) {
6952 msleep(75);
6953 ret = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
6954 if (ret)
6955 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
6956 i40e_stat_str(&pf->hw, ret),
6957 i40e_aq_str(&pf->hw,
6958 pf->hw.aq.asq_last_status));
6959 }
6960 /* reinit the misc interrupt */
6961 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
6962 ret = i40e_setup_misc_vector(pf);
6963
6964 /* Add a filter to drop all Flow control frames from any VSI from being
6965 * transmitted. By doing so we stop a malicious VF from sending out
6966 * PAUSE or PFC frames and potentially controlling traffic for other
6967 * PF/VF VSIs.
6968 * The FW can still send Flow control frames if enabled.
6969 */
6970 i40e_add_filter_to_drop_tx_flow_control_frames(&pf->hw,
6971 pf->main_vsi_seid);
6972
6973 /* restart the VSIs that were rebuilt and running before the reset */
6974 i40e_pf_unquiesce_all_vsi(pf);
6975
6976 if (pf->num_alloc_vfs) {
6977 for (v = 0; v < pf->num_alloc_vfs; v++)
6978 i40e_reset_vf(&pf->vf[v], true);
6979 }
6980
6981 /* tell the firmware that we're starting */
6982 i40e_send_version(pf);
6983
6984 end_core_reset:
6985 clear_bit(__I40E_RESET_FAILED, &pf->state);
6986 clear_recovery:
6987 clear_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state);
6988 }
6989
6990 /**
6991 * i40e_handle_reset_warning - prep for the PF to reset, reset and rebuild
6992 * @pf: board private structure
6993 *
6994 * Close up the VFs and other things in prep for a Core Reset,
6995 * then get ready to rebuild the world.
6996 **/
6997 static void i40e_handle_reset_warning(struct i40e_pf *pf)
6998 {
6999 i40e_prep_for_reset(pf);
7000 i40e_reset_and_rebuild(pf, false);
7001 }
7002
7003 /**
7004 * i40e_handle_mdd_event
7005 * @pf: pointer to the PF structure
7006 *
7007 * Called from the MDD irq handler to identify possibly malicious vfs
7008 **/
7009 static void i40e_handle_mdd_event(struct i40e_pf *pf)
7010 {
7011 struct i40e_hw *hw = &pf->hw;
7012 bool mdd_detected = false;
7013 bool pf_mdd_detected = false;
7014 struct i40e_vf *vf;
7015 u32 reg;
7016 int i;
7017
7018 if (!test_bit(__I40E_MDD_EVENT_PENDING, &pf->state))
7019 return;
7020
7021 /* find what triggered the MDD event */
7022 reg = rd32(hw, I40E_GL_MDET_TX);
7023 if (reg & I40E_GL_MDET_TX_VALID_MASK) {
7024 u8 pf_num = (reg & I40E_GL_MDET_TX_PF_NUM_MASK) >>
7025 I40E_GL_MDET_TX_PF_NUM_SHIFT;
7026 u16 vf_num = (reg & I40E_GL_MDET_TX_VF_NUM_MASK) >>
7027 I40E_GL_MDET_TX_VF_NUM_SHIFT;
7028 u8 event = (reg & I40E_GL_MDET_TX_EVENT_MASK) >>
7029 I40E_GL_MDET_TX_EVENT_SHIFT;
7030 u16 queue = ((reg & I40E_GL_MDET_TX_QUEUE_MASK) >>
7031 I40E_GL_MDET_TX_QUEUE_SHIFT) -
7032 pf->hw.func_caps.base_queue;
7033 if (netif_msg_tx_err(pf))
7034 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on TX queue %d PF number 0x%02x VF number 0x%02x\n",
7035 event, queue, pf_num, vf_num);
7036 wr32(hw, I40E_GL_MDET_TX, 0xffffffff);
7037 mdd_detected = true;
7038 }
7039 reg = rd32(hw, I40E_GL_MDET_RX);
7040 if (reg & I40E_GL_MDET_RX_VALID_MASK) {
7041 u8 func = (reg & I40E_GL_MDET_RX_FUNCTION_MASK) >>
7042 I40E_GL_MDET_RX_FUNCTION_SHIFT;
7043 u8 event = (reg & I40E_GL_MDET_RX_EVENT_MASK) >>
7044 I40E_GL_MDET_RX_EVENT_SHIFT;
7045 u16 queue = ((reg & I40E_GL_MDET_RX_QUEUE_MASK) >>
7046 I40E_GL_MDET_RX_QUEUE_SHIFT) -
7047 pf->hw.func_caps.base_queue;
7048 if (netif_msg_rx_err(pf))
7049 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on RX queue %d of function 0x%02x\n",
7050 event, queue, func);
7051 wr32(hw, I40E_GL_MDET_RX, 0xffffffff);
7052 mdd_detected = true;
7053 }
7054
7055 if (mdd_detected) {
7056 reg = rd32(hw, I40E_PF_MDET_TX);
7057 if (reg & I40E_PF_MDET_TX_VALID_MASK) {
7058 wr32(hw, I40E_PF_MDET_TX, 0xFFFF);
7059 dev_info(&pf->pdev->dev, "TX driver issue detected, PF reset issued\n");
7060 pf_mdd_detected = true;
7061 }
7062 reg = rd32(hw, I40E_PF_MDET_RX);
7063 if (reg & I40E_PF_MDET_RX_VALID_MASK) {
7064 wr32(hw, I40E_PF_MDET_RX, 0xFFFF);
7065 dev_info(&pf->pdev->dev, "RX driver issue detected, PF reset issued\n");
7066 pf_mdd_detected = true;
7067 }
7068 /* Queue belongs to the PF, initiate a reset */
7069 if (pf_mdd_detected) {
7070 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
7071 i40e_service_event_schedule(pf);
7072 }
7073 }
7074
7075 /* see if one of the VFs needs its hand slapped */
7076 for (i = 0; i < pf->num_alloc_vfs && mdd_detected; i++) {
7077 vf = &(pf->vf[i]);
7078 reg = rd32(hw, I40E_VP_MDET_TX(i));
7079 if (reg & I40E_VP_MDET_TX_VALID_MASK) {
7080 wr32(hw, I40E_VP_MDET_TX(i), 0xFFFF);
7081 vf->num_mdd_events++;
7082 dev_info(&pf->pdev->dev, "TX driver issue detected on VF %d\n",
7083 i);
7084 }
7085
7086 reg = rd32(hw, I40E_VP_MDET_RX(i));
7087 if (reg & I40E_VP_MDET_RX_VALID_MASK) {
7088 wr32(hw, I40E_VP_MDET_RX(i), 0xFFFF);
7089 vf->num_mdd_events++;
7090 dev_info(&pf->pdev->dev, "RX driver issue detected on VF %d\n",
7091 i);
7092 }
7093
7094 if (vf->num_mdd_events > I40E_DEFAULT_NUM_MDD_EVENTS_ALLOWED) {
7095 dev_info(&pf->pdev->dev,
7096 "Too many MDD events on VF %d, disabled\n", i);
7097 dev_info(&pf->pdev->dev,
7098 "Use PF Control I/F to re-enable the VF\n");
7099 set_bit(I40E_VF_STAT_DISABLED, &vf->vf_states);
7100 }
7101 }
7102
7103 /* re-enable mdd interrupt cause */
7104 clear_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
7105 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
7106 reg |= I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
7107 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
7108 i40e_flush(hw);
7109 }
7110
7111 /**
7112 * i40e_sync_udp_filters_subtask - Sync the VSI filter list with HW
7113 * @pf: board private structure
7114 **/
7115 static void i40e_sync_udp_filters_subtask(struct i40e_pf *pf)
7116 {
7117 struct i40e_hw *hw = &pf->hw;
7118 i40e_status ret;
7119 __be16 port;
7120 int i;
7121
7122 if (!(pf->flags & I40E_FLAG_UDP_FILTER_SYNC))
7123 return;
7124
7125 pf->flags &= ~I40E_FLAG_UDP_FILTER_SYNC;
7126
7127 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
7128 if (pf->pending_udp_bitmap & BIT_ULL(i)) {
7129 pf->pending_udp_bitmap &= ~BIT_ULL(i);
7130 port = pf->udp_ports[i].index;
7131 if (port)
7132 ret = i40e_aq_add_udp_tunnel(hw, port,
7133 pf->udp_ports[i].type,
7134 NULL, NULL);
7135 else
7136 ret = i40e_aq_del_udp_tunnel(hw, i, NULL);
7137
7138 if (ret) {
7139 dev_dbg(&pf->pdev->dev,
7140 "%s %s port %d, index %d failed, err %s aq_err %s\n",
7141 pf->udp_ports[i].type ? "vxlan" : "geneve",
7142 port ? "add" : "delete",
7143 ntohs(port), i,
7144 i40e_stat_str(&pf->hw, ret),
7145 i40e_aq_str(&pf->hw,
7146 pf->hw.aq.asq_last_status));
7147 pf->udp_ports[i].index = 0;
7148 }
7149 }
7150 }
7151 }
7152
7153 /**
7154 * i40e_service_task - Run the driver's async subtasks
7155 * @work: pointer to work_struct containing our data
7156 **/
7157 static void i40e_service_task(struct work_struct *work)
7158 {
7159 struct i40e_pf *pf = container_of(work,
7160 struct i40e_pf,
7161 service_task);
7162 unsigned long start_time = jiffies;
7163
7164 /* don't bother with service tasks if a reset is in progress */
7165 if (test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
7166 i40e_service_event_complete(pf);
7167 return;
7168 }
7169
7170 i40e_detect_recover_hung(pf);
7171 i40e_sync_filters_subtask(pf);
7172 i40e_reset_subtask(pf);
7173 i40e_handle_mdd_event(pf);
7174 i40e_vc_process_vflr_event(pf);
7175 i40e_watchdog_subtask(pf);
7176 i40e_fdir_reinit_subtask(pf);
7177 i40e_client_subtask(pf);
7178 i40e_sync_filters_subtask(pf);
7179 i40e_sync_udp_filters_subtask(pf);
7180 i40e_clean_adminq_subtask(pf);
7181
7182 i40e_service_event_complete(pf);
7183
7184 /* If the tasks have taken longer than one timer cycle or there
7185 * is more work to be done, reschedule the service task now
7186 * rather than wait for the timer to tick again.
7187 */
7188 if (time_after(jiffies, (start_time + pf->service_timer_period)) ||
7189 test_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state) ||
7190 test_bit(__I40E_MDD_EVENT_PENDING, &pf->state) ||
7191 test_bit(__I40E_VFLR_EVENT_PENDING, &pf->state))
7192 i40e_service_event_schedule(pf);
7193 }
7194
7195 /**
7196 * i40e_service_timer - timer callback
7197 * @data: pointer to PF struct
7198 **/
7199 static void i40e_service_timer(unsigned long data)
7200 {
7201 struct i40e_pf *pf = (struct i40e_pf *)data;
7202
7203 mod_timer(&pf->service_timer,
7204 round_jiffies(jiffies + pf->service_timer_period));
7205 i40e_service_event_schedule(pf);
7206 }
7207
7208 /**
7209 * i40e_set_num_rings_in_vsi - Determine number of rings in the VSI
7210 * @vsi: the VSI being configured
7211 **/
7212 static int i40e_set_num_rings_in_vsi(struct i40e_vsi *vsi)
7213 {
7214 struct i40e_pf *pf = vsi->back;
7215
7216 switch (vsi->type) {
7217 case I40E_VSI_MAIN:
7218 vsi->alloc_queue_pairs = pf->num_lan_qps;
7219 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7220 I40E_REQ_DESCRIPTOR_MULTIPLE);
7221 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
7222 vsi->num_q_vectors = pf->num_lan_msix;
7223 else
7224 vsi->num_q_vectors = 1;
7225
7226 break;
7227
7228 case I40E_VSI_FDIR:
7229 vsi->alloc_queue_pairs = 1;
7230 vsi->num_desc = ALIGN(I40E_FDIR_RING_COUNT,
7231 I40E_REQ_DESCRIPTOR_MULTIPLE);
7232 vsi->num_q_vectors = pf->num_fdsb_msix;
7233 break;
7234
7235 case I40E_VSI_VMDQ2:
7236 vsi->alloc_queue_pairs = pf->num_vmdq_qps;
7237 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7238 I40E_REQ_DESCRIPTOR_MULTIPLE);
7239 vsi->num_q_vectors = pf->num_vmdq_msix;
7240 break;
7241
7242 case I40E_VSI_SRIOV:
7243 vsi->alloc_queue_pairs = pf->num_vf_qps;
7244 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7245 I40E_REQ_DESCRIPTOR_MULTIPLE);
7246 break;
7247
7248 #ifdef I40E_FCOE
7249 case I40E_VSI_FCOE:
7250 vsi->alloc_queue_pairs = pf->num_fcoe_qps;
7251 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
7252 I40E_REQ_DESCRIPTOR_MULTIPLE);
7253 vsi->num_q_vectors = pf->num_fcoe_msix;
7254 break;
7255
7256 #endif /* I40E_FCOE */
7257 default:
7258 WARN_ON(1);
7259 return -ENODATA;
7260 }
7261
7262 return 0;
7263 }
7264
7265 /**
7266 * i40e_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the vsi
7267 * @type: VSI pointer
7268 * @alloc_qvectors: a bool to specify if q_vectors need to be allocated.
7269 *
7270 * On error: returns error code (negative)
7271 * On success: returns 0
7272 **/
7273 static int i40e_vsi_alloc_arrays(struct i40e_vsi *vsi, bool alloc_qvectors)
7274 {
7275 int size;
7276 int ret = 0;
7277
7278 /* allocate memory for both Tx and Rx ring pointers */
7279 size = sizeof(struct i40e_ring *) * vsi->alloc_queue_pairs * 2;
7280 vsi->tx_rings = kzalloc(size, GFP_KERNEL);
7281 if (!vsi->tx_rings)
7282 return -ENOMEM;
7283 vsi->rx_rings = &vsi->tx_rings[vsi->alloc_queue_pairs];
7284
7285 if (alloc_qvectors) {
7286 /* allocate memory for q_vector pointers */
7287 size = sizeof(struct i40e_q_vector *) * vsi->num_q_vectors;
7288 vsi->q_vectors = kzalloc(size, GFP_KERNEL);
7289 if (!vsi->q_vectors) {
7290 ret = -ENOMEM;
7291 goto err_vectors;
7292 }
7293 }
7294 return ret;
7295
7296 err_vectors:
7297 kfree(vsi->tx_rings);
7298 return ret;
7299 }
7300
7301 /**
7302 * i40e_vsi_mem_alloc - Allocates the next available struct vsi in the PF
7303 * @pf: board private structure
7304 * @type: type of VSI
7305 *
7306 * On error: returns error code (negative)
7307 * On success: returns vsi index in PF (positive)
7308 **/
7309 static int i40e_vsi_mem_alloc(struct i40e_pf *pf, enum i40e_vsi_type type)
7310 {
7311 int ret = -ENODEV;
7312 struct i40e_vsi *vsi;
7313 int vsi_idx;
7314 int i;
7315
7316 /* Need to protect the allocation of the VSIs at the PF level */
7317 mutex_lock(&pf->switch_mutex);
7318
7319 /* VSI list may be fragmented if VSI creation/destruction has
7320 * been happening. We can afford to do a quick scan to look
7321 * for any free VSIs in the list.
7322 *
7323 * find next empty vsi slot, looping back around if necessary
7324 */
7325 i = pf->next_vsi;
7326 while (i < pf->num_alloc_vsi && pf->vsi[i])
7327 i++;
7328 if (i >= pf->num_alloc_vsi) {
7329 i = 0;
7330 while (i < pf->next_vsi && pf->vsi[i])
7331 i++;
7332 }
7333
7334 if (i < pf->num_alloc_vsi && !pf->vsi[i]) {
7335 vsi_idx = i; /* Found one! */
7336 } else {
7337 ret = -ENODEV;
7338 goto unlock_pf; /* out of VSI slots! */
7339 }
7340 pf->next_vsi = ++i;
7341
7342 vsi = kzalloc(sizeof(*vsi), GFP_KERNEL);
7343 if (!vsi) {
7344 ret = -ENOMEM;
7345 goto unlock_pf;
7346 }
7347 vsi->type = type;
7348 vsi->back = pf;
7349 set_bit(__I40E_DOWN, &vsi->state);
7350 vsi->flags = 0;
7351 vsi->idx = vsi_idx;
7352 vsi->int_rate_limit = 0;
7353 vsi->rss_table_size = (vsi->type == I40E_VSI_MAIN) ?
7354 pf->rss_table_size : 64;
7355 vsi->netdev_registered = false;
7356 vsi->work_limit = I40E_DEFAULT_IRQ_WORK;
7357 INIT_LIST_HEAD(&vsi->mac_filter_list);
7358 vsi->irqs_ready = false;
7359
7360 ret = i40e_set_num_rings_in_vsi(vsi);
7361 if (ret)
7362 goto err_rings;
7363
7364 ret = i40e_vsi_alloc_arrays(vsi, true);
7365 if (ret)
7366 goto err_rings;
7367
7368 /* Setup default MSIX irq handler for VSI */
7369 i40e_vsi_setup_irqhandler(vsi, i40e_msix_clean_rings);
7370
7371 /* Initialize VSI lock */
7372 spin_lock_init(&vsi->mac_filter_list_lock);
7373 pf->vsi[vsi_idx] = vsi;
7374 ret = vsi_idx;
7375 goto unlock_pf;
7376
7377 err_rings:
7378 pf->next_vsi = i - 1;
7379 kfree(vsi);
7380 unlock_pf:
7381 mutex_unlock(&pf->switch_mutex);
7382 return ret;
7383 }
7384
7385 /**
7386 * i40e_vsi_free_arrays - Free queue and vector pointer arrays for the VSI
7387 * @type: VSI pointer
7388 * @free_qvectors: a bool to specify if q_vectors need to be freed.
7389 *
7390 * On error: returns error code (negative)
7391 * On success: returns 0
7392 **/
7393 static void i40e_vsi_free_arrays(struct i40e_vsi *vsi, bool free_qvectors)
7394 {
7395 /* free the ring and vector containers */
7396 if (free_qvectors) {
7397 kfree(vsi->q_vectors);
7398 vsi->q_vectors = NULL;
7399 }
7400 kfree(vsi->tx_rings);
7401 vsi->tx_rings = NULL;
7402 vsi->rx_rings = NULL;
7403 }
7404
7405 /**
7406 * i40e_clear_rss_config_user - clear the user configured RSS hash keys
7407 * and lookup table
7408 * @vsi: Pointer to VSI structure
7409 */
7410 static void i40e_clear_rss_config_user(struct i40e_vsi *vsi)
7411 {
7412 if (!vsi)
7413 return;
7414
7415 kfree(vsi->rss_hkey_user);
7416 vsi->rss_hkey_user = NULL;
7417
7418 kfree(vsi->rss_lut_user);
7419 vsi->rss_lut_user = NULL;
7420 }
7421
7422 /**
7423 * i40e_vsi_clear - Deallocate the VSI provided
7424 * @vsi: the VSI being un-configured
7425 **/
7426 static int i40e_vsi_clear(struct i40e_vsi *vsi)
7427 {
7428 struct i40e_pf *pf;
7429
7430 if (!vsi)
7431 return 0;
7432
7433 if (!vsi->back)
7434 goto free_vsi;
7435 pf = vsi->back;
7436
7437 mutex_lock(&pf->switch_mutex);
7438 if (!pf->vsi[vsi->idx]) {
7439 dev_err(&pf->pdev->dev, "pf->vsi[%d] is NULL, just free vsi[%d](%p,type %d)\n",
7440 vsi->idx, vsi->idx, vsi, vsi->type);
7441 goto unlock_vsi;
7442 }
7443
7444 if (pf->vsi[vsi->idx] != vsi) {
7445 dev_err(&pf->pdev->dev,
7446 "pf->vsi[%d](%p, type %d) != vsi[%d](%p,type %d): no free!\n",
7447 pf->vsi[vsi->idx]->idx,
7448 pf->vsi[vsi->idx],
7449 pf->vsi[vsi->idx]->type,
7450 vsi->idx, vsi, vsi->type);
7451 goto unlock_vsi;
7452 }
7453
7454 /* updates the PF for this cleared vsi */
7455 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
7456 i40e_put_lump(pf->irq_pile, vsi->base_vector, vsi->idx);
7457
7458 i40e_vsi_free_arrays(vsi, true);
7459 i40e_clear_rss_config_user(vsi);
7460
7461 pf->vsi[vsi->idx] = NULL;
7462 if (vsi->idx < pf->next_vsi)
7463 pf->next_vsi = vsi->idx;
7464
7465 unlock_vsi:
7466 mutex_unlock(&pf->switch_mutex);
7467 free_vsi:
7468 kfree(vsi);
7469
7470 return 0;
7471 }
7472
7473 /**
7474 * i40e_vsi_clear_rings - Deallocates the Rx and Tx rings for the provided VSI
7475 * @vsi: the VSI being cleaned
7476 **/
7477 static void i40e_vsi_clear_rings(struct i40e_vsi *vsi)
7478 {
7479 int i;
7480
7481 if (vsi->tx_rings && vsi->tx_rings[0]) {
7482 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
7483 kfree_rcu(vsi->tx_rings[i], rcu);
7484 vsi->tx_rings[i] = NULL;
7485 vsi->rx_rings[i] = NULL;
7486 }
7487 }
7488 }
7489
7490 /**
7491 * i40e_alloc_rings - Allocates the Rx and Tx rings for the provided VSI
7492 * @vsi: the VSI being configured
7493 **/
7494 static int i40e_alloc_rings(struct i40e_vsi *vsi)
7495 {
7496 struct i40e_ring *tx_ring, *rx_ring;
7497 struct i40e_pf *pf = vsi->back;
7498 int i;
7499
7500 /* Set basic values in the rings to be used later during open() */
7501 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
7502 /* allocate space for both Tx and Rx in one shot */
7503 tx_ring = kzalloc(sizeof(struct i40e_ring) * 2, GFP_KERNEL);
7504 if (!tx_ring)
7505 goto err_out;
7506
7507 tx_ring->queue_index = i;
7508 tx_ring->reg_idx = vsi->base_queue + i;
7509 tx_ring->ring_active = false;
7510 tx_ring->vsi = vsi;
7511 tx_ring->netdev = vsi->netdev;
7512 tx_ring->dev = &pf->pdev->dev;
7513 tx_ring->count = vsi->num_desc;
7514 tx_ring->size = 0;
7515 tx_ring->dcb_tc = 0;
7516 if (vsi->back->flags & I40E_FLAG_WB_ON_ITR_CAPABLE)
7517 tx_ring->flags = I40E_TXR_FLAGS_WB_ON_ITR;
7518 tx_ring->tx_itr_setting = pf->tx_itr_default;
7519 vsi->tx_rings[i] = tx_ring;
7520
7521 rx_ring = &tx_ring[1];
7522 rx_ring->queue_index = i;
7523 rx_ring->reg_idx = vsi->base_queue + i;
7524 rx_ring->ring_active = false;
7525 rx_ring->vsi = vsi;
7526 rx_ring->netdev = vsi->netdev;
7527 rx_ring->dev = &pf->pdev->dev;
7528 rx_ring->count = vsi->num_desc;
7529 rx_ring->size = 0;
7530 rx_ring->dcb_tc = 0;
7531 rx_ring->rx_itr_setting = pf->rx_itr_default;
7532 vsi->rx_rings[i] = rx_ring;
7533 }
7534
7535 return 0;
7536
7537 err_out:
7538 i40e_vsi_clear_rings(vsi);
7539 return -ENOMEM;
7540 }
7541
7542 /**
7543 * i40e_reserve_msix_vectors - Reserve MSI-X vectors in the kernel
7544 * @pf: board private structure
7545 * @vectors: the number of MSI-X vectors to request
7546 *
7547 * Returns the number of vectors reserved, or error
7548 **/
7549 static int i40e_reserve_msix_vectors(struct i40e_pf *pf, int vectors)
7550 {
7551 vectors = pci_enable_msix_range(pf->pdev, pf->msix_entries,
7552 I40E_MIN_MSIX, vectors);
7553 if (vectors < 0) {
7554 dev_info(&pf->pdev->dev,
7555 "MSI-X vector reservation failed: %d\n", vectors);
7556 vectors = 0;
7557 }
7558
7559 return vectors;
7560 }
7561
7562 /**
7563 * i40e_init_msix - Setup the MSIX capability
7564 * @pf: board private structure
7565 *
7566 * Work with the OS to set up the MSIX vectors needed.
7567 *
7568 * Returns the number of vectors reserved or negative on failure
7569 **/
7570 static int i40e_init_msix(struct i40e_pf *pf)
7571 {
7572 struct i40e_hw *hw = &pf->hw;
7573 int vectors_left;
7574 int v_budget, i;
7575 int v_actual;
7576 int iwarp_requested = 0;
7577
7578 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
7579 return -ENODEV;
7580
7581 /* The number of vectors we'll request will be comprised of:
7582 * - Add 1 for "other" cause for Admin Queue events, etc.
7583 * - The number of LAN queue pairs
7584 * - Queues being used for RSS.
7585 * We don't need as many as max_rss_size vectors.
7586 * use rss_size instead in the calculation since that
7587 * is governed by number of cpus in the system.
7588 * - assumes symmetric Tx/Rx pairing
7589 * - The number of VMDq pairs
7590 * - The CPU count within the NUMA node if iWARP is enabled
7591 #ifdef I40E_FCOE
7592 * - The number of FCOE qps.
7593 #endif
7594 * Once we count this up, try the request.
7595 *
7596 * If we can't get what we want, we'll simplify to nearly nothing
7597 * and try again. If that still fails, we punt.
7598 */
7599 vectors_left = hw->func_caps.num_msix_vectors;
7600 v_budget = 0;
7601
7602 /* reserve one vector for miscellaneous handler */
7603 if (vectors_left) {
7604 v_budget++;
7605 vectors_left--;
7606 }
7607
7608 /* reserve vectors for the main PF traffic queues */
7609 pf->num_lan_msix = min_t(int, num_online_cpus(), vectors_left);
7610 vectors_left -= pf->num_lan_msix;
7611 v_budget += pf->num_lan_msix;
7612
7613 /* reserve one vector for sideband flow director */
7614 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
7615 if (vectors_left) {
7616 pf->num_fdsb_msix = 1;
7617 v_budget++;
7618 vectors_left--;
7619 } else {
7620 pf->num_fdsb_msix = 0;
7621 }
7622 }
7623
7624 #ifdef I40E_FCOE
7625 /* can we reserve enough for FCoE? */
7626 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7627 if (!vectors_left)
7628 pf->num_fcoe_msix = 0;
7629 else if (vectors_left >= pf->num_fcoe_qps)
7630 pf->num_fcoe_msix = pf->num_fcoe_qps;
7631 else
7632 pf->num_fcoe_msix = 1;
7633 v_budget += pf->num_fcoe_msix;
7634 vectors_left -= pf->num_fcoe_msix;
7635 }
7636
7637 #endif
7638 /* can we reserve enough for iWARP? */
7639 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
7640 iwarp_requested = pf->num_iwarp_msix;
7641
7642 if (!vectors_left)
7643 pf->num_iwarp_msix = 0;
7644 else if (vectors_left < pf->num_iwarp_msix)
7645 pf->num_iwarp_msix = 1;
7646 v_budget += pf->num_iwarp_msix;
7647 vectors_left -= pf->num_iwarp_msix;
7648 }
7649
7650 /* any vectors left over go for VMDq support */
7651 if (pf->flags & I40E_FLAG_VMDQ_ENABLED) {
7652 int vmdq_vecs_wanted = pf->num_vmdq_vsis * pf->num_vmdq_qps;
7653 int vmdq_vecs = min_t(int, vectors_left, vmdq_vecs_wanted);
7654
7655 if (!vectors_left) {
7656 pf->num_vmdq_msix = 0;
7657 pf->num_vmdq_qps = 0;
7658 } else {
7659 /* if we're short on vectors for what's desired, we limit
7660 * the queues per vmdq. If this is still more than are
7661 * available, the user will need to change the number of
7662 * queues/vectors used by the PF later with the ethtool
7663 * channels command
7664 */
7665 if (vmdq_vecs < vmdq_vecs_wanted)
7666 pf->num_vmdq_qps = 1;
7667 pf->num_vmdq_msix = pf->num_vmdq_qps;
7668
7669 v_budget += vmdq_vecs;
7670 vectors_left -= vmdq_vecs;
7671 }
7672 }
7673
7674 pf->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry),
7675 GFP_KERNEL);
7676 if (!pf->msix_entries)
7677 return -ENOMEM;
7678
7679 for (i = 0; i < v_budget; i++)
7680 pf->msix_entries[i].entry = i;
7681 v_actual = i40e_reserve_msix_vectors(pf, v_budget);
7682
7683 if (v_actual < I40E_MIN_MSIX) {
7684 pf->flags &= ~I40E_FLAG_MSIX_ENABLED;
7685 kfree(pf->msix_entries);
7686 pf->msix_entries = NULL;
7687 pci_disable_msix(pf->pdev);
7688 return -ENODEV;
7689
7690 } else if (v_actual == I40E_MIN_MSIX) {
7691 /* Adjust for minimal MSIX use */
7692 pf->num_vmdq_vsis = 0;
7693 pf->num_vmdq_qps = 0;
7694 pf->num_lan_qps = 1;
7695 pf->num_lan_msix = 1;
7696
7697 } else if (!vectors_left) {
7698 /* If we have limited resources, we will start with no vectors
7699 * for the special features and then allocate vectors to some
7700 * of these features based on the policy and at the end disable
7701 * the features that did not get any vectors.
7702 */
7703 int vec;
7704
7705 dev_info(&pf->pdev->dev,
7706 "MSI-X vector limit reached, attempting to redistribute vectors\n");
7707 /* reserve the misc vector */
7708 vec = v_actual - 1;
7709
7710 /* Scale vector usage down */
7711 pf->num_vmdq_msix = 1; /* force VMDqs to only one vector */
7712 pf->num_vmdq_vsis = 1;
7713 pf->num_vmdq_qps = 1;
7714 #ifdef I40E_FCOE
7715 pf->num_fcoe_qps = 0;
7716 pf->num_fcoe_msix = 0;
7717 #endif
7718
7719 /* partition out the remaining vectors */
7720 switch (vec) {
7721 case 2:
7722 pf->num_lan_msix = 1;
7723 break;
7724 case 3:
7725 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
7726 pf->num_lan_msix = 1;
7727 pf->num_iwarp_msix = 1;
7728 } else {
7729 pf->num_lan_msix = 2;
7730 }
7731 #ifdef I40E_FCOE
7732 /* give one vector to FCoE */
7733 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7734 pf->num_lan_msix = 1;
7735 pf->num_fcoe_msix = 1;
7736 }
7737 #endif
7738 break;
7739 default:
7740 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
7741 pf->num_iwarp_msix = min_t(int, (vec / 3),
7742 iwarp_requested);
7743 pf->num_vmdq_vsis = min_t(int, (vec / 3),
7744 I40E_DEFAULT_NUM_VMDQ_VSI);
7745 } else {
7746 pf->num_vmdq_vsis = min_t(int, (vec / 2),
7747 I40E_DEFAULT_NUM_VMDQ_VSI);
7748 }
7749 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
7750 pf->num_fdsb_msix = 1;
7751 vec--;
7752 }
7753 pf->num_lan_msix = min_t(int,
7754 (vec - (pf->num_iwarp_msix + pf->num_vmdq_vsis)),
7755 pf->num_lan_msix);
7756 pf->num_lan_qps = pf->num_lan_msix;
7757 #ifdef I40E_FCOE
7758 /* give one vector to FCoE */
7759 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7760 pf->num_fcoe_msix = 1;
7761 vec--;
7762 }
7763 #endif
7764 break;
7765 }
7766 }
7767
7768 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) &&
7769 (pf->num_fdsb_msix == 0)) {
7770 dev_info(&pf->pdev->dev, "Sideband Flowdir disabled, not enough MSI-X vectors\n");
7771 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
7772 }
7773 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
7774 (pf->num_vmdq_msix == 0)) {
7775 dev_info(&pf->pdev->dev, "VMDq disabled, not enough MSI-X vectors\n");
7776 pf->flags &= ~I40E_FLAG_VMDQ_ENABLED;
7777 }
7778
7779 if ((pf->flags & I40E_FLAG_IWARP_ENABLED) &&
7780 (pf->num_iwarp_msix == 0)) {
7781 dev_info(&pf->pdev->dev, "IWARP disabled, not enough MSI-X vectors\n");
7782 pf->flags &= ~I40E_FLAG_IWARP_ENABLED;
7783 }
7784 #ifdef I40E_FCOE
7785
7786 if ((pf->flags & I40E_FLAG_FCOE_ENABLED) && (pf->num_fcoe_msix == 0)) {
7787 dev_info(&pf->pdev->dev, "FCOE disabled, not enough MSI-X vectors\n");
7788 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
7789 }
7790 #endif
7791 i40e_debug(&pf->hw, I40E_DEBUG_INIT,
7792 "MSI-X vector distribution: PF %d, VMDq %d, FDSB %d, iWARP %d\n",
7793 pf->num_lan_msix,
7794 pf->num_vmdq_msix * pf->num_vmdq_vsis,
7795 pf->num_fdsb_msix,
7796 pf->num_iwarp_msix);
7797
7798 return v_actual;
7799 }
7800
7801 /**
7802 * i40e_vsi_alloc_q_vector - Allocate memory for a single interrupt vector
7803 * @vsi: the VSI being configured
7804 * @v_idx: index of the vector in the vsi struct
7805 * @cpu: cpu to be used on affinity_mask
7806 *
7807 * We allocate one q_vector. If allocation fails we return -ENOMEM.
7808 **/
7809 static int i40e_vsi_alloc_q_vector(struct i40e_vsi *vsi, int v_idx, int cpu)
7810 {
7811 struct i40e_q_vector *q_vector;
7812
7813 /* allocate q_vector */
7814 q_vector = kzalloc(sizeof(struct i40e_q_vector), GFP_KERNEL);
7815 if (!q_vector)
7816 return -ENOMEM;
7817
7818 q_vector->vsi = vsi;
7819 q_vector->v_idx = v_idx;
7820 cpumask_set_cpu(cpu, &q_vector->affinity_mask);
7821
7822 if (vsi->netdev)
7823 netif_napi_add(vsi->netdev, &q_vector->napi,
7824 i40e_napi_poll, NAPI_POLL_WEIGHT);
7825
7826 q_vector->rx.latency_range = I40E_LOW_LATENCY;
7827 q_vector->tx.latency_range = I40E_LOW_LATENCY;
7828
7829 /* tie q_vector and vsi together */
7830 vsi->q_vectors[v_idx] = q_vector;
7831
7832 return 0;
7833 }
7834
7835 /**
7836 * i40e_vsi_alloc_q_vectors - Allocate memory for interrupt vectors
7837 * @vsi: the VSI being configured
7838 *
7839 * We allocate one q_vector per queue interrupt. If allocation fails we
7840 * return -ENOMEM.
7841 **/
7842 static int i40e_vsi_alloc_q_vectors(struct i40e_vsi *vsi)
7843 {
7844 struct i40e_pf *pf = vsi->back;
7845 int err, v_idx, num_q_vectors, current_cpu;
7846
7847 /* if not MSIX, give the one vector only to the LAN VSI */
7848 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
7849 num_q_vectors = vsi->num_q_vectors;
7850 else if (vsi == pf->vsi[pf->lan_vsi])
7851 num_q_vectors = 1;
7852 else
7853 return -EINVAL;
7854
7855 current_cpu = cpumask_first(cpu_online_mask);
7856
7857 for (v_idx = 0; v_idx < num_q_vectors; v_idx++) {
7858 err = i40e_vsi_alloc_q_vector(vsi, v_idx, current_cpu);
7859 if (err)
7860 goto err_out;
7861 current_cpu = cpumask_next(current_cpu, cpu_online_mask);
7862 if (unlikely(current_cpu >= nr_cpu_ids))
7863 current_cpu = cpumask_first(cpu_online_mask);
7864 }
7865
7866 return 0;
7867
7868 err_out:
7869 while (v_idx--)
7870 i40e_free_q_vector(vsi, v_idx);
7871
7872 return err;
7873 }
7874
7875 /**
7876 * i40e_init_interrupt_scheme - Determine proper interrupt scheme
7877 * @pf: board private structure to initialize
7878 **/
7879 static int i40e_init_interrupt_scheme(struct i40e_pf *pf)
7880 {
7881 int vectors = 0;
7882 ssize_t size;
7883
7884 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
7885 vectors = i40e_init_msix(pf);
7886 if (vectors < 0) {
7887 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED |
7888 I40E_FLAG_IWARP_ENABLED |
7889 #ifdef I40E_FCOE
7890 I40E_FLAG_FCOE_ENABLED |
7891 #endif
7892 I40E_FLAG_RSS_ENABLED |
7893 I40E_FLAG_DCB_CAPABLE |
7894 I40E_FLAG_DCB_ENABLED |
7895 I40E_FLAG_SRIOV_ENABLED |
7896 I40E_FLAG_FD_SB_ENABLED |
7897 I40E_FLAG_FD_ATR_ENABLED |
7898 I40E_FLAG_VMDQ_ENABLED);
7899
7900 /* rework the queue expectations without MSIX */
7901 i40e_determine_queue_usage(pf);
7902 }
7903 }
7904
7905 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED) &&
7906 (pf->flags & I40E_FLAG_MSI_ENABLED)) {
7907 dev_info(&pf->pdev->dev, "MSI-X not available, trying MSI\n");
7908 vectors = pci_enable_msi(pf->pdev);
7909 if (vectors < 0) {
7910 dev_info(&pf->pdev->dev, "MSI init failed - %d\n",
7911 vectors);
7912 pf->flags &= ~I40E_FLAG_MSI_ENABLED;
7913 }
7914 vectors = 1; /* one MSI or Legacy vector */
7915 }
7916
7917 if (!(pf->flags & (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED)))
7918 dev_info(&pf->pdev->dev, "MSI-X and MSI not available, falling back to Legacy IRQ\n");
7919
7920 /* set up vector assignment tracking */
7921 size = sizeof(struct i40e_lump_tracking) + (sizeof(u16) * vectors);
7922 pf->irq_pile = kzalloc(size, GFP_KERNEL);
7923 if (!pf->irq_pile) {
7924 dev_err(&pf->pdev->dev, "error allocating irq_pile memory\n");
7925 return -ENOMEM;
7926 }
7927 pf->irq_pile->num_entries = vectors;
7928 pf->irq_pile->search_hint = 0;
7929
7930 /* track first vector for misc interrupts, ignore return */
7931 (void)i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT - 1);
7932
7933 return 0;
7934 }
7935
7936 /**
7937 * i40e_setup_misc_vector - Setup the misc vector to handle non queue events
7938 * @pf: board private structure
7939 *
7940 * This sets up the handler for MSIX 0, which is used to manage the
7941 * non-queue interrupts, e.g. AdminQ and errors. This is not used
7942 * when in MSI or Legacy interrupt mode.
7943 **/
7944 static int i40e_setup_misc_vector(struct i40e_pf *pf)
7945 {
7946 struct i40e_hw *hw = &pf->hw;
7947 int err = 0;
7948
7949 /* Only request the irq if this is the first time through, and
7950 * not when we're rebuilding after a Reset
7951 */
7952 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
7953 err = request_irq(pf->msix_entries[0].vector,
7954 i40e_intr, 0, pf->int_name, pf);
7955 if (err) {
7956 dev_info(&pf->pdev->dev,
7957 "request_irq for %s failed: %d\n",
7958 pf->int_name, err);
7959 return -EFAULT;
7960 }
7961 }
7962
7963 i40e_enable_misc_int_causes(pf);
7964
7965 /* associate no queues to the misc vector */
7966 wr32(hw, I40E_PFINT_LNKLST0, I40E_QUEUE_END_OF_LIST);
7967 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), I40E_ITR_8K);
7968
7969 i40e_flush(hw);
7970
7971 i40e_irq_dynamic_enable_icr0(pf, true);
7972
7973 return err;
7974 }
7975
7976 /**
7977 * i40e_config_rss_aq - Prepare for RSS using AQ commands
7978 * @vsi: vsi structure
7979 * @seed: RSS hash seed
7980 **/
7981 static int i40e_config_rss_aq(struct i40e_vsi *vsi, const u8 *seed,
7982 u8 *lut, u16 lut_size)
7983 {
7984 struct i40e_pf *pf = vsi->back;
7985 struct i40e_hw *hw = &pf->hw;
7986 int ret = 0;
7987
7988 if (seed) {
7989 struct i40e_aqc_get_set_rss_key_data *seed_dw =
7990 (struct i40e_aqc_get_set_rss_key_data *)seed;
7991 ret = i40e_aq_set_rss_key(hw, vsi->id, seed_dw);
7992 if (ret) {
7993 dev_info(&pf->pdev->dev,
7994 "Cannot set RSS key, err %s aq_err %s\n",
7995 i40e_stat_str(hw, ret),
7996 i40e_aq_str(hw, hw->aq.asq_last_status));
7997 return ret;
7998 }
7999 }
8000 if (lut) {
8001 bool pf_lut = vsi->type == I40E_VSI_MAIN ? true : false;
8002
8003 ret = i40e_aq_set_rss_lut(hw, vsi->id, pf_lut, lut, lut_size);
8004 if (ret) {
8005 dev_info(&pf->pdev->dev,
8006 "Cannot set RSS lut, err %s aq_err %s\n",
8007 i40e_stat_str(hw, ret),
8008 i40e_aq_str(hw, hw->aq.asq_last_status));
8009 return ret;
8010 }
8011 }
8012 return ret;
8013 }
8014
8015 /**
8016 * i40e_get_rss_aq - Get RSS keys and lut by using AQ commands
8017 * @vsi: Pointer to vsi structure
8018 * @seed: Buffter to store the hash keys
8019 * @lut: Buffer to store the lookup table entries
8020 * @lut_size: Size of buffer to store the lookup table entries
8021 *
8022 * Return 0 on success, negative on failure
8023 */
8024 static int i40e_get_rss_aq(struct i40e_vsi *vsi, const u8 *seed,
8025 u8 *lut, u16 lut_size)
8026 {
8027 struct i40e_pf *pf = vsi->back;
8028 struct i40e_hw *hw = &pf->hw;
8029 int ret = 0;
8030
8031 if (seed) {
8032 ret = i40e_aq_get_rss_key(hw, vsi->id,
8033 (struct i40e_aqc_get_set_rss_key_data *)seed);
8034 if (ret) {
8035 dev_info(&pf->pdev->dev,
8036 "Cannot get RSS key, err %s aq_err %s\n",
8037 i40e_stat_str(&pf->hw, ret),
8038 i40e_aq_str(&pf->hw,
8039 pf->hw.aq.asq_last_status));
8040 return ret;
8041 }
8042 }
8043
8044 if (lut) {
8045 bool pf_lut = vsi->type == I40E_VSI_MAIN ? true : false;
8046
8047 ret = i40e_aq_get_rss_lut(hw, vsi->id, pf_lut, lut, lut_size);
8048 if (ret) {
8049 dev_info(&pf->pdev->dev,
8050 "Cannot get RSS lut, err %s aq_err %s\n",
8051 i40e_stat_str(&pf->hw, ret),
8052 i40e_aq_str(&pf->hw,
8053 pf->hw.aq.asq_last_status));
8054 return ret;
8055 }
8056 }
8057
8058 return ret;
8059 }
8060
8061 /**
8062 * i40e_vsi_config_rss - Prepare for VSI(VMDq) RSS if used
8063 * @vsi: VSI structure
8064 **/
8065 static int i40e_vsi_config_rss(struct i40e_vsi *vsi)
8066 {
8067 u8 seed[I40E_HKEY_ARRAY_SIZE];
8068 struct i40e_pf *pf = vsi->back;
8069 u8 *lut;
8070 int ret;
8071
8072 if (!(pf->flags & I40E_FLAG_RSS_AQ_CAPABLE))
8073 return 0;
8074
8075 if (!vsi->rss_size)
8076 vsi->rss_size = min_t(int, pf->alloc_rss_size,
8077 vsi->num_queue_pairs);
8078 if (!vsi->rss_size)
8079 return -EINVAL;
8080
8081 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
8082 if (!lut)
8083 return -ENOMEM;
8084 /* Use the user configured hash keys and lookup table if there is one,
8085 * otherwise use default
8086 */
8087 if (vsi->rss_lut_user)
8088 memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size);
8089 else
8090 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, vsi->rss_size);
8091 if (vsi->rss_hkey_user)
8092 memcpy(seed, vsi->rss_hkey_user, I40E_HKEY_ARRAY_SIZE);
8093 else
8094 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
8095 ret = i40e_config_rss_aq(vsi, seed, lut, vsi->rss_table_size);
8096 kfree(lut);
8097
8098 return ret;
8099 }
8100
8101 /**
8102 * i40e_config_rss_reg - Configure RSS keys and lut by writing registers
8103 * @vsi: Pointer to vsi structure
8104 * @seed: RSS hash seed
8105 * @lut: Lookup table
8106 * @lut_size: Lookup table size
8107 *
8108 * Returns 0 on success, negative on failure
8109 **/
8110 static int i40e_config_rss_reg(struct i40e_vsi *vsi, const u8 *seed,
8111 const u8 *lut, u16 lut_size)
8112 {
8113 struct i40e_pf *pf = vsi->back;
8114 struct i40e_hw *hw = &pf->hw;
8115 u16 vf_id = vsi->vf_id;
8116 u8 i;
8117
8118 /* Fill out hash function seed */
8119 if (seed) {
8120 u32 *seed_dw = (u32 *)seed;
8121
8122 if (vsi->type == I40E_VSI_MAIN) {
8123 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
8124 i40e_write_rx_ctl(hw, I40E_PFQF_HKEY(i),
8125 seed_dw[i]);
8126 } else if (vsi->type == I40E_VSI_SRIOV) {
8127 for (i = 0; i <= I40E_VFQF_HKEY1_MAX_INDEX; i++)
8128 i40e_write_rx_ctl(hw,
8129 I40E_VFQF_HKEY1(i, vf_id),
8130 seed_dw[i]);
8131 } else {
8132 dev_err(&pf->pdev->dev, "Cannot set RSS seed - invalid VSI type\n");
8133 }
8134 }
8135
8136 if (lut) {
8137 u32 *lut_dw = (u32 *)lut;
8138
8139 if (vsi->type == I40E_VSI_MAIN) {
8140 if (lut_size != I40E_HLUT_ARRAY_SIZE)
8141 return -EINVAL;
8142 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
8143 wr32(hw, I40E_PFQF_HLUT(i), lut_dw[i]);
8144 } else if (vsi->type == I40E_VSI_SRIOV) {
8145 if (lut_size != I40E_VF_HLUT_ARRAY_SIZE)
8146 return -EINVAL;
8147 for (i = 0; i <= I40E_VFQF_HLUT_MAX_INDEX; i++)
8148 i40e_write_rx_ctl(hw,
8149 I40E_VFQF_HLUT1(i, vf_id),
8150 lut_dw[i]);
8151 } else {
8152 dev_err(&pf->pdev->dev, "Cannot set RSS LUT - invalid VSI type\n");
8153 }
8154 }
8155 i40e_flush(hw);
8156
8157 return 0;
8158 }
8159
8160 /**
8161 * i40e_get_rss_reg - Get the RSS keys and lut by reading registers
8162 * @vsi: Pointer to VSI structure
8163 * @seed: Buffer to store the keys
8164 * @lut: Buffer to store the lookup table entries
8165 * @lut_size: Size of buffer to store the lookup table entries
8166 *
8167 * Returns 0 on success, negative on failure
8168 */
8169 static int i40e_get_rss_reg(struct i40e_vsi *vsi, u8 *seed,
8170 u8 *lut, u16 lut_size)
8171 {
8172 struct i40e_pf *pf = vsi->back;
8173 struct i40e_hw *hw = &pf->hw;
8174 u16 i;
8175
8176 if (seed) {
8177 u32 *seed_dw = (u32 *)seed;
8178
8179 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
8180 seed_dw[i] = i40e_read_rx_ctl(hw, I40E_PFQF_HKEY(i));
8181 }
8182 if (lut) {
8183 u32 *lut_dw = (u32 *)lut;
8184
8185 if (lut_size != I40E_HLUT_ARRAY_SIZE)
8186 return -EINVAL;
8187 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
8188 lut_dw[i] = rd32(hw, I40E_PFQF_HLUT(i));
8189 }
8190
8191 return 0;
8192 }
8193
8194 /**
8195 * i40e_config_rss - Configure RSS keys and lut
8196 * @vsi: Pointer to VSI structure
8197 * @seed: RSS hash seed
8198 * @lut: Lookup table
8199 * @lut_size: Lookup table size
8200 *
8201 * Returns 0 on success, negative on failure
8202 */
8203 int i40e_config_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size)
8204 {
8205 struct i40e_pf *pf = vsi->back;
8206
8207 if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE)
8208 return i40e_config_rss_aq(vsi, seed, lut, lut_size);
8209 else
8210 return i40e_config_rss_reg(vsi, seed, lut, lut_size);
8211 }
8212
8213 /**
8214 * i40e_get_rss - Get RSS keys and lut
8215 * @vsi: Pointer to VSI structure
8216 * @seed: Buffer to store the keys
8217 * @lut: Buffer to store the lookup table entries
8218 * lut_size: Size of buffer to store the lookup table entries
8219 *
8220 * Returns 0 on success, negative on failure
8221 */
8222 int i40e_get_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size)
8223 {
8224 struct i40e_pf *pf = vsi->back;
8225
8226 if (pf->flags & I40E_FLAG_RSS_AQ_CAPABLE)
8227 return i40e_get_rss_aq(vsi, seed, lut, lut_size);
8228 else
8229 return i40e_get_rss_reg(vsi, seed, lut, lut_size);
8230 }
8231
8232 /**
8233 * i40e_fill_rss_lut - Fill the RSS lookup table with default values
8234 * @pf: Pointer to board private structure
8235 * @lut: Lookup table
8236 * @rss_table_size: Lookup table size
8237 * @rss_size: Range of queue number for hashing
8238 */
8239 void i40e_fill_rss_lut(struct i40e_pf *pf, u8 *lut,
8240 u16 rss_table_size, u16 rss_size)
8241 {
8242 u16 i;
8243
8244 for (i = 0; i < rss_table_size; i++)
8245 lut[i] = i % rss_size;
8246 }
8247
8248 /**
8249 * i40e_pf_config_rss - Prepare for RSS if used
8250 * @pf: board private structure
8251 **/
8252 static int i40e_pf_config_rss(struct i40e_pf *pf)
8253 {
8254 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
8255 u8 seed[I40E_HKEY_ARRAY_SIZE];
8256 u8 *lut;
8257 struct i40e_hw *hw = &pf->hw;
8258 u32 reg_val;
8259 u64 hena;
8260 int ret;
8261
8262 /* By default we enable TCP/UDP with IPv4/IPv6 ptypes */
8263 hena = (u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(0)) |
8264 ((u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(1)) << 32);
8265 hena |= i40e_pf_get_default_rss_hena(pf);
8266
8267 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), (u32)hena);
8268 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));
8269
8270 /* Determine the RSS table size based on the hardware capabilities */
8271 reg_val = i40e_read_rx_ctl(hw, I40E_PFQF_CTL_0);
8272 reg_val = (pf->rss_table_size == 512) ?
8273 (reg_val | I40E_PFQF_CTL_0_HASHLUTSIZE_512) :
8274 (reg_val & ~I40E_PFQF_CTL_0_HASHLUTSIZE_512);
8275 i40e_write_rx_ctl(hw, I40E_PFQF_CTL_0, reg_val);
8276
8277 /* Determine the RSS size of the VSI */
8278 if (!vsi->rss_size)
8279 vsi->rss_size = min_t(int, pf->alloc_rss_size,
8280 vsi->num_queue_pairs);
8281 if (!vsi->rss_size)
8282 return -EINVAL;
8283
8284 lut = kzalloc(vsi->rss_table_size, GFP_KERNEL);
8285 if (!lut)
8286 return -ENOMEM;
8287
8288 /* Use user configured lut if there is one, otherwise use default */
8289 if (vsi->rss_lut_user)
8290 memcpy(lut, vsi->rss_lut_user, vsi->rss_table_size);
8291 else
8292 i40e_fill_rss_lut(pf, lut, vsi->rss_table_size, vsi->rss_size);
8293
8294 /* Use user configured hash key if there is one, otherwise
8295 * use default.
8296 */
8297 if (vsi->rss_hkey_user)
8298 memcpy(seed, vsi->rss_hkey_user, I40E_HKEY_ARRAY_SIZE);
8299 else
8300 netdev_rss_key_fill((void *)seed, I40E_HKEY_ARRAY_SIZE);
8301 ret = i40e_config_rss(vsi, seed, lut, vsi->rss_table_size);
8302 kfree(lut);
8303
8304 return ret;
8305 }
8306
8307 /**
8308 * i40e_reconfig_rss_queues - change number of queues for rss and rebuild
8309 * @pf: board private structure
8310 * @queue_count: the requested queue count for rss.
8311 *
8312 * returns 0 if rss is not enabled, if enabled returns the final rss queue
8313 * count which may be different from the requested queue count.
8314 **/
8315 int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count)
8316 {
8317 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
8318 int new_rss_size;
8319
8320 if (!(pf->flags & I40E_FLAG_RSS_ENABLED))
8321 return 0;
8322
8323 new_rss_size = min_t(int, queue_count, pf->rss_size_max);
8324
8325 if (queue_count != vsi->num_queue_pairs) {
8326 vsi->req_queue_pairs = queue_count;
8327 i40e_prep_for_reset(pf);
8328
8329 pf->alloc_rss_size = new_rss_size;
8330
8331 i40e_reset_and_rebuild(pf, true);
8332
8333 /* Discard the user configured hash keys and lut, if less
8334 * queues are enabled.
8335 */
8336 if (queue_count < vsi->rss_size) {
8337 i40e_clear_rss_config_user(vsi);
8338 dev_dbg(&pf->pdev->dev,
8339 "discard user configured hash keys and lut\n");
8340 }
8341
8342 /* Reset vsi->rss_size, as number of enabled queues changed */
8343 vsi->rss_size = min_t(int, pf->alloc_rss_size,
8344 vsi->num_queue_pairs);
8345
8346 i40e_pf_config_rss(pf);
8347 }
8348 dev_info(&pf->pdev->dev, "User requested queue count/HW max RSS count: %d/%d\n",
8349 vsi->req_queue_pairs, pf->rss_size_max);
8350 return pf->alloc_rss_size;
8351 }
8352
8353 /**
8354 * i40e_get_npar_bw_setting - Retrieve BW settings for this PF partition
8355 * @pf: board private structure
8356 **/
8357 i40e_status i40e_get_npar_bw_setting(struct i40e_pf *pf)
8358 {
8359 i40e_status status;
8360 bool min_valid, max_valid;
8361 u32 max_bw, min_bw;
8362
8363 status = i40e_read_bw_from_alt_ram(&pf->hw, &max_bw, &min_bw,
8364 &min_valid, &max_valid);
8365
8366 if (!status) {
8367 if (min_valid)
8368 pf->npar_min_bw = min_bw;
8369 if (max_valid)
8370 pf->npar_max_bw = max_bw;
8371 }
8372
8373 return status;
8374 }
8375
8376 /**
8377 * i40e_set_npar_bw_setting - Set BW settings for this PF partition
8378 * @pf: board private structure
8379 **/
8380 i40e_status i40e_set_npar_bw_setting(struct i40e_pf *pf)
8381 {
8382 struct i40e_aqc_configure_partition_bw_data bw_data;
8383 i40e_status status;
8384
8385 /* Set the valid bit for this PF */
8386 bw_data.pf_valid_bits = cpu_to_le16(BIT(pf->hw.pf_id));
8387 bw_data.max_bw[pf->hw.pf_id] = pf->npar_max_bw & I40E_ALT_BW_VALUE_MASK;
8388 bw_data.min_bw[pf->hw.pf_id] = pf->npar_min_bw & I40E_ALT_BW_VALUE_MASK;
8389
8390 /* Set the new bandwidths */
8391 status = i40e_aq_configure_partition_bw(&pf->hw, &bw_data, NULL);
8392
8393 return status;
8394 }
8395
8396 /**
8397 * i40e_commit_npar_bw_setting - Commit BW settings for this PF partition
8398 * @pf: board private structure
8399 **/
8400 i40e_status i40e_commit_npar_bw_setting(struct i40e_pf *pf)
8401 {
8402 /* Commit temporary BW setting to permanent NVM image */
8403 enum i40e_admin_queue_err last_aq_status;
8404 i40e_status ret;
8405 u16 nvm_word;
8406
8407 if (pf->hw.partition_id != 1) {
8408 dev_info(&pf->pdev->dev,
8409 "Commit BW only works on partition 1! This is partition %d",
8410 pf->hw.partition_id);
8411 ret = I40E_NOT_SUPPORTED;
8412 goto bw_commit_out;
8413 }
8414
8415 /* Acquire NVM for read access */
8416 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_READ);
8417 last_aq_status = pf->hw.aq.asq_last_status;
8418 if (ret) {
8419 dev_info(&pf->pdev->dev,
8420 "Cannot acquire NVM for read access, err %s aq_err %s\n",
8421 i40e_stat_str(&pf->hw, ret),
8422 i40e_aq_str(&pf->hw, last_aq_status));
8423 goto bw_commit_out;
8424 }
8425
8426 /* Read word 0x10 of NVM - SW compatibility word 1 */
8427 ret = i40e_aq_read_nvm(&pf->hw,
8428 I40E_SR_NVM_CONTROL_WORD,
8429 0x10, sizeof(nvm_word), &nvm_word,
8430 false, NULL);
8431 /* Save off last admin queue command status before releasing
8432 * the NVM
8433 */
8434 last_aq_status = pf->hw.aq.asq_last_status;
8435 i40e_release_nvm(&pf->hw);
8436 if (ret) {
8437 dev_info(&pf->pdev->dev, "NVM read error, err %s aq_err %s\n",
8438 i40e_stat_str(&pf->hw, ret),
8439 i40e_aq_str(&pf->hw, last_aq_status));
8440 goto bw_commit_out;
8441 }
8442
8443 /* Wait a bit for NVM release to complete */
8444 msleep(50);
8445
8446 /* Acquire NVM for write access */
8447 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_WRITE);
8448 last_aq_status = pf->hw.aq.asq_last_status;
8449 if (ret) {
8450 dev_info(&pf->pdev->dev,
8451 "Cannot acquire NVM for write access, err %s aq_err %s\n",
8452 i40e_stat_str(&pf->hw, ret),
8453 i40e_aq_str(&pf->hw, last_aq_status));
8454 goto bw_commit_out;
8455 }
8456 /* Write it back out unchanged to initiate update NVM,
8457 * which will force a write of the shadow (alt) RAM to
8458 * the NVM - thus storing the bandwidth values permanently.
8459 */
8460 ret = i40e_aq_update_nvm(&pf->hw,
8461 I40E_SR_NVM_CONTROL_WORD,
8462 0x10, sizeof(nvm_word),
8463 &nvm_word, true, NULL);
8464 /* Save off last admin queue command status before releasing
8465 * the NVM
8466 */
8467 last_aq_status = pf->hw.aq.asq_last_status;
8468 i40e_release_nvm(&pf->hw);
8469 if (ret)
8470 dev_info(&pf->pdev->dev,
8471 "BW settings NOT SAVED, err %s aq_err %s\n",
8472 i40e_stat_str(&pf->hw, ret),
8473 i40e_aq_str(&pf->hw, last_aq_status));
8474 bw_commit_out:
8475
8476 return ret;
8477 }
8478
8479 /**
8480 * i40e_sw_init - Initialize general software structures (struct i40e_pf)
8481 * @pf: board private structure to initialize
8482 *
8483 * i40e_sw_init initializes the Adapter private data structure.
8484 * Fields are initialized based on PCI device information and
8485 * OS network device settings (MTU size).
8486 **/
8487 static int i40e_sw_init(struct i40e_pf *pf)
8488 {
8489 int err = 0;
8490 int size;
8491
8492 /* Set default capability flags */
8493 pf->flags = I40E_FLAG_RX_CSUM_ENABLED |
8494 I40E_FLAG_MSI_ENABLED |
8495 I40E_FLAG_MSIX_ENABLED;
8496
8497 /* Set default ITR */
8498 pf->rx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_RX_DEF;
8499 pf->tx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_TX_DEF;
8500
8501 /* Depending on PF configurations, it is possible that the RSS
8502 * maximum might end up larger than the available queues
8503 */
8504 pf->rss_size_max = BIT(pf->hw.func_caps.rss_table_entry_width);
8505 pf->alloc_rss_size = 1;
8506 pf->rss_table_size = pf->hw.func_caps.rss_table_size;
8507 pf->rss_size_max = min_t(int, pf->rss_size_max,
8508 pf->hw.func_caps.num_tx_qp);
8509 if (pf->hw.func_caps.rss) {
8510 pf->flags |= I40E_FLAG_RSS_ENABLED;
8511 pf->alloc_rss_size = min_t(int, pf->rss_size_max,
8512 num_online_cpus());
8513 }
8514
8515 /* MFP mode enabled */
8516 if (pf->hw.func_caps.npar_enable || pf->hw.func_caps.flex10_enable) {
8517 pf->flags |= I40E_FLAG_MFP_ENABLED;
8518 dev_info(&pf->pdev->dev, "MFP mode Enabled\n");
8519 if (i40e_get_npar_bw_setting(pf))
8520 dev_warn(&pf->pdev->dev,
8521 "Could not get NPAR bw settings\n");
8522 else
8523 dev_info(&pf->pdev->dev,
8524 "Min BW = %8.8x, Max BW = %8.8x\n",
8525 pf->npar_min_bw, pf->npar_max_bw);
8526 }
8527
8528 /* FW/NVM is not yet fixed in this regard */
8529 if ((pf->hw.func_caps.fd_filters_guaranteed > 0) ||
8530 (pf->hw.func_caps.fd_filters_best_effort > 0)) {
8531 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
8532 pf->atr_sample_rate = I40E_DEFAULT_ATR_SAMPLE_RATE;
8533 if (pf->flags & I40E_FLAG_MFP_ENABLED &&
8534 pf->hw.num_partitions > 1)
8535 dev_info(&pf->pdev->dev,
8536 "Flow Director Sideband mode Disabled in MFP mode\n");
8537 else
8538 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
8539 pf->fdir_pf_filter_count =
8540 pf->hw.func_caps.fd_filters_guaranteed;
8541 pf->hw.fdir_shared_filter_count =
8542 pf->hw.func_caps.fd_filters_best_effort;
8543 }
8544
8545 if (i40e_is_mac_710(&pf->hw) &&
8546 (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
8547 (pf->hw.aq.fw_maj_ver < 4))) {
8548 pf->flags |= I40E_FLAG_RESTART_AUTONEG;
8549 /* No DCB support for FW < v4.33 */
8550 pf->flags |= I40E_FLAG_NO_DCB_SUPPORT;
8551 }
8552
8553 /* Disable FW LLDP if FW < v4.3 */
8554 if (i40e_is_mac_710(&pf->hw) &&
8555 (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 3)) ||
8556 (pf->hw.aq.fw_maj_ver < 4)))
8557 pf->flags |= I40E_FLAG_STOP_FW_LLDP;
8558
8559 /* Use the FW Set LLDP MIB API if FW > v4.40 */
8560 if (i40e_is_mac_710(&pf->hw) &&
8561 (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver >= 40)) ||
8562 (pf->hw.aq.fw_maj_ver >= 5)))
8563 pf->flags |= I40E_FLAG_USE_SET_LLDP_MIB;
8564
8565 if (pf->hw.func_caps.vmdq) {
8566 pf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI;
8567 pf->flags |= I40E_FLAG_VMDQ_ENABLED;
8568 pf->num_vmdq_qps = i40e_default_queues_per_vmdq(pf);
8569 }
8570
8571 if (pf->hw.func_caps.iwarp) {
8572 pf->flags |= I40E_FLAG_IWARP_ENABLED;
8573 /* IWARP needs one extra vector for CQP just like MISC.*/
8574 pf->num_iwarp_msix = (int)num_online_cpus() + 1;
8575 }
8576
8577 #ifdef I40E_FCOE
8578 i40e_init_pf_fcoe(pf);
8579
8580 #endif /* I40E_FCOE */
8581 #ifdef CONFIG_PCI_IOV
8582 if (pf->hw.func_caps.num_vfs && pf->hw.partition_id == 1) {
8583 pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF;
8584 pf->flags |= I40E_FLAG_SRIOV_ENABLED;
8585 pf->num_req_vfs = min_t(int,
8586 pf->hw.func_caps.num_vfs,
8587 I40E_MAX_VF_COUNT);
8588 }
8589 #endif /* CONFIG_PCI_IOV */
8590 if (pf->hw.mac.type == I40E_MAC_X722) {
8591 pf->flags |= I40E_FLAG_RSS_AQ_CAPABLE |
8592 I40E_FLAG_128_QP_RSS_CAPABLE |
8593 I40E_FLAG_HW_ATR_EVICT_CAPABLE |
8594 I40E_FLAG_OUTER_UDP_CSUM_CAPABLE |
8595 I40E_FLAG_WB_ON_ITR_CAPABLE |
8596 I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE |
8597 I40E_FLAG_NO_PCI_LINK_CHECK |
8598 I40E_FLAG_USE_SET_LLDP_MIB |
8599 I40E_FLAG_GENEVE_OFFLOAD_CAPABLE;
8600 } else if ((pf->hw.aq.api_maj_ver > 1) ||
8601 ((pf->hw.aq.api_maj_ver == 1) &&
8602 (pf->hw.aq.api_min_ver > 4))) {
8603 /* Supported in FW API version higher than 1.4 */
8604 pf->flags |= I40E_FLAG_GENEVE_OFFLOAD_CAPABLE;
8605 pf->auto_disable_flags = I40E_FLAG_HW_ATR_EVICT_CAPABLE;
8606 } else {
8607 pf->auto_disable_flags = I40E_FLAG_HW_ATR_EVICT_CAPABLE;
8608 }
8609
8610 pf->eeprom_version = 0xDEAD;
8611 pf->lan_veb = I40E_NO_VEB;
8612 pf->lan_vsi = I40E_NO_VSI;
8613
8614 /* By default FW has this off for performance reasons */
8615 pf->flags &= ~I40E_FLAG_VEB_STATS_ENABLED;
8616
8617 /* set up queue assignment tracking */
8618 size = sizeof(struct i40e_lump_tracking)
8619 + (sizeof(u16) * pf->hw.func_caps.num_tx_qp);
8620 pf->qp_pile = kzalloc(size, GFP_KERNEL);
8621 if (!pf->qp_pile) {
8622 err = -ENOMEM;
8623 goto sw_init_done;
8624 }
8625 pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp;
8626 pf->qp_pile->search_hint = 0;
8627
8628 pf->tx_timeout_recovery_level = 1;
8629
8630 mutex_init(&pf->switch_mutex);
8631
8632 /* If NPAR is enabled nudge the Tx scheduler */
8633 if (pf->hw.func_caps.npar_enable && (!i40e_get_npar_bw_setting(pf)))
8634 i40e_set_npar_bw_setting(pf);
8635
8636 sw_init_done:
8637 return err;
8638 }
8639
8640 /**
8641 * i40e_set_ntuple - set the ntuple feature flag and take action
8642 * @pf: board private structure to initialize
8643 * @features: the feature set that the stack is suggesting
8644 *
8645 * returns a bool to indicate if reset needs to happen
8646 **/
8647 bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features)
8648 {
8649 bool need_reset = false;
8650
8651 /* Check if Flow Director n-tuple support was enabled or disabled. If
8652 * the state changed, we need to reset.
8653 */
8654 if (features & NETIF_F_NTUPLE) {
8655 /* Enable filters and mark for reset */
8656 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
8657 need_reset = true;
8658 /* enable FD_SB only if there is MSI-X vector */
8659 if (pf->num_fdsb_msix > 0)
8660 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
8661 } else {
8662 /* turn off filters, mark for reset and clear SW filter list */
8663 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
8664 need_reset = true;
8665 i40e_fdir_filter_exit(pf);
8666 }
8667 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
8668 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
8669 /* reset fd counters */
8670 pf->fd_add_err = pf->fd_atr_cnt = pf->fd_tcp_rule = 0;
8671 pf->fdir_pf_active_filters = 0;
8672 /* if ATR was auto disabled it can be re-enabled. */
8673 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
8674 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED)) {
8675 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
8676 if (I40E_DEBUG_FD & pf->hw.debug_mask)
8677 dev_info(&pf->pdev->dev, "ATR re-enabled.\n");
8678 }
8679 }
8680 return need_reset;
8681 }
8682
8683 /**
8684 * i40e_clear_rss_lut - clear the rx hash lookup table
8685 * @vsi: the VSI being configured
8686 **/
8687 static void i40e_clear_rss_lut(struct i40e_vsi *vsi)
8688 {
8689 struct i40e_pf *pf = vsi->back;
8690 struct i40e_hw *hw = &pf->hw;
8691 u16 vf_id = vsi->vf_id;
8692 u8 i;
8693
8694 if (vsi->type == I40E_VSI_MAIN) {
8695 for (i = 0; i <= I40E_PFQF_HLUT_MAX_INDEX; i++)
8696 wr32(hw, I40E_PFQF_HLUT(i), 0);
8697 } else if (vsi->type == I40E_VSI_SRIOV) {
8698 for (i = 0; i <= I40E_VFQF_HLUT_MAX_INDEX; i++)
8699 i40e_write_rx_ctl(hw, I40E_VFQF_HLUT1(i, vf_id), 0);
8700 } else {
8701 dev_err(&pf->pdev->dev, "Cannot set RSS LUT - invalid VSI type\n");
8702 }
8703 }
8704
8705 /**
8706 * i40e_set_features - set the netdev feature flags
8707 * @netdev: ptr to the netdev being adjusted
8708 * @features: the feature set that the stack is suggesting
8709 **/
8710 static int i40e_set_features(struct net_device *netdev,
8711 netdev_features_t features)
8712 {
8713 struct i40e_netdev_priv *np = netdev_priv(netdev);
8714 struct i40e_vsi *vsi = np->vsi;
8715 struct i40e_pf *pf = vsi->back;
8716 bool need_reset;
8717
8718 if (features & NETIF_F_RXHASH && !(netdev->features & NETIF_F_RXHASH))
8719 i40e_pf_config_rss(pf);
8720 else if (!(features & NETIF_F_RXHASH) &&
8721 netdev->features & NETIF_F_RXHASH)
8722 i40e_clear_rss_lut(vsi);
8723
8724 if (features & NETIF_F_HW_VLAN_CTAG_RX)
8725 i40e_vlan_stripping_enable(vsi);
8726 else
8727 i40e_vlan_stripping_disable(vsi);
8728
8729 need_reset = i40e_set_ntuple(pf, features);
8730
8731 if (need_reset)
8732 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
8733
8734 return 0;
8735 }
8736
8737 /**
8738 * i40e_get_udp_port_idx - Lookup a possibly offloaded for Rx UDP port
8739 * @pf: board private structure
8740 * @port: The UDP port to look up
8741 *
8742 * Returns the index number or I40E_MAX_PF_UDP_OFFLOAD_PORTS if port not found
8743 **/
8744 static u8 i40e_get_udp_port_idx(struct i40e_pf *pf, __be16 port)
8745 {
8746 u8 i;
8747
8748 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
8749 if (pf->udp_ports[i].index == port)
8750 return i;
8751 }
8752
8753 return i;
8754 }
8755
8756 /**
8757 * i40e_udp_tunnel_add - Get notifications about UDP tunnel ports that come up
8758 * @netdev: This physical port's netdev
8759 * @ti: Tunnel endpoint information
8760 **/
8761 static void i40e_udp_tunnel_add(struct net_device *netdev,
8762 struct udp_tunnel_info *ti)
8763 {
8764 struct i40e_netdev_priv *np = netdev_priv(netdev);
8765 struct i40e_vsi *vsi = np->vsi;
8766 struct i40e_pf *pf = vsi->back;
8767 __be16 port = ti->port;
8768 u8 next_idx;
8769 u8 idx;
8770
8771 idx = i40e_get_udp_port_idx(pf, port);
8772
8773 /* Check if port already exists */
8774 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8775 netdev_info(netdev, "port %d already offloaded\n",
8776 ntohs(port));
8777 return;
8778 }
8779
8780 /* Now check if there is space to add the new port */
8781 next_idx = i40e_get_udp_port_idx(pf, 0);
8782
8783 if (next_idx == I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
8784 netdev_info(netdev, "maximum number of offloaded UDP ports reached, not adding port %d\n",
8785 ntohs(port));
8786 return;
8787 }
8788
8789 switch (ti->type) {
8790 case UDP_TUNNEL_TYPE_VXLAN:
8791 pf->udp_ports[next_idx].type = I40E_AQC_TUNNEL_TYPE_VXLAN;
8792 break;
8793 case UDP_TUNNEL_TYPE_GENEVE:
8794 if (!(pf->flags & I40E_FLAG_GENEVE_OFFLOAD_CAPABLE))
8795 return;
8796 pf->udp_ports[next_idx].type = I40E_AQC_TUNNEL_TYPE_NGE;
8797 break;
8798 default:
8799 return;
8800 }
8801
8802 /* New port: add it and mark its index in the bitmap */
8803 pf->udp_ports[next_idx].index = port;
8804 pf->pending_udp_bitmap |= BIT_ULL(next_idx);
8805 pf->flags |= I40E_FLAG_UDP_FILTER_SYNC;
8806 }
8807
8808 /**
8809 * i40e_udp_tunnel_del - Get notifications about UDP tunnel ports that go away
8810 * @netdev: This physical port's netdev
8811 * @ti: Tunnel endpoint information
8812 **/
8813 static void i40e_udp_tunnel_del(struct net_device *netdev,
8814 struct udp_tunnel_info *ti)
8815 {
8816 struct i40e_netdev_priv *np = netdev_priv(netdev);
8817 struct i40e_vsi *vsi = np->vsi;
8818 struct i40e_pf *pf = vsi->back;
8819 __be16 port = ti->port;
8820 u8 idx;
8821
8822 idx = i40e_get_udp_port_idx(pf, port);
8823
8824 /* Check if port already exists */
8825 if (idx >= I40E_MAX_PF_UDP_OFFLOAD_PORTS)
8826 goto not_found;
8827
8828 switch (ti->type) {
8829 case UDP_TUNNEL_TYPE_VXLAN:
8830 if (pf->udp_ports[idx].type != I40E_AQC_TUNNEL_TYPE_VXLAN)
8831 goto not_found;
8832 break;
8833 case UDP_TUNNEL_TYPE_GENEVE:
8834 if (pf->udp_ports[idx].type != I40E_AQC_TUNNEL_TYPE_NGE)
8835 goto not_found;
8836 break;
8837 default:
8838 goto not_found;
8839 }
8840
8841 /* if port exists, set it to 0 (mark for deletion)
8842 * and make it pending
8843 */
8844 pf->udp_ports[idx].index = 0;
8845 pf->pending_udp_bitmap |= BIT_ULL(idx);
8846 pf->flags |= I40E_FLAG_UDP_FILTER_SYNC;
8847
8848 return;
8849 not_found:
8850 netdev_warn(netdev, "UDP port %d was not found, not deleting\n",
8851 ntohs(port));
8852 }
8853
8854 static int i40e_get_phys_port_id(struct net_device *netdev,
8855 struct netdev_phys_item_id *ppid)
8856 {
8857 struct i40e_netdev_priv *np = netdev_priv(netdev);
8858 struct i40e_pf *pf = np->vsi->back;
8859 struct i40e_hw *hw = &pf->hw;
8860
8861 if (!(pf->flags & I40E_FLAG_PORT_ID_VALID))
8862 return -EOPNOTSUPP;
8863
8864 ppid->id_len = min_t(int, sizeof(hw->mac.port_addr), sizeof(ppid->id));
8865 memcpy(ppid->id, hw->mac.port_addr, ppid->id_len);
8866
8867 return 0;
8868 }
8869
8870 /**
8871 * i40e_ndo_fdb_add - add an entry to the hardware database
8872 * @ndm: the input from the stack
8873 * @tb: pointer to array of nladdr (unused)
8874 * @dev: the net device pointer
8875 * @addr: the MAC address entry being added
8876 * @flags: instructions from stack about fdb operation
8877 */
8878 static int i40e_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
8879 struct net_device *dev,
8880 const unsigned char *addr, u16 vid,
8881 u16 flags)
8882 {
8883 struct i40e_netdev_priv *np = netdev_priv(dev);
8884 struct i40e_pf *pf = np->vsi->back;
8885 int err = 0;
8886
8887 if (!(pf->flags & I40E_FLAG_SRIOV_ENABLED))
8888 return -EOPNOTSUPP;
8889
8890 if (vid) {
8891 pr_info("%s: vlans aren't supported yet for dev_uc|mc_add()\n", dev->name);
8892 return -EINVAL;
8893 }
8894
8895 /* Hardware does not support aging addresses so if a
8896 * ndm_state is given only allow permanent addresses
8897 */
8898 if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
8899 netdev_info(dev, "FDB only supports static addresses\n");
8900 return -EINVAL;
8901 }
8902
8903 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr))
8904 err = dev_uc_add_excl(dev, addr);
8905 else if (is_multicast_ether_addr(addr))
8906 err = dev_mc_add_excl(dev, addr);
8907 else
8908 err = -EINVAL;
8909
8910 /* Only return duplicate errors if NLM_F_EXCL is set */
8911 if (err == -EEXIST && !(flags & NLM_F_EXCL))
8912 err = 0;
8913
8914 return err;
8915 }
8916
8917 /**
8918 * i40e_ndo_bridge_setlink - Set the hardware bridge mode
8919 * @dev: the netdev being configured
8920 * @nlh: RTNL message
8921 *
8922 * Inserts a new hardware bridge if not already created and
8923 * enables the bridging mode requested (VEB or VEPA). If the
8924 * hardware bridge has already been inserted and the request
8925 * is to change the mode then that requires a PF reset to
8926 * allow rebuild of the components with required hardware
8927 * bridge mode enabled.
8928 **/
8929 static int i40e_ndo_bridge_setlink(struct net_device *dev,
8930 struct nlmsghdr *nlh,
8931 u16 flags)
8932 {
8933 struct i40e_netdev_priv *np = netdev_priv(dev);
8934 struct i40e_vsi *vsi = np->vsi;
8935 struct i40e_pf *pf = vsi->back;
8936 struct i40e_veb *veb = NULL;
8937 struct nlattr *attr, *br_spec;
8938 int i, rem;
8939
8940 /* Only for PF VSI for now */
8941 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
8942 return -EOPNOTSUPP;
8943
8944 /* Find the HW bridge for PF VSI */
8945 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
8946 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
8947 veb = pf->veb[i];
8948 }
8949
8950 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
8951
8952 nla_for_each_nested(attr, br_spec, rem) {
8953 __u16 mode;
8954
8955 if (nla_type(attr) != IFLA_BRIDGE_MODE)
8956 continue;
8957
8958 mode = nla_get_u16(attr);
8959 if ((mode != BRIDGE_MODE_VEPA) &&
8960 (mode != BRIDGE_MODE_VEB))
8961 return -EINVAL;
8962
8963 /* Insert a new HW bridge */
8964 if (!veb) {
8965 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
8966 vsi->tc_config.enabled_tc);
8967 if (veb) {
8968 veb->bridge_mode = mode;
8969 i40e_config_bridge_mode(veb);
8970 } else {
8971 /* No Bridge HW offload available */
8972 return -ENOENT;
8973 }
8974 break;
8975 } else if (mode != veb->bridge_mode) {
8976 /* Existing HW bridge but different mode needs reset */
8977 veb->bridge_mode = mode;
8978 /* TODO: If no VFs or VMDq VSIs, disallow VEB mode */
8979 if (mode == BRIDGE_MODE_VEB)
8980 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
8981 else
8982 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
8983 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
8984 break;
8985 }
8986 }
8987
8988 return 0;
8989 }
8990
8991 /**
8992 * i40e_ndo_bridge_getlink - Get the hardware bridge mode
8993 * @skb: skb buff
8994 * @pid: process id
8995 * @seq: RTNL message seq #
8996 * @dev: the netdev being configured
8997 * @filter_mask: unused
8998 * @nlflags: netlink flags passed in
8999 *
9000 * Return the mode in which the hardware bridge is operating in
9001 * i.e VEB or VEPA.
9002 **/
9003 static int i40e_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
9004 struct net_device *dev,
9005 u32 __always_unused filter_mask,
9006 int nlflags)
9007 {
9008 struct i40e_netdev_priv *np = netdev_priv(dev);
9009 struct i40e_vsi *vsi = np->vsi;
9010 struct i40e_pf *pf = vsi->back;
9011 struct i40e_veb *veb = NULL;
9012 int i;
9013
9014 /* Only for PF VSI for now */
9015 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
9016 return -EOPNOTSUPP;
9017
9018 /* Find the HW bridge for the PF VSI */
9019 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
9020 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
9021 veb = pf->veb[i];
9022 }
9023
9024 if (!veb)
9025 return 0;
9026
9027 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, veb->bridge_mode,
9028 0, 0, nlflags, filter_mask, NULL);
9029 }
9030
9031 /* Hardware supports L4 tunnel length of 128B (=2^7) which includes
9032 * inner mac plus all inner ethertypes.
9033 */
9034 #define I40E_MAX_TUNNEL_HDR_LEN 128
9035 /**
9036 * i40e_features_check - Validate encapsulated packet conforms to limits
9037 * @skb: skb buff
9038 * @dev: This physical port's netdev
9039 * @features: Offload features that the stack believes apply
9040 **/
9041 static netdev_features_t i40e_features_check(struct sk_buff *skb,
9042 struct net_device *dev,
9043 netdev_features_t features)
9044 {
9045 if (skb->encapsulation &&
9046 ((skb_inner_network_header(skb) - skb_transport_header(skb)) >
9047 I40E_MAX_TUNNEL_HDR_LEN))
9048 return features & ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK);
9049
9050 return features;
9051 }
9052
9053 static const struct net_device_ops i40e_netdev_ops = {
9054 .ndo_open = i40e_open,
9055 .ndo_stop = i40e_close,
9056 .ndo_start_xmit = i40e_lan_xmit_frame,
9057 .ndo_get_stats64 = i40e_get_netdev_stats_struct,
9058 .ndo_set_rx_mode = i40e_set_rx_mode,
9059 .ndo_validate_addr = eth_validate_addr,
9060 .ndo_set_mac_address = i40e_set_mac,
9061 .ndo_change_mtu = i40e_change_mtu,
9062 .ndo_do_ioctl = i40e_ioctl,
9063 .ndo_tx_timeout = i40e_tx_timeout,
9064 .ndo_vlan_rx_add_vid = i40e_vlan_rx_add_vid,
9065 .ndo_vlan_rx_kill_vid = i40e_vlan_rx_kill_vid,
9066 #ifdef CONFIG_NET_POLL_CONTROLLER
9067 .ndo_poll_controller = i40e_netpoll,
9068 #endif
9069 .ndo_setup_tc = __i40e_setup_tc,
9070 #ifdef I40E_FCOE
9071 .ndo_fcoe_enable = i40e_fcoe_enable,
9072 .ndo_fcoe_disable = i40e_fcoe_disable,
9073 #endif
9074 .ndo_set_features = i40e_set_features,
9075 .ndo_set_vf_mac = i40e_ndo_set_vf_mac,
9076 .ndo_set_vf_vlan = i40e_ndo_set_vf_port_vlan,
9077 .ndo_set_vf_rate = i40e_ndo_set_vf_bw,
9078 .ndo_get_vf_config = i40e_ndo_get_vf_config,
9079 .ndo_set_vf_link_state = i40e_ndo_set_vf_link_state,
9080 .ndo_set_vf_spoofchk = i40e_ndo_set_vf_spoofchk,
9081 .ndo_set_vf_trust = i40e_ndo_set_vf_trust,
9082 .ndo_udp_tunnel_add = i40e_udp_tunnel_add,
9083 .ndo_udp_tunnel_del = i40e_udp_tunnel_del,
9084 .ndo_get_phys_port_id = i40e_get_phys_port_id,
9085 .ndo_fdb_add = i40e_ndo_fdb_add,
9086 .ndo_features_check = i40e_features_check,
9087 .ndo_bridge_getlink = i40e_ndo_bridge_getlink,
9088 .ndo_bridge_setlink = i40e_ndo_bridge_setlink,
9089 };
9090
9091 /**
9092 * i40e_config_netdev - Setup the netdev flags
9093 * @vsi: the VSI being configured
9094 *
9095 * Returns 0 on success, negative value on failure
9096 **/
9097 static int i40e_config_netdev(struct i40e_vsi *vsi)
9098 {
9099 struct i40e_pf *pf = vsi->back;
9100 struct i40e_hw *hw = &pf->hw;
9101 struct i40e_netdev_priv *np;
9102 struct net_device *netdev;
9103 u8 mac_addr[ETH_ALEN];
9104 int etherdev_size;
9105
9106 etherdev_size = sizeof(struct i40e_netdev_priv);
9107 netdev = alloc_etherdev_mq(etherdev_size, vsi->alloc_queue_pairs);
9108 if (!netdev)
9109 return -ENOMEM;
9110
9111 vsi->netdev = netdev;
9112 np = netdev_priv(netdev);
9113 np->vsi = vsi;
9114
9115 netdev->hw_enc_features |= NETIF_F_SG |
9116 NETIF_F_IP_CSUM |
9117 NETIF_F_IPV6_CSUM |
9118 NETIF_F_HIGHDMA |
9119 NETIF_F_SOFT_FEATURES |
9120 NETIF_F_TSO |
9121 NETIF_F_TSO_ECN |
9122 NETIF_F_TSO6 |
9123 NETIF_F_GSO_GRE |
9124 NETIF_F_GSO_GRE_CSUM |
9125 NETIF_F_GSO_IPXIP4 |
9126 NETIF_F_GSO_IPXIP6 |
9127 NETIF_F_GSO_UDP_TUNNEL |
9128 NETIF_F_GSO_UDP_TUNNEL_CSUM |
9129 NETIF_F_GSO_PARTIAL |
9130 NETIF_F_SCTP_CRC |
9131 NETIF_F_RXHASH |
9132 NETIF_F_RXCSUM |
9133 0;
9134
9135 if (!(pf->flags & I40E_FLAG_OUTER_UDP_CSUM_CAPABLE))
9136 netdev->gso_partial_features |= NETIF_F_GSO_UDP_TUNNEL_CSUM;
9137
9138 netdev->gso_partial_features |= NETIF_F_GSO_GRE_CSUM;
9139
9140 /* record features VLANs can make use of */
9141 netdev->vlan_features |= netdev->hw_enc_features |
9142 NETIF_F_TSO_MANGLEID;
9143
9144 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
9145 netdev->hw_features |= NETIF_F_NTUPLE;
9146
9147 netdev->hw_features |= netdev->hw_enc_features |
9148 NETIF_F_HW_VLAN_CTAG_TX |
9149 NETIF_F_HW_VLAN_CTAG_RX;
9150
9151 netdev->features |= netdev->hw_features | NETIF_F_HW_VLAN_CTAG_FILTER;
9152 netdev->hw_enc_features |= NETIF_F_TSO_MANGLEID;
9153
9154 if (vsi->type == I40E_VSI_MAIN) {
9155 SET_NETDEV_DEV(netdev, &pf->pdev->dev);
9156 ether_addr_copy(mac_addr, hw->mac.perm_addr);
9157 spin_lock_bh(&vsi->mac_filter_list_lock);
9158 i40e_add_filter(vsi, mac_addr, I40E_VLAN_ANY, false, true);
9159 spin_unlock_bh(&vsi->mac_filter_list_lock);
9160 } else {
9161 /* relate the VSI_VMDQ name to the VSI_MAIN name */
9162 snprintf(netdev->name, IFNAMSIZ, "%sv%%d",
9163 pf->vsi[pf->lan_vsi]->netdev->name);
9164 random_ether_addr(mac_addr);
9165
9166 spin_lock_bh(&vsi->mac_filter_list_lock);
9167 i40e_add_filter(vsi, mac_addr, I40E_VLAN_ANY, false, false);
9168 spin_unlock_bh(&vsi->mac_filter_list_lock);
9169 }
9170
9171 ether_addr_copy(netdev->dev_addr, mac_addr);
9172 ether_addr_copy(netdev->perm_addr, mac_addr);
9173
9174 netdev->priv_flags |= IFF_UNICAST_FLT;
9175 netdev->priv_flags |= IFF_SUPP_NOFCS;
9176 /* Setup netdev TC information */
9177 i40e_vsi_config_netdev_tc(vsi, vsi->tc_config.enabled_tc);
9178
9179 netdev->netdev_ops = &i40e_netdev_ops;
9180 netdev->watchdog_timeo = 5 * HZ;
9181 i40e_set_ethtool_ops(netdev);
9182 #ifdef I40E_FCOE
9183 i40e_fcoe_config_netdev(netdev, vsi);
9184 #endif
9185
9186 /* MTU range: 68 - 9706 */
9187 netdev->min_mtu = ETH_MIN_MTU;
9188 netdev->max_mtu = I40E_MAX_RXBUFFER -
9189 (ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN);
9190
9191 return 0;
9192 }
9193
9194 /**
9195 * i40e_vsi_delete - Delete a VSI from the switch
9196 * @vsi: the VSI being removed
9197 *
9198 * Returns 0 on success, negative value on failure
9199 **/
9200 static void i40e_vsi_delete(struct i40e_vsi *vsi)
9201 {
9202 /* remove default VSI is not allowed */
9203 if (vsi == vsi->back->vsi[vsi->back->lan_vsi])
9204 return;
9205
9206 i40e_aq_delete_element(&vsi->back->hw, vsi->seid, NULL);
9207 }
9208
9209 /**
9210 * i40e_is_vsi_uplink_mode_veb - Check if the VSI's uplink bridge mode is VEB
9211 * @vsi: the VSI being queried
9212 *
9213 * Returns 1 if HW bridge mode is VEB and return 0 in case of VEPA mode
9214 **/
9215 int i40e_is_vsi_uplink_mode_veb(struct i40e_vsi *vsi)
9216 {
9217 struct i40e_veb *veb;
9218 struct i40e_pf *pf = vsi->back;
9219
9220 /* Uplink is not a bridge so default to VEB */
9221 if (vsi->veb_idx == I40E_NO_VEB)
9222 return 1;
9223
9224 veb = pf->veb[vsi->veb_idx];
9225 if (!veb) {
9226 dev_info(&pf->pdev->dev,
9227 "There is no veb associated with the bridge\n");
9228 return -ENOENT;
9229 }
9230
9231 /* Uplink is a bridge in VEPA mode */
9232 if (veb->bridge_mode & BRIDGE_MODE_VEPA) {
9233 return 0;
9234 } else {
9235 /* Uplink is a bridge in VEB mode */
9236 return 1;
9237 }
9238
9239 /* VEPA is now default bridge, so return 0 */
9240 return 0;
9241 }
9242
9243 /**
9244 * i40e_add_vsi - Add a VSI to the switch
9245 * @vsi: the VSI being configured
9246 *
9247 * This initializes a VSI context depending on the VSI type to be added and
9248 * passes it down to the add_vsi aq command.
9249 **/
9250 static int i40e_add_vsi(struct i40e_vsi *vsi)
9251 {
9252 int ret = -ENODEV;
9253 i40e_status aq_ret = 0;
9254 struct i40e_pf *pf = vsi->back;
9255 struct i40e_hw *hw = &pf->hw;
9256 struct i40e_vsi_context ctxt;
9257 struct i40e_mac_filter *f, *ftmp;
9258
9259 u8 enabled_tc = 0x1; /* TC0 enabled */
9260 int f_count = 0;
9261
9262 memset(&ctxt, 0, sizeof(ctxt));
9263 switch (vsi->type) {
9264 case I40E_VSI_MAIN:
9265 /* The PF's main VSI is already setup as part of the
9266 * device initialization, so we'll not bother with
9267 * the add_vsi call, but we will retrieve the current
9268 * VSI context.
9269 */
9270 ctxt.seid = pf->main_vsi_seid;
9271 ctxt.pf_num = pf->hw.pf_id;
9272 ctxt.vf_num = 0;
9273 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
9274 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
9275 if (ret) {
9276 dev_info(&pf->pdev->dev,
9277 "couldn't get PF vsi config, err %s aq_err %s\n",
9278 i40e_stat_str(&pf->hw, ret),
9279 i40e_aq_str(&pf->hw,
9280 pf->hw.aq.asq_last_status));
9281 return -ENOENT;
9282 }
9283 vsi->info = ctxt.info;
9284 vsi->info.valid_sections = 0;
9285
9286 vsi->seid = ctxt.seid;
9287 vsi->id = ctxt.vsi_number;
9288
9289 enabled_tc = i40e_pf_get_tc_map(pf);
9290
9291 /* MFP mode setup queue map and update VSI */
9292 if ((pf->flags & I40E_FLAG_MFP_ENABLED) &&
9293 !(pf->hw.func_caps.iscsi)) { /* NIC type PF */
9294 memset(&ctxt, 0, sizeof(ctxt));
9295 ctxt.seid = pf->main_vsi_seid;
9296 ctxt.pf_num = pf->hw.pf_id;
9297 ctxt.vf_num = 0;
9298 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
9299 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
9300 if (ret) {
9301 dev_info(&pf->pdev->dev,
9302 "update vsi failed, err %s aq_err %s\n",
9303 i40e_stat_str(&pf->hw, ret),
9304 i40e_aq_str(&pf->hw,
9305 pf->hw.aq.asq_last_status));
9306 ret = -ENOENT;
9307 goto err;
9308 }
9309 /* update the local VSI info queue map */
9310 i40e_vsi_update_queue_map(vsi, &ctxt);
9311 vsi->info.valid_sections = 0;
9312 } else {
9313 /* Default/Main VSI is only enabled for TC0
9314 * reconfigure it to enable all TCs that are
9315 * available on the port in SFP mode.
9316 * For MFP case the iSCSI PF would use this
9317 * flow to enable LAN+iSCSI TC.
9318 */
9319 ret = i40e_vsi_config_tc(vsi, enabled_tc);
9320 if (ret) {
9321 dev_info(&pf->pdev->dev,
9322 "failed to configure TCs for main VSI tc_map 0x%08x, err %s aq_err %s\n",
9323 enabled_tc,
9324 i40e_stat_str(&pf->hw, ret),
9325 i40e_aq_str(&pf->hw,
9326 pf->hw.aq.asq_last_status));
9327 ret = -ENOENT;
9328 }
9329 }
9330 break;
9331
9332 case I40E_VSI_FDIR:
9333 ctxt.pf_num = hw->pf_id;
9334 ctxt.vf_num = 0;
9335 ctxt.uplink_seid = vsi->uplink_seid;
9336 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
9337 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
9338 if ((pf->flags & I40E_FLAG_VEB_MODE_ENABLED) &&
9339 (i40e_is_vsi_uplink_mode_veb(vsi))) {
9340 ctxt.info.valid_sections |=
9341 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
9342 ctxt.info.switch_id =
9343 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
9344 }
9345 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
9346 break;
9347
9348 case I40E_VSI_VMDQ2:
9349 ctxt.pf_num = hw->pf_id;
9350 ctxt.vf_num = 0;
9351 ctxt.uplink_seid = vsi->uplink_seid;
9352 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
9353 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2;
9354
9355 /* This VSI is connected to VEB so the switch_id
9356 * should be set to zero by default.
9357 */
9358 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
9359 ctxt.info.valid_sections |=
9360 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
9361 ctxt.info.switch_id =
9362 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
9363 }
9364
9365 /* Setup the VSI tx/rx queue map for TC0 only for now */
9366 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
9367 break;
9368
9369 case I40E_VSI_SRIOV:
9370 ctxt.pf_num = hw->pf_id;
9371 ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id;
9372 ctxt.uplink_seid = vsi->uplink_seid;
9373 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
9374 ctxt.flags = I40E_AQ_VSI_TYPE_VF;
9375
9376 /* This VSI is connected to VEB so the switch_id
9377 * should be set to zero by default.
9378 */
9379 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
9380 ctxt.info.valid_sections |=
9381 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
9382 ctxt.info.switch_id =
9383 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
9384 }
9385
9386 if (vsi->back->flags & I40E_FLAG_IWARP_ENABLED) {
9387 ctxt.info.valid_sections |=
9388 cpu_to_le16(I40E_AQ_VSI_PROP_QUEUE_OPT_VALID);
9389 ctxt.info.queueing_opt_flags |=
9390 (I40E_AQ_VSI_QUE_OPT_TCP_ENA |
9391 I40E_AQ_VSI_QUE_OPT_RSS_LUT_VSI);
9392 }
9393
9394 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
9395 ctxt.info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_MODE_ALL;
9396 if (pf->vf[vsi->vf_id].spoofchk) {
9397 ctxt.info.valid_sections |=
9398 cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID);
9399 ctxt.info.sec_flags |=
9400 (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK |
9401 I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK);
9402 }
9403 /* Setup the VSI tx/rx queue map for TC0 only for now */
9404 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
9405 break;
9406
9407 #ifdef I40E_FCOE
9408 case I40E_VSI_FCOE:
9409 ret = i40e_fcoe_vsi_init(vsi, &ctxt);
9410 if (ret) {
9411 dev_info(&pf->pdev->dev, "failed to initialize FCoE VSI\n");
9412 return ret;
9413 }
9414 break;
9415
9416 #endif /* I40E_FCOE */
9417 case I40E_VSI_IWARP:
9418 /* send down message to iWARP */
9419 break;
9420
9421 default:
9422 return -ENODEV;
9423 }
9424
9425 if (vsi->type != I40E_VSI_MAIN) {
9426 ret = i40e_aq_add_vsi(hw, &ctxt, NULL);
9427 if (ret) {
9428 dev_info(&vsi->back->pdev->dev,
9429 "add vsi failed, err %s aq_err %s\n",
9430 i40e_stat_str(&pf->hw, ret),
9431 i40e_aq_str(&pf->hw,
9432 pf->hw.aq.asq_last_status));
9433 ret = -ENOENT;
9434 goto err;
9435 }
9436 vsi->info = ctxt.info;
9437 vsi->info.valid_sections = 0;
9438 vsi->seid = ctxt.seid;
9439 vsi->id = ctxt.vsi_number;
9440 }
9441 /* Except FDIR VSI, for all othet VSI set the broadcast filter */
9442 if (vsi->type != I40E_VSI_FDIR) {
9443 aq_ret = i40e_aq_set_vsi_broadcast(hw, vsi->seid, true, NULL);
9444 if (aq_ret) {
9445 ret = i40e_aq_rc_to_posix(aq_ret,
9446 hw->aq.asq_last_status);
9447 dev_info(&pf->pdev->dev,
9448 "set brdcast promisc failed, err %s, aq_err %s\n",
9449 i40e_stat_str(hw, aq_ret),
9450 i40e_aq_str(hw, hw->aq.asq_last_status));
9451 }
9452 }
9453
9454 vsi->active_filters = 0;
9455 clear_bit(__I40E_FILTER_OVERFLOW_PROMISC, &vsi->state);
9456 spin_lock_bh(&vsi->mac_filter_list_lock);
9457 /* If macvlan filters already exist, force them to get loaded */
9458 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
9459 f->state = I40E_FILTER_NEW;
9460 f_count++;
9461 }
9462 spin_unlock_bh(&vsi->mac_filter_list_lock);
9463
9464 if (f_count) {
9465 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
9466 pf->flags |= I40E_FLAG_FILTER_SYNC;
9467 }
9468
9469 /* Update VSI BW information */
9470 ret = i40e_vsi_get_bw_info(vsi);
9471 if (ret) {
9472 dev_info(&pf->pdev->dev,
9473 "couldn't get vsi bw info, err %s aq_err %s\n",
9474 i40e_stat_str(&pf->hw, ret),
9475 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
9476 /* VSI is already added so not tearing that up */
9477 ret = 0;
9478 }
9479
9480 err:
9481 return ret;
9482 }
9483
9484 /**
9485 * i40e_vsi_release - Delete a VSI and free its resources
9486 * @vsi: the VSI being removed
9487 *
9488 * Returns 0 on success or < 0 on error
9489 **/
9490 int i40e_vsi_release(struct i40e_vsi *vsi)
9491 {
9492 struct i40e_mac_filter *f, *ftmp;
9493 struct i40e_veb *veb = NULL;
9494 struct i40e_pf *pf;
9495 u16 uplink_seid;
9496 int i, n;
9497
9498 pf = vsi->back;
9499
9500 /* release of a VEB-owner or last VSI is not allowed */
9501 if (vsi->flags & I40E_VSI_FLAG_VEB_OWNER) {
9502 dev_info(&pf->pdev->dev, "VSI %d has existing VEB %d\n",
9503 vsi->seid, vsi->uplink_seid);
9504 return -ENODEV;
9505 }
9506 if (vsi == pf->vsi[pf->lan_vsi] &&
9507 !test_bit(__I40E_DOWN, &pf->state)) {
9508 dev_info(&pf->pdev->dev, "Can't remove PF VSI\n");
9509 return -ENODEV;
9510 }
9511
9512 uplink_seid = vsi->uplink_seid;
9513 if (vsi->type != I40E_VSI_SRIOV) {
9514 if (vsi->netdev_registered) {
9515 vsi->netdev_registered = false;
9516 if (vsi->netdev) {
9517 /* results in a call to i40e_close() */
9518 unregister_netdev(vsi->netdev);
9519 }
9520 } else {
9521 i40e_vsi_close(vsi);
9522 }
9523 i40e_vsi_disable_irq(vsi);
9524 }
9525
9526 spin_lock_bh(&vsi->mac_filter_list_lock);
9527 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list)
9528 i40e_del_filter(vsi, f->macaddr, f->vlan,
9529 f->is_vf, f->is_netdev);
9530 spin_unlock_bh(&vsi->mac_filter_list_lock);
9531
9532 i40e_sync_vsi_filters(vsi);
9533
9534 i40e_vsi_delete(vsi);
9535 i40e_vsi_free_q_vectors(vsi);
9536 if (vsi->netdev) {
9537 free_netdev(vsi->netdev);
9538 vsi->netdev = NULL;
9539 }
9540 i40e_vsi_clear_rings(vsi);
9541 i40e_vsi_clear(vsi);
9542
9543 /* If this was the last thing on the VEB, except for the
9544 * controlling VSI, remove the VEB, which puts the controlling
9545 * VSI onto the next level down in the switch.
9546 *
9547 * Well, okay, there's one more exception here: don't remove
9548 * the orphan VEBs yet. We'll wait for an explicit remove request
9549 * from up the network stack.
9550 */
9551 for (n = 0, i = 0; i < pf->num_alloc_vsi; i++) {
9552 if (pf->vsi[i] &&
9553 pf->vsi[i]->uplink_seid == uplink_seid &&
9554 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
9555 n++; /* count the VSIs */
9556 }
9557 }
9558 for (i = 0; i < I40E_MAX_VEB; i++) {
9559 if (!pf->veb[i])
9560 continue;
9561 if (pf->veb[i]->uplink_seid == uplink_seid)
9562 n++; /* count the VEBs */
9563 if (pf->veb[i]->seid == uplink_seid)
9564 veb = pf->veb[i];
9565 }
9566 if (n == 0 && veb && veb->uplink_seid != 0)
9567 i40e_veb_release(veb);
9568
9569 return 0;
9570 }
9571
9572 /**
9573 * i40e_vsi_setup_vectors - Set up the q_vectors for the given VSI
9574 * @vsi: ptr to the VSI
9575 *
9576 * This should only be called after i40e_vsi_mem_alloc() which allocates the
9577 * corresponding SW VSI structure and initializes num_queue_pairs for the
9578 * newly allocated VSI.
9579 *
9580 * Returns 0 on success or negative on failure
9581 **/
9582 static int i40e_vsi_setup_vectors(struct i40e_vsi *vsi)
9583 {
9584 int ret = -ENOENT;
9585 struct i40e_pf *pf = vsi->back;
9586
9587 if (vsi->q_vectors[0]) {
9588 dev_info(&pf->pdev->dev, "VSI %d has existing q_vectors\n",
9589 vsi->seid);
9590 return -EEXIST;
9591 }
9592
9593 if (vsi->base_vector) {
9594 dev_info(&pf->pdev->dev, "VSI %d has non-zero base vector %d\n",
9595 vsi->seid, vsi->base_vector);
9596 return -EEXIST;
9597 }
9598
9599 ret = i40e_vsi_alloc_q_vectors(vsi);
9600 if (ret) {
9601 dev_info(&pf->pdev->dev,
9602 "failed to allocate %d q_vector for VSI %d, ret=%d\n",
9603 vsi->num_q_vectors, vsi->seid, ret);
9604 vsi->num_q_vectors = 0;
9605 goto vector_setup_out;
9606 }
9607
9608 /* In Legacy mode, we do not have to get any other vector since we
9609 * piggyback on the misc/ICR0 for queue interrupts.
9610 */
9611 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
9612 return ret;
9613 if (vsi->num_q_vectors)
9614 vsi->base_vector = i40e_get_lump(pf, pf->irq_pile,
9615 vsi->num_q_vectors, vsi->idx);
9616 if (vsi->base_vector < 0) {
9617 dev_info(&pf->pdev->dev,
9618 "failed to get tracking for %d vectors for VSI %d, err=%d\n",
9619 vsi->num_q_vectors, vsi->seid, vsi->base_vector);
9620 i40e_vsi_free_q_vectors(vsi);
9621 ret = -ENOENT;
9622 goto vector_setup_out;
9623 }
9624
9625 vector_setup_out:
9626 return ret;
9627 }
9628
9629 /**
9630 * i40e_vsi_reinit_setup - return and reallocate resources for a VSI
9631 * @vsi: pointer to the vsi.
9632 *
9633 * This re-allocates a vsi's queue resources.
9634 *
9635 * Returns pointer to the successfully allocated and configured VSI sw struct
9636 * on success, otherwise returns NULL on failure.
9637 **/
9638 static struct i40e_vsi *i40e_vsi_reinit_setup(struct i40e_vsi *vsi)
9639 {
9640 struct i40e_pf *pf;
9641 u8 enabled_tc;
9642 int ret;
9643
9644 if (!vsi)
9645 return NULL;
9646
9647 pf = vsi->back;
9648
9649 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
9650 i40e_vsi_clear_rings(vsi);
9651
9652 i40e_vsi_free_arrays(vsi, false);
9653 i40e_set_num_rings_in_vsi(vsi);
9654 ret = i40e_vsi_alloc_arrays(vsi, false);
9655 if (ret)
9656 goto err_vsi;
9657
9658 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs, vsi->idx);
9659 if (ret < 0) {
9660 dev_info(&pf->pdev->dev,
9661 "failed to get tracking for %d queues for VSI %d err %d\n",
9662 vsi->alloc_queue_pairs, vsi->seid, ret);
9663 goto err_vsi;
9664 }
9665 vsi->base_queue = ret;
9666
9667 /* Update the FW view of the VSI. Force a reset of TC and queue
9668 * layout configurations.
9669 */
9670 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
9671 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
9672 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
9673 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
9674
9675 /* assign it some queues */
9676 ret = i40e_alloc_rings(vsi);
9677 if (ret)
9678 goto err_rings;
9679
9680 /* map all of the rings to the q_vectors */
9681 i40e_vsi_map_rings_to_vectors(vsi);
9682 return vsi;
9683
9684 err_rings:
9685 i40e_vsi_free_q_vectors(vsi);
9686 if (vsi->netdev_registered) {
9687 vsi->netdev_registered = false;
9688 unregister_netdev(vsi->netdev);
9689 free_netdev(vsi->netdev);
9690 vsi->netdev = NULL;
9691 }
9692 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
9693 err_vsi:
9694 i40e_vsi_clear(vsi);
9695 return NULL;
9696 }
9697
9698 /**
9699 * i40e_vsi_setup - Set up a VSI by a given type
9700 * @pf: board private structure
9701 * @type: VSI type
9702 * @uplink_seid: the switch element to link to
9703 * @param1: usage depends upon VSI type. For VF types, indicates VF id
9704 *
9705 * This allocates the sw VSI structure and its queue resources, then add a VSI
9706 * to the identified VEB.
9707 *
9708 * Returns pointer to the successfully allocated and configure VSI sw struct on
9709 * success, otherwise returns NULL on failure.
9710 **/
9711 struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
9712 u16 uplink_seid, u32 param1)
9713 {
9714 struct i40e_vsi *vsi = NULL;
9715 struct i40e_veb *veb = NULL;
9716 int ret, i;
9717 int v_idx;
9718
9719 /* The requested uplink_seid must be either
9720 * - the PF's port seid
9721 * no VEB is needed because this is the PF
9722 * or this is a Flow Director special case VSI
9723 * - seid of an existing VEB
9724 * - seid of a VSI that owns an existing VEB
9725 * - seid of a VSI that doesn't own a VEB
9726 * a new VEB is created and the VSI becomes the owner
9727 * - seid of the PF VSI, which is what creates the first VEB
9728 * this is a special case of the previous
9729 *
9730 * Find which uplink_seid we were given and create a new VEB if needed
9731 */
9732 for (i = 0; i < I40E_MAX_VEB; i++) {
9733 if (pf->veb[i] && pf->veb[i]->seid == uplink_seid) {
9734 veb = pf->veb[i];
9735 break;
9736 }
9737 }
9738
9739 if (!veb && uplink_seid != pf->mac_seid) {
9740
9741 for (i = 0; i < pf->num_alloc_vsi; i++) {
9742 if (pf->vsi[i] && pf->vsi[i]->seid == uplink_seid) {
9743 vsi = pf->vsi[i];
9744 break;
9745 }
9746 }
9747 if (!vsi) {
9748 dev_info(&pf->pdev->dev, "no such uplink_seid %d\n",
9749 uplink_seid);
9750 return NULL;
9751 }
9752
9753 if (vsi->uplink_seid == pf->mac_seid)
9754 veb = i40e_veb_setup(pf, 0, pf->mac_seid, vsi->seid,
9755 vsi->tc_config.enabled_tc);
9756 else if ((vsi->flags & I40E_VSI_FLAG_VEB_OWNER) == 0)
9757 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
9758 vsi->tc_config.enabled_tc);
9759 if (veb) {
9760 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid) {
9761 dev_info(&vsi->back->pdev->dev,
9762 "New VSI creation error, uplink seid of LAN VSI expected.\n");
9763 return NULL;
9764 }
9765 /* We come up by default in VEPA mode if SRIOV is not
9766 * already enabled, in which case we can't force VEPA
9767 * mode.
9768 */
9769 if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) {
9770 veb->bridge_mode = BRIDGE_MODE_VEPA;
9771 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
9772 }
9773 i40e_config_bridge_mode(veb);
9774 }
9775 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
9776 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
9777 veb = pf->veb[i];
9778 }
9779 if (!veb) {
9780 dev_info(&pf->pdev->dev, "couldn't add VEB\n");
9781 return NULL;
9782 }
9783
9784 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
9785 uplink_seid = veb->seid;
9786 }
9787
9788 /* get vsi sw struct */
9789 v_idx = i40e_vsi_mem_alloc(pf, type);
9790 if (v_idx < 0)
9791 goto err_alloc;
9792 vsi = pf->vsi[v_idx];
9793 if (!vsi)
9794 goto err_alloc;
9795 vsi->type = type;
9796 vsi->veb_idx = (veb ? veb->idx : I40E_NO_VEB);
9797
9798 if (type == I40E_VSI_MAIN)
9799 pf->lan_vsi = v_idx;
9800 else if (type == I40E_VSI_SRIOV)
9801 vsi->vf_id = param1;
9802 /* assign it some queues */
9803 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs,
9804 vsi->idx);
9805 if (ret < 0) {
9806 dev_info(&pf->pdev->dev,
9807 "failed to get tracking for %d queues for VSI %d err=%d\n",
9808 vsi->alloc_queue_pairs, vsi->seid, ret);
9809 goto err_vsi;
9810 }
9811 vsi->base_queue = ret;
9812
9813 /* get a VSI from the hardware */
9814 vsi->uplink_seid = uplink_seid;
9815 ret = i40e_add_vsi(vsi);
9816 if (ret)
9817 goto err_vsi;
9818
9819 switch (vsi->type) {
9820 /* setup the netdev if needed */
9821 case I40E_VSI_MAIN:
9822 /* Apply relevant filters if a platform-specific mac
9823 * address was selected.
9824 */
9825 if (!!(pf->flags & I40E_FLAG_PF_MAC)) {
9826 ret = i40e_macaddr_init(vsi, pf->hw.mac.addr);
9827 if (ret) {
9828 dev_warn(&pf->pdev->dev,
9829 "could not set up macaddr; err %d\n",
9830 ret);
9831 }
9832 }
9833 case I40E_VSI_VMDQ2:
9834 case I40E_VSI_FCOE:
9835 ret = i40e_config_netdev(vsi);
9836 if (ret)
9837 goto err_netdev;
9838 ret = register_netdev(vsi->netdev);
9839 if (ret)
9840 goto err_netdev;
9841 vsi->netdev_registered = true;
9842 netif_carrier_off(vsi->netdev);
9843 #ifdef CONFIG_I40E_DCB
9844 /* Setup DCB netlink interface */
9845 i40e_dcbnl_setup(vsi);
9846 #endif /* CONFIG_I40E_DCB */
9847 /* fall through */
9848
9849 case I40E_VSI_FDIR:
9850 /* set up vectors and rings if needed */
9851 ret = i40e_vsi_setup_vectors(vsi);
9852 if (ret)
9853 goto err_msix;
9854
9855 ret = i40e_alloc_rings(vsi);
9856 if (ret)
9857 goto err_rings;
9858
9859 /* map all of the rings to the q_vectors */
9860 i40e_vsi_map_rings_to_vectors(vsi);
9861
9862 i40e_vsi_reset_stats(vsi);
9863 break;
9864
9865 default:
9866 /* no netdev or rings for the other VSI types */
9867 break;
9868 }
9869
9870 if ((pf->flags & I40E_FLAG_RSS_AQ_CAPABLE) &&
9871 (vsi->type == I40E_VSI_VMDQ2)) {
9872 ret = i40e_vsi_config_rss(vsi);
9873 }
9874 return vsi;
9875
9876 err_rings:
9877 i40e_vsi_free_q_vectors(vsi);
9878 err_msix:
9879 if (vsi->netdev_registered) {
9880 vsi->netdev_registered = false;
9881 unregister_netdev(vsi->netdev);
9882 free_netdev(vsi->netdev);
9883 vsi->netdev = NULL;
9884 }
9885 err_netdev:
9886 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
9887 err_vsi:
9888 i40e_vsi_clear(vsi);
9889 err_alloc:
9890 return NULL;
9891 }
9892
9893 /**
9894 * i40e_veb_get_bw_info - Query VEB BW information
9895 * @veb: the veb to query
9896 *
9897 * Query the Tx scheduler BW configuration data for given VEB
9898 **/
9899 static int i40e_veb_get_bw_info(struct i40e_veb *veb)
9900 {
9901 struct i40e_aqc_query_switching_comp_ets_config_resp ets_data;
9902 struct i40e_aqc_query_switching_comp_bw_config_resp bw_data;
9903 struct i40e_pf *pf = veb->pf;
9904 struct i40e_hw *hw = &pf->hw;
9905 u32 tc_bw_max;
9906 int ret = 0;
9907 int i;
9908
9909 ret = i40e_aq_query_switch_comp_bw_config(hw, veb->seid,
9910 &bw_data, NULL);
9911 if (ret) {
9912 dev_info(&pf->pdev->dev,
9913 "query veb bw config failed, err %s aq_err %s\n",
9914 i40e_stat_str(&pf->hw, ret),
9915 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
9916 goto out;
9917 }
9918
9919 ret = i40e_aq_query_switch_comp_ets_config(hw, veb->seid,
9920 &ets_data, NULL);
9921 if (ret) {
9922 dev_info(&pf->pdev->dev,
9923 "query veb bw ets config failed, err %s aq_err %s\n",
9924 i40e_stat_str(&pf->hw, ret),
9925 i40e_aq_str(&pf->hw, hw->aq.asq_last_status));
9926 goto out;
9927 }
9928
9929 veb->bw_limit = le16_to_cpu(ets_data.port_bw_limit);
9930 veb->bw_max_quanta = ets_data.tc_bw_max;
9931 veb->is_abs_credits = bw_data.absolute_credits_enable;
9932 veb->enabled_tc = ets_data.tc_valid_bits;
9933 tc_bw_max = le16_to_cpu(bw_data.tc_bw_max[0]) |
9934 (le16_to_cpu(bw_data.tc_bw_max[1]) << 16);
9935 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
9936 veb->bw_tc_share_credits[i] = bw_data.tc_bw_share_credits[i];
9937 veb->bw_tc_limit_credits[i] =
9938 le16_to_cpu(bw_data.tc_bw_limits[i]);
9939 veb->bw_tc_max_quanta[i] = ((tc_bw_max >> (i*4)) & 0x7);
9940 }
9941
9942 out:
9943 return ret;
9944 }
9945
9946 /**
9947 * i40e_veb_mem_alloc - Allocates the next available struct veb in the PF
9948 * @pf: board private structure
9949 *
9950 * On error: returns error code (negative)
9951 * On success: returns vsi index in PF (positive)
9952 **/
9953 static int i40e_veb_mem_alloc(struct i40e_pf *pf)
9954 {
9955 int ret = -ENOENT;
9956 struct i40e_veb *veb;
9957 int i;
9958
9959 /* Need to protect the allocation of switch elements at the PF level */
9960 mutex_lock(&pf->switch_mutex);
9961
9962 /* VEB list may be fragmented if VEB creation/destruction has
9963 * been happening. We can afford to do a quick scan to look
9964 * for any free slots in the list.
9965 *
9966 * find next empty veb slot, looping back around if necessary
9967 */
9968 i = 0;
9969 while ((i < I40E_MAX_VEB) && (pf->veb[i] != NULL))
9970 i++;
9971 if (i >= I40E_MAX_VEB) {
9972 ret = -ENOMEM;
9973 goto err_alloc_veb; /* out of VEB slots! */
9974 }
9975
9976 veb = kzalloc(sizeof(*veb), GFP_KERNEL);
9977 if (!veb) {
9978 ret = -ENOMEM;
9979 goto err_alloc_veb;
9980 }
9981 veb->pf = pf;
9982 veb->idx = i;
9983 veb->enabled_tc = 1;
9984
9985 pf->veb[i] = veb;
9986 ret = i;
9987 err_alloc_veb:
9988 mutex_unlock(&pf->switch_mutex);
9989 return ret;
9990 }
9991
9992 /**
9993 * i40e_switch_branch_release - Delete a branch of the switch tree
9994 * @branch: where to start deleting
9995 *
9996 * This uses recursion to find the tips of the branch to be
9997 * removed, deleting until we get back to and can delete this VEB.
9998 **/
9999 static void i40e_switch_branch_release(struct i40e_veb *branch)
10000 {
10001 struct i40e_pf *pf = branch->pf;
10002 u16 branch_seid = branch->seid;
10003 u16 veb_idx = branch->idx;
10004 int i;
10005
10006 /* release any VEBs on this VEB - RECURSION */
10007 for (i = 0; i < I40E_MAX_VEB; i++) {
10008 if (!pf->veb[i])
10009 continue;
10010 if (pf->veb[i]->uplink_seid == branch->seid)
10011 i40e_switch_branch_release(pf->veb[i]);
10012 }
10013
10014 /* Release the VSIs on this VEB, but not the owner VSI.
10015 *
10016 * NOTE: Removing the last VSI on a VEB has the SIDE EFFECT of removing
10017 * the VEB itself, so don't use (*branch) after this loop.
10018 */
10019 for (i = 0; i < pf->num_alloc_vsi; i++) {
10020 if (!pf->vsi[i])
10021 continue;
10022 if (pf->vsi[i]->uplink_seid == branch_seid &&
10023 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
10024 i40e_vsi_release(pf->vsi[i]);
10025 }
10026 }
10027
10028 /* There's one corner case where the VEB might not have been
10029 * removed, so double check it here and remove it if needed.
10030 * This case happens if the veb was created from the debugfs
10031 * commands and no VSIs were added to it.
10032 */
10033 if (pf->veb[veb_idx])
10034 i40e_veb_release(pf->veb[veb_idx]);
10035 }
10036
10037 /**
10038 * i40e_veb_clear - remove veb struct
10039 * @veb: the veb to remove
10040 **/
10041 static void i40e_veb_clear(struct i40e_veb *veb)
10042 {
10043 if (!veb)
10044 return;
10045
10046 if (veb->pf) {
10047 struct i40e_pf *pf = veb->pf;
10048
10049 mutex_lock(&pf->switch_mutex);
10050 if (pf->veb[veb->idx] == veb)
10051 pf->veb[veb->idx] = NULL;
10052 mutex_unlock(&pf->switch_mutex);
10053 }
10054
10055 kfree(veb);
10056 }
10057
10058 /**
10059 * i40e_veb_release - Delete a VEB and free its resources
10060 * @veb: the VEB being removed
10061 **/
10062 void i40e_veb_release(struct i40e_veb *veb)
10063 {
10064 struct i40e_vsi *vsi = NULL;
10065 struct i40e_pf *pf;
10066 int i, n = 0;
10067
10068 pf = veb->pf;
10069
10070 /* find the remaining VSI and check for extras */
10071 for (i = 0; i < pf->num_alloc_vsi; i++) {
10072 if (pf->vsi[i] && pf->vsi[i]->uplink_seid == veb->seid) {
10073 n++;
10074 vsi = pf->vsi[i];
10075 }
10076 }
10077 if (n != 1) {
10078 dev_info(&pf->pdev->dev,
10079 "can't remove VEB %d with %d VSIs left\n",
10080 veb->seid, n);
10081 return;
10082 }
10083
10084 /* move the remaining VSI to uplink veb */
10085 vsi->flags &= ~I40E_VSI_FLAG_VEB_OWNER;
10086 if (veb->uplink_seid) {
10087 vsi->uplink_seid = veb->uplink_seid;
10088 if (veb->uplink_seid == pf->mac_seid)
10089 vsi->veb_idx = I40E_NO_VEB;
10090 else
10091 vsi->veb_idx = veb->veb_idx;
10092 } else {
10093 /* floating VEB */
10094 vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
10095 vsi->veb_idx = pf->vsi[pf->lan_vsi]->veb_idx;
10096 }
10097
10098 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
10099 i40e_veb_clear(veb);
10100 }
10101
10102 /**
10103 * i40e_add_veb - create the VEB in the switch
10104 * @veb: the VEB to be instantiated
10105 * @vsi: the controlling VSI
10106 **/
10107 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi)
10108 {
10109 struct i40e_pf *pf = veb->pf;
10110 bool enable_stats = !!(pf->flags & I40E_FLAG_VEB_STATS_ENABLED);
10111 int ret;
10112
10113 ret = i40e_aq_add_veb(&pf->hw, veb->uplink_seid, vsi->seid,
10114 veb->enabled_tc, false,
10115 &veb->seid, enable_stats, NULL);
10116
10117 /* get a VEB from the hardware */
10118 if (ret) {
10119 dev_info(&pf->pdev->dev,
10120 "couldn't add VEB, err %s aq_err %s\n",
10121 i40e_stat_str(&pf->hw, ret),
10122 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10123 return -EPERM;
10124 }
10125
10126 /* get statistics counter */
10127 ret = i40e_aq_get_veb_parameters(&pf->hw, veb->seid, NULL, NULL,
10128 &veb->stats_idx, NULL, NULL, NULL);
10129 if (ret) {
10130 dev_info(&pf->pdev->dev,
10131 "couldn't get VEB statistics idx, err %s aq_err %s\n",
10132 i40e_stat_str(&pf->hw, ret),
10133 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10134 return -EPERM;
10135 }
10136 ret = i40e_veb_get_bw_info(veb);
10137 if (ret) {
10138 dev_info(&pf->pdev->dev,
10139 "couldn't get VEB bw info, err %s aq_err %s\n",
10140 i40e_stat_str(&pf->hw, ret),
10141 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10142 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
10143 return -ENOENT;
10144 }
10145
10146 vsi->uplink_seid = veb->seid;
10147 vsi->veb_idx = veb->idx;
10148 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
10149
10150 return 0;
10151 }
10152
10153 /**
10154 * i40e_veb_setup - Set up a VEB
10155 * @pf: board private structure
10156 * @flags: VEB setup flags
10157 * @uplink_seid: the switch element to link to
10158 * @vsi_seid: the initial VSI seid
10159 * @enabled_tc: Enabled TC bit-map
10160 *
10161 * This allocates the sw VEB structure and links it into the switch
10162 * It is possible and legal for this to be a duplicate of an already
10163 * existing VEB. It is also possible for both uplink and vsi seids
10164 * to be zero, in order to create a floating VEB.
10165 *
10166 * Returns pointer to the successfully allocated VEB sw struct on
10167 * success, otherwise returns NULL on failure.
10168 **/
10169 struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags,
10170 u16 uplink_seid, u16 vsi_seid,
10171 u8 enabled_tc)
10172 {
10173 struct i40e_veb *veb, *uplink_veb = NULL;
10174 int vsi_idx, veb_idx;
10175 int ret;
10176
10177 /* if one seid is 0, the other must be 0 to create a floating relay */
10178 if ((uplink_seid == 0 || vsi_seid == 0) &&
10179 (uplink_seid + vsi_seid != 0)) {
10180 dev_info(&pf->pdev->dev,
10181 "one, not both seid's are 0: uplink=%d vsi=%d\n",
10182 uplink_seid, vsi_seid);
10183 return NULL;
10184 }
10185
10186 /* make sure there is such a vsi and uplink */
10187 for (vsi_idx = 0; vsi_idx < pf->num_alloc_vsi; vsi_idx++)
10188 if (pf->vsi[vsi_idx] && pf->vsi[vsi_idx]->seid == vsi_seid)
10189 break;
10190 if (vsi_idx >= pf->num_alloc_vsi && vsi_seid != 0) {
10191 dev_info(&pf->pdev->dev, "vsi seid %d not found\n",
10192 vsi_seid);
10193 return NULL;
10194 }
10195
10196 if (uplink_seid && uplink_seid != pf->mac_seid) {
10197 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
10198 if (pf->veb[veb_idx] &&
10199 pf->veb[veb_idx]->seid == uplink_seid) {
10200 uplink_veb = pf->veb[veb_idx];
10201 break;
10202 }
10203 }
10204 if (!uplink_veb) {
10205 dev_info(&pf->pdev->dev,
10206 "uplink seid %d not found\n", uplink_seid);
10207 return NULL;
10208 }
10209 }
10210
10211 /* get veb sw struct */
10212 veb_idx = i40e_veb_mem_alloc(pf);
10213 if (veb_idx < 0)
10214 goto err_alloc;
10215 veb = pf->veb[veb_idx];
10216 veb->flags = flags;
10217 veb->uplink_seid = uplink_seid;
10218 veb->veb_idx = (uplink_veb ? uplink_veb->idx : I40E_NO_VEB);
10219 veb->enabled_tc = (enabled_tc ? enabled_tc : 0x1);
10220
10221 /* create the VEB in the switch */
10222 ret = i40e_add_veb(veb, pf->vsi[vsi_idx]);
10223 if (ret)
10224 goto err_veb;
10225 if (vsi_idx == pf->lan_vsi)
10226 pf->lan_veb = veb->idx;
10227
10228 return veb;
10229
10230 err_veb:
10231 i40e_veb_clear(veb);
10232 err_alloc:
10233 return NULL;
10234 }
10235
10236 /**
10237 * i40e_setup_pf_switch_element - set PF vars based on switch type
10238 * @pf: board private structure
10239 * @ele: element we are building info from
10240 * @num_reported: total number of elements
10241 * @printconfig: should we print the contents
10242 *
10243 * helper function to assist in extracting a few useful SEID values.
10244 **/
10245 static void i40e_setup_pf_switch_element(struct i40e_pf *pf,
10246 struct i40e_aqc_switch_config_element_resp *ele,
10247 u16 num_reported, bool printconfig)
10248 {
10249 u16 downlink_seid = le16_to_cpu(ele->downlink_seid);
10250 u16 uplink_seid = le16_to_cpu(ele->uplink_seid);
10251 u8 element_type = ele->element_type;
10252 u16 seid = le16_to_cpu(ele->seid);
10253
10254 if (printconfig)
10255 dev_info(&pf->pdev->dev,
10256 "type=%d seid=%d uplink=%d downlink=%d\n",
10257 element_type, seid, uplink_seid, downlink_seid);
10258
10259 switch (element_type) {
10260 case I40E_SWITCH_ELEMENT_TYPE_MAC:
10261 pf->mac_seid = seid;
10262 break;
10263 case I40E_SWITCH_ELEMENT_TYPE_VEB:
10264 /* Main VEB? */
10265 if (uplink_seid != pf->mac_seid)
10266 break;
10267 if (pf->lan_veb == I40E_NO_VEB) {
10268 int v;
10269
10270 /* find existing or else empty VEB */
10271 for (v = 0; v < I40E_MAX_VEB; v++) {
10272 if (pf->veb[v] && (pf->veb[v]->seid == seid)) {
10273 pf->lan_veb = v;
10274 break;
10275 }
10276 }
10277 if (pf->lan_veb == I40E_NO_VEB) {
10278 v = i40e_veb_mem_alloc(pf);
10279 if (v < 0)
10280 break;
10281 pf->lan_veb = v;
10282 }
10283 }
10284
10285 pf->veb[pf->lan_veb]->seid = seid;
10286 pf->veb[pf->lan_veb]->uplink_seid = pf->mac_seid;
10287 pf->veb[pf->lan_veb]->pf = pf;
10288 pf->veb[pf->lan_veb]->veb_idx = I40E_NO_VEB;
10289 break;
10290 case I40E_SWITCH_ELEMENT_TYPE_VSI:
10291 if (num_reported != 1)
10292 break;
10293 /* This is immediately after a reset so we can assume this is
10294 * the PF's VSI
10295 */
10296 pf->mac_seid = uplink_seid;
10297 pf->pf_seid = downlink_seid;
10298 pf->main_vsi_seid = seid;
10299 if (printconfig)
10300 dev_info(&pf->pdev->dev,
10301 "pf_seid=%d main_vsi_seid=%d\n",
10302 pf->pf_seid, pf->main_vsi_seid);
10303 break;
10304 case I40E_SWITCH_ELEMENT_TYPE_PF:
10305 case I40E_SWITCH_ELEMENT_TYPE_VF:
10306 case I40E_SWITCH_ELEMENT_TYPE_EMP:
10307 case I40E_SWITCH_ELEMENT_TYPE_BMC:
10308 case I40E_SWITCH_ELEMENT_TYPE_PE:
10309 case I40E_SWITCH_ELEMENT_TYPE_PA:
10310 /* ignore these for now */
10311 break;
10312 default:
10313 dev_info(&pf->pdev->dev, "unknown element type=%d seid=%d\n",
10314 element_type, seid);
10315 break;
10316 }
10317 }
10318
10319 /**
10320 * i40e_fetch_switch_configuration - Get switch config from firmware
10321 * @pf: board private structure
10322 * @printconfig: should we print the contents
10323 *
10324 * Get the current switch configuration from the device and
10325 * extract a few useful SEID values.
10326 **/
10327 int i40e_fetch_switch_configuration(struct i40e_pf *pf, bool printconfig)
10328 {
10329 struct i40e_aqc_get_switch_config_resp *sw_config;
10330 u16 next_seid = 0;
10331 int ret = 0;
10332 u8 *aq_buf;
10333 int i;
10334
10335 aq_buf = kzalloc(I40E_AQ_LARGE_BUF, GFP_KERNEL);
10336 if (!aq_buf)
10337 return -ENOMEM;
10338
10339 sw_config = (struct i40e_aqc_get_switch_config_resp *)aq_buf;
10340 do {
10341 u16 num_reported, num_total;
10342
10343 ret = i40e_aq_get_switch_config(&pf->hw, sw_config,
10344 I40E_AQ_LARGE_BUF,
10345 &next_seid, NULL);
10346 if (ret) {
10347 dev_info(&pf->pdev->dev,
10348 "get switch config failed err %s aq_err %s\n",
10349 i40e_stat_str(&pf->hw, ret),
10350 i40e_aq_str(&pf->hw,
10351 pf->hw.aq.asq_last_status));
10352 kfree(aq_buf);
10353 return -ENOENT;
10354 }
10355
10356 num_reported = le16_to_cpu(sw_config->header.num_reported);
10357 num_total = le16_to_cpu(sw_config->header.num_total);
10358
10359 if (printconfig)
10360 dev_info(&pf->pdev->dev,
10361 "header: %d reported %d total\n",
10362 num_reported, num_total);
10363
10364 for (i = 0; i < num_reported; i++) {
10365 struct i40e_aqc_switch_config_element_resp *ele =
10366 &sw_config->element[i];
10367
10368 i40e_setup_pf_switch_element(pf, ele, num_reported,
10369 printconfig);
10370 }
10371 } while (next_seid != 0);
10372
10373 kfree(aq_buf);
10374 return ret;
10375 }
10376
10377 /**
10378 * i40e_setup_pf_switch - Setup the HW switch on startup or after reset
10379 * @pf: board private structure
10380 * @reinit: if the Main VSI needs to re-initialized.
10381 *
10382 * Returns 0 on success, negative value on failure
10383 **/
10384 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit)
10385 {
10386 u16 flags = 0;
10387 int ret;
10388
10389 /* find out what's out there already */
10390 ret = i40e_fetch_switch_configuration(pf, false);
10391 if (ret) {
10392 dev_info(&pf->pdev->dev,
10393 "couldn't fetch switch config, err %s aq_err %s\n",
10394 i40e_stat_str(&pf->hw, ret),
10395 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
10396 return ret;
10397 }
10398 i40e_pf_reset_stats(pf);
10399
10400 /* set the switch config bit for the whole device to
10401 * support limited promisc or true promisc
10402 * when user requests promisc. The default is limited
10403 * promisc.
10404 */
10405
10406 if ((pf->hw.pf_id == 0) &&
10407 !(pf->flags & I40E_FLAG_TRUE_PROMISC_SUPPORT))
10408 flags = I40E_AQ_SET_SWITCH_CFG_PROMISC;
10409
10410 if (pf->hw.pf_id == 0) {
10411 u16 valid_flags;
10412
10413 valid_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC;
10414 ret = i40e_aq_set_switch_config(&pf->hw, flags, valid_flags,
10415 NULL);
10416 if (ret && pf->hw.aq.asq_last_status != I40E_AQ_RC_ESRCH) {
10417 dev_info(&pf->pdev->dev,
10418 "couldn't set switch config bits, err %s aq_err %s\n",
10419 i40e_stat_str(&pf->hw, ret),
10420 i40e_aq_str(&pf->hw,
10421 pf->hw.aq.asq_last_status));
10422 /* not a fatal problem, just keep going */
10423 }
10424 }
10425
10426 /* first time setup */
10427 if (pf->lan_vsi == I40E_NO_VSI || reinit) {
10428 struct i40e_vsi *vsi = NULL;
10429 u16 uplink_seid;
10430
10431 /* Set up the PF VSI associated with the PF's main VSI
10432 * that is already in the HW switch
10433 */
10434 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
10435 uplink_seid = pf->veb[pf->lan_veb]->seid;
10436 else
10437 uplink_seid = pf->mac_seid;
10438 if (pf->lan_vsi == I40E_NO_VSI)
10439 vsi = i40e_vsi_setup(pf, I40E_VSI_MAIN, uplink_seid, 0);
10440 else if (reinit)
10441 vsi = i40e_vsi_reinit_setup(pf->vsi[pf->lan_vsi]);
10442 if (!vsi) {
10443 dev_info(&pf->pdev->dev, "setup of MAIN VSI failed\n");
10444 i40e_fdir_teardown(pf);
10445 return -EAGAIN;
10446 }
10447 } else {
10448 /* force a reset of TC and queue layout configurations */
10449 u8 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
10450
10451 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
10452 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
10453 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
10454 }
10455 i40e_vlan_stripping_disable(pf->vsi[pf->lan_vsi]);
10456
10457 i40e_fdir_sb_setup(pf);
10458
10459 /* Setup static PF queue filter control settings */
10460 ret = i40e_setup_pf_filter_control(pf);
10461 if (ret) {
10462 dev_info(&pf->pdev->dev, "setup_pf_filter_control failed: %d\n",
10463 ret);
10464 /* Failure here should not stop continuing other steps */
10465 }
10466
10467 /* enable RSS in the HW, even for only one queue, as the stack can use
10468 * the hash
10469 */
10470 if ((pf->flags & I40E_FLAG_RSS_ENABLED))
10471 i40e_pf_config_rss(pf);
10472
10473 /* fill in link information and enable LSE reporting */
10474 i40e_update_link_info(&pf->hw);
10475 i40e_link_event(pf);
10476
10477 /* Initialize user-specific link properties */
10478 pf->fc_autoneg_status = ((pf->hw.phy.link_info.an_info &
10479 I40E_AQ_AN_COMPLETED) ? true : false);
10480
10481 i40e_ptp_init(pf);
10482
10483 return ret;
10484 }
10485
10486 /**
10487 * i40e_determine_queue_usage - Work out queue distribution
10488 * @pf: board private structure
10489 **/
10490 static void i40e_determine_queue_usage(struct i40e_pf *pf)
10491 {
10492 int queues_left;
10493
10494 pf->num_lan_qps = 0;
10495 #ifdef I40E_FCOE
10496 pf->num_fcoe_qps = 0;
10497 #endif
10498
10499 /* Find the max queues to be put into basic use. We'll always be
10500 * using TC0, whether or not DCB is running, and TC0 will get the
10501 * big RSS set.
10502 */
10503 queues_left = pf->hw.func_caps.num_tx_qp;
10504
10505 if ((queues_left == 1) ||
10506 !(pf->flags & I40E_FLAG_MSIX_ENABLED)) {
10507 /* one qp for PF, no queues for anything else */
10508 queues_left = 0;
10509 pf->alloc_rss_size = pf->num_lan_qps = 1;
10510
10511 /* make sure all the fancies are disabled */
10512 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
10513 I40E_FLAG_IWARP_ENABLED |
10514 #ifdef I40E_FCOE
10515 I40E_FLAG_FCOE_ENABLED |
10516 #endif
10517 I40E_FLAG_FD_SB_ENABLED |
10518 I40E_FLAG_FD_ATR_ENABLED |
10519 I40E_FLAG_DCB_CAPABLE |
10520 I40E_FLAG_DCB_ENABLED |
10521 I40E_FLAG_SRIOV_ENABLED |
10522 I40E_FLAG_VMDQ_ENABLED);
10523 } else if (!(pf->flags & (I40E_FLAG_RSS_ENABLED |
10524 I40E_FLAG_FD_SB_ENABLED |
10525 I40E_FLAG_FD_ATR_ENABLED |
10526 I40E_FLAG_DCB_CAPABLE))) {
10527 /* one qp for PF */
10528 pf->alloc_rss_size = pf->num_lan_qps = 1;
10529 queues_left -= pf->num_lan_qps;
10530
10531 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
10532 I40E_FLAG_IWARP_ENABLED |
10533 #ifdef I40E_FCOE
10534 I40E_FLAG_FCOE_ENABLED |
10535 #endif
10536 I40E_FLAG_FD_SB_ENABLED |
10537 I40E_FLAG_FD_ATR_ENABLED |
10538 I40E_FLAG_DCB_ENABLED |
10539 I40E_FLAG_VMDQ_ENABLED);
10540 } else {
10541 /* Not enough queues for all TCs */
10542 if ((pf->flags & I40E_FLAG_DCB_CAPABLE) &&
10543 (queues_left < I40E_MAX_TRAFFIC_CLASS)) {
10544 pf->flags &= ~(I40E_FLAG_DCB_CAPABLE |
10545 I40E_FLAG_DCB_ENABLED);
10546 dev_info(&pf->pdev->dev, "not enough queues for DCB. DCB is disabled.\n");
10547 }
10548 pf->num_lan_qps = max_t(int, pf->rss_size_max,
10549 num_online_cpus());
10550 pf->num_lan_qps = min_t(int, pf->num_lan_qps,
10551 pf->hw.func_caps.num_tx_qp);
10552
10553 queues_left -= pf->num_lan_qps;
10554 }
10555
10556 #ifdef I40E_FCOE
10557 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
10558 if (I40E_DEFAULT_FCOE <= queues_left) {
10559 pf->num_fcoe_qps = I40E_DEFAULT_FCOE;
10560 } else if (I40E_MINIMUM_FCOE <= queues_left) {
10561 pf->num_fcoe_qps = I40E_MINIMUM_FCOE;
10562 } else {
10563 pf->num_fcoe_qps = 0;
10564 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
10565 dev_info(&pf->pdev->dev, "not enough queues for FCoE. FCoE feature will be disabled\n");
10566 }
10567
10568 queues_left -= pf->num_fcoe_qps;
10569 }
10570
10571 #endif
10572 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
10573 if (queues_left > 1) {
10574 queues_left -= 1; /* save 1 queue for FD */
10575 } else {
10576 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
10577 dev_info(&pf->pdev->dev, "not enough queues for Flow Director. Flow Director feature is disabled\n");
10578 }
10579 }
10580
10581 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
10582 pf->num_vf_qps && pf->num_req_vfs && queues_left) {
10583 pf->num_req_vfs = min_t(int, pf->num_req_vfs,
10584 (queues_left / pf->num_vf_qps));
10585 queues_left -= (pf->num_req_vfs * pf->num_vf_qps);
10586 }
10587
10588 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
10589 pf->num_vmdq_vsis && pf->num_vmdq_qps && queues_left) {
10590 pf->num_vmdq_vsis = min_t(int, pf->num_vmdq_vsis,
10591 (queues_left / pf->num_vmdq_qps));
10592 queues_left -= (pf->num_vmdq_vsis * pf->num_vmdq_qps);
10593 }
10594
10595 pf->queues_left = queues_left;
10596 dev_dbg(&pf->pdev->dev,
10597 "qs_avail=%d FD SB=%d lan_qs=%d lan_tc0=%d vf=%d*%d vmdq=%d*%d, remaining=%d\n",
10598 pf->hw.func_caps.num_tx_qp,
10599 !!(pf->flags & I40E_FLAG_FD_SB_ENABLED),
10600 pf->num_lan_qps, pf->alloc_rss_size, pf->num_req_vfs,
10601 pf->num_vf_qps, pf->num_vmdq_vsis, pf->num_vmdq_qps,
10602 queues_left);
10603 #ifdef I40E_FCOE
10604 dev_dbg(&pf->pdev->dev, "fcoe queues = %d\n", pf->num_fcoe_qps);
10605 #endif
10606 }
10607
10608 /**
10609 * i40e_setup_pf_filter_control - Setup PF static filter control
10610 * @pf: PF to be setup
10611 *
10612 * i40e_setup_pf_filter_control sets up a PF's initial filter control
10613 * settings. If PE/FCoE are enabled then it will also set the per PF
10614 * based filter sizes required for them. It also enables Flow director,
10615 * ethertype and macvlan type filter settings for the pf.
10616 *
10617 * Returns 0 on success, negative on failure
10618 **/
10619 static int i40e_setup_pf_filter_control(struct i40e_pf *pf)
10620 {
10621 struct i40e_filter_control_settings *settings = &pf->filter_settings;
10622
10623 settings->hash_lut_size = I40E_HASH_LUT_SIZE_128;
10624
10625 /* Flow Director is enabled */
10626 if (pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED))
10627 settings->enable_fdir = true;
10628
10629 /* Ethtype and MACVLAN filters enabled for PF */
10630 settings->enable_ethtype = true;
10631 settings->enable_macvlan = true;
10632
10633 if (i40e_set_filter_control(&pf->hw, settings))
10634 return -ENOENT;
10635
10636 return 0;
10637 }
10638
10639 #define INFO_STRING_LEN 255
10640 #define REMAIN(__x) (INFO_STRING_LEN - (__x))
10641 static void i40e_print_features(struct i40e_pf *pf)
10642 {
10643 struct i40e_hw *hw = &pf->hw;
10644 char *buf;
10645 int i;
10646
10647 buf = kmalloc(INFO_STRING_LEN, GFP_KERNEL);
10648 if (!buf)
10649 return;
10650
10651 i = snprintf(buf, INFO_STRING_LEN, "Features: PF-id[%d]", hw->pf_id);
10652 #ifdef CONFIG_PCI_IOV
10653 i += snprintf(&buf[i], REMAIN(i), " VFs: %d", pf->num_req_vfs);
10654 #endif
10655 i += snprintf(&buf[i], REMAIN(i), " VSIs: %d QP: %d",
10656 pf->hw.func_caps.num_vsis,
10657 pf->vsi[pf->lan_vsi]->num_queue_pairs);
10658 if (pf->flags & I40E_FLAG_RSS_ENABLED)
10659 i += snprintf(&buf[i], REMAIN(i), " RSS");
10660 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED)
10661 i += snprintf(&buf[i], REMAIN(i), " FD_ATR");
10662 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
10663 i += snprintf(&buf[i], REMAIN(i), " FD_SB");
10664 i += snprintf(&buf[i], REMAIN(i), " NTUPLE");
10665 }
10666 if (pf->flags & I40E_FLAG_DCB_CAPABLE)
10667 i += snprintf(&buf[i], REMAIN(i), " DCB");
10668 i += snprintf(&buf[i], REMAIN(i), " VxLAN");
10669 i += snprintf(&buf[i], REMAIN(i), " Geneve");
10670 if (pf->flags & I40E_FLAG_PTP)
10671 i += snprintf(&buf[i], REMAIN(i), " PTP");
10672 #ifdef I40E_FCOE
10673 if (pf->flags & I40E_FLAG_FCOE_ENABLED)
10674 i += snprintf(&buf[i], REMAIN(i), " FCOE");
10675 #endif
10676 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
10677 i += snprintf(&buf[i], REMAIN(i), " VEB");
10678 else
10679 i += snprintf(&buf[i], REMAIN(i), " VEPA");
10680
10681 dev_info(&pf->pdev->dev, "%s\n", buf);
10682 kfree(buf);
10683 WARN_ON(i > INFO_STRING_LEN);
10684 }
10685
10686 /**
10687 * i40e_get_platform_mac_addr - get platform-specific MAC address
10688 *
10689 * @pdev: PCI device information struct
10690 * @pf: board private structure
10691 *
10692 * Look up the MAC address in Open Firmware on systems that support it,
10693 * and use IDPROM on SPARC if no OF address is found. On return, the
10694 * I40E_FLAG_PF_MAC will be wset in pf->flags if a platform-specific value
10695 * has been selected.
10696 **/
10697 static void i40e_get_platform_mac_addr(struct pci_dev *pdev, struct i40e_pf *pf)
10698 {
10699 pf->flags &= ~I40E_FLAG_PF_MAC;
10700 if (!eth_platform_get_mac_address(&pdev->dev, pf->hw.mac.addr))
10701 pf->flags |= I40E_FLAG_PF_MAC;
10702 }
10703
10704 /**
10705 * i40e_probe - Device initialization routine
10706 * @pdev: PCI device information struct
10707 * @ent: entry in i40e_pci_tbl
10708 *
10709 * i40e_probe initializes a PF identified by a pci_dev structure.
10710 * The OS initialization, configuring of the PF private structure,
10711 * and a hardware reset occur.
10712 *
10713 * Returns 0 on success, negative on failure
10714 **/
10715 static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
10716 {
10717 struct i40e_aq_get_phy_abilities_resp abilities;
10718 struct i40e_pf *pf;
10719 struct i40e_hw *hw;
10720 static u16 pfs_found;
10721 u16 wol_nvm_bits;
10722 u16 link_status;
10723 int err;
10724 u32 val;
10725 u32 i;
10726 u8 set_fc_aq_fail;
10727
10728 err = pci_enable_device_mem(pdev);
10729 if (err)
10730 return err;
10731
10732 /* set up for high or low dma */
10733 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
10734 if (err) {
10735 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
10736 if (err) {
10737 dev_err(&pdev->dev,
10738 "DMA configuration failed: 0x%x\n", err);
10739 goto err_dma;
10740 }
10741 }
10742
10743 /* set up pci connections */
10744 err = pci_request_mem_regions(pdev, i40e_driver_name);
10745 if (err) {
10746 dev_info(&pdev->dev,
10747 "pci_request_selected_regions failed %d\n", err);
10748 goto err_pci_reg;
10749 }
10750
10751 pci_enable_pcie_error_reporting(pdev);
10752 pci_set_master(pdev);
10753
10754 /* Now that we have a PCI connection, we need to do the
10755 * low level device setup. This is primarily setting up
10756 * the Admin Queue structures and then querying for the
10757 * device's current profile information.
10758 */
10759 pf = kzalloc(sizeof(*pf), GFP_KERNEL);
10760 if (!pf) {
10761 err = -ENOMEM;
10762 goto err_pf_alloc;
10763 }
10764 pf->next_vsi = 0;
10765 pf->pdev = pdev;
10766 set_bit(__I40E_DOWN, &pf->state);
10767
10768 hw = &pf->hw;
10769 hw->back = pf;
10770
10771 pf->ioremap_len = min_t(int, pci_resource_len(pdev, 0),
10772 I40E_MAX_CSR_SPACE);
10773
10774 hw->hw_addr = ioremap(pci_resource_start(pdev, 0), pf->ioremap_len);
10775 if (!hw->hw_addr) {
10776 err = -EIO;
10777 dev_info(&pdev->dev, "ioremap(0x%04x, 0x%04x) failed: 0x%x\n",
10778 (unsigned int)pci_resource_start(pdev, 0),
10779 pf->ioremap_len, err);
10780 goto err_ioremap;
10781 }
10782 hw->vendor_id = pdev->vendor;
10783 hw->device_id = pdev->device;
10784 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
10785 hw->subsystem_vendor_id = pdev->subsystem_vendor;
10786 hw->subsystem_device_id = pdev->subsystem_device;
10787 hw->bus.device = PCI_SLOT(pdev->devfn);
10788 hw->bus.func = PCI_FUNC(pdev->devfn);
10789 pf->instance = pfs_found;
10790
10791 /* set up the locks for the AQ, do this only once in probe
10792 * and destroy them only once in remove
10793 */
10794 mutex_init(&hw->aq.asq_mutex);
10795 mutex_init(&hw->aq.arq_mutex);
10796
10797 pf->msg_enable = netif_msg_init(debug,
10798 NETIF_MSG_DRV |
10799 NETIF_MSG_PROBE |
10800 NETIF_MSG_LINK);
10801 if (debug < -1)
10802 pf->hw.debug_mask = debug;
10803
10804 /* do a special CORER for clearing PXE mode once at init */
10805 if (hw->revision_id == 0 &&
10806 (rd32(hw, I40E_GLLAN_RCTL_0) & I40E_GLLAN_RCTL_0_PXE_MODE_MASK)) {
10807 wr32(hw, I40E_GLGEN_RTRIG, I40E_GLGEN_RTRIG_CORER_MASK);
10808 i40e_flush(hw);
10809 msleep(200);
10810 pf->corer_count++;
10811
10812 i40e_clear_pxe_mode(hw);
10813 }
10814
10815 /* Reset here to make sure all is clean and to define PF 'n' */
10816 i40e_clear_hw(hw);
10817 err = i40e_pf_reset(hw);
10818 if (err) {
10819 dev_info(&pdev->dev, "Initial pf_reset failed: %d\n", err);
10820 goto err_pf_reset;
10821 }
10822 pf->pfr_count++;
10823
10824 hw->aq.num_arq_entries = I40E_AQ_LEN;
10825 hw->aq.num_asq_entries = I40E_AQ_LEN;
10826 hw->aq.arq_buf_size = I40E_MAX_AQ_BUF_SIZE;
10827 hw->aq.asq_buf_size = I40E_MAX_AQ_BUF_SIZE;
10828 pf->adminq_work_limit = I40E_AQ_WORK_LIMIT;
10829
10830 snprintf(pf->int_name, sizeof(pf->int_name) - 1,
10831 "%s-%s:misc",
10832 dev_driver_string(&pf->pdev->dev), dev_name(&pdev->dev));
10833
10834 err = i40e_init_shared_code(hw);
10835 if (err) {
10836 dev_warn(&pdev->dev, "unidentified MAC or BLANK NVM: %d\n",
10837 err);
10838 goto err_pf_reset;
10839 }
10840
10841 /* set up a default setting for link flow control */
10842 pf->hw.fc.requested_mode = I40E_FC_NONE;
10843
10844 err = i40e_init_adminq(hw);
10845 if (err) {
10846 if (err == I40E_ERR_FIRMWARE_API_VERSION)
10847 dev_info(&pdev->dev,
10848 "The driver for the device stopped because the NVM image is newer than expected. You must install the most recent version of the network driver.\n");
10849 else
10850 dev_info(&pdev->dev,
10851 "The driver for the device stopped because the device firmware failed to init. Try updating your NVM image.\n");
10852
10853 goto err_pf_reset;
10854 }
10855
10856 /* provide nvm, fw, api versions */
10857 dev_info(&pdev->dev, "fw %d.%d.%05d api %d.%d nvm %s\n",
10858 hw->aq.fw_maj_ver, hw->aq.fw_min_ver, hw->aq.fw_build,
10859 hw->aq.api_maj_ver, hw->aq.api_min_ver,
10860 i40e_nvm_version_str(hw));
10861
10862 if (hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR &&
10863 hw->aq.api_min_ver > I40E_FW_API_VERSION_MINOR)
10864 dev_info(&pdev->dev,
10865 "The driver for the device detected a newer version of the NVM image than expected. Please install the most recent version of the network driver.\n");
10866 else if (hw->aq.api_maj_ver < I40E_FW_API_VERSION_MAJOR ||
10867 hw->aq.api_min_ver < (I40E_FW_API_VERSION_MINOR - 1))
10868 dev_info(&pdev->dev,
10869 "The driver for the device detected an older version of the NVM image than expected. Please update the NVM image.\n");
10870
10871 i40e_verify_eeprom(pf);
10872
10873 /* Rev 0 hardware was never productized */
10874 if (hw->revision_id < 1)
10875 dev_warn(&pdev->dev, "This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\n");
10876
10877 i40e_clear_pxe_mode(hw);
10878 err = i40e_get_capabilities(pf);
10879 if (err)
10880 goto err_adminq_setup;
10881
10882 err = i40e_sw_init(pf);
10883 if (err) {
10884 dev_info(&pdev->dev, "sw_init failed: %d\n", err);
10885 goto err_sw_init;
10886 }
10887
10888 err = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
10889 hw->func_caps.num_rx_qp,
10890 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
10891 if (err) {
10892 dev_info(&pdev->dev, "init_lan_hmc failed: %d\n", err);
10893 goto err_init_lan_hmc;
10894 }
10895
10896 err = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
10897 if (err) {
10898 dev_info(&pdev->dev, "configure_lan_hmc failed: %d\n", err);
10899 err = -ENOENT;
10900 goto err_configure_lan_hmc;
10901 }
10902
10903 /* Disable LLDP for NICs that have firmware versions lower than v4.3.
10904 * Ignore error return codes because if it was already disabled via
10905 * hardware settings this will fail
10906 */
10907 if (pf->flags & I40E_FLAG_STOP_FW_LLDP) {
10908 dev_info(&pdev->dev, "Stopping firmware LLDP agent.\n");
10909 i40e_aq_stop_lldp(hw, true, NULL);
10910 }
10911
10912 i40e_get_mac_addr(hw, hw->mac.addr);
10913 /* allow a platform config to override the HW addr */
10914 i40e_get_platform_mac_addr(pdev, pf);
10915 if (!is_valid_ether_addr(hw->mac.addr)) {
10916 dev_info(&pdev->dev, "invalid MAC address %pM\n", hw->mac.addr);
10917 err = -EIO;
10918 goto err_mac_addr;
10919 }
10920 dev_info(&pdev->dev, "MAC address: %pM\n", hw->mac.addr);
10921 ether_addr_copy(hw->mac.perm_addr, hw->mac.addr);
10922 i40e_get_port_mac_addr(hw, hw->mac.port_addr);
10923 if (is_valid_ether_addr(hw->mac.port_addr))
10924 pf->flags |= I40E_FLAG_PORT_ID_VALID;
10925 #ifdef I40E_FCOE
10926 err = i40e_get_san_mac_addr(hw, hw->mac.san_addr);
10927 if (err)
10928 dev_info(&pdev->dev,
10929 "(non-fatal) SAN MAC retrieval failed: %d\n", err);
10930 if (!is_valid_ether_addr(hw->mac.san_addr)) {
10931 dev_warn(&pdev->dev, "invalid SAN MAC address %pM, falling back to LAN MAC\n",
10932 hw->mac.san_addr);
10933 ether_addr_copy(hw->mac.san_addr, hw->mac.addr);
10934 }
10935 dev_info(&pf->pdev->dev, "SAN MAC: %pM\n", hw->mac.san_addr);
10936 #endif /* I40E_FCOE */
10937
10938 pci_set_drvdata(pdev, pf);
10939 pci_save_state(pdev);
10940 #ifdef CONFIG_I40E_DCB
10941 err = i40e_init_pf_dcb(pf);
10942 if (err) {
10943 dev_info(&pdev->dev, "DCB init failed %d, disabled\n", err);
10944 pf->flags &= ~(I40E_FLAG_DCB_CAPABLE | I40E_FLAG_DCB_ENABLED);
10945 /* Continue without DCB enabled */
10946 }
10947 #endif /* CONFIG_I40E_DCB */
10948
10949 /* set up periodic task facility */
10950 setup_timer(&pf->service_timer, i40e_service_timer, (unsigned long)pf);
10951 pf->service_timer_period = HZ;
10952
10953 INIT_WORK(&pf->service_task, i40e_service_task);
10954 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
10955 pf->flags |= I40E_FLAG_NEED_LINK_UPDATE;
10956
10957 /* NVM bit on means WoL disabled for the port */
10958 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits);
10959 if (BIT (hw->port) & wol_nvm_bits || hw->partition_id != 1)
10960 pf->wol_en = false;
10961 else
10962 pf->wol_en = true;
10963 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en);
10964
10965 /* set up the main switch operations */
10966 i40e_determine_queue_usage(pf);
10967 err = i40e_init_interrupt_scheme(pf);
10968 if (err)
10969 goto err_switch_setup;
10970
10971 /* The number of VSIs reported by the FW is the minimum guaranteed
10972 * to us; HW supports far more and we share the remaining pool with
10973 * the other PFs. We allocate space for more than the guarantee with
10974 * the understanding that we might not get them all later.
10975 */
10976 if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC)
10977 pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC;
10978 else
10979 pf->num_alloc_vsi = pf->hw.func_caps.num_vsis;
10980
10981 /* Set up the *vsi struct and our local tracking of the MAIN PF vsi. */
10982 pf->vsi = kcalloc(pf->num_alloc_vsi, sizeof(struct i40e_vsi *),
10983 GFP_KERNEL);
10984 if (!pf->vsi) {
10985 err = -ENOMEM;
10986 goto err_switch_setup;
10987 }
10988
10989 #ifdef CONFIG_PCI_IOV
10990 /* prep for VF support */
10991 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
10992 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
10993 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
10994 if (pci_num_vf(pdev))
10995 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
10996 }
10997 #endif
10998 err = i40e_setup_pf_switch(pf, false);
10999 if (err) {
11000 dev_info(&pdev->dev, "setup_pf_switch failed: %d\n", err);
11001 goto err_vsis;
11002 }
11003
11004 /* Make sure flow control is set according to current settings */
11005 err = i40e_set_fc(hw, &set_fc_aq_fail, true);
11006 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_GET)
11007 dev_dbg(&pf->pdev->dev,
11008 "Set fc with err %s aq_err %s on get_phy_cap\n",
11009 i40e_stat_str(hw, err),
11010 i40e_aq_str(hw, hw->aq.asq_last_status));
11011 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_SET)
11012 dev_dbg(&pf->pdev->dev,
11013 "Set fc with err %s aq_err %s on set_phy_config\n",
11014 i40e_stat_str(hw, err),
11015 i40e_aq_str(hw, hw->aq.asq_last_status));
11016 if (set_fc_aq_fail & I40E_SET_FC_AQ_FAIL_UPDATE)
11017 dev_dbg(&pf->pdev->dev,
11018 "Set fc with err %s aq_err %s on get_link_info\n",
11019 i40e_stat_str(hw, err),
11020 i40e_aq_str(hw, hw->aq.asq_last_status));
11021
11022 /* if FDIR VSI was set up, start it now */
11023 for (i = 0; i < pf->num_alloc_vsi; i++) {
11024 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
11025 i40e_vsi_open(pf->vsi[i]);
11026 break;
11027 }
11028 }
11029
11030 /* The driver only wants link up/down and module qualification
11031 * reports from firmware. Note the negative logic.
11032 */
11033 err = i40e_aq_set_phy_int_mask(&pf->hw,
11034 ~(I40E_AQ_EVENT_LINK_UPDOWN |
11035 I40E_AQ_EVENT_MEDIA_NA |
11036 I40E_AQ_EVENT_MODULE_QUAL_FAIL), NULL);
11037 if (err)
11038 dev_info(&pf->pdev->dev, "set phy mask fail, err %s aq_err %s\n",
11039 i40e_stat_str(&pf->hw, err),
11040 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
11041
11042 /* Reconfigure hardware for allowing smaller MSS in the case
11043 * of TSO, so that we avoid the MDD being fired and causing
11044 * a reset in the case of small MSS+TSO.
11045 */
11046 val = rd32(hw, I40E_REG_MSS);
11047 if ((val & I40E_REG_MSS_MIN_MASK) > I40E_64BYTE_MSS) {
11048 val &= ~I40E_REG_MSS_MIN_MASK;
11049 val |= I40E_64BYTE_MSS;
11050 wr32(hw, I40E_REG_MSS, val);
11051 }
11052
11053 if (pf->flags & I40E_FLAG_RESTART_AUTONEG) {
11054 msleep(75);
11055 err = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
11056 if (err)
11057 dev_info(&pf->pdev->dev, "link restart failed, err %s aq_err %s\n",
11058 i40e_stat_str(&pf->hw, err),
11059 i40e_aq_str(&pf->hw,
11060 pf->hw.aq.asq_last_status));
11061 }
11062 /* The main driver is (mostly) up and happy. We need to set this state
11063 * before setting up the misc vector or we get a race and the vector
11064 * ends up disabled forever.
11065 */
11066 clear_bit(__I40E_DOWN, &pf->state);
11067
11068 /* In case of MSIX we are going to setup the misc vector right here
11069 * to handle admin queue events etc. In case of legacy and MSI
11070 * the misc functionality and queue processing is combined in
11071 * the same vector and that gets setup at open.
11072 */
11073 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
11074 err = i40e_setup_misc_vector(pf);
11075 if (err) {
11076 dev_info(&pdev->dev,
11077 "setup of misc vector failed: %d\n", err);
11078 goto err_vsis;
11079 }
11080 }
11081
11082 #ifdef CONFIG_PCI_IOV
11083 /* prep for VF support */
11084 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
11085 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
11086 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
11087 /* disable link interrupts for VFs */
11088 val = rd32(hw, I40E_PFGEN_PORTMDIO_NUM);
11089 val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK;
11090 wr32(hw, I40E_PFGEN_PORTMDIO_NUM, val);
11091 i40e_flush(hw);
11092
11093 if (pci_num_vf(pdev)) {
11094 dev_info(&pdev->dev,
11095 "Active VFs found, allocating resources.\n");
11096 err = i40e_alloc_vfs(pf, pci_num_vf(pdev));
11097 if (err)
11098 dev_info(&pdev->dev,
11099 "Error %d allocating resources for existing VFs\n",
11100 err);
11101 }
11102 }
11103 #endif /* CONFIG_PCI_IOV */
11104
11105 if (pf->flags & I40E_FLAG_IWARP_ENABLED) {
11106 pf->iwarp_base_vector = i40e_get_lump(pf, pf->irq_pile,
11107 pf->num_iwarp_msix,
11108 I40E_IWARP_IRQ_PILE_ID);
11109 if (pf->iwarp_base_vector < 0) {
11110 dev_info(&pdev->dev,
11111 "failed to get tracking for %d vectors for IWARP err=%d\n",
11112 pf->num_iwarp_msix, pf->iwarp_base_vector);
11113 pf->flags &= ~I40E_FLAG_IWARP_ENABLED;
11114 }
11115 }
11116
11117 i40e_dbg_pf_init(pf);
11118
11119 /* tell the firmware that we're starting */
11120 i40e_send_version(pf);
11121
11122 /* since everything's happy, start the service_task timer */
11123 mod_timer(&pf->service_timer,
11124 round_jiffies(jiffies + pf->service_timer_period));
11125
11126 /* add this PF to client device list and launch a client service task */
11127 err = i40e_lan_add_device(pf);
11128 if (err)
11129 dev_info(&pdev->dev, "Failed to add PF to client API service list: %d\n",
11130 err);
11131
11132 #ifdef I40E_FCOE
11133 /* create FCoE interface */
11134 i40e_fcoe_vsi_setup(pf);
11135
11136 #endif
11137 #define PCI_SPEED_SIZE 8
11138 #define PCI_WIDTH_SIZE 8
11139 /* Devices on the IOSF bus do not have this information
11140 * and will report PCI Gen 1 x 1 by default so don't bother
11141 * checking them.
11142 */
11143 if (!(pf->flags & I40E_FLAG_NO_PCI_LINK_CHECK)) {
11144 char speed[PCI_SPEED_SIZE] = "Unknown";
11145 char width[PCI_WIDTH_SIZE] = "Unknown";
11146
11147 /* Get the negotiated link width and speed from PCI config
11148 * space
11149 */
11150 pcie_capability_read_word(pf->pdev, PCI_EXP_LNKSTA,
11151 &link_status);
11152
11153 i40e_set_pci_config_data(hw, link_status);
11154
11155 switch (hw->bus.speed) {
11156 case i40e_bus_speed_8000:
11157 strncpy(speed, "8.0", PCI_SPEED_SIZE); break;
11158 case i40e_bus_speed_5000:
11159 strncpy(speed, "5.0", PCI_SPEED_SIZE); break;
11160 case i40e_bus_speed_2500:
11161 strncpy(speed, "2.5", PCI_SPEED_SIZE); break;
11162 default:
11163 break;
11164 }
11165 switch (hw->bus.width) {
11166 case i40e_bus_width_pcie_x8:
11167 strncpy(width, "8", PCI_WIDTH_SIZE); break;
11168 case i40e_bus_width_pcie_x4:
11169 strncpy(width, "4", PCI_WIDTH_SIZE); break;
11170 case i40e_bus_width_pcie_x2:
11171 strncpy(width, "2", PCI_WIDTH_SIZE); break;
11172 case i40e_bus_width_pcie_x1:
11173 strncpy(width, "1", PCI_WIDTH_SIZE); break;
11174 default:
11175 break;
11176 }
11177
11178 dev_info(&pdev->dev, "PCI-Express: Speed %sGT/s Width x%s\n",
11179 speed, width);
11180
11181 if (hw->bus.width < i40e_bus_width_pcie_x8 ||
11182 hw->bus.speed < i40e_bus_speed_8000) {
11183 dev_warn(&pdev->dev, "PCI-Express bandwidth available for this device may be insufficient for optimal performance.\n");
11184 dev_warn(&pdev->dev, "Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\n");
11185 }
11186 }
11187
11188 /* get the requested speeds from the fw */
11189 err = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, NULL);
11190 if (err)
11191 dev_dbg(&pf->pdev->dev, "get requested speeds ret = %s last_status = %s\n",
11192 i40e_stat_str(&pf->hw, err),
11193 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
11194 pf->hw.phy.link_info.requested_speeds = abilities.link_speed;
11195
11196 /* get the supported phy types from the fw */
11197 err = i40e_aq_get_phy_capabilities(hw, false, true, &abilities, NULL);
11198 if (err)
11199 dev_dbg(&pf->pdev->dev, "get supported phy types ret = %s last_status = %s\n",
11200 i40e_stat_str(&pf->hw, err),
11201 i40e_aq_str(&pf->hw, pf->hw.aq.asq_last_status));
11202 pf->hw.phy.phy_types = le32_to_cpu(abilities.phy_type);
11203
11204 /* Add a filter to drop all Flow control frames from any VSI from being
11205 * transmitted. By doing so we stop a malicious VF from sending out
11206 * PAUSE or PFC frames and potentially controlling traffic for other
11207 * PF/VF VSIs.
11208 * The FW can still send Flow control frames if enabled.
11209 */
11210 i40e_add_filter_to_drop_tx_flow_control_frames(&pf->hw,
11211 pf->main_vsi_seid);
11212
11213 if ((pf->hw.device_id == I40E_DEV_ID_10G_BASE_T) ||
11214 (pf->hw.device_id == I40E_DEV_ID_10G_BASE_T4))
11215 pf->flags |= I40E_FLAG_HAVE_10GBASET_PHY;
11216
11217 /* print a string summarizing features */
11218 i40e_print_features(pf);
11219
11220 return 0;
11221
11222 /* Unwind what we've done if something failed in the setup */
11223 err_vsis:
11224 set_bit(__I40E_DOWN, &pf->state);
11225 i40e_clear_interrupt_scheme(pf);
11226 kfree(pf->vsi);
11227 err_switch_setup:
11228 i40e_reset_interrupt_capability(pf);
11229 del_timer_sync(&pf->service_timer);
11230 err_mac_addr:
11231 err_configure_lan_hmc:
11232 (void)i40e_shutdown_lan_hmc(hw);
11233 err_init_lan_hmc:
11234 kfree(pf->qp_pile);
11235 err_sw_init:
11236 err_adminq_setup:
11237 err_pf_reset:
11238 iounmap(hw->hw_addr);
11239 err_ioremap:
11240 kfree(pf);
11241 err_pf_alloc:
11242 pci_disable_pcie_error_reporting(pdev);
11243 pci_release_mem_regions(pdev);
11244 err_pci_reg:
11245 err_dma:
11246 pci_disable_device(pdev);
11247 return err;
11248 }
11249
11250 /**
11251 * i40e_remove - Device removal routine
11252 * @pdev: PCI device information struct
11253 *
11254 * i40e_remove is called by the PCI subsystem to alert the driver
11255 * that is should release a PCI device. This could be caused by a
11256 * Hot-Plug event, or because the driver is going to be removed from
11257 * memory.
11258 **/
11259 static void i40e_remove(struct pci_dev *pdev)
11260 {
11261 struct i40e_pf *pf = pci_get_drvdata(pdev);
11262 struct i40e_hw *hw = &pf->hw;
11263 i40e_status ret_code;
11264 int i;
11265
11266 i40e_dbg_pf_exit(pf);
11267
11268 i40e_ptp_stop(pf);
11269
11270 /* Disable RSS in hw */
11271 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), 0);
11272 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), 0);
11273
11274 /* no more scheduling of any task */
11275 set_bit(__I40E_SUSPENDED, &pf->state);
11276 set_bit(__I40E_DOWN, &pf->state);
11277 if (pf->service_timer.data)
11278 del_timer_sync(&pf->service_timer);
11279 if (pf->service_task.func)
11280 cancel_work_sync(&pf->service_task);
11281
11282 if (pf->flags & I40E_FLAG_SRIOV_ENABLED) {
11283 i40e_free_vfs(pf);
11284 pf->flags &= ~I40E_FLAG_SRIOV_ENABLED;
11285 }
11286
11287 i40e_fdir_teardown(pf);
11288
11289 /* If there is a switch structure or any orphans, remove them.
11290 * This will leave only the PF's VSI remaining.
11291 */
11292 for (i = 0; i < I40E_MAX_VEB; i++) {
11293 if (!pf->veb[i])
11294 continue;
11295
11296 if (pf->veb[i]->uplink_seid == pf->mac_seid ||
11297 pf->veb[i]->uplink_seid == 0)
11298 i40e_switch_branch_release(pf->veb[i]);
11299 }
11300
11301 /* Now we can shutdown the PF's VSI, just before we kill
11302 * adminq and hmc.
11303 */
11304 if (pf->vsi[pf->lan_vsi])
11305 i40e_vsi_release(pf->vsi[pf->lan_vsi]);
11306
11307 /* remove attached clients */
11308 ret_code = i40e_lan_del_device(pf);
11309 if (ret_code) {
11310 dev_warn(&pdev->dev, "Failed to delete client device: %d\n",
11311 ret_code);
11312 }
11313
11314 /* shutdown and destroy the HMC */
11315 if (hw->hmc.hmc_obj) {
11316 ret_code = i40e_shutdown_lan_hmc(hw);
11317 if (ret_code)
11318 dev_warn(&pdev->dev,
11319 "Failed to destroy the HMC resources: %d\n",
11320 ret_code);
11321 }
11322
11323 /* shutdown the adminq */
11324 i40e_shutdown_adminq(hw);
11325
11326 /* destroy the locks only once, here */
11327 mutex_destroy(&hw->aq.arq_mutex);
11328 mutex_destroy(&hw->aq.asq_mutex);
11329
11330 /* Clear all dynamic memory lists of rings, q_vectors, and VSIs */
11331 i40e_clear_interrupt_scheme(pf);
11332 for (i = 0; i < pf->num_alloc_vsi; i++) {
11333 if (pf->vsi[i]) {
11334 i40e_vsi_clear_rings(pf->vsi[i]);
11335 i40e_vsi_clear(pf->vsi[i]);
11336 pf->vsi[i] = NULL;
11337 }
11338 }
11339
11340 for (i = 0; i < I40E_MAX_VEB; i++) {
11341 kfree(pf->veb[i]);
11342 pf->veb[i] = NULL;
11343 }
11344
11345 kfree(pf->qp_pile);
11346 kfree(pf->vsi);
11347
11348 iounmap(hw->hw_addr);
11349 kfree(pf);
11350 pci_release_mem_regions(pdev);
11351
11352 pci_disable_pcie_error_reporting(pdev);
11353 pci_disable_device(pdev);
11354 }
11355
11356 /**
11357 * i40e_pci_error_detected - warning that something funky happened in PCI land
11358 * @pdev: PCI device information struct
11359 *
11360 * Called to warn that something happened and the error handling steps
11361 * are in progress. Allows the driver to quiesce things, be ready for
11362 * remediation.
11363 **/
11364 static pci_ers_result_t i40e_pci_error_detected(struct pci_dev *pdev,
11365 enum pci_channel_state error)
11366 {
11367 struct i40e_pf *pf = pci_get_drvdata(pdev);
11368
11369 dev_info(&pdev->dev, "%s: error %d\n", __func__, error);
11370
11371 if (!pf) {
11372 dev_info(&pdev->dev,
11373 "Cannot recover - error happened during device probe\n");
11374 return PCI_ERS_RESULT_DISCONNECT;
11375 }
11376
11377 /* shutdown all operations */
11378 if (!test_bit(__I40E_SUSPENDED, &pf->state)) {
11379 rtnl_lock();
11380 i40e_prep_for_reset(pf);
11381 rtnl_unlock();
11382 }
11383
11384 /* Request a slot reset */
11385 return PCI_ERS_RESULT_NEED_RESET;
11386 }
11387
11388 /**
11389 * i40e_pci_error_slot_reset - a PCI slot reset just happened
11390 * @pdev: PCI device information struct
11391 *
11392 * Called to find if the driver can work with the device now that
11393 * the pci slot has been reset. If a basic connection seems good
11394 * (registers are readable and have sane content) then return a
11395 * happy little PCI_ERS_RESULT_xxx.
11396 **/
11397 static pci_ers_result_t i40e_pci_error_slot_reset(struct pci_dev *pdev)
11398 {
11399 struct i40e_pf *pf = pci_get_drvdata(pdev);
11400 pci_ers_result_t result;
11401 int err;
11402 u32 reg;
11403
11404 dev_dbg(&pdev->dev, "%s\n", __func__);
11405 if (pci_enable_device_mem(pdev)) {
11406 dev_info(&pdev->dev,
11407 "Cannot re-enable PCI device after reset.\n");
11408 result = PCI_ERS_RESULT_DISCONNECT;
11409 } else {
11410 pci_set_master(pdev);
11411 pci_restore_state(pdev);
11412 pci_save_state(pdev);
11413 pci_wake_from_d3(pdev, false);
11414
11415 reg = rd32(&pf->hw, I40E_GLGEN_RTRIG);
11416 if (reg == 0)
11417 result = PCI_ERS_RESULT_RECOVERED;
11418 else
11419 result = PCI_ERS_RESULT_DISCONNECT;
11420 }
11421
11422 err = pci_cleanup_aer_uncorrect_error_status(pdev);
11423 if (err) {
11424 dev_info(&pdev->dev,
11425 "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n",
11426 err);
11427 /* non-fatal, continue */
11428 }
11429
11430 return result;
11431 }
11432
11433 /**
11434 * i40e_pci_error_resume - restart operations after PCI error recovery
11435 * @pdev: PCI device information struct
11436 *
11437 * Called to allow the driver to bring things back up after PCI error
11438 * and/or reset recovery has finished.
11439 **/
11440 static void i40e_pci_error_resume(struct pci_dev *pdev)
11441 {
11442 struct i40e_pf *pf = pci_get_drvdata(pdev);
11443
11444 dev_dbg(&pdev->dev, "%s\n", __func__);
11445 if (test_bit(__I40E_SUSPENDED, &pf->state))
11446 return;
11447
11448 rtnl_lock();
11449 i40e_handle_reset_warning(pf);
11450 rtnl_unlock();
11451 }
11452
11453 /**
11454 * i40e_shutdown - PCI callback for shutting down
11455 * @pdev: PCI device information struct
11456 **/
11457 static void i40e_shutdown(struct pci_dev *pdev)
11458 {
11459 struct i40e_pf *pf = pci_get_drvdata(pdev);
11460 struct i40e_hw *hw = &pf->hw;
11461
11462 set_bit(__I40E_SUSPENDED, &pf->state);
11463 set_bit(__I40E_DOWN, &pf->state);
11464 rtnl_lock();
11465 i40e_prep_for_reset(pf);
11466 rtnl_unlock();
11467
11468 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
11469 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
11470
11471 del_timer_sync(&pf->service_timer);
11472 cancel_work_sync(&pf->service_task);
11473 i40e_fdir_teardown(pf);
11474
11475 rtnl_lock();
11476 i40e_prep_for_reset(pf);
11477 rtnl_unlock();
11478
11479 wr32(hw, I40E_PFPM_APM,
11480 (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
11481 wr32(hw, I40E_PFPM_WUFC,
11482 (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
11483
11484 i40e_clear_interrupt_scheme(pf);
11485
11486 if (system_state == SYSTEM_POWER_OFF) {
11487 pci_wake_from_d3(pdev, pf->wol_en);
11488 pci_set_power_state(pdev, PCI_D3hot);
11489 }
11490 }
11491
11492 #ifdef CONFIG_PM
11493 /**
11494 * i40e_suspend - PCI callback for moving to D3
11495 * @pdev: PCI device information struct
11496 **/
11497 static int i40e_suspend(struct pci_dev *pdev, pm_message_t state)
11498 {
11499 struct i40e_pf *pf = pci_get_drvdata(pdev);
11500 struct i40e_hw *hw = &pf->hw;
11501 int retval = 0;
11502
11503 set_bit(__I40E_SUSPENDED, &pf->state);
11504 set_bit(__I40E_DOWN, &pf->state);
11505
11506 rtnl_lock();
11507 i40e_prep_for_reset(pf);
11508 rtnl_unlock();
11509
11510 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
11511 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
11512
11513 i40e_stop_misc_vector(pf);
11514
11515 retval = pci_save_state(pdev);
11516 if (retval)
11517 return retval;
11518
11519 pci_wake_from_d3(pdev, pf->wol_en);
11520 pci_set_power_state(pdev, PCI_D3hot);
11521
11522 return retval;
11523 }
11524
11525 /**
11526 * i40e_resume - PCI callback for waking up from D3
11527 * @pdev: PCI device information struct
11528 **/
11529 static int i40e_resume(struct pci_dev *pdev)
11530 {
11531 struct i40e_pf *pf = pci_get_drvdata(pdev);
11532 u32 err;
11533
11534 pci_set_power_state(pdev, PCI_D0);
11535 pci_restore_state(pdev);
11536 /* pci_restore_state() clears dev->state_saves, so
11537 * call pci_save_state() again to restore it.
11538 */
11539 pci_save_state(pdev);
11540
11541 err = pci_enable_device_mem(pdev);
11542 if (err) {
11543 dev_err(&pdev->dev, "Cannot enable PCI device from suspend\n");
11544 return err;
11545 }
11546 pci_set_master(pdev);
11547
11548 /* no wakeup events while running */
11549 pci_wake_from_d3(pdev, false);
11550
11551 /* handling the reset will rebuild the device state */
11552 if (test_and_clear_bit(__I40E_SUSPENDED, &pf->state)) {
11553 clear_bit(__I40E_DOWN, &pf->state);
11554 rtnl_lock();
11555 i40e_reset_and_rebuild(pf, false);
11556 rtnl_unlock();
11557 }
11558
11559 return 0;
11560 }
11561
11562 #endif
11563 static const struct pci_error_handlers i40e_err_handler = {
11564 .error_detected = i40e_pci_error_detected,
11565 .slot_reset = i40e_pci_error_slot_reset,
11566 .resume = i40e_pci_error_resume,
11567 };
11568
11569 static struct pci_driver i40e_driver = {
11570 .name = i40e_driver_name,
11571 .id_table = i40e_pci_tbl,
11572 .probe = i40e_probe,
11573 .remove = i40e_remove,
11574 #ifdef CONFIG_PM
11575 .suspend = i40e_suspend,
11576 .resume = i40e_resume,
11577 #endif
11578 .shutdown = i40e_shutdown,
11579 .err_handler = &i40e_err_handler,
11580 .sriov_configure = i40e_pci_sriov_configure,
11581 };
11582
11583 /**
11584 * i40e_init_module - Driver registration routine
11585 *
11586 * i40e_init_module is the first routine called when the driver is
11587 * loaded. All it does is register with the PCI subsystem.
11588 **/
11589 static int __init i40e_init_module(void)
11590 {
11591 pr_info("%s: %s - version %s\n", i40e_driver_name,
11592 i40e_driver_string, i40e_driver_version_str);
11593 pr_info("%s: %s\n", i40e_driver_name, i40e_copyright);
11594
11595 /* we will see if single thread per module is enough for now,
11596 * it can't be any worse than using the system workqueue which
11597 * was already single threaded
11598 */
11599 i40e_wq = alloc_workqueue("%s", WQ_UNBOUND | WQ_MEM_RECLAIM, 1,
11600 i40e_driver_name);
11601 if (!i40e_wq) {
11602 pr_err("%s: Failed to create workqueue\n", i40e_driver_name);
11603 return -ENOMEM;
11604 }
11605
11606 i40e_dbg_init();
11607 return pci_register_driver(&i40e_driver);
11608 }
11609 module_init(i40e_init_module);
11610
11611 /**
11612 * i40e_exit_module - Driver exit cleanup routine
11613 *
11614 * i40e_exit_module is called just before the driver is removed
11615 * from memory.
11616 **/
11617 static void __exit i40e_exit_module(void)
11618 {
11619 pci_unregister_driver(&i40e_driver);
11620 destroy_workqueue(i40e_wq);
11621 i40e_dbg_exit();
11622 }
11623 module_exit(i40e_exit_module);
ubuntu-zesty-kernel mirror