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i40e: Refine an error message to avoid confusion
[mirror_ubuntu-artful-kernel.git] / drivers / net / ethernet / intel / i40e / i40e_main.c
1 /*******************************************************************************
2 *
3 * Intel Ethernet Controller XL710 Family Linux Driver
4 * Copyright(c) 2013 - 2015 Intel Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
17 *
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
20 *
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 ******************************************************************************/
26
27 /* Local includes */
28 #include "i40e.h"
29 #include "i40e_diag.h"
30 #ifdef CONFIG_I40E_VXLAN
31 #include <net/vxlan.h>
32 #endif
33
34 const char i40e_driver_name[] = "i40e";
35 static const char i40e_driver_string[] =
36 "Intel(R) Ethernet Connection XL710 Network Driver";
37
38 #define DRV_KERN "-k"
39
40 #define DRV_VERSION_MAJOR 1
41 #define DRV_VERSION_MINOR 3
42 #define DRV_VERSION_BUILD 4
43 #define DRV_VERSION __stringify(DRV_VERSION_MAJOR) "." \
44 __stringify(DRV_VERSION_MINOR) "." \
45 __stringify(DRV_VERSION_BUILD) DRV_KERN
46 const char i40e_driver_version_str[] = DRV_VERSION;
47 static const char i40e_copyright[] = "Copyright (c) 2013 - 2014 Intel Corporation.";
48
49 /* a bit of forward declarations */
50 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi);
51 static void i40e_handle_reset_warning(struct i40e_pf *pf);
52 static int i40e_add_vsi(struct i40e_vsi *vsi);
53 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi);
54 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit);
55 static int i40e_setup_misc_vector(struct i40e_pf *pf);
56 static void i40e_determine_queue_usage(struct i40e_pf *pf);
57 static int i40e_setup_pf_filter_control(struct i40e_pf *pf);
58 static void i40e_fdir_sb_setup(struct i40e_pf *pf);
59 static int i40e_veb_get_bw_info(struct i40e_veb *veb);
60
61 /* i40e_pci_tbl - PCI Device ID Table
62 *
63 * Last entry must be all 0s
64 *
65 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
66 * Class, Class Mask, private data (not used) }
67 */
68 static const struct pci_device_id i40e_pci_tbl[] = {
69 {PCI_VDEVICE(INTEL, I40E_DEV_ID_SFP_XL710), 0},
70 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QEMU), 0},
71 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_A), 0},
72 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_B), 0},
73 {PCI_VDEVICE(INTEL, I40E_DEV_ID_KX_C), 0},
74 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_A), 0},
75 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_B), 0},
76 {PCI_VDEVICE(INTEL, I40E_DEV_ID_QSFP_C), 0},
77 {PCI_VDEVICE(INTEL, I40E_DEV_ID_10G_BASE_T), 0},
78 {PCI_VDEVICE(INTEL, I40E_DEV_ID_20G_KR2), 0},
79 /* required last entry */
80 {0, }
81 };
82 MODULE_DEVICE_TABLE(pci, i40e_pci_tbl);
83
84 #define I40E_MAX_VF_COUNT 128
85 static int debug = -1;
86 module_param(debug, int, 0);
87 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
88
89 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
90 MODULE_DESCRIPTION("Intel(R) Ethernet Connection XL710 Network Driver");
91 MODULE_LICENSE("GPL");
92 MODULE_VERSION(DRV_VERSION);
93
94 /**
95 * i40e_allocate_dma_mem_d - OS specific memory alloc for shared code
96 * @hw: pointer to the HW structure
97 * @mem: ptr to mem struct to fill out
98 * @size: size of memory requested
99 * @alignment: what to align the allocation to
100 **/
101 int i40e_allocate_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem,
102 u64 size, u32 alignment)
103 {
104 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
105
106 mem->size = ALIGN(size, alignment);
107 mem->va = dma_zalloc_coherent(&pf->pdev->dev, mem->size,
108 &mem->pa, GFP_KERNEL);
109 if (!mem->va)
110 return -ENOMEM;
111
112 return 0;
113 }
114
115 /**
116 * i40e_free_dma_mem_d - OS specific memory free for shared code
117 * @hw: pointer to the HW structure
118 * @mem: ptr to mem struct to free
119 **/
120 int i40e_free_dma_mem_d(struct i40e_hw *hw, struct i40e_dma_mem *mem)
121 {
122 struct i40e_pf *pf = (struct i40e_pf *)hw->back;
123
124 dma_free_coherent(&pf->pdev->dev, mem->size, mem->va, mem->pa);
125 mem->va = NULL;
126 mem->pa = 0;
127 mem->size = 0;
128
129 return 0;
130 }
131
132 /**
133 * i40e_allocate_virt_mem_d - OS specific memory alloc for shared code
134 * @hw: pointer to the HW structure
135 * @mem: ptr to mem struct to fill out
136 * @size: size of memory requested
137 **/
138 int i40e_allocate_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem,
139 u32 size)
140 {
141 mem->size = size;
142 mem->va = kzalloc(size, GFP_KERNEL);
143
144 if (!mem->va)
145 return -ENOMEM;
146
147 return 0;
148 }
149
150 /**
151 * i40e_free_virt_mem_d - OS specific memory free for shared code
152 * @hw: pointer to the HW structure
153 * @mem: ptr to mem struct to free
154 **/
155 int i40e_free_virt_mem_d(struct i40e_hw *hw, struct i40e_virt_mem *mem)
156 {
157 /* it's ok to kfree a NULL pointer */
158 kfree(mem->va);
159 mem->va = NULL;
160 mem->size = 0;
161
162 return 0;
163 }
164
165 /**
166 * i40e_get_lump - find a lump of free generic resource
167 * @pf: board private structure
168 * @pile: the pile of resource to search
169 * @needed: the number of items needed
170 * @id: an owner id to stick on the items assigned
171 *
172 * Returns the base item index of the lump, or negative for error
173 *
174 * The search_hint trick and lack of advanced fit-finding only work
175 * because we're highly likely to have all the same size lump requests.
176 * Linear search time and any fragmentation should be minimal.
177 **/
178 static int i40e_get_lump(struct i40e_pf *pf, struct i40e_lump_tracking *pile,
179 u16 needed, u16 id)
180 {
181 int ret = -ENOMEM;
182 int i, j;
183
184 if (!pile || needed == 0 || id >= I40E_PILE_VALID_BIT) {
185 dev_info(&pf->pdev->dev,
186 "param err: pile=%p needed=%d id=0x%04x\n",
187 pile, needed, id);
188 return -EINVAL;
189 }
190
191 /* start the linear search with an imperfect hint */
192 i = pile->search_hint;
193 while (i < pile->num_entries) {
194 /* skip already allocated entries */
195 if (pile->list[i] & I40E_PILE_VALID_BIT) {
196 i++;
197 continue;
198 }
199
200 /* do we have enough in this lump? */
201 for (j = 0; (j < needed) && ((i+j) < pile->num_entries); j++) {
202 if (pile->list[i+j] & I40E_PILE_VALID_BIT)
203 break;
204 }
205
206 if (j == needed) {
207 /* there was enough, so assign it to the requestor */
208 for (j = 0; j < needed; j++)
209 pile->list[i+j] = id | I40E_PILE_VALID_BIT;
210 ret = i;
211 pile->search_hint = i + j;
212 break;
213 } else {
214 /* not enough, so skip over it and continue looking */
215 i += j;
216 }
217 }
218
219 return ret;
220 }
221
222 /**
223 * i40e_put_lump - return a lump of generic resource
224 * @pile: the pile of resource to search
225 * @index: the base item index
226 * @id: the owner id of the items assigned
227 *
228 * Returns the count of items in the lump
229 **/
230 static int i40e_put_lump(struct i40e_lump_tracking *pile, u16 index, u16 id)
231 {
232 int valid_id = (id | I40E_PILE_VALID_BIT);
233 int count = 0;
234 int i;
235
236 if (!pile || index >= pile->num_entries)
237 return -EINVAL;
238
239 for (i = index;
240 i < pile->num_entries && pile->list[i] == valid_id;
241 i++) {
242 pile->list[i] = 0;
243 count++;
244 }
245
246 if (count && index < pile->search_hint)
247 pile->search_hint = index;
248
249 return count;
250 }
251
252 /**
253 * i40e_find_vsi_from_id - searches for the vsi with the given id
254 * @pf - the pf structure to search for the vsi
255 * @id - id of the vsi it is searching for
256 **/
257 struct i40e_vsi *i40e_find_vsi_from_id(struct i40e_pf *pf, u16 id)
258 {
259 int i;
260
261 for (i = 0; i < pf->num_alloc_vsi; i++)
262 if (pf->vsi[i] && (pf->vsi[i]->id == id))
263 return pf->vsi[i];
264
265 return NULL;
266 }
267
268 /**
269 * i40e_service_event_schedule - Schedule the service task to wake up
270 * @pf: board private structure
271 *
272 * If not already scheduled, this puts the task into the work queue
273 **/
274 static void i40e_service_event_schedule(struct i40e_pf *pf)
275 {
276 if (!test_bit(__I40E_DOWN, &pf->state) &&
277 !test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state) &&
278 !test_and_set_bit(__I40E_SERVICE_SCHED, &pf->state))
279 schedule_work(&pf->service_task);
280 }
281
282 /**
283 * i40e_tx_timeout - Respond to a Tx Hang
284 * @netdev: network interface device structure
285 *
286 * If any port has noticed a Tx timeout, it is likely that the whole
287 * device is munged, not just the one netdev port, so go for the full
288 * reset.
289 **/
290 #ifdef I40E_FCOE
291 void i40e_tx_timeout(struct net_device *netdev)
292 #else
293 static void i40e_tx_timeout(struct net_device *netdev)
294 #endif
295 {
296 struct i40e_netdev_priv *np = netdev_priv(netdev);
297 struct i40e_vsi *vsi = np->vsi;
298 struct i40e_pf *pf = vsi->back;
299
300 pf->tx_timeout_count++;
301
302 if (time_after(jiffies, (pf->tx_timeout_last_recovery + HZ*20)))
303 pf->tx_timeout_recovery_level = 1;
304 pf->tx_timeout_last_recovery = jiffies;
305 netdev_info(netdev, "tx_timeout recovery level %d\n",
306 pf->tx_timeout_recovery_level);
307
308 switch (pf->tx_timeout_recovery_level) {
309 case 0:
310 /* disable and re-enable queues for the VSI */
311 if (in_interrupt()) {
312 set_bit(__I40E_REINIT_REQUESTED, &pf->state);
313 set_bit(__I40E_REINIT_REQUESTED, &vsi->state);
314 } else {
315 i40e_vsi_reinit_locked(vsi);
316 }
317 break;
318 case 1:
319 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
320 break;
321 case 2:
322 set_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
323 break;
324 case 3:
325 set_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
326 break;
327 default:
328 netdev_err(netdev, "tx_timeout recovery unsuccessful\n");
329 set_bit(__I40E_DOWN_REQUESTED, &pf->state);
330 set_bit(__I40E_DOWN_REQUESTED, &vsi->state);
331 break;
332 }
333 i40e_service_event_schedule(pf);
334 pf->tx_timeout_recovery_level++;
335 }
336
337 /**
338 * i40e_release_rx_desc - Store the new tail and head values
339 * @rx_ring: ring to bump
340 * @val: new head index
341 **/
342 static inline void i40e_release_rx_desc(struct i40e_ring *rx_ring, u32 val)
343 {
344 rx_ring->next_to_use = val;
345
346 /* Force memory writes to complete before letting h/w
347 * know there are new descriptors to fetch. (Only
348 * applicable for weak-ordered memory model archs,
349 * such as IA-64).
350 */
351 wmb();
352 writel(val, rx_ring->tail);
353 }
354
355 /**
356 * i40e_get_vsi_stats_struct - Get System Network Statistics
357 * @vsi: the VSI we care about
358 *
359 * Returns the address of the device statistics structure.
360 * The statistics are actually updated from the service task.
361 **/
362 struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi)
363 {
364 return &vsi->net_stats;
365 }
366
367 /**
368 * i40e_get_netdev_stats_struct - Get statistics for netdev interface
369 * @netdev: network interface device structure
370 *
371 * Returns the address of the device statistics structure.
372 * The statistics are actually updated from the service task.
373 **/
374 #ifdef I40E_FCOE
375 struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
376 struct net_device *netdev,
377 struct rtnl_link_stats64 *stats)
378 #else
379 static struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
380 struct net_device *netdev,
381 struct rtnl_link_stats64 *stats)
382 #endif
383 {
384 struct i40e_netdev_priv *np = netdev_priv(netdev);
385 struct i40e_ring *tx_ring, *rx_ring;
386 struct i40e_vsi *vsi = np->vsi;
387 struct rtnl_link_stats64 *vsi_stats = i40e_get_vsi_stats_struct(vsi);
388 int i;
389
390 if (test_bit(__I40E_DOWN, &vsi->state))
391 return stats;
392
393 if (!vsi->tx_rings)
394 return stats;
395
396 rcu_read_lock();
397 for (i = 0; i < vsi->num_queue_pairs; i++) {
398 u64 bytes, packets;
399 unsigned int start;
400
401 tx_ring = ACCESS_ONCE(vsi->tx_rings[i]);
402 if (!tx_ring)
403 continue;
404
405 do {
406 start = u64_stats_fetch_begin_irq(&tx_ring->syncp);
407 packets = tx_ring->stats.packets;
408 bytes = tx_ring->stats.bytes;
409 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start));
410
411 stats->tx_packets += packets;
412 stats->tx_bytes += bytes;
413 rx_ring = &tx_ring[1];
414
415 do {
416 start = u64_stats_fetch_begin_irq(&rx_ring->syncp);
417 packets = rx_ring->stats.packets;
418 bytes = rx_ring->stats.bytes;
419 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start));
420
421 stats->rx_packets += packets;
422 stats->rx_bytes += bytes;
423 }
424 rcu_read_unlock();
425
426 /* following stats updated by i40e_watchdog_subtask() */
427 stats->multicast = vsi_stats->multicast;
428 stats->tx_errors = vsi_stats->tx_errors;
429 stats->tx_dropped = vsi_stats->tx_dropped;
430 stats->rx_errors = vsi_stats->rx_errors;
431 stats->rx_crc_errors = vsi_stats->rx_crc_errors;
432 stats->rx_length_errors = vsi_stats->rx_length_errors;
433
434 return stats;
435 }
436
437 /**
438 * i40e_vsi_reset_stats - Resets all stats of the given vsi
439 * @vsi: the VSI to have its stats reset
440 **/
441 void i40e_vsi_reset_stats(struct i40e_vsi *vsi)
442 {
443 struct rtnl_link_stats64 *ns;
444 int i;
445
446 if (!vsi)
447 return;
448
449 ns = i40e_get_vsi_stats_struct(vsi);
450 memset(ns, 0, sizeof(*ns));
451 memset(&vsi->net_stats_offsets, 0, sizeof(vsi->net_stats_offsets));
452 memset(&vsi->eth_stats, 0, sizeof(vsi->eth_stats));
453 memset(&vsi->eth_stats_offsets, 0, sizeof(vsi->eth_stats_offsets));
454 if (vsi->rx_rings && vsi->rx_rings[0]) {
455 for (i = 0; i < vsi->num_queue_pairs; i++) {
456 memset(&vsi->rx_rings[i]->stats, 0 ,
457 sizeof(vsi->rx_rings[i]->stats));
458 memset(&vsi->rx_rings[i]->rx_stats, 0 ,
459 sizeof(vsi->rx_rings[i]->rx_stats));
460 memset(&vsi->tx_rings[i]->stats, 0 ,
461 sizeof(vsi->tx_rings[i]->stats));
462 memset(&vsi->tx_rings[i]->tx_stats, 0,
463 sizeof(vsi->tx_rings[i]->tx_stats));
464 }
465 }
466 vsi->stat_offsets_loaded = false;
467 }
468
469 /**
470 * i40e_pf_reset_stats - Reset all of the stats for the given PF
471 * @pf: the PF to be reset
472 **/
473 void i40e_pf_reset_stats(struct i40e_pf *pf)
474 {
475 int i;
476
477 memset(&pf->stats, 0, sizeof(pf->stats));
478 memset(&pf->stats_offsets, 0, sizeof(pf->stats_offsets));
479 pf->stat_offsets_loaded = false;
480
481 for (i = 0; i < I40E_MAX_VEB; i++) {
482 if (pf->veb[i]) {
483 memset(&pf->veb[i]->stats, 0,
484 sizeof(pf->veb[i]->stats));
485 memset(&pf->veb[i]->stats_offsets, 0,
486 sizeof(pf->veb[i]->stats_offsets));
487 pf->veb[i]->stat_offsets_loaded = false;
488 }
489 }
490 }
491
492 /**
493 * i40e_stat_update48 - read and update a 48 bit stat from the chip
494 * @hw: ptr to the hardware info
495 * @hireg: the high 32 bit reg to read
496 * @loreg: the low 32 bit reg to read
497 * @offset_loaded: has the initial offset been loaded yet
498 * @offset: ptr to current offset value
499 * @stat: ptr to the stat
500 *
501 * Since the device stats are not reset at PFReset, they likely will not
502 * be zeroed when the driver starts. We'll save the first values read
503 * and use them as offsets to be subtracted from the raw values in order
504 * to report stats that count from zero. In the process, we also manage
505 * the potential roll-over.
506 **/
507 static void i40e_stat_update48(struct i40e_hw *hw, u32 hireg, u32 loreg,
508 bool offset_loaded, u64 *offset, u64 *stat)
509 {
510 u64 new_data;
511
512 if (hw->device_id == I40E_DEV_ID_QEMU) {
513 new_data = rd32(hw, loreg);
514 new_data |= ((u64)(rd32(hw, hireg) & 0xFFFF)) << 32;
515 } else {
516 new_data = rd64(hw, loreg);
517 }
518 if (!offset_loaded)
519 *offset = new_data;
520 if (likely(new_data >= *offset))
521 *stat = new_data - *offset;
522 else
523 *stat = (new_data + ((u64)1 << 48)) - *offset;
524 *stat &= 0xFFFFFFFFFFFFULL;
525 }
526
527 /**
528 * i40e_stat_update32 - read and update a 32 bit stat from the chip
529 * @hw: ptr to the hardware info
530 * @reg: the hw reg to read
531 * @offset_loaded: has the initial offset been loaded yet
532 * @offset: ptr to current offset value
533 * @stat: ptr to the stat
534 **/
535 static void i40e_stat_update32(struct i40e_hw *hw, u32 reg,
536 bool offset_loaded, u64 *offset, u64 *stat)
537 {
538 u32 new_data;
539
540 new_data = rd32(hw, reg);
541 if (!offset_loaded)
542 *offset = new_data;
543 if (likely(new_data >= *offset))
544 *stat = (u32)(new_data - *offset);
545 else
546 *stat = (u32)((new_data + ((u64)1 << 32)) - *offset);
547 }
548
549 /**
550 * i40e_update_eth_stats - Update VSI-specific ethernet statistics counters.
551 * @vsi: the VSI to be updated
552 **/
553 void i40e_update_eth_stats(struct i40e_vsi *vsi)
554 {
555 int stat_idx = le16_to_cpu(vsi->info.stat_counter_idx);
556 struct i40e_pf *pf = vsi->back;
557 struct i40e_hw *hw = &pf->hw;
558 struct i40e_eth_stats *oes;
559 struct i40e_eth_stats *es; /* device's eth stats */
560
561 es = &vsi->eth_stats;
562 oes = &vsi->eth_stats_offsets;
563
564 /* Gather up the stats that the hw collects */
565 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
566 vsi->stat_offsets_loaded,
567 &oes->tx_errors, &es->tx_errors);
568 i40e_stat_update32(hw, I40E_GLV_RDPC(stat_idx),
569 vsi->stat_offsets_loaded,
570 &oes->rx_discards, &es->rx_discards);
571 i40e_stat_update32(hw, I40E_GLV_RUPP(stat_idx),
572 vsi->stat_offsets_loaded,
573 &oes->rx_unknown_protocol, &es->rx_unknown_protocol);
574 i40e_stat_update32(hw, I40E_GLV_TEPC(stat_idx),
575 vsi->stat_offsets_loaded,
576 &oes->tx_errors, &es->tx_errors);
577
578 i40e_stat_update48(hw, I40E_GLV_GORCH(stat_idx),
579 I40E_GLV_GORCL(stat_idx),
580 vsi->stat_offsets_loaded,
581 &oes->rx_bytes, &es->rx_bytes);
582 i40e_stat_update48(hw, I40E_GLV_UPRCH(stat_idx),
583 I40E_GLV_UPRCL(stat_idx),
584 vsi->stat_offsets_loaded,
585 &oes->rx_unicast, &es->rx_unicast);
586 i40e_stat_update48(hw, I40E_GLV_MPRCH(stat_idx),
587 I40E_GLV_MPRCL(stat_idx),
588 vsi->stat_offsets_loaded,
589 &oes->rx_multicast, &es->rx_multicast);
590 i40e_stat_update48(hw, I40E_GLV_BPRCH(stat_idx),
591 I40E_GLV_BPRCL(stat_idx),
592 vsi->stat_offsets_loaded,
593 &oes->rx_broadcast, &es->rx_broadcast);
594
595 i40e_stat_update48(hw, I40E_GLV_GOTCH(stat_idx),
596 I40E_GLV_GOTCL(stat_idx),
597 vsi->stat_offsets_loaded,
598 &oes->tx_bytes, &es->tx_bytes);
599 i40e_stat_update48(hw, I40E_GLV_UPTCH(stat_idx),
600 I40E_GLV_UPTCL(stat_idx),
601 vsi->stat_offsets_loaded,
602 &oes->tx_unicast, &es->tx_unicast);
603 i40e_stat_update48(hw, I40E_GLV_MPTCH(stat_idx),
604 I40E_GLV_MPTCL(stat_idx),
605 vsi->stat_offsets_loaded,
606 &oes->tx_multicast, &es->tx_multicast);
607 i40e_stat_update48(hw, I40E_GLV_BPTCH(stat_idx),
608 I40E_GLV_BPTCL(stat_idx),
609 vsi->stat_offsets_loaded,
610 &oes->tx_broadcast, &es->tx_broadcast);
611 vsi->stat_offsets_loaded = true;
612 }
613
614 /**
615 * i40e_update_veb_stats - Update Switch component statistics
616 * @veb: the VEB being updated
617 **/
618 static void i40e_update_veb_stats(struct i40e_veb *veb)
619 {
620 struct i40e_pf *pf = veb->pf;
621 struct i40e_hw *hw = &pf->hw;
622 struct i40e_eth_stats *oes;
623 struct i40e_eth_stats *es; /* device's eth stats */
624 int idx = 0;
625
626 idx = veb->stats_idx;
627 es = &veb->stats;
628 oes = &veb->stats_offsets;
629
630 /* Gather up the stats that the hw collects */
631 i40e_stat_update32(hw, I40E_GLSW_TDPC(idx),
632 veb->stat_offsets_loaded,
633 &oes->tx_discards, &es->tx_discards);
634 if (hw->revision_id > 0)
635 i40e_stat_update32(hw, I40E_GLSW_RUPP(idx),
636 veb->stat_offsets_loaded,
637 &oes->rx_unknown_protocol,
638 &es->rx_unknown_protocol);
639 i40e_stat_update48(hw, I40E_GLSW_GORCH(idx), I40E_GLSW_GORCL(idx),
640 veb->stat_offsets_loaded,
641 &oes->rx_bytes, &es->rx_bytes);
642 i40e_stat_update48(hw, I40E_GLSW_UPRCH(idx), I40E_GLSW_UPRCL(idx),
643 veb->stat_offsets_loaded,
644 &oes->rx_unicast, &es->rx_unicast);
645 i40e_stat_update48(hw, I40E_GLSW_MPRCH(idx), I40E_GLSW_MPRCL(idx),
646 veb->stat_offsets_loaded,
647 &oes->rx_multicast, &es->rx_multicast);
648 i40e_stat_update48(hw, I40E_GLSW_BPRCH(idx), I40E_GLSW_BPRCL(idx),
649 veb->stat_offsets_loaded,
650 &oes->rx_broadcast, &es->rx_broadcast);
651
652 i40e_stat_update48(hw, I40E_GLSW_GOTCH(idx), I40E_GLSW_GOTCL(idx),
653 veb->stat_offsets_loaded,
654 &oes->tx_bytes, &es->tx_bytes);
655 i40e_stat_update48(hw, I40E_GLSW_UPTCH(idx), I40E_GLSW_UPTCL(idx),
656 veb->stat_offsets_loaded,
657 &oes->tx_unicast, &es->tx_unicast);
658 i40e_stat_update48(hw, I40E_GLSW_MPTCH(idx), I40E_GLSW_MPTCL(idx),
659 veb->stat_offsets_loaded,
660 &oes->tx_multicast, &es->tx_multicast);
661 i40e_stat_update48(hw, I40E_GLSW_BPTCH(idx), I40E_GLSW_BPTCL(idx),
662 veb->stat_offsets_loaded,
663 &oes->tx_broadcast, &es->tx_broadcast);
664 veb->stat_offsets_loaded = true;
665 }
666
667 #ifdef I40E_FCOE
668 /**
669 * i40e_update_fcoe_stats - Update FCoE-specific ethernet statistics counters.
670 * @vsi: the VSI that is capable of doing FCoE
671 **/
672 static void i40e_update_fcoe_stats(struct i40e_vsi *vsi)
673 {
674 struct i40e_pf *pf = vsi->back;
675 struct i40e_hw *hw = &pf->hw;
676 struct i40e_fcoe_stats *ofs;
677 struct i40e_fcoe_stats *fs; /* device's eth stats */
678 int idx;
679
680 if (vsi->type != I40E_VSI_FCOE)
681 return;
682
683 idx = (pf->pf_seid - I40E_BASE_PF_SEID) + I40E_FCOE_PF_STAT_OFFSET;
684 fs = &vsi->fcoe_stats;
685 ofs = &vsi->fcoe_stats_offsets;
686
687 i40e_stat_update32(hw, I40E_GL_FCOEPRC(idx),
688 vsi->fcoe_stat_offsets_loaded,
689 &ofs->rx_fcoe_packets, &fs->rx_fcoe_packets);
690 i40e_stat_update48(hw, I40E_GL_FCOEDWRCH(idx), I40E_GL_FCOEDWRCL(idx),
691 vsi->fcoe_stat_offsets_loaded,
692 &ofs->rx_fcoe_dwords, &fs->rx_fcoe_dwords);
693 i40e_stat_update32(hw, I40E_GL_FCOERPDC(idx),
694 vsi->fcoe_stat_offsets_loaded,
695 &ofs->rx_fcoe_dropped, &fs->rx_fcoe_dropped);
696 i40e_stat_update32(hw, I40E_GL_FCOEPTC(idx),
697 vsi->fcoe_stat_offsets_loaded,
698 &ofs->tx_fcoe_packets, &fs->tx_fcoe_packets);
699 i40e_stat_update48(hw, I40E_GL_FCOEDWTCH(idx), I40E_GL_FCOEDWTCL(idx),
700 vsi->fcoe_stat_offsets_loaded,
701 &ofs->tx_fcoe_dwords, &fs->tx_fcoe_dwords);
702 i40e_stat_update32(hw, I40E_GL_FCOECRC(idx),
703 vsi->fcoe_stat_offsets_loaded,
704 &ofs->fcoe_bad_fccrc, &fs->fcoe_bad_fccrc);
705 i40e_stat_update32(hw, I40E_GL_FCOELAST(idx),
706 vsi->fcoe_stat_offsets_loaded,
707 &ofs->fcoe_last_error, &fs->fcoe_last_error);
708 i40e_stat_update32(hw, I40E_GL_FCOEDDPC(idx),
709 vsi->fcoe_stat_offsets_loaded,
710 &ofs->fcoe_ddp_count, &fs->fcoe_ddp_count);
711
712 vsi->fcoe_stat_offsets_loaded = true;
713 }
714
715 #endif
716 /**
717 * i40e_update_link_xoff_rx - Update XOFF received in link flow control mode
718 * @pf: the corresponding PF
719 *
720 * Update the Rx XOFF counter (PAUSE frames) in link flow control mode
721 **/
722 static void i40e_update_link_xoff_rx(struct i40e_pf *pf)
723 {
724 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
725 struct i40e_hw_port_stats *nsd = &pf->stats;
726 struct i40e_hw *hw = &pf->hw;
727 u64 xoff = 0;
728 u16 i, v;
729
730 if ((hw->fc.current_mode != I40E_FC_FULL) &&
731 (hw->fc.current_mode != I40E_FC_RX_PAUSE))
732 return;
733
734 xoff = nsd->link_xoff_rx;
735 i40e_stat_update32(hw, I40E_GLPRT_LXOFFRXC(hw->port),
736 pf->stat_offsets_loaded,
737 &osd->link_xoff_rx, &nsd->link_xoff_rx);
738
739 /* No new LFC xoff rx */
740 if (!(nsd->link_xoff_rx - xoff))
741 return;
742
743 /* Clear the __I40E_HANG_CHECK_ARMED bit for all Tx rings */
744 for (v = 0; v < pf->num_alloc_vsi; v++) {
745 struct i40e_vsi *vsi = pf->vsi[v];
746
747 if (!vsi || !vsi->tx_rings[0])
748 continue;
749
750 for (i = 0; i < vsi->num_queue_pairs; i++) {
751 struct i40e_ring *ring = vsi->tx_rings[i];
752 clear_bit(__I40E_HANG_CHECK_ARMED, &ring->state);
753 }
754 }
755 }
756
757 /**
758 * i40e_update_prio_xoff_rx - Update XOFF received in PFC mode
759 * @pf: the corresponding PF
760 *
761 * Update the Rx XOFF counter (PAUSE frames) in PFC mode
762 **/
763 static void i40e_update_prio_xoff_rx(struct i40e_pf *pf)
764 {
765 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
766 struct i40e_hw_port_stats *nsd = &pf->stats;
767 bool xoff[I40E_MAX_TRAFFIC_CLASS] = {false};
768 struct i40e_dcbx_config *dcb_cfg;
769 struct i40e_hw *hw = &pf->hw;
770 u16 i, v;
771 u8 tc;
772
773 dcb_cfg = &hw->local_dcbx_config;
774
775 /* Collect Link XOFF stats when PFC is disabled */
776 if (!dcb_cfg->pfc.pfcenable) {
777 i40e_update_link_xoff_rx(pf);
778 return;
779 }
780
781 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
782 u64 prio_xoff = nsd->priority_xoff_rx[i];
783 i40e_stat_update32(hw, I40E_GLPRT_PXOFFRXC(hw->port, i),
784 pf->stat_offsets_loaded,
785 &osd->priority_xoff_rx[i],
786 &nsd->priority_xoff_rx[i]);
787
788 /* No new PFC xoff rx */
789 if (!(nsd->priority_xoff_rx[i] - prio_xoff))
790 continue;
791 /* Get the TC for given priority */
792 tc = dcb_cfg->etscfg.prioritytable[i];
793 xoff[tc] = true;
794 }
795
796 /* Clear the __I40E_HANG_CHECK_ARMED bit for Tx rings */
797 for (v = 0; v < pf->num_alloc_vsi; v++) {
798 struct i40e_vsi *vsi = pf->vsi[v];
799
800 if (!vsi || !vsi->tx_rings[0])
801 continue;
802
803 for (i = 0; i < vsi->num_queue_pairs; i++) {
804 struct i40e_ring *ring = vsi->tx_rings[i];
805
806 tc = ring->dcb_tc;
807 if (xoff[tc])
808 clear_bit(__I40E_HANG_CHECK_ARMED,
809 &ring->state);
810 }
811 }
812 }
813
814 /**
815 * i40e_update_vsi_stats - Update the vsi statistics counters.
816 * @vsi: the VSI to be updated
817 *
818 * There are a few instances where we store the same stat in a
819 * couple of different structs. This is partly because we have
820 * the netdev stats that need to be filled out, which is slightly
821 * different from the "eth_stats" defined by the chip and used in
822 * VF communications. We sort it out here.
823 **/
824 static void i40e_update_vsi_stats(struct i40e_vsi *vsi)
825 {
826 struct i40e_pf *pf = vsi->back;
827 struct rtnl_link_stats64 *ons;
828 struct rtnl_link_stats64 *ns; /* netdev stats */
829 struct i40e_eth_stats *oes;
830 struct i40e_eth_stats *es; /* device's eth stats */
831 u32 tx_restart, tx_busy;
832 struct i40e_ring *p;
833 u32 rx_page, rx_buf;
834 u64 bytes, packets;
835 unsigned int start;
836 u64 rx_p, rx_b;
837 u64 tx_p, tx_b;
838 u16 q;
839
840 if (test_bit(__I40E_DOWN, &vsi->state) ||
841 test_bit(__I40E_CONFIG_BUSY, &pf->state))
842 return;
843
844 ns = i40e_get_vsi_stats_struct(vsi);
845 ons = &vsi->net_stats_offsets;
846 es = &vsi->eth_stats;
847 oes = &vsi->eth_stats_offsets;
848
849 /* Gather up the netdev and vsi stats that the driver collects
850 * on the fly during packet processing
851 */
852 rx_b = rx_p = 0;
853 tx_b = tx_p = 0;
854 tx_restart = tx_busy = 0;
855 rx_page = 0;
856 rx_buf = 0;
857 rcu_read_lock();
858 for (q = 0; q < vsi->num_queue_pairs; q++) {
859 /* locate Tx ring */
860 p = ACCESS_ONCE(vsi->tx_rings[q]);
861
862 do {
863 start = u64_stats_fetch_begin_irq(&p->syncp);
864 packets = p->stats.packets;
865 bytes = p->stats.bytes;
866 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
867 tx_b += bytes;
868 tx_p += packets;
869 tx_restart += p->tx_stats.restart_queue;
870 tx_busy += p->tx_stats.tx_busy;
871
872 /* Rx queue is part of the same block as Tx queue */
873 p = &p[1];
874 do {
875 start = u64_stats_fetch_begin_irq(&p->syncp);
876 packets = p->stats.packets;
877 bytes = p->stats.bytes;
878 } while (u64_stats_fetch_retry_irq(&p->syncp, start));
879 rx_b += bytes;
880 rx_p += packets;
881 rx_buf += p->rx_stats.alloc_buff_failed;
882 rx_page += p->rx_stats.alloc_page_failed;
883 }
884 rcu_read_unlock();
885 vsi->tx_restart = tx_restart;
886 vsi->tx_busy = tx_busy;
887 vsi->rx_page_failed = rx_page;
888 vsi->rx_buf_failed = rx_buf;
889
890 ns->rx_packets = rx_p;
891 ns->rx_bytes = rx_b;
892 ns->tx_packets = tx_p;
893 ns->tx_bytes = tx_b;
894
895 /* update netdev stats from eth stats */
896 i40e_update_eth_stats(vsi);
897 ons->tx_errors = oes->tx_errors;
898 ns->tx_errors = es->tx_errors;
899 ons->multicast = oes->rx_multicast;
900 ns->multicast = es->rx_multicast;
901 ons->rx_dropped = oes->rx_discards;
902 ns->rx_dropped = es->rx_discards;
903 ons->tx_dropped = oes->tx_discards;
904 ns->tx_dropped = es->tx_discards;
905
906 /* pull in a couple PF stats if this is the main vsi */
907 if (vsi == pf->vsi[pf->lan_vsi]) {
908 ns->rx_crc_errors = pf->stats.crc_errors;
909 ns->rx_errors = pf->stats.crc_errors + pf->stats.illegal_bytes;
910 ns->rx_length_errors = pf->stats.rx_length_errors;
911 }
912 }
913
914 /**
915 * i40e_update_pf_stats - Update the PF statistics counters.
916 * @pf: the PF to be updated
917 **/
918 static void i40e_update_pf_stats(struct i40e_pf *pf)
919 {
920 struct i40e_hw_port_stats *osd = &pf->stats_offsets;
921 struct i40e_hw_port_stats *nsd = &pf->stats;
922 struct i40e_hw *hw = &pf->hw;
923 u32 val;
924 int i;
925
926 i40e_stat_update48(hw, I40E_GLPRT_GORCH(hw->port),
927 I40E_GLPRT_GORCL(hw->port),
928 pf->stat_offsets_loaded,
929 &osd->eth.rx_bytes, &nsd->eth.rx_bytes);
930 i40e_stat_update48(hw, I40E_GLPRT_GOTCH(hw->port),
931 I40E_GLPRT_GOTCL(hw->port),
932 pf->stat_offsets_loaded,
933 &osd->eth.tx_bytes, &nsd->eth.tx_bytes);
934 i40e_stat_update32(hw, I40E_GLPRT_RDPC(hw->port),
935 pf->stat_offsets_loaded,
936 &osd->eth.rx_discards,
937 &nsd->eth.rx_discards);
938 i40e_stat_update48(hw, I40E_GLPRT_UPRCH(hw->port),
939 I40E_GLPRT_UPRCL(hw->port),
940 pf->stat_offsets_loaded,
941 &osd->eth.rx_unicast,
942 &nsd->eth.rx_unicast);
943 i40e_stat_update48(hw, I40E_GLPRT_MPRCH(hw->port),
944 I40E_GLPRT_MPRCL(hw->port),
945 pf->stat_offsets_loaded,
946 &osd->eth.rx_multicast,
947 &nsd->eth.rx_multicast);
948 i40e_stat_update48(hw, I40E_GLPRT_BPRCH(hw->port),
949 I40E_GLPRT_BPRCL(hw->port),
950 pf->stat_offsets_loaded,
951 &osd->eth.rx_broadcast,
952 &nsd->eth.rx_broadcast);
953 i40e_stat_update48(hw, I40E_GLPRT_UPTCH(hw->port),
954 I40E_GLPRT_UPTCL(hw->port),
955 pf->stat_offsets_loaded,
956 &osd->eth.tx_unicast,
957 &nsd->eth.tx_unicast);
958 i40e_stat_update48(hw, I40E_GLPRT_MPTCH(hw->port),
959 I40E_GLPRT_MPTCL(hw->port),
960 pf->stat_offsets_loaded,
961 &osd->eth.tx_multicast,
962 &nsd->eth.tx_multicast);
963 i40e_stat_update48(hw, I40E_GLPRT_BPTCH(hw->port),
964 I40E_GLPRT_BPTCL(hw->port),
965 pf->stat_offsets_loaded,
966 &osd->eth.tx_broadcast,
967 &nsd->eth.tx_broadcast);
968
969 i40e_stat_update32(hw, I40E_GLPRT_TDOLD(hw->port),
970 pf->stat_offsets_loaded,
971 &osd->tx_dropped_link_down,
972 &nsd->tx_dropped_link_down);
973
974 i40e_stat_update32(hw, I40E_GLPRT_CRCERRS(hw->port),
975 pf->stat_offsets_loaded,
976 &osd->crc_errors, &nsd->crc_errors);
977
978 i40e_stat_update32(hw, I40E_GLPRT_ILLERRC(hw->port),
979 pf->stat_offsets_loaded,
980 &osd->illegal_bytes, &nsd->illegal_bytes);
981
982 i40e_stat_update32(hw, I40E_GLPRT_MLFC(hw->port),
983 pf->stat_offsets_loaded,
984 &osd->mac_local_faults,
985 &nsd->mac_local_faults);
986 i40e_stat_update32(hw, I40E_GLPRT_MRFC(hw->port),
987 pf->stat_offsets_loaded,
988 &osd->mac_remote_faults,
989 &nsd->mac_remote_faults);
990
991 i40e_stat_update32(hw, I40E_GLPRT_RLEC(hw->port),
992 pf->stat_offsets_loaded,
993 &osd->rx_length_errors,
994 &nsd->rx_length_errors);
995
996 i40e_stat_update32(hw, I40E_GLPRT_LXONRXC(hw->port),
997 pf->stat_offsets_loaded,
998 &osd->link_xon_rx, &nsd->link_xon_rx);
999 i40e_stat_update32(hw, I40E_GLPRT_LXONTXC(hw->port),
1000 pf->stat_offsets_loaded,
1001 &osd->link_xon_tx, &nsd->link_xon_tx);
1002 i40e_update_prio_xoff_rx(pf); /* handles I40E_GLPRT_LXOFFRXC */
1003 i40e_stat_update32(hw, I40E_GLPRT_LXOFFTXC(hw->port),
1004 pf->stat_offsets_loaded,
1005 &osd->link_xoff_tx, &nsd->link_xoff_tx);
1006
1007 for (i = 0; i < 8; i++) {
1008 i40e_stat_update32(hw, I40E_GLPRT_PXONRXC(hw->port, i),
1009 pf->stat_offsets_loaded,
1010 &osd->priority_xon_rx[i],
1011 &nsd->priority_xon_rx[i]);
1012 i40e_stat_update32(hw, I40E_GLPRT_PXONTXC(hw->port, i),
1013 pf->stat_offsets_loaded,
1014 &osd->priority_xon_tx[i],
1015 &nsd->priority_xon_tx[i]);
1016 i40e_stat_update32(hw, I40E_GLPRT_PXOFFTXC(hw->port, i),
1017 pf->stat_offsets_loaded,
1018 &osd->priority_xoff_tx[i],
1019 &nsd->priority_xoff_tx[i]);
1020 i40e_stat_update32(hw,
1021 I40E_GLPRT_RXON2OFFCNT(hw->port, i),
1022 pf->stat_offsets_loaded,
1023 &osd->priority_xon_2_xoff[i],
1024 &nsd->priority_xon_2_xoff[i]);
1025 }
1026
1027 i40e_stat_update48(hw, I40E_GLPRT_PRC64H(hw->port),
1028 I40E_GLPRT_PRC64L(hw->port),
1029 pf->stat_offsets_loaded,
1030 &osd->rx_size_64, &nsd->rx_size_64);
1031 i40e_stat_update48(hw, I40E_GLPRT_PRC127H(hw->port),
1032 I40E_GLPRT_PRC127L(hw->port),
1033 pf->stat_offsets_loaded,
1034 &osd->rx_size_127, &nsd->rx_size_127);
1035 i40e_stat_update48(hw, I40E_GLPRT_PRC255H(hw->port),
1036 I40E_GLPRT_PRC255L(hw->port),
1037 pf->stat_offsets_loaded,
1038 &osd->rx_size_255, &nsd->rx_size_255);
1039 i40e_stat_update48(hw, I40E_GLPRT_PRC511H(hw->port),
1040 I40E_GLPRT_PRC511L(hw->port),
1041 pf->stat_offsets_loaded,
1042 &osd->rx_size_511, &nsd->rx_size_511);
1043 i40e_stat_update48(hw, I40E_GLPRT_PRC1023H(hw->port),
1044 I40E_GLPRT_PRC1023L(hw->port),
1045 pf->stat_offsets_loaded,
1046 &osd->rx_size_1023, &nsd->rx_size_1023);
1047 i40e_stat_update48(hw, I40E_GLPRT_PRC1522H(hw->port),
1048 I40E_GLPRT_PRC1522L(hw->port),
1049 pf->stat_offsets_loaded,
1050 &osd->rx_size_1522, &nsd->rx_size_1522);
1051 i40e_stat_update48(hw, I40E_GLPRT_PRC9522H(hw->port),
1052 I40E_GLPRT_PRC9522L(hw->port),
1053 pf->stat_offsets_loaded,
1054 &osd->rx_size_big, &nsd->rx_size_big);
1055
1056 i40e_stat_update48(hw, I40E_GLPRT_PTC64H(hw->port),
1057 I40E_GLPRT_PTC64L(hw->port),
1058 pf->stat_offsets_loaded,
1059 &osd->tx_size_64, &nsd->tx_size_64);
1060 i40e_stat_update48(hw, I40E_GLPRT_PTC127H(hw->port),
1061 I40E_GLPRT_PTC127L(hw->port),
1062 pf->stat_offsets_loaded,
1063 &osd->tx_size_127, &nsd->tx_size_127);
1064 i40e_stat_update48(hw, I40E_GLPRT_PTC255H(hw->port),
1065 I40E_GLPRT_PTC255L(hw->port),
1066 pf->stat_offsets_loaded,
1067 &osd->tx_size_255, &nsd->tx_size_255);
1068 i40e_stat_update48(hw, I40E_GLPRT_PTC511H(hw->port),
1069 I40E_GLPRT_PTC511L(hw->port),
1070 pf->stat_offsets_loaded,
1071 &osd->tx_size_511, &nsd->tx_size_511);
1072 i40e_stat_update48(hw, I40E_GLPRT_PTC1023H(hw->port),
1073 I40E_GLPRT_PTC1023L(hw->port),
1074 pf->stat_offsets_loaded,
1075 &osd->tx_size_1023, &nsd->tx_size_1023);
1076 i40e_stat_update48(hw, I40E_GLPRT_PTC1522H(hw->port),
1077 I40E_GLPRT_PTC1522L(hw->port),
1078 pf->stat_offsets_loaded,
1079 &osd->tx_size_1522, &nsd->tx_size_1522);
1080 i40e_stat_update48(hw, I40E_GLPRT_PTC9522H(hw->port),
1081 I40E_GLPRT_PTC9522L(hw->port),
1082 pf->stat_offsets_loaded,
1083 &osd->tx_size_big, &nsd->tx_size_big);
1084
1085 i40e_stat_update32(hw, I40E_GLPRT_RUC(hw->port),
1086 pf->stat_offsets_loaded,
1087 &osd->rx_undersize, &nsd->rx_undersize);
1088 i40e_stat_update32(hw, I40E_GLPRT_RFC(hw->port),
1089 pf->stat_offsets_loaded,
1090 &osd->rx_fragments, &nsd->rx_fragments);
1091 i40e_stat_update32(hw, I40E_GLPRT_ROC(hw->port),
1092 pf->stat_offsets_loaded,
1093 &osd->rx_oversize, &nsd->rx_oversize);
1094 i40e_stat_update32(hw, I40E_GLPRT_RJC(hw->port),
1095 pf->stat_offsets_loaded,
1096 &osd->rx_jabber, &nsd->rx_jabber);
1097
1098 /* FDIR stats */
1099 i40e_stat_update32(hw,
1100 I40E_GLQF_PCNT(I40E_FD_ATR_STAT_IDX(pf->hw.pf_id)),
1101 pf->stat_offsets_loaded,
1102 &osd->fd_atr_match, &nsd->fd_atr_match);
1103 i40e_stat_update32(hw,
1104 I40E_GLQF_PCNT(I40E_FD_SB_STAT_IDX(pf->hw.pf_id)),
1105 pf->stat_offsets_loaded,
1106 &osd->fd_sb_match, &nsd->fd_sb_match);
1107 i40e_stat_update32(hw,
1108 I40E_GLQF_PCNT(I40E_FD_ATR_TUNNEL_STAT_IDX(pf->hw.pf_id)),
1109 pf->stat_offsets_loaded,
1110 &osd->fd_atr_tunnel_match, &nsd->fd_atr_tunnel_match);
1111
1112 val = rd32(hw, I40E_PRTPM_EEE_STAT);
1113 nsd->tx_lpi_status =
1114 (val & I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_MASK) >>
1115 I40E_PRTPM_EEE_STAT_TX_LPI_STATUS_SHIFT;
1116 nsd->rx_lpi_status =
1117 (val & I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_MASK) >>
1118 I40E_PRTPM_EEE_STAT_RX_LPI_STATUS_SHIFT;
1119 i40e_stat_update32(hw, I40E_PRTPM_TLPIC,
1120 pf->stat_offsets_loaded,
1121 &osd->tx_lpi_count, &nsd->tx_lpi_count);
1122 i40e_stat_update32(hw, I40E_PRTPM_RLPIC,
1123 pf->stat_offsets_loaded,
1124 &osd->rx_lpi_count, &nsd->rx_lpi_count);
1125
1126 if (pf->flags & I40E_FLAG_FD_SB_ENABLED &&
1127 !(pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED))
1128 nsd->fd_sb_status = true;
1129 else
1130 nsd->fd_sb_status = false;
1131
1132 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED &&
1133 !(pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED))
1134 nsd->fd_atr_status = true;
1135 else
1136 nsd->fd_atr_status = false;
1137
1138 pf->stat_offsets_loaded = true;
1139 }
1140
1141 /**
1142 * i40e_update_stats - Update the various statistics counters.
1143 * @vsi: the VSI to be updated
1144 *
1145 * Update the various stats for this VSI and its related entities.
1146 **/
1147 void i40e_update_stats(struct i40e_vsi *vsi)
1148 {
1149 struct i40e_pf *pf = vsi->back;
1150
1151 if (vsi == pf->vsi[pf->lan_vsi])
1152 i40e_update_pf_stats(pf);
1153
1154 i40e_update_vsi_stats(vsi);
1155 #ifdef I40E_FCOE
1156 i40e_update_fcoe_stats(vsi);
1157 #endif
1158 }
1159
1160 /**
1161 * i40e_find_filter - Search VSI filter list for specific mac/vlan filter
1162 * @vsi: the VSI to be searched
1163 * @macaddr: the MAC address
1164 * @vlan: the vlan
1165 * @is_vf: make sure its a VF filter, else doesn't matter
1166 * @is_netdev: make sure its a netdev filter, else doesn't matter
1167 *
1168 * Returns ptr to the filter object or NULL
1169 **/
1170 static struct i40e_mac_filter *i40e_find_filter(struct i40e_vsi *vsi,
1171 u8 *macaddr, s16 vlan,
1172 bool is_vf, bool is_netdev)
1173 {
1174 struct i40e_mac_filter *f;
1175
1176 if (!vsi || !macaddr)
1177 return NULL;
1178
1179 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1180 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1181 (vlan == f->vlan) &&
1182 (!is_vf || f->is_vf) &&
1183 (!is_netdev || f->is_netdev))
1184 return f;
1185 }
1186 return NULL;
1187 }
1188
1189 /**
1190 * i40e_find_mac - Find a mac addr in the macvlan filters list
1191 * @vsi: the VSI to be searched
1192 * @macaddr: the MAC address we are searching for
1193 * @is_vf: make sure its a VF filter, else doesn't matter
1194 * @is_netdev: make sure its a netdev filter, else doesn't matter
1195 *
1196 * Returns the first filter with the provided MAC address or NULL if
1197 * MAC address was not found
1198 **/
1199 struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, u8 *macaddr,
1200 bool is_vf, bool is_netdev)
1201 {
1202 struct i40e_mac_filter *f;
1203
1204 if (!vsi || !macaddr)
1205 return NULL;
1206
1207 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1208 if ((ether_addr_equal(macaddr, f->macaddr)) &&
1209 (!is_vf || f->is_vf) &&
1210 (!is_netdev || f->is_netdev))
1211 return f;
1212 }
1213 return NULL;
1214 }
1215
1216 /**
1217 * i40e_is_vsi_in_vlan - Check if VSI is in vlan mode
1218 * @vsi: the VSI to be searched
1219 *
1220 * Returns true if VSI is in vlan mode or false otherwise
1221 **/
1222 bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi)
1223 {
1224 struct i40e_mac_filter *f;
1225
1226 /* Only -1 for all the filters denotes not in vlan mode
1227 * so we have to go through all the list in order to make sure
1228 */
1229 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1230 if (f->vlan >= 0)
1231 return true;
1232 }
1233
1234 return false;
1235 }
1236
1237 /**
1238 * i40e_put_mac_in_vlan - Make macvlan filters from macaddrs and vlans
1239 * @vsi: the VSI to be searched
1240 * @macaddr: the mac address to be filtered
1241 * @is_vf: true if it is a VF
1242 * @is_netdev: true if it is a netdev
1243 *
1244 * Goes through all the macvlan filters and adds a
1245 * macvlan filter for each unique vlan that already exists
1246 *
1247 * Returns first filter found on success, else NULL
1248 **/
1249 struct i40e_mac_filter *i40e_put_mac_in_vlan(struct i40e_vsi *vsi, u8 *macaddr,
1250 bool is_vf, bool is_netdev)
1251 {
1252 struct i40e_mac_filter *f;
1253
1254 list_for_each_entry(f, &vsi->mac_filter_list, list) {
1255 if (!i40e_find_filter(vsi, macaddr, f->vlan,
1256 is_vf, is_netdev)) {
1257 if (!i40e_add_filter(vsi, macaddr, f->vlan,
1258 is_vf, is_netdev))
1259 return NULL;
1260 }
1261 }
1262
1263 return list_first_entry_or_null(&vsi->mac_filter_list,
1264 struct i40e_mac_filter, list);
1265 }
1266
1267 /**
1268 * i40e_rm_default_mac_filter - Remove the default MAC filter set by NVM
1269 * @vsi: the PF Main VSI - inappropriate for any other VSI
1270 * @macaddr: the MAC address
1271 *
1272 * Some older firmware configurations set up a default promiscuous VLAN
1273 * filter that needs to be removed.
1274 **/
1275 static int i40e_rm_default_mac_filter(struct i40e_vsi *vsi, u8 *macaddr)
1276 {
1277 struct i40e_aqc_remove_macvlan_element_data element;
1278 struct i40e_pf *pf = vsi->back;
1279 i40e_status aq_ret;
1280
1281 /* Only appropriate for the PF main VSI */
1282 if (vsi->type != I40E_VSI_MAIN)
1283 return -EINVAL;
1284
1285 memset(&element, 0, sizeof(element));
1286 ether_addr_copy(element.mac_addr, macaddr);
1287 element.vlan_tag = 0;
1288 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH |
1289 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
1290 aq_ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1291 if (aq_ret)
1292 return -ENOENT;
1293
1294 return 0;
1295 }
1296
1297 /**
1298 * i40e_add_filter - Add a mac/vlan filter to the VSI
1299 * @vsi: the VSI to be searched
1300 * @macaddr: the MAC address
1301 * @vlan: the vlan
1302 * @is_vf: make sure its a VF filter, else doesn't matter
1303 * @is_netdev: make sure its a netdev filter, else doesn't matter
1304 *
1305 * Returns ptr to the filter object or NULL when no memory available.
1306 **/
1307 struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
1308 u8 *macaddr, s16 vlan,
1309 bool is_vf, bool is_netdev)
1310 {
1311 struct i40e_mac_filter *f;
1312
1313 if (!vsi || !macaddr)
1314 return NULL;
1315
1316 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1317 if (!f) {
1318 f = kzalloc(sizeof(*f), GFP_ATOMIC);
1319 if (!f)
1320 goto add_filter_out;
1321
1322 ether_addr_copy(f->macaddr, macaddr);
1323 f->vlan = vlan;
1324 f->changed = true;
1325
1326 INIT_LIST_HEAD(&f->list);
1327 list_add(&f->list, &vsi->mac_filter_list);
1328 }
1329
1330 /* increment counter and add a new flag if needed */
1331 if (is_vf) {
1332 if (!f->is_vf) {
1333 f->is_vf = true;
1334 f->counter++;
1335 }
1336 } else if (is_netdev) {
1337 if (!f->is_netdev) {
1338 f->is_netdev = true;
1339 f->counter++;
1340 }
1341 } else {
1342 f->counter++;
1343 }
1344
1345 /* changed tells sync_filters_subtask to
1346 * push the filter down to the firmware
1347 */
1348 if (f->changed) {
1349 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1350 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1351 }
1352
1353 add_filter_out:
1354 return f;
1355 }
1356
1357 /**
1358 * i40e_del_filter - Remove a mac/vlan filter from the VSI
1359 * @vsi: the VSI to be searched
1360 * @macaddr: the MAC address
1361 * @vlan: the vlan
1362 * @is_vf: make sure it's a VF filter, else doesn't matter
1363 * @is_netdev: make sure it's a netdev filter, else doesn't matter
1364 **/
1365 void i40e_del_filter(struct i40e_vsi *vsi,
1366 u8 *macaddr, s16 vlan,
1367 bool is_vf, bool is_netdev)
1368 {
1369 struct i40e_mac_filter *f;
1370
1371 if (!vsi || !macaddr)
1372 return;
1373
1374 f = i40e_find_filter(vsi, macaddr, vlan, is_vf, is_netdev);
1375 if (!f || f->counter == 0)
1376 return;
1377
1378 if (is_vf) {
1379 if (f->is_vf) {
1380 f->is_vf = false;
1381 f->counter--;
1382 }
1383 } else if (is_netdev) {
1384 if (f->is_netdev) {
1385 f->is_netdev = false;
1386 f->counter--;
1387 }
1388 } else {
1389 /* make sure we don't remove a filter in use by VF or netdev */
1390 int min_f = 0;
1391 min_f += (f->is_vf ? 1 : 0);
1392 min_f += (f->is_netdev ? 1 : 0);
1393
1394 if (f->counter > min_f)
1395 f->counter--;
1396 }
1397
1398 /* counter == 0 tells sync_filters_subtask to
1399 * remove the filter from the firmware's list
1400 */
1401 if (f->counter == 0) {
1402 f->changed = true;
1403 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1404 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1405 }
1406 }
1407
1408 /**
1409 * i40e_set_mac - NDO callback to set mac address
1410 * @netdev: network interface device structure
1411 * @p: pointer to an address structure
1412 *
1413 * Returns 0 on success, negative on failure
1414 **/
1415 #ifdef I40E_FCOE
1416 int i40e_set_mac(struct net_device *netdev, void *p)
1417 #else
1418 static int i40e_set_mac(struct net_device *netdev, void *p)
1419 #endif
1420 {
1421 struct i40e_netdev_priv *np = netdev_priv(netdev);
1422 struct i40e_vsi *vsi = np->vsi;
1423 struct i40e_pf *pf = vsi->back;
1424 struct i40e_hw *hw = &pf->hw;
1425 struct sockaddr *addr = p;
1426 struct i40e_mac_filter *f;
1427
1428 if (!is_valid_ether_addr(addr->sa_data))
1429 return -EADDRNOTAVAIL;
1430
1431 if (ether_addr_equal(netdev->dev_addr, addr->sa_data)) {
1432 netdev_info(netdev, "already using mac address %pM\n",
1433 addr->sa_data);
1434 return 0;
1435 }
1436
1437 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
1438 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
1439 return -EADDRNOTAVAIL;
1440
1441 if (ether_addr_equal(hw->mac.addr, addr->sa_data))
1442 netdev_info(netdev, "returning to hw mac address %pM\n",
1443 hw->mac.addr);
1444 else
1445 netdev_info(netdev, "set new mac address %pM\n", addr->sa_data);
1446
1447 if (vsi->type == I40E_VSI_MAIN) {
1448 i40e_status ret;
1449 ret = i40e_aq_mac_address_write(&vsi->back->hw,
1450 I40E_AQC_WRITE_TYPE_LAA_WOL,
1451 addr->sa_data, NULL);
1452 if (ret) {
1453 netdev_info(netdev,
1454 "Addr change for Main VSI failed: %d\n",
1455 ret);
1456 return -EADDRNOTAVAIL;
1457 }
1458 }
1459
1460 if (ether_addr_equal(netdev->dev_addr, hw->mac.addr)) {
1461 struct i40e_aqc_remove_macvlan_element_data element;
1462
1463 memset(&element, 0, sizeof(element));
1464 ether_addr_copy(element.mac_addr, netdev->dev_addr);
1465 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1466 i40e_aq_remove_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1467 } else {
1468 i40e_del_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
1469 false, false);
1470 }
1471
1472 if (ether_addr_equal(addr->sa_data, hw->mac.addr)) {
1473 struct i40e_aqc_add_macvlan_element_data element;
1474
1475 memset(&element, 0, sizeof(element));
1476 ether_addr_copy(element.mac_addr, hw->mac.addr);
1477 element.flags = cpu_to_le16(I40E_AQC_MACVLAN_ADD_PERFECT_MATCH);
1478 i40e_aq_add_macvlan(&pf->hw, vsi->seid, &element, 1, NULL);
1479 } else {
1480 f = i40e_add_filter(vsi, addr->sa_data, I40E_VLAN_ANY,
1481 false, false);
1482 if (f)
1483 f->is_laa = true;
1484 }
1485
1486 i40e_sync_vsi_filters(vsi);
1487 ether_addr_copy(netdev->dev_addr, addr->sa_data);
1488
1489 return 0;
1490 }
1491
1492 /**
1493 * i40e_vsi_setup_queue_map - Setup a VSI queue map based on enabled_tc
1494 * @vsi: the VSI being setup
1495 * @ctxt: VSI context structure
1496 * @enabled_tc: Enabled TCs bitmap
1497 * @is_add: True if called before Add VSI
1498 *
1499 * Setup VSI queue mapping for enabled traffic classes.
1500 **/
1501 #ifdef I40E_FCOE
1502 void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1503 struct i40e_vsi_context *ctxt,
1504 u8 enabled_tc,
1505 bool is_add)
1506 #else
1507 static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1508 struct i40e_vsi_context *ctxt,
1509 u8 enabled_tc,
1510 bool is_add)
1511 #endif
1512 {
1513 struct i40e_pf *pf = vsi->back;
1514 u16 sections = 0;
1515 u8 netdev_tc = 0;
1516 u16 numtc = 0;
1517 u16 qcount;
1518 u8 offset;
1519 u16 qmap;
1520 int i;
1521 u16 num_tc_qps = 0;
1522
1523 sections = I40E_AQ_VSI_PROP_QUEUE_MAP_VALID;
1524 offset = 0;
1525
1526 if (enabled_tc && (vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
1527 /* Find numtc from enabled TC bitmap */
1528 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1529 if (enabled_tc & (1 << i)) /* TC is enabled */
1530 numtc++;
1531 }
1532 if (!numtc) {
1533 dev_warn(&pf->pdev->dev, "DCB is enabled but no TC enabled, forcing TC0\n");
1534 numtc = 1;
1535 }
1536 } else {
1537 /* At least TC0 is enabled in case of non-DCB case */
1538 numtc = 1;
1539 }
1540
1541 vsi->tc_config.numtc = numtc;
1542 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
1543 /* Number of queues per enabled TC */
1544 /* In MFP case we can have a much lower count of MSIx
1545 * vectors available and so we need to lower the used
1546 * q count.
1547 */
1548 qcount = min_t(int, vsi->alloc_queue_pairs, pf->num_lan_msix);
1549 num_tc_qps = qcount / numtc;
1550 num_tc_qps = min_t(int, num_tc_qps, I40E_MAX_QUEUES_PER_TC);
1551
1552 /* Setup queue offset/count for all TCs for given VSI */
1553 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1554 /* See if the given TC is enabled for the given VSI */
1555 if (vsi->tc_config.enabled_tc & (1 << i)) { /* TC is enabled */
1556 int pow, num_qps;
1557
1558 switch (vsi->type) {
1559 case I40E_VSI_MAIN:
1560 qcount = min_t(int, pf->rss_size, num_tc_qps);
1561 break;
1562 #ifdef I40E_FCOE
1563 case I40E_VSI_FCOE:
1564 qcount = num_tc_qps;
1565 break;
1566 #endif
1567 case I40E_VSI_FDIR:
1568 case I40E_VSI_SRIOV:
1569 case I40E_VSI_VMDQ2:
1570 default:
1571 qcount = num_tc_qps;
1572 WARN_ON(i != 0);
1573 break;
1574 }
1575 vsi->tc_config.tc_info[i].qoffset = offset;
1576 vsi->tc_config.tc_info[i].qcount = qcount;
1577
1578 /* find the next higher power-of-2 of num queue pairs */
1579 num_qps = qcount;
1580 pow = 0;
1581 while (num_qps && ((1 << pow) < qcount)) {
1582 pow++;
1583 num_qps >>= 1;
1584 }
1585
1586 vsi->tc_config.tc_info[i].netdev_tc = netdev_tc++;
1587 qmap =
1588 (offset << I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT) |
1589 (pow << I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
1590
1591 offset += qcount;
1592 } else {
1593 /* TC is not enabled so set the offset to
1594 * default queue and allocate one queue
1595 * for the given TC.
1596 */
1597 vsi->tc_config.tc_info[i].qoffset = 0;
1598 vsi->tc_config.tc_info[i].qcount = 1;
1599 vsi->tc_config.tc_info[i].netdev_tc = 0;
1600
1601 qmap = 0;
1602 }
1603 ctxt->info.tc_mapping[i] = cpu_to_le16(qmap);
1604 }
1605
1606 /* Set actual Tx/Rx queue pairs */
1607 vsi->num_queue_pairs = offset;
1608 if ((vsi->type == I40E_VSI_MAIN) && (numtc == 1)) {
1609 if (vsi->req_queue_pairs > 0)
1610 vsi->num_queue_pairs = vsi->req_queue_pairs;
1611 else
1612 vsi->num_queue_pairs = pf->num_lan_msix;
1613 }
1614
1615 /* Scheduler section valid can only be set for ADD VSI */
1616 if (is_add) {
1617 sections |= I40E_AQ_VSI_PROP_SCHED_VALID;
1618
1619 ctxt->info.up_enable_bits = enabled_tc;
1620 }
1621 if (vsi->type == I40E_VSI_SRIOV) {
1622 ctxt->info.mapping_flags |=
1623 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_NONCONTIG);
1624 for (i = 0; i < vsi->num_queue_pairs; i++)
1625 ctxt->info.queue_mapping[i] =
1626 cpu_to_le16(vsi->base_queue + i);
1627 } else {
1628 ctxt->info.mapping_flags |=
1629 cpu_to_le16(I40E_AQ_VSI_QUE_MAP_CONTIG);
1630 ctxt->info.queue_mapping[0] = cpu_to_le16(vsi->base_queue);
1631 }
1632 ctxt->info.valid_sections |= cpu_to_le16(sections);
1633 }
1634
1635 /**
1636 * i40e_set_rx_mode - NDO callback to set the netdev filters
1637 * @netdev: network interface device structure
1638 **/
1639 #ifdef I40E_FCOE
1640 void i40e_set_rx_mode(struct net_device *netdev)
1641 #else
1642 static void i40e_set_rx_mode(struct net_device *netdev)
1643 #endif
1644 {
1645 struct i40e_netdev_priv *np = netdev_priv(netdev);
1646 struct i40e_mac_filter *f, *ftmp;
1647 struct i40e_vsi *vsi = np->vsi;
1648 struct netdev_hw_addr *uca;
1649 struct netdev_hw_addr *mca;
1650 struct netdev_hw_addr *ha;
1651
1652 /* add addr if not already in the filter list */
1653 netdev_for_each_uc_addr(uca, netdev) {
1654 if (!i40e_find_mac(vsi, uca->addr, false, true)) {
1655 if (i40e_is_vsi_in_vlan(vsi))
1656 i40e_put_mac_in_vlan(vsi, uca->addr,
1657 false, true);
1658 else
1659 i40e_add_filter(vsi, uca->addr, I40E_VLAN_ANY,
1660 false, true);
1661 }
1662 }
1663
1664 netdev_for_each_mc_addr(mca, netdev) {
1665 if (!i40e_find_mac(vsi, mca->addr, false, true)) {
1666 if (i40e_is_vsi_in_vlan(vsi))
1667 i40e_put_mac_in_vlan(vsi, mca->addr,
1668 false, true);
1669 else
1670 i40e_add_filter(vsi, mca->addr, I40E_VLAN_ANY,
1671 false, true);
1672 }
1673 }
1674
1675 /* remove filter if not in netdev list */
1676 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1677 bool found = false;
1678
1679 if (!f->is_netdev)
1680 continue;
1681
1682 if (is_multicast_ether_addr(f->macaddr)) {
1683 netdev_for_each_mc_addr(mca, netdev) {
1684 if (ether_addr_equal(mca->addr, f->macaddr)) {
1685 found = true;
1686 break;
1687 }
1688 }
1689 } else {
1690 netdev_for_each_uc_addr(uca, netdev) {
1691 if (ether_addr_equal(uca->addr, f->macaddr)) {
1692 found = true;
1693 break;
1694 }
1695 }
1696
1697 for_each_dev_addr(netdev, ha) {
1698 if (ether_addr_equal(ha->addr, f->macaddr)) {
1699 found = true;
1700 break;
1701 }
1702 }
1703 }
1704 if (!found)
1705 i40e_del_filter(
1706 vsi, f->macaddr, I40E_VLAN_ANY, false, true);
1707 }
1708
1709 /* check for other flag changes */
1710 if (vsi->current_netdev_flags != vsi->netdev->flags) {
1711 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
1712 vsi->back->flags |= I40E_FLAG_FILTER_SYNC;
1713 }
1714 }
1715
1716 /**
1717 * i40e_sync_vsi_filters - Update the VSI filter list to the HW
1718 * @vsi: ptr to the VSI
1719 *
1720 * Push any outstanding VSI filter changes through the AdminQ.
1721 *
1722 * Returns 0 or error value
1723 **/
1724 int i40e_sync_vsi_filters(struct i40e_vsi *vsi)
1725 {
1726 struct i40e_mac_filter *f, *ftmp;
1727 bool promisc_forced_on = false;
1728 bool add_happened = false;
1729 int filter_list_len = 0;
1730 u32 changed_flags = 0;
1731 i40e_status aq_ret = 0;
1732 struct i40e_pf *pf;
1733 int num_add = 0;
1734 int num_del = 0;
1735 u16 cmd_flags;
1736
1737 /* empty array typed pointers, kcalloc later */
1738 struct i40e_aqc_add_macvlan_element_data *add_list;
1739 struct i40e_aqc_remove_macvlan_element_data *del_list;
1740
1741 while (test_and_set_bit(__I40E_CONFIG_BUSY, &vsi->state))
1742 usleep_range(1000, 2000);
1743 pf = vsi->back;
1744
1745 if (vsi->netdev) {
1746 changed_flags = vsi->current_netdev_flags ^ vsi->netdev->flags;
1747 vsi->current_netdev_flags = vsi->netdev->flags;
1748 }
1749
1750 if (vsi->flags & I40E_VSI_FLAG_FILTER_CHANGED) {
1751 vsi->flags &= ~I40E_VSI_FLAG_FILTER_CHANGED;
1752
1753 filter_list_len = pf->hw.aq.asq_buf_size /
1754 sizeof(struct i40e_aqc_remove_macvlan_element_data);
1755 del_list = kcalloc(filter_list_len,
1756 sizeof(struct i40e_aqc_remove_macvlan_element_data),
1757 GFP_KERNEL);
1758 if (!del_list)
1759 return -ENOMEM;
1760
1761 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1762 if (!f->changed)
1763 continue;
1764
1765 if (f->counter != 0)
1766 continue;
1767 f->changed = false;
1768 cmd_flags = 0;
1769
1770 /* add to delete list */
1771 ether_addr_copy(del_list[num_del].mac_addr, f->macaddr);
1772 del_list[num_del].vlan_tag =
1773 cpu_to_le16((u16)(f->vlan ==
1774 I40E_VLAN_ANY ? 0 : f->vlan));
1775
1776 cmd_flags |= I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
1777 del_list[num_del].flags = cmd_flags;
1778 num_del++;
1779
1780 /* unlink from filter list */
1781 list_del(&f->list);
1782 kfree(f);
1783
1784 /* flush a full buffer */
1785 if (num_del == filter_list_len) {
1786 aq_ret = i40e_aq_remove_macvlan(&pf->hw,
1787 vsi->seid, del_list, num_del,
1788 NULL);
1789 num_del = 0;
1790 memset(del_list, 0, sizeof(*del_list));
1791
1792 if (aq_ret &&
1793 pf->hw.aq.asq_last_status !=
1794 I40E_AQ_RC_ENOENT)
1795 dev_info(&pf->pdev->dev,
1796 "ignoring delete macvlan error, err %d, aq_err %d while flushing a full buffer\n",
1797 aq_ret,
1798 pf->hw.aq.asq_last_status);
1799 }
1800 }
1801 if (num_del) {
1802 aq_ret = i40e_aq_remove_macvlan(&pf->hw, vsi->seid,
1803 del_list, num_del, NULL);
1804 num_del = 0;
1805
1806 if (aq_ret &&
1807 pf->hw.aq.asq_last_status != I40E_AQ_RC_ENOENT)
1808 dev_info(&pf->pdev->dev,
1809 "ignoring delete macvlan error, err %d, aq_err %d\n",
1810 aq_ret, pf->hw.aq.asq_last_status);
1811 }
1812
1813 kfree(del_list);
1814 del_list = NULL;
1815
1816 /* do all the adds now */
1817 filter_list_len = pf->hw.aq.asq_buf_size /
1818 sizeof(struct i40e_aqc_add_macvlan_element_data),
1819 add_list = kcalloc(filter_list_len,
1820 sizeof(struct i40e_aqc_add_macvlan_element_data),
1821 GFP_KERNEL);
1822 if (!add_list)
1823 return -ENOMEM;
1824
1825 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
1826 if (!f->changed)
1827 continue;
1828
1829 if (f->counter == 0)
1830 continue;
1831 f->changed = false;
1832 add_happened = true;
1833 cmd_flags = 0;
1834
1835 /* add to add array */
1836 ether_addr_copy(add_list[num_add].mac_addr, f->macaddr);
1837 add_list[num_add].vlan_tag =
1838 cpu_to_le16(
1839 (u16)(f->vlan == I40E_VLAN_ANY ? 0 : f->vlan));
1840 add_list[num_add].queue_number = 0;
1841
1842 cmd_flags |= I40E_AQC_MACVLAN_ADD_PERFECT_MATCH;
1843 add_list[num_add].flags = cpu_to_le16(cmd_flags);
1844 num_add++;
1845
1846 /* flush a full buffer */
1847 if (num_add == filter_list_len) {
1848 aq_ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
1849 add_list, num_add,
1850 NULL);
1851 num_add = 0;
1852
1853 if (aq_ret)
1854 break;
1855 memset(add_list, 0, sizeof(*add_list));
1856 }
1857 }
1858 if (num_add) {
1859 aq_ret = i40e_aq_add_macvlan(&pf->hw, vsi->seid,
1860 add_list, num_add, NULL);
1861 num_add = 0;
1862 }
1863 kfree(add_list);
1864 add_list = NULL;
1865
1866 if (add_happened && aq_ret &&
1867 pf->hw.aq.asq_last_status != I40E_AQ_RC_EINVAL) {
1868 dev_info(&pf->pdev->dev,
1869 "add filter failed, err %d, aq_err %d\n",
1870 aq_ret, pf->hw.aq.asq_last_status);
1871 if ((pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOSPC) &&
1872 !test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1873 &vsi->state)) {
1874 promisc_forced_on = true;
1875 set_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1876 &vsi->state);
1877 dev_info(&pf->pdev->dev, "promiscuous mode forced on\n");
1878 }
1879 }
1880 }
1881
1882 /* check for changes in promiscuous modes */
1883 if (changed_flags & IFF_ALLMULTI) {
1884 bool cur_multipromisc;
1885 cur_multipromisc = !!(vsi->current_netdev_flags & IFF_ALLMULTI);
1886 aq_ret = i40e_aq_set_vsi_multicast_promiscuous(&vsi->back->hw,
1887 vsi->seid,
1888 cur_multipromisc,
1889 NULL);
1890 if (aq_ret)
1891 dev_info(&pf->pdev->dev,
1892 "set multi promisc failed, err %d, aq_err %d\n",
1893 aq_ret, pf->hw.aq.asq_last_status);
1894 }
1895 if ((changed_flags & IFF_PROMISC) || promisc_forced_on) {
1896 bool cur_promisc;
1897 cur_promisc = (!!(vsi->current_netdev_flags & IFF_PROMISC) ||
1898 test_bit(__I40E_FILTER_OVERFLOW_PROMISC,
1899 &vsi->state));
1900 aq_ret = i40e_aq_set_vsi_unicast_promiscuous(&vsi->back->hw,
1901 vsi->seid,
1902 cur_promisc, NULL);
1903 if (aq_ret)
1904 dev_info(&pf->pdev->dev,
1905 "set uni promisc failed, err %d, aq_err %d\n",
1906 aq_ret, pf->hw.aq.asq_last_status);
1907 aq_ret = i40e_aq_set_vsi_broadcast(&vsi->back->hw,
1908 vsi->seid,
1909 cur_promisc, NULL);
1910 if (aq_ret)
1911 dev_info(&pf->pdev->dev,
1912 "set brdcast promisc failed, err %d, aq_err %d\n",
1913 aq_ret, pf->hw.aq.asq_last_status);
1914 }
1915
1916 clear_bit(__I40E_CONFIG_BUSY, &vsi->state);
1917 return 0;
1918 }
1919
1920 /**
1921 * i40e_sync_filters_subtask - Sync the VSI filter list with HW
1922 * @pf: board private structure
1923 **/
1924 static void i40e_sync_filters_subtask(struct i40e_pf *pf)
1925 {
1926 int v;
1927
1928 if (!pf || !(pf->flags & I40E_FLAG_FILTER_SYNC))
1929 return;
1930 pf->flags &= ~I40E_FLAG_FILTER_SYNC;
1931
1932 for (v = 0; v < pf->num_alloc_vsi; v++) {
1933 if (pf->vsi[v] &&
1934 (pf->vsi[v]->flags & I40E_VSI_FLAG_FILTER_CHANGED))
1935 i40e_sync_vsi_filters(pf->vsi[v]);
1936 }
1937 }
1938
1939 /**
1940 * i40e_change_mtu - NDO callback to change the Maximum Transfer Unit
1941 * @netdev: network interface device structure
1942 * @new_mtu: new value for maximum frame size
1943 *
1944 * Returns 0 on success, negative on failure
1945 **/
1946 static int i40e_change_mtu(struct net_device *netdev, int new_mtu)
1947 {
1948 struct i40e_netdev_priv *np = netdev_priv(netdev);
1949 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
1950 struct i40e_vsi *vsi = np->vsi;
1951
1952 /* MTU < 68 is an error and causes problems on some kernels */
1953 if ((new_mtu < 68) || (max_frame > I40E_MAX_RXBUFFER))
1954 return -EINVAL;
1955
1956 netdev_info(netdev, "changing MTU from %d to %d\n",
1957 netdev->mtu, new_mtu);
1958 netdev->mtu = new_mtu;
1959 if (netif_running(netdev))
1960 i40e_vsi_reinit_locked(vsi);
1961
1962 return 0;
1963 }
1964
1965 /**
1966 * i40e_ioctl - Access the hwtstamp interface
1967 * @netdev: network interface device structure
1968 * @ifr: interface request data
1969 * @cmd: ioctl command
1970 **/
1971 int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
1972 {
1973 struct i40e_netdev_priv *np = netdev_priv(netdev);
1974 struct i40e_pf *pf = np->vsi->back;
1975
1976 switch (cmd) {
1977 case SIOCGHWTSTAMP:
1978 return i40e_ptp_get_ts_config(pf, ifr);
1979 case SIOCSHWTSTAMP:
1980 return i40e_ptp_set_ts_config(pf, ifr);
1981 default:
1982 return -EOPNOTSUPP;
1983 }
1984 }
1985
1986 /**
1987 * i40e_vlan_stripping_enable - Turn on vlan stripping for the VSI
1988 * @vsi: the vsi being adjusted
1989 **/
1990 void i40e_vlan_stripping_enable(struct i40e_vsi *vsi)
1991 {
1992 struct i40e_vsi_context ctxt;
1993 i40e_status ret;
1994
1995 if ((vsi->info.valid_sections &
1996 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
1997 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_MODE_MASK) == 0))
1998 return; /* already enabled */
1999
2000 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2001 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2002 I40E_AQ_VSI_PVLAN_EMOD_STR_BOTH;
2003
2004 ctxt.seid = vsi->seid;
2005 ctxt.info = vsi->info;
2006 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2007 if (ret) {
2008 dev_info(&vsi->back->pdev->dev,
2009 "%s: update vsi failed, aq_err=%d\n",
2010 __func__, vsi->back->hw.aq.asq_last_status);
2011 }
2012 }
2013
2014 /**
2015 * i40e_vlan_stripping_disable - Turn off vlan stripping for the VSI
2016 * @vsi: the vsi being adjusted
2017 **/
2018 void i40e_vlan_stripping_disable(struct i40e_vsi *vsi)
2019 {
2020 struct i40e_vsi_context ctxt;
2021 i40e_status ret;
2022
2023 if ((vsi->info.valid_sections &
2024 cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID)) &&
2025 ((vsi->info.port_vlan_flags & I40E_AQ_VSI_PVLAN_EMOD_MASK) ==
2026 I40E_AQ_VSI_PVLAN_EMOD_MASK))
2027 return; /* already disabled */
2028
2029 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2030 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_ALL |
2031 I40E_AQ_VSI_PVLAN_EMOD_NOTHING;
2032
2033 ctxt.seid = vsi->seid;
2034 ctxt.info = vsi->info;
2035 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2036 if (ret) {
2037 dev_info(&vsi->back->pdev->dev,
2038 "%s: update vsi failed, aq_err=%d\n",
2039 __func__, vsi->back->hw.aq.asq_last_status);
2040 }
2041 }
2042
2043 /**
2044 * i40e_vlan_rx_register - Setup or shutdown vlan offload
2045 * @netdev: network interface to be adjusted
2046 * @features: netdev features to test if VLAN offload is enabled or not
2047 **/
2048 static void i40e_vlan_rx_register(struct net_device *netdev, u32 features)
2049 {
2050 struct i40e_netdev_priv *np = netdev_priv(netdev);
2051 struct i40e_vsi *vsi = np->vsi;
2052
2053 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2054 i40e_vlan_stripping_enable(vsi);
2055 else
2056 i40e_vlan_stripping_disable(vsi);
2057 }
2058
2059 /**
2060 * i40e_vsi_add_vlan - Add vsi membership for given vlan
2061 * @vsi: the vsi being configured
2062 * @vid: vlan id to be added (0 = untagged only , -1 = any)
2063 **/
2064 int i40e_vsi_add_vlan(struct i40e_vsi *vsi, s16 vid)
2065 {
2066 struct i40e_mac_filter *f, *add_f;
2067 bool is_netdev, is_vf;
2068
2069 is_vf = (vsi->type == I40E_VSI_SRIOV);
2070 is_netdev = !!(vsi->netdev);
2071
2072 if (is_netdev) {
2073 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, vid,
2074 is_vf, is_netdev);
2075 if (!add_f) {
2076 dev_info(&vsi->back->pdev->dev,
2077 "Could not add vlan filter %d for %pM\n",
2078 vid, vsi->netdev->dev_addr);
2079 return -ENOMEM;
2080 }
2081 }
2082
2083 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2084 add_f = i40e_add_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
2085 if (!add_f) {
2086 dev_info(&vsi->back->pdev->dev,
2087 "Could not add vlan filter %d for %pM\n",
2088 vid, f->macaddr);
2089 return -ENOMEM;
2090 }
2091 }
2092
2093 /* Now if we add a vlan tag, make sure to check if it is the first
2094 * tag (i.e. a "tag" -1 does exist) and if so replace the -1 "tag"
2095 * with 0, so we now accept untagged and specified tagged traffic
2096 * (and not any taged and untagged)
2097 */
2098 if (vid > 0) {
2099 if (is_netdev && i40e_find_filter(vsi, vsi->netdev->dev_addr,
2100 I40E_VLAN_ANY,
2101 is_vf, is_netdev)) {
2102 i40e_del_filter(vsi, vsi->netdev->dev_addr,
2103 I40E_VLAN_ANY, is_vf, is_netdev);
2104 add_f = i40e_add_filter(vsi, vsi->netdev->dev_addr, 0,
2105 is_vf, is_netdev);
2106 if (!add_f) {
2107 dev_info(&vsi->back->pdev->dev,
2108 "Could not add filter 0 for %pM\n",
2109 vsi->netdev->dev_addr);
2110 return -ENOMEM;
2111 }
2112 }
2113 }
2114
2115 /* Do not assume that I40E_VLAN_ANY should be reset to VLAN 0 */
2116 if (vid > 0 && !vsi->info.pvid) {
2117 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2118 if (i40e_find_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2119 is_vf, is_netdev)) {
2120 i40e_del_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2121 is_vf, is_netdev);
2122 add_f = i40e_add_filter(vsi, f->macaddr,
2123 0, is_vf, is_netdev);
2124 if (!add_f) {
2125 dev_info(&vsi->back->pdev->dev,
2126 "Could not add filter 0 for %pM\n",
2127 f->macaddr);
2128 return -ENOMEM;
2129 }
2130 }
2131 }
2132 }
2133
2134 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
2135 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
2136 return 0;
2137
2138 return i40e_sync_vsi_filters(vsi);
2139 }
2140
2141 /**
2142 * i40e_vsi_kill_vlan - Remove vsi membership for given vlan
2143 * @vsi: the vsi being configured
2144 * @vid: vlan id to be removed (0 = untagged only , -1 = any)
2145 *
2146 * Return: 0 on success or negative otherwise
2147 **/
2148 int i40e_vsi_kill_vlan(struct i40e_vsi *vsi, s16 vid)
2149 {
2150 struct net_device *netdev = vsi->netdev;
2151 struct i40e_mac_filter *f, *add_f;
2152 bool is_vf, is_netdev;
2153 int filter_count = 0;
2154
2155 is_vf = (vsi->type == I40E_VSI_SRIOV);
2156 is_netdev = !!(netdev);
2157
2158 if (is_netdev)
2159 i40e_del_filter(vsi, netdev->dev_addr, vid, is_vf, is_netdev);
2160
2161 list_for_each_entry(f, &vsi->mac_filter_list, list)
2162 i40e_del_filter(vsi, f->macaddr, vid, is_vf, is_netdev);
2163
2164 /* go through all the filters for this VSI and if there is only
2165 * vid == 0 it means there are no other filters, so vid 0 must
2166 * be replaced with -1. This signifies that we should from now
2167 * on accept any traffic (with any tag present, or untagged)
2168 */
2169 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2170 if (is_netdev) {
2171 if (f->vlan &&
2172 ether_addr_equal(netdev->dev_addr, f->macaddr))
2173 filter_count++;
2174 }
2175
2176 if (f->vlan)
2177 filter_count++;
2178 }
2179
2180 if (!filter_count && is_netdev) {
2181 i40e_del_filter(vsi, netdev->dev_addr, 0, is_vf, is_netdev);
2182 f = i40e_add_filter(vsi, netdev->dev_addr, I40E_VLAN_ANY,
2183 is_vf, is_netdev);
2184 if (!f) {
2185 dev_info(&vsi->back->pdev->dev,
2186 "Could not add filter %d for %pM\n",
2187 I40E_VLAN_ANY, netdev->dev_addr);
2188 return -ENOMEM;
2189 }
2190 }
2191
2192 if (!filter_count) {
2193 list_for_each_entry(f, &vsi->mac_filter_list, list) {
2194 i40e_del_filter(vsi, f->macaddr, 0, is_vf, is_netdev);
2195 add_f = i40e_add_filter(vsi, f->macaddr, I40E_VLAN_ANY,
2196 is_vf, is_netdev);
2197 if (!add_f) {
2198 dev_info(&vsi->back->pdev->dev,
2199 "Could not add filter %d for %pM\n",
2200 I40E_VLAN_ANY, f->macaddr);
2201 return -ENOMEM;
2202 }
2203 }
2204 }
2205
2206 if (test_bit(__I40E_DOWN, &vsi->back->state) ||
2207 test_bit(__I40E_RESET_RECOVERY_PENDING, &vsi->back->state))
2208 return 0;
2209
2210 return i40e_sync_vsi_filters(vsi);
2211 }
2212
2213 /**
2214 * i40e_vlan_rx_add_vid - Add a vlan id filter to HW offload
2215 * @netdev: network interface to be adjusted
2216 * @vid: vlan id to be added
2217 *
2218 * net_device_ops implementation for adding vlan ids
2219 **/
2220 #ifdef I40E_FCOE
2221 int i40e_vlan_rx_add_vid(struct net_device *netdev,
2222 __always_unused __be16 proto, u16 vid)
2223 #else
2224 static int i40e_vlan_rx_add_vid(struct net_device *netdev,
2225 __always_unused __be16 proto, u16 vid)
2226 #endif
2227 {
2228 struct i40e_netdev_priv *np = netdev_priv(netdev);
2229 struct i40e_vsi *vsi = np->vsi;
2230 int ret = 0;
2231
2232 if (vid > 4095)
2233 return -EINVAL;
2234
2235 netdev_info(netdev, "adding %pM vid=%d\n", netdev->dev_addr, vid);
2236
2237 /* If the network stack called us with vid = 0 then
2238 * it is asking to receive priority tagged packets with
2239 * vlan id 0. Our HW receives them by default when configured
2240 * to receive untagged packets so there is no need to add an
2241 * extra filter for vlan 0 tagged packets.
2242 */
2243 if (vid)
2244 ret = i40e_vsi_add_vlan(vsi, vid);
2245
2246 if (!ret && (vid < VLAN_N_VID))
2247 set_bit(vid, vsi->active_vlans);
2248
2249 return ret;
2250 }
2251
2252 /**
2253 * i40e_vlan_rx_kill_vid - Remove a vlan id filter from HW offload
2254 * @netdev: network interface to be adjusted
2255 * @vid: vlan id to be removed
2256 *
2257 * net_device_ops implementation for removing vlan ids
2258 **/
2259 #ifdef I40E_FCOE
2260 int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2261 __always_unused __be16 proto, u16 vid)
2262 #else
2263 static int i40e_vlan_rx_kill_vid(struct net_device *netdev,
2264 __always_unused __be16 proto, u16 vid)
2265 #endif
2266 {
2267 struct i40e_netdev_priv *np = netdev_priv(netdev);
2268 struct i40e_vsi *vsi = np->vsi;
2269
2270 netdev_info(netdev, "removing %pM vid=%d\n", netdev->dev_addr, vid);
2271
2272 /* return code is ignored as there is nothing a user
2273 * can do about failure to remove and a log message was
2274 * already printed from the other function
2275 */
2276 i40e_vsi_kill_vlan(vsi, vid);
2277
2278 clear_bit(vid, vsi->active_vlans);
2279
2280 return 0;
2281 }
2282
2283 /**
2284 * i40e_restore_vlan - Reinstate vlans when vsi/netdev comes back up
2285 * @vsi: the vsi being brought back up
2286 **/
2287 static void i40e_restore_vlan(struct i40e_vsi *vsi)
2288 {
2289 u16 vid;
2290
2291 if (!vsi->netdev)
2292 return;
2293
2294 i40e_vlan_rx_register(vsi->netdev, vsi->netdev->features);
2295
2296 for_each_set_bit(vid, vsi->active_vlans, VLAN_N_VID)
2297 i40e_vlan_rx_add_vid(vsi->netdev, htons(ETH_P_8021Q),
2298 vid);
2299 }
2300
2301 /**
2302 * i40e_vsi_add_pvid - Add pvid for the VSI
2303 * @vsi: the vsi being adjusted
2304 * @vid: the vlan id to set as a PVID
2305 **/
2306 int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid)
2307 {
2308 struct i40e_vsi_context ctxt;
2309 i40e_status aq_ret;
2310
2311 vsi->info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
2312 vsi->info.pvid = cpu_to_le16(vid);
2313 vsi->info.port_vlan_flags = I40E_AQ_VSI_PVLAN_MODE_TAGGED |
2314 I40E_AQ_VSI_PVLAN_INSERT_PVID |
2315 I40E_AQ_VSI_PVLAN_EMOD_STR;
2316
2317 ctxt.seid = vsi->seid;
2318 ctxt.info = vsi->info;
2319 aq_ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
2320 if (aq_ret) {
2321 dev_info(&vsi->back->pdev->dev,
2322 "%s: update vsi failed, aq_err=%d\n",
2323 __func__, vsi->back->hw.aq.asq_last_status);
2324 return -ENOENT;
2325 }
2326
2327 return 0;
2328 }
2329
2330 /**
2331 * i40e_vsi_remove_pvid - Remove the pvid from the VSI
2332 * @vsi: the vsi being adjusted
2333 *
2334 * Just use the vlan_rx_register() service to put it back to normal
2335 **/
2336 void i40e_vsi_remove_pvid(struct i40e_vsi *vsi)
2337 {
2338 i40e_vlan_stripping_disable(vsi);
2339
2340 vsi->info.pvid = 0;
2341 }
2342
2343 /**
2344 * i40e_vsi_setup_tx_resources - Allocate VSI Tx queue resources
2345 * @vsi: ptr to the VSI
2346 *
2347 * If this function returns with an error, then it's possible one or
2348 * more of the rings is populated (while the rest are not). It is the
2349 * callers duty to clean those orphaned rings.
2350 *
2351 * Return 0 on success, negative on failure
2352 **/
2353 static int i40e_vsi_setup_tx_resources(struct i40e_vsi *vsi)
2354 {
2355 int i, err = 0;
2356
2357 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2358 err = i40e_setup_tx_descriptors(vsi->tx_rings[i]);
2359
2360 return err;
2361 }
2362
2363 /**
2364 * i40e_vsi_free_tx_resources - Free Tx resources for VSI queues
2365 * @vsi: ptr to the VSI
2366 *
2367 * Free VSI's transmit software resources
2368 **/
2369 static void i40e_vsi_free_tx_resources(struct i40e_vsi *vsi)
2370 {
2371 int i;
2372
2373 if (!vsi->tx_rings)
2374 return;
2375
2376 for (i = 0; i < vsi->num_queue_pairs; i++)
2377 if (vsi->tx_rings[i] && vsi->tx_rings[i]->desc)
2378 i40e_free_tx_resources(vsi->tx_rings[i]);
2379 }
2380
2381 /**
2382 * i40e_vsi_setup_rx_resources - Allocate VSI queues Rx resources
2383 * @vsi: ptr to the VSI
2384 *
2385 * If this function returns with an error, then it's possible one or
2386 * more of the rings is populated (while the rest are not). It is the
2387 * callers duty to clean those orphaned rings.
2388 *
2389 * Return 0 on success, negative on failure
2390 **/
2391 static int i40e_vsi_setup_rx_resources(struct i40e_vsi *vsi)
2392 {
2393 int i, err = 0;
2394
2395 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2396 err = i40e_setup_rx_descriptors(vsi->rx_rings[i]);
2397 #ifdef I40E_FCOE
2398 i40e_fcoe_setup_ddp_resources(vsi);
2399 #endif
2400 return err;
2401 }
2402
2403 /**
2404 * i40e_vsi_free_rx_resources - Free Rx Resources for VSI queues
2405 * @vsi: ptr to the VSI
2406 *
2407 * Free all receive software resources
2408 **/
2409 static void i40e_vsi_free_rx_resources(struct i40e_vsi *vsi)
2410 {
2411 int i;
2412
2413 if (!vsi->rx_rings)
2414 return;
2415
2416 for (i = 0; i < vsi->num_queue_pairs; i++)
2417 if (vsi->rx_rings[i] && vsi->rx_rings[i]->desc)
2418 i40e_free_rx_resources(vsi->rx_rings[i]);
2419 #ifdef I40E_FCOE
2420 i40e_fcoe_free_ddp_resources(vsi);
2421 #endif
2422 }
2423
2424 /**
2425 * i40e_config_xps_tx_ring - Configure XPS for a Tx ring
2426 * @ring: The Tx ring to configure
2427 *
2428 * This enables/disables XPS for a given Tx descriptor ring
2429 * based on the TCs enabled for the VSI that ring belongs to.
2430 **/
2431 static void i40e_config_xps_tx_ring(struct i40e_ring *ring)
2432 {
2433 struct i40e_vsi *vsi = ring->vsi;
2434 cpumask_var_t mask;
2435
2436 if (!ring->q_vector || !ring->netdev)
2437 return;
2438
2439 /* Single TC mode enable XPS */
2440 if (vsi->tc_config.numtc <= 1) {
2441 if (!test_and_set_bit(__I40E_TX_XPS_INIT_DONE, &ring->state))
2442 netif_set_xps_queue(ring->netdev,
2443 &ring->q_vector->affinity_mask,
2444 ring->queue_index);
2445 } else if (alloc_cpumask_var(&mask, GFP_KERNEL)) {
2446 /* Disable XPS to allow selection based on TC */
2447 bitmap_zero(cpumask_bits(mask), nr_cpumask_bits);
2448 netif_set_xps_queue(ring->netdev, mask, ring->queue_index);
2449 free_cpumask_var(mask);
2450 }
2451 }
2452
2453 /**
2454 * i40e_configure_tx_ring - Configure a transmit ring context and rest
2455 * @ring: The Tx ring to configure
2456 *
2457 * Configure the Tx descriptor ring in the HMC context.
2458 **/
2459 static int i40e_configure_tx_ring(struct i40e_ring *ring)
2460 {
2461 struct i40e_vsi *vsi = ring->vsi;
2462 u16 pf_q = vsi->base_queue + ring->queue_index;
2463 struct i40e_hw *hw = &vsi->back->hw;
2464 struct i40e_hmc_obj_txq tx_ctx;
2465 i40e_status err = 0;
2466 u32 qtx_ctl = 0;
2467
2468 /* some ATR related tx ring init */
2469 if (vsi->back->flags & I40E_FLAG_FD_ATR_ENABLED) {
2470 ring->atr_sample_rate = vsi->back->atr_sample_rate;
2471 ring->atr_count = 0;
2472 } else {
2473 ring->atr_sample_rate = 0;
2474 }
2475
2476 /* configure XPS */
2477 i40e_config_xps_tx_ring(ring);
2478
2479 /* clear the context structure first */
2480 memset(&tx_ctx, 0, sizeof(tx_ctx));
2481
2482 tx_ctx.new_context = 1;
2483 tx_ctx.base = (ring->dma / 128);
2484 tx_ctx.qlen = ring->count;
2485 tx_ctx.fd_ena = !!(vsi->back->flags & (I40E_FLAG_FD_SB_ENABLED |
2486 I40E_FLAG_FD_ATR_ENABLED));
2487 #ifdef I40E_FCOE
2488 tx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
2489 #endif
2490 tx_ctx.timesync_ena = !!(vsi->back->flags & I40E_FLAG_PTP);
2491 /* FDIR VSI tx ring can still use RS bit and writebacks */
2492 if (vsi->type != I40E_VSI_FDIR)
2493 tx_ctx.head_wb_ena = 1;
2494 tx_ctx.head_wb_addr = ring->dma +
2495 (ring->count * sizeof(struct i40e_tx_desc));
2496
2497 /* As part of VSI creation/update, FW allocates certain
2498 * Tx arbitration queue sets for each TC enabled for
2499 * the VSI. The FW returns the handles to these queue
2500 * sets as part of the response buffer to Add VSI,
2501 * Update VSI, etc. AQ commands. It is expected that
2502 * these queue set handles be associated with the Tx
2503 * queues by the driver as part of the TX queue context
2504 * initialization. This has to be done regardless of
2505 * DCB as by default everything is mapped to TC0.
2506 */
2507 tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[ring->dcb_tc]);
2508 tx_ctx.rdylist_act = 0;
2509
2510 /* clear the context in the HMC */
2511 err = i40e_clear_lan_tx_queue_context(hw, pf_q);
2512 if (err) {
2513 dev_info(&vsi->back->pdev->dev,
2514 "Failed to clear LAN Tx queue context on Tx ring %d (pf_q %d), error: %d\n",
2515 ring->queue_index, pf_q, err);
2516 return -ENOMEM;
2517 }
2518
2519 /* set the context in the HMC */
2520 err = i40e_set_lan_tx_queue_context(hw, pf_q, &tx_ctx);
2521 if (err) {
2522 dev_info(&vsi->back->pdev->dev,
2523 "Failed to set LAN Tx queue context on Tx ring %d (pf_q %d, error: %d\n",
2524 ring->queue_index, pf_q, err);
2525 return -ENOMEM;
2526 }
2527
2528 /* Now associate this queue with this PCI function */
2529 if (vsi->type == I40E_VSI_VMDQ2) {
2530 qtx_ctl = I40E_QTX_CTL_VM_QUEUE;
2531 qtx_ctl |= ((vsi->id) << I40E_QTX_CTL_VFVM_INDX_SHIFT) &
2532 I40E_QTX_CTL_VFVM_INDX_MASK;
2533 } else {
2534 qtx_ctl = I40E_QTX_CTL_PF_QUEUE;
2535 }
2536
2537 qtx_ctl |= ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) &
2538 I40E_QTX_CTL_PF_INDX_MASK);
2539 wr32(hw, I40E_QTX_CTL(pf_q), qtx_ctl);
2540 i40e_flush(hw);
2541
2542 clear_bit(__I40E_HANG_CHECK_ARMED, &ring->state);
2543
2544 /* cache tail off for easier writes later */
2545 ring->tail = hw->hw_addr + I40E_QTX_TAIL(pf_q);
2546
2547 return 0;
2548 }
2549
2550 /**
2551 * i40e_configure_rx_ring - Configure a receive ring context
2552 * @ring: The Rx ring to configure
2553 *
2554 * Configure the Rx descriptor ring in the HMC context.
2555 **/
2556 static int i40e_configure_rx_ring(struct i40e_ring *ring)
2557 {
2558 struct i40e_vsi *vsi = ring->vsi;
2559 u32 chain_len = vsi->back->hw.func_caps.rx_buf_chain_len;
2560 u16 pf_q = vsi->base_queue + ring->queue_index;
2561 struct i40e_hw *hw = &vsi->back->hw;
2562 struct i40e_hmc_obj_rxq rx_ctx;
2563 i40e_status err = 0;
2564
2565 ring->state = 0;
2566
2567 /* clear the context structure first */
2568 memset(&rx_ctx, 0, sizeof(rx_ctx));
2569
2570 ring->rx_buf_len = vsi->rx_buf_len;
2571 ring->rx_hdr_len = vsi->rx_hdr_len;
2572
2573 rx_ctx.dbuff = ring->rx_buf_len >> I40E_RXQ_CTX_DBUFF_SHIFT;
2574 rx_ctx.hbuff = ring->rx_hdr_len >> I40E_RXQ_CTX_HBUFF_SHIFT;
2575
2576 rx_ctx.base = (ring->dma / 128);
2577 rx_ctx.qlen = ring->count;
2578
2579 if (vsi->back->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED) {
2580 set_ring_16byte_desc_enabled(ring);
2581 rx_ctx.dsize = 0;
2582 } else {
2583 rx_ctx.dsize = 1;
2584 }
2585
2586 rx_ctx.dtype = vsi->dtype;
2587 if (vsi->dtype) {
2588 set_ring_ps_enabled(ring);
2589 rx_ctx.hsplit_0 = I40E_RX_SPLIT_L2 |
2590 I40E_RX_SPLIT_IP |
2591 I40E_RX_SPLIT_TCP_UDP |
2592 I40E_RX_SPLIT_SCTP;
2593 } else {
2594 rx_ctx.hsplit_0 = 0;
2595 }
2596
2597 rx_ctx.rxmax = min_t(u16, vsi->max_frame,
2598 (chain_len * ring->rx_buf_len));
2599 if (hw->revision_id == 0)
2600 rx_ctx.lrxqthresh = 0;
2601 else
2602 rx_ctx.lrxqthresh = 2;
2603 rx_ctx.crcstrip = 1;
2604 rx_ctx.l2tsel = 1;
2605 rx_ctx.showiv = 1;
2606 #ifdef I40E_FCOE
2607 rx_ctx.fc_ena = (vsi->type == I40E_VSI_FCOE);
2608 #endif
2609 /* set the prefena field to 1 because the manual says to */
2610 rx_ctx.prefena = 1;
2611
2612 /* clear the context in the HMC */
2613 err = i40e_clear_lan_rx_queue_context(hw, pf_q);
2614 if (err) {
2615 dev_info(&vsi->back->pdev->dev,
2616 "Failed to clear LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2617 ring->queue_index, pf_q, err);
2618 return -ENOMEM;
2619 }
2620
2621 /* set the context in the HMC */
2622 err = i40e_set_lan_rx_queue_context(hw, pf_q, &rx_ctx);
2623 if (err) {
2624 dev_info(&vsi->back->pdev->dev,
2625 "Failed to set LAN Rx queue context on Rx ring %d (pf_q %d), error: %d\n",
2626 ring->queue_index, pf_q, err);
2627 return -ENOMEM;
2628 }
2629
2630 /* cache tail for quicker writes, and clear the reg before use */
2631 ring->tail = hw->hw_addr + I40E_QRX_TAIL(pf_q);
2632 writel(0, ring->tail);
2633
2634 if (ring_is_ps_enabled(ring)) {
2635 i40e_alloc_rx_headers(ring);
2636 i40e_alloc_rx_buffers_ps(ring, I40E_DESC_UNUSED(ring));
2637 } else {
2638 i40e_alloc_rx_buffers_1buf(ring, I40E_DESC_UNUSED(ring));
2639 }
2640
2641 return 0;
2642 }
2643
2644 /**
2645 * i40e_vsi_configure_tx - Configure the VSI for Tx
2646 * @vsi: VSI structure describing this set of rings and resources
2647 *
2648 * Configure the Tx VSI for operation.
2649 **/
2650 static int i40e_vsi_configure_tx(struct i40e_vsi *vsi)
2651 {
2652 int err = 0;
2653 u16 i;
2654
2655 for (i = 0; (i < vsi->num_queue_pairs) && !err; i++)
2656 err = i40e_configure_tx_ring(vsi->tx_rings[i]);
2657
2658 return err;
2659 }
2660
2661 /**
2662 * i40e_vsi_configure_rx - Configure the VSI for Rx
2663 * @vsi: the VSI being configured
2664 *
2665 * Configure the Rx VSI for operation.
2666 **/
2667 static int i40e_vsi_configure_rx(struct i40e_vsi *vsi)
2668 {
2669 int err = 0;
2670 u16 i;
2671
2672 if (vsi->netdev && (vsi->netdev->mtu > ETH_DATA_LEN))
2673 vsi->max_frame = vsi->netdev->mtu + ETH_HLEN
2674 + ETH_FCS_LEN + VLAN_HLEN;
2675 else
2676 vsi->max_frame = I40E_RXBUFFER_2048;
2677
2678 /* figure out correct receive buffer length */
2679 switch (vsi->back->flags & (I40E_FLAG_RX_1BUF_ENABLED |
2680 I40E_FLAG_RX_PS_ENABLED)) {
2681 case I40E_FLAG_RX_1BUF_ENABLED:
2682 vsi->rx_hdr_len = 0;
2683 vsi->rx_buf_len = vsi->max_frame;
2684 vsi->dtype = I40E_RX_DTYPE_NO_SPLIT;
2685 break;
2686 case I40E_FLAG_RX_PS_ENABLED:
2687 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2688 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2689 vsi->dtype = I40E_RX_DTYPE_HEADER_SPLIT;
2690 break;
2691 default:
2692 vsi->rx_hdr_len = I40E_RX_HDR_SIZE;
2693 vsi->rx_buf_len = I40E_RXBUFFER_2048;
2694 vsi->dtype = I40E_RX_DTYPE_SPLIT_ALWAYS;
2695 break;
2696 }
2697
2698 #ifdef I40E_FCOE
2699 /* setup rx buffer for FCoE */
2700 if ((vsi->type == I40E_VSI_FCOE) &&
2701 (vsi->back->flags & I40E_FLAG_FCOE_ENABLED)) {
2702 vsi->rx_hdr_len = 0;
2703 vsi->rx_buf_len = I40E_RXBUFFER_3072;
2704 vsi->max_frame = I40E_RXBUFFER_3072;
2705 vsi->dtype = I40E_RX_DTYPE_NO_SPLIT;
2706 }
2707
2708 #endif /* I40E_FCOE */
2709 /* round up for the chip's needs */
2710 vsi->rx_hdr_len = ALIGN(vsi->rx_hdr_len,
2711 (1 << I40E_RXQ_CTX_HBUFF_SHIFT));
2712 vsi->rx_buf_len = ALIGN(vsi->rx_buf_len,
2713 (1 << I40E_RXQ_CTX_DBUFF_SHIFT));
2714
2715 /* set up individual rings */
2716 for (i = 0; i < vsi->num_queue_pairs && !err; i++)
2717 err = i40e_configure_rx_ring(vsi->rx_rings[i]);
2718
2719 return err;
2720 }
2721
2722 /**
2723 * i40e_vsi_config_dcb_rings - Update rings to reflect DCB TC
2724 * @vsi: ptr to the VSI
2725 **/
2726 static void i40e_vsi_config_dcb_rings(struct i40e_vsi *vsi)
2727 {
2728 struct i40e_ring *tx_ring, *rx_ring;
2729 u16 qoffset, qcount;
2730 int i, n;
2731
2732 if (!(vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
2733 /* Reset the TC information */
2734 for (i = 0; i < vsi->num_queue_pairs; i++) {
2735 rx_ring = vsi->rx_rings[i];
2736 tx_ring = vsi->tx_rings[i];
2737 rx_ring->dcb_tc = 0;
2738 tx_ring->dcb_tc = 0;
2739 }
2740 }
2741
2742 for (n = 0; n < I40E_MAX_TRAFFIC_CLASS; n++) {
2743 if (!(vsi->tc_config.enabled_tc & (1 << n)))
2744 continue;
2745
2746 qoffset = vsi->tc_config.tc_info[n].qoffset;
2747 qcount = vsi->tc_config.tc_info[n].qcount;
2748 for (i = qoffset; i < (qoffset + qcount); i++) {
2749 rx_ring = vsi->rx_rings[i];
2750 tx_ring = vsi->tx_rings[i];
2751 rx_ring->dcb_tc = n;
2752 tx_ring->dcb_tc = n;
2753 }
2754 }
2755 }
2756
2757 /**
2758 * i40e_set_vsi_rx_mode - Call set_rx_mode on a VSI
2759 * @vsi: ptr to the VSI
2760 **/
2761 static void i40e_set_vsi_rx_mode(struct i40e_vsi *vsi)
2762 {
2763 if (vsi->netdev)
2764 i40e_set_rx_mode(vsi->netdev);
2765 }
2766
2767 /**
2768 * i40e_fdir_filter_restore - Restore the Sideband Flow Director filters
2769 * @vsi: Pointer to the targeted VSI
2770 *
2771 * This function replays the hlist on the hw where all the SB Flow Director
2772 * filters were saved.
2773 **/
2774 static void i40e_fdir_filter_restore(struct i40e_vsi *vsi)
2775 {
2776 struct i40e_fdir_filter *filter;
2777 struct i40e_pf *pf = vsi->back;
2778 struct hlist_node *node;
2779
2780 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
2781 return;
2782
2783 hlist_for_each_entry_safe(filter, node,
2784 &pf->fdir_filter_list, fdir_node) {
2785 i40e_add_del_fdir(vsi, filter, true);
2786 }
2787 }
2788
2789 /**
2790 * i40e_vsi_configure - Set up the VSI for action
2791 * @vsi: the VSI being configured
2792 **/
2793 static int i40e_vsi_configure(struct i40e_vsi *vsi)
2794 {
2795 int err;
2796
2797 i40e_set_vsi_rx_mode(vsi);
2798 i40e_restore_vlan(vsi);
2799 i40e_vsi_config_dcb_rings(vsi);
2800 err = i40e_vsi_configure_tx(vsi);
2801 if (!err)
2802 err = i40e_vsi_configure_rx(vsi);
2803
2804 return err;
2805 }
2806
2807 /**
2808 * i40e_vsi_configure_msix - MSIX mode Interrupt Config in the HW
2809 * @vsi: the VSI being configured
2810 **/
2811 static void i40e_vsi_configure_msix(struct i40e_vsi *vsi)
2812 {
2813 struct i40e_pf *pf = vsi->back;
2814 struct i40e_q_vector *q_vector;
2815 struct i40e_hw *hw = &pf->hw;
2816 u16 vector;
2817 int i, q;
2818 u32 val;
2819 u32 qp;
2820
2821 /* The interrupt indexing is offset by 1 in the PFINT_ITRn
2822 * and PFINT_LNKLSTn registers, e.g.:
2823 * PFINT_ITRn[0..n-1] gets msix-1..msix-n (qpair interrupts)
2824 */
2825 qp = vsi->base_queue;
2826 vector = vsi->base_vector;
2827 for (i = 0; i < vsi->num_q_vectors; i++, vector++) {
2828 q_vector = vsi->q_vectors[i];
2829 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
2830 q_vector->rx.latency_range = I40E_LOW_LATENCY;
2831 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1),
2832 q_vector->rx.itr);
2833 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
2834 q_vector->tx.latency_range = I40E_LOW_LATENCY;
2835 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1),
2836 q_vector->tx.itr);
2837
2838 /* Linked list for the queuepairs assigned to this vector */
2839 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), qp);
2840 for (q = 0; q < q_vector->num_ringpairs; q++) {
2841 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
2842 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
2843 (vector << I40E_QINT_RQCTL_MSIX_INDX_SHIFT) |
2844 (qp << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT)|
2845 (I40E_QUEUE_TYPE_TX
2846 << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT);
2847
2848 wr32(hw, I40E_QINT_RQCTL(qp), val);
2849
2850 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
2851 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
2852 (vector << I40E_QINT_TQCTL_MSIX_INDX_SHIFT) |
2853 ((qp+1) << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT)|
2854 (I40E_QUEUE_TYPE_RX
2855 << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
2856
2857 /* Terminate the linked list */
2858 if (q == (q_vector->num_ringpairs - 1))
2859 val |= (I40E_QUEUE_END_OF_LIST
2860 << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
2861
2862 wr32(hw, I40E_QINT_TQCTL(qp), val);
2863 qp++;
2864 }
2865 }
2866
2867 i40e_flush(hw);
2868 }
2869
2870 /**
2871 * i40e_enable_misc_int_causes - enable the non-queue interrupts
2872 * @hw: ptr to the hardware info
2873 **/
2874 static void i40e_enable_misc_int_causes(struct i40e_pf *pf)
2875 {
2876 struct i40e_hw *hw = &pf->hw;
2877 u32 val;
2878
2879 /* clear things first */
2880 wr32(hw, I40E_PFINT_ICR0_ENA, 0); /* disable all */
2881 rd32(hw, I40E_PFINT_ICR0); /* read to clear */
2882
2883 val = I40E_PFINT_ICR0_ENA_ECC_ERR_MASK |
2884 I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK |
2885 I40E_PFINT_ICR0_ENA_GRST_MASK |
2886 I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK |
2887 I40E_PFINT_ICR0_ENA_GPIO_MASK |
2888 I40E_PFINT_ICR0_ENA_HMC_ERR_MASK |
2889 I40E_PFINT_ICR0_ENA_VFLR_MASK |
2890 I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
2891
2892 if (pf->flags & I40E_FLAG_PTP)
2893 val |= I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
2894
2895 wr32(hw, I40E_PFINT_ICR0_ENA, val);
2896
2897 /* SW_ITR_IDX = 0, but don't change INTENA */
2898 wr32(hw, I40E_PFINT_DYN_CTL0, I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK |
2899 I40E_PFINT_DYN_CTL0_INTENA_MSK_MASK);
2900
2901 /* OTHER_ITR_IDX = 0 */
2902 wr32(hw, I40E_PFINT_STAT_CTL0, 0);
2903 }
2904
2905 /**
2906 * i40e_configure_msi_and_legacy - Legacy mode interrupt config in the HW
2907 * @vsi: the VSI being configured
2908 **/
2909 static void i40e_configure_msi_and_legacy(struct i40e_vsi *vsi)
2910 {
2911 struct i40e_q_vector *q_vector = vsi->q_vectors[0];
2912 struct i40e_pf *pf = vsi->back;
2913 struct i40e_hw *hw = &pf->hw;
2914 u32 val;
2915
2916 /* set the ITR configuration */
2917 q_vector->rx.itr = ITR_TO_REG(vsi->rx_itr_setting);
2918 q_vector->rx.latency_range = I40E_LOW_LATENCY;
2919 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), q_vector->rx.itr);
2920 q_vector->tx.itr = ITR_TO_REG(vsi->tx_itr_setting);
2921 q_vector->tx.latency_range = I40E_LOW_LATENCY;
2922 wr32(hw, I40E_PFINT_ITR0(I40E_TX_ITR), q_vector->tx.itr);
2923
2924 i40e_enable_misc_int_causes(pf);
2925
2926 /* FIRSTQ_INDX = 0, FIRSTQ_TYPE = 0 (rx) */
2927 wr32(hw, I40E_PFINT_LNKLST0, 0);
2928
2929 /* Associate the queue pair to the vector and enable the queue int */
2930 val = I40E_QINT_RQCTL_CAUSE_ENA_MASK |
2931 (I40E_RX_ITR << I40E_QINT_RQCTL_ITR_INDX_SHIFT) |
2932 (I40E_QUEUE_TYPE_TX << I40E_QINT_TQCTL_NEXTQ_TYPE_SHIFT);
2933
2934 wr32(hw, I40E_QINT_RQCTL(0), val);
2935
2936 val = I40E_QINT_TQCTL_CAUSE_ENA_MASK |
2937 (I40E_TX_ITR << I40E_QINT_TQCTL_ITR_INDX_SHIFT) |
2938 (I40E_QUEUE_END_OF_LIST << I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT);
2939
2940 wr32(hw, I40E_QINT_TQCTL(0), val);
2941 i40e_flush(hw);
2942 }
2943
2944 /**
2945 * i40e_irq_dynamic_disable_icr0 - Disable default interrupt generation for icr0
2946 * @pf: board private structure
2947 **/
2948 void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf)
2949 {
2950 struct i40e_hw *hw = &pf->hw;
2951
2952 wr32(hw, I40E_PFINT_DYN_CTL0,
2953 I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
2954 i40e_flush(hw);
2955 }
2956
2957 /**
2958 * i40e_irq_dynamic_enable_icr0 - Enable default interrupt generation for icr0
2959 * @pf: board private structure
2960 **/
2961 void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf)
2962 {
2963 struct i40e_hw *hw = &pf->hw;
2964 u32 val;
2965
2966 val = I40E_PFINT_DYN_CTL0_INTENA_MASK |
2967 I40E_PFINT_DYN_CTL0_CLEARPBA_MASK |
2968 (I40E_ITR_NONE << I40E_PFINT_DYN_CTL0_ITR_INDX_SHIFT);
2969
2970 wr32(hw, I40E_PFINT_DYN_CTL0, val);
2971 i40e_flush(hw);
2972 }
2973
2974 /**
2975 * i40e_irq_dynamic_enable - Enable default interrupt generation settings
2976 * @vsi: pointer to a vsi
2977 * @vector: enable a particular Hw Interrupt vector
2978 **/
2979 void i40e_irq_dynamic_enable(struct i40e_vsi *vsi, int vector)
2980 {
2981 struct i40e_pf *pf = vsi->back;
2982 struct i40e_hw *hw = &pf->hw;
2983 u32 val;
2984
2985 val = I40E_PFINT_DYN_CTLN_INTENA_MASK |
2986 I40E_PFINT_DYN_CTLN_CLEARPBA_MASK |
2987 (I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
2988 wr32(hw, I40E_PFINT_DYN_CTLN(vector - 1), val);
2989 /* skip the flush */
2990 }
2991
2992 /**
2993 * i40e_irq_dynamic_disable - Disable default interrupt generation settings
2994 * @vsi: pointer to a vsi
2995 * @vector: disable a particular Hw Interrupt vector
2996 **/
2997 void i40e_irq_dynamic_disable(struct i40e_vsi *vsi, int vector)
2998 {
2999 struct i40e_pf *pf = vsi->back;
3000 struct i40e_hw *hw = &pf->hw;
3001 u32 val;
3002
3003 val = I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT;
3004 wr32(hw, I40E_PFINT_DYN_CTLN(vector - 1), val);
3005 i40e_flush(hw);
3006 }
3007
3008 /**
3009 * i40e_msix_clean_rings - MSIX mode Interrupt Handler
3010 * @irq: interrupt number
3011 * @data: pointer to a q_vector
3012 **/
3013 static irqreturn_t i40e_msix_clean_rings(int irq, void *data)
3014 {
3015 struct i40e_q_vector *q_vector = data;
3016
3017 if (!q_vector->tx.ring && !q_vector->rx.ring)
3018 return IRQ_HANDLED;
3019
3020 napi_schedule(&q_vector->napi);
3021
3022 return IRQ_HANDLED;
3023 }
3024
3025 /**
3026 * i40e_vsi_request_irq_msix - Initialize MSI-X interrupts
3027 * @vsi: the VSI being configured
3028 * @basename: name for the vector
3029 *
3030 * Allocates MSI-X vectors and requests interrupts from the kernel.
3031 **/
3032 static int i40e_vsi_request_irq_msix(struct i40e_vsi *vsi, char *basename)
3033 {
3034 int q_vectors = vsi->num_q_vectors;
3035 struct i40e_pf *pf = vsi->back;
3036 int base = vsi->base_vector;
3037 int rx_int_idx = 0;
3038 int tx_int_idx = 0;
3039 int vector, err;
3040
3041 for (vector = 0; vector < q_vectors; vector++) {
3042 struct i40e_q_vector *q_vector = vsi->q_vectors[vector];
3043
3044 if (q_vector->tx.ring && q_vector->rx.ring) {
3045 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3046 "%s-%s-%d", basename, "TxRx", rx_int_idx++);
3047 tx_int_idx++;
3048 } else if (q_vector->rx.ring) {
3049 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3050 "%s-%s-%d", basename, "rx", rx_int_idx++);
3051 } else if (q_vector->tx.ring) {
3052 snprintf(q_vector->name, sizeof(q_vector->name) - 1,
3053 "%s-%s-%d", basename, "tx", tx_int_idx++);
3054 } else {
3055 /* skip this unused q_vector */
3056 continue;
3057 }
3058 err = request_irq(pf->msix_entries[base + vector].vector,
3059 vsi->irq_handler,
3060 0,
3061 q_vector->name,
3062 q_vector);
3063 if (err) {
3064 dev_info(&pf->pdev->dev,
3065 "%s: request_irq failed, error: %d\n",
3066 __func__, err);
3067 goto free_queue_irqs;
3068 }
3069 /* assign the mask for this irq */
3070 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
3071 &q_vector->affinity_mask);
3072 }
3073
3074 vsi->irqs_ready = true;
3075 return 0;
3076
3077 free_queue_irqs:
3078 while (vector) {
3079 vector--;
3080 irq_set_affinity_hint(pf->msix_entries[base + vector].vector,
3081 NULL);
3082 free_irq(pf->msix_entries[base + vector].vector,
3083 &(vsi->q_vectors[vector]));
3084 }
3085 return err;
3086 }
3087
3088 /**
3089 * i40e_vsi_disable_irq - Mask off queue interrupt generation on the VSI
3090 * @vsi: the VSI being un-configured
3091 **/
3092 static void i40e_vsi_disable_irq(struct i40e_vsi *vsi)
3093 {
3094 struct i40e_pf *pf = vsi->back;
3095 struct i40e_hw *hw = &pf->hw;
3096 int base = vsi->base_vector;
3097 int i;
3098
3099 for (i = 0; i < vsi->num_queue_pairs; i++) {
3100 wr32(hw, I40E_QINT_TQCTL(vsi->tx_rings[i]->reg_idx), 0);
3101 wr32(hw, I40E_QINT_RQCTL(vsi->rx_rings[i]->reg_idx), 0);
3102 }
3103
3104 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3105 for (i = vsi->base_vector;
3106 i < (vsi->num_q_vectors + vsi->base_vector); i++)
3107 wr32(hw, I40E_PFINT_DYN_CTLN(i - 1), 0);
3108
3109 i40e_flush(hw);
3110 for (i = 0; i < vsi->num_q_vectors; i++)
3111 synchronize_irq(pf->msix_entries[i + base].vector);
3112 } else {
3113 /* Legacy and MSI mode - this stops all interrupt handling */
3114 wr32(hw, I40E_PFINT_ICR0_ENA, 0);
3115 wr32(hw, I40E_PFINT_DYN_CTL0, 0);
3116 i40e_flush(hw);
3117 synchronize_irq(pf->pdev->irq);
3118 }
3119 }
3120
3121 /**
3122 * i40e_vsi_enable_irq - Enable IRQ for the given VSI
3123 * @vsi: the VSI being configured
3124 **/
3125 static int i40e_vsi_enable_irq(struct i40e_vsi *vsi)
3126 {
3127 struct i40e_pf *pf = vsi->back;
3128 int i;
3129
3130 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3131 for (i = vsi->base_vector;
3132 i < (vsi->num_q_vectors + vsi->base_vector); i++)
3133 i40e_irq_dynamic_enable(vsi, i);
3134 } else {
3135 i40e_irq_dynamic_enable_icr0(pf);
3136 }
3137
3138 i40e_flush(&pf->hw);
3139 return 0;
3140 }
3141
3142 /**
3143 * i40e_stop_misc_vector - Stop the vector that handles non-queue events
3144 * @pf: board private structure
3145 **/
3146 static void i40e_stop_misc_vector(struct i40e_pf *pf)
3147 {
3148 /* Disable ICR 0 */
3149 wr32(&pf->hw, I40E_PFINT_ICR0_ENA, 0);
3150 i40e_flush(&pf->hw);
3151 }
3152
3153 /**
3154 * i40e_intr - MSI/Legacy and non-queue interrupt handler
3155 * @irq: interrupt number
3156 * @data: pointer to a q_vector
3157 *
3158 * This is the handler used for all MSI/Legacy interrupts, and deals
3159 * with both queue and non-queue interrupts. This is also used in
3160 * MSIX mode to handle the non-queue interrupts.
3161 **/
3162 static irqreturn_t i40e_intr(int irq, void *data)
3163 {
3164 struct i40e_pf *pf = (struct i40e_pf *)data;
3165 struct i40e_hw *hw = &pf->hw;
3166 irqreturn_t ret = IRQ_NONE;
3167 u32 icr0, icr0_remaining;
3168 u32 val, ena_mask;
3169
3170 icr0 = rd32(hw, I40E_PFINT_ICR0);
3171 ena_mask = rd32(hw, I40E_PFINT_ICR0_ENA);
3172
3173 /* if sharing a legacy IRQ, we might get called w/o an intr pending */
3174 if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0)
3175 goto enable_intr;
3176
3177 /* if interrupt but no bits showing, must be SWINT */
3178 if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) ||
3179 (icr0 & I40E_PFINT_ICR0_SWINT_MASK))
3180 pf->sw_int_count++;
3181
3182 /* only q0 is used in MSI/Legacy mode, and none are used in MSIX */
3183 if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) {
3184
3185 /* temporarily disable queue cause for NAPI processing */
3186 u32 qval = rd32(hw, I40E_QINT_RQCTL(0));
3187 qval &= ~I40E_QINT_RQCTL_CAUSE_ENA_MASK;
3188 wr32(hw, I40E_QINT_RQCTL(0), qval);
3189
3190 qval = rd32(hw, I40E_QINT_TQCTL(0));
3191 qval &= ~I40E_QINT_TQCTL_CAUSE_ENA_MASK;
3192 wr32(hw, I40E_QINT_TQCTL(0), qval);
3193
3194 if (!test_bit(__I40E_DOWN, &pf->state))
3195 napi_schedule(&pf->vsi[pf->lan_vsi]->q_vectors[0]->napi);
3196 }
3197
3198 if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) {
3199 ena_mask &= ~I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
3200 set_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
3201 }
3202
3203 if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) {
3204 ena_mask &= ~I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
3205 set_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
3206 }
3207
3208 if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) {
3209 ena_mask &= ~I40E_PFINT_ICR0_ENA_VFLR_MASK;
3210 set_bit(__I40E_VFLR_EVENT_PENDING, &pf->state);
3211 }
3212
3213 if (icr0 & I40E_PFINT_ICR0_GRST_MASK) {
3214 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
3215 set_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
3216 ena_mask &= ~I40E_PFINT_ICR0_ENA_GRST_MASK;
3217 val = rd32(hw, I40E_GLGEN_RSTAT);
3218 val = (val & I40E_GLGEN_RSTAT_RESET_TYPE_MASK)
3219 >> I40E_GLGEN_RSTAT_RESET_TYPE_SHIFT;
3220 if (val == I40E_RESET_CORER) {
3221 pf->corer_count++;
3222 } else if (val == I40E_RESET_GLOBR) {
3223 pf->globr_count++;
3224 } else if (val == I40E_RESET_EMPR) {
3225 pf->empr_count++;
3226 set_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state);
3227 }
3228 }
3229
3230 if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) {
3231 icr0 &= ~I40E_PFINT_ICR0_HMC_ERR_MASK;
3232 dev_info(&pf->pdev->dev, "HMC error interrupt\n");
3233 dev_info(&pf->pdev->dev, "HMC error info 0x%x, HMC error data 0x%x\n",
3234 rd32(hw, I40E_PFHMC_ERRORINFO),
3235 rd32(hw, I40E_PFHMC_ERRORDATA));
3236 }
3237
3238 if (icr0 & I40E_PFINT_ICR0_TIMESYNC_MASK) {
3239 u32 prttsyn_stat = rd32(hw, I40E_PRTTSYN_STAT_0);
3240
3241 if (prttsyn_stat & I40E_PRTTSYN_STAT_0_TXTIME_MASK) {
3242 icr0 &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK;
3243 i40e_ptp_tx_hwtstamp(pf);
3244 }
3245 }
3246
3247 /* If a critical error is pending we have no choice but to reset the
3248 * device.
3249 * Report and mask out any remaining unexpected interrupts.
3250 */
3251 icr0_remaining = icr0 & ena_mask;
3252 if (icr0_remaining) {
3253 dev_info(&pf->pdev->dev, "unhandled interrupt icr0=0x%08x\n",
3254 icr0_remaining);
3255 if ((icr0_remaining & I40E_PFINT_ICR0_PE_CRITERR_MASK) ||
3256 (icr0_remaining & I40E_PFINT_ICR0_PCI_EXCEPTION_MASK) ||
3257 (icr0_remaining & I40E_PFINT_ICR0_ECC_ERR_MASK)) {
3258 dev_info(&pf->pdev->dev, "device will be reset\n");
3259 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
3260 i40e_service_event_schedule(pf);
3261 }
3262 ena_mask &= ~icr0_remaining;
3263 }
3264 ret = IRQ_HANDLED;
3265
3266 enable_intr:
3267 /* re-enable interrupt causes */
3268 wr32(hw, I40E_PFINT_ICR0_ENA, ena_mask);
3269 if (!test_bit(__I40E_DOWN, &pf->state)) {
3270 i40e_service_event_schedule(pf);
3271 i40e_irq_dynamic_enable_icr0(pf);
3272 }
3273
3274 return ret;
3275 }
3276
3277 /**
3278 * i40e_clean_fdir_tx_irq - Reclaim resources after transmit completes
3279 * @tx_ring: tx ring to clean
3280 * @budget: how many cleans we're allowed
3281 *
3282 * Returns true if there's any budget left (e.g. the clean is finished)
3283 **/
3284 static bool i40e_clean_fdir_tx_irq(struct i40e_ring *tx_ring, int budget)
3285 {
3286 struct i40e_vsi *vsi = tx_ring->vsi;
3287 u16 i = tx_ring->next_to_clean;
3288 struct i40e_tx_buffer *tx_buf;
3289 struct i40e_tx_desc *tx_desc;
3290
3291 tx_buf = &tx_ring->tx_bi[i];
3292 tx_desc = I40E_TX_DESC(tx_ring, i);
3293 i -= tx_ring->count;
3294
3295 do {
3296 struct i40e_tx_desc *eop_desc = tx_buf->next_to_watch;
3297
3298 /* if next_to_watch is not set then there is no work pending */
3299 if (!eop_desc)
3300 break;
3301
3302 /* prevent any other reads prior to eop_desc */
3303 read_barrier_depends();
3304
3305 /* if the descriptor isn't done, no work yet to do */
3306 if (!(eop_desc->cmd_type_offset_bsz &
3307 cpu_to_le64(I40E_TX_DESC_DTYPE_DESC_DONE)))
3308 break;
3309
3310 /* clear next_to_watch to prevent false hangs */
3311 tx_buf->next_to_watch = NULL;
3312
3313 tx_desc->buffer_addr = 0;
3314 tx_desc->cmd_type_offset_bsz = 0;
3315 /* move past filter desc */
3316 tx_buf++;
3317 tx_desc++;
3318 i++;
3319 if (unlikely(!i)) {
3320 i -= tx_ring->count;
3321 tx_buf = tx_ring->tx_bi;
3322 tx_desc = I40E_TX_DESC(tx_ring, 0);
3323 }
3324 /* unmap skb header data */
3325 dma_unmap_single(tx_ring->dev,
3326 dma_unmap_addr(tx_buf, dma),
3327 dma_unmap_len(tx_buf, len),
3328 DMA_TO_DEVICE);
3329 if (tx_buf->tx_flags & I40E_TX_FLAGS_FD_SB)
3330 kfree(tx_buf->raw_buf);
3331
3332 tx_buf->raw_buf = NULL;
3333 tx_buf->tx_flags = 0;
3334 tx_buf->next_to_watch = NULL;
3335 dma_unmap_len_set(tx_buf, len, 0);
3336 tx_desc->buffer_addr = 0;
3337 tx_desc->cmd_type_offset_bsz = 0;
3338
3339 /* move us past the eop_desc for start of next FD desc */
3340 tx_buf++;
3341 tx_desc++;
3342 i++;
3343 if (unlikely(!i)) {
3344 i -= tx_ring->count;
3345 tx_buf = tx_ring->tx_bi;
3346 tx_desc = I40E_TX_DESC(tx_ring, 0);
3347 }
3348
3349 /* update budget accounting */
3350 budget--;
3351 } while (likely(budget));
3352
3353 i += tx_ring->count;
3354 tx_ring->next_to_clean = i;
3355
3356 if (vsi->back->flags & I40E_FLAG_MSIX_ENABLED) {
3357 i40e_irq_dynamic_enable(vsi,
3358 tx_ring->q_vector->v_idx + vsi->base_vector);
3359 }
3360 return budget > 0;
3361 }
3362
3363 /**
3364 * i40e_fdir_clean_ring - Interrupt Handler for FDIR SB ring
3365 * @irq: interrupt number
3366 * @data: pointer to a q_vector
3367 **/
3368 static irqreturn_t i40e_fdir_clean_ring(int irq, void *data)
3369 {
3370 struct i40e_q_vector *q_vector = data;
3371 struct i40e_vsi *vsi;
3372
3373 if (!q_vector->tx.ring)
3374 return IRQ_HANDLED;
3375
3376 vsi = q_vector->tx.ring->vsi;
3377 i40e_clean_fdir_tx_irq(q_vector->tx.ring, vsi->work_limit);
3378
3379 return IRQ_HANDLED;
3380 }
3381
3382 /**
3383 * i40e_map_vector_to_qp - Assigns the queue pair to the vector
3384 * @vsi: the VSI being configured
3385 * @v_idx: vector index
3386 * @qp_idx: queue pair index
3387 **/
3388 static void map_vector_to_qp(struct i40e_vsi *vsi, int v_idx, int qp_idx)
3389 {
3390 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
3391 struct i40e_ring *tx_ring = vsi->tx_rings[qp_idx];
3392 struct i40e_ring *rx_ring = vsi->rx_rings[qp_idx];
3393
3394 tx_ring->q_vector = q_vector;
3395 tx_ring->next = q_vector->tx.ring;
3396 q_vector->tx.ring = tx_ring;
3397 q_vector->tx.count++;
3398
3399 rx_ring->q_vector = q_vector;
3400 rx_ring->next = q_vector->rx.ring;
3401 q_vector->rx.ring = rx_ring;
3402 q_vector->rx.count++;
3403 }
3404
3405 /**
3406 * i40e_vsi_map_rings_to_vectors - Maps descriptor rings to vectors
3407 * @vsi: the VSI being configured
3408 *
3409 * This function maps descriptor rings to the queue-specific vectors
3410 * we were allotted through the MSI-X enabling code. Ideally, we'd have
3411 * one vector per queue pair, but on a constrained vector budget, we
3412 * group the queue pairs as "efficiently" as possible.
3413 **/
3414 static void i40e_vsi_map_rings_to_vectors(struct i40e_vsi *vsi)
3415 {
3416 int qp_remaining = vsi->num_queue_pairs;
3417 int q_vectors = vsi->num_q_vectors;
3418 int num_ringpairs;
3419 int v_start = 0;
3420 int qp_idx = 0;
3421
3422 /* If we don't have enough vectors for a 1-to-1 mapping, we'll have to
3423 * group them so there are multiple queues per vector.
3424 * It is also important to go through all the vectors available to be
3425 * sure that if we don't use all the vectors, that the remaining vectors
3426 * are cleared. This is especially important when decreasing the
3427 * number of queues in use.
3428 */
3429 for (; v_start < q_vectors; v_start++) {
3430 struct i40e_q_vector *q_vector = vsi->q_vectors[v_start];
3431
3432 num_ringpairs = DIV_ROUND_UP(qp_remaining, q_vectors - v_start);
3433
3434 q_vector->num_ringpairs = num_ringpairs;
3435
3436 q_vector->rx.count = 0;
3437 q_vector->tx.count = 0;
3438 q_vector->rx.ring = NULL;
3439 q_vector->tx.ring = NULL;
3440
3441 while (num_ringpairs--) {
3442 map_vector_to_qp(vsi, v_start, qp_idx);
3443 qp_idx++;
3444 qp_remaining--;
3445 }
3446 }
3447 }
3448
3449 /**
3450 * i40e_vsi_request_irq - Request IRQ from the OS
3451 * @vsi: the VSI being configured
3452 * @basename: name for the vector
3453 **/
3454 static int i40e_vsi_request_irq(struct i40e_vsi *vsi, char *basename)
3455 {
3456 struct i40e_pf *pf = vsi->back;
3457 int err;
3458
3459 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
3460 err = i40e_vsi_request_irq_msix(vsi, basename);
3461 else if (pf->flags & I40E_FLAG_MSI_ENABLED)
3462 err = request_irq(pf->pdev->irq, i40e_intr, 0,
3463 pf->int_name, pf);
3464 else
3465 err = request_irq(pf->pdev->irq, i40e_intr, IRQF_SHARED,
3466 pf->int_name, pf);
3467
3468 if (err)
3469 dev_info(&pf->pdev->dev, "request_irq failed, Error %d\n", err);
3470
3471 return err;
3472 }
3473
3474 #ifdef CONFIG_NET_POLL_CONTROLLER
3475 /**
3476 * i40e_netpoll - A Polling 'interrupt'handler
3477 * @netdev: network interface device structure
3478 *
3479 * This is used by netconsole to send skbs without having to re-enable
3480 * interrupts. It's not called while the normal interrupt routine is executing.
3481 **/
3482 #ifdef I40E_FCOE
3483 void i40e_netpoll(struct net_device *netdev)
3484 #else
3485 static void i40e_netpoll(struct net_device *netdev)
3486 #endif
3487 {
3488 struct i40e_netdev_priv *np = netdev_priv(netdev);
3489 struct i40e_vsi *vsi = np->vsi;
3490 struct i40e_pf *pf = vsi->back;
3491 int i;
3492
3493 /* if interface is down do nothing */
3494 if (test_bit(__I40E_DOWN, &vsi->state))
3495 return;
3496
3497 pf->flags |= I40E_FLAG_IN_NETPOLL;
3498 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3499 for (i = 0; i < vsi->num_q_vectors; i++)
3500 i40e_msix_clean_rings(0, vsi->q_vectors[i]);
3501 } else {
3502 i40e_intr(pf->pdev->irq, netdev);
3503 }
3504 pf->flags &= ~I40E_FLAG_IN_NETPOLL;
3505 }
3506 #endif
3507
3508 /**
3509 * i40e_pf_txq_wait - Wait for a PF's Tx queue to be enabled or disabled
3510 * @pf: the PF being configured
3511 * @pf_q: the PF queue
3512 * @enable: enable or disable state of the queue
3513 *
3514 * This routine will wait for the given Tx queue of the PF to reach the
3515 * enabled or disabled state.
3516 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3517 * multiple retries; else will return 0 in case of success.
3518 **/
3519 static int i40e_pf_txq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3520 {
3521 int i;
3522 u32 tx_reg;
3523
3524 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3525 tx_reg = rd32(&pf->hw, I40E_QTX_ENA(pf_q));
3526 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3527 break;
3528
3529 usleep_range(10, 20);
3530 }
3531 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3532 return -ETIMEDOUT;
3533
3534 return 0;
3535 }
3536
3537 /**
3538 * i40e_vsi_control_tx - Start or stop a VSI's rings
3539 * @vsi: the VSI being configured
3540 * @enable: start or stop the rings
3541 **/
3542 static int i40e_vsi_control_tx(struct i40e_vsi *vsi, bool enable)
3543 {
3544 struct i40e_pf *pf = vsi->back;
3545 struct i40e_hw *hw = &pf->hw;
3546 int i, j, pf_q, ret = 0;
3547 u32 tx_reg;
3548
3549 pf_q = vsi->base_queue;
3550 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3551
3552 /* warn the TX unit of coming changes */
3553 i40e_pre_tx_queue_cfg(&pf->hw, pf_q, enable);
3554 if (!enable)
3555 usleep_range(10, 20);
3556
3557 for (j = 0; j < 50; j++) {
3558 tx_reg = rd32(hw, I40E_QTX_ENA(pf_q));
3559 if (((tx_reg >> I40E_QTX_ENA_QENA_REQ_SHIFT) & 1) ==
3560 ((tx_reg >> I40E_QTX_ENA_QENA_STAT_SHIFT) & 1))
3561 break;
3562 usleep_range(1000, 2000);
3563 }
3564 /* Skip if the queue is already in the requested state */
3565 if (enable == !!(tx_reg & I40E_QTX_ENA_QENA_STAT_MASK))
3566 continue;
3567
3568 /* turn on/off the queue */
3569 if (enable) {
3570 wr32(hw, I40E_QTX_HEAD(pf_q), 0);
3571 tx_reg |= I40E_QTX_ENA_QENA_REQ_MASK;
3572 } else {
3573 tx_reg &= ~I40E_QTX_ENA_QENA_REQ_MASK;
3574 }
3575
3576 wr32(hw, I40E_QTX_ENA(pf_q), tx_reg);
3577 /* No waiting for the Tx queue to disable */
3578 if (!enable && test_bit(__I40E_PORT_TX_SUSPENDED, &pf->state))
3579 continue;
3580
3581 /* wait for the change to finish */
3582 ret = i40e_pf_txq_wait(pf, pf_q, enable);
3583 if (ret) {
3584 dev_info(&pf->pdev->dev,
3585 "%s: VSI seid %d Tx ring %d %sable timeout\n",
3586 __func__, vsi->seid, pf_q,
3587 (enable ? "en" : "dis"));
3588 break;
3589 }
3590 }
3591
3592 if (hw->revision_id == 0)
3593 mdelay(50);
3594 return ret;
3595 }
3596
3597 /**
3598 * i40e_pf_rxq_wait - Wait for a PF's Rx queue to be enabled or disabled
3599 * @pf: the PF being configured
3600 * @pf_q: the PF queue
3601 * @enable: enable or disable state of the queue
3602 *
3603 * This routine will wait for the given Rx queue of the PF to reach the
3604 * enabled or disabled state.
3605 * Returns -ETIMEDOUT in case of failing to reach the requested state after
3606 * multiple retries; else will return 0 in case of success.
3607 **/
3608 static int i40e_pf_rxq_wait(struct i40e_pf *pf, int pf_q, bool enable)
3609 {
3610 int i;
3611 u32 rx_reg;
3612
3613 for (i = 0; i < I40E_QUEUE_WAIT_RETRY_LIMIT; i++) {
3614 rx_reg = rd32(&pf->hw, I40E_QRX_ENA(pf_q));
3615 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3616 break;
3617
3618 usleep_range(10, 20);
3619 }
3620 if (i >= I40E_QUEUE_WAIT_RETRY_LIMIT)
3621 return -ETIMEDOUT;
3622
3623 return 0;
3624 }
3625
3626 /**
3627 * i40e_vsi_control_rx - Start or stop a VSI's rings
3628 * @vsi: the VSI being configured
3629 * @enable: start or stop the rings
3630 **/
3631 static int i40e_vsi_control_rx(struct i40e_vsi *vsi, bool enable)
3632 {
3633 struct i40e_pf *pf = vsi->back;
3634 struct i40e_hw *hw = &pf->hw;
3635 int i, j, pf_q, ret = 0;
3636 u32 rx_reg;
3637
3638 pf_q = vsi->base_queue;
3639 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
3640 for (j = 0; j < 50; j++) {
3641 rx_reg = rd32(hw, I40E_QRX_ENA(pf_q));
3642 if (((rx_reg >> I40E_QRX_ENA_QENA_REQ_SHIFT) & 1) ==
3643 ((rx_reg >> I40E_QRX_ENA_QENA_STAT_SHIFT) & 1))
3644 break;
3645 usleep_range(1000, 2000);
3646 }
3647
3648 /* Skip if the queue is already in the requested state */
3649 if (enable == !!(rx_reg & I40E_QRX_ENA_QENA_STAT_MASK))
3650 continue;
3651
3652 /* turn on/off the queue */
3653 if (enable)
3654 rx_reg |= I40E_QRX_ENA_QENA_REQ_MASK;
3655 else
3656 rx_reg &= ~I40E_QRX_ENA_QENA_REQ_MASK;
3657 wr32(hw, I40E_QRX_ENA(pf_q), rx_reg);
3658
3659 /* wait for the change to finish */
3660 ret = i40e_pf_rxq_wait(pf, pf_q, enable);
3661 if (ret) {
3662 dev_info(&pf->pdev->dev,
3663 "%s: VSI seid %d Rx ring %d %sable timeout\n",
3664 __func__, vsi->seid, pf_q,
3665 (enable ? "en" : "dis"));
3666 break;
3667 }
3668 }
3669
3670 return ret;
3671 }
3672
3673 /**
3674 * i40e_vsi_control_rings - Start or stop a VSI's rings
3675 * @vsi: the VSI being configured
3676 * @enable: start or stop the rings
3677 **/
3678 int i40e_vsi_control_rings(struct i40e_vsi *vsi, bool request)
3679 {
3680 int ret = 0;
3681
3682 /* do rx first for enable and last for disable */
3683 if (request) {
3684 ret = i40e_vsi_control_rx(vsi, request);
3685 if (ret)
3686 return ret;
3687 ret = i40e_vsi_control_tx(vsi, request);
3688 } else {
3689 /* Ignore return value, we need to shutdown whatever we can */
3690 i40e_vsi_control_tx(vsi, request);
3691 i40e_vsi_control_rx(vsi, request);
3692 }
3693
3694 return ret;
3695 }
3696
3697 /**
3698 * i40e_vsi_free_irq - Free the irq association with the OS
3699 * @vsi: the VSI being configured
3700 **/
3701 static void i40e_vsi_free_irq(struct i40e_vsi *vsi)
3702 {
3703 struct i40e_pf *pf = vsi->back;
3704 struct i40e_hw *hw = &pf->hw;
3705 int base = vsi->base_vector;
3706 u32 val, qp;
3707 int i;
3708
3709 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3710 if (!vsi->q_vectors)
3711 return;
3712
3713 if (!vsi->irqs_ready)
3714 return;
3715
3716 vsi->irqs_ready = false;
3717 for (i = 0; i < vsi->num_q_vectors; i++) {
3718 u16 vector = i + base;
3719
3720 /* free only the irqs that were actually requested */
3721 if (!vsi->q_vectors[i] ||
3722 !vsi->q_vectors[i]->num_ringpairs)
3723 continue;
3724
3725 /* clear the affinity_mask in the IRQ descriptor */
3726 irq_set_affinity_hint(pf->msix_entries[vector].vector,
3727 NULL);
3728 free_irq(pf->msix_entries[vector].vector,
3729 vsi->q_vectors[i]);
3730
3731 /* Tear down the interrupt queue link list
3732 *
3733 * We know that they come in pairs and always
3734 * the Rx first, then the Tx. To clear the
3735 * link list, stick the EOL value into the
3736 * next_q field of the registers.
3737 */
3738 val = rd32(hw, I40E_PFINT_LNKLSTN(vector - 1));
3739 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
3740 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3741 val |= I40E_QUEUE_END_OF_LIST
3742 << I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3743 wr32(hw, I40E_PFINT_LNKLSTN(vector - 1), val);
3744
3745 while (qp != I40E_QUEUE_END_OF_LIST) {
3746 u32 next;
3747
3748 val = rd32(hw, I40E_QINT_RQCTL(qp));
3749
3750 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
3751 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
3752 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3753 I40E_QINT_RQCTL_INTEVENT_MASK);
3754
3755 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
3756 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
3757
3758 wr32(hw, I40E_QINT_RQCTL(qp), val);
3759
3760 val = rd32(hw, I40E_QINT_TQCTL(qp));
3761
3762 next = (val & I40E_QINT_TQCTL_NEXTQ_INDX_MASK)
3763 >> I40E_QINT_TQCTL_NEXTQ_INDX_SHIFT;
3764
3765 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
3766 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
3767 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3768 I40E_QINT_TQCTL_INTEVENT_MASK);
3769
3770 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
3771 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
3772
3773 wr32(hw, I40E_QINT_TQCTL(qp), val);
3774 qp = next;
3775 }
3776 }
3777 } else {
3778 free_irq(pf->pdev->irq, pf);
3779
3780 val = rd32(hw, I40E_PFINT_LNKLST0);
3781 qp = (val & I40E_PFINT_LNKLSTN_FIRSTQ_INDX_MASK)
3782 >> I40E_PFINT_LNKLSTN_FIRSTQ_INDX_SHIFT;
3783 val |= I40E_QUEUE_END_OF_LIST
3784 << I40E_PFINT_LNKLST0_FIRSTQ_INDX_SHIFT;
3785 wr32(hw, I40E_PFINT_LNKLST0, val);
3786
3787 val = rd32(hw, I40E_QINT_RQCTL(qp));
3788 val &= ~(I40E_QINT_RQCTL_MSIX_INDX_MASK |
3789 I40E_QINT_RQCTL_MSIX0_INDX_MASK |
3790 I40E_QINT_RQCTL_CAUSE_ENA_MASK |
3791 I40E_QINT_RQCTL_INTEVENT_MASK);
3792
3793 val |= (I40E_QINT_RQCTL_ITR_INDX_MASK |
3794 I40E_QINT_RQCTL_NEXTQ_INDX_MASK);
3795
3796 wr32(hw, I40E_QINT_RQCTL(qp), val);
3797
3798 val = rd32(hw, I40E_QINT_TQCTL(qp));
3799
3800 val &= ~(I40E_QINT_TQCTL_MSIX_INDX_MASK |
3801 I40E_QINT_TQCTL_MSIX0_INDX_MASK |
3802 I40E_QINT_TQCTL_CAUSE_ENA_MASK |
3803 I40E_QINT_TQCTL_INTEVENT_MASK);
3804
3805 val |= (I40E_QINT_TQCTL_ITR_INDX_MASK |
3806 I40E_QINT_TQCTL_NEXTQ_INDX_MASK);
3807
3808 wr32(hw, I40E_QINT_TQCTL(qp), val);
3809 }
3810 }
3811
3812 /**
3813 * i40e_free_q_vector - Free memory allocated for specific interrupt vector
3814 * @vsi: the VSI being configured
3815 * @v_idx: Index of vector to be freed
3816 *
3817 * This function frees the memory allocated to the q_vector. In addition if
3818 * NAPI is enabled it will delete any references to the NAPI struct prior
3819 * to freeing the q_vector.
3820 **/
3821 static void i40e_free_q_vector(struct i40e_vsi *vsi, int v_idx)
3822 {
3823 struct i40e_q_vector *q_vector = vsi->q_vectors[v_idx];
3824 struct i40e_ring *ring;
3825
3826 if (!q_vector)
3827 return;
3828
3829 /* disassociate q_vector from rings */
3830 i40e_for_each_ring(ring, q_vector->tx)
3831 ring->q_vector = NULL;
3832
3833 i40e_for_each_ring(ring, q_vector->rx)
3834 ring->q_vector = NULL;
3835
3836 /* only VSI w/ an associated netdev is set up w/ NAPI */
3837 if (vsi->netdev)
3838 netif_napi_del(&q_vector->napi);
3839
3840 vsi->q_vectors[v_idx] = NULL;
3841
3842 kfree_rcu(q_vector, rcu);
3843 }
3844
3845 /**
3846 * i40e_vsi_free_q_vectors - Free memory allocated for interrupt vectors
3847 * @vsi: the VSI being un-configured
3848 *
3849 * This frees the memory allocated to the q_vectors and
3850 * deletes references to the NAPI struct.
3851 **/
3852 static void i40e_vsi_free_q_vectors(struct i40e_vsi *vsi)
3853 {
3854 int v_idx;
3855
3856 for (v_idx = 0; v_idx < vsi->num_q_vectors; v_idx++)
3857 i40e_free_q_vector(vsi, v_idx);
3858 }
3859
3860 /**
3861 * i40e_reset_interrupt_capability - Disable interrupt setup in OS
3862 * @pf: board private structure
3863 **/
3864 static void i40e_reset_interrupt_capability(struct i40e_pf *pf)
3865 {
3866 /* If we're in Legacy mode, the interrupt was cleaned in vsi_close */
3867 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3868 pci_disable_msix(pf->pdev);
3869 kfree(pf->msix_entries);
3870 pf->msix_entries = NULL;
3871 kfree(pf->irq_pile);
3872 pf->irq_pile = NULL;
3873 } else if (pf->flags & I40E_FLAG_MSI_ENABLED) {
3874 pci_disable_msi(pf->pdev);
3875 }
3876 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED);
3877 }
3878
3879 /**
3880 * i40e_clear_interrupt_scheme - Clear the current interrupt scheme settings
3881 * @pf: board private structure
3882 *
3883 * We go through and clear interrupt specific resources and reset the structure
3884 * to pre-load conditions
3885 **/
3886 static void i40e_clear_interrupt_scheme(struct i40e_pf *pf)
3887 {
3888 int i;
3889
3890 i40e_stop_misc_vector(pf);
3891 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3892 synchronize_irq(pf->msix_entries[0].vector);
3893 free_irq(pf->msix_entries[0].vector, pf);
3894 }
3895
3896 i40e_put_lump(pf->irq_pile, 0, I40E_PILE_VALID_BIT-1);
3897 for (i = 0; i < pf->num_alloc_vsi; i++)
3898 if (pf->vsi[i])
3899 i40e_vsi_free_q_vectors(pf->vsi[i]);
3900 i40e_reset_interrupt_capability(pf);
3901 }
3902
3903 /**
3904 * i40e_napi_enable_all - Enable NAPI for all q_vectors in the VSI
3905 * @vsi: the VSI being configured
3906 **/
3907 static void i40e_napi_enable_all(struct i40e_vsi *vsi)
3908 {
3909 int q_idx;
3910
3911 if (!vsi->netdev)
3912 return;
3913
3914 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
3915 napi_enable(&vsi->q_vectors[q_idx]->napi);
3916 }
3917
3918 /**
3919 * i40e_napi_disable_all - Disable NAPI for all q_vectors in the VSI
3920 * @vsi: the VSI being configured
3921 **/
3922 static void i40e_napi_disable_all(struct i40e_vsi *vsi)
3923 {
3924 int q_idx;
3925
3926 if (!vsi->netdev)
3927 return;
3928
3929 for (q_idx = 0; q_idx < vsi->num_q_vectors; q_idx++)
3930 napi_disable(&vsi->q_vectors[q_idx]->napi);
3931 }
3932
3933 /**
3934 * i40e_vsi_close - Shut down a VSI
3935 * @vsi: the vsi to be quelled
3936 **/
3937 static void i40e_vsi_close(struct i40e_vsi *vsi)
3938 {
3939 if (!test_and_set_bit(__I40E_DOWN, &vsi->state))
3940 i40e_down(vsi);
3941 i40e_vsi_free_irq(vsi);
3942 i40e_vsi_free_tx_resources(vsi);
3943 i40e_vsi_free_rx_resources(vsi);
3944 }
3945
3946 /**
3947 * i40e_quiesce_vsi - Pause a given VSI
3948 * @vsi: the VSI being paused
3949 **/
3950 static void i40e_quiesce_vsi(struct i40e_vsi *vsi)
3951 {
3952 if (test_bit(__I40E_DOWN, &vsi->state))
3953 return;
3954
3955 /* No need to disable FCoE VSI when Tx suspended */
3956 if ((test_bit(__I40E_PORT_TX_SUSPENDED, &vsi->back->state)) &&
3957 vsi->type == I40E_VSI_FCOE) {
3958 dev_dbg(&vsi->back->pdev->dev,
3959 "%s: VSI seid %d skipping FCoE VSI disable\n",
3960 __func__, vsi->seid);
3961 return;
3962 }
3963
3964 set_bit(__I40E_NEEDS_RESTART, &vsi->state);
3965 if (vsi->netdev && netif_running(vsi->netdev)) {
3966 vsi->netdev->netdev_ops->ndo_stop(vsi->netdev);
3967 } else {
3968 i40e_vsi_close(vsi);
3969 }
3970 }
3971
3972 /**
3973 * i40e_unquiesce_vsi - Resume a given VSI
3974 * @vsi: the VSI being resumed
3975 **/
3976 static void i40e_unquiesce_vsi(struct i40e_vsi *vsi)
3977 {
3978 if (!test_bit(__I40E_NEEDS_RESTART, &vsi->state))
3979 return;
3980
3981 clear_bit(__I40E_NEEDS_RESTART, &vsi->state);
3982 if (vsi->netdev && netif_running(vsi->netdev))
3983 vsi->netdev->netdev_ops->ndo_open(vsi->netdev);
3984 else
3985 i40e_vsi_open(vsi); /* this clears the DOWN bit */
3986 }
3987
3988 /**
3989 * i40e_pf_quiesce_all_vsi - Pause all VSIs on a PF
3990 * @pf: the PF
3991 **/
3992 static void i40e_pf_quiesce_all_vsi(struct i40e_pf *pf)
3993 {
3994 int v;
3995
3996 for (v = 0; v < pf->num_alloc_vsi; v++) {
3997 if (pf->vsi[v])
3998 i40e_quiesce_vsi(pf->vsi[v]);
3999 }
4000 }
4001
4002 /**
4003 * i40e_pf_unquiesce_all_vsi - Resume all VSIs on a PF
4004 * @pf: the PF
4005 **/
4006 static void i40e_pf_unquiesce_all_vsi(struct i40e_pf *pf)
4007 {
4008 int v;
4009
4010 for (v = 0; v < pf->num_alloc_vsi; v++) {
4011 if (pf->vsi[v])
4012 i40e_unquiesce_vsi(pf->vsi[v]);
4013 }
4014 }
4015
4016 #ifdef CONFIG_I40E_DCB
4017 /**
4018 * i40e_vsi_wait_txq_disabled - Wait for VSI's queues to be disabled
4019 * @vsi: the VSI being configured
4020 *
4021 * This function waits for the given VSI's Tx queues to be disabled.
4022 **/
4023 static int i40e_vsi_wait_txq_disabled(struct i40e_vsi *vsi)
4024 {
4025 struct i40e_pf *pf = vsi->back;
4026 int i, pf_q, ret;
4027
4028 pf_q = vsi->base_queue;
4029 for (i = 0; i < vsi->num_queue_pairs; i++, pf_q++) {
4030 /* Check and wait for the disable status of the queue */
4031 ret = i40e_pf_txq_wait(pf, pf_q, false);
4032 if (ret) {
4033 dev_info(&pf->pdev->dev,
4034 "%s: VSI seid %d Tx ring %d disable timeout\n",
4035 __func__, vsi->seid, pf_q);
4036 return ret;
4037 }
4038 }
4039
4040 return 0;
4041 }
4042
4043 /**
4044 * i40e_pf_wait_txq_disabled - Wait for all queues of PF VSIs to be disabled
4045 * @pf: the PF
4046 *
4047 * This function waits for the Tx queues to be in disabled state for all the
4048 * VSIs that are managed by this PF.
4049 **/
4050 static int i40e_pf_wait_txq_disabled(struct i40e_pf *pf)
4051 {
4052 int v, ret = 0;
4053
4054 for (v = 0; v < pf->hw.func_caps.num_vsis; v++) {
4055 /* No need to wait for FCoE VSI queues */
4056 if (pf->vsi[v] && pf->vsi[v]->type != I40E_VSI_FCOE) {
4057 ret = i40e_vsi_wait_txq_disabled(pf->vsi[v]);
4058 if (ret)
4059 break;
4060 }
4061 }
4062
4063 return ret;
4064 }
4065
4066 #endif
4067 /**
4068 * i40e_get_iscsi_tc_map - Return TC map for iSCSI APP
4069 * @pf: pointer to PF
4070 *
4071 * Get TC map for ISCSI PF type that will include iSCSI TC
4072 * and LAN TC.
4073 **/
4074 static u8 i40e_get_iscsi_tc_map(struct i40e_pf *pf)
4075 {
4076 struct i40e_dcb_app_priority_table app;
4077 struct i40e_hw *hw = &pf->hw;
4078 u8 enabled_tc = 1; /* TC0 is always enabled */
4079 u8 tc, i;
4080 /* Get the iSCSI APP TLV */
4081 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4082
4083 for (i = 0; i < dcbcfg->numapps; i++) {
4084 app = dcbcfg->app[i];
4085 if (app.selector == I40E_APP_SEL_TCPIP &&
4086 app.protocolid == I40E_APP_PROTOID_ISCSI) {
4087 tc = dcbcfg->etscfg.prioritytable[app.priority];
4088 enabled_tc |= (1 << tc);
4089 break;
4090 }
4091 }
4092
4093 return enabled_tc;
4094 }
4095
4096 /**
4097 * i40e_dcb_get_num_tc - Get the number of TCs from DCBx config
4098 * @dcbcfg: the corresponding DCBx configuration structure
4099 *
4100 * Return the number of TCs from given DCBx configuration
4101 **/
4102 static u8 i40e_dcb_get_num_tc(struct i40e_dcbx_config *dcbcfg)
4103 {
4104 u8 num_tc = 0;
4105 int i;
4106
4107 /* Scan the ETS Config Priority Table to find
4108 * traffic class enabled for a given priority
4109 * and use the traffic class index to get the
4110 * number of traffic classes enabled
4111 */
4112 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
4113 if (dcbcfg->etscfg.prioritytable[i] > num_tc)
4114 num_tc = dcbcfg->etscfg.prioritytable[i];
4115 }
4116
4117 /* Traffic class index starts from zero so
4118 * increment to return the actual count
4119 */
4120 return num_tc + 1;
4121 }
4122
4123 /**
4124 * i40e_dcb_get_enabled_tc - Get enabled traffic classes
4125 * @dcbcfg: the corresponding DCBx configuration structure
4126 *
4127 * Query the current DCB configuration and return the number of
4128 * traffic classes enabled from the given DCBX config
4129 **/
4130 static u8 i40e_dcb_get_enabled_tc(struct i40e_dcbx_config *dcbcfg)
4131 {
4132 u8 num_tc = i40e_dcb_get_num_tc(dcbcfg);
4133 u8 enabled_tc = 1;
4134 u8 i;
4135
4136 for (i = 0; i < num_tc; i++)
4137 enabled_tc |= 1 << i;
4138
4139 return enabled_tc;
4140 }
4141
4142 /**
4143 * i40e_pf_get_num_tc - Get enabled traffic classes for PF
4144 * @pf: PF being queried
4145 *
4146 * Return number of traffic classes enabled for the given PF
4147 **/
4148 static u8 i40e_pf_get_num_tc(struct i40e_pf *pf)
4149 {
4150 struct i40e_hw *hw = &pf->hw;
4151 u8 i, enabled_tc;
4152 u8 num_tc = 0;
4153 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4154
4155 /* If DCB is not enabled then always in single TC */
4156 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4157 return 1;
4158
4159 /* SFP mode will be enabled for all TCs on port */
4160 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
4161 return i40e_dcb_get_num_tc(dcbcfg);
4162
4163 /* MFP mode return count of enabled TCs for this PF */
4164 if (pf->hw.func_caps.iscsi)
4165 enabled_tc = i40e_get_iscsi_tc_map(pf);
4166 else
4167 return 1; /* Only TC0 */
4168
4169 /* At least have TC0 */
4170 enabled_tc = (enabled_tc ? enabled_tc : 0x1);
4171 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4172 if (enabled_tc & (1 << i))
4173 num_tc++;
4174 }
4175 return num_tc;
4176 }
4177
4178 /**
4179 * i40e_pf_get_default_tc - Get bitmap for first enabled TC
4180 * @pf: PF being queried
4181 *
4182 * Return a bitmap for first enabled traffic class for this PF.
4183 **/
4184 static u8 i40e_pf_get_default_tc(struct i40e_pf *pf)
4185 {
4186 u8 enabled_tc = pf->hw.func_caps.enabled_tcmap;
4187 u8 i = 0;
4188
4189 if (!enabled_tc)
4190 return 0x1; /* TC0 */
4191
4192 /* Find the first enabled TC */
4193 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4194 if (enabled_tc & (1 << i))
4195 break;
4196 }
4197
4198 return 1 << i;
4199 }
4200
4201 /**
4202 * i40e_pf_get_pf_tc_map - Get bitmap for enabled traffic classes
4203 * @pf: PF being queried
4204 *
4205 * Return a bitmap for enabled traffic classes for this PF.
4206 **/
4207 static u8 i40e_pf_get_tc_map(struct i40e_pf *pf)
4208 {
4209 /* If DCB is not enabled for this PF then just return default TC */
4210 if (!(pf->flags & I40E_FLAG_DCB_ENABLED))
4211 return i40e_pf_get_default_tc(pf);
4212
4213 /* SFP mode we want PF to be enabled for all TCs */
4214 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
4215 return i40e_dcb_get_enabled_tc(&pf->hw.local_dcbx_config);
4216
4217 /* MFP enabled and iSCSI PF type */
4218 if (pf->hw.func_caps.iscsi)
4219 return i40e_get_iscsi_tc_map(pf);
4220 else
4221 return i40e_pf_get_default_tc(pf);
4222 }
4223
4224 /**
4225 * i40e_vsi_get_bw_info - Query VSI BW Information
4226 * @vsi: the VSI being queried
4227 *
4228 * Returns 0 on success, negative value on failure
4229 **/
4230 static int i40e_vsi_get_bw_info(struct i40e_vsi *vsi)
4231 {
4232 struct i40e_aqc_query_vsi_ets_sla_config_resp bw_ets_config = {0};
4233 struct i40e_aqc_query_vsi_bw_config_resp bw_config = {0};
4234 struct i40e_pf *pf = vsi->back;
4235 struct i40e_hw *hw = &pf->hw;
4236 i40e_status aq_ret;
4237 u32 tc_bw_max;
4238 int i;
4239
4240 /* Get the VSI level BW configuration */
4241 aq_ret = i40e_aq_query_vsi_bw_config(hw, vsi->seid, &bw_config, NULL);
4242 if (aq_ret) {
4243 dev_info(&pf->pdev->dev,
4244 "couldn't get PF vsi bw config, err %d, aq_err %d\n",
4245 aq_ret, pf->hw.aq.asq_last_status);
4246 return -EINVAL;
4247 }
4248
4249 /* Get the VSI level BW configuration per TC */
4250 aq_ret = i40e_aq_query_vsi_ets_sla_config(hw, vsi->seid, &bw_ets_config,
4251 NULL);
4252 if (aq_ret) {
4253 dev_info(&pf->pdev->dev,
4254 "couldn't get PF vsi ets bw config, err %d, aq_err %d\n",
4255 aq_ret, pf->hw.aq.asq_last_status);
4256 return -EINVAL;
4257 }
4258
4259 if (bw_config.tc_valid_bits != bw_ets_config.tc_valid_bits) {
4260 dev_info(&pf->pdev->dev,
4261 "Enabled TCs mismatch from querying VSI BW info 0x%08x 0x%08x\n",
4262 bw_config.tc_valid_bits,
4263 bw_ets_config.tc_valid_bits);
4264 /* Still continuing */
4265 }
4266
4267 vsi->bw_limit = le16_to_cpu(bw_config.port_bw_limit);
4268 vsi->bw_max_quanta = bw_config.max_bw;
4269 tc_bw_max = le16_to_cpu(bw_ets_config.tc_bw_max[0]) |
4270 (le16_to_cpu(bw_ets_config.tc_bw_max[1]) << 16);
4271 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4272 vsi->bw_ets_share_credits[i] = bw_ets_config.share_credits[i];
4273 vsi->bw_ets_limit_credits[i] =
4274 le16_to_cpu(bw_ets_config.credits[i]);
4275 /* 3 bits out of 4 for each TC */
4276 vsi->bw_ets_max_quanta[i] = (u8)((tc_bw_max >> (i*4)) & 0x7);
4277 }
4278
4279 return 0;
4280 }
4281
4282 /**
4283 * i40e_vsi_configure_bw_alloc - Configure VSI BW allocation per TC
4284 * @vsi: the VSI being configured
4285 * @enabled_tc: TC bitmap
4286 * @bw_credits: BW shared credits per TC
4287 *
4288 * Returns 0 on success, negative value on failure
4289 **/
4290 static int i40e_vsi_configure_bw_alloc(struct i40e_vsi *vsi, u8 enabled_tc,
4291 u8 *bw_share)
4292 {
4293 struct i40e_aqc_configure_vsi_tc_bw_data bw_data;
4294 i40e_status aq_ret;
4295 int i;
4296
4297 bw_data.tc_valid_bits = enabled_tc;
4298 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4299 bw_data.tc_bw_credits[i] = bw_share[i];
4300
4301 aq_ret = i40e_aq_config_vsi_tc_bw(&vsi->back->hw, vsi->seid, &bw_data,
4302 NULL);
4303 if (aq_ret) {
4304 dev_info(&vsi->back->pdev->dev,
4305 "AQ command Config VSI BW allocation per TC failed = %d\n",
4306 vsi->back->hw.aq.asq_last_status);
4307 return -EINVAL;
4308 }
4309
4310 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
4311 vsi->info.qs_handle[i] = bw_data.qs_handles[i];
4312
4313 return 0;
4314 }
4315
4316 /**
4317 * i40e_vsi_config_netdev_tc - Setup the netdev TC configuration
4318 * @vsi: the VSI being configured
4319 * @enabled_tc: TC map to be enabled
4320 *
4321 **/
4322 static void i40e_vsi_config_netdev_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4323 {
4324 struct net_device *netdev = vsi->netdev;
4325 struct i40e_pf *pf = vsi->back;
4326 struct i40e_hw *hw = &pf->hw;
4327 u8 netdev_tc = 0;
4328 int i;
4329 struct i40e_dcbx_config *dcbcfg = &hw->local_dcbx_config;
4330
4331 if (!netdev)
4332 return;
4333
4334 if (!enabled_tc) {
4335 netdev_reset_tc(netdev);
4336 return;
4337 }
4338
4339 /* Set up actual enabled TCs on the VSI */
4340 if (netdev_set_num_tc(netdev, vsi->tc_config.numtc))
4341 return;
4342
4343 /* set per TC queues for the VSI */
4344 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4345 /* Only set TC queues for enabled tcs
4346 *
4347 * e.g. For a VSI that has TC0 and TC3 enabled the
4348 * enabled_tc bitmap would be 0x00001001; the driver
4349 * will set the numtc for netdev as 2 that will be
4350 * referenced by the netdev layer as TC 0 and 1.
4351 */
4352 if (vsi->tc_config.enabled_tc & (1 << i))
4353 netdev_set_tc_queue(netdev,
4354 vsi->tc_config.tc_info[i].netdev_tc,
4355 vsi->tc_config.tc_info[i].qcount,
4356 vsi->tc_config.tc_info[i].qoffset);
4357 }
4358
4359 /* Assign UP2TC map for the VSI */
4360 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
4361 /* Get the actual TC# for the UP */
4362 u8 ets_tc = dcbcfg->etscfg.prioritytable[i];
4363 /* Get the mapped netdev TC# for the UP */
4364 netdev_tc = vsi->tc_config.tc_info[ets_tc].netdev_tc;
4365 netdev_set_prio_tc_map(netdev, i, netdev_tc);
4366 }
4367 }
4368
4369 /**
4370 * i40e_vsi_update_queue_map - Update our copy of VSi info with new queue map
4371 * @vsi: the VSI being configured
4372 * @ctxt: the ctxt buffer returned from AQ VSI update param command
4373 **/
4374 static void i40e_vsi_update_queue_map(struct i40e_vsi *vsi,
4375 struct i40e_vsi_context *ctxt)
4376 {
4377 /* copy just the sections touched not the entire info
4378 * since not all sections are valid as returned by
4379 * update vsi params
4380 */
4381 vsi->info.mapping_flags = ctxt->info.mapping_flags;
4382 memcpy(&vsi->info.queue_mapping,
4383 &ctxt->info.queue_mapping, sizeof(vsi->info.queue_mapping));
4384 memcpy(&vsi->info.tc_mapping, ctxt->info.tc_mapping,
4385 sizeof(vsi->info.tc_mapping));
4386 }
4387
4388 /**
4389 * i40e_vsi_config_tc - Configure VSI Tx Scheduler for given TC map
4390 * @vsi: VSI to be configured
4391 * @enabled_tc: TC bitmap
4392 *
4393 * This configures a particular VSI for TCs that are mapped to the
4394 * given TC bitmap. It uses default bandwidth share for TCs across
4395 * VSIs to configure TC for a particular VSI.
4396 *
4397 * NOTE:
4398 * It is expected that the VSI queues have been quisced before calling
4399 * this function.
4400 **/
4401 static int i40e_vsi_config_tc(struct i40e_vsi *vsi, u8 enabled_tc)
4402 {
4403 u8 bw_share[I40E_MAX_TRAFFIC_CLASS] = {0};
4404 struct i40e_vsi_context ctxt;
4405 int ret = 0;
4406 int i;
4407
4408 /* Check if enabled_tc is same as existing or new TCs */
4409 if (vsi->tc_config.enabled_tc == enabled_tc)
4410 return ret;
4411
4412 /* Enable ETS TCs with equal BW Share for now across all VSIs */
4413 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4414 if (enabled_tc & (1 << i))
4415 bw_share[i] = 1;
4416 }
4417
4418 ret = i40e_vsi_configure_bw_alloc(vsi, enabled_tc, bw_share);
4419 if (ret) {
4420 dev_info(&vsi->back->pdev->dev,
4421 "Failed configuring TC map %d for VSI %d\n",
4422 enabled_tc, vsi->seid);
4423 goto out;
4424 }
4425
4426 /* Update Queue Pairs Mapping for currently enabled UPs */
4427 ctxt.seid = vsi->seid;
4428 ctxt.pf_num = vsi->back->hw.pf_id;
4429 ctxt.vf_num = 0;
4430 ctxt.uplink_seid = vsi->uplink_seid;
4431 ctxt.info = vsi->info;
4432 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
4433
4434 /* Update the VSI after updating the VSI queue-mapping information */
4435 ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
4436 if (ret) {
4437 dev_info(&vsi->back->pdev->dev,
4438 "update vsi failed, aq_err=%d\n",
4439 vsi->back->hw.aq.asq_last_status);
4440 goto out;
4441 }
4442 /* update the local VSI info with updated queue map */
4443 i40e_vsi_update_queue_map(vsi, &ctxt);
4444 vsi->info.valid_sections = 0;
4445
4446 /* Update current VSI BW information */
4447 ret = i40e_vsi_get_bw_info(vsi);
4448 if (ret) {
4449 dev_info(&vsi->back->pdev->dev,
4450 "Failed updating vsi bw info, aq_err=%d\n",
4451 vsi->back->hw.aq.asq_last_status);
4452 goto out;
4453 }
4454
4455 /* Update the netdev TC setup */
4456 i40e_vsi_config_netdev_tc(vsi, enabled_tc);
4457 out:
4458 return ret;
4459 }
4460
4461 /**
4462 * i40e_veb_config_tc - Configure TCs for given VEB
4463 * @veb: given VEB
4464 * @enabled_tc: TC bitmap
4465 *
4466 * Configures given TC bitmap for VEB (switching) element
4467 **/
4468 int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc)
4469 {
4470 struct i40e_aqc_configure_switching_comp_bw_config_data bw_data = {0};
4471 struct i40e_pf *pf = veb->pf;
4472 int ret = 0;
4473 int i;
4474
4475 /* No TCs or already enabled TCs just return */
4476 if (!enabled_tc || veb->enabled_tc == enabled_tc)
4477 return ret;
4478
4479 bw_data.tc_valid_bits = enabled_tc;
4480 /* bw_data.absolute_credits is not set (relative) */
4481
4482 /* Enable ETS TCs with equal BW Share for now */
4483 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
4484 if (enabled_tc & (1 << i))
4485 bw_data.tc_bw_share_credits[i] = 1;
4486 }
4487
4488 ret = i40e_aq_config_switch_comp_bw_config(&pf->hw, veb->seid,
4489 &bw_data, NULL);
4490 if (ret) {
4491 dev_info(&pf->pdev->dev,
4492 "veb bw config failed, aq_err=%d\n",
4493 pf->hw.aq.asq_last_status);
4494 goto out;
4495 }
4496
4497 /* Update the BW information */
4498 ret = i40e_veb_get_bw_info(veb);
4499 if (ret) {
4500 dev_info(&pf->pdev->dev,
4501 "Failed getting veb bw config, aq_err=%d\n",
4502 pf->hw.aq.asq_last_status);
4503 }
4504
4505 out:
4506 return ret;
4507 }
4508
4509 #ifdef CONFIG_I40E_DCB
4510 /**
4511 * i40e_dcb_reconfigure - Reconfigure all VEBs and VSIs
4512 * @pf: PF struct
4513 *
4514 * Reconfigure VEB/VSIs on a given PF; it is assumed that
4515 * the caller would've quiesce all the VSIs before calling
4516 * this function
4517 **/
4518 static void i40e_dcb_reconfigure(struct i40e_pf *pf)
4519 {
4520 u8 tc_map = 0;
4521 int ret;
4522 u8 v;
4523
4524 /* Enable the TCs available on PF to all VEBs */
4525 tc_map = i40e_pf_get_tc_map(pf);
4526 for (v = 0; v < I40E_MAX_VEB; v++) {
4527 if (!pf->veb[v])
4528 continue;
4529 ret = i40e_veb_config_tc(pf->veb[v], tc_map);
4530 if (ret) {
4531 dev_info(&pf->pdev->dev,
4532 "Failed configuring TC for VEB seid=%d\n",
4533 pf->veb[v]->seid);
4534 /* Will try to configure as many components */
4535 }
4536 }
4537
4538 /* Update each VSI */
4539 for (v = 0; v < pf->num_alloc_vsi; v++) {
4540 if (!pf->vsi[v])
4541 continue;
4542
4543 /* - Enable all TCs for the LAN VSI
4544 #ifdef I40E_FCOE
4545 * - For FCoE VSI only enable the TC configured
4546 * as per the APP TLV
4547 #endif
4548 * - For all others keep them at TC0 for now
4549 */
4550 if (v == pf->lan_vsi)
4551 tc_map = i40e_pf_get_tc_map(pf);
4552 else
4553 tc_map = i40e_pf_get_default_tc(pf);
4554 #ifdef I40E_FCOE
4555 if (pf->vsi[v]->type == I40E_VSI_FCOE)
4556 tc_map = i40e_get_fcoe_tc_map(pf);
4557 #endif /* #ifdef I40E_FCOE */
4558
4559 ret = i40e_vsi_config_tc(pf->vsi[v], tc_map);
4560 if (ret) {
4561 dev_info(&pf->pdev->dev,
4562 "Failed configuring TC for VSI seid=%d\n",
4563 pf->vsi[v]->seid);
4564 /* Will try to configure as many components */
4565 } else {
4566 /* Re-configure VSI vectors based on updated TC map */
4567 i40e_vsi_map_rings_to_vectors(pf->vsi[v]);
4568 if (pf->vsi[v]->netdev)
4569 i40e_dcbnl_set_all(pf->vsi[v]);
4570 }
4571 }
4572 }
4573
4574 /**
4575 * i40e_resume_port_tx - Resume port Tx
4576 * @pf: PF struct
4577 *
4578 * Resume a port's Tx and issue a PF reset in case of failure to
4579 * resume.
4580 **/
4581 static int i40e_resume_port_tx(struct i40e_pf *pf)
4582 {
4583 struct i40e_hw *hw = &pf->hw;
4584 int ret;
4585
4586 ret = i40e_aq_resume_port_tx(hw, NULL);
4587 if (ret) {
4588 dev_info(&pf->pdev->dev,
4589 "AQ command Resume Port Tx failed = %d\n",
4590 pf->hw.aq.asq_last_status);
4591 /* Schedule PF reset to recover */
4592 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
4593 i40e_service_event_schedule(pf);
4594 }
4595
4596 return ret;
4597 }
4598
4599 /**
4600 * i40e_init_pf_dcb - Initialize DCB configuration
4601 * @pf: PF being configured
4602 *
4603 * Query the current DCB configuration and cache it
4604 * in the hardware structure
4605 **/
4606 static int i40e_init_pf_dcb(struct i40e_pf *pf)
4607 {
4608 struct i40e_hw *hw = &pf->hw;
4609 int err = 0;
4610
4611 /* Do not enable DCB for SW1 and SW2 images even if the FW is capable */
4612 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
4613 (pf->hw.aq.fw_maj_ver < 4))
4614 goto out;
4615
4616 /* Get the initial DCB configuration */
4617 err = i40e_init_dcb(hw);
4618 if (!err) {
4619 /* Device/Function is not DCBX capable */
4620 if ((!hw->func_caps.dcb) ||
4621 (hw->dcbx_status == I40E_DCBX_STATUS_DISABLED)) {
4622 dev_info(&pf->pdev->dev,
4623 "DCBX offload is not supported or is disabled for this PF.\n");
4624
4625 if (pf->flags & I40E_FLAG_MFP_ENABLED)
4626 goto out;
4627
4628 } else {
4629 /* When status is not DISABLED then DCBX in FW */
4630 pf->dcbx_cap = DCB_CAP_DCBX_LLD_MANAGED |
4631 DCB_CAP_DCBX_VER_IEEE;
4632
4633 pf->flags |= I40E_FLAG_DCB_CAPABLE;
4634 /* Enable DCB tagging only when more than one TC */
4635 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
4636 pf->flags |= I40E_FLAG_DCB_ENABLED;
4637 dev_dbg(&pf->pdev->dev,
4638 "DCBX offload is supported for this PF.\n");
4639 }
4640 } else {
4641 dev_info(&pf->pdev->dev,
4642 "AQ Querying DCB configuration failed: aq_err %d\n",
4643 pf->hw.aq.asq_last_status);
4644 }
4645
4646 out:
4647 return err;
4648 }
4649 #endif /* CONFIG_I40E_DCB */
4650 #define SPEED_SIZE 14
4651 #define FC_SIZE 8
4652 /**
4653 * i40e_print_link_message - print link up or down
4654 * @vsi: the VSI for which link needs a message
4655 */
4656 static void i40e_print_link_message(struct i40e_vsi *vsi, bool isup)
4657 {
4658 char speed[SPEED_SIZE] = "Unknown";
4659 char fc[FC_SIZE] = "RX/TX";
4660
4661 if (!isup) {
4662 netdev_info(vsi->netdev, "NIC Link is Down\n");
4663 return;
4664 }
4665
4666 /* Warn user if link speed on NPAR enabled partition is not at
4667 * least 10GB
4668 */
4669 if (vsi->back->hw.func_caps.npar_enable &&
4670 (vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_1GB ||
4671 vsi->back->hw.phy.link_info.link_speed == I40E_LINK_SPEED_100MB))
4672 netdev_warn(vsi->netdev,
4673 "The partition detected link speed that is less than 10Gbps\n");
4674
4675 switch (vsi->back->hw.phy.link_info.link_speed) {
4676 case I40E_LINK_SPEED_40GB:
4677 strlcpy(speed, "40 Gbps", SPEED_SIZE);
4678 break;
4679 case I40E_LINK_SPEED_20GB:
4680 strncpy(speed, "20 Gbps", SPEED_SIZE);
4681 break;
4682 case I40E_LINK_SPEED_10GB:
4683 strlcpy(speed, "10 Gbps", SPEED_SIZE);
4684 break;
4685 case I40E_LINK_SPEED_1GB:
4686 strlcpy(speed, "1000 Mbps", SPEED_SIZE);
4687 break;
4688 case I40E_LINK_SPEED_100MB:
4689 strncpy(speed, "100 Mbps", SPEED_SIZE);
4690 break;
4691 default:
4692 break;
4693 }
4694
4695 switch (vsi->back->hw.fc.current_mode) {
4696 case I40E_FC_FULL:
4697 strlcpy(fc, "RX/TX", FC_SIZE);
4698 break;
4699 case I40E_FC_TX_PAUSE:
4700 strlcpy(fc, "TX", FC_SIZE);
4701 break;
4702 case I40E_FC_RX_PAUSE:
4703 strlcpy(fc, "RX", FC_SIZE);
4704 break;
4705 default:
4706 strlcpy(fc, "None", FC_SIZE);
4707 break;
4708 }
4709
4710 netdev_info(vsi->netdev, "NIC Link is Up %s Full Duplex, Flow Control: %s\n",
4711 speed, fc);
4712 }
4713
4714 /**
4715 * i40e_up_complete - Finish the last steps of bringing up a connection
4716 * @vsi: the VSI being configured
4717 **/
4718 static int i40e_up_complete(struct i40e_vsi *vsi)
4719 {
4720 struct i40e_pf *pf = vsi->back;
4721 int err;
4722
4723 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
4724 i40e_vsi_configure_msix(vsi);
4725 else
4726 i40e_configure_msi_and_legacy(vsi);
4727
4728 /* start rings */
4729 err = i40e_vsi_control_rings(vsi, true);
4730 if (err)
4731 return err;
4732
4733 clear_bit(__I40E_DOWN, &vsi->state);
4734 i40e_napi_enable_all(vsi);
4735 i40e_vsi_enable_irq(vsi);
4736
4737 if ((pf->hw.phy.link_info.link_info & I40E_AQ_LINK_UP) &&
4738 (vsi->netdev)) {
4739 i40e_print_link_message(vsi, true);
4740 netif_tx_start_all_queues(vsi->netdev);
4741 netif_carrier_on(vsi->netdev);
4742 } else if (vsi->netdev) {
4743 i40e_print_link_message(vsi, false);
4744 /* need to check for qualified module here*/
4745 if ((pf->hw.phy.link_info.link_info &
4746 I40E_AQ_MEDIA_AVAILABLE) &&
4747 (!(pf->hw.phy.link_info.an_info &
4748 I40E_AQ_QUALIFIED_MODULE)))
4749 netdev_err(vsi->netdev,
4750 "the driver failed to link because an unqualified module was detected.");
4751 }
4752
4753 /* replay FDIR SB filters */
4754 if (vsi->type == I40E_VSI_FDIR) {
4755 /* reset fd counters */
4756 pf->fd_add_err = pf->fd_atr_cnt = 0;
4757 if (pf->fd_tcp_rule > 0) {
4758 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED;
4759 if (I40E_DEBUG_FD & pf->hw.debug_mask)
4760 dev_info(&pf->pdev->dev, "Forcing ATR off, sideband rules for TCP/IPv4 exist\n");
4761 pf->fd_tcp_rule = 0;
4762 }
4763 i40e_fdir_filter_restore(vsi);
4764 }
4765 i40e_service_event_schedule(pf);
4766
4767 return 0;
4768 }
4769
4770 /**
4771 * i40e_vsi_reinit_locked - Reset the VSI
4772 * @vsi: the VSI being configured
4773 *
4774 * Rebuild the ring structs after some configuration
4775 * has changed, e.g. MTU size.
4776 **/
4777 static void i40e_vsi_reinit_locked(struct i40e_vsi *vsi)
4778 {
4779 struct i40e_pf *pf = vsi->back;
4780
4781 WARN_ON(in_interrupt());
4782 while (test_and_set_bit(__I40E_CONFIG_BUSY, &pf->state))
4783 usleep_range(1000, 2000);
4784 i40e_down(vsi);
4785
4786 /* Give a VF some time to respond to the reset. The
4787 * two second wait is based upon the watchdog cycle in
4788 * the VF driver.
4789 */
4790 if (vsi->type == I40E_VSI_SRIOV)
4791 msleep(2000);
4792 i40e_up(vsi);
4793 clear_bit(__I40E_CONFIG_BUSY, &pf->state);
4794 }
4795
4796 /**
4797 * i40e_up - Bring the connection back up after being down
4798 * @vsi: the VSI being configured
4799 **/
4800 int i40e_up(struct i40e_vsi *vsi)
4801 {
4802 int err;
4803
4804 err = i40e_vsi_configure(vsi);
4805 if (!err)
4806 err = i40e_up_complete(vsi);
4807
4808 return err;
4809 }
4810
4811 /**
4812 * i40e_down - Shutdown the connection processing
4813 * @vsi: the VSI being stopped
4814 **/
4815 void i40e_down(struct i40e_vsi *vsi)
4816 {
4817 int i;
4818
4819 /* It is assumed that the caller of this function
4820 * sets the vsi->state __I40E_DOWN bit.
4821 */
4822 if (vsi->netdev) {
4823 netif_carrier_off(vsi->netdev);
4824 netif_tx_disable(vsi->netdev);
4825 }
4826 i40e_vsi_disable_irq(vsi);
4827 i40e_vsi_control_rings(vsi, false);
4828 i40e_napi_disable_all(vsi);
4829
4830 for (i = 0; i < vsi->num_queue_pairs; i++) {
4831 i40e_clean_tx_ring(vsi->tx_rings[i]);
4832 i40e_clean_rx_ring(vsi->rx_rings[i]);
4833 }
4834 }
4835
4836 /**
4837 * i40e_setup_tc - configure multiple traffic classes
4838 * @netdev: net device to configure
4839 * @tc: number of traffic classes to enable
4840 **/
4841 #ifdef I40E_FCOE
4842 int i40e_setup_tc(struct net_device *netdev, u8 tc)
4843 #else
4844 static int i40e_setup_tc(struct net_device *netdev, u8 tc)
4845 #endif
4846 {
4847 struct i40e_netdev_priv *np = netdev_priv(netdev);
4848 struct i40e_vsi *vsi = np->vsi;
4849 struct i40e_pf *pf = vsi->back;
4850 u8 enabled_tc = 0;
4851 int ret = -EINVAL;
4852 int i;
4853
4854 /* Check if DCB enabled to continue */
4855 if (!(pf->flags & I40E_FLAG_DCB_ENABLED)) {
4856 netdev_info(netdev, "DCB is not enabled for adapter\n");
4857 goto exit;
4858 }
4859
4860 /* Check if MFP enabled */
4861 if (pf->flags & I40E_FLAG_MFP_ENABLED) {
4862 netdev_info(netdev, "Configuring TC not supported in MFP mode\n");
4863 goto exit;
4864 }
4865
4866 /* Check whether tc count is within enabled limit */
4867 if (tc > i40e_pf_get_num_tc(pf)) {
4868 netdev_info(netdev, "TC count greater than enabled on link for adapter\n");
4869 goto exit;
4870 }
4871
4872 /* Generate TC map for number of tc requested */
4873 for (i = 0; i < tc; i++)
4874 enabled_tc |= (1 << i);
4875
4876 /* Requesting same TC configuration as already enabled */
4877 if (enabled_tc == vsi->tc_config.enabled_tc)
4878 return 0;
4879
4880 /* Quiesce VSI queues */
4881 i40e_quiesce_vsi(vsi);
4882
4883 /* Configure VSI for enabled TCs */
4884 ret = i40e_vsi_config_tc(vsi, enabled_tc);
4885 if (ret) {
4886 netdev_info(netdev, "Failed configuring TC for VSI seid=%d\n",
4887 vsi->seid);
4888 goto exit;
4889 }
4890
4891 /* Unquiesce VSI */
4892 i40e_unquiesce_vsi(vsi);
4893
4894 exit:
4895 return ret;
4896 }
4897
4898 /**
4899 * i40e_open - Called when a network interface is made active
4900 * @netdev: network interface device structure
4901 *
4902 * The open entry point is called when a network interface is made
4903 * active by the system (IFF_UP). At this point all resources needed
4904 * for transmit and receive operations are allocated, the interrupt
4905 * handler is registered with the OS, the netdev watchdog subtask is
4906 * enabled, and the stack is notified that the interface is ready.
4907 *
4908 * Returns 0 on success, negative value on failure
4909 **/
4910 int i40e_open(struct net_device *netdev)
4911 {
4912 struct i40e_netdev_priv *np = netdev_priv(netdev);
4913 struct i40e_vsi *vsi = np->vsi;
4914 struct i40e_pf *pf = vsi->back;
4915 int err;
4916
4917 /* disallow open during test or if eeprom is broken */
4918 if (test_bit(__I40E_TESTING, &pf->state) ||
4919 test_bit(__I40E_BAD_EEPROM, &pf->state))
4920 return -EBUSY;
4921
4922 netif_carrier_off(netdev);
4923
4924 err = i40e_vsi_open(vsi);
4925 if (err)
4926 return err;
4927
4928 /* configure global TSO hardware offload settings */
4929 wr32(&pf->hw, I40E_GLLAN_TSOMSK_F, be32_to_cpu(TCP_FLAG_PSH |
4930 TCP_FLAG_FIN) >> 16);
4931 wr32(&pf->hw, I40E_GLLAN_TSOMSK_M, be32_to_cpu(TCP_FLAG_PSH |
4932 TCP_FLAG_FIN |
4933 TCP_FLAG_CWR) >> 16);
4934 wr32(&pf->hw, I40E_GLLAN_TSOMSK_L, be32_to_cpu(TCP_FLAG_CWR) >> 16);
4935
4936 #ifdef CONFIG_I40E_VXLAN
4937 vxlan_get_rx_port(netdev);
4938 #endif
4939
4940 return 0;
4941 }
4942
4943 /**
4944 * i40e_vsi_open -
4945 * @vsi: the VSI to open
4946 *
4947 * Finish initialization of the VSI.
4948 *
4949 * Returns 0 on success, negative value on failure
4950 **/
4951 int i40e_vsi_open(struct i40e_vsi *vsi)
4952 {
4953 struct i40e_pf *pf = vsi->back;
4954 char int_name[I40E_INT_NAME_STR_LEN];
4955 int err;
4956
4957 /* allocate descriptors */
4958 err = i40e_vsi_setup_tx_resources(vsi);
4959 if (err)
4960 goto err_setup_tx;
4961 err = i40e_vsi_setup_rx_resources(vsi);
4962 if (err)
4963 goto err_setup_rx;
4964
4965 err = i40e_vsi_configure(vsi);
4966 if (err)
4967 goto err_setup_rx;
4968
4969 if (vsi->netdev) {
4970 snprintf(int_name, sizeof(int_name) - 1, "%s-%s",
4971 dev_driver_string(&pf->pdev->dev), vsi->netdev->name);
4972 err = i40e_vsi_request_irq(vsi, int_name);
4973 if (err)
4974 goto err_setup_rx;
4975
4976 /* Notify the stack of the actual queue counts. */
4977 err = netif_set_real_num_tx_queues(vsi->netdev,
4978 vsi->num_queue_pairs);
4979 if (err)
4980 goto err_set_queues;
4981
4982 err = netif_set_real_num_rx_queues(vsi->netdev,
4983 vsi->num_queue_pairs);
4984 if (err)
4985 goto err_set_queues;
4986
4987 } else if (vsi->type == I40E_VSI_FDIR) {
4988 snprintf(int_name, sizeof(int_name) - 1, "%s-%s:fdir",
4989 dev_driver_string(&pf->pdev->dev),
4990 dev_name(&pf->pdev->dev));
4991 err = i40e_vsi_request_irq(vsi, int_name);
4992
4993 } else {
4994 err = -EINVAL;
4995 goto err_setup_rx;
4996 }
4997
4998 err = i40e_up_complete(vsi);
4999 if (err)
5000 goto err_up_complete;
5001
5002 return 0;
5003
5004 err_up_complete:
5005 i40e_down(vsi);
5006 err_set_queues:
5007 i40e_vsi_free_irq(vsi);
5008 err_setup_rx:
5009 i40e_vsi_free_rx_resources(vsi);
5010 err_setup_tx:
5011 i40e_vsi_free_tx_resources(vsi);
5012 if (vsi == pf->vsi[pf->lan_vsi])
5013 i40e_do_reset(pf, (1 << __I40E_PF_RESET_REQUESTED));
5014
5015 return err;
5016 }
5017
5018 /**
5019 * i40e_fdir_filter_exit - Cleans up the Flow Director accounting
5020 * @pf: Pointer to PF
5021 *
5022 * This function destroys the hlist where all the Flow Director
5023 * filters were saved.
5024 **/
5025 static void i40e_fdir_filter_exit(struct i40e_pf *pf)
5026 {
5027 struct i40e_fdir_filter *filter;
5028 struct hlist_node *node2;
5029
5030 hlist_for_each_entry_safe(filter, node2,
5031 &pf->fdir_filter_list, fdir_node) {
5032 hlist_del(&filter->fdir_node);
5033 kfree(filter);
5034 }
5035 pf->fdir_pf_active_filters = 0;
5036 }
5037
5038 /**
5039 * i40e_close - Disables a network interface
5040 * @netdev: network interface device structure
5041 *
5042 * The close entry point is called when an interface is de-activated
5043 * by the OS. The hardware is still under the driver's control, but
5044 * this netdev interface is disabled.
5045 *
5046 * Returns 0, this is not allowed to fail
5047 **/
5048 #ifdef I40E_FCOE
5049 int i40e_close(struct net_device *netdev)
5050 #else
5051 static int i40e_close(struct net_device *netdev)
5052 #endif
5053 {
5054 struct i40e_netdev_priv *np = netdev_priv(netdev);
5055 struct i40e_vsi *vsi = np->vsi;
5056
5057 i40e_vsi_close(vsi);
5058
5059 return 0;
5060 }
5061
5062 /**
5063 * i40e_do_reset - Start a PF or Core Reset sequence
5064 * @pf: board private structure
5065 * @reset_flags: which reset is requested
5066 *
5067 * The essential difference in resets is that the PF Reset
5068 * doesn't clear the packet buffers, doesn't reset the PE
5069 * firmware, and doesn't bother the other PFs on the chip.
5070 **/
5071 void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags)
5072 {
5073 u32 val;
5074
5075 WARN_ON(in_interrupt());
5076
5077 if (i40e_check_asq_alive(&pf->hw))
5078 i40e_vc_notify_reset(pf);
5079
5080 /* do the biggest reset indicated */
5081 if (reset_flags & (1 << __I40E_GLOBAL_RESET_REQUESTED)) {
5082
5083 /* Request a Global Reset
5084 *
5085 * This will start the chip's countdown to the actual full
5086 * chip reset event, and a warning interrupt to be sent
5087 * to all PFs, including the requestor. Our handler
5088 * for the warning interrupt will deal with the shutdown
5089 * and recovery of the switch setup.
5090 */
5091 dev_dbg(&pf->pdev->dev, "GlobalR requested\n");
5092 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5093 val |= I40E_GLGEN_RTRIG_GLOBR_MASK;
5094 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5095
5096 } else if (reset_flags & (1 << __I40E_CORE_RESET_REQUESTED)) {
5097
5098 /* Request a Core Reset
5099 *
5100 * Same as Global Reset, except does *not* include the MAC/PHY
5101 */
5102 dev_dbg(&pf->pdev->dev, "CoreR requested\n");
5103 val = rd32(&pf->hw, I40E_GLGEN_RTRIG);
5104 val |= I40E_GLGEN_RTRIG_CORER_MASK;
5105 wr32(&pf->hw, I40E_GLGEN_RTRIG, val);
5106 i40e_flush(&pf->hw);
5107
5108 } else if (reset_flags & (1 << __I40E_PF_RESET_REQUESTED)) {
5109
5110 /* Request a PF Reset
5111 *
5112 * Resets only the PF-specific registers
5113 *
5114 * This goes directly to the tear-down and rebuild of
5115 * the switch, since we need to do all the recovery as
5116 * for the Core Reset.
5117 */
5118 dev_dbg(&pf->pdev->dev, "PFR requested\n");
5119 i40e_handle_reset_warning(pf);
5120
5121 } else if (reset_flags & (1 << __I40E_REINIT_REQUESTED)) {
5122 int v;
5123
5124 /* Find the VSI(s) that requested a re-init */
5125 dev_info(&pf->pdev->dev,
5126 "VSI reinit requested\n");
5127 for (v = 0; v < pf->num_alloc_vsi; v++) {
5128 struct i40e_vsi *vsi = pf->vsi[v];
5129 if (vsi != NULL &&
5130 test_bit(__I40E_REINIT_REQUESTED, &vsi->state)) {
5131 i40e_vsi_reinit_locked(pf->vsi[v]);
5132 clear_bit(__I40E_REINIT_REQUESTED, &vsi->state);
5133 }
5134 }
5135
5136 /* no further action needed, so return now */
5137 return;
5138 } else if (reset_flags & (1 << __I40E_DOWN_REQUESTED)) {
5139 int v;
5140
5141 /* Find the VSI(s) that needs to be brought down */
5142 dev_info(&pf->pdev->dev, "VSI down requested\n");
5143 for (v = 0; v < pf->num_alloc_vsi; v++) {
5144 struct i40e_vsi *vsi = pf->vsi[v];
5145 if (vsi != NULL &&
5146 test_bit(__I40E_DOWN_REQUESTED, &vsi->state)) {
5147 set_bit(__I40E_DOWN, &vsi->state);
5148 i40e_down(vsi);
5149 clear_bit(__I40E_DOWN_REQUESTED, &vsi->state);
5150 }
5151 }
5152
5153 /* no further action needed, so return now */
5154 return;
5155 } else {
5156 dev_info(&pf->pdev->dev,
5157 "bad reset request 0x%08x\n", reset_flags);
5158 return;
5159 }
5160 }
5161
5162 #ifdef CONFIG_I40E_DCB
5163 /**
5164 * i40e_dcb_need_reconfig - Check if DCB needs reconfig
5165 * @pf: board private structure
5166 * @old_cfg: current DCB config
5167 * @new_cfg: new DCB config
5168 **/
5169 bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
5170 struct i40e_dcbx_config *old_cfg,
5171 struct i40e_dcbx_config *new_cfg)
5172 {
5173 bool need_reconfig = false;
5174
5175 /* Check if ETS configuration has changed */
5176 if (memcmp(&new_cfg->etscfg,
5177 &old_cfg->etscfg,
5178 sizeof(new_cfg->etscfg))) {
5179 /* If Priority Table has changed reconfig is needed */
5180 if (memcmp(&new_cfg->etscfg.prioritytable,
5181 &old_cfg->etscfg.prioritytable,
5182 sizeof(new_cfg->etscfg.prioritytable))) {
5183 need_reconfig = true;
5184 dev_dbg(&pf->pdev->dev, "ETS UP2TC changed.\n");
5185 }
5186
5187 if (memcmp(&new_cfg->etscfg.tcbwtable,
5188 &old_cfg->etscfg.tcbwtable,
5189 sizeof(new_cfg->etscfg.tcbwtable)))
5190 dev_dbg(&pf->pdev->dev, "ETS TC BW Table changed.\n");
5191
5192 if (memcmp(&new_cfg->etscfg.tsatable,
5193 &old_cfg->etscfg.tsatable,
5194 sizeof(new_cfg->etscfg.tsatable)))
5195 dev_dbg(&pf->pdev->dev, "ETS TSA Table changed.\n");
5196 }
5197
5198 /* Check if PFC configuration has changed */
5199 if (memcmp(&new_cfg->pfc,
5200 &old_cfg->pfc,
5201 sizeof(new_cfg->pfc))) {
5202 need_reconfig = true;
5203 dev_dbg(&pf->pdev->dev, "PFC config change detected.\n");
5204 }
5205
5206 /* Check if APP Table has changed */
5207 if (memcmp(&new_cfg->app,
5208 &old_cfg->app,
5209 sizeof(new_cfg->app))) {
5210 need_reconfig = true;
5211 dev_dbg(&pf->pdev->dev, "APP Table change detected.\n");
5212 }
5213
5214 dev_dbg(&pf->pdev->dev, "%s: need_reconfig=%d\n", __func__,
5215 need_reconfig);
5216 return need_reconfig;
5217 }
5218
5219 /**
5220 * i40e_handle_lldp_event - Handle LLDP Change MIB event
5221 * @pf: board private structure
5222 * @e: event info posted on ARQ
5223 **/
5224 static int i40e_handle_lldp_event(struct i40e_pf *pf,
5225 struct i40e_arq_event_info *e)
5226 {
5227 struct i40e_aqc_lldp_get_mib *mib =
5228 (struct i40e_aqc_lldp_get_mib *)&e->desc.params.raw;
5229 struct i40e_hw *hw = &pf->hw;
5230 struct i40e_dcbx_config tmp_dcbx_cfg;
5231 bool need_reconfig = false;
5232 int ret = 0;
5233 u8 type;
5234
5235 /* Not DCB capable or capability disabled */
5236 if (!(pf->flags & I40E_FLAG_DCB_CAPABLE))
5237 return ret;
5238
5239 /* Ignore if event is not for Nearest Bridge */
5240 type = ((mib->type >> I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT)
5241 & I40E_AQ_LLDP_BRIDGE_TYPE_MASK);
5242 dev_dbg(&pf->pdev->dev,
5243 "%s: LLDP event mib bridge type 0x%x\n", __func__, type);
5244 if (type != I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE)
5245 return ret;
5246
5247 /* Check MIB Type and return if event for Remote MIB update */
5248 type = mib->type & I40E_AQ_LLDP_MIB_TYPE_MASK;
5249 dev_dbg(&pf->pdev->dev,
5250 "%s: LLDP event mib type %s\n", __func__,
5251 type ? "remote" : "local");
5252 if (type == I40E_AQ_LLDP_MIB_REMOTE) {
5253 /* Update the remote cached instance and return */
5254 ret = i40e_aq_get_dcb_config(hw, I40E_AQ_LLDP_MIB_REMOTE,
5255 I40E_AQ_LLDP_BRIDGE_TYPE_NEAREST_BRIDGE,
5256 &hw->remote_dcbx_config);
5257 goto exit;
5258 }
5259
5260 /* Store the old configuration */
5261 tmp_dcbx_cfg = hw->local_dcbx_config;
5262
5263 /* Reset the old DCBx configuration data */
5264 memset(&hw->local_dcbx_config, 0, sizeof(hw->local_dcbx_config));
5265 /* Get updated DCBX data from firmware */
5266 ret = i40e_get_dcb_config(&pf->hw);
5267 if (ret) {
5268 dev_info(&pf->pdev->dev, "Failed querying DCB configuration data from firmware.\n");
5269 goto exit;
5270 }
5271
5272 /* No change detected in DCBX configs */
5273 if (!memcmp(&tmp_dcbx_cfg, &hw->local_dcbx_config,
5274 sizeof(tmp_dcbx_cfg))) {
5275 dev_dbg(&pf->pdev->dev, "No change detected in DCBX configuration.\n");
5276 goto exit;
5277 }
5278
5279 need_reconfig = i40e_dcb_need_reconfig(pf, &tmp_dcbx_cfg,
5280 &hw->local_dcbx_config);
5281
5282 i40e_dcbnl_flush_apps(pf, &tmp_dcbx_cfg, &hw->local_dcbx_config);
5283
5284 if (!need_reconfig)
5285 goto exit;
5286
5287 /* Enable DCB tagging only when more than one TC */
5288 if (i40e_dcb_get_num_tc(&hw->local_dcbx_config) > 1)
5289 pf->flags |= I40E_FLAG_DCB_ENABLED;
5290 else
5291 pf->flags &= ~I40E_FLAG_DCB_ENABLED;
5292
5293 set_bit(__I40E_PORT_TX_SUSPENDED, &pf->state);
5294 /* Reconfiguration needed quiesce all VSIs */
5295 i40e_pf_quiesce_all_vsi(pf);
5296
5297 /* Changes in configuration update VEB/VSI */
5298 i40e_dcb_reconfigure(pf);
5299
5300 ret = i40e_resume_port_tx(pf);
5301
5302 clear_bit(__I40E_PORT_TX_SUSPENDED, &pf->state);
5303 /* In case of error no point in resuming VSIs */
5304 if (ret)
5305 goto exit;
5306
5307 /* Wait for the PF's Tx queues to be disabled */
5308 ret = i40e_pf_wait_txq_disabled(pf);
5309 if (ret) {
5310 /* Schedule PF reset to recover */
5311 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
5312 i40e_service_event_schedule(pf);
5313 } else {
5314 i40e_pf_unquiesce_all_vsi(pf);
5315 }
5316
5317 exit:
5318 return ret;
5319 }
5320 #endif /* CONFIG_I40E_DCB */
5321
5322 /**
5323 * i40e_do_reset_safe - Protected reset path for userland calls.
5324 * @pf: board private structure
5325 * @reset_flags: which reset is requested
5326 *
5327 **/
5328 void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags)
5329 {
5330 rtnl_lock();
5331 i40e_do_reset(pf, reset_flags);
5332 rtnl_unlock();
5333 }
5334
5335 /**
5336 * i40e_handle_lan_overflow_event - Handler for LAN queue overflow event
5337 * @pf: board private structure
5338 * @e: event info posted on ARQ
5339 *
5340 * Handler for LAN Queue Overflow Event generated by the firmware for PF
5341 * and VF queues
5342 **/
5343 static void i40e_handle_lan_overflow_event(struct i40e_pf *pf,
5344 struct i40e_arq_event_info *e)
5345 {
5346 struct i40e_aqc_lan_overflow *data =
5347 (struct i40e_aqc_lan_overflow *)&e->desc.params.raw;
5348 u32 queue = le32_to_cpu(data->prtdcb_rupto);
5349 u32 qtx_ctl = le32_to_cpu(data->otx_ctl);
5350 struct i40e_hw *hw = &pf->hw;
5351 struct i40e_vf *vf;
5352 u16 vf_id;
5353
5354 dev_dbg(&pf->pdev->dev, "overflow Rx Queue Number = %d QTX_CTL=0x%08x\n",
5355 queue, qtx_ctl);
5356
5357 /* Queue belongs to VF, find the VF and issue VF reset */
5358 if (((qtx_ctl & I40E_QTX_CTL_PFVF_Q_MASK)
5359 >> I40E_QTX_CTL_PFVF_Q_SHIFT) == I40E_QTX_CTL_VF_QUEUE) {
5360 vf_id = (u16)((qtx_ctl & I40E_QTX_CTL_VFVM_INDX_MASK)
5361 >> I40E_QTX_CTL_VFVM_INDX_SHIFT);
5362 vf_id -= hw->func_caps.vf_base_id;
5363 vf = &pf->vf[vf_id];
5364 i40e_vc_notify_vf_reset(vf);
5365 /* Allow VF to process pending reset notification */
5366 msleep(20);
5367 i40e_reset_vf(vf, false);
5368 }
5369 }
5370
5371 /**
5372 * i40e_service_event_complete - Finish up the service event
5373 * @pf: board private structure
5374 **/
5375 static void i40e_service_event_complete(struct i40e_pf *pf)
5376 {
5377 BUG_ON(!test_bit(__I40E_SERVICE_SCHED, &pf->state));
5378
5379 /* flush memory to make sure state is correct before next watchog */
5380 smp_mb__before_atomic();
5381 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
5382 }
5383
5384 /**
5385 * i40e_get_cur_guaranteed_fd_count - Get the consumed guaranteed FD filters
5386 * @pf: board private structure
5387 **/
5388 u32 i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf)
5389 {
5390 u32 val, fcnt_prog;
5391
5392 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
5393 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK);
5394 return fcnt_prog;
5395 }
5396
5397 /**
5398 * i40e_get_current_fd_count - Get total FD filters programmed for this PF
5399 * @pf: board private structure
5400 **/
5401 u32 i40e_get_current_fd_count(struct i40e_pf *pf)
5402 {
5403 u32 val, fcnt_prog;
5404
5405 val = rd32(&pf->hw, I40E_PFQF_FDSTAT);
5406 fcnt_prog = (val & I40E_PFQF_FDSTAT_GUARANT_CNT_MASK) +
5407 ((val & I40E_PFQF_FDSTAT_BEST_CNT_MASK) >>
5408 I40E_PFQF_FDSTAT_BEST_CNT_SHIFT);
5409 return fcnt_prog;
5410 }
5411
5412 /**
5413 * i40e_get_global_fd_count - Get total FD filters programmed on device
5414 * @pf: board private structure
5415 **/
5416 u32 i40e_get_global_fd_count(struct i40e_pf *pf)
5417 {
5418 u32 val, fcnt_prog;
5419
5420 val = rd32(&pf->hw, I40E_GLQF_FDCNT_0);
5421 fcnt_prog = (val & I40E_GLQF_FDCNT_0_GUARANT_CNT_MASK) +
5422 ((val & I40E_GLQF_FDCNT_0_BESTCNT_MASK) >>
5423 I40E_GLQF_FDCNT_0_BESTCNT_SHIFT);
5424 return fcnt_prog;
5425 }
5426
5427 /**
5428 * i40e_fdir_check_and_reenable - Function to reenabe FD ATR or SB if disabled
5429 * @pf: board private structure
5430 **/
5431 void i40e_fdir_check_and_reenable(struct i40e_pf *pf)
5432 {
5433 u32 fcnt_prog, fcnt_avail;
5434
5435 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
5436 return;
5437
5438 /* Check if, FD SB or ATR was auto disabled and if there is enough room
5439 * to re-enable
5440 */
5441 fcnt_prog = i40e_get_global_fd_count(pf);
5442 fcnt_avail = pf->fdir_pf_filter_count;
5443 if ((fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM)) ||
5444 (pf->fd_add_err == 0) ||
5445 (i40e_get_current_atr_cnt(pf) < pf->fd_atr_cnt)) {
5446 if ((pf->flags & I40E_FLAG_FD_SB_ENABLED) &&
5447 (pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED)) {
5448 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
5449 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5450 dev_info(&pf->pdev->dev, "FD Sideband/ntuple is being enabled since we have space in the table now\n");
5451 }
5452 }
5453 /* Wait for some more space to be available to turn on ATR */
5454 if (fcnt_prog < (fcnt_avail - I40E_FDIR_BUFFER_HEAD_ROOM * 2)) {
5455 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
5456 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED)) {
5457 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5458 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5459 dev_info(&pf->pdev->dev, "ATR is being enabled since we have space in the table now\n");
5460 }
5461 }
5462 }
5463
5464 #define I40E_MIN_FD_FLUSH_INTERVAL 10
5465 #define I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE 30
5466 /**
5467 * i40e_fdir_flush_and_replay - Function to flush all FD filters and replay SB
5468 * @pf: board private structure
5469 **/
5470 static void i40e_fdir_flush_and_replay(struct i40e_pf *pf)
5471 {
5472 unsigned long min_flush_time;
5473 int flush_wait_retry = 50;
5474 bool disable_atr = false;
5475 int fd_room;
5476 int reg;
5477
5478 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED)))
5479 return;
5480
5481 if (time_after(jiffies, pf->fd_flush_timestamp +
5482 (I40E_MIN_FD_FLUSH_INTERVAL * HZ))) {
5483 /* If the flush is happening too quick and we have mostly
5484 * SB rules we should not re-enable ATR for some time.
5485 */
5486 min_flush_time = pf->fd_flush_timestamp
5487 + (I40E_MIN_FD_FLUSH_SB_ATR_UNSTABLE * HZ);
5488 fd_room = pf->fdir_pf_filter_count - pf->fdir_pf_active_filters;
5489
5490 if (!(time_after(jiffies, min_flush_time)) &&
5491 (fd_room < I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR)) {
5492 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5493 dev_info(&pf->pdev->dev, "ATR disabled, not enough FD filter space.\n");
5494 disable_atr = true;
5495 }
5496
5497 pf->fd_flush_timestamp = jiffies;
5498 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED;
5499 /* flush all filters */
5500 wr32(&pf->hw, I40E_PFQF_CTL_1,
5501 I40E_PFQF_CTL_1_CLEARFDTABLE_MASK);
5502 i40e_flush(&pf->hw);
5503 pf->fd_flush_cnt++;
5504 pf->fd_add_err = 0;
5505 do {
5506 /* Check FD flush status every 5-6msec */
5507 usleep_range(5000, 6000);
5508 reg = rd32(&pf->hw, I40E_PFQF_CTL_1);
5509 if (!(reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK))
5510 break;
5511 } while (flush_wait_retry--);
5512 if (reg & I40E_PFQF_CTL_1_CLEARFDTABLE_MASK) {
5513 dev_warn(&pf->pdev->dev, "FD table did not flush, needs more time\n");
5514 } else {
5515 /* replay sideband filters */
5516 i40e_fdir_filter_restore(pf->vsi[pf->lan_vsi]);
5517 if (!disable_atr)
5518 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
5519 clear_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state);
5520 if (I40E_DEBUG_FD & pf->hw.debug_mask)
5521 dev_info(&pf->pdev->dev, "FD Filter table flushed and FD-SB replayed.\n");
5522 }
5523 }
5524 }
5525
5526 /**
5527 * i40e_get_current_atr_count - Get the count of total FD ATR filters programmed
5528 * @pf: board private structure
5529 **/
5530 u32 i40e_get_current_atr_cnt(struct i40e_pf *pf)
5531 {
5532 return i40e_get_current_fd_count(pf) - pf->fdir_pf_active_filters;
5533 }
5534
5535 /* We can see up to 256 filter programming desc in transit if the filters are
5536 * being applied really fast; before we see the first
5537 * filter miss error on Rx queue 0. Accumulating enough error messages before
5538 * reacting will make sure we don't cause flush too often.
5539 */
5540 #define I40E_MAX_FD_PROGRAM_ERROR 256
5541
5542 /**
5543 * i40e_fdir_reinit_subtask - Worker thread to reinit FDIR filter table
5544 * @pf: board private structure
5545 **/
5546 static void i40e_fdir_reinit_subtask(struct i40e_pf *pf)
5547 {
5548
5549 /* if interface is down do nothing */
5550 if (test_bit(__I40E_DOWN, &pf->state))
5551 return;
5552
5553 if (!(pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED)))
5554 return;
5555
5556 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
5557 i40e_fdir_flush_and_replay(pf);
5558
5559 i40e_fdir_check_and_reenable(pf);
5560
5561 }
5562
5563 /**
5564 * i40e_vsi_link_event - notify VSI of a link event
5565 * @vsi: vsi to be notified
5566 * @link_up: link up or down
5567 **/
5568 static void i40e_vsi_link_event(struct i40e_vsi *vsi, bool link_up)
5569 {
5570 if (!vsi || test_bit(__I40E_DOWN, &vsi->state))
5571 return;
5572
5573 switch (vsi->type) {
5574 case I40E_VSI_MAIN:
5575 #ifdef I40E_FCOE
5576 case I40E_VSI_FCOE:
5577 #endif
5578 if (!vsi->netdev || !vsi->netdev_registered)
5579 break;
5580
5581 if (link_up) {
5582 netif_carrier_on(vsi->netdev);
5583 netif_tx_wake_all_queues(vsi->netdev);
5584 } else {
5585 netif_carrier_off(vsi->netdev);
5586 netif_tx_stop_all_queues(vsi->netdev);
5587 }
5588 break;
5589
5590 case I40E_VSI_SRIOV:
5591 case I40E_VSI_VMDQ2:
5592 case I40E_VSI_CTRL:
5593 case I40E_VSI_MIRROR:
5594 default:
5595 /* there is no notification for other VSIs */
5596 break;
5597 }
5598 }
5599
5600 /**
5601 * i40e_veb_link_event - notify elements on the veb of a link event
5602 * @veb: veb to be notified
5603 * @link_up: link up or down
5604 **/
5605 static void i40e_veb_link_event(struct i40e_veb *veb, bool link_up)
5606 {
5607 struct i40e_pf *pf;
5608 int i;
5609
5610 if (!veb || !veb->pf)
5611 return;
5612 pf = veb->pf;
5613
5614 /* depth first... */
5615 for (i = 0; i < I40E_MAX_VEB; i++)
5616 if (pf->veb[i] && (pf->veb[i]->uplink_seid == veb->seid))
5617 i40e_veb_link_event(pf->veb[i], link_up);
5618
5619 /* ... now the local VSIs */
5620 for (i = 0; i < pf->num_alloc_vsi; i++)
5621 if (pf->vsi[i] && (pf->vsi[i]->uplink_seid == veb->seid))
5622 i40e_vsi_link_event(pf->vsi[i], link_up);
5623 }
5624
5625 /**
5626 * i40e_link_event - Update netif_carrier status
5627 * @pf: board private structure
5628 **/
5629 static void i40e_link_event(struct i40e_pf *pf)
5630 {
5631 bool new_link, old_link;
5632 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
5633 u8 new_link_speed, old_link_speed;
5634
5635 /* set this to force the get_link_status call to refresh state */
5636 pf->hw.phy.get_link_info = true;
5637
5638 old_link = (pf->hw.phy.link_info_old.link_info & I40E_AQ_LINK_UP);
5639 new_link = i40e_get_link_status(&pf->hw);
5640 old_link_speed = pf->hw.phy.link_info_old.link_speed;
5641 new_link_speed = pf->hw.phy.link_info.link_speed;
5642
5643 if (new_link == old_link &&
5644 new_link_speed == old_link_speed &&
5645 (test_bit(__I40E_DOWN, &vsi->state) ||
5646 new_link == netif_carrier_ok(vsi->netdev)))
5647 return;
5648
5649 if (!test_bit(__I40E_DOWN, &vsi->state))
5650 i40e_print_link_message(vsi, new_link);
5651
5652 /* Notify the base of the switch tree connected to
5653 * the link. Floating VEBs are not notified.
5654 */
5655 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
5656 i40e_veb_link_event(pf->veb[pf->lan_veb], new_link);
5657 else
5658 i40e_vsi_link_event(vsi, new_link);
5659
5660 if (pf->vf)
5661 i40e_vc_notify_link_state(pf);
5662
5663 if (pf->flags & I40E_FLAG_PTP)
5664 i40e_ptp_set_increment(pf);
5665 }
5666
5667 /**
5668 * i40e_check_hang_subtask - Check for hung queues and dropped interrupts
5669 * @pf: board private structure
5670 *
5671 * Set the per-queue flags to request a check for stuck queues in the irq
5672 * clean functions, then force interrupts to be sure the irq clean is called.
5673 **/
5674 static void i40e_check_hang_subtask(struct i40e_pf *pf)
5675 {
5676 int i, v;
5677
5678 /* If we're down or resetting, just bail */
5679 if (test_bit(__I40E_DOWN, &pf->state) ||
5680 test_bit(__I40E_CONFIG_BUSY, &pf->state))
5681 return;
5682
5683 /* for each VSI/netdev
5684 * for each Tx queue
5685 * set the check flag
5686 * for each q_vector
5687 * force an interrupt
5688 */
5689 for (v = 0; v < pf->num_alloc_vsi; v++) {
5690 struct i40e_vsi *vsi = pf->vsi[v];
5691 int armed = 0;
5692
5693 if (!pf->vsi[v] ||
5694 test_bit(__I40E_DOWN, &vsi->state) ||
5695 (vsi->netdev && !netif_carrier_ok(vsi->netdev)))
5696 continue;
5697
5698 for (i = 0; i < vsi->num_queue_pairs; i++) {
5699 set_check_for_tx_hang(vsi->tx_rings[i]);
5700 if (test_bit(__I40E_HANG_CHECK_ARMED,
5701 &vsi->tx_rings[i]->state))
5702 armed++;
5703 }
5704
5705 if (armed) {
5706 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED)) {
5707 wr32(&vsi->back->hw, I40E_PFINT_DYN_CTL0,
5708 (I40E_PFINT_DYN_CTL0_INTENA_MASK |
5709 I40E_PFINT_DYN_CTL0_SWINT_TRIG_MASK |
5710 I40E_PFINT_DYN_CTL0_ITR_INDX_MASK |
5711 I40E_PFINT_DYN_CTL0_SW_ITR_INDX_ENA_MASK |
5712 I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK));
5713 } else {
5714 u16 vec = vsi->base_vector - 1;
5715 u32 val = (I40E_PFINT_DYN_CTLN_INTENA_MASK |
5716 I40E_PFINT_DYN_CTLN_SWINT_TRIG_MASK |
5717 I40E_PFINT_DYN_CTLN_ITR_INDX_MASK |
5718 I40E_PFINT_DYN_CTLN_SW_ITR_INDX_ENA_MASK |
5719 I40E_PFINT_DYN_CTLN_SW_ITR_INDX_MASK);
5720 for (i = 0; i < vsi->num_q_vectors; i++, vec++)
5721 wr32(&vsi->back->hw,
5722 I40E_PFINT_DYN_CTLN(vec), val);
5723 }
5724 i40e_flush(&vsi->back->hw);
5725 }
5726 }
5727 }
5728
5729 /**
5730 * i40e_watchdog_subtask - periodic checks not using event driven response
5731 * @pf: board private structure
5732 **/
5733 static void i40e_watchdog_subtask(struct i40e_pf *pf)
5734 {
5735 int i;
5736
5737 /* if interface is down do nothing */
5738 if (test_bit(__I40E_DOWN, &pf->state) ||
5739 test_bit(__I40E_CONFIG_BUSY, &pf->state))
5740 return;
5741
5742 /* make sure we don't do these things too often */
5743 if (time_before(jiffies, (pf->service_timer_previous +
5744 pf->service_timer_period)))
5745 return;
5746 pf->service_timer_previous = jiffies;
5747
5748 i40e_check_hang_subtask(pf);
5749 i40e_link_event(pf);
5750
5751 /* Update the stats for active netdevs so the network stack
5752 * can look at updated numbers whenever it cares to
5753 */
5754 for (i = 0; i < pf->num_alloc_vsi; i++)
5755 if (pf->vsi[i] && pf->vsi[i]->netdev)
5756 i40e_update_stats(pf->vsi[i]);
5757
5758 /* Update the stats for the active switching components */
5759 for (i = 0; i < I40E_MAX_VEB; i++)
5760 if (pf->veb[i])
5761 i40e_update_veb_stats(pf->veb[i]);
5762
5763 i40e_ptp_rx_hang(pf->vsi[pf->lan_vsi]);
5764 }
5765
5766 /**
5767 * i40e_reset_subtask - Set up for resetting the device and driver
5768 * @pf: board private structure
5769 **/
5770 static void i40e_reset_subtask(struct i40e_pf *pf)
5771 {
5772 u32 reset_flags = 0;
5773
5774 rtnl_lock();
5775 if (test_bit(__I40E_REINIT_REQUESTED, &pf->state)) {
5776 reset_flags |= (1 << __I40E_REINIT_REQUESTED);
5777 clear_bit(__I40E_REINIT_REQUESTED, &pf->state);
5778 }
5779 if (test_bit(__I40E_PF_RESET_REQUESTED, &pf->state)) {
5780 reset_flags |= (1 << __I40E_PF_RESET_REQUESTED);
5781 clear_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
5782 }
5783 if (test_bit(__I40E_CORE_RESET_REQUESTED, &pf->state)) {
5784 reset_flags |= (1 << __I40E_CORE_RESET_REQUESTED);
5785 clear_bit(__I40E_CORE_RESET_REQUESTED, &pf->state);
5786 }
5787 if (test_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state)) {
5788 reset_flags |= (1 << __I40E_GLOBAL_RESET_REQUESTED);
5789 clear_bit(__I40E_GLOBAL_RESET_REQUESTED, &pf->state);
5790 }
5791 if (test_bit(__I40E_DOWN_REQUESTED, &pf->state)) {
5792 reset_flags |= (1 << __I40E_DOWN_REQUESTED);
5793 clear_bit(__I40E_DOWN_REQUESTED, &pf->state);
5794 }
5795
5796 /* If there's a recovery already waiting, it takes
5797 * precedence before starting a new reset sequence.
5798 */
5799 if (test_bit(__I40E_RESET_INTR_RECEIVED, &pf->state)) {
5800 i40e_handle_reset_warning(pf);
5801 goto unlock;
5802 }
5803
5804 /* If we're already down or resetting, just bail */
5805 if (reset_flags &&
5806 !test_bit(__I40E_DOWN, &pf->state) &&
5807 !test_bit(__I40E_CONFIG_BUSY, &pf->state))
5808 i40e_do_reset(pf, reset_flags);
5809
5810 unlock:
5811 rtnl_unlock();
5812 }
5813
5814 /**
5815 * i40e_handle_link_event - Handle link event
5816 * @pf: board private structure
5817 * @e: event info posted on ARQ
5818 **/
5819 static void i40e_handle_link_event(struct i40e_pf *pf,
5820 struct i40e_arq_event_info *e)
5821 {
5822 struct i40e_hw *hw = &pf->hw;
5823 struct i40e_aqc_get_link_status *status =
5824 (struct i40e_aqc_get_link_status *)&e->desc.params.raw;
5825
5826 /* save off old link status information */
5827 hw->phy.link_info_old = hw->phy.link_info;
5828
5829 /* Do a new status request to re-enable LSE reporting
5830 * and load new status information into the hw struct
5831 * This completely ignores any state information
5832 * in the ARQ event info, instead choosing to always
5833 * issue the AQ update link status command.
5834 */
5835 i40e_link_event(pf);
5836
5837 /* check for unqualified module, if link is down */
5838 if ((status->link_info & I40E_AQ_MEDIA_AVAILABLE) &&
5839 (!(status->an_info & I40E_AQ_QUALIFIED_MODULE)) &&
5840 (!(status->link_info & I40E_AQ_LINK_UP)))
5841 dev_err(&pf->pdev->dev,
5842 "The driver failed to link because an unqualified module was detected.\n");
5843 }
5844
5845 /**
5846 * i40e_clean_adminq_subtask - Clean the AdminQ rings
5847 * @pf: board private structure
5848 **/
5849 static void i40e_clean_adminq_subtask(struct i40e_pf *pf)
5850 {
5851 struct i40e_arq_event_info event;
5852 struct i40e_hw *hw = &pf->hw;
5853 u16 pending, i = 0;
5854 i40e_status ret;
5855 u16 opcode;
5856 u32 oldval;
5857 u32 val;
5858
5859 /* Do not run clean AQ when PF reset fails */
5860 if (test_bit(__I40E_RESET_FAILED, &pf->state))
5861 return;
5862
5863 /* check for error indications */
5864 val = rd32(&pf->hw, pf->hw.aq.arq.len);
5865 oldval = val;
5866 if (val & I40E_PF_ARQLEN_ARQVFE_MASK) {
5867 dev_info(&pf->pdev->dev, "ARQ VF Error detected\n");
5868 val &= ~I40E_PF_ARQLEN_ARQVFE_MASK;
5869 }
5870 if (val & I40E_PF_ARQLEN_ARQOVFL_MASK) {
5871 dev_info(&pf->pdev->dev, "ARQ Overflow Error detected\n");
5872 val &= ~I40E_PF_ARQLEN_ARQOVFL_MASK;
5873 }
5874 if (val & I40E_PF_ARQLEN_ARQCRIT_MASK) {
5875 dev_info(&pf->pdev->dev, "ARQ Critical Error detected\n");
5876 val &= ~I40E_PF_ARQLEN_ARQCRIT_MASK;
5877 }
5878 if (oldval != val)
5879 wr32(&pf->hw, pf->hw.aq.arq.len, val);
5880
5881 val = rd32(&pf->hw, pf->hw.aq.asq.len);
5882 oldval = val;
5883 if (val & I40E_PF_ATQLEN_ATQVFE_MASK) {
5884 dev_info(&pf->pdev->dev, "ASQ VF Error detected\n");
5885 val &= ~I40E_PF_ATQLEN_ATQVFE_MASK;
5886 }
5887 if (val & I40E_PF_ATQLEN_ATQOVFL_MASK) {
5888 dev_info(&pf->pdev->dev, "ASQ Overflow Error detected\n");
5889 val &= ~I40E_PF_ATQLEN_ATQOVFL_MASK;
5890 }
5891 if (val & I40E_PF_ATQLEN_ATQCRIT_MASK) {
5892 dev_info(&pf->pdev->dev, "ASQ Critical Error detected\n");
5893 val &= ~I40E_PF_ATQLEN_ATQCRIT_MASK;
5894 }
5895 if (oldval != val)
5896 wr32(&pf->hw, pf->hw.aq.asq.len, val);
5897
5898 event.buf_len = I40E_MAX_AQ_BUF_SIZE;
5899 event.msg_buf = kzalloc(event.buf_len, GFP_KERNEL);
5900 if (!event.msg_buf)
5901 return;
5902
5903 do {
5904 ret = i40e_clean_arq_element(hw, &event, &pending);
5905 if (ret == I40E_ERR_ADMIN_QUEUE_NO_WORK)
5906 break;
5907 else if (ret) {
5908 dev_info(&pf->pdev->dev, "ARQ event error %d\n", ret);
5909 break;
5910 }
5911
5912 opcode = le16_to_cpu(event.desc.opcode);
5913 switch (opcode) {
5914
5915 case i40e_aqc_opc_get_link_status:
5916 i40e_handle_link_event(pf, &event);
5917 break;
5918 case i40e_aqc_opc_send_msg_to_pf:
5919 ret = i40e_vc_process_vf_msg(pf,
5920 le16_to_cpu(event.desc.retval),
5921 le32_to_cpu(event.desc.cookie_high),
5922 le32_to_cpu(event.desc.cookie_low),
5923 event.msg_buf,
5924 event.msg_len);
5925 break;
5926 case i40e_aqc_opc_lldp_update_mib:
5927 dev_dbg(&pf->pdev->dev, "ARQ: Update LLDP MIB event received\n");
5928 #ifdef CONFIG_I40E_DCB
5929 rtnl_lock();
5930 ret = i40e_handle_lldp_event(pf, &event);
5931 rtnl_unlock();
5932 #endif /* CONFIG_I40E_DCB */
5933 break;
5934 case i40e_aqc_opc_event_lan_overflow:
5935 dev_dbg(&pf->pdev->dev, "ARQ LAN queue overflow event received\n");
5936 i40e_handle_lan_overflow_event(pf, &event);
5937 break;
5938 case i40e_aqc_opc_send_msg_to_peer:
5939 dev_info(&pf->pdev->dev, "ARQ: Msg from other pf\n");
5940 break;
5941 case i40e_aqc_opc_nvm_erase:
5942 case i40e_aqc_opc_nvm_update:
5943 i40e_debug(&pf->hw, I40E_DEBUG_NVM, "ARQ NVM operation completed\n");
5944 break;
5945 default:
5946 dev_info(&pf->pdev->dev,
5947 "ARQ Error: Unknown event 0x%04x received\n",
5948 opcode);
5949 break;
5950 }
5951 } while (pending && (i++ < pf->adminq_work_limit));
5952
5953 clear_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state);
5954 /* re-enable Admin queue interrupt cause */
5955 val = rd32(hw, I40E_PFINT_ICR0_ENA);
5956 val |= I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
5957 wr32(hw, I40E_PFINT_ICR0_ENA, val);
5958 i40e_flush(hw);
5959
5960 kfree(event.msg_buf);
5961 }
5962
5963 /**
5964 * i40e_verify_eeprom - make sure eeprom is good to use
5965 * @pf: board private structure
5966 **/
5967 static void i40e_verify_eeprom(struct i40e_pf *pf)
5968 {
5969 int err;
5970
5971 err = i40e_diag_eeprom_test(&pf->hw);
5972 if (err) {
5973 /* retry in case of garbage read */
5974 err = i40e_diag_eeprom_test(&pf->hw);
5975 if (err) {
5976 dev_info(&pf->pdev->dev, "eeprom check failed (%d), Tx/Rx traffic disabled\n",
5977 err);
5978 set_bit(__I40E_BAD_EEPROM, &pf->state);
5979 }
5980 }
5981
5982 if (!err && test_bit(__I40E_BAD_EEPROM, &pf->state)) {
5983 dev_info(&pf->pdev->dev, "eeprom check passed, Tx/Rx traffic enabled\n");
5984 clear_bit(__I40E_BAD_EEPROM, &pf->state);
5985 }
5986 }
5987
5988 /**
5989 * i40e_enable_pf_switch_lb
5990 * @pf: pointer to the PF structure
5991 *
5992 * enable switch loop back or die - no point in a return value
5993 **/
5994 static void i40e_enable_pf_switch_lb(struct i40e_pf *pf)
5995 {
5996 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
5997 struct i40e_vsi_context ctxt;
5998 int aq_ret;
5999
6000 ctxt.seid = pf->main_vsi_seid;
6001 ctxt.pf_num = pf->hw.pf_id;
6002 ctxt.vf_num = 0;
6003 aq_ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
6004 if (aq_ret) {
6005 dev_info(&pf->pdev->dev,
6006 "%s couldn't get PF vsi config, err %d, aq_err %d\n",
6007 __func__, aq_ret, pf->hw.aq.asq_last_status);
6008 return;
6009 }
6010 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6011 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6012 ctxt.info.switch_id |= cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6013
6014 aq_ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
6015 if (aq_ret) {
6016 dev_info(&pf->pdev->dev,
6017 "%s: update vsi switch failed, aq_err=%d\n",
6018 __func__, vsi->back->hw.aq.asq_last_status);
6019 }
6020 }
6021
6022 /**
6023 * i40e_disable_pf_switch_lb
6024 * @pf: pointer to the PF structure
6025 *
6026 * disable switch loop back or die - no point in a return value
6027 **/
6028 static void i40e_disable_pf_switch_lb(struct i40e_pf *pf)
6029 {
6030 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
6031 struct i40e_vsi_context ctxt;
6032 int aq_ret;
6033
6034 ctxt.seid = pf->main_vsi_seid;
6035 ctxt.pf_num = pf->hw.pf_id;
6036 ctxt.vf_num = 0;
6037 aq_ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
6038 if (aq_ret) {
6039 dev_info(&pf->pdev->dev,
6040 "%s couldn't get PF vsi config, err %d, aq_err %d\n",
6041 __func__, aq_ret, pf->hw.aq.asq_last_status);
6042 return;
6043 }
6044 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
6045 ctxt.info.valid_sections = cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
6046 ctxt.info.switch_id &= ~cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
6047
6048 aq_ret = i40e_aq_update_vsi_params(&vsi->back->hw, &ctxt, NULL);
6049 if (aq_ret) {
6050 dev_info(&pf->pdev->dev,
6051 "%s: update vsi switch failed, aq_err=%d\n",
6052 __func__, vsi->back->hw.aq.asq_last_status);
6053 }
6054 }
6055
6056 /**
6057 * i40e_config_bridge_mode - Configure the HW bridge mode
6058 * @veb: pointer to the bridge instance
6059 *
6060 * Configure the loop back mode for the LAN VSI that is downlink to the
6061 * specified HW bridge instance. It is expected this function is called
6062 * when a new HW bridge is instantiated.
6063 **/
6064 static void i40e_config_bridge_mode(struct i40e_veb *veb)
6065 {
6066 struct i40e_pf *pf = veb->pf;
6067
6068 dev_info(&pf->pdev->dev, "enabling bridge mode: %s\n",
6069 veb->bridge_mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
6070 if (veb->bridge_mode & BRIDGE_MODE_VEPA)
6071 i40e_disable_pf_switch_lb(pf);
6072 else
6073 i40e_enable_pf_switch_lb(pf);
6074 }
6075
6076 /**
6077 * i40e_reconstitute_veb - rebuild the VEB and anything connected to it
6078 * @veb: pointer to the VEB instance
6079 *
6080 * This is a recursive function that first builds the attached VSIs then
6081 * recurses in to build the next layer of VEB. We track the connections
6082 * through our own index numbers because the seid's from the HW could
6083 * change across the reset.
6084 **/
6085 static int i40e_reconstitute_veb(struct i40e_veb *veb)
6086 {
6087 struct i40e_vsi *ctl_vsi = NULL;
6088 struct i40e_pf *pf = veb->pf;
6089 int v, veb_idx;
6090 int ret;
6091
6092 /* build VSI that owns this VEB, temporarily attached to base VEB */
6093 for (v = 0; v < pf->num_alloc_vsi && !ctl_vsi; v++) {
6094 if (pf->vsi[v] &&
6095 pf->vsi[v]->veb_idx == veb->idx &&
6096 pf->vsi[v]->flags & I40E_VSI_FLAG_VEB_OWNER) {
6097 ctl_vsi = pf->vsi[v];
6098 break;
6099 }
6100 }
6101 if (!ctl_vsi) {
6102 dev_info(&pf->pdev->dev,
6103 "missing owner VSI for veb_idx %d\n", veb->idx);
6104 ret = -ENOENT;
6105 goto end_reconstitute;
6106 }
6107 if (ctl_vsi != pf->vsi[pf->lan_vsi])
6108 ctl_vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
6109 ret = i40e_add_vsi(ctl_vsi);
6110 if (ret) {
6111 dev_info(&pf->pdev->dev,
6112 "rebuild of owner VSI failed: %d\n", ret);
6113 goto end_reconstitute;
6114 }
6115 i40e_vsi_reset_stats(ctl_vsi);
6116
6117 /* create the VEB in the switch and move the VSI onto the VEB */
6118 ret = i40e_add_veb(veb, ctl_vsi);
6119 if (ret)
6120 goto end_reconstitute;
6121
6122 if (pf->flags & I40E_FLAG_VEB_MODE_ENABLED)
6123 veb->bridge_mode = BRIDGE_MODE_VEB;
6124 else
6125 veb->bridge_mode = BRIDGE_MODE_VEPA;
6126 i40e_config_bridge_mode(veb);
6127
6128 /* create the remaining VSIs attached to this VEB */
6129 for (v = 0; v < pf->num_alloc_vsi; v++) {
6130 if (!pf->vsi[v] || pf->vsi[v] == ctl_vsi)
6131 continue;
6132
6133 if (pf->vsi[v]->veb_idx == veb->idx) {
6134 struct i40e_vsi *vsi = pf->vsi[v];
6135 vsi->uplink_seid = veb->seid;
6136 ret = i40e_add_vsi(vsi);
6137 if (ret) {
6138 dev_info(&pf->pdev->dev,
6139 "rebuild of vsi_idx %d failed: %d\n",
6140 v, ret);
6141 goto end_reconstitute;
6142 }
6143 i40e_vsi_reset_stats(vsi);
6144 }
6145 }
6146
6147 /* create any VEBs attached to this VEB - RECURSION */
6148 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
6149 if (pf->veb[veb_idx] && pf->veb[veb_idx]->veb_idx == veb->idx) {
6150 pf->veb[veb_idx]->uplink_seid = veb->seid;
6151 ret = i40e_reconstitute_veb(pf->veb[veb_idx]);
6152 if (ret)
6153 break;
6154 }
6155 }
6156
6157 end_reconstitute:
6158 return ret;
6159 }
6160
6161 /**
6162 * i40e_get_capabilities - get info about the HW
6163 * @pf: the PF struct
6164 **/
6165 static int i40e_get_capabilities(struct i40e_pf *pf)
6166 {
6167 struct i40e_aqc_list_capabilities_element_resp *cap_buf;
6168 u16 data_size;
6169 int buf_len;
6170 int err;
6171
6172 buf_len = 40 * sizeof(struct i40e_aqc_list_capabilities_element_resp);
6173 do {
6174 cap_buf = kzalloc(buf_len, GFP_KERNEL);
6175 if (!cap_buf)
6176 return -ENOMEM;
6177
6178 /* this loads the data into the hw struct for us */
6179 err = i40e_aq_discover_capabilities(&pf->hw, cap_buf, buf_len,
6180 &data_size,
6181 i40e_aqc_opc_list_func_capabilities,
6182 NULL);
6183 /* data loaded, buffer no longer needed */
6184 kfree(cap_buf);
6185
6186 if (pf->hw.aq.asq_last_status == I40E_AQ_RC_ENOMEM) {
6187 /* retry with a larger buffer */
6188 buf_len = data_size;
6189 } else if (pf->hw.aq.asq_last_status != I40E_AQ_RC_OK) {
6190 dev_info(&pf->pdev->dev,
6191 "capability discovery failed: aq=%d\n",
6192 pf->hw.aq.asq_last_status);
6193 return -ENODEV;
6194 }
6195 } while (err);
6196
6197 if (((pf->hw.aq.fw_maj_ver == 2) && (pf->hw.aq.fw_min_ver < 22)) ||
6198 (pf->hw.aq.fw_maj_ver < 2)) {
6199 pf->hw.func_caps.num_msix_vectors++;
6200 pf->hw.func_caps.num_msix_vectors_vf++;
6201 }
6202
6203 if (pf->hw.debug_mask & I40E_DEBUG_USER)
6204 dev_info(&pf->pdev->dev,
6205 "pf=%d, num_vfs=%d, msix_pf=%d, msix_vf=%d, fd_g=%d, fd_b=%d, pf_max_q=%d num_vsi=%d\n",
6206 pf->hw.pf_id, pf->hw.func_caps.num_vfs,
6207 pf->hw.func_caps.num_msix_vectors,
6208 pf->hw.func_caps.num_msix_vectors_vf,
6209 pf->hw.func_caps.fd_filters_guaranteed,
6210 pf->hw.func_caps.fd_filters_best_effort,
6211 pf->hw.func_caps.num_tx_qp,
6212 pf->hw.func_caps.num_vsis);
6213
6214 #define DEF_NUM_VSI (1 + (pf->hw.func_caps.fcoe ? 1 : 0) \
6215 + pf->hw.func_caps.num_vfs)
6216 if (pf->hw.revision_id == 0 && (DEF_NUM_VSI > pf->hw.func_caps.num_vsis)) {
6217 dev_info(&pf->pdev->dev,
6218 "got num_vsis %d, setting num_vsis to %d\n",
6219 pf->hw.func_caps.num_vsis, DEF_NUM_VSI);
6220 pf->hw.func_caps.num_vsis = DEF_NUM_VSI;
6221 }
6222
6223 return 0;
6224 }
6225
6226 static int i40e_vsi_clear(struct i40e_vsi *vsi);
6227
6228 /**
6229 * i40e_fdir_sb_setup - initialize the Flow Director resources for Sideband
6230 * @pf: board private structure
6231 **/
6232 static void i40e_fdir_sb_setup(struct i40e_pf *pf)
6233 {
6234 struct i40e_vsi *vsi;
6235 int i;
6236
6237 /* quick workaround for an NVM issue that leaves a critical register
6238 * uninitialized
6239 */
6240 if (!rd32(&pf->hw, I40E_GLQF_HKEY(0))) {
6241 static const u32 hkey[] = {
6242 0xe640d33f, 0xcdfe98ab, 0x73fa7161, 0x0d7a7d36,
6243 0xeacb7d61, 0xaa4f05b6, 0x9c5c89ed, 0xfc425ddb,
6244 0xa4654832, 0xfc7461d4, 0x8f827619, 0xf5c63c21,
6245 0x95b3a76d};
6246
6247 for (i = 0; i <= I40E_GLQF_HKEY_MAX_INDEX; i++)
6248 wr32(&pf->hw, I40E_GLQF_HKEY(i), hkey[i]);
6249 }
6250
6251 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
6252 return;
6253
6254 /* find existing VSI and see if it needs configuring */
6255 vsi = NULL;
6256 for (i = 0; i < pf->num_alloc_vsi; i++) {
6257 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
6258 vsi = pf->vsi[i];
6259 break;
6260 }
6261 }
6262
6263 /* create a new VSI if none exists */
6264 if (!vsi) {
6265 vsi = i40e_vsi_setup(pf, I40E_VSI_FDIR,
6266 pf->vsi[pf->lan_vsi]->seid, 0);
6267 if (!vsi) {
6268 dev_info(&pf->pdev->dev, "Couldn't create FDir VSI\n");
6269 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
6270 return;
6271 }
6272 }
6273
6274 i40e_vsi_setup_irqhandler(vsi, i40e_fdir_clean_ring);
6275 }
6276
6277 /**
6278 * i40e_fdir_teardown - release the Flow Director resources
6279 * @pf: board private structure
6280 **/
6281 static void i40e_fdir_teardown(struct i40e_pf *pf)
6282 {
6283 int i;
6284
6285 i40e_fdir_filter_exit(pf);
6286 for (i = 0; i < pf->num_alloc_vsi; i++) {
6287 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
6288 i40e_vsi_release(pf->vsi[i]);
6289 break;
6290 }
6291 }
6292 }
6293
6294 /**
6295 * i40e_prep_for_reset - prep for the core to reset
6296 * @pf: board private structure
6297 *
6298 * Close up the VFs and other things in prep for PF Reset.
6299 **/
6300 static void i40e_prep_for_reset(struct i40e_pf *pf)
6301 {
6302 struct i40e_hw *hw = &pf->hw;
6303 i40e_status ret = 0;
6304 u32 v;
6305
6306 clear_bit(__I40E_RESET_INTR_RECEIVED, &pf->state);
6307 if (test_and_set_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state))
6308 return;
6309
6310 dev_dbg(&pf->pdev->dev, "Tearing down internal switch for reset\n");
6311
6312 /* quiesce the VSIs and their queues that are not already DOWN */
6313 i40e_pf_quiesce_all_vsi(pf);
6314
6315 for (v = 0; v < pf->num_alloc_vsi; v++) {
6316 if (pf->vsi[v])
6317 pf->vsi[v]->seid = 0;
6318 }
6319
6320 i40e_shutdown_adminq(&pf->hw);
6321
6322 /* call shutdown HMC */
6323 if (hw->hmc.hmc_obj) {
6324 ret = i40e_shutdown_lan_hmc(hw);
6325 if (ret)
6326 dev_warn(&pf->pdev->dev,
6327 "shutdown_lan_hmc failed: %d\n", ret);
6328 }
6329 }
6330
6331 /**
6332 * i40e_send_version - update firmware with driver version
6333 * @pf: PF struct
6334 */
6335 static void i40e_send_version(struct i40e_pf *pf)
6336 {
6337 struct i40e_driver_version dv;
6338
6339 dv.major_version = DRV_VERSION_MAJOR;
6340 dv.minor_version = DRV_VERSION_MINOR;
6341 dv.build_version = DRV_VERSION_BUILD;
6342 dv.subbuild_version = 0;
6343 strlcpy(dv.driver_string, DRV_VERSION, sizeof(dv.driver_string));
6344 i40e_aq_send_driver_version(&pf->hw, &dv, NULL);
6345 }
6346
6347 /**
6348 * i40e_reset_and_rebuild - reset and rebuild using a saved config
6349 * @pf: board private structure
6350 * @reinit: if the Main VSI needs to re-initialized.
6351 **/
6352 static void i40e_reset_and_rebuild(struct i40e_pf *pf, bool reinit)
6353 {
6354 struct i40e_hw *hw = &pf->hw;
6355 u8 set_fc_aq_fail = 0;
6356 i40e_status ret;
6357 u32 v;
6358
6359 /* Now we wait for GRST to settle out.
6360 * We don't have to delete the VEBs or VSIs from the hw switch
6361 * because the reset will make them disappear.
6362 */
6363 ret = i40e_pf_reset(hw);
6364 if (ret) {
6365 dev_info(&pf->pdev->dev, "PF reset failed, %d\n", ret);
6366 set_bit(__I40E_RESET_FAILED, &pf->state);
6367 goto clear_recovery;
6368 }
6369 pf->pfr_count++;
6370
6371 if (test_bit(__I40E_DOWN, &pf->state))
6372 goto clear_recovery;
6373 dev_dbg(&pf->pdev->dev, "Rebuilding internal switch\n");
6374
6375 /* rebuild the basics for the AdminQ, HMC, and initial HW switch */
6376 ret = i40e_init_adminq(&pf->hw);
6377 if (ret) {
6378 dev_info(&pf->pdev->dev, "Rebuild AdminQ failed, %d\n", ret);
6379 goto clear_recovery;
6380 }
6381
6382 /* re-verify the eeprom if we just had an EMP reset */
6383 if (test_and_clear_bit(__I40E_EMP_RESET_INTR_RECEIVED, &pf->state))
6384 i40e_verify_eeprom(pf);
6385
6386 i40e_clear_pxe_mode(hw);
6387 ret = i40e_get_capabilities(pf);
6388 if (ret) {
6389 dev_info(&pf->pdev->dev, "i40e_get_capabilities failed, %d\n",
6390 ret);
6391 goto end_core_reset;
6392 }
6393
6394 ret = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
6395 hw->func_caps.num_rx_qp,
6396 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
6397 if (ret) {
6398 dev_info(&pf->pdev->dev, "init_lan_hmc failed: %d\n", ret);
6399 goto end_core_reset;
6400 }
6401 ret = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
6402 if (ret) {
6403 dev_info(&pf->pdev->dev, "configure_lan_hmc failed: %d\n", ret);
6404 goto end_core_reset;
6405 }
6406
6407 #ifdef CONFIG_I40E_DCB
6408 ret = i40e_init_pf_dcb(pf);
6409 if (ret) {
6410 dev_info(&pf->pdev->dev, "DCB init failed %d, disabled\n", ret);
6411 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
6412 /* Continue without DCB enabled */
6413 }
6414 #endif /* CONFIG_I40E_DCB */
6415 #ifdef I40E_FCOE
6416 ret = i40e_init_pf_fcoe(pf);
6417 if (ret)
6418 dev_info(&pf->pdev->dev, "init_pf_fcoe failed: %d\n", ret);
6419
6420 #endif
6421 /* do basic switch setup */
6422 ret = i40e_setup_pf_switch(pf, reinit);
6423 if (ret)
6424 goto end_core_reset;
6425
6426 /* driver is only interested in link up/down and module qualification
6427 * reports from firmware
6428 */
6429 ret = i40e_aq_set_phy_int_mask(&pf->hw,
6430 I40E_AQ_EVENT_LINK_UPDOWN |
6431 I40E_AQ_EVENT_MODULE_QUAL_FAIL, NULL);
6432 if (ret)
6433 dev_info(&pf->pdev->dev, "set phy mask fail, aq_err %d\n", ret);
6434
6435 /* make sure our flow control settings are restored */
6436 ret = i40e_set_fc(&pf->hw, &set_fc_aq_fail, true);
6437 if (ret)
6438 dev_info(&pf->pdev->dev, "set fc fail, aq_err %d\n", ret);
6439
6440 /* Rebuild the VSIs and VEBs that existed before reset.
6441 * They are still in our local switch element arrays, so only
6442 * need to rebuild the switch model in the HW.
6443 *
6444 * If there were VEBs but the reconstitution failed, we'll try
6445 * try to recover minimal use by getting the basic PF VSI working.
6446 */
6447 if (pf->vsi[pf->lan_vsi]->uplink_seid != pf->mac_seid) {
6448 dev_dbg(&pf->pdev->dev, "attempting to rebuild switch\n");
6449 /* find the one VEB connected to the MAC, and find orphans */
6450 for (v = 0; v < I40E_MAX_VEB; v++) {
6451 if (!pf->veb[v])
6452 continue;
6453
6454 if (pf->veb[v]->uplink_seid == pf->mac_seid ||
6455 pf->veb[v]->uplink_seid == 0) {
6456 ret = i40e_reconstitute_veb(pf->veb[v]);
6457
6458 if (!ret)
6459 continue;
6460
6461 /* If Main VEB failed, we're in deep doodoo,
6462 * so give up rebuilding the switch and set up
6463 * for minimal rebuild of PF VSI.
6464 * If orphan failed, we'll report the error
6465 * but try to keep going.
6466 */
6467 if (pf->veb[v]->uplink_seid == pf->mac_seid) {
6468 dev_info(&pf->pdev->dev,
6469 "rebuild of switch failed: %d, will try to set up simple PF connection\n",
6470 ret);
6471 pf->vsi[pf->lan_vsi]->uplink_seid
6472 = pf->mac_seid;
6473 break;
6474 } else if (pf->veb[v]->uplink_seid == 0) {
6475 dev_info(&pf->pdev->dev,
6476 "rebuild of orphan VEB failed: %d\n",
6477 ret);
6478 }
6479 }
6480 }
6481 }
6482
6483 if (pf->vsi[pf->lan_vsi]->uplink_seid == pf->mac_seid) {
6484 dev_dbg(&pf->pdev->dev, "attempting to rebuild PF VSI\n");
6485 /* no VEB, so rebuild only the Main VSI */
6486 ret = i40e_add_vsi(pf->vsi[pf->lan_vsi]);
6487 if (ret) {
6488 dev_info(&pf->pdev->dev,
6489 "rebuild of Main VSI failed: %d\n", ret);
6490 goto end_core_reset;
6491 }
6492 }
6493
6494 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
6495 (pf->hw.aq.fw_maj_ver < 4)) {
6496 msleep(75);
6497 ret = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
6498 if (ret)
6499 dev_info(&pf->pdev->dev, "link restart failed, aq_err=%d\n",
6500 pf->hw.aq.asq_last_status);
6501 }
6502 /* reinit the misc interrupt */
6503 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
6504 ret = i40e_setup_misc_vector(pf);
6505
6506 /* restart the VSIs that were rebuilt and running before the reset */
6507 i40e_pf_unquiesce_all_vsi(pf);
6508
6509 if (pf->num_alloc_vfs) {
6510 for (v = 0; v < pf->num_alloc_vfs; v++)
6511 i40e_reset_vf(&pf->vf[v], true);
6512 }
6513
6514 /* tell the firmware that we're starting */
6515 i40e_send_version(pf);
6516
6517 end_core_reset:
6518 clear_bit(__I40E_RESET_FAILED, &pf->state);
6519 clear_recovery:
6520 clear_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state);
6521 }
6522
6523 /**
6524 * i40e_handle_reset_warning - prep for the PF to reset, reset and rebuild
6525 * @pf: board private structure
6526 *
6527 * Close up the VFs and other things in prep for a Core Reset,
6528 * then get ready to rebuild the world.
6529 **/
6530 static void i40e_handle_reset_warning(struct i40e_pf *pf)
6531 {
6532 i40e_prep_for_reset(pf);
6533 i40e_reset_and_rebuild(pf, false);
6534 }
6535
6536 /**
6537 * i40e_handle_mdd_event
6538 * @pf: pointer to the PF structure
6539 *
6540 * Called from the MDD irq handler to identify possibly malicious vfs
6541 **/
6542 static void i40e_handle_mdd_event(struct i40e_pf *pf)
6543 {
6544 struct i40e_hw *hw = &pf->hw;
6545 bool mdd_detected = false;
6546 bool pf_mdd_detected = false;
6547 struct i40e_vf *vf;
6548 u32 reg;
6549 int i;
6550
6551 if (!test_bit(__I40E_MDD_EVENT_PENDING, &pf->state))
6552 return;
6553
6554 /* find what triggered the MDD event */
6555 reg = rd32(hw, I40E_GL_MDET_TX);
6556 if (reg & I40E_GL_MDET_TX_VALID_MASK) {
6557 u8 pf_num = (reg & I40E_GL_MDET_TX_PF_NUM_MASK) >>
6558 I40E_GL_MDET_TX_PF_NUM_SHIFT;
6559 u16 vf_num = (reg & I40E_GL_MDET_TX_VF_NUM_MASK) >>
6560 I40E_GL_MDET_TX_VF_NUM_SHIFT;
6561 u8 event = (reg & I40E_GL_MDET_TX_EVENT_MASK) >>
6562 I40E_GL_MDET_TX_EVENT_SHIFT;
6563 u16 queue = ((reg & I40E_GL_MDET_TX_QUEUE_MASK) >>
6564 I40E_GL_MDET_TX_QUEUE_SHIFT) -
6565 pf->hw.func_caps.base_queue;
6566 if (netif_msg_tx_err(pf))
6567 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on TX queue %d PF number 0x%02x VF number 0x%02x\n",
6568 event, queue, pf_num, vf_num);
6569 wr32(hw, I40E_GL_MDET_TX, 0xffffffff);
6570 mdd_detected = true;
6571 }
6572 reg = rd32(hw, I40E_GL_MDET_RX);
6573 if (reg & I40E_GL_MDET_RX_VALID_MASK) {
6574 u8 func = (reg & I40E_GL_MDET_RX_FUNCTION_MASK) >>
6575 I40E_GL_MDET_RX_FUNCTION_SHIFT;
6576 u8 event = (reg & I40E_GL_MDET_RX_EVENT_MASK) >>
6577 I40E_GL_MDET_RX_EVENT_SHIFT;
6578 u16 queue = ((reg & I40E_GL_MDET_RX_QUEUE_MASK) >>
6579 I40E_GL_MDET_RX_QUEUE_SHIFT) -
6580 pf->hw.func_caps.base_queue;
6581 if (netif_msg_rx_err(pf))
6582 dev_info(&pf->pdev->dev, "Malicious Driver Detection event 0x%02x on RX queue %d of function 0x%02x\n",
6583 event, queue, func);
6584 wr32(hw, I40E_GL_MDET_RX, 0xffffffff);
6585 mdd_detected = true;
6586 }
6587
6588 if (mdd_detected) {
6589 reg = rd32(hw, I40E_PF_MDET_TX);
6590 if (reg & I40E_PF_MDET_TX_VALID_MASK) {
6591 wr32(hw, I40E_PF_MDET_TX, 0xFFFF);
6592 dev_info(&pf->pdev->dev, "TX driver issue detected, PF reset issued\n");
6593 pf_mdd_detected = true;
6594 }
6595 reg = rd32(hw, I40E_PF_MDET_RX);
6596 if (reg & I40E_PF_MDET_RX_VALID_MASK) {
6597 wr32(hw, I40E_PF_MDET_RX, 0xFFFF);
6598 dev_info(&pf->pdev->dev, "RX driver issue detected, PF reset issued\n");
6599 pf_mdd_detected = true;
6600 }
6601 /* Queue belongs to the PF, initiate a reset */
6602 if (pf_mdd_detected) {
6603 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
6604 i40e_service_event_schedule(pf);
6605 }
6606 }
6607
6608 /* see if one of the VFs needs its hand slapped */
6609 for (i = 0; i < pf->num_alloc_vfs && mdd_detected; i++) {
6610 vf = &(pf->vf[i]);
6611 reg = rd32(hw, I40E_VP_MDET_TX(i));
6612 if (reg & I40E_VP_MDET_TX_VALID_MASK) {
6613 wr32(hw, I40E_VP_MDET_TX(i), 0xFFFF);
6614 vf->num_mdd_events++;
6615 dev_info(&pf->pdev->dev, "TX driver issue detected on VF %d\n",
6616 i);
6617 }
6618
6619 reg = rd32(hw, I40E_VP_MDET_RX(i));
6620 if (reg & I40E_VP_MDET_RX_VALID_MASK) {
6621 wr32(hw, I40E_VP_MDET_RX(i), 0xFFFF);
6622 vf->num_mdd_events++;
6623 dev_info(&pf->pdev->dev, "RX driver issue detected on VF %d\n",
6624 i);
6625 }
6626
6627 if (vf->num_mdd_events > I40E_DEFAULT_NUM_MDD_EVENTS_ALLOWED) {
6628 dev_info(&pf->pdev->dev,
6629 "Too many MDD events on VF %d, disabled\n", i);
6630 dev_info(&pf->pdev->dev,
6631 "Use PF Control I/F to re-enable the VF\n");
6632 set_bit(I40E_VF_STAT_DISABLED, &vf->vf_states);
6633 }
6634 }
6635
6636 /* re-enable mdd interrupt cause */
6637 clear_bit(__I40E_MDD_EVENT_PENDING, &pf->state);
6638 reg = rd32(hw, I40E_PFINT_ICR0_ENA);
6639 reg |= I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK;
6640 wr32(hw, I40E_PFINT_ICR0_ENA, reg);
6641 i40e_flush(hw);
6642 }
6643
6644 #ifdef CONFIG_I40E_VXLAN
6645 /**
6646 * i40e_sync_vxlan_filters_subtask - Sync the VSI filter list with HW
6647 * @pf: board private structure
6648 **/
6649 static void i40e_sync_vxlan_filters_subtask(struct i40e_pf *pf)
6650 {
6651 struct i40e_hw *hw = &pf->hw;
6652 i40e_status ret;
6653 __be16 port;
6654 int i;
6655
6656 if (!(pf->flags & I40E_FLAG_VXLAN_FILTER_SYNC))
6657 return;
6658
6659 pf->flags &= ~I40E_FLAG_VXLAN_FILTER_SYNC;
6660
6661 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
6662 if (pf->pending_vxlan_bitmap & (1 << i)) {
6663 pf->pending_vxlan_bitmap &= ~(1 << i);
6664 port = pf->vxlan_ports[i];
6665 if (port)
6666 ret = i40e_aq_add_udp_tunnel(hw, ntohs(port),
6667 I40E_AQC_TUNNEL_TYPE_VXLAN,
6668 NULL, NULL);
6669 else
6670 ret = i40e_aq_del_udp_tunnel(hw, i, NULL);
6671
6672 if (ret) {
6673 dev_info(&pf->pdev->dev,
6674 "%s vxlan port %d, index %d failed, err %d, aq_err %d\n",
6675 port ? "add" : "delete",
6676 ntohs(port), i, ret,
6677 pf->hw.aq.asq_last_status);
6678 pf->vxlan_ports[i] = 0;
6679 }
6680 }
6681 }
6682 }
6683
6684 #endif
6685 /**
6686 * i40e_service_task - Run the driver's async subtasks
6687 * @work: pointer to work_struct containing our data
6688 **/
6689 static void i40e_service_task(struct work_struct *work)
6690 {
6691 struct i40e_pf *pf = container_of(work,
6692 struct i40e_pf,
6693 service_task);
6694 unsigned long start_time = jiffies;
6695
6696 /* don't bother with service tasks if a reset is in progress */
6697 if (test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
6698 i40e_service_event_complete(pf);
6699 return;
6700 }
6701
6702 i40e_reset_subtask(pf);
6703 i40e_handle_mdd_event(pf);
6704 i40e_vc_process_vflr_event(pf);
6705 i40e_watchdog_subtask(pf);
6706 i40e_fdir_reinit_subtask(pf);
6707 i40e_sync_filters_subtask(pf);
6708 #ifdef CONFIG_I40E_VXLAN
6709 i40e_sync_vxlan_filters_subtask(pf);
6710 #endif
6711 i40e_clean_adminq_subtask(pf);
6712
6713 i40e_service_event_complete(pf);
6714
6715 /* If the tasks have taken longer than one timer cycle or there
6716 * is more work to be done, reschedule the service task now
6717 * rather than wait for the timer to tick again.
6718 */
6719 if (time_after(jiffies, (start_time + pf->service_timer_period)) ||
6720 test_bit(__I40E_ADMINQ_EVENT_PENDING, &pf->state) ||
6721 test_bit(__I40E_MDD_EVENT_PENDING, &pf->state) ||
6722 test_bit(__I40E_VFLR_EVENT_PENDING, &pf->state))
6723 i40e_service_event_schedule(pf);
6724 }
6725
6726 /**
6727 * i40e_service_timer - timer callback
6728 * @data: pointer to PF struct
6729 **/
6730 static void i40e_service_timer(unsigned long data)
6731 {
6732 struct i40e_pf *pf = (struct i40e_pf *)data;
6733
6734 mod_timer(&pf->service_timer,
6735 round_jiffies(jiffies + pf->service_timer_period));
6736 i40e_service_event_schedule(pf);
6737 }
6738
6739 /**
6740 * i40e_set_num_rings_in_vsi - Determine number of rings in the VSI
6741 * @vsi: the VSI being configured
6742 **/
6743 static int i40e_set_num_rings_in_vsi(struct i40e_vsi *vsi)
6744 {
6745 struct i40e_pf *pf = vsi->back;
6746
6747 switch (vsi->type) {
6748 case I40E_VSI_MAIN:
6749 vsi->alloc_queue_pairs = pf->num_lan_qps;
6750 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6751 I40E_REQ_DESCRIPTOR_MULTIPLE);
6752 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
6753 vsi->num_q_vectors = pf->num_lan_msix;
6754 else
6755 vsi->num_q_vectors = 1;
6756
6757 break;
6758
6759 case I40E_VSI_FDIR:
6760 vsi->alloc_queue_pairs = 1;
6761 vsi->num_desc = ALIGN(I40E_FDIR_RING_COUNT,
6762 I40E_REQ_DESCRIPTOR_MULTIPLE);
6763 vsi->num_q_vectors = 1;
6764 break;
6765
6766 case I40E_VSI_VMDQ2:
6767 vsi->alloc_queue_pairs = pf->num_vmdq_qps;
6768 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6769 I40E_REQ_DESCRIPTOR_MULTIPLE);
6770 vsi->num_q_vectors = pf->num_vmdq_msix;
6771 break;
6772
6773 case I40E_VSI_SRIOV:
6774 vsi->alloc_queue_pairs = pf->num_vf_qps;
6775 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6776 I40E_REQ_DESCRIPTOR_MULTIPLE);
6777 break;
6778
6779 #ifdef I40E_FCOE
6780 case I40E_VSI_FCOE:
6781 vsi->alloc_queue_pairs = pf->num_fcoe_qps;
6782 vsi->num_desc = ALIGN(I40E_DEFAULT_NUM_DESCRIPTORS,
6783 I40E_REQ_DESCRIPTOR_MULTIPLE);
6784 vsi->num_q_vectors = pf->num_fcoe_msix;
6785 break;
6786
6787 #endif /* I40E_FCOE */
6788 default:
6789 WARN_ON(1);
6790 return -ENODATA;
6791 }
6792
6793 return 0;
6794 }
6795
6796 /**
6797 * i40e_vsi_alloc_arrays - Allocate queue and vector pointer arrays for the vsi
6798 * @type: VSI pointer
6799 * @alloc_qvectors: a bool to specify if q_vectors need to be allocated.
6800 *
6801 * On error: returns error code (negative)
6802 * On success: returns 0
6803 **/
6804 static int i40e_vsi_alloc_arrays(struct i40e_vsi *vsi, bool alloc_qvectors)
6805 {
6806 int size;
6807 int ret = 0;
6808
6809 /* allocate memory for both Tx and Rx ring pointers */
6810 size = sizeof(struct i40e_ring *) * vsi->alloc_queue_pairs * 2;
6811 vsi->tx_rings = kzalloc(size, GFP_KERNEL);
6812 if (!vsi->tx_rings)
6813 return -ENOMEM;
6814 vsi->rx_rings = &vsi->tx_rings[vsi->alloc_queue_pairs];
6815
6816 if (alloc_qvectors) {
6817 /* allocate memory for q_vector pointers */
6818 size = sizeof(struct i40e_q_vector *) * vsi->num_q_vectors;
6819 vsi->q_vectors = kzalloc(size, GFP_KERNEL);
6820 if (!vsi->q_vectors) {
6821 ret = -ENOMEM;
6822 goto err_vectors;
6823 }
6824 }
6825 return ret;
6826
6827 err_vectors:
6828 kfree(vsi->tx_rings);
6829 return ret;
6830 }
6831
6832 /**
6833 * i40e_vsi_mem_alloc - Allocates the next available struct vsi in the PF
6834 * @pf: board private structure
6835 * @type: type of VSI
6836 *
6837 * On error: returns error code (negative)
6838 * On success: returns vsi index in PF (positive)
6839 **/
6840 static int i40e_vsi_mem_alloc(struct i40e_pf *pf, enum i40e_vsi_type type)
6841 {
6842 int ret = -ENODEV;
6843 struct i40e_vsi *vsi;
6844 int vsi_idx;
6845 int i;
6846
6847 /* Need to protect the allocation of the VSIs at the PF level */
6848 mutex_lock(&pf->switch_mutex);
6849
6850 /* VSI list may be fragmented if VSI creation/destruction has
6851 * been happening. We can afford to do a quick scan to look
6852 * for any free VSIs in the list.
6853 *
6854 * find next empty vsi slot, looping back around if necessary
6855 */
6856 i = pf->next_vsi;
6857 while (i < pf->num_alloc_vsi && pf->vsi[i])
6858 i++;
6859 if (i >= pf->num_alloc_vsi) {
6860 i = 0;
6861 while (i < pf->next_vsi && pf->vsi[i])
6862 i++;
6863 }
6864
6865 if (i < pf->num_alloc_vsi && !pf->vsi[i]) {
6866 vsi_idx = i; /* Found one! */
6867 } else {
6868 ret = -ENODEV;
6869 goto unlock_pf; /* out of VSI slots! */
6870 }
6871 pf->next_vsi = ++i;
6872
6873 vsi = kzalloc(sizeof(*vsi), GFP_KERNEL);
6874 if (!vsi) {
6875 ret = -ENOMEM;
6876 goto unlock_pf;
6877 }
6878 vsi->type = type;
6879 vsi->back = pf;
6880 set_bit(__I40E_DOWN, &vsi->state);
6881 vsi->flags = 0;
6882 vsi->idx = vsi_idx;
6883 vsi->rx_itr_setting = pf->rx_itr_default;
6884 vsi->tx_itr_setting = pf->tx_itr_default;
6885 vsi->rss_table_size = (vsi->type == I40E_VSI_MAIN) ?
6886 pf->rss_table_size : 64;
6887 vsi->netdev_registered = false;
6888 vsi->work_limit = I40E_DEFAULT_IRQ_WORK;
6889 INIT_LIST_HEAD(&vsi->mac_filter_list);
6890 vsi->irqs_ready = false;
6891
6892 ret = i40e_set_num_rings_in_vsi(vsi);
6893 if (ret)
6894 goto err_rings;
6895
6896 ret = i40e_vsi_alloc_arrays(vsi, true);
6897 if (ret)
6898 goto err_rings;
6899
6900 /* Setup default MSIX irq handler for VSI */
6901 i40e_vsi_setup_irqhandler(vsi, i40e_msix_clean_rings);
6902
6903 pf->vsi[vsi_idx] = vsi;
6904 ret = vsi_idx;
6905 goto unlock_pf;
6906
6907 err_rings:
6908 pf->next_vsi = i - 1;
6909 kfree(vsi);
6910 unlock_pf:
6911 mutex_unlock(&pf->switch_mutex);
6912 return ret;
6913 }
6914
6915 /**
6916 * i40e_vsi_free_arrays - Free queue and vector pointer arrays for the VSI
6917 * @type: VSI pointer
6918 * @free_qvectors: a bool to specify if q_vectors need to be freed.
6919 *
6920 * On error: returns error code (negative)
6921 * On success: returns 0
6922 **/
6923 static void i40e_vsi_free_arrays(struct i40e_vsi *vsi, bool free_qvectors)
6924 {
6925 /* free the ring and vector containers */
6926 if (free_qvectors) {
6927 kfree(vsi->q_vectors);
6928 vsi->q_vectors = NULL;
6929 }
6930 kfree(vsi->tx_rings);
6931 vsi->tx_rings = NULL;
6932 vsi->rx_rings = NULL;
6933 }
6934
6935 /**
6936 * i40e_vsi_clear - Deallocate the VSI provided
6937 * @vsi: the VSI being un-configured
6938 **/
6939 static int i40e_vsi_clear(struct i40e_vsi *vsi)
6940 {
6941 struct i40e_pf *pf;
6942
6943 if (!vsi)
6944 return 0;
6945
6946 if (!vsi->back)
6947 goto free_vsi;
6948 pf = vsi->back;
6949
6950 mutex_lock(&pf->switch_mutex);
6951 if (!pf->vsi[vsi->idx]) {
6952 dev_err(&pf->pdev->dev, "pf->vsi[%d] is NULL, just free vsi[%d](%p,type %d)\n",
6953 vsi->idx, vsi->idx, vsi, vsi->type);
6954 goto unlock_vsi;
6955 }
6956
6957 if (pf->vsi[vsi->idx] != vsi) {
6958 dev_err(&pf->pdev->dev,
6959 "pf->vsi[%d](%p, type %d) != vsi[%d](%p,type %d): no free!\n",
6960 pf->vsi[vsi->idx]->idx,
6961 pf->vsi[vsi->idx],
6962 pf->vsi[vsi->idx]->type,
6963 vsi->idx, vsi, vsi->type);
6964 goto unlock_vsi;
6965 }
6966
6967 /* updates the PF for this cleared vsi */
6968 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
6969 i40e_put_lump(pf->irq_pile, vsi->base_vector, vsi->idx);
6970
6971 i40e_vsi_free_arrays(vsi, true);
6972
6973 pf->vsi[vsi->idx] = NULL;
6974 if (vsi->idx < pf->next_vsi)
6975 pf->next_vsi = vsi->idx;
6976
6977 unlock_vsi:
6978 mutex_unlock(&pf->switch_mutex);
6979 free_vsi:
6980 kfree(vsi);
6981
6982 return 0;
6983 }
6984
6985 /**
6986 * i40e_vsi_clear_rings - Deallocates the Rx and Tx rings for the provided VSI
6987 * @vsi: the VSI being cleaned
6988 **/
6989 static void i40e_vsi_clear_rings(struct i40e_vsi *vsi)
6990 {
6991 int i;
6992
6993 if (vsi->tx_rings && vsi->tx_rings[0]) {
6994 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
6995 kfree_rcu(vsi->tx_rings[i], rcu);
6996 vsi->tx_rings[i] = NULL;
6997 vsi->rx_rings[i] = NULL;
6998 }
6999 }
7000 }
7001
7002 /**
7003 * i40e_alloc_rings - Allocates the Rx and Tx rings for the provided VSI
7004 * @vsi: the VSI being configured
7005 **/
7006 static int i40e_alloc_rings(struct i40e_vsi *vsi)
7007 {
7008 struct i40e_ring *tx_ring, *rx_ring;
7009 struct i40e_pf *pf = vsi->back;
7010 int i;
7011
7012 /* Set basic values in the rings to be used later during open() */
7013 for (i = 0; i < vsi->alloc_queue_pairs; i++) {
7014 /* allocate space for both Tx and Rx in one shot */
7015 tx_ring = kzalloc(sizeof(struct i40e_ring) * 2, GFP_KERNEL);
7016 if (!tx_ring)
7017 goto err_out;
7018
7019 tx_ring->queue_index = i;
7020 tx_ring->reg_idx = vsi->base_queue + i;
7021 tx_ring->ring_active = false;
7022 tx_ring->vsi = vsi;
7023 tx_ring->netdev = vsi->netdev;
7024 tx_ring->dev = &pf->pdev->dev;
7025 tx_ring->count = vsi->num_desc;
7026 tx_ring->size = 0;
7027 tx_ring->dcb_tc = 0;
7028 vsi->tx_rings[i] = tx_ring;
7029
7030 rx_ring = &tx_ring[1];
7031 rx_ring->queue_index = i;
7032 rx_ring->reg_idx = vsi->base_queue + i;
7033 rx_ring->ring_active = false;
7034 rx_ring->vsi = vsi;
7035 rx_ring->netdev = vsi->netdev;
7036 rx_ring->dev = &pf->pdev->dev;
7037 rx_ring->count = vsi->num_desc;
7038 rx_ring->size = 0;
7039 rx_ring->dcb_tc = 0;
7040 if (pf->flags & I40E_FLAG_16BYTE_RX_DESC_ENABLED)
7041 set_ring_16byte_desc_enabled(rx_ring);
7042 else
7043 clear_ring_16byte_desc_enabled(rx_ring);
7044 vsi->rx_rings[i] = rx_ring;
7045 }
7046
7047 return 0;
7048
7049 err_out:
7050 i40e_vsi_clear_rings(vsi);
7051 return -ENOMEM;
7052 }
7053
7054 /**
7055 * i40e_reserve_msix_vectors - Reserve MSI-X vectors in the kernel
7056 * @pf: board private structure
7057 * @vectors: the number of MSI-X vectors to request
7058 *
7059 * Returns the number of vectors reserved, or error
7060 **/
7061 static int i40e_reserve_msix_vectors(struct i40e_pf *pf, int vectors)
7062 {
7063 vectors = pci_enable_msix_range(pf->pdev, pf->msix_entries,
7064 I40E_MIN_MSIX, vectors);
7065 if (vectors < 0) {
7066 dev_info(&pf->pdev->dev,
7067 "MSI-X vector reservation failed: %d\n", vectors);
7068 vectors = 0;
7069 }
7070
7071 return vectors;
7072 }
7073
7074 /**
7075 * i40e_init_msix - Setup the MSIX capability
7076 * @pf: board private structure
7077 *
7078 * Work with the OS to set up the MSIX vectors needed.
7079 *
7080 * Returns the number of vectors reserved or negative on failure
7081 **/
7082 static int i40e_init_msix(struct i40e_pf *pf)
7083 {
7084 struct i40e_hw *hw = &pf->hw;
7085 int vectors_left;
7086 int v_budget, i;
7087 int v_actual;
7088
7089 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED))
7090 return -ENODEV;
7091
7092 /* The number of vectors we'll request will be comprised of:
7093 * - Add 1 for "other" cause for Admin Queue events, etc.
7094 * - The number of LAN queue pairs
7095 * - Queues being used for RSS.
7096 * We don't need as many as max_rss_size vectors.
7097 * use rss_size instead in the calculation since that
7098 * is governed by number of cpus in the system.
7099 * - assumes symmetric Tx/Rx pairing
7100 * - The number of VMDq pairs
7101 #ifdef I40E_FCOE
7102 * - The number of FCOE qps.
7103 #endif
7104 * Once we count this up, try the request.
7105 *
7106 * If we can't get what we want, we'll simplify to nearly nothing
7107 * and try again. If that still fails, we punt.
7108 */
7109 vectors_left = hw->func_caps.num_msix_vectors;
7110 v_budget = 0;
7111
7112 /* reserve one vector for miscellaneous handler */
7113 if (vectors_left) {
7114 v_budget++;
7115 vectors_left--;
7116 }
7117
7118 /* reserve vectors for the main PF traffic queues */
7119 pf->num_lan_msix = min_t(int, num_online_cpus(), vectors_left);
7120 vectors_left -= pf->num_lan_msix;
7121 v_budget += pf->num_lan_msix;
7122
7123 /* reserve one vector for sideband flow director */
7124 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
7125 if (vectors_left) {
7126 v_budget++;
7127 vectors_left--;
7128 } else {
7129 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
7130 }
7131 }
7132
7133 #ifdef I40E_FCOE
7134 /* can we reserve enough for FCoE? */
7135 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7136 if (!vectors_left)
7137 pf->num_fcoe_msix = 0;
7138 else if (vectors_left >= pf->num_fcoe_qps)
7139 pf->num_fcoe_msix = pf->num_fcoe_qps;
7140 else
7141 pf->num_fcoe_msix = 1;
7142 v_budget += pf->num_fcoe_msix;
7143 vectors_left -= pf->num_fcoe_msix;
7144 }
7145
7146 #endif
7147 /* any vectors left over go for VMDq support */
7148 if (pf->flags & I40E_FLAG_VMDQ_ENABLED) {
7149 int vmdq_vecs_wanted = pf->num_vmdq_vsis * pf->num_vmdq_qps;
7150 int vmdq_vecs = min_t(int, vectors_left, vmdq_vecs_wanted);
7151
7152 /* if we're short on vectors for what's desired, we limit
7153 * the queues per vmdq. If this is still more than are
7154 * available, the user will need to change the number of
7155 * queues/vectors used by the PF later with the ethtool
7156 * channels command
7157 */
7158 if (vmdq_vecs < vmdq_vecs_wanted)
7159 pf->num_vmdq_qps = 1;
7160 pf->num_vmdq_msix = pf->num_vmdq_qps;
7161
7162 v_budget += vmdq_vecs;
7163 vectors_left -= vmdq_vecs;
7164 }
7165
7166 pf->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry),
7167 GFP_KERNEL);
7168 if (!pf->msix_entries)
7169 return -ENOMEM;
7170
7171 for (i = 0; i < v_budget; i++)
7172 pf->msix_entries[i].entry = i;
7173 v_actual = i40e_reserve_msix_vectors(pf, v_budget);
7174
7175 if (v_actual != v_budget) {
7176 /* If we have limited resources, we will start with no vectors
7177 * for the special features and then allocate vectors to some
7178 * of these features based on the policy and at the end disable
7179 * the features that did not get any vectors.
7180 */
7181 #ifdef I40E_FCOE
7182 pf->num_fcoe_qps = 0;
7183 pf->num_fcoe_msix = 0;
7184 #endif
7185 pf->num_vmdq_msix = 0;
7186 }
7187
7188 if (v_actual < I40E_MIN_MSIX) {
7189 pf->flags &= ~I40E_FLAG_MSIX_ENABLED;
7190 kfree(pf->msix_entries);
7191 pf->msix_entries = NULL;
7192 return -ENODEV;
7193
7194 } else if (v_actual == I40E_MIN_MSIX) {
7195 /* Adjust for minimal MSIX use */
7196 pf->num_vmdq_vsis = 0;
7197 pf->num_vmdq_qps = 0;
7198 pf->num_lan_qps = 1;
7199 pf->num_lan_msix = 1;
7200
7201 } else if (v_actual != v_budget) {
7202 int vec;
7203
7204 /* reserve the misc vector */
7205 vec = v_actual - 1;
7206
7207 /* Scale vector usage down */
7208 pf->num_vmdq_msix = 1; /* force VMDqs to only one vector */
7209 pf->num_vmdq_vsis = 1;
7210 pf->num_vmdq_qps = 1;
7211 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
7212
7213 /* partition out the remaining vectors */
7214 switch (vec) {
7215 case 2:
7216 pf->num_lan_msix = 1;
7217 break;
7218 case 3:
7219 #ifdef I40E_FCOE
7220 /* give one vector to FCoE */
7221 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7222 pf->num_lan_msix = 1;
7223 pf->num_fcoe_msix = 1;
7224 }
7225 #else
7226 pf->num_lan_msix = 2;
7227 #endif
7228 break;
7229 default:
7230 #ifdef I40E_FCOE
7231 /* give one vector to FCoE */
7232 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
7233 pf->num_fcoe_msix = 1;
7234 vec--;
7235 }
7236 #endif
7237 /* give the rest to the PF */
7238 pf->num_lan_msix = min_t(int, vec, pf->num_lan_qps);
7239 break;
7240 }
7241 }
7242
7243 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
7244 (pf->num_vmdq_msix == 0)) {
7245 dev_info(&pf->pdev->dev, "VMDq disabled, not enough MSI-X vectors\n");
7246 pf->flags &= ~I40E_FLAG_VMDQ_ENABLED;
7247 }
7248 #ifdef I40E_FCOE
7249
7250 if ((pf->flags & I40E_FLAG_FCOE_ENABLED) && (pf->num_fcoe_msix == 0)) {
7251 dev_info(&pf->pdev->dev, "FCOE disabled, not enough MSI-X vectors\n");
7252 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
7253 }
7254 #endif
7255 return v_actual;
7256 }
7257
7258 /**
7259 * i40e_vsi_alloc_q_vector - Allocate memory for a single interrupt vector
7260 * @vsi: the VSI being configured
7261 * @v_idx: index of the vector in the vsi struct
7262 *
7263 * We allocate one q_vector. If allocation fails we return -ENOMEM.
7264 **/
7265 static int i40e_vsi_alloc_q_vector(struct i40e_vsi *vsi, int v_idx)
7266 {
7267 struct i40e_q_vector *q_vector;
7268
7269 /* allocate q_vector */
7270 q_vector = kzalloc(sizeof(struct i40e_q_vector), GFP_KERNEL);
7271 if (!q_vector)
7272 return -ENOMEM;
7273
7274 q_vector->vsi = vsi;
7275 q_vector->v_idx = v_idx;
7276 cpumask_set_cpu(v_idx, &q_vector->affinity_mask);
7277 if (vsi->netdev)
7278 netif_napi_add(vsi->netdev, &q_vector->napi,
7279 i40e_napi_poll, NAPI_POLL_WEIGHT);
7280
7281 q_vector->rx.latency_range = I40E_LOW_LATENCY;
7282 q_vector->tx.latency_range = I40E_LOW_LATENCY;
7283
7284 /* tie q_vector and vsi together */
7285 vsi->q_vectors[v_idx] = q_vector;
7286
7287 return 0;
7288 }
7289
7290 /**
7291 * i40e_vsi_alloc_q_vectors - Allocate memory for interrupt vectors
7292 * @vsi: the VSI being configured
7293 *
7294 * We allocate one q_vector per queue interrupt. If allocation fails we
7295 * return -ENOMEM.
7296 **/
7297 static int i40e_vsi_alloc_q_vectors(struct i40e_vsi *vsi)
7298 {
7299 struct i40e_pf *pf = vsi->back;
7300 int v_idx, num_q_vectors;
7301 int err;
7302
7303 /* if not MSIX, give the one vector only to the LAN VSI */
7304 if (pf->flags & I40E_FLAG_MSIX_ENABLED)
7305 num_q_vectors = vsi->num_q_vectors;
7306 else if (vsi == pf->vsi[pf->lan_vsi])
7307 num_q_vectors = 1;
7308 else
7309 return -EINVAL;
7310
7311 for (v_idx = 0; v_idx < num_q_vectors; v_idx++) {
7312 err = i40e_vsi_alloc_q_vector(vsi, v_idx);
7313 if (err)
7314 goto err_out;
7315 }
7316
7317 return 0;
7318
7319 err_out:
7320 while (v_idx--)
7321 i40e_free_q_vector(vsi, v_idx);
7322
7323 return err;
7324 }
7325
7326 /**
7327 * i40e_init_interrupt_scheme - Determine proper interrupt scheme
7328 * @pf: board private structure to initialize
7329 **/
7330 static int i40e_init_interrupt_scheme(struct i40e_pf *pf)
7331 {
7332 int vectors = 0;
7333 ssize_t size;
7334
7335 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
7336 vectors = i40e_init_msix(pf);
7337 if (vectors < 0) {
7338 pf->flags &= ~(I40E_FLAG_MSIX_ENABLED |
7339 #ifdef I40E_FCOE
7340 I40E_FLAG_FCOE_ENABLED |
7341 #endif
7342 I40E_FLAG_RSS_ENABLED |
7343 I40E_FLAG_DCB_CAPABLE |
7344 I40E_FLAG_SRIOV_ENABLED |
7345 I40E_FLAG_FD_SB_ENABLED |
7346 I40E_FLAG_FD_ATR_ENABLED |
7347 I40E_FLAG_VMDQ_ENABLED);
7348
7349 /* rework the queue expectations without MSIX */
7350 i40e_determine_queue_usage(pf);
7351 }
7352 }
7353
7354 if (!(pf->flags & I40E_FLAG_MSIX_ENABLED) &&
7355 (pf->flags & I40E_FLAG_MSI_ENABLED)) {
7356 dev_info(&pf->pdev->dev, "MSI-X not available, trying MSI\n");
7357 vectors = pci_enable_msi(pf->pdev);
7358 if (vectors < 0) {
7359 dev_info(&pf->pdev->dev, "MSI init failed - %d\n",
7360 vectors);
7361 pf->flags &= ~I40E_FLAG_MSI_ENABLED;
7362 }
7363 vectors = 1; /* one MSI or Legacy vector */
7364 }
7365
7366 if (!(pf->flags & (I40E_FLAG_MSIX_ENABLED | I40E_FLAG_MSI_ENABLED)))
7367 dev_info(&pf->pdev->dev, "MSI-X and MSI not available, falling back to Legacy IRQ\n");
7368
7369 /* set up vector assignment tracking */
7370 size = sizeof(struct i40e_lump_tracking) + (sizeof(u16) * vectors);
7371 pf->irq_pile = kzalloc(size, GFP_KERNEL);
7372 if (!pf->irq_pile) {
7373 dev_err(&pf->pdev->dev, "error allocating irq_pile memory\n");
7374 return -ENOMEM;
7375 }
7376 pf->irq_pile->num_entries = vectors;
7377 pf->irq_pile->search_hint = 0;
7378
7379 /* track first vector for misc interrupts, ignore return */
7380 (void)i40e_get_lump(pf, pf->irq_pile, 1, I40E_PILE_VALID_BIT - 1);
7381
7382 return 0;
7383 }
7384
7385 /**
7386 * i40e_setup_misc_vector - Setup the misc vector to handle non queue events
7387 * @pf: board private structure
7388 *
7389 * This sets up the handler for MSIX 0, which is used to manage the
7390 * non-queue interrupts, e.g. AdminQ and errors. This is not used
7391 * when in MSI or Legacy interrupt mode.
7392 **/
7393 static int i40e_setup_misc_vector(struct i40e_pf *pf)
7394 {
7395 struct i40e_hw *hw = &pf->hw;
7396 int err = 0;
7397
7398 /* Only request the irq if this is the first time through, and
7399 * not when we're rebuilding after a Reset
7400 */
7401 if (!test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state)) {
7402 err = request_irq(pf->msix_entries[0].vector,
7403 i40e_intr, 0, pf->int_name, pf);
7404 if (err) {
7405 dev_info(&pf->pdev->dev,
7406 "request_irq for %s failed: %d\n",
7407 pf->int_name, err);
7408 return -EFAULT;
7409 }
7410 }
7411
7412 i40e_enable_misc_int_causes(pf);
7413
7414 /* associate no queues to the misc vector */
7415 wr32(hw, I40E_PFINT_LNKLST0, I40E_QUEUE_END_OF_LIST);
7416 wr32(hw, I40E_PFINT_ITR0(I40E_RX_ITR), I40E_ITR_8K);
7417
7418 i40e_flush(hw);
7419
7420 i40e_irq_dynamic_enable_icr0(pf);
7421
7422 return err;
7423 }
7424
7425 /**
7426 * i40e_config_rss - Prepare for RSS if used
7427 * @pf: board private structure
7428 **/
7429 static int i40e_config_rss(struct i40e_pf *pf)
7430 {
7431 u32 rss_key[I40E_PFQF_HKEY_MAX_INDEX + 1];
7432 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
7433 struct i40e_hw *hw = &pf->hw;
7434 u32 lut = 0;
7435 int i, j;
7436 u64 hena;
7437 u32 reg_val;
7438
7439 netdev_rss_key_fill(rss_key, sizeof(rss_key));
7440 for (i = 0; i <= I40E_PFQF_HKEY_MAX_INDEX; i++)
7441 wr32(hw, I40E_PFQF_HKEY(i), rss_key[i]);
7442
7443 /* By default we enable TCP/UDP with IPv4/IPv6 ptypes */
7444 hena = (u64)rd32(hw, I40E_PFQF_HENA(0)) |
7445 ((u64)rd32(hw, I40E_PFQF_HENA(1)) << 32);
7446 hena |= I40E_DEFAULT_RSS_HENA;
7447 wr32(hw, I40E_PFQF_HENA(0), (u32)hena);
7448 wr32(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));
7449
7450 vsi->rss_size = min_t(int, pf->rss_size, vsi->num_queue_pairs);
7451
7452 /* Check capability and Set table size and register per hw expectation*/
7453 reg_val = rd32(hw, I40E_PFQF_CTL_0);
7454 if (pf->rss_table_size == 512)
7455 reg_val |= I40E_PFQF_CTL_0_HASHLUTSIZE_512;
7456 else
7457 reg_val &= ~I40E_PFQF_CTL_0_HASHLUTSIZE_512;
7458 wr32(hw, I40E_PFQF_CTL_0, reg_val);
7459
7460 /* Populate the LUT with max no. of queues in round robin fashion */
7461 for (i = 0, j = 0; i < pf->rss_table_size; i++, j++) {
7462
7463 /* The assumption is that lan qp count will be the highest
7464 * qp count for any PF VSI that needs RSS.
7465 * If multiple VSIs need RSS support, all the qp counts
7466 * for those VSIs should be a power of 2 for RSS to work.
7467 * If LAN VSI is the only consumer for RSS then this requirement
7468 * is not necessary.
7469 */
7470 if (j == vsi->rss_size)
7471 j = 0;
7472 /* lut = 4-byte sliding window of 4 lut entries */
7473 lut = (lut << 8) | (j &
7474 ((0x1 << pf->hw.func_caps.rss_table_entry_width) - 1));
7475 /* On i = 3, we have 4 entries in lut; write to the register */
7476 if ((i & 3) == 3)
7477 wr32(hw, I40E_PFQF_HLUT(i >> 2), lut);
7478 }
7479 i40e_flush(hw);
7480
7481 return 0;
7482 }
7483
7484 /**
7485 * i40e_reconfig_rss_queues - change number of queues for rss and rebuild
7486 * @pf: board private structure
7487 * @queue_count: the requested queue count for rss.
7488 *
7489 * returns 0 if rss is not enabled, if enabled returns the final rss queue
7490 * count which may be different from the requested queue count.
7491 **/
7492 int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count)
7493 {
7494 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
7495 int new_rss_size;
7496
7497 if (!(pf->flags & I40E_FLAG_RSS_ENABLED))
7498 return 0;
7499
7500 new_rss_size = min_t(int, queue_count, pf->rss_size_max);
7501
7502 if (queue_count != vsi->num_queue_pairs) {
7503 vsi->req_queue_pairs = queue_count;
7504 i40e_prep_for_reset(pf);
7505
7506 pf->rss_size = new_rss_size;
7507
7508 i40e_reset_and_rebuild(pf, true);
7509 i40e_config_rss(pf);
7510 }
7511 dev_info(&pf->pdev->dev, "RSS count: %d\n", pf->rss_size);
7512 return pf->rss_size;
7513 }
7514
7515 /**
7516 * i40e_get_npar_bw_setting - Retrieve BW settings for this PF partition
7517 * @pf: board private structure
7518 **/
7519 i40e_status i40e_get_npar_bw_setting(struct i40e_pf *pf)
7520 {
7521 i40e_status status;
7522 bool min_valid, max_valid;
7523 u32 max_bw, min_bw;
7524
7525 status = i40e_read_bw_from_alt_ram(&pf->hw, &max_bw, &min_bw,
7526 &min_valid, &max_valid);
7527
7528 if (!status) {
7529 if (min_valid)
7530 pf->npar_min_bw = min_bw;
7531 if (max_valid)
7532 pf->npar_max_bw = max_bw;
7533 }
7534
7535 return status;
7536 }
7537
7538 /**
7539 * i40e_set_npar_bw_setting - Set BW settings for this PF partition
7540 * @pf: board private structure
7541 **/
7542 i40e_status i40e_set_npar_bw_setting(struct i40e_pf *pf)
7543 {
7544 struct i40e_aqc_configure_partition_bw_data bw_data;
7545 i40e_status status;
7546
7547 /* Set the valid bit for this PF */
7548 bw_data.pf_valid_bits = cpu_to_le16(1 << pf->hw.pf_id);
7549 bw_data.max_bw[pf->hw.pf_id] = pf->npar_max_bw & I40E_ALT_BW_VALUE_MASK;
7550 bw_data.min_bw[pf->hw.pf_id] = pf->npar_min_bw & I40E_ALT_BW_VALUE_MASK;
7551
7552 /* Set the new bandwidths */
7553 status = i40e_aq_configure_partition_bw(&pf->hw, &bw_data, NULL);
7554
7555 return status;
7556 }
7557
7558 /**
7559 * i40e_commit_npar_bw_setting - Commit BW settings for this PF partition
7560 * @pf: board private structure
7561 **/
7562 i40e_status i40e_commit_npar_bw_setting(struct i40e_pf *pf)
7563 {
7564 /* Commit temporary BW setting to permanent NVM image */
7565 enum i40e_admin_queue_err last_aq_status;
7566 i40e_status ret;
7567 u16 nvm_word;
7568
7569 if (pf->hw.partition_id != 1) {
7570 dev_info(&pf->pdev->dev,
7571 "Commit BW only works on partition 1! This is partition %d",
7572 pf->hw.partition_id);
7573 ret = I40E_NOT_SUPPORTED;
7574 goto bw_commit_out;
7575 }
7576
7577 /* Acquire NVM for read access */
7578 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_READ);
7579 last_aq_status = pf->hw.aq.asq_last_status;
7580 if (ret) {
7581 dev_info(&pf->pdev->dev,
7582 "Cannot acquire NVM for read access, err %d: aq_err %d\n",
7583 ret, last_aq_status);
7584 goto bw_commit_out;
7585 }
7586
7587 /* Read word 0x10 of NVM - SW compatibility word 1 */
7588 ret = i40e_aq_read_nvm(&pf->hw,
7589 I40E_SR_NVM_CONTROL_WORD,
7590 0x10, sizeof(nvm_word), &nvm_word,
7591 false, NULL);
7592 /* Save off last admin queue command status before releasing
7593 * the NVM
7594 */
7595 last_aq_status = pf->hw.aq.asq_last_status;
7596 i40e_release_nvm(&pf->hw);
7597 if (ret) {
7598 dev_info(&pf->pdev->dev, "NVM read error, err %d aq_err %d\n",
7599 ret, last_aq_status);
7600 goto bw_commit_out;
7601 }
7602
7603 /* Wait a bit for NVM release to complete */
7604 msleep(50);
7605
7606 /* Acquire NVM for write access */
7607 ret = i40e_acquire_nvm(&pf->hw, I40E_RESOURCE_WRITE);
7608 last_aq_status = pf->hw.aq.asq_last_status;
7609 if (ret) {
7610 dev_info(&pf->pdev->dev,
7611 "Cannot acquire NVM for write access, err %d: aq_err %d\n",
7612 ret, last_aq_status);
7613 goto bw_commit_out;
7614 }
7615 /* Write it back out unchanged to initiate update NVM,
7616 * which will force a write of the shadow (alt) RAM to
7617 * the NVM - thus storing the bandwidth values permanently.
7618 */
7619 ret = i40e_aq_update_nvm(&pf->hw,
7620 I40E_SR_NVM_CONTROL_WORD,
7621 0x10, sizeof(nvm_word),
7622 &nvm_word, true, NULL);
7623 /* Save off last admin queue command status before releasing
7624 * the NVM
7625 */
7626 last_aq_status = pf->hw.aq.asq_last_status;
7627 i40e_release_nvm(&pf->hw);
7628 if (ret)
7629 dev_info(&pf->pdev->dev,
7630 "BW settings NOT SAVED, err %d aq_err %d\n",
7631 ret, last_aq_status);
7632 bw_commit_out:
7633
7634 return ret;
7635 }
7636
7637 /**
7638 * i40e_sw_init - Initialize general software structures (struct i40e_pf)
7639 * @pf: board private structure to initialize
7640 *
7641 * i40e_sw_init initializes the Adapter private data structure.
7642 * Fields are initialized based on PCI device information and
7643 * OS network device settings (MTU size).
7644 **/
7645 static int i40e_sw_init(struct i40e_pf *pf)
7646 {
7647 int err = 0;
7648 int size;
7649
7650 pf->msg_enable = netif_msg_init(I40E_DEFAULT_MSG_ENABLE,
7651 (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK));
7652 pf->hw.debug_mask = pf->msg_enable | I40E_DEBUG_DIAG;
7653 if (debug != -1 && debug != I40E_DEFAULT_MSG_ENABLE) {
7654 if (I40E_DEBUG_USER & debug)
7655 pf->hw.debug_mask = debug;
7656 pf->msg_enable = netif_msg_init((debug & ~I40E_DEBUG_USER),
7657 I40E_DEFAULT_MSG_ENABLE);
7658 }
7659
7660 /* Set default capability flags */
7661 pf->flags = I40E_FLAG_RX_CSUM_ENABLED |
7662 I40E_FLAG_MSI_ENABLED |
7663 I40E_FLAG_MSIX_ENABLED;
7664
7665 if (iommu_present(&pci_bus_type))
7666 pf->flags |= I40E_FLAG_RX_PS_ENABLED;
7667 else
7668 pf->flags |= I40E_FLAG_RX_1BUF_ENABLED;
7669
7670 /* Set default ITR */
7671 pf->rx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_RX_DEF;
7672 pf->tx_itr_default = I40E_ITR_DYNAMIC | I40E_ITR_TX_DEF;
7673
7674 /* Depending on PF configurations, it is possible that the RSS
7675 * maximum might end up larger than the available queues
7676 */
7677 pf->rss_size_max = 0x1 << pf->hw.func_caps.rss_table_entry_width;
7678 pf->rss_size = 1;
7679 pf->rss_table_size = pf->hw.func_caps.rss_table_size;
7680 pf->rss_size_max = min_t(int, pf->rss_size_max,
7681 pf->hw.func_caps.num_tx_qp);
7682 if (pf->hw.func_caps.rss) {
7683 pf->flags |= I40E_FLAG_RSS_ENABLED;
7684 pf->rss_size = min_t(int, pf->rss_size_max, num_online_cpus());
7685 }
7686
7687 /* MFP mode enabled */
7688 if (pf->hw.func_caps.npar_enable || pf->hw.func_caps.flex10_enable) {
7689 pf->flags |= I40E_FLAG_MFP_ENABLED;
7690 dev_info(&pf->pdev->dev, "MFP mode Enabled\n");
7691 if (i40e_get_npar_bw_setting(pf))
7692 dev_warn(&pf->pdev->dev,
7693 "Could not get NPAR bw settings\n");
7694 else
7695 dev_info(&pf->pdev->dev,
7696 "Min BW = %8.8x, Max BW = %8.8x\n",
7697 pf->npar_min_bw, pf->npar_max_bw);
7698 }
7699
7700 /* FW/NVM is not yet fixed in this regard */
7701 if ((pf->hw.func_caps.fd_filters_guaranteed > 0) ||
7702 (pf->hw.func_caps.fd_filters_best_effort > 0)) {
7703 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
7704 pf->atr_sample_rate = I40E_DEFAULT_ATR_SAMPLE_RATE;
7705 if (!(pf->flags & I40E_FLAG_MFP_ENABLED)) {
7706 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
7707 } else {
7708 dev_info(&pf->pdev->dev,
7709 "Flow Director Sideband mode Disabled in MFP mode\n");
7710 }
7711 pf->fdir_pf_filter_count =
7712 pf->hw.func_caps.fd_filters_guaranteed;
7713 pf->hw.fdir_shared_filter_count =
7714 pf->hw.func_caps.fd_filters_best_effort;
7715 }
7716
7717 if (pf->hw.func_caps.vmdq) {
7718 pf->flags |= I40E_FLAG_VMDQ_ENABLED;
7719 pf->num_vmdq_vsis = I40E_DEFAULT_NUM_VMDQ_VSI;
7720 pf->num_vmdq_qps = I40E_DEFAULT_QUEUES_PER_VMDQ;
7721 }
7722
7723 #ifdef I40E_FCOE
7724 err = i40e_init_pf_fcoe(pf);
7725 if (err)
7726 dev_info(&pf->pdev->dev, "init_pf_fcoe failed: %d\n", err);
7727
7728 #endif /* I40E_FCOE */
7729 #ifdef CONFIG_PCI_IOV
7730 if (pf->hw.func_caps.num_vfs && pf->hw.partition_id == 1) {
7731 pf->num_vf_qps = I40E_DEFAULT_QUEUES_PER_VF;
7732 pf->flags |= I40E_FLAG_SRIOV_ENABLED;
7733 pf->num_req_vfs = min_t(int,
7734 pf->hw.func_caps.num_vfs,
7735 I40E_MAX_VF_COUNT);
7736 }
7737 #endif /* CONFIG_PCI_IOV */
7738 pf->eeprom_version = 0xDEAD;
7739 pf->lan_veb = I40E_NO_VEB;
7740 pf->lan_vsi = I40E_NO_VSI;
7741
7742 /* set up queue assignment tracking */
7743 size = sizeof(struct i40e_lump_tracking)
7744 + (sizeof(u16) * pf->hw.func_caps.num_tx_qp);
7745 pf->qp_pile = kzalloc(size, GFP_KERNEL);
7746 if (!pf->qp_pile) {
7747 err = -ENOMEM;
7748 goto sw_init_done;
7749 }
7750 pf->qp_pile->num_entries = pf->hw.func_caps.num_tx_qp;
7751 pf->qp_pile->search_hint = 0;
7752
7753 pf->tx_timeout_recovery_level = 1;
7754
7755 mutex_init(&pf->switch_mutex);
7756
7757 /* If NPAR is enabled nudge the Tx scheduler */
7758 if (pf->hw.func_caps.npar_enable && (!i40e_get_npar_bw_setting(pf)))
7759 i40e_set_npar_bw_setting(pf);
7760
7761 sw_init_done:
7762 return err;
7763 }
7764
7765 /**
7766 * i40e_set_ntuple - set the ntuple feature flag and take action
7767 * @pf: board private structure to initialize
7768 * @features: the feature set that the stack is suggesting
7769 *
7770 * returns a bool to indicate if reset needs to happen
7771 **/
7772 bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features)
7773 {
7774 bool need_reset = false;
7775
7776 /* Check if Flow Director n-tuple support was enabled or disabled. If
7777 * the state changed, we need to reset.
7778 */
7779 if (features & NETIF_F_NTUPLE) {
7780 /* Enable filters and mark for reset */
7781 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
7782 need_reset = true;
7783 pf->flags |= I40E_FLAG_FD_SB_ENABLED;
7784 } else {
7785 /* turn off filters, mark for reset and clear SW filter list */
7786 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
7787 need_reset = true;
7788 i40e_fdir_filter_exit(pf);
7789 }
7790 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
7791 pf->auto_disable_flags &= ~I40E_FLAG_FD_SB_ENABLED;
7792 /* reset fd counters */
7793 pf->fd_add_err = pf->fd_atr_cnt = pf->fd_tcp_rule = 0;
7794 pf->fdir_pf_active_filters = 0;
7795 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
7796 if (I40E_DEBUG_FD & pf->hw.debug_mask)
7797 dev_info(&pf->pdev->dev, "ATR re-enabled.\n");
7798 /* if ATR was auto disabled it can be re-enabled. */
7799 if ((pf->flags & I40E_FLAG_FD_ATR_ENABLED) &&
7800 (pf->auto_disable_flags & I40E_FLAG_FD_ATR_ENABLED))
7801 pf->auto_disable_flags &= ~I40E_FLAG_FD_ATR_ENABLED;
7802 }
7803 return need_reset;
7804 }
7805
7806 /**
7807 * i40e_set_features - set the netdev feature flags
7808 * @netdev: ptr to the netdev being adjusted
7809 * @features: the feature set that the stack is suggesting
7810 **/
7811 static int i40e_set_features(struct net_device *netdev,
7812 netdev_features_t features)
7813 {
7814 struct i40e_netdev_priv *np = netdev_priv(netdev);
7815 struct i40e_vsi *vsi = np->vsi;
7816 struct i40e_pf *pf = vsi->back;
7817 bool need_reset;
7818
7819 if (features & NETIF_F_HW_VLAN_CTAG_RX)
7820 i40e_vlan_stripping_enable(vsi);
7821 else
7822 i40e_vlan_stripping_disable(vsi);
7823
7824 need_reset = i40e_set_ntuple(pf, features);
7825
7826 if (need_reset)
7827 i40e_do_reset(pf, (1 << __I40E_PF_RESET_REQUESTED));
7828
7829 return 0;
7830 }
7831
7832 #ifdef CONFIG_I40E_VXLAN
7833 /**
7834 * i40e_get_vxlan_port_idx - Lookup a possibly offloaded for Rx UDP port
7835 * @pf: board private structure
7836 * @port: The UDP port to look up
7837 *
7838 * Returns the index number or I40E_MAX_PF_UDP_OFFLOAD_PORTS if port not found
7839 **/
7840 static u8 i40e_get_vxlan_port_idx(struct i40e_pf *pf, __be16 port)
7841 {
7842 u8 i;
7843
7844 for (i = 0; i < I40E_MAX_PF_UDP_OFFLOAD_PORTS; i++) {
7845 if (pf->vxlan_ports[i] == port)
7846 return i;
7847 }
7848
7849 return i;
7850 }
7851
7852 /**
7853 * i40e_add_vxlan_port - Get notifications about VXLAN ports that come up
7854 * @netdev: This physical port's netdev
7855 * @sa_family: Socket Family that VXLAN is notifying us about
7856 * @port: New UDP port number that VXLAN started listening to
7857 **/
7858 static void i40e_add_vxlan_port(struct net_device *netdev,
7859 sa_family_t sa_family, __be16 port)
7860 {
7861 struct i40e_netdev_priv *np = netdev_priv(netdev);
7862 struct i40e_vsi *vsi = np->vsi;
7863 struct i40e_pf *pf = vsi->back;
7864 u8 next_idx;
7865 u8 idx;
7866
7867 if (sa_family == AF_INET6)
7868 return;
7869
7870 idx = i40e_get_vxlan_port_idx(pf, port);
7871
7872 /* Check if port already exists */
7873 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
7874 netdev_info(netdev, "vxlan port %d already offloaded\n",
7875 ntohs(port));
7876 return;
7877 }
7878
7879 /* Now check if there is space to add the new port */
7880 next_idx = i40e_get_vxlan_port_idx(pf, 0);
7881
7882 if (next_idx == I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
7883 netdev_info(netdev, "maximum number of vxlan UDP ports reached, not adding port %d\n",
7884 ntohs(port));
7885 return;
7886 }
7887
7888 /* New port: add it and mark its index in the bitmap */
7889 pf->vxlan_ports[next_idx] = port;
7890 pf->pending_vxlan_bitmap |= (1 << next_idx);
7891 pf->flags |= I40E_FLAG_VXLAN_FILTER_SYNC;
7892
7893 dev_info(&pf->pdev->dev, "adding vxlan port %d\n", ntohs(port));
7894 }
7895
7896 /**
7897 * i40e_del_vxlan_port - Get notifications about VXLAN ports that go away
7898 * @netdev: This physical port's netdev
7899 * @sa_family: Socket Family that VXLAN is notifying us about
7900 * @port: UDP port number that VXLAN stopped listening to
7901 **/
7902 static void i40e_del_vxlan_port(struct net_device *netdev,
7903 sa_family_t sa_family, __be16 port)
7904 {
7905 struct i40e_netdev_priv *np = netdev_priv(netdev);
7906 struct i40e_vsi *vsi = np->vsi;
7907 struct i40e_pf *pf = vsi->back;
7908 u8 idx;
7909
7910 if (sa_family == AF_INET6)
7911 return;
7912
7913 idx = i40e_get_vxlan_port_idx(pf, port);
7914
7915 /* Check if port already exists */
7916 if (idx < I40E_MAX_PF_UDP_OFFLOAD_PORTS) {
7917 /* if port exists, set it to 0 (mark for deletion)
7918 * and make it pending
7919 */
7920 pf->vxlan_ports[idx] = 0;
7921 pf->pending_vxlan_bitmap |= (1 << idx);
7922 pf->flags |= I40E_FLAG_VXLAN_FILTER_SYNC;
7923
7924 dev_info(&pf->pdev->dev, "deleting vxlan port %d\n",
7925 ntohs(port));
7926 } else {
7927 netdev_warn(netdev, "vxlan port %d was not found, not deleting\n",
7928 ntohs(port));
7929 }
7930 }
7931
7932 #endif
7933 static int i40e_get_phys_port_id(struct net_device *netdev,
7934 struct netdev_phys_item_id *ppid)
7935 {
7936 struct i40e_netdev_priv *np = netdev_priv(netdev);
7937 struct i40e_pf *pf = np->vsi->back;
7938 struct i40e_hw *hw = &pf->hw;
7939
7940 if (!(pf->flags & I40E_FLAG_PORT_ID_VALID))
7941 return -EOPNOTSUPP;
7942
7943 ppid->id_len = min_t(int, sizeof(hw->mac.port_addr), sizeof(ppid->id));
7944 memcpy(ppid->id, hw->mac.port_addr, ppid->id_len);
7945
7946 return 0;
7947 }
7948
7949 /**
7950 * i40e_ndo_fdb_add - add an entry to the hardware database
7951 * @ndm: the input from the stack
7952 * @tb: pointer to array of nladdr (unused)
7953 * @dev: the net device pointer
7954 * @addr: the MAC address entry being added
7955 * @flags: instructions from stack about fdb operation
7956 */
7957 static int i40e_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
7958 struct net_device *dev,
7959 const unsigned char *addr, u16 vid,
7960 u16 flags)
7961 {
7962 struct i40e_netdev_priv *np = netdev_priv(dev);
7963 struct i40e_pf *pf = np->vsi->back;
7964 int err = 0;
7965
7966 if (!(pf->flags & I40E_FLAG_SRIOV_ENABLED))
7967 return -EOPNOTSUPP;
7968
7969 if (vid) {
7970 pr_info("%s: vlans aren't supported yet for dev_uc|mc_add()\n", dev->name);
7971 return -EINVAL;
7972 }
7973
7974 /* Hardware does not support aging addresses so if a
7975 * ndm_state is given only allow permanent addresses
7976 */
7977 if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
7978 netdev_info(dev, "FDB only supports static addresses\n");
7979 return -EINVAL;
7980 }
7981
7982 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr))
7983 err = dev_uc_add_excl(dev, addr);
7984 else if (is_multicast_ether_addr(addr))
7985 err = dev_mc_add_excl(dev, addr);
7986 else
7987 err = -EINVAL;
7988
7989 /* Only return duplicate errors if NLM_F_EXCL is set */
7990 if (err == -EEXIST && !(flags & NLM_F_EXCL))
7991 err = 0;
7992
7993 return err;
7994 }
7995
7996 /**
7997 * i40e_ndo_bridge_setlink - Set the hardware bridge mode
7998 * @dev: the netdev being configured
7999 * @nlh: RTNL message
8000 *
8001 * Inserts a new hardware bridge if not already created and
8002 * enables the bridging mode requested (VEB or VEPA). If the
8003 * hardware bridge has already been inserted and the request
8004 * is to change the mode then that requires a PF reset to
8005 * allow rebuild of the components with required hardware
8006 * bridge mode enabled.
8007 **/
8008 static int i40e_ndo_bridge_setlink(struct net_device *dev,
8009 struct nlmsghdr *nlh,
8010 u16 flags)
8011 {
8012 struct i40e_netdev_priv *np = netdev_priv(dev);
8013 struct i40e_vsi *vsi = np->vsi;
8014 struct i40e_pf *pf = vsi->back;
8015 struct i40e_veb *veb = NULL;
8016 struct nlattr *attr, *br_spec;
8017 int i, rem;
8018
8019 /* Only for PF VSI for now */
8020 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
8021 return -EOPNOTSUPP;
8022
8023 /* Find the HW bridge for PF VSI */
8024 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
8025 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
8026 veb = pf->veb[i];
8027 }
8028
8029 br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
8030
8031 nla_for_each_nested(attr, br_spec, rem) {
8032 __u16 mode;
8033
8034 if (nla_type(attr) != IFLA_BRIDGE_MODE)
8035 continue;
8036
8037 mode = nla_get_u16(attr);
8038 if ((mode != BRIDGE_MODE_VEPA) &&
8039 (mode != BRIDGE_MODE_VEB))
8040 return -EINVAL;
8041
8042 /* Insert a new HW bridge */
8043 if (!veb) {
8044 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
8045 vsi->tc_config.enabled_tc);
8046 if (veb) {
8047 veb->bridge_mode = mode;
8048 i40e_config_bridge_mode(veb);
8049 } else {
8050 /* No Bridge HW offload available */
8051 return -ENOENT;
8052 }
8053 break;
8054 } else if (mode != veb->bridge_mode) {
8055 /* Existing HW bridge but different mode needs reset */
8056 veb->bridge_mode = mode;
8057 /* TODO: If no VFs or VMDq VSIs, disallow VEB mode */
8058 if (mode == BRIDGE_MODE_VEB)
8059 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
8060 else
8061 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
8062 i40e_do_reset(pf, BIT_ULL(__I40E_PF_RESET_REQUESTED));
8063 break;
8064 }
8065 }
8066
8067 return 0;
8068 }
8069
8070 /**
8071 * i40e_ndo_bridge_getlink - Get the hardware bridge mode
8072 * @skb: skb buff
8073 * @pid: process id
8074 * @seq: RTNL message seq #
8075 * @dev: the netdev being configured
8076 * @filter_mask: unused
8077 *
8078 * Return the mode in which the hardware bridge is operating in
8079 * i.e VEB or VEPA.
8080 **/
8081 static int i40e_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
8082 struct net_device *dev,
8083 u32 filter_mask, int nlflags)
8084 {
8085 struct i40e_netdev_priv *np = netdev_priv(dev);
8086 struct i40e_vsi *vsi = np->vsi;
8087 struct i40e_pf *pf = vsi->back;
8088 struct i40e_veb *veb = NULL;
8089 int i;
8090
8091 /* Only for PF VSI for now */
8092 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid)
8093 return -EOPNOTSUPP;
8094
8095 /* Find the HW bridge for the PF VSI */
8096 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
8097 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
8098 veb = pf->veb[i];
8099 }
8100
8101 if (!veb)
8102 return 0;
8103
8104 return ndo_dflt_bridge_getlink(skb, pid, seq, dev, veb->bridge_mode,
8105 nlflags, 0, 0, filter_mask, NULL);
8106 }
8107
8108 #define I40E_MAX_TUNNEL_HDR_LEN 80
8109 /**
8110 * i40e_features_check - Validate encapsulated packet conforms to limits
8111 * @skb: skb buff
8112 * @netdev: This physical port's netdev
8113 * @features: Offload features that the stack believes apply
8114 **/
8115 static netdev_features_t i40e_features_check(struct sk_buff *skb,
8116 struct net_device *dev,
8117 netdev_features_t features)
8118 {
8119 if (skb->encapsulation &&
8120 (skb_inner_mac_header(skb) - skb_transport_header(skb) >
8121 I40E_MAX_TUNNEL_HDR_LEN))
8122 return features & ~(NETIF_F_ALL_CSUM | NETIF_F_GSO_MASK);
8123
8124 return features;
8125 }
8126
8127 static const struct net_device_ops i40e_netdev_ops = {
8128 .ndo_open = i40e_open,
8129 .ndo_stop = i40e_close,
8130 .ndo_start_xmit = i40e_lan_xmit_frame,
8131 .ndo_get_stats64 = i40e_get_netdev_stats_struct,
8132 .ndo_set_rx_mode = i40e_set_rx_mode,
8133 .ndo_validate_addr = eth_validate_addr,
8134 .ndo_set_mac_address = i40e_set_mac,
8135 .ndo_change_mtu = i40e_change_mtu,
8136 .ndo_do_ioctl = i40e_ioctl,
8137 .ndo_tx_timeout = i40e_tx_timeout,
8138 .ndo_vlan_rx_add_vid = i40e_vlan_rx_add_vid,
8139 .ndo_vlan_rx_kill_vid = i40e_vlan_rx_kill_vid,
8140 #ifdef CONFIG_NET_POLL_CONTROLLER
8141 .ndo_poll_controller = i40e_netpoll,
8142 #endif
8143 .ndo_setup_tc = i40e_setup_tc,
8144 #ifdef I40E_FCOE
8145 .ndo_fcoe_enable = i40e_fcoe_enable,
8146 .ndo_fcoe_disable = i40e_fcoe_disable,
8147 #endif
8148 .ndo_set_features = i40e_set_features,
8149 .ndo_set_vf_mac = i40e_ndo_set_vf_mac,
8150 .ndo_set_vf_vlan = i40e_ndo_set_vf_port_vlan,
8151 .ndo_set_vf_rate = i40e_ndo_set_vf_bw,
8152 .ndo_get_vf_config = i40e_ndo_get_vf_config,
8153 .ndo_set_vf_link_state = i40e_ndo_set_vf_link_state,
8154 .ndo_set_vf_spoofchk = i40e_ndo_set_vf_spoofchk,
8155 #ifdef CONFIG_I40E_VXLAN
8156 .ndo_add_vxlan_port = i40e_add_vxlan_port,
8157 .ndo_del_vxlan_port = i40e_del_vxlan_port,
8158 #endif
8159 .ndo_get_phys_port_id = i40e_get_phys_port_id,
8160 .ndo_fdb_add = i40e_ndo_fdb_add,
8161 .ndo_features_check = i40e_features_check,
8162 .ndo_bridge_getlink = i40e_ndo_bridge_getlink,
8163 .ndo_bridge_setlink = i40e_ndo_bridge_setlink,
8164 };
8165
8166 /**
8167 * i40e_config_netdev - Setup the netdev flags
8168 * @vsi: the VSI being configured
8169 *
8170 * Returns 0 on success, negative value on failure
8171 **/
8172 static int i40e_config_netdev(struct i40e_vsi *vsi)
8173 {
8174 u8 brdcast[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
8175 struct i40e_pf *pf = vsi->back;
8176 struct i40e_hw *hw = &pf->hw;
8177 struct i40e_netdev_priv *np;
8178 struct net_device *netdev;
8179 u8 mac_addr[ETH_ALEN];
8180 int etherdev_size;
8181
8182 etherdev_size = sizeof(struct i40e_netdev_priv);
8183 netdev = alloc_etherdev_mq(etherdev_size, vsi->alloc_queue_pairs);
8184 if (!netdev)
8185 return -ENOMEM;
8186
8187 vsi->netdev = netdev;
8188 np = netdev_priv(netdev);
8189 np->vsi = vsi;
8190
8191 netdev->hw_enc_features |= NETIF_F_IP_CSUM |
8192 NETIF_F_GSO_UDP_TUNNEL |
8193 NETIF_F_TSO;
8194
8195 netdev->features = NETIF_F_SG |
8196 NETIF_F_IP_CSUM |
8197 NETIF_F_SCTP_CSUM |
8198 NETIF_F_HIGHDMA |
8199 NETIF_F_GSO_UDP_TUNNEL |
8200 NETIF_F_HW_VLAN_CTAG_TX |
8201 NETIF_F_HW_VLAN_CTAG_RX |
8202 NETIF_F_HW_VLAN_CTAG_FILTER |
8203 NETIF_F_IPV6_CSUM |
8204 NETIF_F_TSO |
8205 NETIF_F_TSO_ECN |
8206 NETIF_F_TSO6 |
8207 NETIF_F_RXCSUM |
8208 NETIF_F_RXHASH |
8209 0;
8210
8211 if (!(pf->flags & I40E_FLAG_MFP_ENABLED))
8212 netdev->features |= NETIF_F_NTUPLE;
8213
8214 /* copy netdev features into list of user selectable features */
8215 netdev->hw_features |= netdev->features;
8216
8217 if (vsi->type == I40E_VSI_MAIN) {
8218 SET_NETDEV_DEV(netdev, &pf->pdev->dev);
8219 ether_addr_copy(mac_addr, hw->mac.perm_addr);
8220 /* The following steps are necessary to prevent reception
8221 * of tagged packets - some older NVM configurations load a
8222 * default a MAC-VLAN filter that accepts any tagged packet
8223 * which must be replaced by a normal filter.
8224 */
8225 if (!i40e_rm_default_mac_filter(vsi, mac_addr))
8226 i40e_add_filter(vsi, mac_addr,
8227 I40E_VLAN_ANY, false, true);
8228 } else {
8229 /* relate the VSI_VMDQ name to the VSI_MAIN name */
8230 snprintf(netdev->name, IFNAMSIZ, "%sv%%d",
8231 pf->vsi[pf->lan_vsi]->netdev->name);
8232 random_ether_addr(mac_addr);
8233 i40e_add_filter(vsi, mac_addr, I40E_VLAN_ANY, false, false);
8234 }
8235 i40e_add_filter(vsi, brdcast, I40E_VLAN_ANY, false, false);
8236
8237 ether_addr_copy(netdev->dev_addr, mac_addr);
8238 ether_addr_copy(netdev->perm_addr, mac_addr);
8239 /* vlan gets same features (except vlan offload)
8240 * after any tweaks for specific VSI types
8241 */
8242 netdev->vlan_features = netdev->features & ~(NETIF_F_HW_VLAN_CTAG_TX |
8243 NETIF_F_HW_VLAN_CTAG_RX |
8244 NETIF_F_HW_VLAN_CTAG_FILTER);
8245 netdev->priv_flags |= IFF_UNICAST_FLT;
8246 netdev->priv_flags |= IFF_SUPP_NOFCS;
8247 /* Setup netdev TC information */
8248 i40e_vsi_config_netdev_tc(vsi, vsi->tc_config.enabled_tc);
8249
8250 netdev->netdev_ops = &i40e_netdev_ops;
8251 netdev->watchdog_timeo = 5 * HZ;
8252 i40e_set_ethtool_ops(netdev);
8253 #ifdef I40E_FCOE
8254 i40e_fcoe_config_netdev(netdev, vsi);
8255 #endif
8256
8257 return 0;
8258 }
8259
8260 /**
8261 * i40e_vsi_delete - Delete a VSI from the switch
8262 * @vsi: the VSI being removed
8263 *
8264 * Returns 0 on success, negative value on failure
8265 **/
8266 static void i40e_vsi_delete(struct i40e_vsi *vsi)
8267 {
8268 /* remove default VSI is not allowed */
8269 if (vsi == vsi->back->vsi[vsi->back->lan_vsi])
8270 return;
8271
8272 i40e_aq_delete_element(&vsi->back->hw, vsi->seid, NULL);
8273 }
8274
8275 /**
8276 * i40e_is_vsi_uplink_mode_veb - Check if the VSI's uplink bridge mode is VEB
8277 * @vsi: the VSI being queried
8278 *
8279 * Returns 1 if HW bridge mode is VEB and return 0 in case of VEPA mode
8280 **/
8281 int i40e_is_vsi_uplink_mode_veb(struct i40e_vsi *vsi)
8282 {
8283 struct i40e_veb *veb;
8284 struct i40e_pf *pf = vsi->back;
8285
8286 /* Uplink is not a bridge so default to VEB */
8287 if (vsi->veb_idx == I40E_NO_VEB)
8288 return 1;
8289
8290 veb = pf->veb[vsi->veb_idx];
8291 /* Uplink is a bridge in VEPA mode */
8292 if (veb && (veb->bridge_mode & BRIDGE_MODE_VEPA))
8293 return 0;
8294
8295 /* Uplink is a bridge in VEB mode */
8296 return 1;
8297 }
8298
8299 /**
8300 * i40e_add_vsi - Add a VSI to the switch
8301 * @vsi: the VSI being configured
8302 *
8303 * This initializes a VSI context depending on the VSI type to be added and
8304 * passes it down to the add_vsi aq command.
8305 **/
8306 static int i40e_add_vsi(struct i40e_vsi *vsi)
8307 {
8308 int ret = -ENODEV;
8309 struct i40e_mac_filter *f, *ftmp;
8310 struct i40e_pf *pf = vsi->back;
8311 struct i40e_hw *hw = &pf->hw;
8312 struct i40e_vsi_context ctxt;
8313 u8 enabled_tc = 0x1; /* TC0 enabled */
8314 int f_count = 0;
8315
8316 memset(&ctxt, 0, sizeof(ctxt));
8317 switch (vsi->type) {
8318 case I40E_VSI_MAIN:
8319 /* The PF's main VSI is already setup as part of the
8320 * device initialization, so we'll not bother with
8321 * the add_vsi call, but we will retrieve the current
8322 * VSI context.
8323 */
8324 ctxt.seid = pf->main_vsi_seid;
8325 ctxt.pf_num = pf->hw.pf_id;
8326 ctxt.vf_num = 0;
8327 ret = i40e_aq_get_vsi_params(&pf->hw, &ctxt, NULL);
8328 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
8329 if (ret) {
8330 dev_info(&pf->pdev->dev,
8331 "couldn't get PF vsi config, err %d, aq_err %d\n",
8332 ret, pf->hw.aq.asq_last_status);
8333 return -ENOENT;
8334 }
8335 vsi->info = ctxt.info;
8336 vsi->info.valid_sections = 0;
8337
8338 vsi->seid = ctxt.seid;
8339 vsi->id = ctxt.vsi_number;
8340
8341 enabled_tc = i40e_pf_get_tc_map(pf);
8342
8343 /* MFP mode setup queue map and update VSI */
8344 if ((pf->flags & I40E_FLAG_MFP_ENABLED) &&
8345 !(pf->hw.func_caps.iscsi)) { /* NIC type PF */
8346 memset(&ctxt, 0, sizeof(ctxt));
8347 ctxt.seid = pf->main_vsi_seid;
8348 ctxt.pf_num = pf->hw.pf_id;
8349 ctxt.vf_num = 0;
8350 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, false);
8351 ret = i40e_aq_update_vsi_params(hw, &ctxt, NULL);
8352 if (ret) {
8353 dev_info(&pf->pdev->dev,
8354 "update vsi failed, aq_err=%d\n",
8355 pf->hw.aq.asq_last_status);
8356 ret = -ENOENT;
8357 goto err;
8358 }
8359 /* update the local VSI info queue map */
8360 i40e_vsi_update_queue_map(vsi, &ctxt);
8361 vsi->info.valid_sections = 0;
8362 } else {
8363 /* Default/Main VSI is only enabled for TC0
8364 * reconfigure it to enable all TCs that are
8365 * available on the port in SFP mode.
8366 * For MFP case the iSCSI PF would use this
8367 * flow to enable LAN+iSCSI TC.
8368 */
8369 ret = i40e_vsi_config_tc(vsi, enabled_tc);
8370 if (ret) {
8371 dev_info(&pf->pdev->dev,
8372 "failed to configure TCs for main VSI tc_map 0x%08x, err %d, aq_err %d\n",
8373 enabled_tc, ret,
8374 pf->hw.aq.asq_last_status);
8375 ret = -ENOENT;
8376 }
8377 }
8378 break;
8379
8380 case I40E_VSI_FDIR:
8381 ctxt.pf_num = hw->pf_id;
8382 ctxt.vf_num = 0;
8383 ctxt.uplink_seid = vsi->uplink_seid;
8384 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
8385 ctxt.flags = I40E_AQ_VSI_TYPE_PF;
8386 if ((pf->flags & I40E_FLAG_VEB_MODE_ENABLED) &&
8387 (i40e_is_vsi_uplink_mode_veb(vsi))) {
8388 ctxt.info.valid_sections |=
8389 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
8390 ctxt.info.switch_id =
8391 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
8392 }
8393 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
8394 break;
8395
8396 case I40E_VSI_VMDQ2:
8397 ctxt.pf_num = hw->pf_id;
8398 ctxt.vf_num = 0;
8399 ctxt.uplink_seid = vsi->uplink_seid;
8400 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
8401 ctxt.flags = I40E_AQ_VSI_TYPE_VMDQ2;
8402
8403 /* This VSI is connected to VEB so the switch_id
8404 * should be set to zero by default.
8405 */
8406 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
8407 ctxt.info.valid_sections |=
8408 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
8409 ctxt.info.switch_id =
8410 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
8411 }
8412
8413 /* Setup the VSI tx/rx queue map for TC0 only for now */
8414 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
8415 break;
8416
8417 case I40E_VSI_SRIOV:
8418 ctxt.pf_num = hw->pf_id;
8419 ctxt.vf_num = vsi->vf_id + hw->func_caps.vf_base_id;
8420 ctxt.uplink_seid = vsi->uplink_seid;
8421 ctxt.connection_type = I40E_AQ_VSI_CONN_TYPE_NORMAL;
8422 ctxt.flags = I40E_AQ_VSI_TYPE_VF;
8423
8424 /* This VSI is connected to VEB so the switch_id
8425 * should be set to zero by default.
8426 */
8427 if (i40e_is_vsi_uplink_mode_veb(vsi)) {
8428 ctxt.info.valid_sections |=
8429 cpu_to_le16(I40E_AQ_VSI_PROP_SWITCH_VALID);
8430 ctxt.info.switch_id =
8431 cpu_to_le16(I40E_AQ_VSI_SW_ID_FLAG_ALLOW_LB);
8432 }
8433
8434 ctxt.info.valid_sections |= cpu_to_le16(I40E_AQ_VSI_PROP_VLAN_VALID);
8435 ctxt.info.port_vlan_flags |= I40E_AQ_VSI_PVLAN_MODE_ALL;
8436 if (pf->vf[vsi->vf_id].spoofchk) {
8437 ctxt.info.valid_sections |=
8438 cpu_to_le16(I40E_AQ_VSI_PROP_SECURITY_VALID);
8439 ctxt.info.sec_flags |=
8440 (I40E_AQ_VSI_SEC_FLAG_ENABLE_VLAN_CHK |
8441 I40E_AQ_VSI_SEC_FLAG_ENABLE_MAC_CHK);
8442 }
8443 /* Setup the VSI tx/rx queue map for TC0 only for now */
8444 i40e_vsi_setup_queue_map(vsi, &ctxt, enabled_tc, true);
8445 break;
8446
8447 #ifdef I40E_FCOE
8448 case I40E_VSI_FCOE:
8449 ret = i40e_fcoe_vsi_init(vsi, &ctxt);
8450 if (ret) {
8451 dev_info(&pf->pdev->dev, "failed to initialize FCoE VSI\n");
8452 return ret;
8453 }
8454 break;
8455
8456 #endif /* I40E_FCOE */
8457 default:
8458 return -ENODEV;
8459 }
8460
8461 if (vsi->type != I40E_VSI_MAIN) {
8462 ret = i40e_aq_add_vsi(hw, &ctxt, NULL);
8463 if (ret) {
8464 dev_info(&vsi->back->pdev->dev,
8465 "add vsi failed, aq_err=%d\n",
8466 vsi->back->hw.aq.asq_last_status);
8467 ret = -ENOENT;
8468 goto err;
8469 }
8470 vsi->info = ctxt.info;
8471 vsi->info.valid_sections = 0;
8472 vsi->seid = ctxt.seid;
8473 vsi->id = ctxt.vsi_number;
8474 }
8475
8476 /* If macvlan filters already exist, force them to get loaded */
8477 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list) {
8478 f->changed = true;
8479 f_count++;
8480
8481 if (f->is_laa && vsi->type == I40E_VSI_MAIN) {
8482 struct i40e_aqc_remove_macvlan_element_data element;
8483
8484 memset(&element, 0, sizeof(element));
8485 ether_addr_copy(element.mac_addr, f->macaddr);
8486 element.flags = I40E_AQC_MACVLAN_DEL_PERFECT_MATCH;
8487 ret = i40e_aq_remove_macvlan(hw, vsi->seid,
8488 &element, 1, NULL);
8489 if (ret) {
8490 /* some older FW has a different default */
8491 element.flags |=
8492 I40E_AQC_MACVLAN_DEL_IGNORE_VLAN;
8493 i40e_aq_remove_macvlan(hw, vsi->seid,
8494 &element, 1, NULL);
8495 }
8496
8497 i40e_aq_mac_address_write(hw,
8498 I40E_AQC_WRITE_TYPE_LAA_WOL,
8499 f->macaddr, NULL);
8500 }
8501 }
8502 if (f_count) {
8503 vsi->flags |= I40E_VSI_FLAG_FILTER_CHANGED;
8504 pf->flags |= I40E_FLAG_FILTER_SYNC;
8505 }
8506
8507 /* Update VSI BW information */
8508 ret = i40e_vsi_get_bw_info(vsi);
8509 if (ret) {
8510 dev_info(&pf->pdev->dev,
8511 "couldn't get vsi bw info, err %d, aq_err %d\n",
8512 ret, pf->hw.aq.asq_last_status);
8513 /* VSI is already added so not tearing that up */
8514 ret = 0;
8515 }
8516
8517 err:
8518 return ret;
8519 }
8520
8521 /**
8522 * i40e_vsi_release - Delete a VSI and free its resources
8523 * @vsi: the VSI being removed
8524 *
8525 * Returns 0 on success or < 0 on error
8526 **/
8527 int i40e_vsi_release(struct i40e_vsi *vsi)
8528 {
8529 struct i40e_mac_filter *f, *ftmp;
8530 struct i40e_veb *veb = NULL;
8531 struct i40e_pf *pf;
8532 u16 uplink_seid;
8533 int i, n;
8534
8535 pf = vsi->back;
8536
8537 /* release of a VEB-owner or last VSI is not allowed */
8538 if (vsi->flags & I40E_VSI_FLAG_VEB_OWNER) {
8539 dev_info(&pf->pdev->dev, "VSI %d has existing VEB %d\n",
8540 vsi->seid, vsi->uplink_seid);
8541 return -ENODEV;
8542 }
8543 if (vsi == pf->vsi[pf->lan_vsi] &&
8544 !test_bit(__I40E_DOWN, &pf->state)) {
8545 dev_info(&pf->pdev->dev, "Can't remove PF VSI\n");
8546 return -ENODEV;
8547 }
8548
8549 uplink_seid = vsi->uplink_seid;
8550 if (vsi->type != I40E_VSI_SRIOV) {
8551 if (vsi->netdev_registered) {
8552 vsi->netdev_registered = false;
8553 if (vsi->netdev) {
8554 /* results in a call to i40e_close() */
8555 unregister_netdev(vsi->netdev);
8556 }
8557 } else {
8558 i40e_vsi_close(vsi);
8559 }
8560 i40e_vsi_disable_irq(vsi);
8561 }
8562
8563 list_for_each_entry_safe(f, ftmp, &vsi->mac_filter_list, list)
8564 i40e_del_filter(vsi, f->macaddr, f->vlan,
8565 f->is_vf, f->is_netdev);
8566 i40e_sync_vsi_filters(vsi);
8567
8568 i40e_vsi_delete(vsi);
8569 i40e_vsi_free_q_vectors(vsi);
8570 if (vsi->netdev) {
8571 free_netdev(vsi->netdev);
8572 vsi->netdev = NULL;
8573 }
8574 i40e_vsi_clear_rings(vsi);
8575 i40e_vsi_clear(vsi);
8576
8577 /* If this was the last thing on the VEB, except for the
8578 * controlling VSI, remove the VEB, which puts the controlling
8579 * VSI onto the next level down in the switch.
8580 *
8581 * Well, okay, there's one more exception here: don't remove
8582 * the orphan VEBs yet. We'll wait for an explicit remove request
8583 * from up the network stack.
8584 */
8585 for (n = 0, i = 0; i < pf->num_alloc_vsi; i++) {
8586 if (pf->vsi[i] &&
8587 pf->vsi[i]->uplink_seid == uplink_seid &&
8588 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
8589 n++; /* count the VSIs */
8590 }
8591 }
8592 for (i = 0; i < I40E_MAX_VEB; i++) {
8593 if (!pf->veb[i])
8594 continue;
8595 if (pf->veb[i]->uplink_seid == uplink_seid)
8596 n++; /* count the VEBs */
8597 if (pf->veb[i]->seid == uplink_seid)
8598 veb = pf->veb[i];
8599 }
8600 if (n == 0 && veb && veb->uplink_seid != 0)
8601 i40e_veb_release(veb);
8602
8603 return 0;
8604 }
8605
8606 /**
8607 * i40e_vsi_setup_vectors - Set up the q_vectors for the given VSI
8608 * @vsi: ptr to the VSI
8609 *
8610 * This should only be called after i40e_vsi_mem_alloc() which allocates the
8611 * corresponding SW VSI structure and initializes num_queue_pairs for the
8612 * newly allocated VSI.
8613 *
8614 * Returns 0 on success or negative on failure
8615 **/
8616 static int i40e_vsi_setup_vectors(struct i40e_vsi *vsi)
8617 {
8618 int ret = -ENOENT;
8619 struct i40e_pf *pf = vsi->back;
8620
8621 if (vsi->q_vectors[0]) {
8622 dev_info(&pf->pdev->dev, "VSI %d has existing q_vectors\n",
8623 vsi->seid);
8624 return -EEXIST;
8625 }
8626
8627 if (vsi->base_vector) {
8628 dev_info(&pf->pdev->dev, "VSI %d has non-zero base vector %d\n",
8629 vsi->seid, vsi->base_vector);
8630 return -EEXIST;
8631 }
8632
8633 ret = i40e_vsi_alloc_q_vectors(vsi);
8634 if (ret) {
8635 dev_info(&pf->pdev->dev,
8636 "failed to allocate %d q_vector for VSI %d, ret=%d\n",
8637 vsi->num_q_vectors, vsi->seid, ret);
8638 vsi->num_q_vectors = 0;
8639 goto vector_setup_out;
8640 }
8641
8642 if (vsi->num_q_vectors)
8643 vsi->base_vector = i40e_get_lump(pf, pf->irq_pile,
8644 vsi->num_q_vectors, vsi->idx);
8645 if (vsi->base_vector < 0) {
8646 dev_info(&pf->pdev->dev,
8647 "failed to get tracking for %d vectors for VSI %d, err=%d\n",
8648 vsi->num_q_vectors, vsi->seid, vsi->base_vector);
8649 i40e_vsi_free_q_vectors(vsi);
8650 ret = -ENOENT;
8651 goto vector_setup_out;
8652 }
8653
8654 vector_setup_out:
8655 return ret;
8656 }
8657
8658 /**
8659 * i40e_vsi_reinit_setup - return and reallocate resources for a VSI
8660 * @vsi: pointer to the vsi.
8661 *
8662 * This re-allocates a vsi's queue resources.
8663 *
8664 * Returns pointer to the successfully allocated and configured VSI sw struct
8665 * on success, otherwise returns NULL on failure.
8666 **/
8667 static struct i40e_vsi *i40e_vsi_reinit_setup(struct i40e_vsi *vsi)
8668 {
8669 struct i40e_pf *pf = vsi->back;
8670 u8 enabled_tc;
8671 int ret;
8672
8673 i40e_put_lump(pf->qp_pile, vsi->base_queue, vsi->idx);
8674 i40e_vsi_clear_rings(vsi);
8675
8676 i40e_vsi_free_arrays(vsi, false);
8677 i40e_set_num_rings_in_vsi(vsi);
8678 ret = i40e_vsi_alloc_arrays(vsi, false);
8679 if (ret)
8680 goto err_vsi;
8681
8682 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs, vsi->idx);
8683 if (ret < 0) {
8684 dev_info(&pf->pdev->dev,
8685 "failed to get tracking for %d queues for VSI %d err=%d\n",
8686 vsi->alloc_queue_pairs, vsi->seid, ret);
8687 goto err_vsi;
8688 }
8689 vsi->base_queue = ret;
8690
8691 /* Update the FW view of the VSI. Force a reset of TC and queue
8692 * layout configurations.
8693 */
8694 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
8695 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
8696 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
8697 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
8698
8699 /* assign it some queues */
8700 ret = i40e_alloc_rings(vsi);
8701 if (ret)
8702 goto err_rings;
8703
8704 /* map all of the rings to the q_vectors */
8705 i40e_vsi_map_rings_to_vectors(vsi);
8706 return vsi;
8707
8708 err_rings:
8709 i40e_vsi_free_q_vectors(vsi);
8710 if (vsi->netdev_registered) {
8711 vsi->netdev_registered = false;
8712 unregister_netdev(vsi->netdev);
8713 free_netdev(vsi->netdev);
8714 vsi->netdev = NULL;
8715 }
8716 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
8717 err_vsi:
8718 i40e_vsi_clear(vsi);
8719 return NULL;
8720 }
8721
8722 /**
8723 * i40e_vsi_setup - Set up a VSI by a given type
8724 * @pf: board private structure
8725 * @type: VSI type
8726 * @uplink_seid: the switch element to link to
8727 * @param1: usage depends upon VSI type. For VF types, indicates VF id
8728 *
8729 * This allocates the sw VSI structure and its queue resources, then add a VSI
8730 * to the identified VEB.
8731 *
8732 * Returns pointer to the successfully allocated and configure VSI sw struct on
8733 * success, otherwise returns NULL on failure.
8734 **/
8735 struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
8736 u16 uplink_seid, u32 param1)
8737 {
8738 struct i40e_vsi *vsi = NULL;
8739 struct i40e_veb *veb = NULL;
8740 int ret, i;
8741 int v_idx;
8742
8743 /* The requested uplink_seid must be either
8744 * - the PF's port seid
8745 * no VEB is needed because this is the PF
8746 * or this is a Flow Director special case VSI
8747 * - seid of an existing VEB
8748 * - seid of a VSI that owns an existing VEB
8749 * - seid of a VSI that doesn't own a VEB
8750 * a new VEB is created and the VSI becomes the owner
8751 * - seid of the PF VSI, which is what creates the first VEB
8752 * this is a special case of the previous
8753 *
8754 * Find which uplink_seid we were given and create a new VEB if needed
8755 */
8756 for (i = 0; i < I40E_MAX_VEB; i++) {
8757 if (pf->veb[i] && pf->veb[i]->seid == uplink_seid) {
8758 veb = pf->veb[i];
8759 break;
8760 }
8761 }
8762
8763 if (!veb && uplink_seid != pf->mac_seid) {
8764
8765 for (i = 0; i < pf->num_alloc_vsi; i++) {
8766 if (pf->vsi[i] && pf->vsi[i]->seid == uplink_seid) {
8767 vsi = pf->vsi[i];
8768 break;
8769 }
8770 }
8771 if (!vsi) {
8772 dev_info(&pf->pdev->dev, "no such uplink_seid %d\n",
8773 uplink_seid);
8774 return NULL;
8775 }
8776
8777 if (vsi->uplink_seid == pf->mac_seid)
8778 veb = i40e_veb_setup(pf, 0, pf->mac_seid, vsi->seid,
8779 vsi->tc_config.enabled_tc);
8780 else if ((vsi->flags & I40E_VSI_FLAG_VEB_OWNER) == 0)
8781 veb = i40e_veb_setup(pf, 0, vsi->uplink_seid, vsi->seid,
8782 vsi->tc_config.enabled_tc);
8783 if (veb) {
8784 if (vsi->seid != pf->vsi[pf->lan_vsi]->seid) {
8785 dev_info(&vsi->back->pdev->dev,
8786 "%s: New VSI creation error, uplink seid of LAN VSI expected.\n",
8787 __func__);
8788 return NULL;
8789 }
8790 /* We come up by default in VEPA mode if SRIOV is not
8791 * already enabled, in which case we can't force VEPA
8792 * mode.
8793 */
8794 if (!(pf->flags & I40E_FLAG_VEB_MODE_ENABLED)) {
8795 veb->bridge_mode = BRIDGE_MODE_VEPA;
8796 pf->flags &= ~I40E_FLAG_VEB_MODE_ENABLED;
8797 }
8798 i40e_config_bridge_mode(veb);
8799 }
8800 for (i = 0; i < I40E_MAX_VEB && !veb; i++) {
8801 if (pf->veb[i] && pf->veb[i]->seid == vsi->uplink_seid)
8802 veb = pf->veb[i];
8803 }
8804 if (!veb) {
8805 dev_info(&pf->pdev->dev, "couldn't add VEB\n");
8806 return NULL;
8807 }
8808
8809 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
8810 uplink_seid = veb->seid;
8811 }
8812
8813 /* get vsi sw struct */
8814 v_idx = i40e_vsi_mem_alloc(pf, type);
8815 if (v_idx < 0)
8816 goto err_alloc;
8817 vsi = pf->vsi[v_idx];
8818 if (!vsi)
8819 goto err_alloc;
8820 vsi->type = type;
8821 vsi->veb_idx = (veb ? veb->idx : I40E_NO_VEB);
8822
8823 if (type == I40E_VSI_MAIN)
8824 pf->lan_vsi = v_idx;
8825 else if (type == I40E_VSI_SRIOV)
8826 vsi->vf_id = param1;
8827 /* assign it some queues */
8828 ret = i40e_get_lump(pf, pf->qp_pile, vsi->alloc_queue_pairs,
8829 vsi->idx);
8830 if (ret < 0) {
8831 dev_info(&pf->pdev->dev,
8832 "failed to get tracking for %d queues for VSI %d err=%d\n",
8833 vsi->alloc_queue_pairs, vsi->seid, ret);
8834 goto err_vsi;
8835 }
8836 vsi->base_queue = ret;
8837
8838 /* get a VSI from the hardware */
8839 vsi->uplink_seid = uplink_seid;
8840 ret = i40e_add_vsi(vsi);
8841 if (ret)
8842 goto err_vsi;
8843
8844 switch (vsi->type) {
8845 /* setup the netdev if needed */
8846 case I40E_VSI_MAIN:
8847 case I40E_VSI_VMDQ2:
8848 case I40E_VSI_FCOE:
8849 ret = i40e_config_netdev(vsi);
8850 if (ret)
8851 goto err_netdev;
8852 ret = register_netdev(vsi->netdev);
8853 if (ret)
8854 goto err_netdev;
8855 vsi->netdev_registered = true;
8856 netif_carrier_off(vsi->netdev);
8857 #ifdef CONFIG_I40E_DCB
8858 /* Setup DCB netlink interface */
8859 i40e_dcbnl_setup(vsi);
8860 #endif /* CONFIG_I40E_DCB */
8861 /* fall through */
8862
8863 case I40E_VSI_FDIR:
8864 /* set up vectors and rings if needed */
8865 ret = i40e_vsi_setup_vectors(vsi);
8866 if (ret)
8867 goto err_msix;
8868
8869 ret = i40e_alloc_rings(vsi);
8870 if (ret)
8871 goto err_rings;
8872
8873 /* map all of the rings to the q_vectors */
8874 i40e_vsi_map_rings_to_vectors(vsi);
8875
8876 i40e_vsi_reset_stats(vsi);
8877 break;
8878
8879 default:
8880 /* no netdev or rings for the other VSI types */
8881 break;
8882 }
8883
8884 return vsi;
8885
8886 err_rings:
8887 i40e_vsi_free_q_vectors(vsi);
8888 err_msix:
8889 if (vsi->netdev_registered) {
8890 vsi->netdev_registered = false;
8891 unregister_netdev(vsi->netdev);
8892 free_netdev(vsi->netdev);
8893 vsi->netdev = NULL;
8894 }
8895 err_netdev:
8896 i40e_aq_delete_element(&pf->hw, vsi->seid, NULL);
8897 err_vsi:
8898 i40e_vsi_clear(vsi);
8899 err_alloc:
8900 return NULL;
8901 }
8902
8903 /**
8904 * i40e_veb_get_bw_info - Query VEB BW information
8905 * @veb: the veb to query
8906 *
8907 * Query the Tx scheduler BW configuration data for given VEB
8908 **/
8909 static int i40e_veb_get_bw_info(struct i40e_veb *veb)
8910 {
8911 struct i40e_aqc_query_switching_comp_ets_config_resp ets_data;
8912 struct i40e_aqc_query_switching_comp_bw_config_resp bw_data;
8913 struct i40e_pf *pf = veb->pf;
8914 struct i40e_hw *hw = &pf->hw;
8915 u32 tc_bw_max;
8916 int ret = 0;
8917 int i;
8918
8919 ret = i40e_aq_query_switch_comp_bw_config(hw, veb->seid,
8920 &bw_data, NULL);
8921 if (ret) {
8922 dev_info(&pf->pdev->dev,
8923 "query veb bw config failed, aq_err=%d\n",
8924 hw->aq.asq_last_status);
8925 goto out;
8926 }
8927
8928 ret = i40e_aq_query_switch_comp_ets_config(hw, veb->seid,
8929 &ets_data, NULL);
8930 if (ret) {
8931 dev_info(&pf->pdev->dev,
8932 "query veb bw ets config failed, aq_err=%d\n",
8933 hw->aq.asq_last_status);
8934 goto out;
8935 }
8936
8937 veb->bw_limit = le16_to_cpu(ets_data.port_bw_limit);
8938 veb->bw_max_quanta = ets_data.tc_bw_max;
8939 veb->is_abs_credits = bw_data.absolute_credits_enable;
8940 veb->enabled_tc = ets_data.tc_valid_bits;
8941 tc_bw_max = le16_to_cpu(bw_data.tc_bw_max[0]) |
8942 (le16_to_cpu(bw_data.tc_bw_max[1]) << 16);
8943 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
8944 veb->bw_tc_share_credits[i] = bw_data.tc_bw_share_credits[i];
8945 veb->bw_tc_limit_credits[i] =
8946 le16_to_cpu(bw_data.tc_bw_limits[i]);
8947 veb->bw_tc_max_quanta[i] = ((tc_bw_max >> (i*4)) & 0x7);
8948 }
8949
8950 out:
8951 return ret;
8952 }
8953
8954 /**
8955 * i40e_veb_mem_alloc - Allocates the next available struct veb in the PF
8956 * @pf: board private structure
8957 *
8958 * On error: returns error code (negative)
8959 * On success: returns vsi index in PF (positive)
8960 **/
8961 static int i40e_veb_mem_alloc(struct i40e_pf *pf)
8962 {
8963 int ret = -ENOENT;
8964 struct i40e_veb *veb;
8965 int i;
8966
8967 /* Need to protect the allocation of switch elements at the PF level */
8968 mutex_lock(&pf->switch_mutex);
8969
8970 /* VEB list may be fragmented if VEB creation/destruction has
8971 * been happening. We can afford to do a quick scan to look
8972 * for any free slots in the list.
8973 *
8974 * find next empty veb slot, looping back around if necessary
8975 */
8976 i = 0;
8977 while ((i < I40E_MAX_VEB) && (pf->veb[i] != NULL))
8978 i++;
8979 if (i >= I40E_MAX_VEB) {
8980 ret = -ENOMEM;
8981 goto err_alloc_veb; /* out of VEB slots! */
8982 }
8983
8984 veb = kzalloc(sizeof(*veb), GFP_KERNEL);
8985 if (!veb) {
8986 ret = -ENOMEM;
8987 goto err_alloc_veb;
8988 }
8989 veb->pf = pf;
8990 veb->idx = i;
8991 veb->enabled_tc = 1;
8992
8993 pf->veb[i] = veb;
8994 ret = i;
8995 err_alloc_veb:
8996 mutex_unlock(&pf->switch_mutex);
8997 return ret;
8998 }
8999
9000 /**
9001 * i40e_switch_branch_release - Delete a branch of the switch tree
9002 * @branch: where to start deleting
9003 *
9004 * This uses recursion to find the tips of the branch to be
9005 * removed, deleting until we get back to and can delete this VEB.
9006 **/
9007 static void i40e_switch_branch_release(struct i40e_veb *branch)
9008 {
9009 struct i40e_pf *pf = branch->pf;
9010 u16 branch_seid = branch->seid;
9011 u16 veb_idx = branch->idx;
9012 int i;
9013
9014 /* release any VEBs on this VEB - RECURSION */
9015 for (i = 0; i < I40E_MAX_VEB; i++) {
9016 if (!pf->veb[i])
9017 continue;
9018 if (pf->veb[i]->uplink_seid == branch->seid)
9019 i40e_switch_branch_release(pf->veb[i]);
9020 }
9021
9022 /* Release the VSIs on this VEB, but not the owner VSI.
9023 *
9024 * NOTE: Removing the last VSI on a VEB has the SIDE EFFECT of removing
9025 * the VEB itself, so don't use (*branch) after this loop.
9026 */
9027 for (i = 0; i < pf->num_alloc_vsi; i++) {
9028 if (!pf->vsi[i])
9029 continue;
9030 if (pf->vsi[i]->uplink_seid == branch_seid &&
9031 (pf->vsi[i]->flags & I40E_VSI_FLAG_VEB_OWNER) == 0) {
9032 i40e_vsi_release(pf->vsi[i]);
9033 }
9034 }
9035
9036 /* There's one corner case where the VEB might not have been
9037 * removed, so double check it here and remove it if needed.
9038 * This case happens if the veb was created from the debugfs
9039 * commands and no VSIs were added to it.
9040 */
9041 if (pf->veb[veb_idx])
9042 i40e_veb_release(pf->veb[veb_idx]);
9043 }
9044
9045 /**
9046 * i40e_veb_clear - remove veb struct
9047 * @veb: the veb to remove
9048 **/
9049 static void i40e_veb_clear(struct i40e_veb *veb)
9050 {
9051 if (!veb)
9052 return;
9053
9054 if (veb->pf) {
9055 struct i40e_pf *pf = veb->pf;
9056
9057 mutex_lock(&pf->switch_mutex);
9058 if (pf->veb[veb->idx] == veb)
9059 pf->veb[veb->idx] = NULL;
9060 mutex_unlock(&pf->switch_mutex);
9061 }
9062
9063 kfree(veb);
9064 }
9065
9066 /**
9067 * i40e_veb_release - Delete a VEB and free its resources
9068 * @veb: the VEB being removed
9069 **/
9070 void i40e_veb_release(struct i40e_veb *veb)
9071 {
9072 struct i40e_vsi *vsi = NULL;
9073 struct i40e_pf *pf;
9074 int i, n = 0;
9075
9076 pf = veb->pf;
9077
9078 /* find the remaining VSI and check for extras */
9079 for (i = 0; i < pf->num_alloc_vsi; i++) {
9080 if (pf->vsi[i] && pf->vsi[i]->uplink_seid == veb->seid) {
9081 n++;
9082 vsi = pf->vsi[i];
9083 }
9084 }
9085 if (n != 1) {
9086 dev_info(&pf->pdev->dev,
9087 "can't remove VEB %d with %d VSIs left\n",
9088 veb->seid, n);
9089 return;
9090 }
9091
9092 /* move the remaining VSI to uplink veb */
9093 vsi->flags &= ~I40E_VSI_FLAG_VEB_OWNER;
9094 if (veb->uplink_seid) {
9095 vsi->uplink_seid = veb->uplink_seid;
9096 if (veb->uplink_seid == pf->mac_seid)
9097 vsi->veb_idx = I40E_NO_VEB;
9098 else
9099 vsi->veb_idx = veb->veb_idx;
9100 } else {
9101 /* floating VEB */
9102 vsi->uplink_seid = pf->vsi[pf->lan_vsi]->uplink_seid;
9103 vsi->veb_idx = pf->vsi[pf->lan_vsi]->veb_idx;
9104 }
9105
9106 i40e_aq_delete_element(&pf->hw, veb->seid, NULL);
9107 i40e_veb_clear(veb);
9108 }
9109
9110 /**
9111 * i40e_add_veb - create the VEB in the switch
9112 * @veb: the VEB to be instantiated
9113 * @vsi: the controlling VSI
9114 **/
9115 static int i40e_add_veb(struct i40e_veb *veb, struct i40e_vsi *vsi)
9116 {
9117 bool is_default = false;
9118 bool is_cloud = false;
9119 int ret;
9120
9121 /* get a VEB from the hardware */
9122 ret = i40e_aq_add_veb(&veb->pf->hw, veb->uplink_seid, vsi->seid,
9123 veb->enabled_tc, is_default,
9124 is_cloud, &veb->seid, NULL);
9125 if (ret) {
9126 dev_info(&veb->pf->pdev->dev,
9127 "couldn't add VEB, err %d, aq_err %d\n",
9128 ret, veb->pf->hw.aq.asq_last_status);
9129 return -EPERM;
9130 }
9131
9132 /* get statistics counter */
9133 ret = i40e_aq_get_veb_parameters(&veb->pf->hw, veb->seid, NULL, NULL,
9134 &veb->stats_idx, NULL, NULL, NULL);
9135 if (ret) {
9136 dev_info(&veb->pf->pdev->dev,
9137 "couldn't get VEB statistics idx, err %d, aq_err %d\n",
9138 ret, veb->pf->hw.aq.asq_last_status);
9139 return -EPERM;
9140 }
9141 ret = i40e_veb_get_bw_info(veb);
9142 if (ret) {
9143 dev_info(&veb->pf->pdev->dev,
9144 "couldn't get VEB bw info, err %d, aq_err %d\n",
9145 ret, veb->pf->hw.aq.asq_last_status);
9146 i40e_aq_delete_element(&veb->pf->hw, veb->seid, NULL);
9147 return -ENOENT;
9148 }
9149
9150 vsi->uplink_seid = veb->seid;
9151 vsi->veb_idx = veb->idx;
9152 vsi->flags |= I40E_VSI_FLAG_VEB_OWNER;
9153
9154 return 0;
9155 }
9156
9157 /**
9158 * i40e_veb_setup - Set up a VEB
9159 * @pf: board private structure
9160 * @flags: VEB setup flags
9161 * @uplink_seid: the switch element to link to
9162 * @vsi_seid: the initial VSI seid
9163 * @enabled_tc: Enabled TC bit-map
9164 *
9165 * This allocates the sw VEB structure and links it into the switch
9166 * It is possible and legal for this to be a duplicate of an already
9167 * existing VEB. It is also possible for both uplink and vsi seids
9168 * to be zero, in order to create a floating VEB.
9169 *
9170 * Returns pointer to the successfully allocated VEB sw struct on
9171 * success, otherwise returns NULL on failure.
9172 **/
9173 struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags,
9174 u16 uplink_seid, u16 vsi_seid,
9175 u8 enabled_tc)
9176 {
9177 struct i40e_veb *veb, *uplink_veb = NULL;
9178 int vsi_idx, veb_idx;
9179 int ret;
9180
9181 /* if one seid is 0, the other must be 0 to create a floating relay */
9182 if ((uplink_seid == 0 || vsi_seid == 0) &&
9183 (uplink_seid + vsi_seid != 0)) {
9184 dev_info(&pf->pdev->dev,
9185 "one, not both seid's are 0: uplink=%d vsi=%d\n",
9186 uplink_seid, vsi_seid);
9187 return NULL;
9188 }
9189
9190 /* make sure there is such a vsi and uplink */
9191 for (vsi_idx = 0; vsi_idx < pf->num_alloc_vsi; vsi_idx++)
9192 if (pf->vsi[vsi_idx] && pf->vsi[vsi_idx]->seid == vsi_seid)
9193 break;
9194 if (vsi_idx >= pf->num_alloc_vsi && vsi_seid != 0) {
9195 dev_info(&pf->pdev->dev, "vsi seid %d not found\n",
9196 vsi_seid);
9197 return NULL;
9198 }
9199
9200 if (uplink_seid && uplink_seid != pf->mac_seid) {
9201 for (veb_idx = 0; veb_idx < I40E_MAX_VEB; veb_idx++) {
9202 if (pf->veb[veb_idx] &&
9203 pf->veb[veb_idx]->seid == uplink_seid) {
9204 uplink_veb = pf->veb[veb_idx];
9205 break;
9206 }
9207 }
9208 if (!uplink_veb) {
9209 dev_info(&pf->pdev->dev,
9210 "uplink seid %d not found\n", uplink_seid);
9211 return NULL;
9212 }
9213 }
9214
9215 /* get veb sw struct */
9216 veb_idx = i40e_veb_mem_alloc(pf);
9217 if (veb_idx < 0)
9218 goto err_alloc;
9219 veb = pf->veb[veb_idx];
9220 veb->flags = flags;
9221 veb->uplink_seid = uplink_seid;
9222 veb->veb_idx = (uplink_veb ? uplink_veb->idx : I40E_NO_VEB);
9223 veb->enabled_tc = (enabled_tc ? enabled_tc : 0x1);
9224
9225 /* create the VEB in the switch */
9226 ret = i40e_add_veb(veb, pf->vsi[vsi_idx]);
9227 if (ret)
9228 goto err_veb;
9229 if (vsi_idx == pf->lan_vsi)
9230 pf->lan_veb = veb->idx;
9231
9232 return veb;
9233
9234 err_veb:
9235 i40e_veb_clear(veb);
9236 err_alloc:
9237 return NULL;
9238 }
9239
9240 /**
9241 * i40e_setup_pf_switch_element - set PF vars based on switch type
9242 * @pf: board private structure
9243 * @ele: element we are building info from
9244 * @num_reported: total number of elements
9245 * @printconfig: should we print the contents
9246 *
9247 * helper function to assist in extracting a few useful SEID values.
9248 **/
9249 static void i40e_setup_pf_switch_element(struct i40e_pf *pf,
9250 struct i40e_aqc_switch_config_element_resp *ele,
9251 u16 num_reported, bool printconfig)
9252 {
9253 u16 downlink_seid = le16_to_cpu(ele->downlink_seid);
9254 u16 uplink_seid = le16_to_cpu(ele->uplink_seid);
9255 u8 element_type = ele->element_type;
9256 u16 seid = le16_to_cpu(ele->seid);
9257
9258 if (printconfig)
9259 dev_info(&pf->pdev->dev,
9260 "type=%d seid=%d uplink=%d downlink=%d\n",
9261 element_type, seid, uplink_seid, downlink_seid);
9262
9263 switch (element_type) {
9264 case I40E_SWITCH_ELEMENT_TYPE_MAC:
9265 pf->mac_seid = seid;
9266 break;
9267 case I40E_SWITCH_ELEMENT_TYPE_VEB:
9268 /* Main VEB? */
9269 if (uplink_seid != pf->mac_seid)
9270 break;
9271 if (pf->lan_veb == I40E_NO_VEB) {
9272 int v;
9273
9274 /* find existing or else empty VEB */
9275 for (v = 0; v < I40E_MAX_VEB; v++) {
9276 if (pf->veb[v] && (pf->veb[v]->seid == seid)) {
9277 pf->lan_veb = v;
9278 break;
9279 }
9280 }
9281 if (pf->lan_veb == I40E_NO_VEB) {
9282 v = i40e_veb_mem_alloc(pf);
9283 if (v < 0)
9284 break;
9285 pf->lan_veb = v;
9286 }
9287 }
9288
9289 pf->veb[pf->lan_veb]->seid = seid;
9290 pf->veb[pf->lan_veb]->uplink_seid = pf->mac_seid;
9291 pf->veb[pf->lan_veb]->pf = pf;
9292 pf->veb[pf->lan_veb]->veb_idx = I40E_NO_VEB;
9293 break;
9294 case I40E_SWITCH_ELEMENT_TYPE_VSI:
9295 if (num_reported != 1)
9296 break;
9297 /* This is immediately after a reset so we can assume this is
9298 * the PF's VSI
9299 */
9300 pf->mac_seid = uplink_seid;
9301 pf->pf_seid = downlink_seid;
9302 pf->main_vsi_seid = seid;
9303 if (printconfig)
9304 dev_info(&pf->pdev->dev,
9305 "pf_seid=%d main_vsi_seid=%d\n",
9306 pf->pf_seid, pf->main_vsi_seid);
9307 break;
9308 case I40E_SWITCH_ELEMENT_TYPE_PF:
9309 case I40E_SWITCH_ELEMENT_TYPE_VF:
9310 case I40E_SWITCH_ELEMENT_TYPE_EMP:
9311 case I40E_SWITCH_ELEMENT_TYPE_BMC:
9312 case I40E_SWITCH_ELEMENT_TYPE_PE:
9313 case I40E_SWITCH_ELEMENT_TYPE_PA:
9314 /* ignore these for now */
9315 break;
9316 default:
9317 dev_info(&pf->pdev->dev, "unknown element type=%d seid=%d\n",
9318 element_type, seid);
9319 break;
9320 }
9321 }
9322
9323 /**
9324 * i40e_fetch_switch_configuration - Get switch config from firmware
9325 * @pf: board private structure
9326 * @printconfig: should we print the contents
9327 *
9328 * Get the current switch configuration from the device and
9329 * extract a few useful SEID values.
9330 **/
9331 int i40e_fetch_switch_configuration(struct i40e_pf *pf, bool printconfig)
9332 {
9333 struct i40e_aqc_get_switch_config_resp *sw_config;
9334 u16 next_seid = 0;
9335 int ret = 0;
9336 u8 *aq_buf;
9337 int i;
9338
9339 aq_buf = kzalloc(I40E_AQ_LARGE_BUF, GFP_KERNEL);
9340 if (!aq_buf)
9341 return -ENOMEM;
9342
9343 sw_config = (struct i40e_aqc_get_switch_config_resp *)aq_buf;
9344 do {
9345 u16 num_reported, num_total;
9346
9347 ret = i40e_aq_get_switch_config(&pf->hw, sw_config,
9348 I40E_AQ_LARGE_BUF,
9349 &next_seid, NULL);
9350 if (ret) {
9351 dev_info(&pf->pdev->dev,
9352 "get switch config failed %d aq_err=%x\n",
9353 ret, pf->hw.aq.asq_last_status);
9354 kfree(aq_buf);
9355 return -ENOENT;
9356 }
9357
9358 num_reported = le16_to_cpu(sw_config->header.num_reported);
9359 num_total = le16_to_cpu(sw_config->header.num_total);
9360
9361 if (printconfig)
9362 dev_info(&pf->pdev->dev,
9363 "header: %d reported %d total\n",
9364 num_reported, num_total);
9365
9366 for (i = 0; i < num_reported; i++) {
9367 struct i40e_aqc_switch_config_element_resp *ele =
9368 &sw_config->element[i];
9369
9370 i40e_setup_pf_switch_element(pf, ele, num_reported,
9371 printconfig);
9372 }
9373 } while (next_seid != 0);
9374
9375 kfree(aq_buf);
9376 return ret;
9377 }
9378
9379 /**
9380 * i40e_setup_pf_switch - Setup the HW switch on startup or after reset
9381 * @pf: board private structure
9382 * @reinit: if the Main VSI needs to re-initialized.
9383 *
9384 * Returns 0 on success, negative value on failure
9385 **/
9386 static int i40e_setup_pf_switch(struct i40e_pf *pf, bool reinit)
9387 {
9388 int ret;
9389
9390 /* find out what's out there already */
9391 ret = i40e_fetch_switch_configuration(pf, false);
9392 if (ret) {
9393 dev_info(&pf->pdev->dev,
9394 "couldn't fetch switch config, err %d, aq_err %d\n",
9395 ret, pf->hw.aq.asq_last_status);
9396 return ret;
9397 }
9398 i40e_pf_reset_stats(pf);
9399
9400 /* first time setup */
9401 if (pf->lan_vsi == I40E_NO_VSI || reinit) {
9402 struct i40e_vsi *vsi = NULL;
9403 u16 uplink_seid;
9404
9405 /* Set up the PF VSI associated with the PF's main VSI
9406 * that is already in the HW switch
9407 */
9408 if (pf->lan_veb != I40E_NO_VEB && pf->veb[pf->lan_veb])
9409 uplink_seid = pf->veb[pf->lan_veb]->seid;
9410 else
9411 uplink_seid = pf->mac_seid;
9412 if (pf->lan_vsi == I40E_NO_VSI)
9413 vsi = i40e_vsi_setup(pf, I40E_VSI_MAIN, uplink_seid, 0);
9414 else if (reinit)
9415 vsi = i40e_vsi_reinit_setup(pf->vsi[pf->lan_vsi]);
9416 if (!vsi) {
9417 dev_info(&pf->pdev->dev, "setup of MAIN VSI failed\n");
9418 i40e_fdir_teardown(pf);
9419 return -EAGAIN;
9420 }
9421 } else {
9422 /* force a reset of TC and queue layout configurations */
9423 u8 enabled_tc = pf->vsi[pf->lan_vsi]->tc_config.enabled_tc;
9424 pf->vsi[pf->lan_vsi]->tc_config.enabled_tc = 0;
9425 pf->vsi[pf->lan_vsi]->seid = pf->main_vsi_seid;
9426 i40e_vsi_config_tc(pf->vsi[pf->lan_vsi], enabled_tc);
9427 }
9428 i40e_vlan_stripping_disable(pf->vsi[pf->lan_vsi]);
9429
9430 i40e_fdir_sb_setup(pf);
9431
9432 /* Setup static PF queue filter control settings */
9433 ret = i40e_setup_pf_filter_control(pf);
9434 if (ret) {
9435 dev_info(&pf->pdev->dev, "setup_pf_filter_control failed: %d\n",
9436 ret);
9437 /* Failure here should not stop continuing other steps */
9438 }
9439
9440 /* enable RSS in the HW, even for only one queue, as the stack can use
9441 * the hash
9442 */
9443 if ((pf->flags & I40E_FLAG_RSS_ENABLED))
9444 i40e_config_rss(pf);
9445
9446 /* fill in link information and enable LSE reporting */
9447 i40e_aq_get_link_info(&pf->hw, true, NULL, NULL);
9448 i40e_link_event(pf);
9449
9450 /* Initialize user-specific link properties */
9451 pf->fc_autoneg_status = ((pf->hw.phy.link_info.an_info &
9452 I40E_AQ_AN_COMPLETED) ? true : false);
9453
9454 i40e_ptp_init(pf);
9455
9456 return ret;
9457 }
9458
9459 /**
9460 * i40e_determine_queue_usage - Work out queue distribution
9461 * @pf: board private structure
9462 **/
9463 static void i40e_determine_queue_usage(struct i40e_pf *pf)
9464 {
9465 int queues_left;
9466
9467 pf->num_lan_qps = 0;
9468 #ifdef I40E_FCOE
9469 pf->num_fcoe_qps = 0;
9470 #endif
9471
9472 /* Find the max queues to be put into basic use. We'll always be
9473 * using TC0, whether or not DCB is running, and TC0 will get the
9474 * big RSS set.
9475 */
9476 queues_left = pf->hw.func_caps.num_tx_qp;
9477
9478 if ((queues_left == 1) ||
9479 !(pf->flags & I40E_FLAG_MSIX_ENABLED)) {
9480 /* one qp for PF, no queues for anything else */
9481 queues_left = 0;
9482 pf->rss_size = pf->num_lan_qps = 1;
9483
9484 /* make sure all the fancies are disabled */
9485 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
9486 #ifdef I40E_FCOE
9487 I40E_FLAG_FCOE_ENABLED |
9488 #endif
9489 I40E_FLAG_FD_SB_ENABLED |
9490 I40E_FLAG_FD_ATR_ENABLED |
9491 I40E_FLAG_DCB_CAPABLE |
9492 I40E_FLAG_SRIOV_ENABLED |
9493 I40E_FLAG_VMDQ_ENABLED);
9494 } else if (!(pf->flags & (I40E_FLAG_RSS_ENABLED |
9495 I40E_FLAG_FD_SB_ENABLED |
9496 I40E_FLAG_FD_ATR_ENABLED |
9497 I40E_FLAG_DCB_CAPABLE))) {
9498 /* one qp for PF */
9499 pf->rss_size = pf->num_lan_qps = 1;
9500 queues_left -= pf->num_lan_qps;
9501
9502 pf->flags &= ~(I40E_FLAG_RSS_ENABLED |
9503 #ifdef I40E_FCOE
9504 I40E_FLAG_FCOE_ENABLED |
9505 #endif
9506 I40E_FLAG_FD_SB_ENABLED |
9507 I40E_FLAG_FD_ATR_ENABLED |
9508 I40E_FLAG_DCB_ENABLED |
9509 I40E_FLAG_VMDQ_ENABLED);
9510 } else {
9511 /* Not enough queues for all TCs */
9512 if ((pf->flags & I40E_FLAG_DCB_CAPABLE) &&
9513 (queues_left < I40E_MAX_TRAFFIC_CLASS)) {
9514 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
9515 dev_info(&pf->pdev->dev, "not enough queues for DCB. DCB is disabled.\n");
9516 }
9517 pf->num_lan_qps = max_t(int, pf->rss_size_max,
9518 num_online_cpus());
9519 pf->num_lan_qps = min_t(int, pf->num_lan_qps,
9520 pf->hw.func_caps.num_tx_qp);
9521
9522 queues_left -= pf->num_lan_qps;
9523 }
9524
9525 #ifdef I40E_FCOE
9526 if (pf->flags & I40E_FLAG_FCOE_ENABLED) {
9527 if (I40E_DEFAULT_FCOE <= queues_left) {
9528 pf->num_fcoe_qps = I40E_DEFAULT_FCOE;
9529 } else if (I40E_MINIMUM_FCOE <= queues_left) {
9530 pf->num_fcoe_qps = I40E_MINIMUM_FCOE;
9531 } else {
9532 pf->num_fcoe_qps = 0;
9533 pf->flags &= ~I40E_FLAG_FCOE_ENABLED;
9534 dev_info(&pf->pdev->dev, "not enough queues for FCoE. FCoE feature will be disabled\n");
9535 }
9536
9537 queues_left -= pf->num_fcoe_qps;
9538 }
9539
9540 #endif
9541 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
9542 if (queues_left > 1) {
9543 queues_left -= 1; /* save 1 queue for FD */
9544 } else {
9545 pf->flags &= ~I40E_FLAG_FD_SB_ENABLED;
9546 dev_info(&pf->pdev->dev, "not enough queues for Flow Director. Flow Director feature is disabled\n");
9547 }
9548 }
9549
9550 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
9551 pf->num_vf_qps && pf->num_req_vfs && queues_left) {
9552 pf->num_req_vfs = min_t(int, pf->num_req_vfs,
9553 (queues_left / pf->num_vf_qps));
9554 queues_left -= (pf->num_req_vfs * pf->num_vf_qps);
9555 }
9556
9557 if ((pf->flags & I40E_FLAG_VMDQ_ENABLED) &&
9558 pf->num_vmdq_vsis && pf->num_vmdq_qps && queues_left) {
9559 pf->num_vmdq_vsis = min_t(int, pf->num_vmdq_vsis,
9560 (queues_left / pf->num_vmdq_qps));
9561 queues_left -= (pf->num_vmdq_vsis * pf->num_vmdq_qps);
9562 }
9563
9564 pf->queues_left = queues_left;
9565 #ifdef I40E_FCOE
9566 dev_info(&pf->pdev->dev, "fcoe queues = %d\n", pf->num_fcoe_qps);
9567 #endif
9568 }
9569
9570 /**
9571 * i40e_setup_pf_filter_control - Setup PF static filter control
9572 * @pf: PF to be setup
9573 *
9574 * i40e_setup_pf_filter_control sets up a PF's initial filter control
9575 * settings. If PE/FCoE are enabled then it will also set the per PF
9576 * based filter sizes required for them. It also enables Flow director,
9577 * ethertype and macvlan type filter settings for the pf.
9578 *
9579 * Returns 0 on success, negative on failure
9580 **/
9581 static int i40e_setup_pf_filter_control(struct i40e_pf *pf)
9582 {
9583 struct i40e_filter_control_settings *settings = &pf->filter_settings;
9584
9585 settings->hash_lut_size = I40E_HASH_LUT_SIZE_128;
9586
9587 /* Flow Director is enabled */
9588 if (pf->flags & (I40E_FLAG_FD_SB_ENABLED | I40E_FLAG_FD_ATR_ENABLED))
9589 settings->enable_fdir = true;
9590
9591 /* Ethtype and MACVLAN filters enabled for PF */
9592 settings->enable_ethtype = true;
9593 settings->enable_macvlan = true;
9594
9595 if (i40e_set_filter_control(&pf->hw, settings))
9596 return -ENOENT;
9597
9598 return 0;
9599 }
9600
9601 #define INFO_STRING_LEN 255
9602 static void i40e_print_features(struct i40e_pf *pf)
9603 {
9604 struct i40e_hw *hw = &pf->hw;
9605 char *buf, *string;
9606
9607 string = kzalloc(INFO_STRING_LEN, GFP_KERNEL);
9608 if (!string) {
9609 dev_err(&pf->pdev->dev, "Features string allocation failed\n");
9610 return;
9611 }
9612
9613 buf = string;
9614
9615 buf += sprintf(string, "Features: PF-id[%d] ", hw->pf_id);
9616 #ifdef CONFIG_PCI_IOV
9617 buf += sprintf(buf, "VFs: %d ", pf->num_req_vfs);
9618 #endif
9619 buf += sprintf(buf, "VSIs: %d QP: %d RX: %s ",
9620 pf->hw.func_caps.num_vsis,
9621 pf->vsi[pf->lan_vsi]->num_queue_pairs,
9622 pf->flags & I40E_FLAG_RX_PS_ENABLED ? "PS" : "1BUF");
9623
9624 if (pf->flags & I40E_FLAG_RSS_ENABLED)
9625 buf += sprintf(buf, "RSS ");
9626 if (pf->flags & I40E_FLAG_FD_ATR_ENABLED)
9627 buf += sprintf(buf, "FD_ATR ");
9628 if (pf->flags & I40E_FLAG_FD_SB_ENABLED) {
9629 buf += sprintf(buf, "FD_SB ");
9630 buf += sprintf(buf, "NTUPLE ");
9631 }
9632 if (pf->flags & I40E_FLAG_DCB_CAPABLE)
9633 buf += sprintf(buf, "DCB ");
9634 if (pf->flags & I40E_FLAG_PTP)
9635 buf += sprintf(buf, "PTP ");
9636 #ifdef I40E_FCOE
9637 if (pf->flags & I40E_FLAG_FCOE_ENABLED)
9638 buf += sprintf(buf, "FCOE ");
9639 #endif
9640
9641 BUG_ON(buf > (string + INFO_STRING_LEN));
9642 dev_info(&pf->pdev->dev, "%s\n", string);
9643 kfree(string);
9644 }
9645
9646 /**
9647 * i40e_probe - Device initialization routine
9648 * @pdev: PCI device information struct
9649 * @ent: entry in i40e_pci_tbl
9650 *
9651 * i40e_probe initializes a PF identified by a pci_dev structure.
9652 * The OS initialization, configuring of the PF private structure,
9653 * and a hardware reset occur.
9654 *
9655 * Returns 0 on success, negative on failure
9656 **/
9657 static int i40e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
9658 {
9659 struct i40e_aq_get_phy_abilities_resp abilities;
9660 unsigned long ioremap_len;
9661 struct i40e_pf *pf;
9662 struct i40e_hw *hw;
9663 static u16 pfs_found;
9664 u16 link_status;
9665 int err = 0;
9666 u32 len;
9667 u32 i;
9668
9669 err = pci_enable_device_mem(pdev);
9670 if (err)
9671 return err;
9672
9673 /* set up for high or low dma */
9674 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
9675 if (err) {
9676 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
9677 if (err) {
9678 dev_err(&pdev->dev,
9679 "DMA configuration failed: 0x%x\n", err);
9680 goto err_dma;
9681 }
9682 }
9683
9684 /* set up pci connections */
9685 err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
9686 IORESOURCE_MEM), i40e_driver_name);
9687 if (err) {
9688 dev_info(&pdev->dev,
9689 "pci_request_selected_regions failed %d\n", err);
9690 goto err_pci_reg;
9691 }
9692
9693 pci_enable_pcie_error_reporting(pdev);
9694 pci_set_master(pdev);
9695
9696 /* Now that we have a PCI connection, we need to do the
9697 * low level device setup. This is primarily setting up
9698 * the Admin Queue structures and then querying for the
9699 * device's current profile information.
9700 */
9701 pf = kzalloc(sizeof(*pf), GFP_KERNEL);
9702 if (!pf) {
9703 err = -ENOMEM;
9704 goto err_pf_alloc;
9705 }
9706 pf->next_vsi = 0;
9707 pf->pdev = pdev;
9708 set_bit(__I40E_DOWN, &pf->state);
9709
9710 hw = &pf->hw;
9711 hw->back = pf;
9712
9713 ioremap_len = min_t(unsigned long, pci_resource_len(pdev, 0),
9714 I40E_MAX_CSR_SPACE);
9715
9716 hw->hw_addr = ioremap(pci_resource_start(pdev, 0), ioremap_len);
9717 if (!hw->hw_addr) {
9718 err = -EIO;
9719 dev_info(&pdev->dev, "ioremap(0x%04x, 0x%04x) failed: 0x%x\n",
9720 (unsigned int)pci_resource_start(pdev, 0),
9721 (unsigned int)pci_resource_len(pdev, 0), err);
9722 goto err_ioremap;
9723 }
9724 hw->vendor_id = pdev->vendor;
9725 hw->device_id = pdev->device;
9726 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
9727 hw->subsystem_vendor_id = pdev->subsystem_vendor;
9728 hw->subsystem_device_id = pdev->subsystem_device;
9729 hw->bus.device = PCI_SLOT(pdev->devfn);
9730 hw->bus.func = PCI_FUNC(pdev->devfn);
9731 pf->instance = pfs_found;
9732
9733 if (debug != -1) {
9734 pf->msg_enable = pf->hw.debug_mask;
9735 pf->msg_enable = debug;
9736 }
9737
9738 /* do a special CORER for clearing PXE mode once at init */
9739 if (hw->revision_id == 0 &&
9740 (rd32(hw, I40E_GLLAN_RCTL_0) & I40E_GLLAN_RCTL_0_PXE_MODE_MASK)) {
9741 wr32(hw, I40E_GLGEN_RTRIG, I40E_GLGEN_RTRIG_CORER_MASK);
9742 i40e_flush(hw);
9743 msleep(200);
9744 pf->corer_count++;
9745
9746 i40e_clear_pxe_mode(hw);
9747 }
9748
9749 /* Reset here to make sure all is clean and to define PF 'n' */
9750 i40e_clear_hw(hw);
9751 err = i40e_pf_reset(hw);
9752 if (err) {
9753 dev_info(&pdev->dev, "Initial pf_reset failed: %d\n", err);
9754 goto err_pf_reset;
9755 }
9756 pf->pfr_count++;
9757
9758 hw->aq.num_arq_entries = I40E_AQ_LEN;
9759 hw->aq.num_asq_entries = I40E_AQ_LEN;
9760 hw->aq.arq_buf_size = I40E_MAX_AQ_BUF_SIZE;
9761 hw->aq.asq_buf_size = I40E_MAX_AQ_BUF_SIZE;
9762 pf->adminq_work_limit = I40E_AQ_WORK_LIMIT;
9763
9764 snprintf(pf->int_name, sizeof(pf->int_name) - 1,
9765 "%s-%s:misc",
9766 dev_driver_string(&pf->pdev->dev), dev_name(&pdev->dev));
9767
9768 err = i40e_init_shared_code(hw);
9769 if (err) {
9770 dev_warn(&pdev->dev, "unidentified MAC or BLANK NVM: %d\n",
9771 err);
9772 goto err_pf_reset;
9773 }
9774
9775 /* set up a default setting for link flow control */
9776 pf->hw.fc.requested_mode = I40E_FC_NONE;
9777
9778 err = i40e_init_adminq(hw);
9779 dev_info(&pdev->dev, "%s\n", i40e_fw_version_str(hw));
9780 if (err) {
9781 dev_info(&pdev->dev,
9782 "The driver for the device stopped because the NVM image is newer than expected. You must install the most recent version of the network driver.\n");
9783 goto err_pf_reset;
9784 }
9785
9786 if (hw->aq.api_maj_ver == I40E_FW_API_VERSION_MAJOR &&
9787 hw->aq.api_min_ver > I40E_FW_API_VERSION_MINOR)
9788 dev_info(&pdev->dev,
9789 "The driver for the device detected a newer version of the NVM image than expected. Please install the most recent version of the network driver.\n");
9790 else if (hw->aq.api_maj_ver < I40E_FW_API_VERSION_MAJOR ||
9791 hw->aq.api_min_ver < (I40E_FW_API_VERSION_MINOR - 1))
9792 dev_info(&pdev->dev,
9793 "The driver for the device detected an older version of the NVM image than expected. Please update the NVM image.\n");
9794
9795 i40e_verify_eeprom(pf);
9796
9797 /* Rev 0 hardware was never productized */
9798 if (hw->revision_id < 1)
9799 dev_warn(&pdev->dev, "This device is a pre-production adapter/LOM. Please be aware there may be issues with your hardware. If you are experiencing problems please contact your Intel or hardware representative who provided you with this hardware.\n");
9800
9801 i40e_clear_pxe_mode(hw);
9802 err = i40e_get_capabilities(pf);
9803 if (err)
9804 goto err_adminq_setup;
9805
9806 err = i40e_sw_init(pf);
9807 if (err) {
9808 dev_info(&pdev->dev, "sw_init failed: %d\n", err);
9809 goto err_sw_init;
9810 }
9811
9812 err = i40e_init_lan_hmc(hw, hw->func_caps.num_tx_qp,
9813 hw->func_caps.num_rx_qp,
9814 pf->fcoe_hmc_cntx_num, pf->fcoe_hmc_filt_num);
9815 if (err) {
9816 dev_info(&pdev->dev, "init_lan_hmc failed: %d\n", err);
9817 goto err_init_lan_hmc;
9818 }
9819
9820 err = i40e_configure_lan_hmc(hw, I40E_HMC_MODEL_DIRECT_ONLY);
9821 if (err) {
9822 dev_info(&pdev->dev, "configure_lan_hmc failed: %d\n", err);
9823 err = -ENOENT;
9824 goto err_configure_lan_hmc;
9825 }
9826
9827 /* Disable LLDP for NICs that have firmware versions lower than v4.3.
9828 * Ignore error return codes because if it was already disabled via
9829 * hardware settings this will fail
9830 */
9831 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 3)) ||
9832 (pf->hw.aq.fw_maj_ver < 4)) {
9833 dev_info(&pdev->dev, "Stopping firmware LLDP agent.\n");
9834 i40e_aq_stop_lldp(hw, true, NULL);
9835 }
9836
9837 i40e_get_mac_addr(hw, hw->mac.addr);
9838 if (!is_valid_ether_addr(hw->mac.addr)) {
9839 dev_info(&pdev->dev, "invalid MAC address %pM\n", hw->mac.addr);
9840 err = -EIO;
9841 goto err_mac_addr;
9842 }
9843 dev_info(&pdev->dev, "MAC address: %pM\n", hw->mac.addr);
9844 ether_addr_copy(hw->mac.perm_addr, hw->mac.addr);
9845 i40e_get_port_mac_addr(hw, hw->mac.port_addr);
9846 if (is_valid_ether_addr(hw->mac.port_addr))
9847 pf->flags |= I40E_FLAG_PORT_ID_VALID;
9848 #ifdef I40E_FCOE
9849 err = i40e_get_san_mac_addr(hw, hw->mac.san_addr);
9850 if (err)
9851 dev_info(&pdev->dev,
9852 "(non-fatal) SAN MAC retrieval failed: %d\n", err);
9853 if (!is_valid_ether_addr(hw->mac.san_addr)) {
9854 dev_warn(&pdev->dev, "invalid SAN MAC address %pM, falling back to LAN MAC\n",
9855 hw->mac.san_addr);
9856 ether_addr_copy(hw->mac.san_addr, hw->mac.addr);
9857 }
9858 dev_info(&pf->pdev->dev, "SAN MAC: %pM\n", hw->mac.san_addr);
9859 #endif /* I40E_FCOE */
9860
9861 pci_set_drvdata(pdev, pf);
9862 pci_save_state(pdev);
9863 #ifdef CONFIG_I40E_DCB
9864 err = i40e_init_pf_dcb(pf);
9865 if (err) {
9866 dev_info(&pdev->dev, "DCB init failed %d, disabled\n", err);
9867 pf->flags &= ~I40E_FLAG_DCB_CAPABLE;
9868 /* Continue without DCB enabled */
9869 }
9870 #endif /* CONFIG_I40E_DCB */
9871
9872 /* set up periodic task facility */
9873 setup_timer(&pf->service_timer, i40e_service_timer, (unsigned long)pf);
9874 pf->service_timer_period = HZ;
9875
9876 INIT_WORK(&pf->service_task, i40e_service_task);
9877 clear_bit(__I40E_SERVICE_SCHED, &pf->state);
9878 pf->flags |= I40E_FLAG_NEED_LINK_UPDATE;
9879 pf->link_check_timeout = jiffies;
9880
9881 /* WoL defaults to disabled */
9882 pf->wol_en = false;
9883 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en);
9884
9885 /* set up the main switch operations */
9886 i40e_determine_queue_usage(pf);
9887 err = i40e_init_interrupt_scheme(pf);
9888 if (err)
9889 goto err_switch_setup;
9890
9891 /* The number of VSIs reported by the FW is the minimum guaranteed
9892 * to us; HW supports far more and we share the remaining pool with
9893 * the other PFs. We allocate space for more than the guarantee with
9894 * the understanding that we might not get them all later.
9895 */
9896 if (pf->hw.func_caps.num_vsis < I40E_MIN_VSI_ALLOC)
9897 pf->num_alloc_vsi = I40E_MIN_VSI_ALLOC;
9898 else
9899 pf->num_alloc_vsi = pf->hw.func_caps.num_vsis;
9900
9901 /* Set up the *vsi struct and our local tracking of the MAIN PF vsi. */
9902 len = sizeof(struct i40e_vsi *) * pf->num_alloc_vsi;
9903 pf->vsi = kzalloc(len, GFP_KERNEL);
9904 if (!pf->vsi) {
9905 err = -ENOMEM;
9906 goto err_switch_setup;
9907 }
9908
9909 #ifdef CONFIG_PCI_IOV
9910 /* prep for VF support */
9911 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
9912 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
9913 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
9914 if (pci_num_vf(pdev))
9915 pf->flags |= I40E_FLAG_VEB_MODE_ENABLED;
9916 }
9917 #endif
9918 err = i40e_setup_pf_switch(pf, false);
9919 if (err) {
9920 dev_info(&pdev->dev, "setup_pf_switch failed: %d\n", err);
9921 goto err_vsis;
9922 }
9923 /* if FDIR VSI was set up, start it now */
9924 for (i = 0; i < pf->num_alloc_vsi; i++) {
9925 if (pf->vsi[i] && pf->vsi[i]->type == I40E_VSI_FDIR) {
9926 i40e_vsi_open(pf->vsi[i]);
9927 break;
9928 }
9929 }
9930
9931 /* driver is only interested in link up/down and module qualification
9932 * reports from firmware
9933 */
9934 err = i40e_aq_set_phy_int_mask(&pf->hw,
9935 I40E_AQ_EVENT_LINK_UPDOWN |
9936 I40E_AQ_EVENT_MODULE_QUAL_FAIL, NULL);
9937 if (err)
9938 dev_info(&pf->pdev->dev, "set phy mask fail, aq_err %d\n", err);
9939
9940 if (((pf->hw.aq.fw_maj_ver == 4) && (pf->hw.aq.fw_min_ver < 33)) ||
9941 (pf->hw.aq.fw_maj_ver < 4)) {
9942 msleep(75);
9943 err = i40e_aq_set_link_restart_an(&pf->hw, true, NULL);
9944 if (err)
9945 dev_info(&pf->pdev->dev, "link restart failed, aq_err=%d\n",
9946 pf->hw.aq.asq_last_status);
9947 }
9948 /* The main driver is (mostly) up and happy. We need to set this state
9949 * before setting up the misc vector or we get a race and the vector
9950 * ends up disabled forever.
9951 */
9952 clear_bit(__I40E_DOWN, &pf->state);
9953
9954 /* In case of MSIX we are going to setup the misc vector right here
9955 * to handle admin queue events etc. In case of legacy and MSI
9956 * the misc functionality and queue processing is combined in
9957 * the same vector and that gets setup at open.
9958 */
9959 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
9960 err = i40e_setup_misc_vector(pf);
9961 if (err) {
9962 dev_info(&pdev->dev,
9963 "setup of misc vector failed: %d\n", err);
9964 goto err_vsis;
9965 }
9966 }
9967
9968 #ifdef CONFIG_PCI_IOV
9969 /* prep for VF support */
9970 if ((pf->flags & I40E_FLAG_SRIOV_ENABLED) &&
9971 (pf->flags & I40E_FLAG_MSIX_ENABLED) &&
9972 !test_bit(__I40E_BAD_EEPROM, &pf->state)) {
9973 u32 val;
9974
9975 /* disable link interrupts for VFs */
9976 val = rd32(hw, I40E_PFGEN_PORTMDIO_NUM);
9977 val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK;
9978 wr32(hw, I40E_PFGEN_PORTMDIO_NUM, val);
9979 i40e_flush(hw);
9980
9981 if (pci_num_vf(pdev)) {
9982 dev_info(&pdev->dev,
9983 "Active VFs found, allocating resources.\n");
9984 err = i40e_alloc_vfs(pf, pci_num_vf(pdev));
9985 if (err)
9986 dev_info(&pdev->dev,
9987 "Error %d allocating resources for existing VFs\n",
9988 err);
9989 }
9990 }
9991 #endif /* CONFIG_PCI_IOV */
9992
9993 pfs_found++;
9994
9995 i40e_dbg_pf_init(pf);
9996
9997 /* tell the firmware that we're starting */
9998 i40e_send_version(pf);
9999
10000 /* since everything's happy, start the service_task timer */
10001 mod_timer(&pf->service_timer,
10002 round_jiffies(jiffies + pf->service_timer_period));
10003
10004 #ifdef I40E_FCOE
10005 /* create FCoE interface */
10006 i40e_fcoe_vsi_setup(pf);
10007
10008 #endif
10009 /* Get the negotiated link width and speed from PCI config space */
10010 pcie_capability_read_word(pf->pdev, PCI_EXP_LNKSTA, &link_status);
10011
10012 i40e_set_pci_config_data(hw, link_status);
10013
10014 dev_info(&pdev->dev, "PCI-Express: %s %s\n",
10015 (hw->bus.speed == i40e_bus_speed_8000 ? "Speed 8.0GT/s" :
10016 hw->bus.speed == i40e_bus_speed_5000 ? "Speed 5.0GT/s" :
10017 hw->bus.speed == i40e_bus_speed_2500 ? "Speed 2.5GT/s" :
10018 "Unknown"),
10019 (hw->bus.width == i40e_bus_width_pcie_x8 ? "Width x8" :
10020 hw->bus.width == i40e_bus_width_pcie_x4 ? "Width x4" :
10021 hw->bus.width == i40e_bus_width_pcie_x2 ? "Width x2" :
10022 hw->bus.width == i40e_bus_width_pcie_x1 ? "Width x1" :
10023 "Unknown"));
10024
10025 if (hw->bus.width < i40e_bus_width_pcie_x8 ||
10026 hw->bus.speed < i40e_bus_speed_8000) {
10027 dev_warn(&pdev->dev, "PCI-Express bandwidth available for this device may be insufficient for optimal performance.\n");
10028 dev_warn(&pdev->dev, "Please move the device to a different PCI-e link with more lanes and/or higher transfer rate.\n");
10029 }
10030
10031 /* get the requested speeds from the fw */
10032 err = i40e_aq_get_phy_capabilities(hw, false, false, &abilities, NULL);
10033 if (err)
10034 dev_info(&pf->pdev->dev, "get phy abilities failed, aq_err %d, advertised speed settings may not be correct\n",
10035 err);
10036 pf->hw.phy.link_info.requested_speeds = abilities.link_speed;
10037
10038 /* print a string summarizing features */
10039 i40e_print_features(pf);
10040
10041 return 0;
10042
10043 /* Unwind what we've done if something failed in the setup */
10044 err_vsis:
10045 set_bit(__I40E_DOWN, &pf->state);
10046 i40e_clear_interrupt_scheme(pf);
10047 kfree(pf->vsi);
10048 err_switch_setup:
10049 i40e_reset_interrupt_capability(pf);
10050 del_timer_sync(&pf->service_timer);
10051 err_mac_addr:
10052 err_configure_lan_hmc:
10053 (void)i40e_shutdown_lan_hmc(hw);
10054 err_init_lan_hmc:
10055 kfree(pf->qp_pile);
10056 err_sw_init:
10057 err_adminq_setup:
10058 (void)i40e_shutdown_adminq(hw);
10059 err_pf_reset:
10060 iounmap(hw->hw_addr);
10061 err_ioremap:
10062 kfree(pf);
10063 err_pf_alloc:
10064 pci_disable_pcie_error_reporting(pdev);
10065 pci_release_selected_regions(pdev,
10066 pci_select_bars(pdev, IORESOURCE_MEM));
10067 err_pci_reg:
10068 err_dma:
10069 pci_disable_device(pdev);
10070 return err;
10071 }
10072
10073 /**
10074 * i40e_remove - Device removal routine
10075 * @pdev: PCI device information struct
10076 *
10077 * i40e_remove is called by the PCI subsystem to alert the driver
10078 * that is should release a PCI device. This could be caused by a
10079 * Hot-Plug event, or because the driver is going to be removed from
10080 * memory.
10081 **/
10082 static void i40e_remove(struct pci_dev *pdev)
10083 {
10084 struct i40e_pf *pf = pci_get_drvdata(pdev);
10085 i40e_status ret_code;
10086 int i;
10087
10088 i40e_dbg_pf_exit(pf);
10089
10090 i40e_ptp_stop(pf);
10091
10092 /* no more scheduling of any task */
10093 set_bit(__I40E_DOWN, &pf->state);
10094 del_timer_sync(&pf->service_timer);
10095 cancel_work_sync(&pf->service_task);
10096 i40e_fdir_teardown(pf);
10097
10098 if (pf->flags & I40E_FLAG_SRIOV_ENABLED) {
10099 i40e_free_vfs(pf);
10100 pf->flags &= ~I40E_FLAG_SRIOV_ENABLED;
10101 }
10102
10103 i40e_fdir_teardown(pf);
10104
10105 /* If there is a switch structure or any orphans, remove them.
10106 * This will leave only the PF's VSI remaining.
10107 */
10108 for (i = 0; i < I40E_MAX_VEB; i++) {
10109 if (!pf->veb[i])
10110 continue;
10111
10112 if (pf->veb[i]->uplink_seid == pf->mac_seid ||
10113 pf->veb[i]->uplink_seid == 0)
10114 i40e_switch_branch_release(pf->veb[i]);
10115 }
10116
10117 /* Now we can shutdown the PF's VSI, just before we kill
10118 * adminq and hmc.
10119 */
10120 if (pf->vsi[pf->lan_vsi])
10121 i40e_vsi_release(pf->vsi[pf->lan_vsi]);
10122
10123 /* shutdown and destroy the HMC */
10124 if (pf->hw.hmc.hmc_obj) {
10125 ret_code = i40e_shutdown_lan_hmc(&pf->hw);
10126 if (ret_code)
10127 dev_warn(&pdev->dev,
10128 "Failed to destroy the HMC resources: %d\n",
10129 ret_code);
10130 }
10131
10132 /* shutdown the adminq */
10133 ret_code = i40e_shutdown_adminq(&pf->hw);
10134 if (ret_code)
10135 dev_warn(&pdev->dev,
10136 "Failed to destroy the Admin Queue resources: %d\n",
10137 ret_code);
10138
10139 /* Clear all dynamic memory lists of rings, q_vectors, and VSIs */
10140 i40e_clear_interrupt_scheme(pf);
10141 for (i = 0; i < pf->num_alloc_vsi; i++) {
10142 if (pf->vsi[i]) {
10143 i40e_vsi_clear_rings(pf->vsi[i]);
10144 i40e_vsi_clear(pf->vsi[i]);
10145 pf->vsi[i] = NULL;
10146 }
10147 }
10148
10149 for (i = 0; i < I40E_MAX_VEB; i++) {
10150 kfree(pf->veb[i]);
10151 pf->veb[i] = NULL;
10152 }
10153
10154 kfree(pf->qp_pile);
10155 kfree(pf->vsi);
10156
10157 iounmap(pf->hw.hw_addr);
10158 kfree(pf);
10159 pci_release_selected_regions(pdev,
10160 pci_select_bars(pdev, IORESOURCE_MEM));
10161
10162 pci_disable_pcie_error_reporting(pdev);
10163 pci_disable_device(pdev);
10164 }
10165
10166 /**
10167 * i40e_pci_error_detected - warning that something funky happened in PCI land
10168 * @pdev: PCI device information struct
10169 *
10170 * Called to warn that something happened and the error handling steps
10171 * are in progress. Allows the driver to quiesce things, be ready for
10172 * remediation.
10173 **/
10174 static pci_ers_result_t i40e_pci_error_detected(struct pci_dev *pdev,
10175 enum pci_channel_state error)
10176 {
10177 struct i40e_pf *pf = pci_get_drvdata(pdev);
10178
10179 dev_info(&pdev->dev, "%s: error %d\n", __func__, error);
10180
10181 /* shutdown all operations */
10182 if (!test_bit(__I40E_SUSPENDED, &pf->state)) {
10183 rtnl_lock();
10184 i40e_prep_for_reset(pf);
10185 rtnl_unlock();
10186 }
10187
10188 /* Request a slot reset */
10189 return PCI_ERS_RESULT_NEED_RESET;
10190 }
10191
10192 /**
10193 * i40e_pci_error_slot_reset - a PCI slot reset just happened
10194 * @pdev: PCI device information struct
10195 *
10196 * Called to find if the driver can work with the device now that
10197 * the pci slot has been reset. If a basic connection seems good
10198 * (registers are readable and have sane content) then return a
10199 * happy little PCI_ERS_RESULT_xxx.
10200 **/
10201 static pci_ers_result_t i40e_pci_error_slot_reset(struct pci_dev *pdev)
10202 {
10203 struct i40e_pf *pf = pci_get_drvdata(pdev);
10204 pci_ers_result_t result;
10205 int err;
10206 u32 reg;
10207
10208 dev_info(&pdev->dev, "%s\n", __func__);
10209 if (pci_enable_device_mem(pdev)) {
10210 dev_info(&pdev->dev,
10211 "Cannot re-enable PCI device after reset.\n");
10212 result = PCI_ERS_RESULT_DISCONNECT;
10213 } else {
10214 pci_set_master(pdev);
10215 pci_restore_state(pdev);
10216 pci_save_state(pdev);
10217 pci_wake_from_d3(pdev, false);
10218
10219 reg = rd32(&pf->hw, I40E_GLGEN_RTRIG);
10220 if (reg == 0)
10221 result = PCI_ERS_RESULT_RECOVERED;
10222 else
10223 result = PCI_ERS_RESULT_DISCONNECT;
10224 }
10225
10226 err = pci_cleanup_aer_uncorrect_error_status(pdev);
10227 if (err) {
10228 dev_info(&pdev->dev,
10229 "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n",
10230 err);
10231 /* non-fatal, continue */
10232 }
10233
10234 return result;
10235 }
10236
10237 /**
10238 * i40e_pci_error_resume - restart operations after PCI error recovery
10239 * @pdev: PCI device information struct
10240 *
10241 * Called to allow the driver to bring things back up after PCI error
10242 * and/or reset recovery has finished.
10243 **/
10244 static void i40e_pci_error_resume(struct pci_dev *pdev)
10245 {
10246 struct i40e_pf *pf = pci_get_drvdata(pdev);
10247
10248 dev_info(&pdev->dev, "%s\n", __func__);
10249 if (test_bit(__I40E_SUSPENDED, &pf->state))
10250 return;
10251
10252 rtnl_lock();
10253 i40e_handle_reset_warning(pf);
10254 rtnl_lock();
10255 }
10256
10257 /**
10258 * i40e_shutdown - PCI callback for shutting down
10259 * @pdev: PCI device information struct
10260 **/
10261 static void i40e_shutdown(struct pci_dev *pdev)
10262 {
10263 struct i40e_pf *pf = pci_get_drvdata(pdev);
10264 struct i40e_hw *hw = &pf->hw;
10265
10266 set_bit(__I40E_SUSPENDED, &pf->state);
10267 set_bit(__I40E_DOWN, &pf->state);
10268 rtnl_lock();
10269 i40e_prep_for_reset(pf);
10270 rtnl_unlock();
10271
10272 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
10273 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
10274
10275 i40e_clear_interrupt_scheme(pf);
10276
10277 if (system_state == SYSTEM_POWER_OFF) {
10278 pci_wake_from_d3(pdev, pf->wol_en);
10279 pci_set_power_state(pdev, PCI_D3hot);
10280 }
10281 }
10282
10283 #ifdef CONFIG_PM
10284 /**
10285 * i40e_suspend - PCI callback for moving to D3
10286 * @pdev: PCI device information struct
10287 **/
10288 static int i40e_suspend(struct pci_dev *pdev, pm_message_t state)
10289 {
10290 struct i40e_pf *pf = pci_get_drvdata(pdev);
10291 struct i40e_hw *hw = &pf->hw;
10292
10293 set_bit(__I40E_SUSPENDED, &pf->state);
10294 set_bit(__I40E_DOWN, &pf->state);
10295 del_timer_sync(&pf->service_timer);
10296 cancel_work_sync(&pf->service_task);
10297 i40e_fdir_teardown(pf);
10298
10299 rtnl_lock();
10300 i40e_prep_for_reset(pf);
10301 rtnl_unlock();
10302
10303 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
10304 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
10305
10306 pci_wake_from_d3(pdev, pf->wol_en);
10307 pci_set_power_state(pdev, PCI_D3hot);
10308
10309 return 0;
10310 }
10311
10312 /**
10313 * i40e_resume - PCI callback for waking up from D3
10314 * @pdev: PCI device information struct
10315 **/
10316 static int i40e_resume(struct pci_dev *pdev)
10317 {
10318 struct i40e_pf *pf = pci_get_drvdata(pdev);
10319 u32 err;
10320
10321 pci_set_power_state(pdev, PCI_D0);
10322 pci_restore_state(pdev);
10323 /* pci_restore_state() clears dev->state_saves, so
10324 * call pci_save_state() again to restore it.
10325 */
10326 pci_save_state(pdev);
10327
10328 err = pci_enable_device_mem(pdev);
10329 if (err) {
10330 dev_err(&pdev->dev,
10331 "%s: Cannot enable PCI device from suspend\n",
10332 __func__);
10333 return err;
10334 }
10335 pci_set_master(pdev);
10336
10337 /* no wakeup events while running */
10338 pci_wake_from_d3(pdev, false);
10339
10340 /* handling the reset will rebuild the device state */
10341 if (test_and_clear_bit(__I40E_SUSPENDED, &pf->state)) {
10342 clear_bit(__I40E_DOWN, &pf->state);
10343 rtnl_lock();
10344 i40e_reset_and_rebuild(pf, false);
10345 rtnl_unlock();
10346 }
10347
10348 return 0;
10349 }
10350
10351 #endif
10352 static const struct pci_error_handlers i40e_err_handler = {
10353 .error_detected = i40e_pci_error_detected,
10354 .slot_reset = i40e_pci_error_slot_reset,
10355 .resume = i40e_pci_error_resume,
10356 };
10357
10358 static struct pci_driver i40e_driver = {
10359 .name = i40e_driver_name,
10360 .id_table = i40e_pci_tbl,
10361 .probe = i40e_probe,
10362 .remove = i40e_remove,
10363 #ifdef CONFIG_PM
10364 .suspend = i40e_suspend,
10365 .resume = i40e_resume,
10366 #endif
10367 .shutdown = i40e_shutdown,
10368 .err_handler = &i40e_err_handler,
10369 .sriov_configure = i40e_pci_sriov_configure,
10370 };
10371
10372 /**
10373 * i40e_init_module - Driver registration routine
10374 *
10375 * i40e_init_module is the first routine called when the driver is
10376 * loaded. All it does is register with the PCI subsystem.
10377 **/
10378 static int __init i40e_init_module(void)
10379 {
10380 pr_info("%s: %s - version %s\n", i40e_driver_name,
10381 i40e_driver_string, i40e_driver_version_str);
10382 pr_info("%s: %s\n", i40e_driver_name, i40e_copyright);
10383
10384 i40e_dbg_init();
10385 return pci_register_driver(&i40e_driver);
10386 }
10387 module_init(i40e_init_module);
10388
10389 /**
10390 * i40e_exit_module - Driver exit cleanup routine
10391 *
10392 * i40e_exit_module is called just before the driver is removed
10393 * from memory.
10394 **/
10395 static void __exit i40e_exit_module(void)
10396 {
10397 pci_unregister_driver(&i40e_driver);
10398 i40e_dbg_exit();
10399 }
10400 module_exit(i40e_exit_module);
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