1 /* Intel(R) Gigabit Ethernet Linux driver
2 * Copyright(c) 2007-2014 Intel Corporation.
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * You should have received a copy of the GNU General Public License along with
14 * this program; if not, see <http://www.gnu.org/licenses/>.
16 * The full GNU General Public License is included in this distribution in
17 * the file called "COPYING".
19 * Contact Information:
20 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
21 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
26 #include <linux/module.h>
27 #include <linux/types.h>
28 #include <linux/init.h>
29 #include <linux/bitops.h>
30 #include <linux/vmalloc.h>
31 #include <linux/pagemap.h>
32 #include <linux/netdevice.h>
33 #include <linux/ipv6.h>
34 #include <linux/slab.h>
35 #include <net/checksum.h>
36 #include <net/ip6_checksum.h>
37 #include <linux/net_tstamp.h>
38 #include <linux/mii.h>
39 #include <linux/ethtool.h>
41 #include <linux/if_vlan.h>
42 #include <linux/pci.h>
43 #include <linux/pci-aspm.h>
44 #include <linux/delay.h>
45 #include <linux/interrupt.h>
47 #include <linux/tcp.h>
48 #include <linux/sctp.h>
49 #include <linux/if_ether.h>
50 #include <linux/aer.h>
51 #include <linux/prefetch.h>
52 #include <linux/pm_runtime.h>
53 #include <linux/etherdevice.h>
55 #include <linux/dca.h>
57 #include <linux/i2c.h>
63 #define DRV_VERSION __stringify(MAJ) "." __stringify(MIN) "." \
64 __stringify(BUILD) "-k"
65 char igb_driver_name
[] = "igb";
66 char igb_driver_version
[] = DRV_VERSION
;
67 static const char igb_driver_string
[] =
68 "Intel(R) Gigabit Ethernet Network Driver";
69 static const char igb_copyright
[] =
70 "Copyright (c) 2007-2014 Intel Corporation.";
72 static const struct e1000_info
*igb_info_tbl
[] = {
73 [board_82575
] = &e1000_82575_info
,
76 static const struct pci_device_id igb_pci_tbl
[] = {
77 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I354_BACKPLANE_1GBPS
) },
78 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I354_SGMII
) },
79 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I354_BACKPLANE_2_5GBPS
) },
80 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I211_COPPER
), board_82575
},
81 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I210_COPPER
), board_82575
},
82 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I210_FIBER
), board_82575
},
83 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I210_SERDES
), board_82575
},
84 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I210_SGMII
), board_82575
},
85 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I210_COPPER_FLASHLESS
), board_82575
},
86 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I210_SERDES_FLASHLESS
), board_82575
},
87 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I350_COPPER
), board_82575
},
88 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I350_FIBER
), board_82575
},
89 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I350_SERDES
), board_82575
},
90 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_I350_SGMII
), board_82575
},
91 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82580_COPPER
), board_82575
},
92 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82580_FIBER
), board_82575
},
93 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82580_QUAD_FIBER
), board_82575
},
94 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82580_SERDES
), board_82575
},
95 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82580_SGMII
), board_82575
},
96 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82580_COPPER_DUAL
), board_82575
},
97 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_DH89XXCC_SGMII
), board_82575
},
98 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_DH89XXCC_SERDES
), board_82575
},
99 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_DH89XXCC_BACKPLANE
), board_82575
},
100 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_DH89XXCC_SFP
), board_82575
},
101 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576
), board_82575
},
102 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576_NS
), board_82575
},
103 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576_NS_SERDES
), board_82575
},
104 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576_FIBER
), board_82575
},
105 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576_SERDES
), board_82575
},
106 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576_SERDES_QUAD
), board_82575
},
107 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576_QUAD_COPPER_ET2
), board_82575
},
108 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82576_QUAD_COPPER
), board_82575
},
109 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82575EB_COPPER
), board_82575
},
110 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82575EB_FIBER_SERDES
), board_82575
},
111 { PCI_VDEVICE(INTEL
, E1000_DEV_ID_82575GB_QUAD_COPPER
), board_82575
},
112 /* required last entry */
116 MODULE_DEVICE_TABLE(pci
, igb_pci_tbl
);
118 static int igb_setup_all_tx_resources(struct igb_adapter
*);
119 static int igb_setup_all_rx_resources(struct igb_adapter
*);
120 static void igb_free_all_tx_resources(struct igb_adapter
*);
121 static void igb_free_all_rx_resources(struct igb_adapter
*);
122 static void igb_setup_mrqc(struct igb_adapter
*);
123 static int igb_probe(struct pci_dev
*, const struct pci_device_id
*);
124 static void igb_remove(struct pci_dev
*pdev
);
125 static int igb_sw_init(struct igb_adapter
*);
126 int igb_open(struct net_device
*);
127 int igb_close(struct net_device
*);
128 static void igb_configure(struct igb_adapter
*);
129 static void igb_configure_tx(struct igb_adapter
*);
130 static void igb_configure_rx(struct igb_adapter
*);
131 static void igb_clean_all_tx_rings(struct igb_adapter
*);
132 static void igb_clean_all_rx_rings(struct igb_adapter
*);
133 static void igb_clean_tx_ring(struct igb_ring
*);
134 static void igb_clean_rx_ring(struct igb_ring
*);
135 static void igb_set_rx_mode(struct net_device
*);
136 static void igb_update_phy_info(unsigned long);
137 static void igb_watchdog(unsigned long);
138 static void igb_watchdog_task(struct work_struct
*);
139 static netdev_tx_t
igb_xmit_frame(struct sk_buff
*skb
, struct net_device
*);
140 static void igb_get_stats64(struct net_device
*dev
,
141 struct rtnl_link_stats64
*stats
);
142 static int igb_change_mtu(struct net_device
*, int);
143 static int igb_set_mac(struct net_device
*, void *);
144 static void igb_set_uta(struct igb_adapter
*adapter
, bool set
);
145 static irqreturn_t
igb_intr(int irq
, void *);
146 static irqreturn_t
igb_intr_msi(int irq
, void *);
147 static irqreturn_t
igb_msix_other(int irq
, void *);
148 static irqreturn_t
igb_msix_ring(int irq
, void *);
149 #ifdef CONFIG_IGB_DCA
150 static void igb_update_dca(struct igb_q_vector
*);
151 static void igb_setup_dca(struct igb_adapter
*);
152 #endif /* CONFIG_IGB_DCA */
153 static int igb_poll(struct napi_struct
*, int);
154 static bool igb_clean_tx_irq(struct igb_q_vector
*, int);
155 static int igb_clean_rx_irq(struct igb_q_vector
*, int);
156 static int igb_ioctl(struct net_device
*, struct ifreq
*, int cmd
);
157 static void igb_tx_timeout(struct net_device
*);
158 static void igb_reset_task(struct work_struct
*);
159 static void igb_vlan_mode(struct net_device
*netdev
,
160 netdev_features_t features
);
161 static int igb_vlan_rx_add_vid(struct net_device
*, __be16
, u16
);
162 static int igb_vlan_rx_kill_vid(struct net_device
*, __be16
, u16
);
163 static void igb_restore_vlan(struct igb_adapter
*);
164 static void igb_rar_set_index(struct igb_adapter
*, u32
);
165 static void igb_ping_all_vfs(struct igb_adapter
*);
166 static void igb_msg_task(struct igb_adapter
*);
167 static void igb_vmm_control(struct igb_adapter
*);
168 static int igb_set_vf_mac(struct igb_adapter
*, int, unsigned char *);
169 static void igb_flush_mac_table(struct igb_adapter
*);
170 static int igb_available_rars(struct igb_adapter
*, u8
);
171 static void igb_set_default_mac_filter(struct igb_adapter
*);
172 static int igb_uc_sync(struct net_device
*, const unsigned char *);
173 static int igb_uc_unsync(struct net_device
*, const unsigned char *);
174 static void igb_restore_vf_multicasts(struct igb_adapter
*adapter
);
175 static int igb_ndo_set_vf_mac(struct net_device
*netdev
, int vf
, u8
*mac
);
176 static int igb_ndo_set_vf_vlan(struct net_device
*netdev
,
177 int vf
, u16 vlan
, u8 qos
, __be16 vlan_proto
);
178 static int igb_ndo_set_vf_bw(struct net_device
*, int, int, int);
179 static int igb_ndo_set_vf_spoofchk(struct net_device
*netdev
, int vf
,
181 static int igb_ndo_get_vf_config(struct net_device
*netdev
, int vf
,
182 struct ifla_vf_info
*ivi
);
183 static void igb_check_vf_rate_limit(struct igb_adapter
*);
184 static void igb_nfc_filter_exit(struct igb_adapter
*adapter
);
185 static void igb_nfc_filter_restore(struct igb_adapter
*adapter
);
187 #ifdef CONFIG_PCI_IOV
188 static int igb_vf_configure(struct igb_adapter
*adapter
, int vf
);
189 static int igb_pci_enable_sriov(struct pci_dev
*dev
, int num_vfs
);
190 static int igb_disable_sriov(struct pci_dev
*dev
);
191 static int igb_pci_disable_sriov(struct pci_dev
*dev
);
194 static int igb_suspend(struct device
*);
195 static int igb_resume(struct device
*);
196 static int igb_runtime_suspend(struct device
*dev
);
197 static int igb_runtime_resume(struct device
*dev
);
198 static int igb_runtime_idle(struct device
*dev
);
199 static const struct dev_pm_ops igb_pm_ops
= {
200 SET_SYSTEM_SLEEP_PM_OPS(igb_suspend
, igb_resume
)
201 SET_RUNTIME_PM_OPS(igb_runtime_suspend
, igb_runtime_resume
,
204 static void igb_shutdown(struct pci_dev
*);
205 static int igb_pci_sriov_configure(struct pci_dev
*dev
, int num_vfs
);
206 #ifdef CONFIG_IGB_DCA
207 static int igb_notify_dca(struct notifier_block
*, unsigned long, void *);
208 static struct notifier_block dca_notifier
= {
209 .notifier_call
= igb_notify_dca
,
214 #ifdef CONFIG_NET_POLL_CONTROLLER
215 /* for netdump / net console */
216 static void igb_netpoll(struct net_device
*);
218 #ifdef CONFIG_PCI_IOV
219 static unsigned int max_vfs
;
220 module_param(max_vfs
, uint
, 0);
221 MODULE_PARM_DESC(max_vfs
, "Maximum number of virtual functions to allocate per physical function");
222 #endif /* CONFIG_PCI_IOV */
224 static pci_ers_result_t
igb_io_error_detected(struct pci_dev
*,
225 pci_channel_state_t
);
226 static pci_ers_result_t
igb_io_slot_reset(struct pci_dev
*);
227 static void igb_io_resume(struct pci_dev
*);
229 static const struct pci_error_handlers igb_err_handler
= {
230 .error_detected
= igb_io_error_detected
,
231 .slot_reset
= igb_io_slot_reset
,
232 .resume
= igb_io_resume
,
235 static void igb_init_dmac(struct igb_adapter
*adapter
, u32 pba
);
237 static struct pci_driver igb_driver
= {
238 .name
= igb_driver_name
,
239 .id_table
= igb_pci_tbl
,
241 .remove
= igb_remove
,
243 .driver
.pm
= &igb_pm_ops
,
245 .shutdown
= igb_shutdown
,
246 .sriov_configure
= igb_pci_sriov_configure
,
247 .err_handler
= &igb_err_handler
250 MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
251 MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver");
252 MODULE_LICENSE("GPL");
253 MODULE_VERSION(DRV_VERSION
);
255 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
256 static int debug
= -1;
257 module_param(debug
, int, 0);
258 MODULE_PARM_DESC(debug
, "Debug level (0=none,...,16=all)");
260 struct igb_reg_info
{
265 static const struct igb_reg_info igb_reg_info_tbl
[] = {
267 /* General Registers */
268 {E1000_CTRL
, "CTRL"},
269 {E1000_STATUS
, "STATUS"},
270 {E1000_CTRL_EXT
, "CTRL_EXT"},
272 /* Interrupt Registers */
276 {E1000_RCTL
, "RCTL"},
277 {E1000_RDLEN(0), "RDLEN"},
278 {E1000_RDH(0), "RDH"},
279 {E1000_RDT(0), "RDT"},
280 {E1000_RXDCTL(0), "RXDCTL"},
281 {E1000_RDBAL(0), "RDBAL"},
282 {E1000_RDBAH(0), "RDBAH"},
285 {E1000_TCTL
, "TCTL"},
286 {E1000_TDBAL(0), "TDBAL"},
287 {E1000_TDBAH(0), "TDBAH"},
288 {E1000_TDLEN(0), "TDLEN"},
289 {E1000_TDH(0), "TDH"},
290 {E1000_TDT(0), "TDT"},
291 {E1000_TXDCTL(0), "TXDCTL"},
292 {E1000_TDFH
, "TDFH"},
293 {E1000_TDFT
, "TDFT"},
294 {E1000_TDFHS
, "TDFHS"},
295 {E1000_TDFPC
, "TDFPC"},
297 /* List Terminator */
301 /* igb_regdump - register printout routine */
302 static void igb_regdump(struct e1000_hw
*hw
, struct igb_reg_info
*reginfo
)
308 switch (reginfo
->ofs
) {
310 for (n
= 0; n
< 4; n
++)
311 regs
[n
] = rd32(E1000_RDLEN(n
));
314 for (n
= 0; n
< 4; n
++)
315 regs
[n
] = rd32(E1000_RDH(n
));
318 for (n
= 0; n
< 4; n
++)
319 regs
[n
] = rd32(E1000_RDT(n
));
321 case E1000_RXDCTL(0):
322 for (n
= 0; n
< 4; n
++)
323 regs
[n
] = rd32(E1000_RXDCTL(n
));
326 for (n
= 0; n
< 4; n
++)
327 regs
[n
] = rd32(E1000_RDBAL(n
));
330 for (n
= 0; n
< 4; n
++)
331 regs
[n
] = rd32(E1000_RDBAH(n
));
334 for (n
= 0; n
< 4; n
++)
335 regs
[n
] = rd32(E1000_RDBAL(n
));
338 for (n
= 0; n
< 4; n
++)
339 regs
[n
] = rd32(E1000_TDBAH(n
));
342 for (n
= 0; n
< 4; n
++)
343 regs
[n
] = rd32(E1000_TDLEN(n
));
346 for (n
= 0; n
< 4; n
++)
347 regs
[n
] = rd32(E1000_TDH(n
));
350 for (n
= 0; n
< 4; n
++)
351 regs
[n
] = rd32(E1000_TDT(n
));
353 case E1000_TXDCTL(0):
354 for (n
= 0; n
< 4; n
++)
355 regs
[n
] = rd32(E1000_TXDCTL(n
));
358 pr_info("%-15s %08x\n", reginfo
->name
, rd32(reginfo
->ofs
));
362 snprintf(rname
, 16, "%s%s", reginfo
->name
, "[0-3]");
363 pr_info("%-15s %08x %08x %08x %08x\n", rname
, regs
[0], regs
[1],
367 /* igb_dump - Print registers, Tx-rings and Rx-rings */
368 static void igb_dump(struct igb_adapter
*adapter
)
370 struct net_device
*netdev
= adapter
->netdev
;
371 struct e1000_hw
*hw
= &adapter
->hw
;
372 struct igb_reg_info
*reginfo
;
373 struct igb_ring
*tx_ring
;
374 union e1000_adv_tx_desc
*tx_desc
;
375 struct my_u0
{ u64 a
; u64 b
; } *u0
;
376 struct igb_ring
*rx_ring
;
377 union e1000_adv_rx_desc
*rx_desc
;
381 if (!netif_msg_hw(adapter
))
384 /* Print netdevice Info */
386 dev_info(&adapter
->pdev
->dev
, "Net device Info\n");
387 pr_info("Device Name state trans_start\n");
388 pr_info("%-15s %016lX %016lX\n", netdev
->name
,
389 netdev
->state
, dev_trans_start(netdev
));
392 /* Print Registers */
393 dev_info(&adapter
->pdev
->dev
, "Register Dump\n");
394 pr_info(" Register Name Value\n");
395 for (reginfo
= (struct igb_reg_info
*)igb_reg_info_tbl
;
396 reginfo
->name
; reginfo
++) {
397 igb_regdump(hw
, reginfo
);
400 /* Print TX Ring Summary */
401 if (!netdev
|| !netif_running(netdev
))
404 dev_info(&adapter
->pdev
->dev
, "TX Rings Summary\n");
405 pr_info("Queue [NTU] [NTC] [bi(ntc)->dma ] leng ntw timestamp\n");
406 for (n
= 0; n
< adapter
->num_tx_queues
; n
++) {
407 struct igb_tx_buffer
*buffer_info
;
408 tx_ring
= adapter
->tx_ring
[n
];
409 buffer_info
= &tx_ring
->tx_buffer_info
[tx_ring
->next_to_clean
];
410 pr_info(" %5d %5X %5X %016llX %04X %p %016llX\n",
411 n
, tx_ring
->next_to_use
, tx_ring
->next_to_clean
,
412 (u64
)dma_unmap_addr(buffer_info
, dma
),
413 dma_unmap_len(buffer_info
, len
),
414 buffer_info
->next_to_watch
,
415 (u64
)buffer_info
->time_stamp
);
419 if (!netif_msg_tx_done(adapter
))
420 goto rx_ring_summary
;
422 dev_info(&adapter
->pdev
->dev
, "TX Rings Dump\n");
424 /* Transmit Descriptor Formats
426 * Advanced Transmit Descriptor
427 * +--------------------------------------------------------------+
428 * 0 | Buffer Address [63:0] |
429 * +--------------------------------------------------------------+
430 * 8 | PAYLEN | PORTS |CC|IDX | STA | DCMD |DTYP|MAC|RSV| DTALEN |
431 * +--------------------------------------------------------------+
432 * 63 46 45 40 39 38 36 35 32 31 24 15 0
435 for (n
= 0; n
< adapter
->num_tx_queues
; n
++) {
436 tx_ring
= adapter
->tx_ring
[n
];
437 pr_info("------------------------------------\n");
438 pr_info("TX QUEUE INDEX = %d\n", tx_ring
->queue_index
);
439 pr_info("------------------------------------\n");
440 pr_info("T [desc] [address 63:0 ] [PlPOCIStDDM Ln] [bi->dma ] leng ntw timestamp bi->skb\n");
442 for (i
= 0; tx_ring
->desc
&& (i
< tx_ring
->count
); i
++) {
443 const char *next_desc
;
444 struct igb_tx_buffer
*buffer_info
;
445 tx_desc
= IGB_TX_DESC(tx_ring
, i
);
446 buffer_info
= &tx_ring
->tx_buffer_info
[i
];
447 u0
= (struct my_u0
*)tx_desc
;
448 if (i
== tx_ring
->next_to_use
&&
449 i
== tx_ring
->next_to_clean
)
450 next_desc
= " NTC/U";
451 else if (i
== tx_ring
->next_to_use
)
453 else if (i
== tx_ring
->next_to_clean
)
458 pr_info("T [0x%03X] %016llX %016llX %016llX %04X %p %016llX %p%s\n",
459 i
, le64_to_cpu(u0
->a
),
461 (u64
)dma_unmap_addr(buffer_info
, dma
),
462 dma_unmap_len(buffer_info
, len
),
463 buffer_info
->next_to_watch
,
464 (u64
)buffer_info
->time_stamp
,
465 buffer_info
->skb
, next_desc
);
467 if (netif_msg_pktdata(adapter
) && buffer_info
->skb
)
468 print_hex_dump(KERN_INFO
, "",
470 16, 1, buffer_info
->skb
->data
,
471 dma_unmap_len(buffer_info
, len
),
476 /* Print RX Rings Summary */
478 dev_info(&adapter
->pdev
->dev
, "RX Rings Summary\n");
479 pr_info("Queue [NTU] [NTC]\n");
480 for (n
= 0; n
< adapter
->num_rx_queues
; n
++) {
481 rx_ring
= adapter
->rx_ring
[n
];
482 pr_info(" %5d %5X %5X\n",
483 n
, rx_ring
->next_to_use
, rx_ring
->next_to_clean
);
487 if (!netif_msg_rx_status(adapter
))
490 dev_info(&adapter
->pdev
->dev
, "RX Rings Dump\n");
492 /* Advanced Receive Descriptor (Read) Format
494 * +-----------------------------------------------------+
495 * 0 | Packet Buffer Address [63:1] |A0/NSE|
496 * +----------------------------------------------+------+
497 * 8 | Header Buffer Address [63:1] | DD |
498 * +-----------------------------------------------------+
501 * Advanced Receive Descriptor (Write-Back) Format
503 * 63 48 47 32 31 30 21 20 17 16 4 3 0
504 * +------------------------------------------------------+
505 * 0 | Packet IP |SPH| HDR_LEN | RSV|Packet| RSS |
506 * | Checksum Ident | | | | Type | Type |
507 * +------------------------------------------------------+
508 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
509 * +------------------------------------------------------+
510 * 63 48 47 32 31 20 19 0
513 for (n
= 0; n
< adapter
->num_rx_queues
; n
++) {
514 rx_ring
= adapter
->rx_ring
[n
];
515 pr_info("------------------------------------\n");
516 pr_info("RX QUEUE INDEX = %d\n", rx_ring
->queue_index
);
517 pr_info("------------------------------------\n");
518 pr_info("R [desc] [ PktBuf A0] [ HeadBuf DD] [bi->dma ] [bi->skb] <-- Adv Rx Read format\n");
519 pr_info("RWB[desc] [PcsmIpSHl PtRs] [vl er S cks ln] ---------------- [bi->skb] <-- Adv Rx Write-Back format\n");
521 for (i
= 0; i
< rx_ring
->count
; i
++) {
522 const char *next_desc
;
523 struct igb_rx_buffer
*buffer_info
;
524 buffer_info
= &rx_ring
->rx_buffer_info
[i
];
525 rx_desc
= IGB_RX_DESC(rx_ring
, i
);
526 u0
= (struct my_u0
*)rx_desc
;
527 staterr
= le32_to_cpu(rx_desc
->wb
.upper
.status_error
);
529 if (i
== rx_ring
->next_to_use
)
531 else if (i
== rx_ring
->next_to_clean
)
536 if (staterr
& E1000_RXD_STAT_DD
) {
537 /* Descriptor Done */
538 pr_info("%s[0x%03X] %016llX %016llX ---------------- %s\n",
544 pr_info("%s[0x%03X] %016llX %016llX %016llX %s\n",
548 (u64
)buffer_info
->dma
,
551 if (netif_msg_pktdata(adapter
) &&
552 buffer_info
->dma
&& buffer_info
->page
) {
553 print_hex_dump(KERN_INFO
, "",
556 page_address(buffer_info
->page
) +
557 buffer_info
->page_offset
,
558 igb_rx_bufsz(rx_ring
), true);
569 * igb_get_i2c_data - Reads the I2C SDA data bit
570 * @hw: pointer to hardware structure
571 * @i2cctl: Current value of I2CCTL register
573 * Returns the I2C data bit value
575 static int igb_get_i2c_data(void *data
)
577 struct igb_adapter
*adapter
= (struct igb_adapter
*)data
;
578 struct e1000_hw
*hw
= &adapter
->hw
;
579 s32 i2cctl
= rd32(E1000_I2CPARAMS
);
581 return !!(i2cctl
& E1000_I2C_DATA_IN
);
585 * igb_set_i2c_data - Sets the I2C data bit
586 * @data: pointer to hardware structure
587 * @state: I2C data value (0 or 1) to set
589 * Sets the I2C data bit
591 static void igb_set_i2c_data(void *data
, int state
)
593 struct igb_adapter
*adapter
= (struct igb_adapter
*)data
;
594 struct e1000_hw
*hw
= &adapter
->hw
;
595 s32 i2cctl
= rd32(E1000_I2CPARAMS
);
598 i2cctl
|= E1000_I2C_DATA_OUT
;
600 i2cctl
&= ~E1000_I2C_DATA_OUT
;
602 i2cctl
&= ~E1000_I2C_DATA_OE_N
;
603 i2cctl
|= E1000_I2C_CLK_OE_N
;
604 wr32(E1000_I2CPARAMS
, i2cctl
);
610 * igb_set_i2c_clk - Sets the I2C SCL clock
611 * @data: pointer to hardware structure
612 * @state: state to set clock
614 * Sets the I2C clock line to state
616 static void igb_set_i2c_clk(void *data
, int state
)
618 struct igb_adapter
*adapter
= (struct igb_adapter
*)data
;
619 struct e1000_hw
*hw
= &adapter
->hw
;
620 s32 i2cctl
= rd32(E1000_I2CPARAMS
);
623 i2cctl
|= E1000_I2C_CLK_OUT
;
624 i2cctl
&= ~E1000_I2C_CLK_OE_N
;
626 i2cctl
&= ~E1000_I2C_CLK_OUT
;
627 i2cctl
&= ~E1000_I2C_CLK_OE_N
;
629 wr32(E1000_I2CPARAMS
, i2cctl
);
634 * igb_get_i2c_clk - Gets the I2C SCL clock state
635 * @data: pointer to hardware structure
637 * Gets the I2C clock state
639 static int igb_get_i2c_clk(void *data
)
641 struct igb_adapter
*adapter
= (struct igb_adapter
*)data
;
642 struct e1000_hw
*hw
= &adapter
->hw
;
643 s32 i2cctl
= rd32(E1000_I2CPARAMS
);
645 return !!(i2cctl
& E1000_I2C_CLK_IN
);
648 static const struct i2c_algo_bit_data igb_i2c_algo
= {
649 .setsda
= igb_set_i2c_data
,
650 .setscl
= igb_set_i2c_clk
,
651 .getsda
= igb_get_i2c_data
,
652 .getscl
= igb_get_i2c_clk
,
658 * igb_get_hw_dev - return device
659 * @hw: pointer to hardware structure
661 * used by hardware layer to print debugging information
663 struct net_device
*igb_get_hw_dev(struct e1000_hw
*hw
)
665 struct igb_adapter
*adapter
= hw
->back
;
666 return adapter
->netdev
;
670 * igb_init_module - Driver Registration Routine
672 * igb_init_module is the first routine called when the driver is
673 * loaded. All it does is register with the PCI subsystem.
675 static int __init
igb_init_module(void)
679 pr_info("%s - version %s\n",
680 igb_driver_string
, igb_driver_version
);
681 pr_info("%s\n", igb_copyright
);
683 #ifdef CONFIG_IGB_DCA
684 dca_register_notify(&dca_notifier
);
686 ret
= pci_register_driver(&igb_driver
);
690 module_init(igb_init_module
);
693 * igb_exit_module - Driver Exit Cleanup Routine
695 * igb_exit_module is called just before the driver is removed
698 static void __exit
igb_exit_module(void)
700 #ifdef CONFIG_IGB_DCA
701 dca_unregister_notify(&dca_notifier
);
703 pci_unregister_driver(&igb_driver
);
706 module_exit(igb_exit_module
);
708 #define Q_IDX_82576(i) (((i & 0x1) << 3) + (i >> 1))
710 * igb_cache_ring_register - Descriptor ring to register mapping
711 * @adapter: board private structure to initialize
713 * Once we know the feature-set enabled for the device, we'll cache
714 * the register offset the descriptor ring is assigned to.
716 static void igb_cache_ring_register(struct igb_adapter
*adapter
)
719 u32 rbase_offset
= adapter
->vfs_allocated_count
;
721 switch (adapter
->hw
.mac
.type
) {
723 /* The queues are allocated for virtualization such that VF 0
724 * is allocated queues 0 and 8, VF 1 queues 1 and 9, etc.
725 * In order to avoid collision we start at the first free queue
726 * and continue consuming queues in the same sequence
728 if (adapter
->vfs_allocated_count
) {
729 for (; i
< adapter
->rss_queues
; i
++)
730 adapter
->rx_ring
[i
]->reg_idx
= rbase_offset
+
742 for (; i
< adapter
->num_rx_queues
; i
++)
743 adapter
->rx_ring
[i
]->reg_idx
= rbase_offset
+ i
;
744 for (; j
< adapter
->num_tx_queues
; j
++)
745 adapter
->tx_ring
[j
]->reg_idx
= rbase_offset
+ j
;
750 u32
igb_rd32(struct e1000_hw
*hw
, u32 reg
)
752 struct igb_adapter
*igb
= container_of(hw
, struct igb_adapter
, hw
);
753 u8 __iomem
*hw_addr
= ACCESS_ONCE(hw
->hw_addr
);
756 if (E1000_REMOVED(hw_addr
))
759 value
= readl(&hw_addr
[reg
]);
761 /* reads should not return all F's */
762 if (!(~value
) && (!reg
|| !(~readl(hw_addr
)))) {
763 struct net_device
*netdev
= igb
->netdev
;
765 netif_device_detach(netdev
);
766 netdev_err(netdev
, "PCIe link lost, device now detached\n");
773 * igb_write_ivar - configure ivar for given MSI-X vector
774 * @hw: pointer to the HW structure
775 * @msix_vector: vector number we are allocating to a given ring
776 * @index: row index of IVAR register to write within IVAR table
777 * @offset: column offset of in IVAR, should be multiple of 8
779 * This function is intended to handle the writing of the IVAR register
780 * for adapters 82576 and newer. The IVAR table consists of 2 columns,
781 * each containing an cause allocation for an Rx and Tx ring, and a
782 * variable number of rows depending on the number of queues supported.
784 static void igb_write_ivar(struct e1000_hw
*hw
, int msix_vector
,
785 int index
, int offset
)
787 u32 ivar
= array_rd32(E1000_IVAR0
, index
);
789 /* clear any bits that are currently set */
790 ivar
&= ~((u32
)0xFF << offset
);
792 /* write vector and valid bit */
793 ivar
|= (msix_vector
| E1000_IVAR_VALID
) << offset
;
795 array_wr32(E1000_IVAR0
, index
, ivar
);
798 #define IGB_N0_QUEUE -1
799 static void igb_assign_vector(struct igb_q_vector
*q_vector
, int msix_vector
)
801 struct igb_adapter
*adapter
= q_vector
->adapter
;
802 struct e1000_hw
*hw
= &adapter
->hw
;
803 int rx_queue
= IGB_N0_QUEUE
;
804 int tx_queue
= IGB_N0_QUEUE
;
807 if (q_vector
->rx
.ring
)
808 rx_queue
= q_vector
->rx
.ring
->reg_idx
;
809 if (q_vector
->tx
.ring
)
810 tx_queue
= q_vector
->tx
.ring
->reg_idx
;
812 switch (hw
->mac
.type
) {
814 /* The 82575 assigns vectors using a bitmask, which matches the
815 * bitmask for the EICR/EIMS/EIMC registers. To assign one
816 * or more queues to a vector, we write the appropriate bits
817 * into the MSIXBM register for that vector.
819 if (rx_queue
> IGB_N0_QUEUE
)
820 msixbm
= E1000_EICR_RX_QUEUE0
<< rx_queue
;
821 if (tx_queue
> IGB_N0_QUEUE
)
822 msixbm
|= E1000_EICR_TX_QUEUE0
<< tx_queue
;
823 if (!(adapter
->flags
& IGB_FLAG_HAS_MSIX
) && msix_vector
== 0)
824 msixbm
|= E1000_EIMS_OTHER
;
825 array_wr32(E1000_MSIXBM(0), msix_vector
, msixbm
);
826 q_vector
->eims_value
= msixbm
;
829 /* 82576 uses a table that essentially consists of 2 columns
830 * with 8 rows. The ordering is column-major so we use the
831 * lower 3 bits as the row index, and the 4th bit as the
834 if (rx_queue
> IGB_N0_QUEUE
)
835 igb_write_ivar(hw
, msix_vector
,
837 (rx_queue
& 0x8) << 1);
838 if (tx_queue
> IGB_N0_QUEUE
)
839 igb_write_ivar(hw
, msix_vector
,
841 ((tx_queue
& 0x8) << 1) + 8);
842 q_vector
->eims_value
= BIT(msix_vector
);
849 /* On 82580 and newer adapters the scheme is similar to 82576
850 * however instead of ordering column-major we have things
851 * ordered row-major. So we traverse the table by using
852 * bit 0 as the column offset, and the remaining bits as the
855 if (rx_queue
> IGB_N0_QUEUE
)
856 igb_write_ivar(hw
, msix_vector
,
858 (rx_queue
& 0x1) << 4);
859 if (tx_queue
> IGB_N0_QUEUE
)
860 igb_write_ivar(hw
, msix_vector
,
862 ((tx_queue
& 0x1) << 4) + 8);
863 q_vector
->eims_value
= BIT(msix_vector
);
870 /* add q_vector eims value to global eims_enable_mask */
871 adapter
->eims_enable_mask
|= q_vector
->eims_value
;
873 /* configure q_vector to set itr on first interrupt */
874 q_vector
->set_itr
= 1;
878 * igb_configure_msix - Configure MSI-X hardware
879 * @adapter: board private structure to initialize
881 * igb_configure_msix sets up the hardware to properly
882 * generate MSI-X interrupts.
884 static void igb_configure_msix(struct igb_adapter
*adapter
)
888 struct e1000_hw
*hw
= &adapter
->hw
;
890 adapter
->eims_enable_mask
= 0;
892 /* set vector for other causes, i.e. link changes */
893 switch (hw
->mac
.type
) {
895 tmp
= rd32(E1000_CTRL_EXT
);
896 /* enable MSI-X PBA support*/
897 tmp
|= E1000_CTRL_EXT_PBA_CLR
;
899 /* Auto-Mask interrupts upon ICR read. */
900 tmp
|= E1000_CTRL_EXT_EIAME
;
901 tmp
|= E1000_CTRL_EXT_IRCA
;
903 wr32(E1000_CTRL_EXT
, tmp
);
905 /* enable msix_other interrupt */
906 array_wr32(E1000_MSIXBM(0), vector
++, E1000_EIMS_OTHER
);
907 adapter
->eims_other
= E1000_EIMS_OTHER
;
917 /* Turn on MSI-X capability first, or our settings
918 * won't stick. And it will take days to debug.
920 wr32(E1000_GPIE
, E1000_GPIE_MSIX_MODE
|
921 E1000_GPIE_PBA
| E1000_GPIE_EIAME
|
924 /* enable msix_other interrupt */
925 adapter
->eims_other
= BIT(vector
);
926 tmp
= (vector
++ | E1000_IVAR_VALID
) << 8;
928 wr32(E1000_IVAR_MISC
, tmp
);
931 /* do nothing, since nothing else supports MSI-X */
933 } /* switch (hw->mac.type) */
935 adapter
->eims_enable_mask
|= adapter
->eims_other
;
937 for (i
= 0; i
< adapter
->num_q_vectors
; i
++)
938 igb_assign_vector(adapter
->q_vector
[i
], vector
++);
944 * igb_request_msix - Initialize MSI-X interrupts
945 * @adapter: board private structure to initialize
947 * igb_request_msix allocates MSI-X vectors and requests interrupts from the
950 static int igb_request_msix(struct igb_adapter
*adapter
)
952 struct net_device
*netdev
= adapter
->netdev
;
953 int i
, err
= 0, vector
= 0, free_vector
= 0;
955 err
= request_irq(adapter
->msix_entries
[vector
].vector
,
956 igb_msix_other
, 0, netdev
->name
, adapter
);
960 for (i
= 0; i
< adapter
->num_q_vectors
; i
++) {
961 struct igb_q_vector
*q_vector
= adapter
->q_vector
[i
];
965 q_vector
->itr_register
= adapter
->io_addr
+ E1000_EITR(vector
);
967 if (q_vector
->rx
.ring
&& q_vector
->tx
.ring
)
968 sprintf(q_vector
->name
, "%s-TxRx-%u", netdev
->name
,
969 q_vector
->rx
.ring
->queue_index
);
970 else if (q_vector
->tx
.ring
)
971 sprintf(q_vector
->name
, "%s-tx-%u", netdev
->name
,
972 q_vector
->tx
.ring
->queue_index
);
973 else if (q_vector
->rx
.ring
)
974 sprintf(q_vector
->name
, "%s-rx-%u", netdev
->name
,
975 q_vector
->rx
.ring
->queue_index
);
977 sprintf(q_vector
->name
, "%s-unused", netdev
->name
);
979 err
= request_irq(adapter
->msix_entries
[vector
].vector
,
980 igb_msix_ring
, 0, q_vector
->name
,
986 igb_configure_msix(adapter
);
990 /* free already assigned IRQs */
991 free_irq(adapter
->msix_entries
[free_vector
++].vector
, adapter
);
994 for (i
= 0; i
< vector
; i
++) {
995 free_irq(adapter
->msix_entries
[free_vector
++].vector
,
996 adapter
->q_vector
[i
]);
1003 * igb_free_q_vector - Free memory allocated for specific interrupt vector
1004 * @adapter: board private structure to initialize
1005 * @v_idx: Index of vector to be freed
1007 * This function frees the memory allocated to the q_vector.
1009 static void igb_free_q_vector(struct igb_adapter
*adapter
, int v_idx
)
1011 struct igb_q_vector
*q_vector
= adapter
->q_vector
[v_idx
];
1013 adapter
->q_vector
[v_idx
] = NULL
;
1015 /* igb_get_stats64() might access the rings on this vector,
1016 * we must wait a grace period before freeing it.
1019 kfree_rcu(q_vector
, rcu
);
1023 * igb_reset_q_vector - Reset config for interrupt vector
1024 * @adapter: board private structure to initialize
1025 * @v_idx: Index of vector to be reset
1027 * If NAPI is enabled it will delete any references to the
1028 * NAPI struct. This is preparation for igb_free_q_vector.
1030 static void igb_reset_q_vector(struct igb_adapter
*adapter
, int v_idx
)
1032 struct igb_q_vector
*q_vector
= adapter
->q_vector
[v_idx
];
1034 /* Coming from igb_set_interrupt_capability, the vectors are not yet
1035 * allocated. So, q_vector is NULL so we should stop here.
1040 if (q_vector
->tx
.ring
)
1041 adapter
->tx_ring
[q_vector
->tx
.ring
->queue_index
] = NULL
;
1043 if (q_vector
->rx
.ring
)
1044 adapter
->rx_ring
[q_vector
->rx
.ring
->queue_index
] = NULL
;
1046 netif_napi_del(&q_vector
->napi
);
1050 static void igb_reset_interrupt_capability(struct igb_adapter
*adapter
)
1052 int v_idx
= adapter
->num_q_vectors
;
1054 if (adapter
->flags
& IGB_FLAG_HAS_MSIX
)
1055 pci_disable_msix(adapter
->pdev
);
1056 else if (adapter
->flags
& IGB_FLAG_HAS_MSI
)
1057 pci_disable_msi(adapter
->pdev
);
1060 igb_reset_q_vector(adapter
, v_idx
);
1064 * igb_free_q_vectors - Free memory allocated for interrupt vectors
1065 * @adapter: board private structure to initialize
1067 * This function frees the memory allocated to the q_vectors. In addition if
1068 * NAPI is enabled it will delete any references to the NAPI struct prior
1069 * to freeing the q_vector.
1071 static void igb_free_q_vectors(struct igb_adapter
*adapter
)
1073 int v_idx
= adapter
->num_q_vectors
;
1075 adapter
->num_tx_queues
= 0;
1076 adapter
->num_rx_queues
= 0;
1077 adapter
->num_q_vectors
= 0;
1080 igb_reset_q_vector(adapter
, v_idx
);
1081 igb_free_q_vector(adapter
, v_idx
);
1086 * igb_clear_interrupt_scheme - reset the device to a state of no interrupts
1087 * @adapter: board private structure to initialize
1089 * This function resets the device so that it has 0 Rx queues, Tx queues, and
1090 * MSI-X interrupts allocated.
1092 static void igb_clear_interrupt_scheme(struct igb_adapter
*adapter
)
1094 igb_free_q_vectors(adapter
);
1095 igb_reset_interrupt_capability(adapter
);
1099 * igb_set_interrupt_capability - set MSI or MSI-X if supported
1100 * @adapter: board private structure to initialize
1101 * @msix: boolean value of MSIX capability
1103 * Attempt to configure interrupts using the best available
1104 * capabilities of the hardware and kernel.
1106 static void igb_set_interrupt_capability(struct igb_adapter
*adapter
, bool msix
)
1113 adapter
->flags
|= IGB_FLAG_HAS_MSIX
;
1115 /* Number of supported queues. */
1116 adapter
->num_rx_queues
= adapter
->rss_queues
;
1117 if (adapter
->vfs_allocated_count
)
1118 adapter
->num_tx_queues
= 1;
1120 adapter
->num_tx_queues
= adapter
->rss_queues
;
1122 /* start with one vector for every Rx queue */
1123 numvecs
= adapter
->num_rx_queues
;
1125 /* if Tx handler is separate add 1 for every Tx queue */
1126 if (!(adapter
->flags
& IGB_FLAG_QUEUE_PAIRS
))
1127 numvecs
+= adapter
->num_tx_queues
;
1129 /* store the number of vectors reserved for queues */
1130 adapter
->num_q_vectors
= numvecs
;
1132 /* add 1 vector for link status interrupts */
1134 for (i
= 0; i
< numvecs
; i
++)
1135 adapter
->msix_entries
[i
].entry
= i
;
1137 err
= pci_enable_msix_range(adapter
->pdev
,
1138 adapter
->msix_entries
,
1144 igb_reset_interrupt_capability(adapter
);
1146 /* If we can't do MSI-X, try MSI */
1148 adapter
->flags
&= ~IGB_FLAG_HAS_MSIX
;
1149 #ifdef CONFIG_PCI_IOV
1150 /* disable SR-IOV for non MSI-X configurations */
1151 if (adapter
->vf_data
) {
1152 struct e1000_hw
*hw
= &adapter
->hw
;
1153 /* disable iov and allow time for transactions to clear */
1154 pci_disable_sriov(adapter
->pdev
);
1157 kfree(adapter
->vf_mac_list
);
1158 adapter
->vf_mac_list
= NULL
;
1159 kfree(adapter
->vf_data
);
1160 adapter
->vf_data
= NULL
;
1161 wr32(E1000_IOVCTL
, E1000_IOVCTL_REUSE_VFQ
);
1164 dev_info(&adapter
->pdev
->dev
, "IOV Disabled\n");
1167 adapter
->vfs_allocated_count
= 0;
1168 adapter
->rss_queues
= 1;
1169 adapter
->flags
|= IGB_FLAG_QUEUE_PAIRS
;
1170 adapter
->num_rx_queues
= 1;
1171 adapter
->num_tx_queues
= 1;
1172 adapter
->num_q_vectors
= 1;
1173 if (!pci_enable_msi(adapter
->pdev
))
1174 adapter
->flags
|= IGB_FLAG_HAS_MSI
;
1177 static void igb_add_ring(struct igb_ring
*ring
,
1178 struct igb_ring_container
*head
)
1185 * igb_alloc_q_vector - Allocate memory for a single interrupt vector
1186 * @adapter: board private structure to initialize
1187 * @v_count: q_vectors allocated on adapter, used for ring interleaving
1188 * @v_idx: index of vector in adapter struct
1189 * @txr_count: total number of Tx rings to allocate
1190 * @txr_idx: index of first Tx ring to allocate
1191 * @rxr_count: total number of Rx rings to allocate
1192 * @rxr_idx: index of first Rx ring to allocate
1194 * We allocate one q_vector. If allocation fails we return -ENOMEM.
1196 static int igb_alloc_q_vector(struct igb_adapter
*adapter
,
1197 int v_count
, int v_idx
,
1198 int txr_count
, int txr_idx
,
1199 int rxr_count
, int rxr_idx
)
1201 struct igb_q_vector
*q_vector
;
1202 struct igb_ring
*ring
;
1203 int ring_count
, size
;
1205 /* igb only supports 1 Tx and/or 1 Rx queue per vector */
1206 if (txr_count
> 1 || rxr_count
> 1)
1209 ring_count
= txr_count
+ rxr_count
;
1210 size
= sizeof(struct igb_q_vector
) +
1211 (sizeof(struct igb_ring
) * ring_count
);
1213 /* allocate q_vector and rings */
1214 q_vector
= adapter
->q_vector
[v_idx
];
1216 q_vector
= kzalloc(size
, GFP_KERNEL
);
1217 } else if (size
> ksize(q_vector
)) {
1218 kfree_rcu(q_vector
, rcu
);
1219 q_vector
= kzalloc(size
, GFP_KERNEL
);
1221 memset(q_vector
, 0, size
);
1226 /* initialize NAPI */
1227 netif_napi_add(adapter
->netdev
, &q_vector
->napi
,
1230 /* tie q_vector and adapter together */
1231 adapter
->q_vector
[v_idx
] = q_vector
;
1232 q_vector
->adapter
= adapter
;
1234 /* initialize work limits */
1235 q_vector
->tx
.work_limit
= adapter
->tx_work_limit
;
1237 /* initialize ITR configuration */
1238 q_vector
->itr_register
= adapter
->io_addr
+ E1000_EITR(0);
1239 q_vector
->itr_val
= IGB_START_ITR
;
1241 /* initialize pointer to rings */
1242 ring
= q_vector
->ring
;
1246 /* rx or rx/tx vector */
1247 if (!adapter
->rx_itr_setting
|| adapter
->rx_itr_setting
> 3)
1248 q_vector
->itr_val
= adapter
->rx_itr_setting
;
1250 /* tx only vector */
1251 if (!adapter
->tx_itr_setting
|| adapter
->tx_itr_setting
> 3)
1252 q_vector
->itr_val
= adapter
->tx_itr_setting
;
1256 /* assign generic ring traits */
1257 ring
->dev
= &adapter
->pdev
->dev
;
1258 ring
->netdev
= adapter
->netdev
;
1260 /* configure backlink on ring */
1261 ring
->q_vector
= q_vector
;
1263 /* update q_vector Tx values */
1264 igb_add_ring(ring
, &q_vector
->tx
);
1266 /* For 82575, context index must be unique per ring. */
1267 if (adapter
->hw
.mac
.type
== e1000_82575
)
1268 set_bit(IGB_RING_FLAG_TX_CTX_IDX
, &ring
->flags
);
1270 /* apply Tx specific ring traits */
1271 ring
->count
= adapter
->tx_ring_count
;
1272 ring
->queue_index
= txr_idx
;
1274 u64_stats_init(&ring
->tx_syncp
);
1275 u64_stats_init(&ring
->tx_syncp2
);
1277 /* assign ring to adapter */
1278 adapter
->tx_ring
[txr_idx
] = ring
;
1280 /* push pointer to next ring */
1285 /* assign generic ring traits */
1286 ring
->dev
= &adapter
->pdev
->dev
;
1287 ring
->netdev
= adapter
->netdev
;
1289 /* configure backlink on ring */
1290 ring
->q_vector
= q_vector
;
1292 /* update q_vector Rx values */
1293 igb_add_ring(ring
, &q_vector
->rx
);
1295 /* set flag indicating ring supports SCTP checksum offload */
1296 if (adapter
->hw
.mac
.type
>= e1000_82576
)
1297 set_bit(IGB_RING_FLAG_RX_SCTP_CSUM
, &ring
->flags
);
1299 /* On i350, i354, i210, and i211, loopback VLAN packets
1300 * have the tag byte-swapped.
1302 if (adapter
->hw
.mac
.type
>= e1000_i350
)
1303 set_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP
, &ring
->flags
);
1305 /* apply Rx specific ring traits */
1306 ring
->count
= adapter
->rx_ring_count
;
1307 ring
->queue_index
= rxr_idx
;
1309 u64_stats_init(&ring
->rx_syncp
);
1311 /* assign ring to adapter */
1312 adapter
->rx_ring
[rxr_idx
] = ring
;
1320 * igb_alloc_q_vectors - Allocate memory for interrupt vectors
1321 * @adapter: board private structure to initialize
1323 * We allocate one q_vector per queue interrupt. If allocation fails we
1326 static int igb_alloc_q_vectors(struct igb_adapter
*adapter
)
1328 int q_vectors
= adapter
->num_q_vectors
;
1329 int rxr_remaining
= adapter
->num_rx_queues
;
1330 int txr_remaining
= adapter
->num_tx_queues
;
1331 int rxr_idx
= 0, txr_idx
= 0, v_idx
= 0;
1334 if (q_vectors
>= (rxr_remaining
+ txr_remaining
)) {
1335 for (; rxr_remaining
; v_idx
++) {
1336 err
= igb_alloc_q_vector(adapter
, q_vectors
, v_idx
,
1342 /* update counts and index */
1348 for (; v_idx
< q_vectors
; v_idx
++) {
1349 int rqpv
= DIV_ROUND_UP(rxr_remaining
, q_vectors
- v_idx
);
1350 int tqpv
= DIV_ROUND_UP(txr_remaining
, q_vectors
- v_idx
);
1352 err
= igb_alloc_q_vector(adapter
, q_vectors
, v_idx
,
1353 tqpv
, txr_idx
, rqpv
, rxr_idx
);
1358 /* update counts and index */
1359 rxr_remaining
-= rqpv
;
1360 txr_remaining
-= tqpv
;
1368 adapter
->num_tx_queues
= 0;
1369 adapter
->num_rx_queues
= 0;
1370 adapter
->num_q_vectors
= 0;
1373 igb_free_q_vector(adapter
, v_idx
);
1379 * igb_init_interrupt_scheme - initialize interrupts, allocate queues/vectors
1380 * @adapter: board private structure to initialize
1381 * @msix: boolean value of MSIX capability
1383 * This function initializes the interrupts and allocates all of the queues.
1385 static int igb_init_interrupt_scheme(struct igb_adapter
*adapter
, bool msix
)
1387 struct pci_dev
*pdev
= adapter
->pdev
;
1390 igb_set_interrupt_capability(adapter
, msix
);
1392 err
= igb_alloc_q_vectors(adapter
);
1394 dev_err(&pdev
->dev
, "Unable to allocate memory for vectors\n");
1395 goto err_alloc_q_vectors
;
1398 igb_cache_ring_register(adapter
);
1402 err_alloc_q_vectors
:
1403 igb_reset_interrupt_capability(adapter
);
1408 * igb_request_irq - initialize interrupts
1409 * @adapter: board private structure to initialize
1411 * Attempts to configure interrupts using the best available
1412 * capabilities of the hardware and kernel.
1414 static int igb_request_irq(struct igb_adapter
*adapter
)
1416 struct net_device
*netdev
= adapter
->netdev
;
1417 struct pci_dev
*pdev
= adapter
->pdev
;
1420 if (adapter
->flags
& IGB_FLAG_HAS_MSIX
) {
1421 err
= igb_request_msix(adapter
);
1424 /* fall back to MSI */
1425 igb_free_all_tx_resources(adapter
);
1426 igb_free_all_rx_resources(adapter
);
1428 igb_clear_interrupt_scheme(adapter
);
1429 err
= igb_init_interrupt_scheme(adapter
, false);
1433 igb_setup_all_tx_resources(adapter
);
1434 igb_setup_all_rx_resources(adapter
);
1435 igb_configure(adapter
);
1438 igb_assign_vector(adapter
->q_vector
[0], 0);
1440 if (adapter
->flags
& IGB_FLAG_HAS_MSI
) {
1441 err
= request_irq(pdev
->irq
, igb_intr_msi
, 0,
1442 netdev
->name
, adapter
);
1446 /* fall back to legacy interrupts */
1447 igb_reset_interrupt_capability(adapter
);
1448 adapter
->flags
&= ~IGB_FLAG_HAS_MSI
;
1451 err
= request_irq(pdev
->irq
, igb_intr
, IRQF_SHARED
,
1452 netdev
->name
, adapter
);
1455 dev_err(&pdev
->dev
, "Error %d getting interrupt\n",
1462 static void igb_free_irq(struct igb_adapter
*adapter
)
1464 if (adapter
->flags
& IGB_FLAG_HAS_MSIX
) {
1467 free_irq(adapter
->msix_entries
[vector
++].vector
, adapter
);
1469 for (i
= 0; i
< adapter
->num_q_vectors
; i
++)
1470 free_irq(adapter
->msix_entries
[vector
++].vector
,
1471 adapter
->q_vector
[i
]);
1473 free_irq(adapter
->pdev
->irq
, adapter
);
1478 * igb_irq_disable - Mask off interrupt generation on the NIC
1479 * @adapter: board private structure
1481 static void igb_irq_disable(struct igb_adapter
*adapter
)
1483 struct e1000_hw
*hw
= &adapter
->hw
;
1485 /* we need to be careful when disabling interrupts. The VFs are also
1486 * mapped into these registers and so clearing the bits can cause
1487 * issues on the VF drivers so we only need to clear what we set
1489 if (adapter
->flags
& IGB_FLAG_HAS_MSIX
) {
1490 u32 regval
= rd32(E1000_EIAM
);
1492 wr32(E1000_EIAM
, regval
& ~adapter
->eims_enable_mask
);
1493 wr32(E1000_EIMC
, adapter
->eims_enable_mask
);
1494 regval
= rd32(E1000_EIAC
);
1495 wr32(E1000_EIAC
, regval
& ~adapter
->eims_enable_mask
);
1499 wr32(E1000_IMC
, ~0);
1501 if (adapter
->flags
& IGB_FLAG_HAS_MSIX
) {
1504 for (i
= 0; i
< adapter
->num_q_vectors
; i
++)
1505 synchronize_irq(adapter
->msix_entries
[i
].vector
);
1507 synchronize_irq(adapter
->pdev
->irq
);
1512 * igb_irq_enable - Enable default interrupt generation settings
1513 * @adapter: board private structure
1515 static void igb_irq_enable(struct igb_adapter
*adapter
)
1517 struct e1000_hw
*hw
= &adapter
->hw
;
1519 if (adapter
->flags
& IGB_FLAG_HAS_MSIX
) {
1520 u32 ims
= E1000_IMS_LSC
| E1000_IMS_DOUTSYNC
| E1000_IMS_DRSTA
;
1521 u32 regval
= rd32(E1000_EIAC
);
1523 wr32(E1000_EIAC
, regval
| adapter
->eims_enable_mask
);
1524 regval
= rd32(E1000_EIAM
);
1525 wr32(E1000_EIAM
, regval
| adapter
->eims_enable_mask
);
1526 wr32(E1000_EIMS
, adapter
->eims_enable_mask
);
1527 if (adapter
->vfs_allocated_count
) {
1528 wr32(E1000_MBVFIMR
, 0xFF);
1529 ims
|= E1000_IMS_VMMB
;
1531 wr32(E1000_IMS
, ims
);
1533 wr32(E1000_IMS
, IMS_ENABLE_MASK
|
1535 wr32(E1000_IAM
, IMS_ENABLE_MASK
|
1540 static void igb_update_mng_vlan(struct igb_adapter
*adapter
)
1542 struct e1000_hw
*hw
= &adapter
->hw
;
1543 u16 pf_id
= adapter
->vfs_allocated_count
;
1544 u16 vid
= adapter
->hw
.mng_cookie
.vlan_id
;
1545 u16 old_vid
= adapter
->mng_vlan_id
;
1547 if (hw
->mng_cookie
.status
& E1000_MNG_DHCP_COOKIE_STATUS_VLAN
) {
1548 /* add VID to filter table */
1549 igb_vfta_set(hw
, vid
, pf_id
, true, true);
1550 adapter
->mng_vlan_id
= vid
;
1552 adapter
->mng_vlan_id
= IGB_MNG_VLAN_NONE
;
1555 if ((old_vid
!= (u16
)IGB_MNG_VLAN_NONE
) &&
1557 !test_bit(old_vid
, adapter
->active_vlans
)) {
1558 /* remove VID from filter table */
1559 igb_vfta_set(hw
, vid
, pf_id
, false, true);
1564 * igb_release_hw_control - release control of the h/w to f/w
1565 * @adapter: address of board private structure
1567 * igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
1568 * For ASF and Pass Through versions of f/w this means that the
1569 * driver is no longer loaded.
1571 static void igb_release_hw_control(struct igb_adapter
*adapter
)
1573 struct e1000_hw
*hw
= &adapter
->hw
;
1576 /* Let firmware take over control of h/w */
1577 ctrl_ext
= rd32(E1000_CTRL_EXT
);
1578 wr32(E1000_CTRL_EXT
,
1579 ctrl_ext
& ~E1000_CTRL_EXT_DRV_LOAD
);
1583 * igb_get_hw_control - get control of the h/w from f/w
1584 * @adapter: address of board private structure
1586 * igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit.
1587 * For ASF and Pass Through versions of f/w this means that
1588 * the driver is loaded.
1590 static void igb_get_hw_control(struct igb_adapter
*adapter
)
1592 struct e1000_hw
*hw
= &adapter
->hw
;
1595 /* Let firmware know the driver has taken over */
1596 ctrl_ext
= rd32(E1000_CTRL_EXT
);
1597 wr32(E1000_CTRL_EXT
,
1598 ctrl_ext
| E1000_CTRL_EXT_DRV_LOAD
);
1602 * igb_configure - configure the hardware for RX and TX
1603 * @adapter: private board structure
1605 static void igb_configure(struct igb_adapter
*adapter
)
1607 struct net_device
*netdev
= adapter
->netdev
;
1610 igb_get_hw_control(adapter
);
1611 igb_set_rx_mode(netdev
);
1613 igb_restore_vlan(adapter
);
1615 igb_setup_tctl(adapter
);
1616 igb_setup_mrqc(adapter
);
1617 igb_setup_rctl(adapter
);
1619 igb_nfc_filter_restore(adapter
);
1620 igb_configure_tx(adapter
);
1621 igb_configure_rx(adapter
);
1623 igb_rx_fifo_flush_82575(&adapter
->hw
);
1625 /* call igb_desc_unused which always leaves
1626 * at least 1 descriptor unused to make sure
1627 * next_to_use != next_to_clean
1629 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
1630 struct igb_ring
*ring
= adapter
->rx_ring
[i
];
1631 igb_alloc_rx_buffers(ring
, igb_desc_unused(ring
));
1636 * igb_power_up_link - Power up the phy/serdes link
1637 * @adapter: address of board private structure
1639 void igb_power_up_link(struct igb_adapter
*adapter
)
1641 igb_reset_phy(&adapter
->hw
);
1643 if (adapter
->hw
.phy
.media_type
== e1000_media_type_copper
)
1644 igb_power_up_phy_copper(&adapter
->hw
);
1646 igb_power_up_serdes_link_82575(&adapter
->hw
);
1648 igb_setup_link(&adapter
->hw
);
1652 * igb_power_down_link - Power down the phy/serdes link
1653 * @adapter: address of board private structure
1655 static void igb_power_down_link(struct igb_adapter
*adapter
)
1657 if (adapter
->hw
.phy
.media_type
== e1000_media_type_copper
)
1658 igb_power_down_phy_copper_82575(&adapter
->hw
);
1660 igb_shutdown_serdes_link_82575(&adapter
->hw
);
1664 * Detect and switch function for Media Auto Sense
1665 * @adapter: address of the board private structure
1667 static void igb_check_swap_media(struct igb_adapter
*adapter
)
1669 struct e1000_hw
*hw
= &adapter
->hw
;
1670 u32 ctrl_ext
, connsw
;
1671 bool swap_now
= false;
1673 ctrl_ext
= rd32(E1000_CTRL_EXT
);
1674 connsw
= rd32(E1000_CONNSW
);
1676 /* need to live swap if current media is copper and we have fiber/serdes
1680 if ((hw
->phy
.media_type
== e1000_media_type_copper
) &&
1681 (!(connsw
& E1000_CONNSW_AUTOSENSE_EN
))) {
1683 } else if (!(connsw
& E1000_CONNSW_SERDESD
)) {
1684 /* copper signal takes time to appear */
1685 if (adapter
->copper_tries
< 4) {
1686 adapter
->copper_tries
++;
1687 connsw
|= E1000_CONNSW_AUTOSENSE_CONF
;
1688 wr32(E1000_CONNSW
, connsw
);
1691 adapter
->copper_tries
= 0;
1692 if ((connsw
& E1000_CONNSW_PHYSD
) &&
1693 (!(connsw
& E1000_CONNSW_PHY_PDN
))) {
1695 connsw
&= ~E1000_CONNSW_AUTOSENSE_CONF
;
1696 wr32(E1000_CONNSW
, connsw
);
1704 switch (hw
->phy
.media_type
) {
1705 case e1000_media_type_copper
:
1706 netdev_info(adapter
->netdev
,
1707 "MAS: changing media to fiber/serdes\n");
1709 E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES
;
1710 adapter
->flags
|= IGB_FLAG_MEDIA_RESET
;
1711 adapter
->copper_tries
= 0;
1713 case e1000_media_type_internal_serdes
:
1714 case e1000_media_type_fiber
:
1715 netdev_info(adapter
->netdev
,
1716 "MAS: changing media to copper\n");
1718 ~E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES
;
1719 adapter
->flags
|= IGB_FLAG_MEDIA_RESET
;
1722 /* shouldn't get here during regular operation */
1723 netdev_err(adapter
->netdev
,
1724 "AMS: Invalid media type found, returning\n");
1727 wr32(E1000_CTRL_EXT
, ctrl_ext
);
1731 * igb_up - Open the interface and prepare it to handle traffic
1732 * @adapter: board private structure
1734 int igb_up(struct igb_adapter
*adapter
)
1736 struct e1000_hw
*hw
= &adapter
->hw
;
1739 /* hardware has been reset, we need to reload some things */
1740 igb_configure(adapter
);
1742 clear_bit(__IGB_DOWN
, &adapter
->state
);
1744 for (i
= 0; i
< adapter
->num_q_vectors
; i
++)
1745 napi_enable(&(adapter
->q_vector
[i
]->napi
));
1747 if (adapter
->flags
& IGB_FLAG_HAS_MSIX
)
1748 igb_configure_msix(adapter
);
1750 igb_assign_vector(adapter
->q_vector
[0], 0);
1752 /* Clear any pending interrupts. */
1754 igb_irq_enable(adapter
);
1756 /* notify VFs that reset has been completed */
1757 if (adapter
->vfs_allocated_count
) {
1758 u32 reg_data
= rd32(E1000_CTRL_EXT
);
1760 reg_data
|= E1000_CTRL_EXT_PFRSTD
;
1761 wr32(E1000_CTRL_EXT
, reg_data
);
1764 netif_tx_start_all_queues(adapter
->netdev
);
1766 /* start the watchdog. */
1767 hw
->mac
.get_link_status
= 1;
1768 schedule_work(&adapter
->watchdog_task
);
1770 if ((adapter
->flags
& IGB_FLAG_EEE
) &&
1771 (!hw
->dev_spec
._82575
.eee_disable
))
1772 adapter
->eee_advert
= MDIO_EEE_100TX
| MDIO_EEE_1000T
;
1777 void igb_down(struct igb_adapter
*adapter
)
1779 struct net_device
*netdev
= adapter
->netdev
;
1780 struct e1000_hw
*hw
= &adapter
->hw
;
1784 /* signal that we're down so the interrupt handler does not
1785 * reschedule our watchdog timer
1787 set_bit(__IGB_DOWN
, &adapter
->state
);
1789 /* disable receives in the hardware */
1790 rctl
= rd32(E1000_RCTL
);
1791 wr32(E1000_RCTL
, rctl
& ~E1000_RCTL_EN
);
1792 /* flush and sleep below */
1794 igb_nfc_filter_exit(adapter
);
1796 netif_carrier_off(netdev
);
1797 netif_tx_stop_all_queues(netdev
);
1799 /* disable transmits in the hardware */
1800 tctl
= rd32(E1000_TCTL
);
1801 tctl
&= ~E1000_TCTL_EN
;
1802 wr32(E1000_TCTL
, tctl
);
1803 /* flush both disables and wait for them to finish */
1805 usleep_range(10000, 11000);
1807 igb_irq_disable(adapter
);
1809 adapter
->flags
&= ~IGB_FLAG_NEED_LINK_UPDATE
;
1811 for (i
= 0; i
< adapter
->num_q_vectors
; i
++) {
1812 if (adapter
->q_vector
[i
]) {
1813 napi_synchronize(&adapter
->q_vector
[i
]->napi
);
1814 napi_disable(&adapter
->q_vector
[i
]->napi
);
1818 del_timer_sync(&adapter
->watchdog_timer
);
1819 del_timer_sync(&adapter
->phy_info_timer
);
1821 /* record the stats before reset*/
1822 spin_lock(&adapter
->stats64_lock
);
1823 igb_update_stats(adapter
);
1824 spin_unlock(&adapter
->stats64_lock
);
1826 adapter
->link_speed
= 0;
1827 adapter
->link_duplex
= 0;
1829 if (!pci_channel_offline(adapter
->pdev
))
1832 /* clear VLAN promisc flag so VFTA will be updated if necessary */
1833 adapter
->flags
&= ~IGB_FLAG_VLAN_PROMISC
;
1835 igb_clean_all_tx_rings(adapter
);
1836 igb_clean_all_rx_rings(adapter
);
1837 #ifdef CONFIG_IGB_DCA
1839 /* since we reset the hardware DCA settings were cleared */
1840 igb_setup_dca(adapter
);
1844 void igb_reinit_locked(struct igb_adapter
*adapter
)
1846 WARN_ON(in_interrupt());
1847 while (test_and_set_bit(__IGB_RESETTING
, &adapter
->state
))
1848 usleep_range(1000, 2000);
1851 clear_bit(__IGB_RESETTING
, &adapter
->state
);
1854 /** igb_enable_mas - Media Autosense re-enable after swap
1856 * @adapter: adapter struct
1858 static void igb_enable_mas(struct igb_adapter
*adapter
)
1860 struct e1000_hw
*hw
= &adapter
->hw
;
1861 u32 connsw
= rd32(E1000_CONNSW
);
1863 /* configure for SerDes media detect */
1864 if ((hw
->phy
.media_type
== e1000_media_type_copper
) &&
1865 (!(connsw
& E1000_CONNSW_SERDESD
))) {
1866 connsw
|= E1000_CONNSW_ENRGSRC
;
1867 connsw
|= E1000_CONNSW_AUTOSENSE_EN
;
1868 wr32(E1000_CONNSW
, connsw
);
1873 void igb_reset(struct igb_adapter
*adapter
)
1875 struct pci_dev
*pdev
= adapter
->pdev
;
1876 struct e1000_hw
*hw
= &adapter
->hw
;
1877 struct e1000_mac_info
*mac
= &hw
->mac
;
1878 struct e1000_fc_info
*fc
= &hw
->fc
;
1881 /* Repartition Pba for greater than 9k mtu
1882 * To take effect CTRL.RST is required.
1884 switch (mac
->type
) {
1888 pba
= rd32(E1000_RXPBS
);
1889 pba
= igb_rxpbs_adjust_82580(pba
);
1892 pba
= rd32(E1000_RXPBS
);
1893 pba
&= E1000_RXPBS_SIZE_MASK_82576
;
1899 pba
= E1000_PBA_34K
;
1903 if (mac
->type
== e1000_82575
) {
1904 u32 min_rx_space
, min_tx_space
, needed_tx_space
;
1906 /* write Rx PBA so that hardware can report correct Tx PBA */
1907 wr32(E1000_PBA
, pba
);
1909 /* To maintain wire speed transmits, the Tx FIFO should be
1910 * large enough to accommodate two full transmit packets,
1911 * rounded up to the next 1KB and expressed in KB. Likewise,
1912 * the Rx FIFO should be large enough to accommodate at least
1913 * one full receive packet and is similarly rounded up and
1916 min_rx_space
= DIV_ROUND_UP(MAX_JUMBO_FRAME_SIZE
, 1024);
1918 /* The Tx FIFO also stores 16 bytes of information about the Tx
1919 * but don't include Ethernet FCS because hardware appends it.
1920 * We only need to round down to the nearest 512 byte block
1921 * count since the value we care about is 2 frames, not 1.
1923 min_tx_space
= adapter
->max_frame_size
;
1924 min_tx_space
+= sizeof(union e1000_adv_tx_desc
) - ETH_FCS_LEN
;
1925 min_tx_space
= DIV_ROUND_UP(min_tx_space
, 512);
1927 /* upper 16 bits has Tx packet buffer allocation size in KB */
1928 needed_tx_space
= min_tx_space
- (rd32(E1000_PBA
) >> 16);
1930 /* If current Tx allocation is less than the min Tx FIFO size,
1931 * and the min Tx FIFO size is less than the current Rx FIFO
1932 * allocation, take space away from current Rx allocation.
1934 if (needed_tx_space
< pba
) {
1935 pba
-= needed_tx_space
;
1937 /* if short on Rx space, Rx wins and must trump Tx
1940 if (pba
< min_rx_space
)
1944 /* adjust PBA for jumbo frames */
1945 wr32(E1000_PBA
, pba
);
1948 /* flow control settings
1949 * The high water mark must be low enough to fit one full frame
1950 * after transmitting the pause frame. As such we must have enough
1951 * space to allow for us to complete our current transmit and then
1952 * receive the frame that is in progress from the link partner.
1954 * - the full Rx FIFO size minus one full Tx plus one full Rx frame
1956 hwm
= (pba
<< 10) - (adapter
->max_frame_size
+ MAX_JUMBO_FRAME_SIZE
);
1958 fc
->high_water
= hwm
& 0xFFFFFFF0; /* 16-byte granularity */
1959 fc
->low_water
= fc
->high_water
- 16;
1960 fc
->pause_time
= 0xFFFF;
1962 fc
->current_mode
= fc
->requested_mode
;
1964 /* disable receive for all VFs and wait one second */
1965 if (adapter
->vfs_allocated_count
) {
1968 for (i
= 0 ; i
< adapter
->vfs_allocated_count
; i
++)
1969 adapter
->vf_data
[i
].flags
&= IGB_VF_FLAG_PF_SET_MAC
;
1971 /* ping all the active vfs to let them know we are going down */
1972 igb_ping_all_vfs(adapter
);
1974 /* disable transmits and receives */
1975 wr32(E1000_VFRE
, 0);
1976 wr32(E1000_VFTE
, 0);
1979 /* Allow time for pending master requests to run */
1980 hw
->mac
.ops
.reset_hw(hw
);
1983 if (adapter
->flags
& IGB_FLAG_MEDIA_RESET
) {
1984 /* need to resetup here after media swap */
1985 adapter
->ei
.get_invariants(hw
);
1986 adapter
->flags
&= ~IGB_FLAG_MEDIA_RESET
;
1988 if ((mac
->type
== e1000_82575
) &&
1989 (adapter
->flags
& IGB_FLAG_MAS_ENABLE
)) {
1990 igb_enable_mas(adapter
);
1992 if (hw
->mac
.ops
.init_hw(hw
))
1993 dev_err(&pdev
->dev
, "Hardware Error\n");
1995 /* RAR registers were cleared during init_hw, clear mac table */
1996 igb_flush_mac_table(adapter
);
1997 __dev_uc_unsync(adapter
->netdev
, NULL
);
1999 /* Recover default RAR entry */
2000 igb_set_default_mac_filter(adapter
);
2002 /* Flow control settings reset on hardware reset, so guarantee flow
2003 * control is off when forcing speed.
2005 if (!hw
->mac
.autoneg
)
2006 igb_force_mac_fc(hw
);
2008 igb_init_dmac(adapter
, pba
);
2009 #ifdef CONFIG_IGB_HWMON
2010 /* Re-initialize the thermal sensor on i350 devices. */
2011 if (!test_bit(__IGB_DOWN
, &adapter
->state
)) {
2012 if (mac
->type
== e1000_i350
&& hw
->bus
.func
== 0) {
2013 /* If present, re-initialize the external thermal sensor
2017 mac
->ops
.init_thermal_sensor_thresh(hw
);
2021 /* Re-establish EEE setting */
2022 if (hw
->phy
.media_type
== e1000_media_type_copper
) {
2023 switch (mac
->type
) {
2027 igb_set_eee_i350(hw
, true, true);
2030 igb_set_eee_i354(hw
, true, true);
2036 if (!netif_running(adapter
->netdev
))
2037 igb_power_down_link(adapter
);
2039 igb_update_mng_vlan(adapter
);
2041 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
2042 wr32(E1000_VET
, ETHERNET_IEEE_VLAN_TYPE
);
2044 /* Re-enable PTP, where applicable. */
2045 if (adapter
->ptp_flags
& IGB_PTP_ENABLED
)
2046 igb_ptp_reset(adapter
);
2048 igb_get_phy_info(hw
);
2051 static netdev_features_t
igb_fix_features(struct net_device
*netdev
,
2052 netdev_features_t features
)
2054 /* Since there is no support for separate Rx/Tx vlan accel
2055 * enable/disable make sure Tx flag is always in same state as Rx.
2057 if (features
& NETIF_F_HW_VLAN_CTAG_RX
)
2058 features
|= NETIF_F_HW_VLAN_CTAG_TX
;
2060 features
&= ~NETIF_F_HW_VLAN_CTAG_TX
;
2065 static int igb_set_features(struct net_device
*netdev
,
2066 netdev_features_t features
)
2068 netdev_features_t changed
= netdev
->features
^ features
;
2069 struct igb_adapter
*adapter
= netdev_priv(netdev
);
2071 if (changed
& NETIF_F_HW_VLAN_CTAG_RX
)
2072 igb_vlan_mode(netdev
, features
);
2074 if (!(changed
& (NETIF_F_RXALL
| NETIF_F_NTUPLE
)))
2077 if (!(features
& NETIF_F_NTUPLE
)) {
2078 struct hlist_node
*node2
;
2079 struct igb_nfc_filter
*rule
;
2081 spin_lock(&adapter
->nfc_lock
);
2082 hlist_for_each_entry_safe(rule
, node2
,
2083 &adapter
->nfc_filter_list
, nfc_node
) {
2084 igb_erase_filter(adapter
, rule
);
2085 hlist_del(&rule
->nfc_node
);
2088 spin_unlock(&adapter
->nfc_lock
);
2089 adapter
->nfc_filter_count
= 0;
2092 netdev
->features
= features
;
2094 if (netif_running(netdev
))
2095 igb_reinit_locked(adapter
);
2102 static int igb_ndo_fdb_add(struct ndmsg
*ndm
, struct nlattr
*tb
[],
2103 struct net_device
*dev
,
2104 const unsigned char *addr
, u16 vid
,
2107 /* guarantee we can provide a unique filter for the unicast address */
2108 if (is_unicast_ether_addr(addr
) || is_link_local_ether_addr(addr
)) {
2109 struct igb_adapter
*adapter
= netdev_priv(dev
);
2110 int vfn
= adapter
->vfs_allocated_count
;
2112 if (netdev_uc_count(dev
) >= igb_available_rars(adapter
, vfn
))
2116 return ndo_dflt_fdb_add(ndm
, tb
, dev
, addr
, vid
, flags
);
2119 #define IGB_MAX_MAC_HDR_LEN 127
2120 #define IGB_MAX_NETWORK_HDR_LEN 511
2122 static netdev_features_t
2123 igb_features_check(struct sk_buff
*skb
, struct net_device
*dev
,
2124 netdev_features_t features
)
2126 unsigned int network_hdr_len
, mac_hdr_len
;
2128 /* Make certain the headers can be described by a context descriptor */
2129 mac_hdr_len
= skb_network_header(skb
) - skb
->data
;
2130 if (unlikely(mac_hdr_len
> IGB_MAX_MAC_HDR_LEN
))
2131 return features
& ~(NETIF_F_HW_CSUM
|
2133 NETIF_F_HW_VLAN_CTAG_TX
|
2137 network_hdr_len
= skb_checksum_start(skb
) - skb_network_header(skb
);
2138 if (unlikely(network_hdr_len
> IGB_MAX_NETWORK_HDR_LEN
))
2139 return features
& ~(NETIF_F_HW_CSUM
|
2144 /* We can only support IPV4 TSO in tunnels if we can mangle the
2145 * inner IP ID field, so strip TSO if MANGLEID is not supported.
2147 if (skb
->encapsulation
&& !(features
& NETIF_F_TSO_MANGLEID
))
2148 features
&= ~NETIF_F_TSO
;
2153 static const struct net_device_ops igb_netdev_ops
= {
2154 .ndo_open
= igb_open
,
2155 .ndo_stop
= igb_close
,
2156 .ndo_start_xmit
= igb_xmit_frame
,
2157 .ndo_get_stats64
= igb_get_stats64
,
2158 .ndo_set_rx_mode
= igb_set_rx_mode
,
2159 .ndo_set_mac_address
= igb_set_mac
,
2160 .ndo_change_mtu
= igb_change_mtu
,
2161 .ndo_do_ioctl
= igb_ioctl
,
2162 .ndo_tx_timeout
= igb_tx_timeout
,
2163 .ndo_validate_addr
= eth_validate_addr
,
2164 .ndo_vlan_rx_add_vid
= igb_vlan_rx_add_vid
,
2165 .ndo_vlan_rx_kill_vid
= igb_vlan_rx_kill_vid
,
2166 .ndo_set_vf_mac
= igb_ndo_set_vf_mac
,
2167 .ndo_set_vf_vlan
= igb_ndo_set_vf_vlan
,
2168 .ndo_set_vf_rate
= igb_ndo_set_vf_bw
,
2169 .ndo_set_vf_spoofchk
= igb_ndo_set_vf_spoofchk
,
2170 .ndo_get_vf_config
= igb_ndo_get_vf_config
,
2171 #ifdef CONFIG_NET_POLL_CONTROLLER
2172 .ndo_poll_controller
= igb_netpoll
,
2174 .ndo_fix_features
= igb_fix_features
,
2175 .ndo_set_features
= igb_set_features
,
2176 .ndo_fdb_add
= igb_ndo_fdb_add
,
2177 .ndo_features_check
= igb_features_check
,
2181 * igb_set_fw_version - Configure version string for ethtool
2182 * @adapter: adapter struct
2184 void igb_set_fw_version(struct igb_adapter
*adapter
)
2186 struct e1000_hw
*hw
= &adapter
->hw
;
2187 struct e1000_fw_version fw
;
2189 igb_get_fw_version(hw
, &fw
);
2191 switch (hw
->mac
.type
) {
2194 if (!(igb_get_flash_presence_i210(hw
))) {
2195 snprintf(adapter
->fw_version
,
2196 sizeof(adapter
->fw_version
),
2198 fw
.invm_major
, fw
.invm_minor
,
2204 /* if option is rom valid, display its version too */
2206 snprintf(adapter
->fw_version
,
2207 sizeof(adapter
->fw_version
),
2208 "%d.%d, 0x%08x, %d.%d.%d",
2209 fw
.eep_major
, fw
.eep_minor
, fw
.etrack_id
,
2210 fw
.or_major
, fw
.or_build
, fw
.or_patch
);
2212 } else if (fw
.etrack_id
!= 0X0000) {
2213 snprintf(adapter
->fw_version
,
2214 sizeof(adapter
->fw_version
),
2216 fw
.eep_major
, fw
.eep_minor
, fw
.etrack_id
);
2218 snprintf(adapter
->fw_version
,
2219 sizeof(adapter
->fw_version
),
2221 fw
.eep_major
, fw
.eep_minor
, fw
.eep_build
);
2228 * igb_init_mas - init Media Autosense feature if enabled in the NVM
2230 * @adapter: adapter struct
2232 static void igb_init_mas(struct igb_adapter
*adapter
)
2234 struct e1000_hw
*hw
= &adapter
->hw
;
2237 hw
->nvm
.ops
.read(hw
, NVM_COMPAT
, 1, &eeprom_data
);
2238 switch (hw
->bus
.func
) {
2240 if (eeprom_data
& IGB_MAS_ENABLE_0
) {
2241 adapter
->flags
|= IGB_FLAG_MAS_ENABLE
;
2242 netdev_info(adapter
->netdev
,
2243 "MAS: Enabling Media Autosense for port %d\n",
2248 if (eeprom_data
& IGB_MAS_ENABLE_1
) {
2249 adapter
->flags
|= IGB_FLAG_MAS_ENABLE
;
2250 netdev_info(adapter
->netdev
,
2251 "MAS: Enabling Media Autosense for port %d\n",
2256 if (eeprom_data
& IGB_MAS_ENABLE_2
) {
2257 adapter
->flags
|= IGB_FLAG_MAS_ENABLE
;
2258 netdev_info(adapter
->netdev
,
2259 "MAS: Enabling Media Autosense for port %d\n",
2264 if (eeprom_data
& IGB_MAS_ENABLE_3
) {
2265 adapter
->flags
|= IGB_FLAG_MAS_ENABLE
;
2266 netdev_info(adapter
->netdev
,
2267 "MAS: Enabling Media Autosense for port %d\n",
2272 /* Shouldn't get here */
2273 netdev_err(adapter
->netdev
,
2274 "MAS: Invalid port configuration, returning\n");
2280 * igb_init_i2c - Init I2C interface
2281 * @adapter: pointer to adapter structure
2283 static s32
igb_init_i2c(struct igb_adapter
*adapter
)
2287 /* I2C interface supported on i350 devices */
2288 if (adapter
->hw
.mac
.type
!= e1000_i350
)
2291 /* Initialize the i2c bus which is controlled by the registers.
2292 * This bus will use the i2c_algo_bit structue that implements
2293 * the protocol through toggling of the 4 bits in the register.
2295 adapter
->i2c_adap
.owner
= THIS_MODULE
;
2296 adapter
->i2c_algo
= igb_i2c_algo
;
2297 adapter
->i2c_algo
.data
= adapter
;
2298 adapter
->i2c_adap
.algo_data
= &adapter
->i2c_algo
;
2299 adapter
->i2c_adap
.dev
.parent
= &adapter
->pdev
->dev
;
2300 strlcpy(adapter
->i2c_adap
.name
, "igb BB",
2301 sizeof(adapter
->i2c_adap
.name
));
2302 status
= i2c_bit_add_bus(&adapter
->i2c_adap
);
2307 * igb_probe - Device Initialization Routine
2308 * @pdev: PCI device information struct
2309 * @ent: entry in igb_pci_tbl
2311 * Returns 0 on success, negative on failure
2313 * igb_probe initializes an adapter identified by a pci_dev structure.
2314 * The OS initialization, configuring of the adapter private structure,
2315 * and a hardware reset occur.
2317 static int igb_probe(struct pci_dev
*pdev
, const struct pci_device_id
*ent
)
2319 struct net_device
*netdev
;
2320 struct igb_adapter
*adapter
;
2321 struct e1000_hw
*hw
;
2322 u16 eeprom_data
= 0;
2324 static int global_quad_port_a
; /* global quad port a indication */
2325 const struct e1000_info
*ei
= igb_info_tbl
[ent
->driver_data
];
2326 int err
, pci_using_dac
;
2327 u8 part_str
[E1000_PBANUM_LENGTH
];
2329 /* Catch broken hardware that put the wrong VF device ID in
2330 * the PCIe SR-IOV capability.
2332 if (pdev
->is_virtfn
) {
2333 WARN(1, KERN_ERR
"%s (%hx:%hx) should not be a VF!\n",
2334 pci_name(pdev
), pdev
->vendor
, pdev
->device
);
2338 err
= pci_enable_device_mem(pdev
);
2343 err
= dma_set_mask_and_coherent(&pdev
->dev
, DMA_BIT_MASK(64));
2347 err
= dma_set_mask_and_coherent(&pdev
->dev
, DMA_BIT_MASK(32));
2350 "No usable DMA configuration, aborting\n");
2355 err
= pci_request_mem_regions(pdev
, igb_driver_name
);
2359 pci_enable_pcie_error_reporting(pdev
);
2361 pci_set_master(pdev
);
2362 pci_save_state(pdev
);
2365 netdev
= alloc_etherdev_mq(sizeof(struct igb_adapter
),
2368 goto err_alloc_etherdev
;
2370 SET_NETDEV_DEV(netdev
, &pdev
->dev
);
2372 pci_set_drvdata(pdev
, netdev
);
2373 adapter
= netdev_priv(netdev
);
2374 adapter
->netdev
= netdev
;
2375 adapter
->pdev
= pdev
;
2378 adapter
->msg_enable
= netif_msg_init(debug
, DEFAULT_MSG_ENABLE
);
2381 adapter
->io_addr
= pci_iomap(pdev
, 0, 0);
2382 if (!adapter
->io_addr
)
2384 /* hw->hw_addr can be altered, we'll use adapter->io_addr for unmap */
2385 hw
->hw_addr
= adapter
->io_addr
;
2387 netdev
->netdev_ops
= &igb_netdev_ops
;
2388 igb_set_ethtool_ops(netdev
);
2389 netdev
->watchdog_timeo
= 5 * HZ
;
2391 strncpy(netdev
->name
, pci_name(pdev
), sizeof(netdev
->name
) - 1);
2393 netdev
->mem_start
= pci_resource_start(pdev
, 0);
2394 netdev
->mem_end
= pci_resource_end(pdev
, 0);
2396 /* PCI config space info */
2397 hw
->vendor_id
= pdev
->vendor
;
2398 hw
->device_id
= pdev
->device
;
2399 hw
->revision_id
= pdev
->revision
;
2400 hw
->subsystem_vendor_id
= pdev
->subsystem_vendor
;
2401 hw
->subsystem_device_id
= pdev
->subsystem_device
;
2403 /* Copy the default MAC, PHY and NVM function pointers */
2404 memcpy(&hw
->mac
.ops
, ei
->mac_ops
, sizeof(hw
->mac
.ops
));
2405 memcpy(&hw
->phy
.ops
, ei
->phy_ops
, sizeof(hw
->phy
.ops
));
2406 memcpy(&hw
->nvm
.ops
, ei
->nvm_ops
, sizeof(hw
->nvm
.ops
));
2407 /* Initialize skew-specific constants */
2408 err
= ei
->get_invariants(hw
);
2412 /* setup the private structure */
2413 err
= igb_sw_init(adapter
);
2417 igb_get_bus_info_pcie(hw
);
2419 hw
->phy
.autoneg_wait_to_complete
= false;
2421 /* Copper options */
2422 if (hw
->phy
.media_type
== e1000_media_type_copper
) {
2423 hw
->phy
.mdix
= AUTO_ALL_MODES
;
2424 hw
->phy
.disable_polarity_correction
= false;
2425 hw
->phy
.ms_type
= e1000_ms_hw_default
;
2428 if (igb_check_reset_block(hw
))
2429 dev_info(&pdev
->dev
,
2430 "PHY reset is blocked due to SOL/IDER session.\n");
2432 /* features is initialized to 0 in allocation, it might have bits
2433 * set by igb_sw_init so we should use an or instead of an
2436 netdev
->features
|= NETIF_F_SG
|
2443 if (hw
->mac
.type
>= e1000_82576
)
2444 netdev
->features
|= NETIF_F_SCTP_CRC
;
2446 #define IGB_GSO_PARTIAL_FEATURES (NETIF_F_GSO_GRE | \
2447 NETIF_F_GSO_GRE_CSUM | \
2448 NETIF_F_GSO_IPXIP4 | \
2449 NETIF_F_GSO_IPXIP6 | \
2450 NETIF_F_GSO_UDP_TUNNEL | \
2451 NETIF_F_GSO_UDP_TUNNEL_CSUM)
2453 netdev
->gso_partial_features
= IGB_GSO_PARTIAL_FEATURES
;
2454 netdev
->features
|= NETIF_F_GSO_PARTIAL
| IGB_GSO_PARTIAL_FEATURES
;
2456 /* copy netdev features into list of user selectable features */
2457 netdev
->hw_features
|= netdev
->features
|
2458 NETIF_F_HW_VLAN_CTAG_RX
|
2459 NETIF_F_HW_VLAN_CTAG_TX
|
2462 if (hw
->mac
.type
>= e1000_i350
)
2463 netdev
->hw_features
|= NETIF_F_NTUPLE
;
2466 netdev
->features
|= NETIF_F_HIGHDMA
;
2468 netdev
->vlan_features
|= netdev
->features
| NETIF_F_TSO_MANGLEID
;
2469 netdev
->mpls_features
|= NETIF_F_HW_CSUM
;
2470 netdev
->hw_enc_features
|= netdev
->vlan_features
;
2472 /* set this bit last since it cannot be part of vlan_features */
2473 netdev
->features
|= NETIF_F_HW_VLAN_CTAG_FILTER
|
2474 NETIF_F_HW_VLAN_CTAG_RX
|
2475 NETIF_F_HW_VLAN_CTAG_TX
;
2477 netdev
->priv_flags
|= IFF_SUPP_NOFCS
;
2479 netdev
->priv_flags
|= IFF_UNICAST_FLT
;
2481 /* MTU range: 68 - 9216 */
2482 netdev
->min_mtu
= ETH_MIN_MTU
;
2483 netdev
->max_mtu
= MAX_STD_JUMBO_FRAME_SIZE
;
2485 adapter
->en_mng_pt
= igb_enable_mng_pass_thru(hw
);
2487 /* before reading the NVM, reset the controller to put the device in a
2488 * known good starting state
2490 hw
->mac
.ops
.reset_hw(hw
);
2492 /* make sure the NVM is good , i211/i210 parts can have special NVM
2493 * that doesn't contain a checksum
2495 switch (hw
->mac
.type
) {
2498 if (igb_get_flash_presence_i210(hw
)) {
2499 if (hw
->nvm
.ops
.validate(hw
) < 0) {
2501 "The NVM Checksum Is Not Valid\n");
2508 if (hw
->nvm
.ops
.validate(hw
) < 0) {
2509 dev_err(&pdev
->dev
, "The NVM Checksum Is Not Valid\n");
2516 if (eth_platform_get_mac_address(&pdev
->dev
, hw
->mac
.addr
)) {
2517 /* copy the MAC address out of the NVM */
2518 if (hw
->mac
.ops
.read_mac_addr(hw
))
2519 dev_err(&pdev
->dev
, "NVM Read Error\n");
2522 memcpy(netdev
->dev_addr
, hw
->mac
.addr
, netdev
->addr_len
);
2524 if (!is_valid_ether_addr(netdev
->dev_addr
)) {
2525 dev_err(&pdev
->dev
, "Invalid MAC Address\n");
2530 igb_set_default_mac_filter(adapter
);
2532 /* get firmware version for ethtool -i */
2533 igb_set_fw_version(adapter
);
2535 /* configure RXPBSIZE and TXPBSIZE */
2536 if (hw
->mac
.type
== e1000_i210
) {
2537 wr32(E1000_RXPBS
, I210_RXPBSIZE_DEFAULT
);
2538 wr32(E1000_TXPBS
, I210_TXPBSIZE_DEFAULT
);
2541 setup_timer(&adapter
->watchdog_timer
, igb_watchdog
,
2542 (unsigned long) adapter
);
2543 setup_timer(&adapter
->phy_info_timer
, igb_update_phy_info
,
2544 (unsigned long) adapter
);
2546 INIT_WORK(&adapter
->reset_task
, igb_reset_task
);
2547 INIT_WORK(&adapter
->watchdog_task
, igb_watchdog_task
);
2549 /* Initialize link properties that are user-changeable */
2550 adapter
->fc_autoneg
= true;
2551 hw
->mac
.autoneg
= true;
2552 hw
->phy
.autoneg_advertised
= 0x2f;
2554 hw
->fc
.requested_mode
= e1000_fc_default
;
2555 hw
->fc
.current_mode
= e1000_fc_default
;
2557 igb_validate_mdi_setting(hw
);
2559 /* By default, support wake on port A */
2560 if (hw
->bus
.func
== 0)
2561 adapter
->flags
|= IGB_FLAG_WOL_SUPPORTED
;
2563 /* Check the NVM for wake support on non-port A ports */
2564 if (hw
->mac
.type
>= e1000_82580
)
2565 hw
->nvm
.ops
.read(hw
, NVM_INIT_CONTROL3_PORT_A
+
2566 NVM_82580_LAN_FUNC_OFFSET(hw
->bus
.func
), 1,
2568 else if (hw
->bus
.func
== 1)
2569 hw
->nvm
.ops
.read(hw
, NVM_INIT_CONTROL3_PORT_B
, 1, &eeprom_data
);
2571 if (eeprom_data
& IGB_EEPROM_APME
)
2572 adapter
->flags
|= IGB_FLAG_WOL_SUPPORTED
;
2574 /* now that we have the eeprom settings, apply the special cases where
2575 * the eeprom may be wrong or the board simply won't support wake on
2576 * lan on a particular port
2578 switch (pdev
->device
) {
2579 case E1000_DEV_ID_82575GB_QUAD_COPPER
:
2580 adapter
->flags
&= ~IGB_FLAG_WOL_SUPPORTED
;
2582 case E1000_DEV_ID_82575EB_FIBER_SERDES
:
2583 case E1000_DEV_ID_82576_FIBER
:
2584 case E1000_DEV_ID_82576_SERDES
:
2585 /* Wake events only supported on port A for dual fiber
2586 * regardless of eeprom setting
2588 if (rd32(E1000_STATUS
) & E1000_STATUS_FUNC_1
)
2589 adapter
->flags
&= ~IGB_FLAG_WOL_SUPPORTED
;
2591 case E1000_DEV_ID_82576_QUAD_COPPER
:
2592 case E1000_DEV_ID_82576_QUAD_COPPER_ET2
:
2593 /* if quad port adapter, disable WoL on all but port A */
2594 if (global_quad_port_a
!= 0)
2595 adapter
->flags
&= ~IGB_FLAG_WOL_SUPPORTED
;
2597 adapter
->flags
|= IGB_FLAG_QUAD_PORT_A
;
2598 /* Reset for multiple quad port adapters */
2599 if (++global_quad_port_a
== 4)
2600 global_quad_port_a
= 0;
2603 /* If the device can't wake, don't set software support */
2604 if (!device_can_wakeup(&adapter
->pdev
->dev
))
2605 adapter
->flags
&= ~IGB_FLAG_WOL_SUPPORTED
;
2608 /* initialize the wol settings based on the eeprom settings */
2609 if (adapter
->flags
& IGB_FLAG_WOL_SUPPORTED
)
2610 adapter
->wol
|= E1000_WUFC_MAG
;
2612 /* Some vendors want WoL disabled by default, but still supported */
2613 if ((hw
->mac
.type
== e1000_i350
) &&
2614 (pdev
->subsystem_vendor
== PCI_VENDOR_ID_HP
)) {
2615 adapter
->flags
|= IGB_FLAG_WOL_SUPPORTED
;
2619 /* Some vendors want the ability to Use the EEPROM setting as
2620 * enable/disable only, and not for capability
2622 if (((hw
->mac
.type
== e1000_i350
) ||
2623 (hw
->mac
.type
== e1000_i354
)) &&
2624 (pdev
->subsystem_vendor
== PCI_VENDOR_ID_DELL
)) {
2625 adapter
->flags
|= IGB_FLAG_WOL_SUPPORTED
;
2628 if (hw
->mac
.type
== e1000_i350
) {
2629 if (((pdev
->subsystem_device
== 0x5001) ||
2630 (pdev
->subsystem_device
== 0x5002)) &&
2631 (hw
->bus
.func
== 0)) {
2632 adapter
->flags
|= IGB_FLAG_WOL_SUPPORTED
;
2635 if (pdev
->subsystem_device
== 0x1F52)
2636 adapter
->flags
|= IGB_FLAG_WOL_SUPPORTED
;
2639 device_set_wakeup_enable(&adapter
->pdev
->dev
,
2640 adapter
->flags
& IGB_FLAG_WOL_SUPPORTED
);
2642 /* reset the hardware with the new settings */
2645 /* Init the I2C interface */
2646 err
= igb_init_i2c(adapter
);
2648 dev_err(&pdev
->dev
, "failed to init i2c interface\n");
2652 /* let the f/w know that the h/w is now under the control of the
2655 igb_get_hw_control(adapter
);
2657 strcpy(netdev
->name
, "eth%d");
2658 err
= register_netdev(netdev
);
2662 /* carrier off reporting is important to ethtool even BEFORE open */
2663 netif_carrier_off(netdev
);
2665 #ifdef CONFIG_IGB_DCA
2666 if (dca_add_requester(&pdev
->dev
) == 0) {
2667 adapter
->flags
|= IGB_FLAG_DCA_ENABLED
;
2668 dev_info(&pdev
->dev
, "DCA enabled\n");
2669 igb_setup_dca(adapter
);
2673 #ifdef CONFIG_IGB_HWMON
2674 /* Initialize the thermal sensor on i350 devices. */
2675 if (hw
->mac
.type
== e1000_i350
&& hw
->bus
.func
== 0) {
2678 /* Read the NVM to determine if this i350 device supports an
2679 * external thermal sensor.
2681 hw
->nvm
.ops
.read(hw
, NVM_ETS_CFG
, 1, &ets_word
);
2682 if (ets_word
!= 0x0000 && ets_word
!= 0xFFFF)
2683 adapter
->ets
= true;
2685 adapter
->ets
= false;
2686 if (igb_sysfs_init(adapter
))
2688 "failed to allocate sysfs resources\n");
2690 adapter
->ets
= false;
2693 /* Check if Media Autosense is enabled */
2695 if (hw
->dev_spec
._82575
.mas_capable
)
2696 igb_init_mas(adapter
);
2698 /* do hw tstamp init after resetting */
2699 igb_ptp_init(adapter
);
2701 dev_info(&pdev
->dev
, "Intel(R) Gigabit Ethernet Network Connection\n");
2702 /* print bus type/speed/width info, not applicable to i354 */
2703 if (hw
->mac
.type
!= e1000_i354
) {
2704 dev_info(&pdev
->dev
, "%s: (PCIe:%s:%s) %pM\n",
2706 ((hw
->bus
.speed
== e1000_bus_speed_2500
) ? "2.5Gb/s" :
2707 (hw
->bus
.speed
== e1000_bus_speed_5000
) ? "5.0Gb/s" :
2709 ((hw
->bus
.width
== e1000_bus_width_pcie_x4
) ?
2711 (hw
->bus
.width
== e1000_bus_width_pcie_x2
) ?
2713 (hw
->bus
.width
== e1000_bus_width_pcie_x1
) ?
2714 "Width x1" : "unknown"), netdev
->dev_addr
);
2717 if ((hw
->mac
.type
>= e1000_i210
||
2718 igb_get_flash_presence_i210(hw
))) {
2719 ret_val
= igb_read_part_string(hw
, part_str
,
2720 E1000_PBANUM_LENGTH
);
2722 ret_val
= -E1000_ERR_INVM_VALUE_NOT_FOUND
;
2726 strcpy(part_str
, "Unknown");
2727 dev_info(&pdev
->dev
, "%s: PBA No: %s\n", netdev
->name
, part_str
);
2728 dev_info(&pdev
->dev
,
2729 "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
2730 (adapter
->flags
& IGB_FLAG_HAS_MSIX
) ? "MSI-X" :
2731 (adapter
->flags
& IGB_FLAG_HAS_MSI
) ? "MSI" : "legacy",
2732 adapter
->num_rx_queues
, adapter
->num_tx_queues
);
2733 if (hw
->phy
.media_type
== e1000_media_type_copper
) {
2734 switch (hw
->mac
.type
) {
2738 /* Enable EEE for internal copper PHY devices */
2739 err
= igb_set_eee_i350(hw
, true, true);
2741 (!hw
->dev_spec
._82575
.eee_disable
)) {
2742 adapter
->eee_advert
=
2743 MDIO_EEE_100TX
| MDIO_EEE_1000T
;
2744 adapter
->flags
|= IGB_FLAG_EEE
;
2748 if ((rd32(E1000_CTRL_EXT
) &
2749 E1000_CTRL_EXT_LINK_MODE_SGMII
)) {
2750 err
= igb_set_eee_i354(hw
, true, true);
2752 (!hw
->dev_spec
._82575
.eee_disable
)) {
2753 adapter
->eee_advert
=
2754 MDIO_EEE_100TX
| MDIO_EEE_1000T
;
2755 adapter
->flags
|= IGB_FLAG_EEE
;
2763 pm_runtime_put_noidle(&pdev
->dev
);
2767 igb_release_hw_control(adapter
);
2768 memset(&adapter
->i2c_adap
, 0, sizeof(adapter
->i2c_adap
));
2770 if (!igb_check_reset_block(hw
))
2773 if (hw
->flash_address
)
2774 iounmap(hw
->flash_address
);
2776 kfree(adapter
->mac_table
);
2777 kfree(adapter
->shadow_vfta
);
2778 igb_clear_interrupt_scheme(adapter
);
2779 #ifdef CONFIG_PCI_IOV
2780 igb_disable_sriov(pdev
);
2782 pci_iounmap(pdev
, adapter
->io_addr
);
2784 free_netdev(netdev
);
2786 pci_release_mem_regions(pdev
);
2789 pci_disable_device(pdev
);
2793 #ifdef CONFIG_PCI_IOV
2794 static int igb_disable_sriov(struct pci_dev
*pdev
)
2796 struct net_device
*netdev
= pci_get_drvdata(pdev
);
2797 struct igb_adapter
*adapter
= netdev_priv(netdev
);
2798 struct e1000_hw
*hw
= &adapter
->hw
;
2800 /* reclaim resources allocated to VFs */
2801 if (adapter
->vf_data
) {
2802 /* disable iov and allow time for transactions to clear */
2803 if (pci_vfs_assigned(pdev
)) {
2804 dev_warn(&pdev
->dev
,
2805 "Cannot deallocate SR-IOV virtual functions while they are assigned - VFs will not be deallocated\n");
2808 pci_disable_sriov(pdev
);
2812 kfree(adapter
->vf_mac_list
);
2813 adapter
->vf_mac_list
= NULL
;
2814 kfree(adapter
->vf_data
);
2815 adapter
->vf_data
= NULL
;
2816 adapter
->vfs_allocated_count
= 0;
2817 wr32(E1000_IOVCTL
, E1000_IOVCTL_REUSE_VFQ
);
2820 dev_info(&pdev
->dev
, "IOV Disabled\n");
2822 /* Re-enable DMA Coalescing flag since IOV is turned off */
2823 adapter
->flags
|= IGB_FLAG_DMAC
;
2829 static int igb_enable_sriov(struct pci_dev
*pdev
, int num_vfs
)
2831 struct net_device
*netdev
= pci_get_drvdata(pdev
);
2832 struct igb_adapter
*adapter
= netdev_priv(netdev
);
2833 int old_vfs
= pci_num_vf(pdev
);
2834 struct vf_mac_filter
*mac_list
;
2836 int num_vf_mac_filters
, i
;
2838 if (!(adapter
->flags
& IGB_FLAG_HAS_MSIX
) || num_vfs
> 7) {
2846 dev_info(&pdev
->dev
, "%d pre-allocated VFs found - override max_vfs setting of %d\n",
2848 adapter
->vfs_allocated_count
= old_vfs
;
2850 adapter
->vfs_allocated_count
= num_vfs
;
2852 adapter
->vf_data
= kcalloc(adapter
->vfs_allocated_count
,
2853 sizeof(struct vf_data_storage
), GFP_KERNEL
);
2855 /* if allocation failed then we do not support SR-IOV */
2856 if (!adapter
->vf_data
) {
2857 adapter
->vfs_allocated_count
= 0;
2859 "Unable to allocate memory for VF Data Storage\n");
2864 /* Due to the limited number of RAR entries calculate potential
2865 * number of MAC filters available for the VFs. Reserve entries
2866 * for PF default MAC, PF MAC filters and at least one RAR entry
2867 * for each VF for VF MAC.
2869 num_vf_mac_filters
= adapter
->hw
.mac
.rar_entry_count
-
2870 (1 + IGB_PF_MAC_FILTERS_RESERVED
+
2871 adapter
->vfs_allocated_count
);
2873 adapter
->vf_mac_list
= kcalloc(num_vf_mac_filters
,
2874 sizeof(struct vf_mac_filter
),
2877 mac_list
= adapter
->vf_mac_list
;
2878 INIT_LIST_HEAD(&adapter
->vf_macs
.l
);
2880 if (adapter
->vf_mac_list
) {
2881 /* Initialize list of VF MAC filters */
2882 for (i
= 0; i
< num_vf_mac_filters
; i
++) {
2884 mac_list
->free
= true;
2885 list_add(&mac_list
->l
, &adapter
->vf_macs
.l
);
2889 /* If we could not allocate memory for the VF MAC filters
2890 * we can continue without this feature but warn user.
2893 "Unable to allocate memory for VF MAC filter list\n");
2896 /* only call pci_enable_sriov() if no VFs are allocated already */
2898 err
= pci_enable_sriov(pdev
, adapter
->vfs_allocated_count
);
2902 dev_info(&pdev
->dev
, "%d VFs allocated\n",
2903 adapter
->vfs_allocated_count
);
2904 for (i
= 0; i
< adapter
->vfs_allocated_count
; i
++)
2905 igb_vf_configure(adapter
, i
);
2907 /* DMA Coalescing is not supported in IOV mode. */
2908 adapter
->flags
&= ~IGB_FLAG_DMAC
;
2912 kfree(adapter
->vf_mac_list
);
2913 adapter
->vf_mac_list
= NULL
;
2914 kfree(adapter
->vf_data
);
2915 adapter
->vf_data
= NULL
;
2916 adapter
->vfs_allocated_count
= 0;
2923 * igb_remove_i2c - Cleanup I2C interface
2924 * @adapter: pointer to adapter structure
2926 static void igb_remove_i2c(struct igb_adapter
*adapter
)
2928 /* free the adapter bus structure */
2929 i2c_del_adapter(&adapter
->i2c_adap
);
2933 * igb_remove - Device Removal Routine
2934 * @pdev: PCI device information struct
2936 * igb_remove is called by the PCI subsystem to alert the driver
2937 * that it should release a PCI device. The could be caused by a
2938 * Hot-Plug event, or because the driver is going to be removed from
2941 static void igb_remove(struct pci_dev
*pdev
)
2943 struct net_device
*netdev
= pci_get_drvdata(pdev
);
2944 struct igb_adapter
*adapter
= netdev_priv(netdev
);
2945 struct e1000_hw
*hw
= &adapter
->hw
;
2947 pm_runtime_get_noresume(&pdev
->dev
);
2948 #ifdef CONFIG_IGB_HWMON
2949 igb_sysfs_exit(adapter
);
2951 igb_remove_i2c(adapter
);
2952 igb_ptp_stop(adapter
);
2953 /* The watchdog timer may be rescheduled, so explicitly
2954 * disable watchdog from being rescheduled.
2956 set_bit(__IGB_DOWN
, &adapter
->state
);
2957 del_timer_sync(&adapter
->watchdog_timer
);
2958 del_timer_sync(&adapter
->phy_info_timer
);
2960 cancel_work_sync(&adapter
->reset_task
);
2961 cancel_work_sync(&adapter
->watchdog_task
);
2963 #ifdef CONFIG_IGB_DCA
2964 if (adapter
->flags
& IGB_FLAG_DCA_ENABLED
) {
2965 dev_info(&pdev
->dev
, "DCA disabled\n");
2966 dca_remove_requester(&pdev
->dev
);
2967 adapter
->flags
&= ~IGB_FLAG_DCA_ENABLED
;
2968 wr32(E1000_DCA_CTRL
, E1000_DCA_CTRL_DCA_MODE_DISABLE
);
2972 /* Release control of h/w to f/w. If f/w is AMT enabled, this
2973 * would have already happened in close and is redundant.
2975 igb_release_hw_control(adapter
);
2977 #ifdef CONFIG_PCI_IOV
2978 igb_disable_sriov(pdev
);
2981 unregister_netdev(netdev
);
2983 igb_clear_interrupt_scheme(adapter
);
2985 pci_iounmap(pdev
, adapter
->io_addr
);
2986 if (hw
->flash_address
)
2987 iounmap(hw
->flash_address
);
2988 pci_release_mem_regions(pdev
);
2990 kfree(adapter
->mac_table
);
2991 kfree(adapter
->shadow_vfta
);
2992 free_netdev(netdev
);
2994 pci_disable_pcie_error_reporting(pdev
);
2996 pci_disable_device(pdev
);
3000 * igb_probe_vfs - Initialize vf data storage and add VFs to pci config space
3001 * @adapter: board private structure to initialize
3003 * This function initializes the vf specific data storage and then attempts to
3004 * allocate the VFs. The reason for ordering it this way is because it is much
3005 * mor expensive time wise to disable SR-IOV than it is to allocate and free
3006 * the memory for the VFs.
3008 static void igb_probe_vfs(struct igb_adapter
*adapter
)
3010 #ifdef CONFIG_PCI_IOV
3011 struct pci_dev
*pdev
= adapter
->pdev
;
3012 struct e1000_hw
*hw
= &adapter
->hw
;
3014 /* Virtualization features not supported on i210 family. */
3015 if ((hw
->mac
.type
== e1000_i210
) || (hw
->mac
.type
== e1000_i211
))
3018 /* Of the below we really only want the effect of getting
3019 * IGB_FLAG_HAS_MSIX set (if available), without which
3020 * igb_enable_sriov() has no effect.
3022 igb_set_interrupt_capability(adapter
, true);
3023 igb_reset_interrupt_capability(adapter
);
3025 pci_sriov_set_totalvfs(pdev
, 7);
3026 igb_enable_sriov(pdev
, max_vfs
);
3028 #endif /* CONFIG_PCI_IOV */
3031 static void igb_init_queue_configuration(struct igb_adapter
*adapter
)
3033 struct e1000_hw
*hw
= &adapter
->hw
;
3036 /* Determine the maximum number of RSS queues supported. */
3037 switch (hw
->mac
.type
) {
3039 max_rss_queues
= IGB_MAX_RX_QUEUES_I211
;
3043 max_rss_queues
= IGB_MAX_RX_QUEUES_82575
;
3046 /* I350 cannot do RSS and SR-IOV at the same time */
3047 if (!!adapter
->vfs_allocated_count
) {
3053 if (!!adapter
->vfs_allocated_count
) {
3061 max_rss_queues
= IGB_MAX_RX_QUEUES
;
3065 adapter
->rss_queues
= min_t(u32
, max_rss_queues
, num_online_cpus());
3067 igb_set_flag_queue_pairs(adapter
, max_rss_queues
);
3070 void igb_set_flag_queue_pairs(struct igb_adapter
*adapter
,
3071 const u32 max_rss_queues
)
3073 struct e1000_hw
*hw
= &adapter
->hw
;
3075 /* Determine if we need to pair queues. */
3076 switch (hw
->mac
.type
) {
3079 /* Device supports enough interrupts without queue pairing. */
3087 /* If rss_queues > half of max_rss_queues, pair the queues in
3088 * order to conserve interrupts due to limited supply.
3090 if (adapter
->rss_queues
> (max_rss_queues
/ 2))
3091 adapter
->flags
|= IGB_FLAG_QUEUE_PAIRS
;
3093 adapter
->flags
&= ~IGB_FLAG_QUEUE_PAIRS
;
3099 * igb_sw_init - Initialize general software structures (struct igb_adapter)
3100 * @adapter: board private structure to initialize
3102 * igb_sw_init initializes the Adapter private data structure.
3103 * Fields are initialized based on PCI device information and
3104 * OS network device settings (MTU size).
3106 static int igb_sw_init(struct igb_adapter
*adapter
)
3108 struct e1000_hw
*hw
= &adapter
->hw
;
3109 struct net_device
*netdev
= adapter
->netdev
;
3110 struct pci_dev
*pdev
= adapter
->pdev
;
3112 pci_read_config_word(pdev
, PCI_COMMAND
, &hw
->bus
.pci_cmd_word
);
3114 /* set default ring sizes */
3115 adapter
->tx_ring_count
= IGB_DEFAULT_TXD
;
3116 adapter
->rx_ring_count
= IGB_DEFAULT_RXD
;
3118 /* set default ITR values */
3119 adapter
->rx_itr_setting
= IGB_DEFAULT_ITR
;
3120 adapter
->tx_itr_setting
= IGB_DEFAULT_ITR
;
3122 /* set default work limits */
3123 adapter
->tx_work_limit
= IGB_DEFAULT_TX_WORK
;
3125 adapter
->max_frame_size
= netdev
->mtu
+ ETH_HLEN
+ ETH_FCS_LEN
+
3127 adapter
->min_frame_size
= ETH_ZLEN
+ ETH_FCS_LEN
;
3129 spin_lock_init(&adapter
->nfc_lock
);
3130 spin_lock_init(&adapter
->stats64_lock
);
3131 #ifdef CONFIG_PCI_IOV
3132 switch (hw
->mac
.type
) {
3136 dev_warn(&pdev
->dev
,
3137 "Maximum of 7 VFs per PF, using max\n");
3138 max_vfs
= adapter
->vfs_allocated_count
= 7;
3140 adapter
->vfs_allocated_count
= max_vfs
;
3141 if (adapter
->vfs_allocated_count
)
3142 dev_warn(&pdev
->dev
,
3143 "Enabling SR-IOV VFs using the module parameter is deprecated - please use the pci sysfs interface.\n");
3148 #endif /* CONFIG_PCI_IOV */
3150 /* Assume MSI-X interrupts, will be checked during IRQ allocation */
3151 adapter
->flags
|= IGB_FLAG_HAS_MSIX
;
3153 adapter
->mac_table
= kzalloc(sizeof(struct igb_mac_addr
) *
3154 hw
->mac
.rar_entry_count
, GFP_ATOMIC
);
3155 if (!adapter
->mac_table
)
3158 igb_probe_vfs(adapter
);
3160 igb_init_queue_configuration(adapter
);
3162 /* Setup and initialize a copy of the hw vlan table array */
3163 adapter
->shadow_vfta
= kcalloc(E1000_VLAN_FILTER_TBL_SIZE
, sizeof(u32
),
3166 /* This call may decrease the number of queues */
3167 if (igb_init_interrupt_scheme(adapter
, true)) {
3168 dev_err(&pdev
->dev
, "Unable to allocate memory for queues\n");
3172 /* Explicitly disable IRQ since the NIC can be in any state. */
3173 igb_irq_disable(adapter
);
3175 if (hw
->mac
.type
>= e1000_i350
)
3176 adapter
->flags
&= ~IGB_FLAG_DMAC
;
3178 set_bit(__IGB_DOWN
, &adapter
->state
);
3183 * igb_open - Called when a network interface is made active
3184 * @netdev: network interface device structure
3186 * Returns 0 on success, negative value on failure
3188 * The open entry point is called when a network interface is made
3189 * active by the system (IFF_UP). At this point all resources needed
3190 * for transmit and receive operations are allocated, the interrupt
3191 * handler is registered with the OS, the watchdog timer is started,
3192 * and the stack is notified that the interface is ready.
3194 static int __igb_open(struct net_device
*netdev
, bool resuming
)
3196 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3197 struct e1000_hw
*hw
= &adapter
->hw
;
3198 struct pci_dev
*pdev
= adapter
->pdev
;
3202 /* disallow open during test */
3203 if (test_bit(__IGB_TESTING
, &adapter
->state
)) {
3209 pm_runtime_get_sync(&pdev
->dev
);
3211 netif_carrier_off(netdev
);
3213 /* allocate transmit descriptors */
3214 err
= igb_setup_all_tx_resources(adapter
);
3218 /* allocate receive descriptors */
3219 err
= igb_setup_all_rx_resources(adapter
);
3223 igb_power_up_link(adapter
);
3225 /* before we allocate an interrupt, we must be ready to handle it.
3226 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
3227 * as soon as we call pci_request_irq, so we have to setup our
3228 * clean_rx handler before we do so.
3230 igb_configure(adapter
);
3232 err
= igb_request_irq(adapter
);
3236 /* Notify the stack of the actual queue counts. */
3237 err
= netif_set_real_num_tx_queues(adapter
->netdev
,
3238 adapter
->num_tx_queues
);
3240 goto err_set_queues
;
3242 err
= netif_set_real_num_rx_queues(adapter
->netdev
,
3243 adapter
->num_rx_queues
);
3245 goto err_set_queues
;
3247 /* From here on the code is the same as igb_up() */
3248 clear_bit(__IGB_DOWN
, &adapter
->state
);
3250 for (i
= 0; i
< adapter
->num_q_vectors
; i
++)
3251 napi_enable(&(adapter
->q_vector
[i
]->napi
));
3253 /* Clear any pending interrupts. */
3256 igb_irq_enable(adapter
);
3258 /* notify VFs that reset has been completed */
3259 if (adapter
->vfs_allocated_count
) {
3260 u32 reg_data
= rd32(E1000_CTRL_EXT
);
3262 reg_data
|= E1000_CTRL_EXT_PFRSTD
;
3263 wr32(E1000_CTRL_EXT
, reg_data
);
3266 netif_tx_start_all_queues(netdev
);
3269 pm_runtime_put(&pdev
->dev
);
3271 /* start the watchdog. */
3272 hw
->mac
.get_link_status
= 1;
3273 schedule_work(&adapter
->watchdog_task
);
3278 igb_free_irq(adapter
);
3280 igb_release_hw_control(adapter
);
3281 igb_power_down_link(adapter
);
3282 igb_free_all_rx_resources(adapter
);
3284 igb_free_all_tx_resources(adapter
);
3288 pm_runtime_put(&pdev
->dev
);
3293 int igb_open(struct net_device
*netdev
)
3295 return __igb_open(netdev
, false);
3299 * igb_close - Disables a network interface
3300 * @netdev: network interface device structure
3302 * Returns 0, this is not allowed to fail
3304 * The close entry point is called when an interface is de-activated
3305 * by the OS. The hardware is still under the driver's control, but
3306 * needs to be disabled. A global MAC reset is issued to stop the
3307 * hardware, and all transmit and receive resources are freed.
3309 static int __igb_close(struct net_device
*netdev
, bool suspending
)
3311 struct igb_adapter
*adapter
= netdev_priv(netdev
);
3312 struct pci_dev
*pdev
= adapter
->pdev
;
3314 WARN_ON(test_bit(__IGB_RESETTING
, &adapter
->state
));
3317 pm_runtime_get_sync(&pdev
->dev
);
3320 igb_free_irq(adapter
);
3322 igb_free_all_tx_resources(adapter
);
3323 igb_free_all_rx_resources(adapter
);
3326 pm_runtime_put_sync(&pdev
->dev
);
3330 int igb_close(struct net_device
*netdev
)
3332 if (netif_device_present(netdev
))
3333 return __igb_close(netdev
, false);
3338 * igb_setup_tx_resources - allocate Tx resources (Descriptors)
3339 * @tx_ring: tx descriptor ring (for a specific queue) to setup
3341 * Return 0 on success, negative on failure
3343 int igb_setup_tx_resources(struct igb_ring
*tx_ring
)
3345 struct device
*dev
= tx_ring
->dev
;
3348 size
= sizeof(struct igb_tx_buffer
) * tx_ring
->count
;
3350 tx_ring
->tx_buffer_info
= vmalloc(size
);
3351 if (!tx_ring
->tx_buffer_info
)
3354 /* round up to nearest 4K */
3355 tx_ring
->size
= tx_ring
->count
* sizeof(union e1000_adv_tx_desc
);
3356 tx_ring
->size
= ALIGN(tx_ring
->size
, 4096);
3358 tx_ring
->desc
= dma_alloc_coherent(dev
, tx_ring
->size
,
3359 &tx_ring
->dma
, GFP_KERNEL
);
3363 tx_ring
->next_to_use
= 0;
3364 tx_ring
->next_to_clean
= 0;
3369 vfree(tx_ring
->tx_buffer_info
);
3370 tx_ring
->tx_buffer_info
= NULL
;
3371 dev_err(dev
, "Unable to allocate memory for the Tx descriptor ring\n");
3376 * igb_setup_all_tx_resources - wrapper to allocate Tx resources
3377 * (Descriptors) for all queues
3378 * @adapter: board private structure
3380 * Return 0 on success, negative on failure
3382 static int igb_setup_all_tx_resources(struct igb_adapter
*adapter
)
3384 struct pci_dev
*pdev
= adapter
->pdev
;
3387 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
3388 err
= igb_setup_tx_resources(adapter
->tx_ring
[i
]);
3391 "Allocation for Tx Queue %u failed\n", i
);
3392 for (i
--; i
>= 0; i
--)
3393 igb_free_tx_resources(adapter
->tx_ring
[i
]);
3402 * igb_setup_tctl - configure the transmit control registers
3403 * @adapter: Board private structure
3405 void igb_setup_tctl(struct igb_adapter
*adapter
)
3407 struct e1000_hw
*hw
= &adapter
->hw
;
3410 /* disable queue 0 which is enabled by default on 82575 and 82576 */
3411 wr32(E1000_TXDCTL(0), 0);
3413 /* Program the Transmit Control Register */
3414 tctl
= rd32(E1000_TCTL
);
3415 tctl
&= ~E1000_TCTL_CT
;
3416 tctl
|= E1000_TCTL_PSP
| E1000_TCTL_RTLC
|
3417 (E1000_COLLISION_THRESHOLD
<< E1000_CT_SHIFT
);
3419 igb_config_collision_dist(hw
);
3421 /* Enable transmits */
3422 tctl
|= E1000_TCTL_EN
;
3424 wr32(E1000_TCTL
, tctl
);
3428 * igb_configure_tx_ring - Configure transmit ring after Reset
3429 * @adapter: board private structure
3430 * @ring: tx ring to configure
3432 * Configure a transmit ring after a reset.
3434 void igb_configure_tx_ring(struct igb_adapter
*adapter
,
3435 struct igb_ring
*ring
)
3437 struct e1000_hw
*hw
= &adapter
->hw
;
3439 u64 tdba
= ring
->dma
;
3440 int reg_idx
= ring
->reg_idx
;
3442 /* disable the queue */
3443 wr32(E1000_TXDCTL(reg_idx
), 0);
3447 wr32(E1000_TDLEN(reg_idx
),
3448 ring
->count
* sizeof(union e1000_adv_tx_desc
));
3449 wr32(E1000_TDBAL(reg_idx
),
3450 tdba
& 0x00000000ffffffffULL
);
3451 wr32(E1000_TDBAH(reg_idx
), tdba
>> 32);
3453 ring
->tail
= adapter
->io_addr
+ E1000_TDT(reg_idx
);
3454 wr32(E1000_TDH(reg_idx
), 0);
3455 writel(0, ring
->tail
);
3457 txdctl
|= IGB_TX_PTHRESH
;
3458 txdctl
|= IGB_TX_HTHRESH
<< 8;
3459 txdctl
|= IGB_TX_WTHRESH
<< 16;
3461 /* reinitialize tx_buffer_info */
3462 memset(ring
->tx_buffer_info
, 0,
3463 sizeof(struct igb_tx_buffer
) * ring
->count
);
3465 txdctl
|= E1000_TXDCTL_QUEUE_ENABLE
;
3466 wr32(E1000_TXDCTL(reg_idx
), txdctl
);
3470 * igb_configure_tx - Configure transmit Unit after Reset
3471 * @adapter: board private structure
3473 * Configure the Tx unit of the MAC after a reset.
3475 static void igb_configure_tx(struct igb_adapter
*adapter
)
3479 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
3480 igb_configure_tx_ring(adapter
, adapter
->tx_ring
[i
]);
3484 * igb_setup_rx_resources - allocate Rx resources (Descriptors)
3485 * @rx_ring: Rx descriptor ring (for a specific queue) to setup
3487 * Returns 0 on success, negative on failure
3489 int igb_setup_rx_resources(struct igb_ring
*rx_ring
)
3491 struct device
*dev
= rx_ring
->dev
;
3494 size
= sizeof(struct igb_rx_buffer
) * rx_ring
->count
;
3496 rx_ring
->rx_buffer_info
= vmalloc(size
);
3497 if (!rx_ring
->rx_buffer_info
)
3500 /* Round up to nearest 4K */
3501 rx_ring
->size
= rx_ring
->count
* sizeof(union e1000_adv_rx_desc
);
3502 rx_ring
->size
= ALIGN(rx_ring
->size
, 4096);
3504 rx_ring
->desc
= dma_alloc_coherent(dev
, rx_ring
->size
,
3505 &rx_ring
->dma
, GFP_KERNEL
);
3509 rx_ring
->next_to_alloc
= 0;
3510 rx_ring
->next_to_clean
= 0;
3511 rx_ring
->next_to_use
= 0;
3516 vfree(rx_ring
->rx_buffer_info
);
3517 rx_ring
->rx_buffer_info
= NULL
;
3518 dev_err(dev
, "Unable to allocate memory for the Rx descriptor ring\n");
3523 * igb_setup_all_rx_resources - wrapper to allocate Rx resources
3524 * (Descriptors) for all queues
3525 * @adapter: board private structure
3527 * Return 0 on success, negative on failure
3529 static int igb_setup_all_rx_resources(struct igb_adapter
*adapter
)
3531 struct pci_dev
*pdev
= adapter
->pdev
;
3534 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
3535 err
= igb_setup_rx_resources(adapter
->rx_ring
[i
]);
3538 "Allocation for Rx Queue %u failed\n", i
);
3539 for (i
--; i
>= 0; i
--)
3540 igb_free_rx_resources(adapter
->rx_ring
[i
]);
3549 * igb_setup_mrqc - configure the multiple receive queue control registers
3550 * @adapter: Board private structure
3552 static void igb_setup_mrqc(struct igb_adapter
*adapter
)
3554 struct e1000_hw
*hw
= &adapter
->hw
;
3556 u32 j
, num_rx_queues
;
3559 netdev_rss_key_fill(rss_key
, sizeof(rss_key
));
3560 for (j
= 0; j
< 10; j
++)
3561 wr32(E1000_RSSRK(j
), rss_key
[j
]);
3563 num_rx_queues
= adapter
->rss_queues
;
3565 switch (hw
->mac
.type
) {
3567 /* 82576 supports 2 RSS queues for SR-IOV */
3568 if (adapter
->vfs_allocated_count
)
3575 if (adapter
->rss_indir_tbl_init
!= num_rx_queues
) {
3576 for (j
= 0; j
< IGB_RETA_SIZE
; j
++)
3577 adapter
->rss_indir_tbl
[j
] =
3578 (j
* num_rx_queues
) / IGB_RETA_SIZE
;
3579 adapter
->rss_indir_tbl_init
= num_rx_queues
;
3581 igb_write_rss_indir_tbl(adapter
);
3583 /* Disable raw packet checksumming so that RSS hash is placed in
3584 * descriptor on writeback. No need to enable TCP/UDP/IP checksum
3585 * offloads as they are enabled by default
3587 rxcsum
= rd32(E1000_RXCSUM
);
3588 rxcsum
|= E1000_RXCSUM_PCSD
;
3590 if (adapter
->hw
.mac
.type
>= e1000_82576
)
3591 /* Enable Receive Checksum Offload for SCTP */
3592 rxcsum
|= E1000_RXCSUM_CRCOFL
;
3594 /* Don't need to set TUOFL or IPOFL, they default to 1 */
3595 wr32(E1000_RXCSUM
, rxcsum
);
3597 /* Generate RSS hash based on packet types, TCP/UDP
3598 * port numbers and/or IPv4/v6 src and dst addresses
3600 mrqc
= E1000_MRQC_RSS_FIELD_IPV4
|
3601 E1000_MRQC_RSS_FIELD_IPV4_TCP
|
3602 E1000_MRQC_RSS_FIELD_IPV6
|
3603 E1000_MRQC_RSS_FIELD_IPV6_TCP
|
3604 E1000_MRQC_RSS_FIELD_IPV6_TCP_EX
;
3606 if (adapter
->flags
& IGB_FLAG_RSS_FIELD_IPV4_UDP
)
3607 mrqc
|= E1000_MRQC_RSS_FIELD_IPV4_UDP
;
3608 if (adapter
->flags
& IGB_FLAG_RSS_FIELD_IPV6_UDP
)
3609 mrqc
|= E1000_MRQC_RSS_FIELD_IPV6_UDP
;
3611 /* If VMDq is enabled then we set the appropriate mode for that, else
3612 * we default to RSS so that an RSS hash is calculated per packet even
3613 * if we are only using one queue
3615 if (adapter
->vfs_allocated_count
) {
3616 if (hw
->mac
.type
> e1000_82575
) {
3617 /* Set the default pool for the PF's first queue */
3618 u32 vtctl
= rd32(E1000_VT_CTL
);
3620 vtctl
&= ~(E1000_VT_CTL_DEFAULT_POOL_MASK
|
3621 E1000_VT_CTL_DISABLE_DEF_POOL
);
3622 vtctl
|= adapter
->vfs_allocated_count
<<
3623 E1000_VT_CTL_DEFAULT_POOL_SHIFT
;
3624 wr32(E1000_VT_CTL
, vtctl
);
3626 if (adapter
->rss_queues
> 1)
3627 mrqc
|= E1000_MRQC_ENABLE_VMDQ_RSS_MQ
;
3629 mrqc
|= E1000_MRQC_ENABLE_VMDQ
;
3631 if (hw
->mac
.type
!= e1000_i211
)
3632 mrqc
|= E1000_MRQC_ENABLE_RSS_MQ
;
3634 igb_vmm_control(adapter
);
3636 wr32(E1000_MRQC
, mrqc
);
3640 * igb_setup_rctl - configure the receive control registers
3641 * @adapter: Board private structure
3643 void igb_setup_rctl(struct igb_adapter
*adapter
)
3645 struct e1000_hw
*hw
= &adapter
->hw
;
3648 rctl
= rd32(E1000_RCTL
);
3650 rctl
&= ~(3 << E1000_RCTL_MO_SHIFT
);
3651 rctl
&= ~(E1000_RCTL_LBM_TCVR
| E1000_RCTL_LBM_MAC
);
3653 rctl
|= E1000_RCTL_EN
| E1000_RCTL_BAM
| E1000_RCTL_RDMTS_HALF
|
3654 (hw
->mac
.mc_filter_type
<< E1000_RCTL_MO_SHIFT
);
3656 /* enable stripping of CRC. It's unlikely this will break BMC
3657 * redirection as it did with e1000. Newer features require
3658 * that the HW strips the CRC.
3660 rctl
|= E1000_RCTL_SECRC
;
3662 /* disable store bad packets and clear size bits. */
3663 rctl
&= ~(E1000_RCTL_SBP
| E1000_RCTL_SZ_256
);
3665 /* enable LPE to allow for reception of jumbo frames */
3666 rctl
|= E1000_RCTL_LPE
;
3668 /* disable queue 0 to prevent tail write w/o re-config */
3669 wr32(E1000_RXDCTL(0), 0);
3671 /* Attention!!! For SR-IOV PF driver operations you must enable
3672 * queue drop for all VF and PF queues to prevent head of line blocking
3673 * if an un-trusted VF does not provide descriptors to hardware.
3675 if (adapter
->vfs_allocated_count
) {
3676 /* set all queue drop enable bits */
3677 wr32(E1000_QDE
, ALL_QUEUES
);
3680 /* This is useful for sniffing bad packets. */
3681 if (adapter
->netdev
->features
& NETIF_F_RXALL
) {
3682 /* UPE and MPE will be handled by normal PROMISC logic
3683 * in e1000e_set_rx_mode
3685 rctl
|= (E1000_RCTL_SBP
| /* Receive bad packets */
3686 E1000_RCTL_BAM
| /* RX All Bcast Pkts */
3687 E1000_RCTL_PMCF
); /* RX All MAC Ctrl Pkts */
3689 rctl
&= ~(E1000_RCTL_DPF
| /* Allow filtered pause */
3690 E1000_RCTL_CFIEN
); /* Dis VLAN CFIEN Filter */
3691 /* Do not mess with E1000_CTRL_VME, it affects transmit as well,
3692 * and that breaks VLANs.
3696 wr32(E1000_RCTL
, rctl
);
3699 static inline int igb_set_vf_rlpml(struct igb_adapter
*adapter
, int size
,
3702 struct e1000_hw
*hw
= &adapter
->hw
;
3705 if (size
> MAX_JUMBO_FRAME_SIZE
)
3706 size
= MAX_JUMBO_FRAME_SIZE
;
3708 vmolr
= rd32(E1000_VMOLR(vfn
));
3709 vmolr
&= ~E1000_VMOLR_RLPML_MASK
;
3710 vmolr
|= size
| E1000_VMOLR_LPE
;
3711 wr32(E1000_VMOLR(vfn
), vmolr
);
3716 static inline void igb_set_vf_vlan_strip(struct igb_adapter
*adapter
,
3717 int vfn
, bool enable
)
3719 struct e1000_hw
*hw
= &adapter
->hw
;
3722 if (hw
->mac
.type
< e1000_82576
)
3725 if (hw
->mac
.type
== e1000_i350
)
3726 reg
= E1000_DVMOLR(vfn
);
3728 reg
= E1000_VMOLR(vfn
);
3732 val
|= E1000_VMOLR_STRVLAN
;
3734 val
&= ~(E1000_VMOLR_STRVLAN
);
3738 static inline void igb_set_vmolr(struct igb_adapter
*adapter
,
3741 struct e1000_hw
*hw
= &adapter
->hw
;
3744 /* This register exists only on 82576 and newer so if we are older then
3745 * we should exit and do nothing
3747 if (hw
->mac
.type
< e1000_82576
)
3750 vmolr
= rd32(E1000_VMOLR(vfn
));
3752 vmolr
|= E1000_VMOLR_AUPE
; /* Accept untagged packets */
3754 vmolr
&= ~(E1000_VMOLR_AUPE
); /* Tagged packets ONLY */
3756 /* clear all bits that might not be set */
3757 vmolr
&= ~(E1000_VMOLR_BAM
| E1000_VMOLR_RSSE
);
3759 if (adapter
->rss_queues
> 1 && vfn
== adapter
->vfs_allocated_count
)
3760 vmolr
|= E1000_VMOLR_RSSE
; /* enable RSS */
3761 /* for VMDq only allow the VFs and pool 0 to accept broadcast and
3764 if (vfn
<= adapter
->vfs_allocated_count
)
3765 vmolr
|= E1000_VMOLR_BAM
; /* Accept broadcast */
3767 wr32(E1000_VMOLR(vfn
), vmolr
);
3771 * igb_configure_rx_ring - Configure a receive ring after Reset
3772 * @adapter: board private structure
3773 * @ring: receive ring to be configured
3775 * Configure the Rx unit of the MAC after a reset.
3777 void igb_configure_rx_ring(struct igb_adapter
*adapter
,
3778 struct igb_ring
*ring
)
3780 struct e1000_hw
*hw
= &adapter
->hw
;
3781 union e1000_adv_rx_desc
*rx_desc
;
3782 u64 rdba
= ring
->dma
;
3783 int reg_idx
= ring
->reg_idx
;
3784 u32 srrctl
= 0, rxdctl
= 0;
3786 /* disable the queue */
3787 wr32(E1000_RXDCTL(reg_idx
), 0);
3789 /* Set DMA base address registers */
3790 wr32(E1000_RDBAL(reg_idx
),
3791 rdba
& 0x00000000ffffffffULL
);
3792 wr32(E1000_RDBAH(reg_idx
), rdba
>> 32);
3793 wr32(E1000_RDLEN(reg_idx
),
3794 ring
->count
* sizeof(union e1000_adv_rx_desc
));
3796 /* initialize head and tail */
3797 ring
->tail
= adapter
->io_addr
+ E1000_RDT(reg_idx
);
3798 wr32(E1000_RDH(reg_idx
), 0);
3799 writel(0, ring
->tail
);
3801 /* set descriptor configuration */
3802 srrctl
= IGB_RX_HDR_LEN
<< E1000_SRRCTL_BSIZEHDRSIZE_SHIFT
;
3803 if (ring_uses_large_buffer(ring
))
3804 srrctl
|= IGB_RXBUFFER_3072
>> E1000_SRRCTL_BSIZEPKT_SHIFT
;
3806 srrctl
|= IGB_RXBUFFER_2048
>> E1000_SRRCTL_BSIZEPKT_SHIFT
;
3807 srrctl
|= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF
;
3808 if (hw
->mac
.type
>= e1000_82580
)
3809 srrctl
|= E1000_SRRCTL_TIMESTAMP
;
3810 /* Only set Drop Enable if we are supporting multiple queues */
3811 if (adapter
->vfs_allocated_count
|| adapter
->num_rx_queues
> 1)
3812 srrctl
|= E1000_SRRCTL_DROP_EN
;
3814 wr32(E1000_SRRCTL(reg_idx
), srrctl
);
3816 /* set filtering for VMDQ pools */
3817 igb_set_vmolr(adapter
, reg_idx
& 0x7, true);
3819 rxdctl
|= IGB_RX_PTHRESH
;
3820 rxdctl
|= IGB_RX_HTHRESH
<< 8;
3821 rxdctl
|= IGB_RX_WTHRESH
<< 16;
3823 /* initialize rx_buffer_info */
3824 memset(ring
->rx_buffer_info
, 0,
3825 sizeof(struct igb_rx_buffer
) * ring
->count
);
3827 /* initialize Rx descriptor 0 */
3828 rx_desc
= IGB_RX_DESC(ring
, 0);
3829 rx_desc
->wb
.upper
.length
= 0;
3831 /* enable receive descriptor fetching */
3832 rxdctl
|= E1000_RXDCTL_QUEUE_ENABLE
;
3833 wr32(E1000_RXDCTL(reg_idx
), rxdctl
);
3836 static void igb_set_rx_buffer_len(struct igb_adapter
*adapter
,
3837 struct igb_ring
*rx_ring
)
3839 /* set build_skb and buffer size flags */
3840 clear_ring_build_skb_enabled(rx_ring
);
3841 clear_ring_uses_large_buffer(rx_ring
);
3843 if (adapter
->flags
& IGB_FLAG_RX_LEGACY
)
3846 set_ring_build_skb_enabled(rx_ring
);
3848 #if (PAGE_SIZE < 8192)
3849 if (adapter
->max_frame_size
<= IGB_MAX_FRAME_BUILD_SKB
)
3852 set_ring_uses_large_buffer(rx_ring
);
3857 * igb_configure_rx - Configure receive Unit after Reset
3858 * @adapter: board private structure
3860 * Configure the Rx unit of the MAC after a reset.
3862 static void igb_configure_rx(struct igb_adapter
*adapter
)
3866 /* set the correct pool for the PF default MAC address in entry 0 */
3867 igb_set_default_mac_filter(adapter
);
3869 /* Setup the HW Rx Head and Tail Descriptor Pointers and
3870 * the Base and Length of the Rx Descriptor Ring
3872 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
3873 struct igb_ring
*rx_ring
= adapter
->rx_ring
[i
];
3875 igb_set_rx_buffer_len(adapter
, rx_ring
);
3876 igb_configure_rx_ring(adapter
, rx_ring
);
3881 * igb_free_tx_resources - Free Tx Resources per Queue
3882 * @tx_ring: Tx descriptor ring for a specific queue
3884 * Free all transmit software resources
3886 void igb_free_tx_resources(struct igb_ring
*tx_ring
)
3888 igb_clean_tx_ring(tx_ring
);
3890 vfree(tx_ring
->tx_buffer_info
);
3891 tx_ring
->tx_buffer_info
= NULL
;
3893 /* if not set, then don't free */
3897 dma_free_coherent(tx_ring
->dev
, tx_ring
->size
,
3898 tx_ring
->desc
, tx_ring
->dma
);
3900 tx_ring
->desc
= NULL
;
3904 * igb_free_all_tx_resources - Free Tx Resources for All Queues
3905 * @adapter: board private structure
3907 * Free all transmit software resources
3909 static void igb_free_all_tx_resources(struct igb_adapter
*adapter
)
3913 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
3914 if (adapter
->tx_ring
[i
])
3915 igb_free_tx_resources(adapter
->tx_ring
[i
]);
3919 * igb_clean_tx_ring - Free Tx Buffers
3920 * @tx_ring: ring to be cleaned
3922 static void igb_clean_tx_ring(struct igb_ring
*tx_ring
)
3924 u16 i
= tx_ring
->next_to_clean
;
3925 struct igb_tx_buffer
*tx_buffer
= &tx_ring
->tx_buffer_info
[i
];
3927 while (i
!= tx_ring
->next_to_use
) {
3928 union e1000_adv_tx_desc
*eop_desc
, *tx_desc
;
3930 /* Free all the Tx ring sk_buffs */
3931 dev_kfree_skb_any(tx_buffer
->skb
);
3933 /* unmap skb header data */
3934 dma_unmap_single(tx_ring
->dev
,
3935 dma_unmap_addr(tx_buffer
, dma
),
3936 dma_unmap_len(tx_buffer
, len
),
3939 /* check for eop_desc to determine the end of the packet */
3940 eop_desc
= tx_buffer
->next_to_watch
;
3941 tx_desc
= IGB_TX_DESC(tx_ring
, i
);
3943 /* unmap remaining buffers */
3944 while (tx_desc
!= eop_desc
) {
3948 if (unlikely(i
== tx_ring
->count
)) {
3950 tx_buffer
= tx_ring
->tx_buffer_info
;
3951 tx_desc
= IGB_TX_DESC(tx_ring
, 0);
3954 /* unmap any remaining paged data */
3955 if (dma_unmap_len(tx_buffer
, len
))
3956 dma_unmap_page(tx_ring
->dev
,
3957 dma_unmap_addr(tx_buffer
, dma
),
3958 dma_unmap_len(tx_buffer
, len
),
3962 /* move us one more past the eop_desc for start of next pkt */
3965 if (unlikely(i
== tx_ring
->count
)) {
3967 tx_buffer
= tx_ring
->tx_buffer_info
;
3971 /* reset BQL for queue */
3972 netdev_tx_reset_queue(txring_txq(tx_ring
));
3974 /* reset next_to_use and next_to_clean */
3975 tx_ring
->next_to_use
= 0;
3976 tx_ring
->next_to_clean
= 0;
3980 * igb_clean_all_tx_rings - Free Tx Buffers for all queues
3981 * @adapter: board private structure
3983 static void igb_clean_all_tx_rings(struct igb_adapter
*adapter
)
3987 for (i
= 0; i
< adapter
->num_tx_queues
; i
++)
3988 if (adapter
->tx_ring
[i
])
3989 igb_clean_tx_ring(adapter
->tx_ring
[i
]);
3993 * igb_free_rx_resources - Free Rx Resources
3994 * @rx_ring: ring to clean the resources from
3996 * Free all receive software resources
3998 void igb_free_rx_resources(struct igb_ring
*rx_ring
)
4000 igb_clean_rx_ring(rx_ring
);
4002 vfree(rx_ring
->rx_buffer_info
);
4003 rx_ring
->rx_buffer_info
= NULL
;
4005 /* if not set, then don't free */
4009 dma_free_coherent(rx_ring
->dev
, rx_ring
->size
,
4010 rx_ring
->desc
, rx_ring
->dma
);
4012 rx_ring
->desc
= NULL
;
4016 * igb_free_all_rx_resources - Free Rx Resources for All Queues
4017 * @adapter: board private structure
4019 * Free all receive software resources
4021 static void igb_free_all_rx_resources(struct igb_adapter
*adapter
)
4025 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
4026 if (adapter
->rx_ring
[i
])
4027 igb_free_rx_resources(adapter
->rx_ring
[i
]);
4031 * igb_clean_rx_ring - Free Rx Buffers per Queue
4032 * @rx_ring: ring to free buffers from
4034 static void igb_clean_rx_ring(struct igb_ring
*rx_ring
)
4036 u16 i
= rx_ring
->next_to_clean
;
4039 dev_kfree_skb(rx_ring
->skb
);
4040 rx_ring
->skb
= NULL
;
4042 /* Free all the Rx ring sk_buffs */
4043 while (i
!= rx_ring
->next_to_alloc
) {
4044 struct igb_rx_buffer
*buffer_info
= &rx_ring
->rx_buffer_info
[i
];
4046 /* Invalidate cache lines that may have been written to by
4047 * device so that we avoid corrupting memory.
4049 dma_sync_single_range_for_cpu(rx_ring
->dev
,
4051 buffer_info
->page_offset
,
4052 igb_rx_bufsz(rx_ring
),
4055 /* free resources associated with mapping */
4056 dma_unmap_page_attrs(rx_ring
->dev
,
4058 igb_rx_pg_size(rx_ring
),
4061 __page_frag_cache_drain(buffer_info
->page
,
4062 buffer_info
->pagecnt_bias
);
4065 if (i
== rx_ring
->count
)
4069 rx_ring
->next_to_alloc
= 0;
4070 rx_ring
->next_to_clean
= 0;
4071 rx_ring
->next_to_use
= 0;
4075 * igb_clean_all_rx_rings - Free Rx Buffers for all queues
4076 * @adapter: board private structure
4078 static void igb_clean_all_rx_rings(struct igb_adapter
*adapter
)
4082 for (i
= 0; i
< adapter
->num_rx_queues
; i
++)
4083 if (adapter
->rx_ring
[i
])
4084 igb_clean_rx_ring(adapter
->rx_ring
[i
]);
4088 * igb_set_mac - Change the Ethernet Address of the NIC
4089 * @netdev: network interface device structure
4090 * @p: pointer to an address structure
4092 * Returns 0 on success, negative on failure
4094 static int igb_set_mac(struct net_device
*netdev
, void *p
)
4096 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4097 struct e1000_hw
*hw
= &adapter
->hw
;
4098 struct sockaddr
*addr
= p
;
4100 if (!is_valid_ether_addr(addr
->sa_data
))
4101 return -EADDRNOTAVAIL
;
4103 memcpy(netdev
->dev_addr
, addr
->sa_data
, netdev
->addr_len
);
4104 memcpy(hw
->mac
.addr
, addr
->sa_data
, netdev
->addr_len
);
4106 /* set the correct pool for the new PF MAC address in entry 0 */
4107 igb_set_default_mac_filter(adapter
);
4113 * igb_write_mc_addr_list - write multicast addresses to MTA
4114 * @netdev: network interface device structure
4116 * Writes multicast address list to the MTA hash table.
4117 * Returns: -ENOMEM on failure
4118 * 0 on no addresses written
4119 * X on writing X addresses to MTA
4121 static int igb_write_mc_addr_list(struct net_device
*netdev
)
4123 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4124 struct e1000_hw
*hw
= &adapter
->hw
;
4125 struct netdev_hw_addr
*ha
;
4129 if (netdev_mc_empty(netdev
)) {
4130 /* nothing to program, so clear mc list */
4131 igb_update_mc_addr_list(hw
, NULL
, 0);
4132 igb_restore_vf_multicasts(adapter
);
4136 mta_list
= kzalloc(netdev_mc_count(netdev
) * 6, GFP_ATOMIC
);
4140 /* The shared function expects a packed array of only addresses. */
4142 netdev_for_each_mc_addr(ha
, netdev
)
4143 memcpy(mta_list
+ (i
++ * ETH_ALEN
), ha
->addr
, ETH_ALEN
);
4145 igb_update_mc_addr_list(hw
, mta_list
, i
);
4148 return netdev_mc_count(netdev
);
4151 static int igb_vlan_promisc_enable(struct igb_adapter
*adapter
)
4153 struct e1000_hw
*hw
= &adapter
->hw
;
4156 switch (hw
->mac
.type
) {
4160 /* VLAN filtering needed for VLAN prio filter */
4161 if (adapter
->netdev
->features
& NETIF_F_NTUPLE
)
4167 /* VLAN filtering needed for pool filtering */
4168 if (adapter
->vfs_allocated_count
)
4175 /* We are already in VLAN promisc, nothing to do */
4176 if (adapter
->flags
& IGB_FLAG_VLAN_PROMISC
)
4179 if (!adapter
->vfs_allocated_count
)
4182 /* Add PF to all active pools */
4183 pf_id
= adapter
->vfs_allocated_count
+ E1000_VLVF_POOLSEL_SHIFT
;
4185 for (i
= E1000_VLVF_ARRAY_SIZE
; --i
;) {
4186 u32 vlvf
= rd32(E1000_VLVF(i
));
4189 wr32(E1000_VLVF(i
), vlvf
);
4193 /* Set all bits in the VLAN filter table array */
4194 for (i
= E1000_VLAN_FILTER_TBL_SIZE
; i
--;)
4195 hw
->mac
.ops
.write_vfta(hw
, i
, ~0U);
4197 /* Set flag so we don't redo unnecessary work */
4198 adapter
->flags
|= IGB_FLAG_VLAN_PROMISC
;
4203 #define VFTA_BLOCK_SIZE 8
4204 static void igb_scrub_vfta(struct igb_adapter
*adapter
, u32 vfta_offset
)
4206 struct e1000_hw
*hw
= &adapter
->hw
;
4207 u32 vfta
[VFTA_BLOCK_SIZE
] = { 0 };
4208 u32 vid_start
= vfta_offset
* 32;
4209 u32 vid_end
= vid_start
+ (VFTA_BLOCK_SIZE
* 32);
4210 u32 i
, vid
, word
, bits
, pf_id
;
4212 /* guarantee that we don't scrub out management VLAN */
4213 vid
= adapter
->mng_vlan_id
;
4214 if (vid
>= vid_start
&& vid
< vid_end
)
4215 vfta
[(vid
- vid_start
) / 32] |= BIT(vid
% 32);
4217 if (!adapter
->vfs_allocated_count
)
4220 pf_id
= adapter
->vfs_allocated_count
+ E1000_VLVF_POOLSEL_SHIFT
;
4222 for (i
= E1000_VLVF_ARRAY_SIZE
; --i
;) {
4223 u32 vlvf
= rd32(E1000_VLVF(i
));
4225 /* pull VLAN ID from VLVF */
4226 vid
= vlvf
& VLAN_VID_MASK
;
4228 /* only concern ourselves with a certain range */
4229 if (vid
< vid_start
|| vid
>= vid_end
)
4232 if (vlvf
& E1000_VLVF_VLANID_ENABLE
) {
4233 /* record VLAN ID in VFTA */
4234 vfta
[(vid
- vid_start
) / 32] |= BIT(vid
% 32);
4236 /* if PF is part of this then continue */
4237 if (test_bit(vid
, adapter
->active_vlans
))
4241 /* remove PF from the pool */
4243 bits
&= rd32(E1000_VLVF(i
));
4244 wr32(E1000_VLVF(i
), bits
);
4248 /* extract values from active_vlans and write back to VFTA */
4249 for (i
= VFTA_BLOCK_SIZE
; i
--;) {
4250 vid
= (vfta_offset
+ i
) * 32;
4251 word
= vid
/ BITS_PER_LONG
;
4252 bits
= vid
% BITS_PER_LONG
;
4254 vfta
[i
] |= adapter
->active_vlans
[word
] >> bits
;
4256 hw
->mac
.ops
.write_vfta(hw
, vfta_offset
+ i
, vfta
[i
]);
4260 static void igb_vlan_promisc_disable(struct igb_adapter
*adapter
)
4264 /* We are not in VLAN promisc, nothing to do */
4265 if (!(adapter
->flags
& IGB_FLAG_VLAN_PROMISC
))
4268 /* Set flag so we don't redo unnecessary work */
4269 adapter
->flags
&= ~IGB_FLAG_VLAN_PROMISC
;
4271 for (i
= 0; i
< E1000_VLAN_FILTER_TBL_SIZE
; i
+= VFTA_BLOCK_SIZE
)
4272 igb_scrub_vfta(adapter
, i
);
4276 * igb_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
4277 * @netdev: network interface device structure
4279 * The set_rx_mode entry point is called whenever the unicast or multicast
4280 * address lists or the network interface flags are updated. This routine is
4281 * responsible for configuring the hardware for proper unicast, multicast,
4282 * promiscuous mode, and all-multi behavior.
4284 static void igb_set_rx_mode(struct net_device
*netdev
)
4286 struct igb_adapter
*adapter
= netdev_priv(netdev
);
4287 struct e1000_hw
*hw
= &adapter
->hw
;
4288 unsigned int vfn
= adapter
->vfs_allocated_count
;
4289 u32 rctl
= 0, vmolr
= 0, rlpml
= MAX_JUMBO_FRAME_SIZE
;
4292 /* Check for Promiscuous and All Multicast modes */
4293 if (netdev
->flags
& IFF_PROMISC
) {
4294 rctl
|= E1000_RCTL_UPE
| E1000_RCTL_MPE
;
4295 vmolr
|= E1000_VMOLR_MPME
;
4297 /* enable use of UTA filter to force packets to default pool */
4298 if (hw
->mac
.type
== e1000_82576
)
4299 vmolr
|= E1000_VMOLR_ROPE
;
4301 if (netdev
->flags
& IFF_ALLMULTI
) {
4302 rctl
|= E1000_RCTL_MPE
;
4303 vmolr
|= E1000_VMOLR_MPME
;
4305 /* Write addresses to the MTA, if the attempt fails
4306 * then we should just turn on promiscuous mode so
4307 * that we can at least receive multicast traffic
4309 count
= igb_write_mc_addr_list(netdev
);
4311 rctl
|= E1000_RCTL_MPE
;
4312 vmolr
|= E1000_VMOLR_MPME
;
4314 vmolr
|= E1000_VMOLR_ROMPE
;
4319 /* Write addresses to available RAR registers, if there is not
4320 * sufficient space to store all the addresses then enable
4321 * unicast promiscuous mode
4323 if (__dev_uc_sync(netdev
, igb_uc_sync
, igb_uc_unsync
)) {
4324 rctl
|= E1000_RCTL_UPE
;
4325 vmolr
|= E1000_VMOLR_ROPE
;
4328 /* enable VLAN filtering by default */
4329 rctl
|= E1000_RCTL_VFE
;
4331 /* disable VLAN filtering for modes that require it */
4332 if ((netdev
->flags
& IFF_PROMISC
) ||
4333 (netdev
->features
& NETIF_F_RXALL
)) {
4334 /* if we fail to set all rules then just clear VFE */
4335 if (igb_vlan_promisc_enable(adapter
))
4336 rctl
&= ~E1000_RCTL_VFE
;
4338 igb_vlan_promisc_disable(adapter
);
4341 /* update state of unicast, multicast, and VLAN filtering modes */
4342 rctl
|= rd32(E1000_RCTL
) & ~(E1000_RCTL_UPE
| E1000_RCTL_MPE
|
4344 wr32(E1000_RCTL
, rctl
);
4346 #if (PAGE_SIZE < 8192)
4347 if (!adapter
->vfs_allocated_count
) {
4348 if (adapter
->max_frame_size
<= IGB_MAX_FRAME_BUILD_SKB
)
4349 rlpml
= IGB_MAX_FRAME_BUILD_SKB
;
4352 wr32(E1000_RLPML
, rlpml
);
4354 /* In order to support SR-IOV and eventually VMDq it is necessary to set
4355 * the VMOLR to enable the appropriate modes. Without this workaround
4356 * we will have issues with VLAN tag stripping not being done for frames
4357 * that are only arriving because we are the default pool
4359 if ((hw
->mac
.type
< e1000_82576
) || (hw
->mac
.type
> e1000_i350
))
4362 /* set UTA to appropriate mode */
4363 igb_set_uta(adapter
, !!(vmolr
& E1000_VMOLR_ROPE
));
4365 vmolr
|= rd32(E1000_VMOLR(vfn
)) &
4366 ~(E1000_VMOLR_ROPE
| E1000_VMOLR_MPME
| E1000_VMOLR_ROMPE
);
4368 /* enable Rx jumbo frames, restrict as needed to support build_skb */
4369 vmolr
&= ~E1000_VMOLR_RLPML_MASK
;
4370 #if (PAGE_SIZE < 8192)
4371 if (adapter
->max_frame_size
<= IGB_MAX_FRAME_BUILD_SKB
)
4372 vmolr
|= IGB_MAX_FRAME_BUILD_SKB
;
4375 vmolr
|= MAX_JUMBO_FRAME_SIZE
;
4376 vmolr
|= E1000_VMOLR_LPE
;
4378 wr32(E1000_VMOLR(vfn
), vmolr
);
4380 igb_restore_vf_multicasts(adapter
);
4383 static void igb_check_wvbr(struct igb_adapter
*adapter
)
4385 struct e1000_hw
*hw
= &adapter
->hw
;
4388 switch (hw
->mac
.type
) {
4391 wvbr
= rd32(E1000_WVBR
);
4399 adapter
->wvbr
|= wvbr
;
4402 #define IGB_STAGGERED_QUEUE_OFFSET 8
4404 static void igb_spoof_check(struct igb_adapter
*adapter
)
4411 for (j
= 0; j
< adapter
->vfs_allocated_count
; j
++) {
4412 if (adapter
->wvbr
& BIT(j
) ||
4413 adapter
->wvbr
& BIT(j
+ IGB_STAGGERED_QUEUE_OFFSET
)) {
4414 dev_warn(&adapter
->pdev
->dev
,
4415 "Spoof event(s) detected on VF %d\n", j
);
4418 BIT(j
+ IGB_STAGGERED_QUEUE_OFFSET
));
4423 /* Need to wait a few seconds after link up to get diagnostic information from
4426 static void igb_update_phy_info(unsigned long data
)
4428 struct igb_adapter
*adapter
= (struct igb_adapter
*) data
;
4429 igb_get_phy_info(&adapter
->hw
);
4433 * igb_has_link - check shared code for link and determine up/down
4434 * @adapter: pointer to driver private info
4436 bool igb_has_link(struct igb_adapter
*adapter
)
4438 struct e1000_hw
*hw
= &adapter
->hw
;
4439 bool link_active
= false;
4441 /* get_link_status is set on LSC (link status) interrupt or
4442 * rx sequence error interrupt. get_link_status will stay
4443 * false until the e1000_check_for_link establishes link
4444 * for copper adapters ONLY
4446 switch (hw
->phy
.media_type
) {
4447 case e1000_media_type_copper
:
4448 if (!hw
->mac
.get_link_status
)
4450 case e1000_media_type_internal_serdes
:
4451 hw
->mac
.ops
.check_for_link(hw
);
4452 link_active
= !hw
->mac
.get_link_status
;
4455 case e1000_media_type_unknown
:
4459 if (((hw
->mac
.type
== e1000_i210
) ||
4460 (hw
->mac
.type
== e1000_i211
)) &&
4461 (hw
->phy
.id
== I210_I_PHY_ID
)) {
4462 if (!netif_carrier_ok(adapter
->netdev
)) {
4463 adapter
->flags
&= ~IGB_FLAG_NEED_LINK_UPDATE
;
4464 } else if (!(adapter
->flags
& IGB_FLAG_NEED_LINK_UPDATE
)) {
4465 adapter
->flags
|= IGB_FLAG_NEED_LINK_UPDATE
;
4466 adapter
->link_check_timeout
= jiffies
;
4473 static bool igb_thermal_sensor_event(struct e1000_hw
*hw
, u32 event
)
4476 u32 ctrl_ext
, thstat
;
4478 /* check for thermal sensor event on i350 copper only */
4479 if (hw
->mac
.type
== e1000_i350
) {
4480 thstat
= rd32(E1000_THSTAT
);
4481 ctrl_ext
= rd32(E1000_CTRL_EXT
);
4483 if ((hw
->phy
.media_type
== e1000_media_type_copper
) &&
4484 !(ctrl_ext
& E1000_CTRL_EXT_LINK_MODE_SGMII
))
4485 ret
= !!(thstat
& event
);
4492 * igb_check_lvmmc - check for malformed packets received
4493 * and indicated in LVMMC register
4494 * @adapter: pointer to adapter
4496 static void igb_check_lvmmc(struct igb_adapter
*adapter
)
4498 struct e1000_hw
*hw
= &adapter
->hw
;
4501 lvmmc
= rd32(E1000_LVMMC
);
4503 if (unlikely(net_ratelimit())) {
4504 netdev_warn(adapter
->netdev
,
4505 "malformed Tx packet detected and dropped, LVMMC:0x%08x\n",
4512 * igb_watchdog - Timer Call-back
4513 * @data: pointer to adapter cast into an unsigned long
4515 static void igb_watchdog(unsigned long data
)
4517 struct igb_adapter
*adapter
= (struct igb_adapter
*)data
;
4518 /* Do the rest outside of interrupt context */
4519 schedule_work(&adapter
->watchdog_task
);
4522 static void igb_watchdog_task(struct work_struct
*work
)
4524 struct igb_adapter
*adapter
= container_of(work
,
4527 struct e1000_hw
*hw
= &adapter
->hw
;
4528 struct e1000_phy_info
*phy
= &hw
->phy
;
4529 struct net_device
*netdev
= adapter
->netdev
;
4533 u16 phy_data
, retry_count
= 20;
4535 link
= igb_has_link(adapter
);
4537 if (adapter
->flags
& IGB_FLAG_NEED_LINK_UPDATE
) {
4538 if (time_after(jiffies
, (adapter
->link_check_timeout
+ HZ
)))
4539 adapter
->flags
&= ~IGB_FLAG_NEED_LINK_UPDATE
;
4544 /* Force link down if we have fiber to swap to */
4545 if (adapter
->flags
& IGB_FLAG_MAS_ENABLE
) {
4546 if (hw
->phy
.media_type
== e1000_media_type_copper
) {
4547 connsw
= rd32(E1000_CONNSW
);
4548 if (!(connsw
& E1000_CONNSW_AUTOSENSE_EN
))
4553 /* Perform a reset if the media type changed. */
4554 if (hw
->dev_spec
._82575
.media_changed
) {
4555 hw
->dev_spec
._82575
.media_changed
= false;
4556 adapter
->flags
|= IGB_FLAG_MEDIA_RESET
;
4559 /* Cancel scheduled suspend requests. */
4560 pm_runtime_resume(netdev
->dev
.parent
);
4562 if (!netif_carrier_ok(netdev
)) {
4565 hw
->mac
.ops
.get_speed_and_duplex(hw
,
4566 &adapter
->link_speed
,
4567 &adapter
->link_duplex
);
4569 ctrl
= rd32(E1000_CTRL
);
4570 /* Links status message must follow this format */
4572 "igb: %s NIC Link is Up %d Mbps %s Duplex, Flow Control: %s\n",
4574 adapter
->link_speed
,
4575 adapter
->link_duplex
== FULL_DUPLEX
?
4577 (ctrl
& E1000_CTRL_TFCE
) &&
4578 (ctrl
& E1000_CTRL_RFCE
) ? "RX/TX" :
4579 (ctrl
& E1000_CTRL_RFCE
) ? "RX" :
4580 (ctrl
& E1000_CTRL_TFCE
) ? "TX" : "None");
4582 /* disable EEE if enabled */
4583 if ((adapter
->flags
& IGB_FLAG_EEE
) &&
4584 (adapter
->link_duplex
== HALF_DUPLEX
)) {
4585 dev_info(&adapter
->pdev
->dev
,
4586 "EEE Disabled: unsupported at half duplex. Re-enable using ethtool when at full duplex.\n");
4587 adapter
->hw
.dev_spec
._82575
.eee_disable
= true;
4588 adapter
->flags
&= ~IGB_FLAG_EEE
;
4591 /* check if SmartSpeed worked */
4592 igb_check_downshift(hw
);
4593 if (phy
->speed_downgraded
)
4594 netdev_warn(netdev
, "Link Speed was downgraded by SmartSpeed\n");
4596 /* check for thermal sensor event */
4597 if (igb_thermal_sensor_event(hw
,
4598 E1000_THSTAT_LINK_THROTTLE
))
4599 netdev_info(netdev
, "The network adapter link speed was downshifted because it overheated\n");
4601 /* adjust timeout factor according to speed/duplex */
4602 adapter
->tx_timeout_factor
= 1;
4603 switch (adapter
->link_speed
) {
4605 adapter
->tx_timeout_factor
= 14;
4608 /* maybe add some timeout factor ? */
4612 if (adapter
->link_speed
!= SPEED_1000
)
4615 /* wait for Remote receiver status OK */
4617 if (!igb_read_phy_reg(hw
, PHY_1000T_STATUS
,
4619 if (!(phy_data
& SR_1000T_REMOTE_RX_STATUS
) &&
4623 goto retry_read_status
;
4624 } else if (!retry_count
) {
4625 dev_err(&adapter
->pdev
->dev
, "exceed max 2 second\n");
4628 dev_err(&adapter
->pdev
->dev
, "read 1000Base-T Status Reg\n");
4631 netif_carrier_on(netdev
);
4633 igb_ping_all_vfs(adapter
);
4634 igb_check_vf_rate_limit(adapter
);
4636 /* link state has changed, schedule phy info update */
4637 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
4638 mod_timer(&adapter
->phy_info_timer
,
4639 round_jiffies(jiffies
+ 2 * HZ
));
4642 if (netif_carrier_ok(netdev
)) {
4643 adapter
->link_speed
= 0;
4644 adapter
->link_duplex
= 0;
4646 /* check for thermal sensor event */
4647 if (igb_thermal_sensor_event(hw
,
4648 E1000_THSTAT_PWR_DOWN
)) {
4649 netdev_err(netdev
, "The network adapter was stopped because it overheated\n");
4652 /* Links status message must follow this format */
4653 netdev_info(netdev
, "igb: %s NIC Link is Down\n",
4655 netif_carrier_off(netdev
);
4657 igb_ping_all_vfs(adapter
);
4659 /* link state has changed, schedule phy info update */
4660 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
4661 mod_timer(&adapter
->phy_info_timer
,
4662 round_jiffies(jiffies
+ 2 * HZ
));
4664 /* link is down, time to check for alternate media */
4665 if (adapter
->flags
& IGB_FLAG_MAS_ENABLE
) {
4666 igb_check_swap_media(adapter
);
4667 if (adapter
->flags
& IGB_FLAG_MEDIA_RESET
) {
4668 schedule_work(&adapter
->reset_task
);
4669 /* return immediately */
4673 pm_schedule_suspend(netdev
->dev
.parent
,
4676 /* also check for alternate media here */
4677 } else if (!netif_carrier_ok(netdev
) &&
4678 (adapter
->flags
& IGB_FLAG_MAS_ENABLE
)) {
4679 igb_check_swap_media(adapter
);
4680 if (adapter
->flags
& IGB_FLAG_MEDIA_RESET
) {
4681 schedule_work(&adapter
->reset_task
);
4682 /* return immediately */
4688 spin_lock(&adapter
->stats64_lock
);
4689 igb_update_stats(adapter
);
4690 spin_unlock(&adapter
->stats64_lock
);
4692 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
4693 struct igb_ring
*tx_ring
= adapter
->tx_ring
[i
];
4694 if (!netif_carrier_ok(netdev
)) {
4695 /* We've lost link, so the controller stops DMA,
4696 * but we've got queued Tx work that's never going
4697 * to get done, so reset controller to flush Tx.
4698 * (Do the reset outside of interrupt context).
4700 if (igb_desc_unused(tx_ring
) + 1 < tx_ring
->count
) {
4701 adapter
->tx_timeout_count
++;
4702 schedule_work(&adapter
->reset_task
);
4703 /* return immediately since reset is imminent */
4708 /* Force detection of hung controller every watchdog period */
4709 set_bit(IGB_RING_FLAG_TX_DETECT_HANG
, &tx_ring
->flags
);
4712 /* Cause software interrupt to ensure Rx ring is cleaned */
4713 if (adapter
->flags
& IGB_FLAG_HAS_MSIX
) {
4716 for (i
= 0; i
< adapter
->num_q_vectors
; i
++)
4717 eics
|= adapter
->q_vector
[i
]->eims_value
;
4718 wr32(E1000_EICS
, eics
);
4720 wr32(E1000_ICS
, E1000_ICS_RXDMT0
);
4723 igb_spoof_check(adapter
);
4724 igb_ptp_rx_hang(adapter
);
4725 igb_ptp_tx_hang(adapter
);
4727 /* Check LVMMC register on i350/i354 only */
4728 if ((adapter
->hw
.mac
.type
== e1000_i350
) ||
4729 (adapter
->hw
.mac
.type
== e1000_i354
))
4730 igb_check_lvmmc(adapter
);
4732 /* Reset the timer */
4733 if (!test_bit(__IGB_DOWN
, &adapter
->state
)) {
4734 if (adapter
->flags
& IGB_FLAG_NEED_LINK_UPDATE
)
4735 mod_timer(&adapter
->watchdog_timer
,
4736 round_jiffies(jiffies
+ HZ
));
4738 mod_timer(&adapter
->watchdog_timer
,
4739 round_jiffies(jiffies
+ 2 * HZ
));
4743 enum latency_range
{
4747 latency_invalid
= 255
4751 * igb_update_ring_itr - update the dynamic ITR value based on packet size
4752 * @q_vector: pointer to q_vector
4754 * Stores a new ITR value based on strictly on packet size. This
4755 * algorithm is less sophisticated than that used in igb_update_itr,
4756 * due to the difficulty of synchronizing statistics across multiple
4757 * receive rings. The divisors and thresholds used by this function
4758 * were determined based on theoretical maximum wire speed and testing
4759 * data, in order to minimize response time while increasing bulk
4761 * This functionality is controlled by ethtool's coalescing settings.
4762 * NOTE: This function is called only when operating in a multiqueue
4763 * receive environment.
4765 static void igb_update_ring_itr(struct igb_q_vector
*q_vector
)
4767 int new_val
= q_vector
->itr_val
;
4768 int avg_wire_size
= 0;
4769 struct igb_adapter
*adapter
= q_vector
->adapter
;
4770 unsigned int packets
;
4772 /* For non-gigabit speeds, just fix the interrupt rate at 4000
4773 * ints/sec - ITR timer value of 120 ticks.
4775 if (adapter
->link_speed
!= SPEED_1000
) {
4776 new_val
= IGB_4K_ITR
;
4780 packets
= q_vector
->rx
.total_packets
;
4782 avg_wire_size
= q_vector
->rx
.total_bytes
/ packets
;
4784 packets
= q_vector
->tx
.total_packets
;
4786 avg_wire_size
= max_t(u32
, avg_wire_size
,
4787 q_vector
->tx
.total_bytes
/ packets
);
4789 /* if avg_wire_size isn't set no work was done */
4793 /* Add 24 bytes to size to account for CRC, preamble, and gap */
4794 avg_wire_size
+= 24;
4796 /* Don't starve jumbo frames */
4797 avg_wire_size
= min(avg_wire_size
, 3000);
4799 /* Give a little boost to mid-size frames */
4800 if ((avg_wire_size
> 300) && (avg_wire_size
< 1200))
4801 new_val
= avg_wire_size
/ 3;
4803 new_val
= avg_wire_size
/ 2;
4805 /* conservative mode (itr 3) eliminates the lowest_latency setting */
4806 if (new_val
< IGB_20K_ITR
&&
4807 ((q_vector
->rx
.ring
&& adapter
->rx_itr_setting
== 3) ||
4808 (!q_vector
->rx
.ring
&& adapter
->tx_itr_setting
== 3)))
4809 new_val
= IGB_20K_ITR
;
4812 if (new_val
!= q_vector
->itr_val
) {
4813 q_vector
->itr_val
= new_val
;
4814 q_vector
->set_itr
= 1;
4817 q_vector
->rx
.total_bytes
= 0;
4818 q_vector
->rx
.total_packets
= 0;
4819 q_vector
->tx
.total_bytes
= 0;
4820 q_vector
->tx
.total_packets
= 0;
4824 * igb_update_itr - update the dynamic ITR value based on statistics
4825 * @q_vector: pointer to q_vector
4826 * @ring_container: ring info to update the itr for
4828 * Stores a new ITR value based on packets and byte
4829 * counts during the last interrupt. The advantage of per interrupt
4830 * computation is faster updates and more accurate ITR for the current
4831 * traffic pattern. Constants in this function were computed
4832 * based on theoretical maximum wire speed and thresholds were set based
4833 * on testing data as well as attempting to minimize response time
4834 * while increasing bulk throughput.
4835 * This functionality is controlled by ethtool's coalescing settings.
4836 * NOTE: These calculations are only valid when operating in a single-
4837 * queue environment.
4839 static void igb_update_itr(struct igb_q_vector
*q_vector
,
4840 struct igb_ring_container
*ring_container
)
4842 unsigned int packets
= ring_container
->total_packets
;
4843 unsigned int bytes
= ring_container
->total_bytes
;
4844 u8 itrval
= ring_container
->itr
;
4846 /* no packets, exit with status unchanged */
4851 case lowest_latency
:
4852 /* handle TSO and jumbo frames */
4853 if (bytes
/packets
> 8000)
4854 itrval
= bulk_latency
;
4855 else if ((packets
< 5) && (bytes
> 512))
4856 itrval
= low_latency
;
4858 case low_latency
: /* 50 usec aka 20000 ints/s */
4859 if (bytes
> 10000) {
4860 /* this if handles the TSO accounting */
4861 if (bytes
/packets
> 8000)
4862 itrval
= bulk_latency
;
4863 else if ((packets
< 10) || ((bytes
/packets
) > 1200))
4864 itrval
= bulk_latency
;
4865 else if ((packets
> 35))
4866 itrval
= lowest_latency
;
4867 } else if (bytes
/packets
> 2000) {
4868 itrval
= bulk_latency
;
4869 } else if (packets
<= 2 && bytes
< 512) {
4870 itrval
= lowest_latency
;
4873 case bulk_latency
: /* 250 usec aka 4000 ints/s */
4874 if (bytes
> 25000) {
4876 itrval
= low_latency
;
4877 } else if (bytes
< 1500) {
4878 itrval
= low_latency
;
4883 /* clear work counters since we have the values we need */
4884 ring_container
->total_bytes
= 0;
4885 ring_container
->total_packets
= 0;
4887 /* write updated itr to ring container */
4888 ring_container
->itr
= itrval
;
4891 static void igb_set_itr(struct igb_q_vector
*q_vector
)
4893 struct igb_adapter
*adapter
= q_vector
->adapter
;
4894 u32 new_itr
= q_vector
->itr_val
;
4897 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
4898 if (adapter
->link_speed
!= SPEED_1000
) {
4900 new_itr
= IGB_4K_ITR
;
4904 igb_update_itr(q_vector
, &q_vector
->tx
);
4905 igb_update_itr(q_vector
, &q_vector
->rx
);
4907 current_itr
= max(q_vector
->rx
.itr
, q_vector
->tx
.itr
);
4909 /* conservative mode (itr 3) eliminates the lowest_latency setting */
4910 if (current_itr
== lowest_latency
&&
4911 ((q_vector
->rx
.ring
&& adapter
->rx_itr_setting
== 3) ||
4912 (!q_vector
->rx
.ring
&& adapter
->tx_itr_setting
== 3)))
4913 current_itr
= low_latency
;
4915 switch (current_itr
) {
4916 /* counts and packets in update_itr are dependent on these numbers */
4917 case lowest_latency
:
4918 new_itr
= IGB_70K_ITR
; /* 70,000 ints/sec */
4921 new_itr
= IGB_20K_ITR
; /* 20,000 ints/sec */
4924 new_itr
= IGB_4K_ITR
; /* 4,000 ints/sec */
4931 if (new_itr
!= q_vector
->itr_val
) {
4932 /* this attempts to bias the interrupt rate towards Bulk
4933 * by adding intermediate steps when interrupt rate is
4936 new_itr
= new_itr
> q_vector
->itr_val
?
4937 max((new_itr
* q_vector
->itr_val
) /
4938 (new_itr
+ (q_vector
->itr_val
>> 2)),
4940 /* Don't write the value here; it resets the adapter's
4941 * internal timer, and causes us to delay far longer than
4942 * we should between interrupts. Instead, we write the ITR
4943 * value at the beginning of the next interrupt so the timing
4944 * ends up being correct.
4946 q_vector
->itr_val
= new_itr
;
4947 q_vector
->set_itr
= 1;
4951 static void igb_tx_ctxtdesc(struct igb_ring
*tx_ring
, u32 vlan_macip_lens
,
4952 u32 type_tucmd
, u32 mss_l4len_idx
)
4954 struct e1000_adv_tx_context_desc
*context_desc
;
4955 u16 i
= tx_ring
->next_to_use
;
4957 context_desc
= IGB_TX_CTXTDESC(tx_ring
, i
);
4960 tx_ring
->next_to_use
= (i
< tx_ring
->count
) ? i
: 0;
4962 /* set bits to identify this as an advanced context descriptor */
4963 type_tucmd
|= E1000_TXD_CMD_DEXT
| E1000_ADVTXD_DTYP_CTXT
;
4965 /* For 82575, context index must be unique per ring. */
4966 if (test_bit(IGB_RING_FLAG_TX_CTX_IDX
, &tx_ring
->flags
))
4967 mss_l4len_idx
|= tx_ring
->reg_idx
<< 4;
4969 context_desc
->vlan_macip_lens
= cpu_to_le32(vlan_macip_lens
);
4970 context_desc
->seqnum_seed
= 0;
4971 context_desc
->type_tucmd_mlhl
= cpu_to_le32(type_tucmd
);
4972 context_desc
->mss_l4len_idx
= cpu_to_le32(mss_l4len_idx
);
4975 static int igb_tso(struct igb_ring
*tx_ring
,
4976 struct igb_tx_buffer
*first
,
4979 u32 vlan_macip_lens
, type_tucmd
, mss_l4len_idx
;
4980 struct sk_buff
*skb
= first
->skb
;
4990 u32 paylen
, l4_offset
;
4993 if (skb
->ip_summed
!= CHECKSUM_PARTIAL
)
4996 if (!skb_is_gso(skb
))
4999 err
= skb_cow_head(skb
, 0);
5003 ip
.hdr
= skb_network_header(skb
);
5004 l4
.hdr
= skb_checksum_start(skb
);
5006 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
5007 type_tucmd
= E1000_ADVTXD_TUCMD_L4T_TCP
;
5009 /* initialize outer IP header fields */
5010 if (ip
.v4
->version
== 4) {
5011 unsigned char *csum_start
= skb_checksum_start(skb
);
5012 unsigned char *trans_start
= ip
.hdr
+ (ip
.v4
->ihl
* 4);
5014 /* IP header will have to cancel out any data that
5015 * is not a part of the outer IP header
5017 ip
.v4
->check
= csum_fold(csum_partial(trans_start
,
5018 csum_start
- trans_start
,
5020 type_tucmd
|= E1000_ADVTXD_TUCMD_IPV4
;
5023 first
->tx_flags
|= IGB_TX_FLAGS_TSO
|
5027 ip
.v6
->payload_len
= 0;
5028 first
->tx_flags
|= IGB_TX_FLAGS_TSO
|
5032 /* determine offset of inner transport header */
5033 l4_offset
= l4
.hdr
- skb
->data
;
5035 /* compute length of segmentation header */
5036 *hdr_len
= (l4
.tcp
->doff
* 4) + l4_offset
;
5038 /* remove payload length from inner checksum */
5039 paylen
= skb
->len
- l4_offset
;
5040 csum_replace_by_diff(&l4
.tcp
->check
, htonl(paylen
));
5042 /* update gso size and bytecount with header size */
5043 first
->gso_segs
= skb_shinfo(skb
)->gso_segs
;
5044 first
->bytecount
+= (first
->gso_segs
- 1) * *hdr_len
;
5047 mss_l4len_idx
= (*hdr_len
- l4_offset
) << E1000_ADVTXD_L4LEN_SHIFT
;
5048 mss_l4len_idx
|= skb_shinfo(skb
)->gso_size
<< E1000_ADVTXD_MSS_SHIFT
;
5050 /* VLAN MACLEN IPLEN */
5051 vlan_macip_lens
= l4
.hdr
- ip
.hdr
;
5052 vlan_macip_lens
|= (ip
.hdr
- skb
->data
) << E1000_ADVTXD_MACLEN_SHIFT
;
5053 vlan_macip_lens
|= first
->tx_flags
& IGB_TX_FLAGS_VLAN_MASK
;
5055 igb_tx_ctxtdesc(tx_ring
, vlan_macip_lens
, type_tucmd
, mss_l4len_idx
);
5060 static inline bool igb_ipv6_csum_is_sctp(struct sk_buff
*skb
)
5062 unsigned int offset
= 0;
5064 ipv6_find_hdr(skb
, &offset
, IPPROTO_SCTP
, NULL
, NULL
);
5066 return offset
== skb_checksum_start_offset(skb
);
5069 static void igb_tx_csum(struct igb_ring
*tx_ring
, struct igb_tx_buffer
*first
)
5071 struct sk_buff
*skb
= first
->skb
;
5072 u32 vlan_macip_lens
= 0;
5075 if (skb
->ip_summed
!= CHECKSUM_PARTIAL
) {
5077 if (!(first
->tx_flags
& IGB_TX_FLAGS_VLAN
))
5082 switch (skb
->csum_offset
) {
5083 case offsetof(struct tcphdr
, check
):
5084 type_tucmd
= E1000_ADVTXD_TUCMD_L4T_TCP
;
5086 case offsetof(struct udphdr
, check
):
5088 case offsetof(struct sctphdr
, checksum
):
5089 /* validate that this is actually an SCTP request */
5090 if (((first
->protocol
== htons(ETH_P_IP
)) &&
5091 (ip_hdr(skb
)->protocol
== IPPROTO_SCTP
)) ||
5092 ((first
->protocol
== htons(ETH_P_IPV6
)) &&
5093 igb_ipv6_csum_is_sctp(skb
))) {
5094 type_tucmd
= E1000_ADVTXD_TUCMD_L4T_SCTP
;
5098 skb_checksum_help(skb
);
5102 /* update TX checksum flag */
5103 first
->tx_flags
|= IGB_TX_FLAGS_CSUM
;
5104 vlan_macip_lens
= skb_checksum_start_offset(skb
) -
5105 skb_network_offset(skb
);
5107 vlan_macip_lens
|= skb_network_offset(skb
) << E1000_ADVTXD_MACLEN_SHIFT
;
5108 vlan_macip_lens
|= first
->tx_flags
& IGB_TX_FLAGS_VLAN_MASK
;
5110 igb_tx_ctxtdesc(tx_ring
, vlan_macip_lens
, type_tucmd
, 0);
5113 #define IGB_SET_FLAG(_input, _flag, _result) \
5114 ((_flag <= _result) ? \
5115 ((u32)(_input & _flag) * (_result / _flag)) : \
5116 ((u32)(_input & _flag) / (_flag / _result)))
5118 static u32
igb_tx_cmd_type(struct sk_buff
*skb
, u32 tx_flags
)
5120 /* set type for advanced descriptor with frame checksum insertion */
5121 u32 cmd_type
= E1000_ADVTXD_DTYP_DATA
|
5122 E1000_ADVTXD_DCMD_DEXT
|
5123 E1000_ADVTXD_DCMD_IFCS
;
5125 /* set HW vlan bit if vlan is present */
5126 cmd_type
|= IGB_SET_FLAG(tx_flags
, IGB_TX_FLAGS_VLAN
,
5127 (E1000_ADVTXD_DCMD_VLE
));
5129 /* set segmentation bits for TSO */
5130 cmd_type
|= IGB_SET_FLAG(tx_flags
, IGB_TX_FLAGS_TSO
,
5131 (E1000_ADVTXD_DCMD_TSE
));
5133 /* set timestamp bit if present */
5134 cmd_type
|= IGB_SET_FLAG(tx_flags
, IGB_TX_FLAGS_TSTAMP
,
5135 (E1000_ADVTXD_MAC_TSTAMP
));
5137 /* insert frame checksum */
5138 cmd_type
^= IGB_SET_FLAG(skb
->no_fcs
, 1, E1000_ADVTXD_DCMD_IFCS
);
5143 static void igb_tx_olinfo_status(struct igb_ring
*tx_ring
,
5144 union e1000_adv_tx_desc
*tx_desc
,
5145 u32 tx_flags
, unsigned int paylen
)
5147 u32 olinfo_status
= paylen
<< E1000_ADVTXD_PAYLEN_SHIFT
;
5149 /* 82575 requires a unique index per ring */
5150 if (test_bit(IGB_RING_FLAG_TX_CTX_IDX
, &tx_ring
->flags
))
5151 olinfo_status
|= tx_ring
->reg_idx
<< 4;
5153 /* insert L4 checksum */
5154 olinfo_status
|= IGB_SET_FLAG(tx_flags
,
5156 (E1000_TXD_POPTS_TXSM
<< 8));
5158 /* insert IPv4 checksum */
5159 olinfo_status
|= IGB_SET_FLAG(tx_flags
,
5161 (E1000_TXD_POPTS_IXSM
<< 8));
5163 tx_desc
->read
.olinfo_status
= cpu_to_le32(olinfo_status
);
5166 static int __igb_maybe_stop_tx(struct igb_ring
*tx_ring
, const u16 size
)
5168 struct net_device
*netdev
= tx_ring
->netdev
;
5170 netif_stop_subqueue(netdev
, tx_ring
->queue_index
);
5172 /* Herbert's original patch had:
5173 * smp_mb__after_netif_stop_queue();
5174 * but since that doesn't exist yet, just open code it.
5178 /* We need to check again in a case another CPU has just
5179 * made room available.
5181 if (igb_desc_unused(tx_ring
) < size
)
5185 netif_wake_subqueue(netdev
, tx_ring
->queue_index
);
5187 u64_stats_update_begin(&tx_ring
->tx_syncp2
);
5188 tx_ring
->tx_stats
.restart_queue2
++;
5189 u64_stats_update_end(&tx_ring
->tx_syncp2
);
5194 static inline int igb_maybe_stop_tx(struct igb_ring
*tx_ring
, const u16 size
)
5196 if (igb_desc_unused(tx_ring
) >= size
)
5198 return __igb_maybe_stop_tx(tx_ring
, size
);
5201 static int igb_tx_map(struct igb_ring
*tx_ring
,
5202 struct igb_tx_buffer
*first
,
5205 struct sk_buff
*skb
= first
->skb
;
5206 struct igb_tx_buffer
*tx_buffer
;
5207 union e1000_adv_tx_desc
*tx_desc
;
5208 struct skb_frag_struct
*frag
;
5210 unsigned int data_len
, size
;
5211 u32 tx_flags
= first
->tx_flags
;
5212 u32 cmd_type
= igb_tx_cmd_type(skb
, tx_flags
);
5213 u16 i
= tx_ring
->next_to_use
;
5215 tx_desc
= IGB_TX_DESC(tx_ring
, i
);
5217 igb_tx_olinfo_status(tx_ring
, tx_desc
, tx_flags
, skb
->len
- hdr_len
);
5219 size
= skb_headlen(skb
);
5220 data_len
= skb
->data_len
;
5222 dma
= dma_map_single(tx_ring
->dev
, skb
->data
, size
, DMA_TO_DEVICE
);
5226 for (frag
= &skb_shinfo(skb
)->frags
[0];; frag
++) {
5227 if (dma_mapping_error(tx_ring
->dev
, dma
))
5230 /* record length, and DMA address */
5231 dma_unmap_len_set(tx_buffer
, len
, size
);
5232 dma_unmap_addr_set(tx_buffer
, dma
, dma
);
5234 tx_desc
->read
.buffer_addr
= cpu_to_le64(dma
);
5236 while (unlikely(size
> IGB_MAX_DATA_PER_TXD
)) {
5237 tx_desc
->read
.cmd_type_len
=
5238 cpu_to_le32(cmd_type
^ IGB_MAX_DATA_PER_TXD
);
5242 if (i
== tx_ring
->count
) {
5243 tx_desc
= IGB_TX_DESC(tx_ring
, 0);
5246 tx_desc
->read
.olinfo_status
= 0;
5248 dma
+= IGB_MAX_DATA_PER_TXD
;
5249 size
-= IGB_MAX_DATA_PER_TXD
;
5251 tx_desc
->read
.buffer_addr
= cpu_to_le64(dma
);
5254 if (likely(!data_len
))
5257 tx_desc
->read
.cmd_type_len
= cpu_to_le32(cmd_type
^ size
);
5261 if (i
== tx_ring
->count
) {
5262 tx_desc
= IGB_TX_DESC(tx_ring
, 0);
5265 tx_desc
->read
.olinfo_status
= 0;
5267 size
= skb_frag_size(frag
);
5270 dma
= skb_frag_dma_map(tx_ring
->dev
, frag
, 0,
5271 size
, DMA_TO_DEVICE
);
5273 tx_buffer
= &tx_ring
->tx_buffer_info
[i
];
5276 /* write last descriptor with RS and EOP bits */
5277 cmd_type
|= size
| IGB_TXD_DCMD
;
5278 tx_desc
->read
.cmd_type_len
= cpu_to_le32(cmd_type
);
5280 netdev_tx_sent_queue(txring_txq(tx_ring
), first
->bytecount
);
5282 /* set the timestamp */
5283 first
->time_stamp
= jiffies
;
5285 /* Force memory writes to complete before letting h/w know there
5286 * are new descriptors to fetch. (Only applicable for weak-ordered
5287 * memory model archs, such as IA-64).
5289 * We also need this memory barrier to make certain all of the
5290 * status bits have been updated before next_to_watch is written.
5294 /* set next_to_watch value indicating a packet is present */
5295 first
->next_to_watch
= tx_desc
;
5298 if (i
== tx_ring
->count
)
5301 tx_ring
->next_to_use
= i
;
5303 /* Make sure there is space in the ring for the next send. */
5304 igb_maybe_stop_tx(tx_ring
, DESC_NEEDED
);
5306 if (netif_xmit_stopped(txring_txq(tx_ring
)) || !skb
->xmit_more
) {
5307 writel(i
, tx_ring
->tail
);
5309 /* we need this if more than one processor can write to our tail
5310 * at a time, it synchronizes IO on IA64/Altix systems
5317 dev_err(tx_ring
->dev
, "TX DMA map failed\n");
5318 tx_buffer
= &tx_ring
->tx_buffer_info
[i
];
5320 /* clear dma mappings for failed tx_buffer_info map */
5321 while (tx_buffer
!= first
) {
5322 if (dma_unmap_len(tx_buffer
, len
))
5323 dma_unmap_page(tx_ring
->dev
,
5324 dma_unmap_addr(tx_buffer
, dma
),
5325 dma_unmap_len(tx_buffer
, len
),
5327 dma_unmap_len_set(tx_buffer
, len
, 0);
5330 i
+= tx_ring
->count
;
5331 tx_buffer
= &tx_ring
->tx_buffer_info
[i
];
5334 if (dma_unmap_len(tx_buffer
, len
))
5335 dma_unmap_single(tx_ring
->dev
,
5336 dma_unmap_addr(tx_buffer
, dma
),
5337 dma_unmap_len(tx_buffer
, len
),
5339 dma_unmap_len_set(tx_buffer
, len
, 0);
5341 dev_kfree_skb_any(tx_buffer
->skb
);
5342 tx_buffer
->skb
= NULL
;
5344 tx_ring
->next_to_use
= i
;
5349 netdev_tx_t
igb_xmit_frame_ring(struct sk_buff
*skb
,
5350 struct igb_ring
*tx_ring
)
5352 struct igb_tx_buffer
*first
;
5356 u16 count
= TXD_USE_COUNT(skb_headlen(skb
));
5357 __be16 protocol
= vlan_get_protocol(skb
);
5360 /* need: 1 descriptor per page * PAGE_SIZE/IGB_MAX_DATA_PER_TXD,
5361 * + 1 desc for skb_headlen/IGB_MAX_DATA_PER_TXD,
5362 * + 2 desc gap to keep tail from touching head,
5363 * + 1 desc for context descriptor,
5364 * otherwise try next time
5366 for (f
= 0; f
< skb_shinfo(skb
)->nr_frags
; f
++)
5367 count
+= TXD_USE_COUNT(skb_shinfo(skb
)->frags
[f
].size
);
5369 if (igb_maybe_stop_tx(tx_ring
, count
+ 3)) {
5370 /* this is a hard error */
5371 return NETDEV_TX_BUSY
;
5374 /* record the location of the first descriptor for this packet */
5375 first
= &tx_ring
->tx_buffer_info
[tx_ring
->next_to_use
];
5377 first
->bytecount
= skb
->len
;
5378 first
->gso_segs
= 1;
5380 if (unlikely(skb_shinfo(skb
)->tx_flags
& SKBTX_HW_TSTAMP
)) {
5381 struct igb_adapter
*adapter
= netdev_priv(tx_ring
->netdev
);
5383 if (adapter
->tstamp_config
.tx_type
& HWTSTAMP_TX_ON
&&
5384 !test_and_set_bit_lock(__IGB_PTP_TX_IN_PROGRESS
,
5386 skb_shinfo(skb
)->tx_flags
|= SKBTX_IN_PROGRESS
;
5387 tx_flags
|= IGB_TX_FLAGS_TSTAMP
;
5389 adapter
->ptp_tx_skb
= skb_get(skb
);
5390 adapter
->ptp_tx_start
= jiffies
;
5391 if (adapter
->hw
.mac
.type
== e1000_82576
)
5392 schedule_work(&adapter
->ptp_tx_work
);
5394 adapter
->tx_hwtstamp_skipped
++;
5398 skb_tx_timestamp(skb
);
5400 if (skb_vlan_tag_present(skb
)) {
5401 tx_flags
|= IGB_TX_FLAGS_VLAN
;
5402 tx_flags
|= (skb_vlan_tag_get(skb
) << IGB_TX_FLAGS_VLAN_SHIFT
);
5405 /* record initial flags and protocol */
5406 first
->tx_flags
= tx_flags
;
5407 first
->protocol
= protocol
;
5409 tso
= igb_tso(tx_ring
, first
, &hdr_len
);
5413 igb_tx_csum(tx_ring
, first
);
5415 if (igb_tx_map(tx_ring
, first
, hdr_len
))
5416 goto cleanup_tx_tstamp
;
5418 return NETDEV_TX_OK
;
5421 dev_kfree_skb_any(first
->skb
);
5424 if (unlikely(tx_flags
& IGB_TX_FLAGS_TSTAMP
)) {
5425 struct igb_adapter
*adapter
= netdev_priv(tx_ring
->netdev
);
5427 dev_kfree_skb_any(adapter
->ptp_tx_skb
);
5428 adapter
->ptp_tx_skb
= NULL
;
5429 if (adapter
->hw
.mac
.type
== e1000_82576
)
5430 cancel_work_sync(&adapter
->ptp_tx_work
);
5431 clear_bit_unlock(__IGB_PTP_TX_IN_PROGRESS
, &adapter
->state
);
5434 return NETDEV_TX_OK
;
5437 static inline struct igb_ring
*igb_tx_queue_mapping(struct igb_adapter
*adapter
,
5438 struct sk_buff
*skb
)
5440 unsigned int r_idx
= skb
->queue_mapping
;
5442 if (r_idx
>= adapter
->num_tx_queues
)
5443 r_idx
= r_idx
% adapter
->num_tx_queues
;
5445 return adapter
->tx_ring
[r_idx
];
5448 static netdev_tx_t
igb_xmit_frame(struct sk_buff
*skb
,
5449 struct net_device
*netdev
)
5451 struct igb_adapter
*adapter
= netdev_priv(netdev
);
5453 /* The minimum packet size with TCTL.PSP set is 17 so pad the skb
5454 * in order to meet this minimum size requirement.
5456 if (skb_put_padto(skb
, 17))
5457 return NETDEV_TX_OK
;
5459 return igb_xmit_frame_ring(skb
, igb_tx_queue_mapping(adapter
, skb
));
5463 * igb_tx_timeout - Respond to a Tx Hang
5464 * @netdev: network interface device structure
5466 static void igb_tx_timeout(struct net_device
*netdev
)
5468 struct igb_adapter
*adapter
= netdev_priv(netdev
);
5469 struct e1000_hw
*hw
= &adapter
->hw
;
5471 /* Do the reset outside of interrupt context */
5472 adapter
->tx_timeout_count
++;
5474 if (hw
->mac
.type
>= e1000_82580
)
5475 hw
->dev_spec
._82575
.global_device_reset
= true;
5477 schedule_work(&adapter
->reset_task
);
5479 (adapter
->eims_enable_mask
& ~adapter
->eims_other
));
5482 static void igb_reset_task(struct work_struct
*work
)
5484 struct igb_adapter
*adapter
;
5485 adapter
= container_of(work
, struct igb_adapter
, reset_task
);
5488 netdev_err(adapter
->netdev
, "Reset adapter\n");
5489 igb_reinit_locked(adapter
);
5493 * igb_get_stats64 - Get System Network Statistics
5494 * @netdev: network interface device structure
5495 * @stats: rtnl_link_stats64 pointer
5497 static void igb_get_stats64(struct net_device
*netdev
,
5498 struct rtnl_link_stats64
*stats
)
5500 struct igb_adapter
*adapter
= netdev_priv(netdev
);
5502 spin_lock(&adapter
->stats64_lock
);
5503 igb_update_stats(adapter
);
5504 memcpy(stats
, &adapter
->stats64
, sizeof(*stats
));
5505 spin_unlock(&adapter
->stats64_lock
);
5509 * igb_change_mtu - Change the Maximum Transfer Unit
5510 * @netdev: network interface device structure
5511 * @new_mtu: new value for maximum frame size
5513 * Returns 0 on success, negative on failure
5515 static int igb_change_mtu(struct net_device
*netdev
, int new_mtu
)
5517 struct igb_adapter
*adapter
= netdev_priv(netdev
);
5518 struct pci_dev
*pdev
= adapter
->pdev
;
5519 int max_frame
= new_mtu
+ ETH_HLEN
+ ETH_FCS_LEN
+ VLAN_HLEN
;
5521 /* adjust max frame to be at least the size of a standard frame */
5522 if (max_frame
< (ETH_FRAME_LEN
+ ETH_FCS_LEN
))
5523 max_frame
= ETH_FRAME_LEN
+ ETH_FCS_LEN
;
5525 while (test_and_set_bit(__IGB_RESETTING
, &adapter
->state
))
5526 usleep_range(1000, 2000);
5528 /* igb_down has a dependency on max_frame_size */
5529 adapter
->max_frame_size
= max_frame
;
5531 if (netif_running(netdev
))
5534 dev_info(&pdev
->dev
, "changing MTU from %d to %d\n",
5535 netdev
->mtu
, new_mtu
);
5536 netdev
->mtu
= new_mtu
;
5538 if (netif_running(netdev
))
5543 clear_bit(__IGB_RESETTING
, &adapter
->state
);
5549 * igb_update_stats - Update the board statistics counters
5550 * @adapter: board private structure
5552 void igb_update_stats(struct igb_adapter
*adapter
)
5554 struct rtnl_link_stats64
*net_stats
= &adapter
->stats64
;
5555 struct e1000_hw
*hw
= &adapter
->hw
;
5556 struct pci_dev
*pdev
= adapter
->pdev
;
5561 u64 _bytes
, _packets
;
5563 /* Prevent stats update while adapter is being reset, or if the pci
5564 * connection is down.
5566 if (adapter
->link_speed
== 0)
5568 if (pci_channel_offline(pdev
))
5575 for (i
= 0; i
< adapter
->num_rx_queues
; i
++) {
5576 struct igb_ring
*ring
= adapter
->rx_ring
[i
];
5577 u32 rqdpc
= rd32(E1000_RQDPC(i
));
5578 if (hw
->mac
.type
>= e1000_i210
)
5579 wr32(E1000_RQDPC(i
), 0);
5582 ring
->rx_stats
.drops
+= rqdpc
;
5583 net_stats
->rx_fifo_errors
+= rqdpc
;
5587 start
= u64_stats_fetch_begin_irq(&ring
->rx_syncp
);
5588 _bytes
= ring
->rx_stats
.bytes
;
5589 _packets
= ring
->rx_stats
.packets
;
5590 } while (u64_stats_fetch_retry_irq(&ring
->rx_syncp
, start
));
5592 packets
+= _packets
;
5595 net_stats
->rx_bytes
= bytes
;
5596 net_stats
->rx_packets
= packets
;
5600 for (i
= 0; i
< adapter
->num_tx_queues
; i
++) {
5601 struct igb_ring
*ring
= adapter
->tx_ring
[i
];
5603 start
= u64_stats_fetch_begin_irq(&ring
->tx_syncp
);
5604 _bytes
= ring
->tx_stats
.bytes
;
5605 _packets
= ring
->tx_stats
.packets
;
5606 } while (u64_stats_fetch_retry_irq(&ring
->tx_syncp
, start
));
5608 packets
+= _packets
;
5610 net_stats
->tx_bytes
= bytes
;
5611 net_stats
->tx_packets
= packets
;
5614 /* read stats registers */
5615 adapter
->stats
.crcerrs
+= rd32(E1000_CRCERRS
);
5616 adapter
->stats
.gprc
+= rd32(E1000_GPRC
);
5617 adapter
->stats
.gorc
+= rd32(E1000_GORCL
);
5618 rd32(E1000_GORCH
); /* clear GORCL */
5619 adapter
->stats
.bprc
+= rd32(E1000_BPRC
);
5620 adapter
->stats
.mprc
+= rd32(E1000_MPRC
);
5621 adapter
->stats
.roc
+= rd32(E1000_ROC
);
5623 adapter
->stats
.prc64
+= rd32(E1000_PRC64
);
5624 adapter
->stats
.prc127
+= rd32(E1000_PRC127
);
5625 adapter
->stats
.prc255
+= rd32(E1000_PRC255
);
5626 adapter
->stats
.prc511
+= rd32(E1000_PRC511
);
5627 adapter
->stats
.prc1023
+= rd32(E1000_PRC1023
);
5628 adapter
->stats
.prc1522
+= rd32(E1000_PRC1522
);
5629 adapter
->stats
.symerrs
+= rd32(E1000_SYMERRS
);
5630 adapter
->stats
.sec
+= rd32(E1000_SEC
);
5632 mpc
= rd32(E1000_MPC
);
5633 adapter
->stats
.mpc
+= mpc
;
5634 net_stats
->rx_fifo_errors
+= mpc
;
5635 adapter
->stats
.scc
+= rd32(E1000_SCC
);
5636 adapter
->stats
.ecol
+= rd32(E1000_ECOL
);
5637 adapter
->stats
.mcc
+= rd32(E1000_MCC
);
5638 adapter
->stats
.latecol
+= rd32(E1000_LATECOL
);
5639 adapter
->stats
.dc
+= rd32(E1000_DC
);
5640 adapter
->stats
.rlec
+= rd32(E1000_RLEC
);
5641 adapter
->stats
.xonrxc
+= rd32(E1000_XONRXC
);
5642 adapter
->stats
.xontxc
+= rd32(E1000_XONTXC
);
5643 adapter
->stats
.xoffrxc
+= rd32(E1000_XOFFRXC
);
5644 adapter
->stats
.xofftxc
+= rd32(E1000_XOFFTXC
);
5645 adapter
->stats
.fcruc
+= rd32(E1000_FCRUC
);
5646 adapter
->stats
.gptc
+= rd32(E1000_GPTC
);
5647 adapter
->stats
.gotc
+= rd32(E1000_GOTCL
);
5648 rd32(E1000_GOTCH
); /* clear GOTCL */
5649 adapter
->stats
.rnbc
+= rd32(E1000_RNBC
);
5650 adapter
->stats
.ruc
+= rd32(E1000_RUC
);
5651 adapter
->stats
.rfc
+= rd32(E1000_RFC
);
5652 adapter
->stats
.rjc
+= rd32(E1000_RJC
);
5653 adapter
->stats
.tor
+= rd32(E1000_TORH
);
5654 adapter
->stats
.tot
+= rd32(E1000_TOTH
);
5655 adapter
->stats
.tpr
+= rd32(E1000_TPR
);
5657 adapter
->stats
.ptc64
+= rd32(E1000_PTC64
);
5658 adapter
->stats
.ptc127
+= rd32(E1000_PTC127
);
5659 adapter
->stats
.ptc255
+= rd32(E1000_PTC255
);
5660 adapter
->stats
.ptc511
+= rd32(E1000_PTC511
);
5661 adapter
->stats
.ptc1023
+= rd32(E1000_PTC1023
);
5662 adapter
->stats
.ptc1522
+= rd32(E1000_PTC1522
);
5664 adapter
->stats
.mptc
+= rd32(E1000_MPTC
);
5665 adapter
->stats
.bptc
+= rd32(E1000_BPTC
);
5667 adapter
->stats
.tpt
+= rd32(E1000_TPT
);
5668 adapter
->stats
.colc
+= rd32(E1000_COLC
);
5670 adapter
->stats
.algnerrc
+= rd32(E1000_ALGNERRC
);
5671 /* read internal phy specific stats */
5672 reg
= rd32(E1000_CTRL_EXT
);
5673 if (!(reg
& E1000_CTRL_EXT_LINK_MODE_MASK
)) {
5674 adapter
->stats
.rxerrc
+= rd32(E1000_RXERRC
);
5676 /* this stat has invalid values on i210/i211 */
5677 if ((hw
->mac
.type
!= e1000_i210
) &&
5678 (hw
->mac
.type
!= e1000_i211
))
5679 adapter
->stats
.tncrs
+= rd32(E1000_TNCRS
);
5682 adapter
->stats
.tsctc
+= rd32(E1000_TSCTC
);
5683 adapter
->stats
.tsctfc
+= rd32(E1000_TSCTFC
);
5685 adapter
->stats
.iac
+= rd32(E1000_IAC
);
5686 adapter
->stats
.icrxoc
+= rd32(E1000_ICRXOC
);
5687 adapter
->stats
.icrxptc
+= rd32(E1000_ICRXPTC
);
5688 adapter
->stats
.icrxatc
+= rd32(E1000_ICRXATC
);
5689 adapter
->stats
.ictxptc
+= rd32(E1000_ICTXPTC
);
5690 adapter
->stats
.ictxatc
+= rd32(E1000_ICTXATC
);
5691 adapter
->stats
.ictxqec
+= rd32(E1000_ICTXQEC
);
5692 adapter
->stats
.ictxqmtc
+= rd32(E1000_ICTXQMTC
);
5693 adapter
->stats
.icrxdmtc
+= rd32(E1000_ICRXDMTC
);
5695 /* Fill out the OS statistics structure */
5696 net_stats
->multicast
= adapter
->stats
.mprc
;
5697 net_stats
->collisions
= adapter
->stats
.colc
;
5701 /* RLEC on some newer hardware can be incorrect so build
5702 * our own version based on RUC and ROC
5704 net_stats
->rx_errors
= adapter
->stats
.rxerrc
+
5705 adapter
->stats
.crcerrs
+ adapter
->stats
.algnerrc
+
5706 adapter
->stats
.ruc
+ adapter
->stats
.roc
+
5707 adapter
->stats
.cexterr
;
5708 net_stats
->rx_length_errors
= adapter
->stats
.ruc
+
5710 net_stats
->rx_crc_errors
= adapter
->stats
.crcerrs
;
5711 net_stats
->rx_frame_errors
= adapter
->stats
.algnerrc
;
5712 net_stats
->rx_missed_errors
= adapter
->stats
.mpc
;
5715 net_stats
->tx_errors
= adapter
->stats
.ecol
+
5716 adapter
->stats
.latecol
;
5717 net_stats
->tx_aborted_errors
= adapter
->stats
.ecol
;
5718 net_stats
->tx_window_errors
= adapter
->stats
.latecol
;
5719 net_stats
->tx_carrier_errors
= adapter
->stats
.tncrs
;
5721 /* Tx Dropped needs to be maintained elsewhere */
5723 /* Management Stats */
5724 adapter
->stats
.mgptc
+= rd32(E1000_MGTPTC
);
5725 adapter
->stats
.mgprc
+= rd32(E1000_MGTPRC
);
5726 adapter
->stats
.mgpdc
+= rd32(E1000_MGTPDC
);
5729 reg
= rd32(E1000_MANC
);
5730 if (reg
& E1000_MANC_EN_BMC2OS
) {
5731 adapter
->stats
.o2bgptc
+= rd32(E1000_O2BGPTC
);
5732 adapter
->stats
.o2bspc
+= rd32(E1000_O2BSPC
);
5733 adapter
->stats
.b2ospc
+= rd32(E1000_B2OSPC
);
5734 adapter
->stats
.b2ogprc
+= rd32(E1000_B2OGPRC
);
5738 static void igb_tsync_interrupt(struct igb_adapter
*adapter
)
5740 struct e1000_hw
*hw
= &adapter
->hw
;
5741 struct ptp_clock_event event
;
5742 struct timespec64 ts
;
5743 u32 ack
= 0, tsauxc
, sec
, nsec
, tsicr
= rd32(E1000_TSICR
);
5745 if (tsicr
& TSINTR_SYS_WRAP
) {
5746 event
.type
= PTP_CLOCK_PPS
;
5747 if (adapter
->ptp_caps
.pps
)
5748 ptp_clock_event(adapter
->ptp_clock
, &event
);
5749 ack
|= TSINTR_SYS_WRAP
;
5752 if (tsicr
& E1000_TSICR_TXTS
) {
5753 /* retrieve hardware timestamp */
5754 schedule_work(&adapter
->ptp_tx_work
);
5755 ack
|= E1000_TSICR_TXTS
;
5758 if (tsicr
& TSINTR_TT0
) {
5759 spin_lock(&adapter
->tmreg_lock
);
5760 ts
= timespec64_add(adapter
->perout
[0].start
,
5761 adapter
->perout
[0].period
);
5762 /* u32 conversion of tv_sec is safe until y2106 */
5763 wr32(E1000_TRGTTIML0
, ts
.tv_nsec
);
5764 wr32(E1000_TRGTTIMH0
, (u32
)ts
.tv_sec
);
5765 tsauxc
= rd32(E1000_TSAUXC
);
5766 tsauxc
|= TSAUXC_EN_TT0
;
5767 wr32(E1000_TSAUXC
, tsauxc
);
5768 adapter
->perout
[0].start
= ts
;
5769 spin_unlock(&adapter
->tmreg_lock
);
5773 if (tsicr
& TSINTR_TT1
) {
5774 spin_lock(&adapter
->tmreg_lock
);
5775 ts
= timespec64_add(adapter
->perout
[1].start
,
5776 adapter
->perout
[1].period
);
5777 wr32(E1000_TRGTTIML1
, ts
.tv_nsec
);
5778 wr32(E1000_TRGTTIMH1
, (u32
)ts
.tv_sec
);
5779 tsauxc
= rd32(E1000_TSAUXC
);
5780 tsauxc
|= TSAUXC_EN_TT1
;
5781 wr32(E1000_TSAUXC
, tsauxc
);
5782 adapter
->perout
[1].start
= ts
;
5783 spin_unlock(&adapter
->tmreg_lock
);
5787 if (tsicr
& TSINTR_AUTT0
) {
5788 nsec
= rd32(E1000_AUXSTMPL0
);
5789 sec
= rd32(E1000_AUXSTMPH0
);
5790 event
.type
= PTP_CLOCK_EXTTS
;
5792 event
.timestamp
= sec
* 1000000000ULL + nsec
;
5793 ptp_clock_event(adapter
->ptp_clock
, &event
);
5794 ack
|= TSINTR_AUTT0
;
5797 if (tsicr
& TSINTR_AUTT1
) {
5798 nsec
= rd32(E1000_AUXSTMPL1
);
5799 sec
= rd32(E1000_AUXSTMPH1
);
5800 event
.type
= PTP_CLOCK_EXTTS
;
5802 event
.timestamp
= sec
* 1000000000ULL + nsec
;
5803 ptp_clock_event(adapter
->ptp_clock
, &event
);
5804 ack
|= TSINTR_AUTT1
;
5807 /* acknowledge the interrupts */
5808 wr32(E1000_TSICR
, ack
);
5811 static irqreturn_t
igb_msix_other(int irq
, void *data
)
5813 struct igb_adapter
*adapter
= data
;
5814 struct e1000_hw
*hw
= &adapter
->hw
;
5815 u32 icr
= rd32(E1000_ICR
);
5816 /* reading ICR causes bit 31 of EICR to be cleared */
5818 if (icr
& E1000_ICR_DRSTA
)
5819 schedule_work(&adapter
->reset_task
);
5821 if (icr
& E1000_ICR_DOUTSYNC
) {
5822 /* HW is reporting DMA is out of sync */
5823 adapter
->stats
.doosync
++;
5824 /* The DMA Out of Sync is also indication of a spoof event
5825 * in IOV mode. Check the Wrong VM Behavior register to
5826 * see if it is really a spoof event.
5828 igb_check_wvbr(adapter
);
5831 /* Check for a mailbox event */
5832 if (icr
& E1000_ICR_VMMB
)
5833 igb_msg_task(adapter
);
5835 if (icr
& E1000_ICR_LSC
) {
5836 hw
->mac
.get_link_status
= 1;
5837 /* guard against interrupt when we're going down */
5838 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
5839 mod_timer(&adapter
->watchdog_timer
, jiffies
+ 1);
5842 if (icr
& E1000_ICR_TS
)
5843 igb_tsync_interrupt(adapter
);
5845 wr32(E1000_EIMS
, adapter
->eims_other
);
5850 static void igb_write_itr(struct igb_q_vector
*q_vector
)
5852 struct igb_adapter
*adapter
= q_vector
->adapter
;
5853 u32 itr_val
= q_vector
->itr_val
& 0x7FFC;
5855 if (!q_vector
->set_itr
)
5861 if (adapter
->hw
.mac
.type
== e1000_82575
)
5862 itr_val
|= itr_val
<< 16;
5864 itr_val
|= E1000_EITR_CNT_IGNR
;
5866 writel(itr_val
, q_vector
->itr_register
);
5867 q_vector
->set_itr
= 0;
5870 static irqreturn_t
igb_msix_ring(int irq
, void *data
)
5872 struct igb_q_vector
*q_vector
= data
;
5874 /* Write the ITR value calculated from the previous interrupt. */
5875 igb_write_itr(q_vector
);
5877 napi_schedule(&q_vector
->napi
);
5882 #ifdef CONFIG_IGB_DCA
5883 static void igb_update_tx_dca(struct igb_adapter
*adapter
,
5884 struct igb_ring
*tx_ring
,
5887 struct e1000_hw
*hw
= &adapter
->hw
;
5888 u32 txctrl
= dca3_get_tag(tx_ring
->dev
, cpu
);
5890 if (hw
->mac
.type
!= e1000_82575
)
5891 txctrl
<<= E1000_DCA_TXCTRL_CPUID_SHIFT
;
5893 /* We can enable relaxed ordering for reads, but not writes when
5894 * DCA is enabled. This is due to a known issue in some chipsets
5895 * which will cause the DCA tag to be cleared.
5897 txctrl
|= E1000_DCA_TXCTRL_DESC_RRO_EN
|
5898 E1000_DCA_TXCTRL_DATA_RRO_EN
|
5899 E1000_DCA_TXCTRL_DESC_DCA_EN
;
5901 wr32(E1000_DCA_TXCTRL(tx_ring
->reg_idx
), txctrl
);
5904 static void igb_update_rx_dca(struct igb_adapter
*adapter
,
5905 struct igb_ring
*rx_ring
,
5908 struct e1000_hw
*hw
= &adapter
->hw
;
5909 u32 rxctrl
= dca3_get_tag(&adapter
->pdev
->dev
, cpu
);
5911 if (hw
->mac
.type
!= e1000_82575
)
5912 rxctrl
<<= E1000_DCA_RXCTRL_CPUID_SHIFT
;
5914 /* We can enable relaxed ordering for reads, but not writes when
5915 * DCA is enabled. This is due to a known issue in some chipsets
5916 * which will cause the DCA tag to be cleared.
5918 rxctrl
|= E1000_DCA_RXCTRL_DESC_RRO_EN
|
5919 E1000_DCA_RXCTRL_DESC_DCA_EN
;
5921 wr32(E1000_DCA_RXCTRL(rx_ring
->reg_idx
), rxctrl
);
5924 static void igb_update_dca(struct igb_q_vector
*q_vector
)
5926 struct igb_adapter
*adapter
= q_vector
->adapter
;
5927 int cpu
= get_cpu();
5929 if (q_vector
->cpu
== cpu
)
5932 if (q_vector
->tx
.ring
)
5933 igb_update_tx_dca(adapter
, q_vector
->tx
.ring
, cpu
);
5935 if (q_vector
->rx
.ring
)
5936 igb_update_rx_dca(adapter
, q_vector
->rx
.ring
, cpu
);
5938 q_vector
->cpu
= cpu
;
5943 static void igb_setup_dca(struct igb_adapter
*adapter
)
5945 struct e1000_hw
*hw
= &adapter
->hw
;
5948 if (!(adapter
->flags
& IGB_FLAG_DCA_ENABLED
))
5951 /* Always use CB2 mode, difference is masked in the CB driver. */
5952 wr32(E1000_DCA_CTRL
, E1000_DCA_CTRL_DCA_MODE_CB2
);
5954 for (i
= 0; i
< adapter
->num_q_vectors
; i
++) {
5955 adapter
->q_vector
[i
]->cpu
= -1;
5956 igb_update_dca(adapter
->q_vector
[i
]);
5960 static int __igb_notify_dca(struct device
*dev
, void *data
)
5962 struct net_device
*netdev
= dev_get_drvdata(dev
);
5963 struct igb_adapter
*adapter
= netdev_priv(netdev
);
5964 struct pci_dev
*pdev
= adapter
->pdev
;
5965 struct e1000_hw
*hw
= &adapter
->hw
;
5966 unsigned long event
= *(unsigned long *)data
;
5969 case DCA_PROVIDER_ADD
:
5970 /* if already enabled, don't do it again */
5971 if (adapter
->flags
& IGB_FLAG_DCA_ENABLED
)
5973 if (dca_add_requester(dev
) == 0) {
5974 adapter
->flags
|= IGB_FLAG_DCA_ENABLED
;
5975 dev_info(&pdev
->dev
, "DCA enabled\n");
5976 igb_setup_dca(adapter
);
5979 /* Fall Through since DCA is disabled. */
5980 case DCA_PROVIDER_REMOVE
:
5981 if (adapter
->flags
& IGB_FLAG_DCA_ENABLED
) {
5982 /* without this a class_device is left
5983 * hanging around in the sysfs model
5985 dca_remove_requester(dev
);
5986 dev_info(&pdev
->dev
, "DCA disabled\n");
5987 adapter
->flags
&= ~IGB_FLAG_DCA_ENABLED
;
5988 wr32(E1000_DCA_CTRL
, E1000_DCA_CTRL_DCA_MODE_DISABLE
);
5996 static int igb_notify_dca(struct notifier_block
*nb
, unsigned long event
,
6001 ret_val
= driver_for_each_device(&igb_driver
.driver
, NULL
, &event
,
6004 return ret_val
? NOTIFY_BAD
: NOTIFY_DONE
;
6006 #endif /* CONFIG_IGB_DCA */
6008 #ifdef CONFIG_PCI_IOV
6009 static int igb_vf_configure(struct igb_adapter
*adapter
, int vf
)
6011 unsigned char mac_addr
[ETH_ALEN
];
6013 eth_zero_addr(mac_addr
);
6014 igb_set_vf_mac(adapter
, vf
, mac_addr
);
6016 /* By default spoof check is enabled for all VFs */
6017 adapter
->vf_data
[vf
].spoofchk_enabled
= true;
6023 static void igb_ping_all_vfs(struct igb_adapter
*adapter
)
6025 struct e1000_hw
*hw
= &adapter
->hw
;
6029 for (i
= 0 ; i
< adapter
->vfs_allocated_count
; i
++) {
6030 ping
= E1000_PF_CONTROL_MSG
;
6031 if (adapter
->vf_data
[i
].flags
& IGB_VF_FLAG_CTS
)
6032 ping
|= E1000_VT_MSGTYPE_CTS
;
6033 igb_write_mbx(hw
, &ping
, 1, i
);
6037 static int igb_set_vf_promisc(struct igb_adapter
*adapter
, u32
*msgbuf
, u32 vf
)
6039 struct e1000_hw
*hw
= &adapter
->hw
;
6040 u32 vmolr
= rd32(E1000_VMOLR(vf
));
6041 struct vf_data_storage
*vf_data
= &adapter
->vf_data
[vf
];
6043 vf_data
->flags
&= ~(IGB_VF_FLAG_UNI_PROMISC
|
6044 IGB_VF_FLAG_MULTI_PROMISC
);
6045 vmolr
&= ~(E1000_VMOLR_ROPE
| E1000_VMOLR_ROMPE
| E1000_VMOLR_MPME
);
6047 if (*msgbuf
& E1000_VF_SET_PROMISC_MULTICAST
) {
6048 vmolr
|= E1000_VMOLR_MPME
;
6049 vf_data
->flags
|= IGB_VF_FLAG_MULTI_PROMISC
;
6050 *msgbuf
&= ~E1000_VF_SET_PROMISC_MULTICAST
;
6052 /* if we have hashes and we are clearing a multicast promisc
6053 * flag we need to write the hashes to the MTA as this step
6054 * was previously skipped
6056 if (vf_data
->num_vf_mc_hashes
> 30) {
6057 vmolr
|= E1000_VMOLR_MPME
;
6058 } else if (vf_data
->num_vf_mc_hashes
) {
6061 vmolr
|= E1000_VMOLR_ROMPE
;
6062 for (j
= 0; j
< vf_data
->num_vf_mc_hashes
; j
++)
6063 igb_mta_set(hw
, vf_data
->vf_mc_hashes
[j
]);
6067 wr32(E1000_VMOLR(vf
), vmolr
);
6069 /* there are flags left unprocessed, likely not supported */
6070 if (*msgbuf
& E1000_VT_MSGINFO_MASK
)
6076 static int igb_set_vf_multicasts(struct igb_adapter
*adapter
,
6077 u32
*msgbuf
, u32 vf
)
6079 int n
= (msgbuf
[0] & E1000_VT_MSGINFO_MASK
) >> E1000_VT_MSGINFO_SHIFT
;
6080 u16
*hash_list
= (u16
*)&msgbuf
[1];
6081 struct vf_data_storage
*vf_data
= &adapter
->vf_data
[vf
];
6084 /* salt away the number of multicast addresses assigned
6085 * to this VF for later use to restore when the PF multi cast
6088 vf_data
->num_vf_mc_hashes
= n
;
6090 /* only up to 30 hash values supported */
6094 /* store the hashes for later use */
6095 for (i
= 0; i
< n
; i
++)
6096 vf_data
->vf_mc_hashes
[i
] = hash_list
[i
];
6098 /* Flush and reset the mta with the new values */
6099 igb_set_rx_mode(adapter
->netdev
);
6104 static void igb_restore_vf_multicasts(struct igb_adapter
*adapter
)
6106 struct e1000_hw
*hw
= &adapter
->hw
;
6107 struct vf_data_storage
*vf_data
;
6110 for (i
= 0; i
< adapter
->vfs_allocated_count
; i
++) {
6111 u32 vmolr
= rd32(E1000_VMOLR(i
));
6113 vmolr
&= ~(E1000_VMOLR_ROMPE
| E1000_VMOLR_MPME
);
6115 vf_data
= &adapter
->vf_data
[i
];
6117 if ((vf_data
->num_vf_mc_hashes
> 30) ||
6118 (vf_data
->flags
& IGB_VF_FLAG_MULTI_PROMISC
)) {
6119 vmolr
|= E1000_VMOLR_MPME
;
6120 } else if (vf_data
->num_vf_mc_hashes
) {
6121 vmolr
|= E1000_VMOLR_ROMPE
;
6122 for (j
= 0; j
< vf_data
->num_vf_mc_hashes
; j
++)
6123 igb_mta_set(hw
, vf_data
->vf_mc_hashes
[j
]);
6125 wr32(E1000_VMOLR(i
), vmolr
);
6129 static void igb_clear_vf_vfta(struct igb_adapter
*adapter
, u32 vf
)
6131 struct e1000_hw
*hw
= &adapter
->hw
;
6132 u32 pool_mask
, vlvf_mask
, i
;
6134 /* create mask for VF and other pools */
6135 pool_mask
= E1000_VLVF_POOLSEL_MASK
;
6136 vlvf_mask
= BIT(E1000_VLVF_POOLSEL_SHIFT
+ vf
);
6138 /* drop PF from pool bits */
6139 pool_mask
&= ~BIT(E1000_VLVF_POOLSEL_SHIFT
+
6140 adapter
->vfs_allocated_count
);
6142 /* Find the vlan filter for this id */
6143 for (i
= E1000_VLVF_ARRAY_SIZE
; i
--;) {
6144 u32 vlvf
= rd32(E1000_VLVF(i
));
6145 u32 vfta_mask
, vid
, vfta
;
6147 /* remove the vf from the pool */
6148 if (!(vlvf
& vlvf_mask
))
6151 /* clear out bit from VLVF */
6154 /* if other pools are present, just remove ourselves */
6155 if (vlvf
& pool_mask
)
6158 /* if PF is present, leave VFTA */
6159 if (vlvf
& E1000_VLVF_POOLSEL_MASK
)
6162 vid
= vlvf
& E1000_VLVF_VLANID_MASK
;
6163 vfta_mask
= BIT(vid
% 32);
6165 /* clear bit from VFTA */
6166 vfta
= adapter
->shadow_vfta
[vid
/ 32];
6167 if (vfta
& vfta_mask
)
6168 hw
->mac
.ops
.write_vfta(hw
, vid
/ 32, vfta
^ vfta_mask
);
6170 /* clear pool selection enable */
6171 if (adapter
->flags
& IGB_FLAG_VLAN_PROMISC
)
6172 vlvf
&= E1000_VLVF_POOLSEL_MASK
;
6176 /* clear pool bits */
6177 wr32(E1000_VLVF(i
), vlvf
);
6181 static int igb_find_vlvf_entry(struct e1000_hw
*hw
, u32 vlan
)
6186 /* short cut the special case */
6190 /* Search for the VLAN id in the VLVF entries */
6191 for (idx
= E1000_VLVF_ARRAY_SIZE
; --idx
;) {
6192 vlvf
= rd32(E1000_VLVF(idx
));
6193 if ((vlvf
& VLAN_VID_MASK
) == vlan
)
6200 static void igb_update_pf_vlvf(struct igb_adapter
*adapter
, u32 vid
)
6202 struct e1000_hw
*hw
= &adapter
->hw
;
6206 idx
= igb_find_vlvf_entry(hw
, vid
);
6210 /* See if any other pools are set for this VLAN filter
6211 * entry other than the PF.
6213 pf_id
= adapter
->vfs_allocated_count
+ E1000_VLVF_POOLSEL_SHIFT
;
6214 bits
= ~BIT(pf_id
) & E1000_VLVF_POOLSEL_MASK
;
6215 bits
&= rd32(E1000_VLVF(idx
));
6217 /* Disable the filter so this falls into the default pool. */
6219 if (adapter
->flags
& IGB_FLAG_VLAN_PROMISC
)
6220 wr32(E1000_VLVF(idx
), BIT(pf_id
));
6222 wr32(E1000_VLVF(idx
), 0);
6226 static s32
igb_set_vf_vlan(struct igb_adapter
*adapter
, u32 vid
,
6229 int pf_id
= adapter
->vfs_allocated_count
;
6230 struct e1000_hw
*hw
= &adapter
->hw
;
6233 /* If VLAN overlaps with one the PF is currently monitoring make
6234 * sure that we are able to allocate a VLVF entry. This may be
6235 * redundant but it guarantees PF will maintain visibility to
6238 if (add
&& test_bit(vid
, adapter
->active_vlans
)) {
6239 err
= igb_vfta_set(hw
, vid
, pf_id
, true, false);
6244 err
= igb_vfta_set(hw
, vid
, vf
, add
, false);
6249 /* If we failed to add the VF VLAN or we are removing the VF VLAN
6250 * we may need to drop the PF pool bit in order to allow us to free
6251 * up the VLVF resources.
6253 if (test_bit(vid
, adapter
->active_vlans
) ||
6254 (adapter
->flags
& IGB_FLAG_VLAN_PROMISC
))
6255 igb_update_pf_vlvf(adapter
, vid
);
6260 static void igb_set_vmvir(struct igb_adapter
*adapter
, u32 vid
, u32 vf
)
6262 struct e1000_hw
*hw
= &adapter
->hw
;
6265 wr32(E1000_VMVIR(vf
), (vid
| E1000_VMVIR_VLANA_DEFAULT
));
6267 wr32(E1000_VMVIR(vf
), 0);
6270 static int igb_enable_port_vlan(struct igb_adapter
*adapter
, int vf
,
6275 err
= igb_set_vf_vlan(adapter
, vlan
, true, vf
);
6279 igb_set_vmvir(adapter
, vlan
| (qos
<< VLAN_PRIO_SHIFT
), vf
);
6280 igb_set_vmolr(adapter
, vf
, !vlan
);
6282 /* revoke access to previous VLAN */
6283 if (vlan
!= adapter
->vf_data
[vf
].pf_vlan
)
6284 igb_set_vf_vlan(adapter
, adapter
->vf_data
[vf
].pf_vlan
,
6287 adapter
->vf_data
[vf
].pf_vlan
= vlan
;
6288 adapter
->vf_data
[vf
].pf_qos
= qos
;
6289 igb_set_vf_vlan_strip(adapter
, vf
, true);
6290 dev_info(&adapter
->pdev
->dev
,
6291 "Setting VLAN %d, QOS 0x%x on VF %d\n", vlan
, qos
, vf
);
6292 if (test_bit(__IGB_DOWN
, &adapter
->state
)) {
6293 dev_warn(&adapter
->pdev
->dev
,
6294 "The VF VLAN has been set, but the PF device is not up.\n");
6295 dev_warn(&adapter
->pdev
->dev
,
6296 "Bring the PF device up before attempting to use the VF device.\n");
6302 static int igb_disable_port_vlan(struct igb_adapter
*adapter
, int vf
)
6304 /* Restore tagless access via VLAN 0 */
6305 igb_set_vf_vlan(adapter
, 0, true, vf
);
6307 igb_set_vmvir(adapter
, 0, vf
);
6308 igb_set_vmolr(adapter
, vf
, true);
6310 /* Remove any PF assigned VLAN */
6311 if (adapter
->vf_data
[vf
].pf_vlan
)
6312 igb_set_vf_vlan(adapter
, adapter
->vf_data
[vf
].pf_vlan
,
6315 adapter
->vf_data
[vf
].pf_vlan
= 0;
6316 adapter
->vf_data
[vf
].pf_qos
= 0;
6317 igb_set_vf_vlan_strip(adapter
, vf
, false);
6322 static int igb_ndo_set_vf_vlan(struct net_device
*netdev
, int vf
,
6323 u16 vlan
, u8 qos
, __be16 vlan_proto
)
6325 struct igb_adapter
*adapter
= netdev_priv(netdev
);
6327 if ((vf
>= adapter
->vfs_allocated_count
) || (vlan
> 4095) || (qos
> 7))
6330 if (vlan_proto
!= htons(ETH_P_8021Q
))
6331 return -EPROTONOSUPPORT
;
6333 return (vlan
|| qos
) ? igb_enable_port_vlan(adapter
, vf
, vlan
, qos
) :
6334 igb_disable_port_vlan(adapter
, vf
);
6337 static int igb_set_vf_vlan_msg(struct igb_adapter
*adapter
, u32
*msgbuf
, u32 vf
)
6339 int add
= (msgbuf
[0] & E1000_VT_MSGINFO_MASK
) >> E1000_VT_MSGINFO_SHIFT
;
6340 int vid
= (msgbuf
[1] & E1000_VLVF_VLANID_MASK
);
6343 if (adapter
->vf_data
[vf
].pf_vlan
)
6346 /* VLAN 0 is a special case, don't allow it to be removed */
6350 ret
= igb_set_vf_vlan(adapter
, vid
, !!add
, vf
);
6352 igb_set_vf_vlan_strip(adapter
, vf
, !!vid
);
6356 static inline void igb_vf_reset(struct igb_adapter
*adapter
, u32 vf
)
6358 struct vf_data_storage
*vf_data
= &adapter
->vf_data
[vf
];
6360 /* clear flags - except flag that indicates PF has set the MAC */
6361 vf_data
->flags
&= IGB_VF_FLAG_PF_SET_MAC
;
6362 vf_data
->last_nack
= jiffies
;
6364 /* reset vlans for device */
6365 igb_clear_vf_vfta(adapter
, vf
);
6366 igb_set_vf_vlan(adapter
, vf_data
->pf_vlan
, true, vf
);
6367 igb_set_vmvir(adapter
, vf_data
->pf_vlan
|
6368 (vf_data
->pf_qos
<< VLAN_PRIO_SHIFT
), vf
);
6369 igb_set_vmolr(adapter
, vf
, !vf_data
->pf_vlan
);
6370 igb_set_vf_vlan_strip(adapter
, vf
, !!(vf_data
->pf_vlan
));
6372 /* reset multicast table array for vf */
6373 adapter
->vf_data
[vf
].num_vf_mc_hashes
= 0;
6375 /* Flush and reset the mta with the new values */
6376 igb_set_rx_mode(adapter
->netdev
);
6379 static void igb_vf_reset_event(struct igb_adapter
*adapter
, u32 vf
)
6381 unsigned char *vf_mac
= adapter
->vf_data
[vf
].vf_mac_addresses
;
6383 /* clear mac address as we were hotplug removed/added */
6384 if (!(adapter
->vf_data
[vf
].flags
& IGB_VF_FLAG_PF_SET_MAC
))
6385 eth_zero_addr(vf_mac
);
6387 /* process remaining reset events */
6388 igb_vf_reset(adapter
, vf
);
6391 static void igb_vf_reset_msg(struct igb_adapter
*adapter
, u32 vf
)
6393 struct e1000_hw
*hw
= &adapter
->hw
;
6394 unsigned char *vf_mac
= adapter
->vf_data
[vf
].vf_mac_addresses
;
6396 u8
*addr
= (u8
*)(&msgbuf
[1]);
6398 /* process all the same items cleared in a function level reset */
6399 igb_vf_reset(adapter
, vf
);
6401 /* set vf mac address */
6402 igb_set_vf_mac(adapter
, vf
, vf_mac
);
6404 /* enable transmit and receive for vf */
6405 reg
= rd32(E1000_VFTE
);
6406 wr32(E1000_VFTE
, reg
| BIT(vf
));
6407 reg
= rd32(E1000_VFRE
);
6408 wr32(E1000_VFRE
, reg
| BIT(vf
));
6410 adapter
->vf_data
[vf
].flags
|= IGB_VF_FLAG_CTS
;
6412 /* reply to reset with ack and vf mac address */
6413 if (!is_zero_ether_addr(vf_mac
)) {
6414 msgbuf
[0] = E1000_VF_RESET
| E1000_VT_MSGTYPE_ACK
;
6415 memcpy(addr
, vf_mac
, ETH_ALEN
);
6417 msgbuf
[0] = E1000_VF_RESET
| E1000_VT_MSGTYPE_NACK
;
6419 igb_write_mbx(hw
, msgbuf
, 3, vf
);
6422 static void igb_flush_mac_table(struct igb_adapter
*adapter
)
6424 struct e1000_hw
*hw
= &adapter
->hw
;
6427 for (i
= 0; i
< hw
->mac
.rar_entry_count
; i
++) {
6428 adapter
->mac_table
[i
].state
&= ~IGB_MAC_STATE_IN_USE
;
6429 memset(adapter
->mac_table
[i
].addr
, 0, ETH_ALEN
);
6430 adapter
->mac_table
[i
].queue
= 0;
6431 igb_rar_set_index(adapter
, i
);
6435 static int igb_available_rars(struct igb_adapter
*adapter
, u8 queue
)
6437 struct e1000_hw
*hw
= &adapter
->hw
;
6438 /* do not count rar entries reserved for VFs MAC addresses */
6439 int rar_entries
= hw
->mac
.rar_entry_count
-
6440 adapter
->vfs_allocated_count
;
6443 for (i
= 0; i
< rar_entries
; i
++) {
6444 /* do not count default entries */
6445 if (adapter
->mac_table
[i
].state
& IGB_MAC_STATE_DEFAULT
)
6448 /* do not count "in use" entries for different queues */
6449 if ((adapter
->mac_table
[i
].state
& IGB_MAC_STATE_IN_USE
) &&
6450 (adapter
->mac_table
[i
].queue
!= queue
))
6459 /* Set default MAC address for the PF in the first RAR entry */
6460 static void igb_set_default_mac_filter(struct igb_adapter
*adapter
)
6462 struct igb_mac_addr
*mac_table
= &adapter
->mac_table
[0];
6464 ether_addr_copy(mac_table
->addr
, adapter
->hw
.mac
.addr
);
6465 mac_table
->queue
= adapter
->vfs_allocated_count
;
6466 mac_table
->state
= IGB_MAC_STATE_DEFAULT
| IGB_MAC_STATE_IN_USE
;
6468 igb_rar_set_index(adapter
, 0);
6471 static int igb_add_mac_filter(struct igb_adapter
*adapter
, const u8
*addr
,
6474 struct e1000_hw
*hw
= &adapter
->hw
;
6475 int rar_entries
= hw
->mac
.rar_entry_count
-
6476 adapter
->vfs_allocated_count
;
6479 if (is_zero_ether_addr(addr
))
6482 /* Search for the first empty entry in the MAC table.
6483 * Do not touch entries at the end of the table reserved for the VF MAC
6486 for (i
= 0; i
< rar_entries
; i
++) {
6487 if (adapter
->mac_table
[i
].state
& IGB_MAC_STATE_IN_USE
)
6490 ether_addr_copy(adapter
->mac_table
[i
].addr
, addr
);
6491 adapter
->mac_table
[i
].queue
= queue
;
6492 adapter
->mac_table
[i
].state
|= IGB_MAC_STATE_IN_USE
;
6494 igb_rar_set_index(adapter
, i
);
6501 static int igb_del_mac_filter(struct igb_adapter
*adapter
, const u8
*addr
,
6504 struct e1000_hw
*hw
= &adapter
->hw
;
6505 int rar_entries
= hw
->mac
.rar_entry_count
-
6506 adapter
->vfs_allocated_count
;
6509 if (is_zero_ether_addr(addr
))
6512 /* Search for matching entry in the MAC table based on given address
6513 * and queue. Do not touch entries at the end of the table reserved
6514 * for the VF MAC addresses.
6516 for (i
= 0; i
< rar_entries
; i
++) {
6517 if (!(adapter
->mac_table
[i
].state
& IGB_MAC_STATE_IN_USE
))
6519 if (adapter
->mac_table
[i
].queue
!= queue
)
6521 if (!ether_addr_equal(adapter
->mac_table
[i
].addr
, addr
))
6524 adapter
->mac_table
[i
].state
&= ~IGB_MAC_STATE_IN_USE
;
6525 memset(adapter
->mac_table
[i
].addr
, 0, ETH_ALEN
);
6526 adapter
->mac_table
[i
].queue
= 0;
6528 igb_rar_set_index(adapter
, i
);
6535 static int igb_uc_sync(struct net_device
*netdev
, const unsigned char *addr
)
6537 struct igb_adapter
*adapter
= netdev_priv(netdev
);
6540 ret
= igb_add_mac_filter(adapter
, addr
, adapter
->vfs_allocated_count
);
6542 return min_t(int, ret
, 0);
6545 static int igb_uc_unsync(struct net_device
*netdev
, const unsigned char *addr
)
6547 struct igb_adapter
*adapter
= netdev_priv(netdev
);
6549 igb_del_mac_filter(adapter
, addr
, adapter
->vfs_allocated_count
);
6554 static int igb_set_vf_mac_filter(struct igb_adapter
*adapter
, const int vf
,
6555 const u32 info
, const u8
*addr
)
6557 struct pci_dev
*pdev
= adapter
->pdev
;
6558 struct vf_data_storage
*vf_data
= &adapter
->vf_data
[vf
];
6559 struct list_head
*pos
;
6560 struct vf_mac_filter
*entry
= NULL
;
6564 case E1000_VF_MAC_FILTER_CLR
:
6565 /* remove all unicast MAC filters related to the current VF */
6566 list_for_each(pos
, &adapter
->vf_macs
.l
) {
6567 entry
= list_entry(pos
, struct vf_mac_filter
, l
);
6568 if (entry
->vf
== vf
) {
6571 igb_del_mac_filter(adapter
, entry
->vf_mac
, vf
);
6575 case E1000_VF_MAC_FILTER_ADD
:
6576 if (vf_data
->flags
& IGB_VF_FLAG_PF_SET_MAC
) {
6577 dev_warn(&pdev
->dev
,
6578 "VF %d requested MAC filter but is administratively denied\n",
6583 if (!is_valid_ether_addr(addr
)) {
6584 dev_warn(&pdev
->dev
,
6585 "VF %d attempted to set invalid MAC filter\n",
6590 /* try to find empty slot in the list */
6591 list_for_each(pos
, &adapter
->vf_macs
.l
) {
6592 entry
= list_entry(pos
, struct vf_mac_filter
, l
);
6597 if (entry
&& entry
->free
) {
6598 entry
->free
= false;
6600 ether_addr_copy(entry
->vf_mac
, addr
);
6602 ret
= igb_add_mac_filter(adapter
, addr
, vf
);
6603 ret
= min_t(int, ret
, 0);
6609 dev_warn(&pdev
->dev
,
6610 "VF %d has requested MAC filter but there is no space for it\n",
6621 static int igb_set_vf_mac_addr(struct igb_adapter
*adapter
, u32
*msg
, int vf
)
6623 struct pci_dev
*pdev
= adapter
->pdev
;
6624 struct vf_data_storage
*vf_data
= &adapter
->vf_data
[vf
];
6625 u32 info
= msg
[0] & E1000_VT_MSGINFO_MASK
;
6627 /* The VF MAC Address is stored in a packed array of bytes
6628 * starting at the second 32 bit word of the msg array
6630 unsigned char *addr
= (unsigned char *)&msg
[1];
6634 if (vf_data
->flags
& IGB_VF_FLAG_PF_SET_MAC
) {
6635 dev_warn(&pdev
->dev
,
6636 "VF %d attempted to override administratively set MAC address\nReload the VF driver to resume operations\n",
6641 if (!is_valid_ether_addr(addr
)) {
6642 dev_warn(&pdev
->dev
,
6643 "VF %d attempted to set invalid MAC\n",
6648 ret
= igb_set_vf_mac(adapter
, vf
, addr
);
6650 ret
= igb_set_vf_mac_filter(adapter
, vf
, info
, addr
);
6656 static void igb_rcv_ack_from_vf(struct igb_adapter
*adapter
, u32 vf
)
6658 struct e1000_hw
*hw
= &adapter
->hw
;
6659 struct vf_data_storage
*vf_data
= &adapter
->vf_data
[vf
];
6660 u32 msg
= E1000_VT_MSGTYPE_NACK
;
6662 /* if device isn't clear to send it shouldn't be reading either */
6663 if (!(vf_data
->flags
& IGB_VF_FLAG_CTS
) &&
6664 time_after(jiffies
, vf_data
->last_nack
+ (2 * HZ
))) {
6665 igb_write_mbx(hw
, &msg
, 1, vf
);
6666 vf_data
->last_nack
= jiffies
;
6670 static void igb_rcv_msg_from_vf(struct igb_adapter
*adapter
, u32 vf
)
6672 struct pci_dev
*pdev
= adapter
->pdev
;
6673 u32 msgbuf
[E1000_VFMAILBOX_SIZE
];
6674 struct e1000_hw
*hw
= &adapter
->hw
;
6675 struct vf_data_storage
*vf_data
= &adapter
->vf_data
[vf
];
6678 retval
= igb_read_mbx(hw
, msgbuf
, E1000_VFMAILBOX_SIZE
, vf
, false);
6681 /* if receive failed revoke VF CTS stats and restart init */
6682 dev_err(&pdev
->dev
, "Error receiving message from VF\n");
6683 vf_data
->flags
&= ~IGB_VF_FLAG_CTS
;
6684 if (!time_after(jiffies
, vf_data
->last_nack
+ (2 * HZ
)))
6689 /* this is a message we already processed, do nothing */
6690 if (msgbuf
[0] & (E1000_VT_MSGTYPE_ACK
| E1000_VT_MSGTYPE_NACK
))
6693 /* until the vf completes a reset it should not be
6694 * allowed to start any configuration.
6696 if (msgbuf
[0] == E1000_VF_RESET
) {
6697 /* unlocks mailbox */
6698 igb_vf_reset_msg(adapter
, vf
);
6702 if (!(vf_data
->flags
& IGB_VF_FLAG_CTS
)) {
6703 if (!time_after(jiffies
, vf_data
->last_nack
+ (2 * HZ
)))
6709 switch ((msgbuf
[0] & 0xFFFF)) {
6710 case E1000_VF_SET_MAC_ADDR
:
6711 retval
= igb_set_vf_mac_addr(adapter
, msgbuf
, vf
);
6713 case E1000_VF_SET_PROMISC
:
6714 retval
= igb_set_vf_promisc(adapter
, msgbuf
, vf
);
6716 case E1000_VF_SET_MULTICAST
:
6717 retval
= igb_set_vf_multicasts(adapter
, msgbuf
, vf
);
6719 case E1000_VF_SET_LPE
:
6720 retval
= igb_set_vf_rlpml(adapter
, msgbuf
[1], vf
);
6722 case E1000_VF_SET_VLAN
:
6724 if (vf_data
->pf_vlan
)
6725 dev_warn(&pdev
->dev
,
6726 "VF %d attempted to override administratively set VLAN tag\nReload the VF driver to resume operations\n",
6729 retval
= igb_set_vf_vlan_msg(adapter
, msgbuf
, vf
);
6732 dev_err(&pdev
->dev
, "Unhandled Msg %08x\n", msgbuf
[0]);
6737 msgbuf
[0] |= E1000_VT_MSGTYPE_CTS
;
6739 /* notify the VF of the results of what it sent us */
6741 msgbuf
[0] |= E1000_VT_MSGTYPE_NACK
;
6743 msgbuf
[0] |= E1000_VT_MSGTYPE_ACK
;
6745 /* unlocks mailbox */
6746 igb_write_mbx(hw
, msgbuf
, 1, vf
);
6750 igb_unlock_mbx(hw
, vf
);
6753 static void igb_msg_task(struct igb_adapter
*adapter
)
6755 struct e1000_hw
*hw
= &adapter
->hw
;
6758 for (vf
= 0; vf
< adapter
->vfs_allocated_count
; vf
++) {
6759 /* process any reset requests */
6760 if (!igb_check_for_rst(hw
, vf
))
6761 igb_vf_reset_event(adapter
, vf
);
6763 /* process any messages pending */
6764 if (!igb_check_for_msg(hw
, vf
))
6765 igb_rcv_msg_from_vf(adapter
, vf
);
6767 /* process any acks */
6768 if (!igb_check_for_ack(hw
, vf
))
6769 igb_rcv_ack_from_vf(adapter
, vf
);
6774 * igb_set_uta - Set unicast filter table address
6775 * @adapter: board private structure
6776 * @set: boolean indicating if we are setting or clearing bits
6778 * The unicast table address is a register array of 32-bit registers.
6779 * The table is meant to be used in a way similar to how the MTA is used
6780 * however due to certain limitations in the hardware it is necessary to
6781 * set all the hash bits to 1 and use the VMOLR ROPE bit as a promiscuous
6782 * enable bit to allow vlan tag stripping when promiscuous mode is enabled
6784 static void igb_set_uta(struct igb_adapter
*adapter
, bool set
)
6786 struct e1000_hw
*hw
= &adapter
->hw
;
6787 u32 uta
= set
? ~0 : 0;
6790 /* we only need to do this if VMDq is enabled */
6791 if (!adapter
->vfs_allocated_count
)
6794 for (i
= hw
->mac
.uta_reg_count
; i
--;)
6795 array_wr32(E1000_UTA
, i
, uta
);
6799 * igb_intr_msi - Interrupt Handler
6800 * @irq: interrupt number
6801 * @data: pointer to a network interface device structure
6803 static irqreturn_t
igb_intr_msi(int irq
, void *data
)
6805 struct igb_adapter
*adapter
= data
;
6806 struct igb_q_vector
*q_vector
= adapter
->q_vector
[0];
6807 struct e1000_hw
*hw
= &adapter
->hw
;
6808 /* read ICR disables interrupts using IAM */
6809 u32 icr
= rd32(E1000_ICR
);
6811 igb_write_itr(q_vector
);
6813 if (icr
& E1000_ICR_DRSTA
)
6814 schedule_work(&adapter
->reset_task
);
6816 if (icr
& E1000_ICR_DOUTSYNC
) {
6817 /* HW is reporting DMA is out of sync */
6818 adapter
->stats
.doosync
++;
6821 if (icr
& (E1000_ICR_RXSEQ
| E1000_ICR_LSC
)) {
6822 hw
->mac
.get_link_status
= 1;
6823 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
6824 mod_timer(&adapter
->watchdog_timer
, jiffies
+ 1);
6827 if (icr
& E1000_ICR_TS
)
6828 igb_tsync_interrupt(adapter
);
6830 napi_schedule(&q_vector
->napi
);
6836 * igb_intr - Legacy Interrupt Handler
6837 * @irq: interrupt number
6838 * @data: pointer to a network interface device structure
6840 static irqreturn_t
igb_intr(int irq
, void *data
)
6842 struct igb_adapter
*adapter
= data
;
6843 struct igb_q_vector
*q_vector
= adapter
->q_vector
[0];
6844 struct e1000_hw
*hw
= &adapter
->hw
;
6845 /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked. No
6846 * need for the IMC write
6848 u32 icr
= rd32(E1000_ICR
);
6850 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
6851 * not set, then the adapter didn't send an interrupt
6853 if (!(icr
& E1000_ICR_INT_ASSERTED
))
6856 igb_write_itr(q_vector
);
6858 if (icr
& E1000_ICR_DRSTA
)
6859 schedule_work(&adapter
->reset_task
);
6861 if (icr
& E1000_ICR_DOUTSYNC
) {
6862 /* HW is reporting DMA is out of sync */
6863 adapter
->stats
.doosync
++;
6866 if (icr
& (E1000_ICR_RXSEQ
| E1000_ICR_LSC
)) {
6867 hw
->mac
.get_link_status
= 1;
6868 /* guard against interrupt when we're going down */
6869 if (!test_bit(__IGB_DOWN
, &adapter
->state
))
6870 mod_timer(&adapter
->watchdog_timer
, jiffies
+ 1);
6873 if (icr
& E1000_ICR_TS
)
6874 igb_tsync_interrupt(adapter
);
6876 napi_schedule(&q_vector
->napi
);
6881 static void igb_ring_irq_enable(struct igb_q_vector
*q_vector
)
6883 struct igb_adapter
*adapter
= q_vector
->adapter
;
6884 struct e1000_hw
*hw
= &adapter
->hw
;
6886 if ((q_vector
->rx
.ring
&& (adapter
->rx_itr_setting
& 3)) ||
6887 (!q_vector
->rx
.ring
&& (adapter
->tx_itr_setting
& 3))) {
6888 if ((adapter
->num_q_vectors
== 1) && !adapter
->vf_data
)
6889 igb_set_itr(q_vector
);
6891 igb_update_ring_itr(q_vector
);
6894 if (!test_bit(__IGB_DOWN
, &adapter
->state
)) {
6895 if (adapter
->flags
& IGB_FLAG_HAS_MSIX
)
6896 wr32(E1000_EIMS
, q_vector
->eims_value
);
6898 igb_irq_enable(adapter
);
6903 * igb_poll - NAPI Rx polling callback
6904 * @napi: napi polling structure
6905 * @budget: count of how many packets we should handle
6907 static int igb_poll(struct napi_struct
*napi
, int budget
)
6909 struct igb_q_vector
*q_vector
= container_of(napi
,
6910 struct igb_q_vector
,
6912 bool clean_complete
= true;
6915 #ifdef CONFIG_IGB_DCA
6916 if (q_vector
->adapter
->flags
& IGB_FLAG_DCA_ENABLED
)
6917 igb_update_dca(q_vector
);
6919 if (q_vector
->tx
.ring
)
6920 clean_complete
= igb_clean_tx_irq(q_vector
, budget
);
6922 if (q_vector
->rx
.ring
) {
6923 int cleaned
= igb_clean_rx_irq(q_vector
, budget
);
6925 work_done
+= cleaned
;
6926 if (cleaned
>= budget
)
6927 clean_complete
= false;
6930 /* If all work not completed, return budget and keep polling */
6931 if (!clean_complete
)
6934 /* If not enough Rx work done, exit the polling mode */
6935 napi_complete_done(napi
, work_done
);
6936 igb_ring_irq_enable(q_vector
);
6942 * igb_clean_tx_irq - Reclaim resources after transmit completes
6943 * @q_vector: pointer to q_vector containing needed info
6944 * @napi_budget: Used to determine if we are in netpoll
6946 * returns true if ring is completely cleaned
6948 static bool igb_clean_tx_irq(struct igb_q_vector
*q_vector
, int napi_budget
)
6950 struct igb_adapter
*adapter
= q_vector
->adapter
;
6951 struct igb_ring
*tx_ring
= q_vector
->tx
.ring
;
6952 struct igb_tx_buffer
*tx_buffer
;
6953 union e1000_adv_tx_desc
*tx_desc
;
6954 unsigned int total_bytes
= 0, total_packets
= 0;
6955 unsigned int budget
= q_vector
->tx
.work_limit
;
6956 unsigned int i
= tx_ring
->next_to_clean
;
6958 if (test_bit(__IGB_DOWN
, &adapter
->state
))
6961 tx_buffer
= &tx_ring
->tx_buffer_info
[i
];
6962 tx_desc
= IGB_TX_DESC(tx_ring
, i
);
6963 i
-= tx_ring
->count
;
6966 union e1000_adv_tx_desc
*eop_desc
= tx_buffer
->next_to_watch
;
6968 /* if next_to_watch is not set then there is no work pending */
6972 /* prevent any other reads prior to eop_desc */
6973 read_barrier_depends();
6975 /* if DD is not set pending work has not been completed */
6976 if (!(eop_desc
->wb
.status
& cpu_to_le32(E1000_TXD_STAT_DD
)))
6979 /* clear next_to_watch to prevent false hangs */
6980 tx_buffer
->next_to_watch
= NULL
;
6982 /* update the statistics for this packet */
6983 total_bytes
+= tx_buffer
->bytecount
;
6984 total_packets
+= tx_buffer
->gso_segs
;
6987 napi_consume_skb(tx_buffer
->skb
, napi_budget
);
6989 /* unmap skb header data */
6990 dma_unmap_single(tx_ring
->dev
,
6991 dma_unmap_addr(tx_buffer
, dma
),
6992 dma_unmap_len(tx_buffer
, len
),
6995 /* clear tx_buffer data */
6996 dma_unmap_len_set(tx_buffer
, len
, 0);
6998 /* clear last DMA location and unmap remaining buffers */
6999 while (tx_desc
!= eop_desc
) {
7004 i
-= tx_ring
->count
;
7005 tx_buffer
= tx_ring
->tx_buffer_info
;
7006 tx_desc
= IGB_TX_DESC(tx_ring
, 0);
7009 /* unmap any remaining paged data */
7010 if (dma_unmap_len(tx_buffer
, len
)) {
7011 dma_unmap_page(tx_ring
->dev
,
7012 dma_unmap_addr(tx_buffer
, dma
),
7013 dma_unmap_len(tx_buffer
, len
),
7015 dma_unmap_len_set(tx_buffer
, len
, 0);
7019 /* move us one more past the eop_desc for start of next pkt */
7024 i
-= tx_ring
->count
;
7025 tx_buffer
= tx_ring
->tx_buffer_info
;
7026 tx_desc
= IGB_TX_DESC(tx_ring
, 0);
7029 /* issue prefetch for next Tx descriptor */
7032 /* update budget accounting */
7034 } while (likely(budget
));
7036 netdev_tx_completed_queue(txring_txq(tx_ring
),
7037 total_packets
, total_bytes
);
7038 i
+= tx_ring
->count
;
7039 tx_ring
->next_to_clean
= i
;
7040 u64_stats_update_begin(&tx_ring
->tx_syncp
);
7041 tx_ring
->tx_stats
.bytes
+= total_bytes
;
7042 tx_ring
->tx_stats
.packets
+= total_packets
;
7043 u64_stats_update_end(&tx_ring
->tx_syncp
);
7044 q_vector
->tx
.total_bytes
+= total_bytes
;
7045 q_vector
->tx
.total_packets
+= total_packets
;
7047 if (test_bit(IGB_RING_FLAG_TX_DETECT_HANG
, &tx_ring
->flags
)) {
7048 struct e1000_hw
*hw
= &adapter
->hw
;
7050 /* Detect a transmit hang in hardware, this serializes the
7051 * check with the clearing of time_stamp and movement of i
7053 clear_bit(IGB_RING_FLAG_TX_DETECT_HANG
, &tx_ring
->flags
);
7054 if (tx_buffer
->next_to_watch
&&
7055 time_after(jiffies
, tx_buffer
->time_stamp
+
7056 (adapter
->tx_timeout_factor
* HZ
)) &&
7057 !(rd32(E1000_STATUS
) & E1000_STATUS_TXOFF
)) {
7059 /* detected Tx unit hang */
7060 dev_err(tx_ring
->dev
,
7061 "Detected Tx Unit Hang\n"
7065 " next_to_use <%x>\n"
7066 " next_to_clean <%x>\n"
7067 "buffer_info[next_to_clean]\n"
7068 " time_stamp <%lx>\n"
7069 " next_to_watch <%p>\n"
7071 " desc.status <%x>\n",
7072 tx_ring
->queue_index
,
7073 rd32(E1000_TDH(tx_ring
->reg_idx
)),
7074 readl(tx_ring
->tail
),
7075 tx_ring
->next_to_use
,
7076 tx_ring
->next_to_clean
,
7077 tx_buffer
->time_stamp
,
7078 tx_buffer
->next_to_watch
,
7080 tx_buffer
->next_to_watch
->wb
.status
);
7081 netif_stop_subqueue(tx_ring
->netdev
,
7082 tx_ring
->queue_index
);
7084 /* we are about to reset, no point in enabling stuff */
7089 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
7090 if (unlikely(total_packets
&&
7091 netif_carrier_ok(tx_ring
->netdev
) &&
7092 igb_desc_unused(tx_ring
) >= TX_WAKE_THRESHOLD
)) {
7093 /* Make sure that anybody stopping the queue after this
7094 * sees the new next_to_clean.
7097 if (__netif_subqueue_stopped(tx_ring
->netdev
,
7098 tx_ring
->queue_index
) &&
7099 !(test_bit(__IGB_DOWN
, &adapter
->state
))) {
7100 netif_wake_subqueue(tx_ring
->netdev
,
7101 tx_ring
->queue_index
);
7103 u64_stats_update_begin(&tx_ring
->tx_syncp
);
7104 tx_ring
->tx_stats
.restart_queue
++;
7105 u64_stats_update_end(&tx_ring
->tx_syncp
);
7113 * igb_reuse_rx_page - page flip buffer and store it back on the ring
7114 * @rx_ring: rx descriptor ring to store buffers on
7115 * @old_buff: donor buffer to have page reused
7117 * Synchronizes page for reuse by the adapter
7119 static void igb_reuse_rx_page(struct igb_ring
*rx_ring
,
7120 struct igb_rx_buffer
*old_buff
)
7122 struct igb_rx_buffer
*new_buff
;
7123 u16 nta
= rx_ring
->next_to_alloc
;
7125 new_buff
= &rx_ring
->rx_buffer_info
[nta
];
7127 /* update, and store next to alloc */
7129 rx_ring
->next_to_alloc
= (nta
< rx_ring
->count
) ? nta
: 0;
7131 /* Transfer page from old buffer to new buffer.
7132 * Move each member individually to avoid possible store
7133 * forwarding stalls.
7135 new_buff
->dma
= old_buff
->dma
;
7136 new_buff
->page
= old_buff
->page
;
7137 new_buff
->page_offset
= old_buff
->page_offset
;
7138 new_buff
->pagecnt_bias
= old_buff
->pagecnt_bias
;
7141 static inline bool igb_page_is_reserved(struct page
*page
)
7143 return (page_to_nid(page
) != numa_mem_id()) || page_is_pfmemalloc(page
);
7146 static bool igb_can_reuse_rx_page(struct igb_rx_buffer
*rx_buffer
)
7148 unsigned int pagecnt_bias
= rx_buffer
->pagecnt_bias
;
7149 struct page
*page
= rx_buffer
->page
;
7151 /* avoid re-using remote pages */
7152 if (unlikely(igb_page_is_reserved(page
)))
7155 #if (PAGE_SIZE < 8192)
7156 /* if we are only owner of page we can reuse it */
7157 if (unlikely((page_ref_count(page
) - pagecnt_bias
) > 1))
7160 #define IGB_LAST_OFFSET \
7161 (SKB_WITH_OVERHEAD(PAGE_SIZE) - IGB_RXBUFFER_2048)
7163 if (rx_buffer
->page_offset
> IGB_LAST_OFFSET
)
7167 /* If we have drained the page fragment pool we need to update
7168 * the pagecnt_bias and page count so that we fully restock the
7169 * number of references the driver holds.
7171 if (unlikely(!pagecnt_bias
)) {
7172 page_ref_add(page
, USHRT_MAX
);
7173 rx_buffer
->pagecnt_bias
= USHRT_MAX
;
7180 * igb_add_rx_frag - Add contents of Rx buffer to sk_buff
7181 * @rx_ring: rx descriptor ring to transact packets on
7182 * @rx_buffer: buffer containing page to add
7183 * @skb: sk_buff to place the data into
7184 * @size: size of buffer to be added
7186 * This function will add the data contained in rx_buffer->page to the skb.
7188 static void igb_add_rx_frag(struct igb_ring
*rx_ring
,
7189 struct igb_rx_buffer
*rx_buffer
,
7190 struct sk_buff
*skb
,
7193 #if (PAGE_SIZE < 8192)
7194 unsigned int truesize
= igb_rx_pg_size(rx_ring
) / 2;
7196 unsigned int truesize
= ring_uses_build_skb(rx_ring
) ?
7197 SKB_DATA_ALIGN(IGB_SKB_PAD
+ size
) :
7198 SKB_DATA_ALIGN(size
);
7200 skb_add_rx_frag(skb
, skb_shinfo(skb
)->nr_frags
, rx_buffer
->page
,
7201 rx_buffer
->page_offset
, size
, truesize
);
7202 #if (PAGE_SIZE < 8192)
7203 rx_buffer
->page_offset
^= truesize
;
7205 rx_buffer
->page_offset
+= truesize
;
7209 static struct sk_buff
*igb_construct_skb(struct igb_ring
*rx_ring
,
7210 struct igb_rx_buffer
*rx_buffer
,
7211 union e1000_adv_rx_desc
*rx_desc
,
7214 void *va
= page_address(rx_buffer
->page
) + rx_buffer
->page_offset
;
7215 #if (PAGE_SIZE < 8192)
7216 unsigned int truesize
= igb_rx_pg_size(rx_ring
) / 2;
7218 unsigned int truesize
= SKB_DATA_ALIGN(size
);
7220 unsigned int headlen
;
7221 struct sk_buff
*skb
;
7223 /* prefetch first cache line of first page */
7225 #if L1_CACHE_BYTES < 128
7226 prefetch(va
+ L1_CACHE_BYTES
);
7229 /* allocate a skb to store the frags */
7230 skb
= napi_alloc_skb(&rx_ring
->q_vector
->napi
, IGB_RX_HDR_LEN
);
7234 if (unlikely(igb_test_staterr(rx_desc
, E1000_RXDADV_STAT_TSIP
))) {
7235 igb_ptp_rx_pktstamp(rx_ring
->q_vector
, va
, skb
);
7236 va
+= IGB_TS_HDR_LEN
;
7237 size
-= IGB_TS_HDR_LEN
;
7240 /* Determine available headroom for copy */
7242 if (headlen
> IGB_RX_HDR_LEN
)
7243 headlen
= eth_get_headlen(va
, IGB_RX_HDR_LEN
);
7245 /* align pull length to size of long to optimize memcpy performance */
7246 memcpy(__skb_put(skb
, headlen
), va
, ALIGN(headlen
, sizeof(long)));
7248 /* update all of the pointers */
7251 skb_add_rx_frag(skb
, 0, rx_buffer
->page
,
7252 (va
+ headlen
) - page_address(rx_buffer
->page
),
7254 #if (PAGE_SIZE < 8192)
7255 rx_buffer
->page_offset
^= truesize
;
7257 rx_buffer
->page_offset
+= truesize
;
7260 rx_buffer
->pagecnt_bias
++;
7266 static struct sk_buff
*igb_build_skb(struct igb_ring
*rx_ring
,
7267 struct igb_rx_buffer
*rx_buffer
,
7268 union e1000_adv_rx_desc
*rx_desc
,
7271 void *va
= page_address(rx_buffer
->page
) + rx_buffer
->page_offset
;
7272 #if (PAGE_SIZE < 8192)
7273 unsigned int truesize
= igb_rx_pg_size(rx_ring
) / 2;
7275 unsigned int truesize
= SKB_DATA_ALIGN(sizeof(struct skb_shared_info
)) +
7276 SKB_DATA_ALIGN(IGB_SKB_PAD
+ size
);
7278 struct sk_buff
*skb
;
7280 /* prefetch first cache line of first page */
7282 #if L1_CACHE_BYTES < 128
7283 prefetch(va
+ L1_CACHE_BYTES
);
7286 /* build an skb around the page buffer */
7287 skb
= build_skb(va
- IGB_SKB_PAD
, truesize
);
7291 /* update pointers within the skb to store the data */
7292 skb_reserve(skb
, IGB_SKB_PAD
);
7293 __skb_put(skb
, size
);
7295 /* pull timestamp out of packet data */
7296 if (igb_test_staterr(rx_desc
, E1000_RXDADV_STAT_TSIP
)) {
7297 igb_ptp_rx_pktstamp(rx_ring
->q_vector
, skb
->data
, skb
);
7298 __skb_pull(skb
, IGB_TS_HDR_LEN
);
7301 /* update buffer offset */
7302 #if (PAGE_SIZE < 8192)
7303 rx_buffer
->page_offset
^= truesize
;
7305 rx_buffer
->page_offset
+= truesize
;
7311 static inline void igb_rx_checksum(struct igb_ring
*ring
,
7312 union e1000_adv_rx_desc
*rx_desc
,
7313 struct sk_buff
*skb
)
7315 skb_checksum_none_assert(skb
);
7317 /* Ignore Checksum bit is set */
7318 if (igb_test_staterr(rx_desc
, E1000_RXD_STAT_IXSM
))
7321 /* Rx checksum disabled via ethtool */
7322 if (!(ring
->netdev
->features
& NETIF_F_RXCSUM
))
7325 /* TCP/UDP checksum error bit is set */
7326 if (igb_test_staterr(rx_desc
,
7327 E1000_RXDEXT_STATERR_TCPE
|
7328 E1000_RXDEXT_STATERR_IPE
)) {
7329 /* work around errata with sctp packets where the TCPE aka
7330 * L4E bit is set incorrectly on 64 byte (60 byte w/o crc)
7331 * packets, (aka let the stack check the crc32c)
7333 if (!((skb
->len
== 60) &&
7334 test_bit(IGB_RING_FLAG_RX_SCTP_CSUM
, &ring
->flags
))) {
7335 u64_stats_update_begin(&ring
->rx_syncp
);
7336 ring
->rx_stats
.csum_err
++;
7337 u64_stats_update_end(&ring
->rx_syncp
);
7339 /* let the stack verify checksum errors */
7342 /* It must be a TCP or UDP packet with a valid checksum */
7343 if (igb_test_staterr(rx_desc
, E1000_RXD_STAT_TCPCS
|
7344 E1000_RXD_STAT_UDPCS
))
7345 skb
->ip_summed
= CHECKSUM_UNNECESSARY
;
7347 dev_dbg(ring
->dev
, "cksum success: bits %08X\n",
7348 le32_to_cpu(rx_desc
->wb
.upper
.status_error
));
7351 static inline void igb_rx_hash(struct igb_ring
*ring
,
7352 union e1000_adv_rx_desc
*rx_desc
,
7353 struct sk_buff
*skb
)
7355 if (ring
->netdev
->features
& NETIF_F_RXHASH
)
7357 le32_to_cpu(rx_desc
->wb
.lower
.hi_dword
.rss
),
7362 * igb_is_non_eop - process handling of non-EOP buffers
7363 * @rx_ring: Rx ring being processed
7364 * @rx_desc: Rx descriptor for current buffer
7365 * @skb: current socket buffer containing buffer in progress
7367 * This function updates next to clean. If the buffer is an EOP buffer
7368 * this function exits returning false, otherwise it will place the
7369 * sk_buff in the next buffer to be chained and return true indicating
7370 * that this is in fact a non-EOP buffer.
7372 static bool igb_is_non_eop(struct igb_ring
*rx_ring
,
7373 union e1000_adv_rx_desc
*rx_desc
)
7375 u32 ntc
= rx_ring
->next_to_clean
+ 1;
7377 /* fetch, update, and store next to clean */
7378 ntc
= (ntc
< rx_ring
->count
) ? ntc
: 0;
7379 rx_ring
->next_to_clean
= ntc
;
7381 prefetch(IGB_RX_DESC(rx_ring
, ntc
));
7383 if (likely(igb_test_staterr(rx_desc
, E1000_RXD_STAT_EOP
)))
7390 * igb_cleanup_headers - Correct corrupted or empty headers
7391 * @rx_ring: rx descriptor ring packet is being transacted on
7392 * @rx_desc: pointer to the EOP Rx descriptor
7393 * @skb: pointer to current skb being fixed
7395 * Address the case where we are pulling data in on pages only
7396 * and as such no data is present in the skb header.
7398 * In addition if skb is not at least 60 bytes we need to pad it so that
7399 * it is large enough to qualify as a valid Ethernet frame.
7401 * Returns true if an error was encountered and skb was freed.
7403 static bool igb_cleanup_headers(struct igb_ring
*rx_ring
,
7404 union e1000_adv_rx_desc
*rx_desc
,
7405 struct sk_buff
*skb
)
7407 if (unlikely((igb_test_staterr(rx_desc
,
7408 E1000_RXDEXT_ERR_FRAME_ERR_MASK
)))) {
7409 struct net_device
*netdev
= rx_ring
->netdev
;
7410 if (!(netdev
->features
& NETIF_F_RXALL
)) {
7411 dev_kfree_skb_any(skb
);
7416 /* if eth_skb_pad returns an error the skb was freed */
7417 if (eth_skb_pad(skb
))
7424 * igb_process_skb_fields - Populate skb header fields from Rx descriptor
7425 * @rx_ring: rx descriptor ring packet is being transacted on
7426 * @rx_desc: pointer to the EOP Rx descriptor
7427 * @skb: pointer to current skb being populated
7429 * This function checks the ring, descriptor, and packet information in
7430 * order to populate the hash, checksum, VLAN, timestamp, protocol, and
7431 * other fields within the skb.
7433 static void igb_process_skb_fields(struct igb_ring
*rx_ring
,
7434 union e1000_adv_rx_desc
*rx_desc
,
7435 struct sk_buff
*skb
)
7437 struct net_device
*dev
= rx_ring
->netdev
;
7439 igb_rx_hash(rx_ring
, rx_desc
, skb
);
7441 igb_rx_checksum(rx_ring
, rx_desc
, skb
);
7443 if (igb_test_staterr(rx_desc
, E1000_RXDADV_STAT_TS
) &&
7444 !igb_test_staterr(rx_desc
, E1000_RXDADV_STAT_TSIP
))
7445 igb_ptp_rx_rgtstamp(rx_ring
->q_vector
, skb
);
7447 if ((dev
->features
& NETIF_F_HW_VLAN_CTAG_RX
) &&
7448 igb_test_staterr(rx_desc
, E1000_RXD_STAT_VP
)) {
7451 if (igb_test_staterr(rx_desc
, E1000_RXDEXT_STATERR_LB
) &&
7452 test_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP
, &rx_ring
->flags
))
7453 vid
= be16_to_cpu(rx_desc
->wb
.upper
.vlan
);
7455 vid
= le16_to_cpu(rx_desc
->wb
.upper
.vlan
);
7457 __vlan_hwaccel_put_tag(skb
, htons(ETH_P_8021Q
), vid
);
7460 skb_record_rx_queue(skb
, rx_ring
->queue_index
);
7462 skb
->protocol
= eth_type_trans(skb
, rx_ring
->netdev
);
7465 static struct igb_rx_buffer
*igb_get_rx_buffer(struct igb_ring
*rx_ring
,
7466 const unsigned int size
)
7468 struct igb_rx_buffer
*rx_buffer
;
7470 rx_buffer
= &rx_ring
->rx_buffer_info
[rx_ring
->next_to_clean
];
7471 prefetchw(rx_buffer
->page
);
7473 /* we are reusing so sync this buffer for CPU use */
7474 dma_sync_single_range_for_cpu(rx_ring
->dev
,
7476 rx_buffer
->page_offset
,
7480 rx_buffer
->pagecnt_bias
--;
7485 static void igb_put_rx_buffer(struct igb_ring
*rx_ring
,
7486 struct igb_rx_buffer
*rx_buffer
)
7488 if (igb_can_reuse_rx_page(rx_buffer
)) {
7489 /* hand second half of page back to the ring */
7490 igb_reuse_rx_page(rx_ring
, rx_buffer
);
7492 /* We are not reusing the buffer so unmap it and free
7493 * any references we are holding to it
7495 dma_unmap_page_attrs(rx_ring
->dev
, rx_buffer
->dma
,
7496 igb_rx_pg_size(rx_ring
), DMA_FROM_DEVICE
,
7498 __page_frag_cache_drain(rx_buffer
->page
,
7499 rx_buffer
->pagecnt_bias
);
7502 /* clear contents of rx_buffer */
7503 rx_buffer
->page
= NULL
;
7506 static int igb_clean_rx_irq(struct igb_q_vector
*q_vector
, const int budget
)
7508 struct igb_ring
*rx_ring
= q_vector
->rx
.ring
;
7509 struct sk_buff
*skb
= rx_ring
->skb
;
7510 unsigned int total_bytes
= 0, total_packets
= 0;
7511 u16 cleaned_count
= igb_desc_unused(rx_ring
);
7513 while (likely(total_packets
< budget
)) {
7514 union e1000_adv_rx_desc
*rx_desc
;
7515 struct igb_rx_buffer
*rx_buffer
;
7518 /* return some buffers to hardware, one at a time is too slow */
7519 if (cleaned_count
>= IGB_RX_BUFFER_WRITE
) {
7520 igb_alloc_rx_buffers(rx_ring
, cleaned_count
);
7524 rx_desc
= IGB_RX_DESC(rx_ring
, rx_ring
->next_to_clean
);
7525 size
= le16_to_cpu(rx_desc
->wb
.upper
.length
);
7529 /* This memory barrier is needed to keep us from reading
7530 * any other fields out of the rx_desc until we know the
7531 * descriptor has been written back
7535 rx_buffer
= igb_get_rx_buffer(rx_ring
, size
);
7537 /* retrieve a buffer from the ring */
7539 igb_add_rx_frag(rx_ring
, rx_buffer
, skb
, size
);
7540 else if (ring_uses_build_skb(rx_ring
))
7541 skb
= igb_build_skb(rx_ring
, rx_buffer
, rx_desc
, size
);
7543 skb
= igb_construct_skb(rx_ring
, rx_buffer
,
7546 /* exit if we failed to retrieve a buffer */
7548 rx_ring
->rx_stats
.alloc_failed
++;
7549 rx_buffer
->pagecnt_bias
++;
7553 igb_put_rx_buffer(rx_ring
, rx_buffer
);
7556 /* fetch next buffer in frame if non-eop */
7557 if (igb_is_non_eop(rx_ring
, rx_desc
))
7560 /* verify the packet layout is correct */
7561 if (igb_cleanup_headers(rx_ring
, rx_desc
, skb
)) {
7566 /* probably a little skewed due to removing CRC */
7567 total_bytes
+= skb
->len
;
7569 /* populate checksum, timestamp, VLAN, and protocol */
7570 igb_process_skb_fields(rx_ring
, rx_desc
, skb
);
7572 napi_gro_receive(&q_vector
->napi
, skb
);
7574 /* reset skb pointer */
7577 /* update budget accounting */
7581 /* place incomplete frames back on ring for completion */
7584 u64_stats_update_begin(&rx_ring
->rx_syncp
);
7585 rx_ring
->rx_stats
.packets
+= total_packets
;
7586 rx_ring
->rx_stats
.bytes
+= total_bytes
;
7587 u64_stats_update_end(&rx_ring
->rx_syncp
);
7588 q_vector
->rx
.total_packets
+= total_packets
;
7589 q_vector
->rx
.total_bytes
+= total_bytes
;
7592 igb_alloc_rx_buffers(rx_ring
, cleaned_count
);
7594 return total_packets
;
7597 static inline unsigned int igb_rx_offset(struct igb_ring
*rx_ring
)
7599 return ring_uses_build_skb(rx_ring
) ? IGB_SKB_PAD
: 0;
7602 static bool igb_alloc_mapped_page(struct igb_ring
*rx_ring
,
7603 struct igb_rx_buffer
*bi
)
7605 struct page
*page
= bi
->page
;
7608 /* since we are recycling buffers we should seldom need to alloc */
7612 /* alloc new page for storage */
7613 page
= dev_alloc_pages(igb_rx_pg_order(rx_ring
));
7614 if (unlikely(!page
)) {
7615 rx_ring
->rx_stats
.alloc_failed
++;
7619 /* map page for use */
7620 dma
= dma_map_page_attrs(rx_ring
->dev
, page
, 0,
7621 igb_rx_pg_size(rx_ring
),
7625 /* if mapping failed free memory back to system since
7626 * there isn't much point in holding memory we can't use
7628 if (dma_mapping_error(rx_ring
->dev
, dma
)) {
7629 __free_pages(page
, igb_rx_pg_order(rx_ring
));
7631 rx_ring
->rx_stats
.alloc_failed
++;
7637 bi
->page_offset
= igb_rx_offset(rx_ring
);
7638 bi
->pagecnt_bias
= 1;
7644 * igb_alloc_rx_buffers - Replace used receive buffers; packet split
7645 * @adapter: address of board private structure
7647 void igb_alloc_rx_buffers(struct igb_ring
*rx_ring
, u16 cleaned_count
)
7649 union e1000_adv_rx_desc
*rx_desc
;
7650 struct igb_rx_buffer
*bi
;
7651 u16 i
= rx_ring
->next_to_use
;
7658 rx_desc
= IGB_RX_DESC(rx_ring
, i
);
7659 bi
= &rx_ring
->rx_buffer_info
[i
];
7660 i
-= rx_ring
->count
;
7662 bufsz
= igb_rx_bufsz(rx_ring
);
7665 if (!igb_alloc_mapped_page(rx_ring
, bi
))
7668 /* sync the buffer for use by the device */
7669 dma_sync_single_range_for_device(rx_ring
->dev
, bi
->dma
,
7670 bi
->page_offset
, bufsz
,
7673 /* Refresh the desc even if buffer_addrs didn't change
7674 * because each write-back erases this info.
7676 rx_desc
->read
.pkt_addr
= cpu_to_le64(bi
->dma
+ bi
->page_offset
);
7682 rx_desc
= IGB_RX_DESC(rx_ring
, 0);
7683 bi
= rx_ring
->rx_buffer_info
;
7684 i
-= rx_ring
->count
;
7687 /* clear the length for the next_to_use descriptor */
7688 rx_desc
->wb
.upper
.length
= 0;
7691 } while (cleaned_count
);
7693 i
+= rx_ring
->count
;
7695 if (rx_ring
->next_to_use
!= i
) {
7696 /* record the next descriptor to use */
7697 rx_ring
->next_to_use
= i
;
7699 /* update next to alloc since we have filled the ring */
7700 rx_ring
->next_to_alloc
= i
;
7702 /* Force memory writes to complete before letting h/w
7703 * know there are new descriptors to fetch. (Only
7704 * applicable for weak-ordered memory model archs,
7708 writel(i
, rx_ring
->tail
);
7718 static int igb_mii_ioctl(struct net_device
*netdev
, struct ifreq
*ifr
, int cmd
)
7720 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7721 struct mii_ioctl_data
*data
= if_mii(ifr
);
7723 if (adapter
->hw
.phy
.media_type
!= e1000_media_type_copper
)
7728 data
->phy_id
= adapter
->hw
.phy
.addr
;
7731 if (igb_read_phy_reg(&adapter
->hw
, data
->reg_num
& 0x1F,
7748 static int igb_ioctl(struct net_device
*netdev
, struct ifreq
*ifr
, int cmd
)
7754 return igb_mii_ioctl(netdev
, ifr
, cmd
);
7756 return igb_ptp_get_ts_config(netdev
, ifr
);
7758 return igb_ptp_set_ts_config(netdev
, ifr
);
7764 void igb_read_pci_cfg(struct e1000_hw
*hw
, u32 reg
, u16
*value
)
7766 struct igb_adapter
*adapter
= hw
->back
;
7768 pci_read_config_word(adapter
->pdev
, reg
, value
);
7771 void igb_write_pci_cfg(struct e1000_hw
*hw
, u32 reg
, u16
*value
)
7773 struct igb_adapter
*adapter
= hw
->back
;
7775 pci_write_config_word(adapter
->pdev
, reg
, *value
);
7778 s32
igb_read_pcie_cap_reg(struct e1000_hw
*hw
, u32 reg
, u16
*value
)
7780 struct igb_adapter
*adapter
= hw
->back
;
7782 if (pcie_capability_read_word(adapter
->pdev
, reg
, value
))
7783 return -E1000_ERR_CONFIG
;
7788 s32
igb_write_pcie_cap_reg(struct e1000_hw
*hw
, u32 reg
, u16
*value
)
7790 struct igb_adapter
*adapter
= hw
->back
;
7792 if (pcie_capability_write_word(adapter
->pdev
, reg
, *value
))
7793 return -E1000_ERR_CONFIG
;
7798 static void igb_vlan_mode(struct net_device
*netdev
, netdev_features_t features
)
7800 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7801 struct e1000_hw
*hw
= &adapter
->hw
;
7803 bool enable
= !!(features
& NETIF_F_HW_VLAN_CTAG_RX
);
7806 /* enable VLAN tag insert/strip */
7807 ctrl
= rd32(E1000_CTRL
);
7808 ctrl
|= E1000_CTRL_VME
;
7809 wr32(E1000_CTRL
, ctrl
);
7811 /* Disable CFI check */
7812 rctl
= rd32(E1000_RCTL
);
7813 rctl
&= ~E1000_RCTL_CFIEN
;
7814 wr32(E1000_RCTL
, rctl
);
7816 /* disable VLAN tag insert/strip */
7817 ctrl
= rd32(E1000_CTRL
);
7818 ctrl
&= ~E1000_CTRL_VME
;
7819 wr32(E1000_CTRL
, ctrl
);
7822 igb_set_vf_vlan_strip(adapter
, adapter
->vfs_allocated_count
, enable
);
7825 static int igb_vlan_rx_add_vid(struct net_device
*netdev
,
7826 __be16 proto
, u16 vid
)
7828 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7829 struct e1000_hw
*hw
= &adapter
->hw
;
7830 int pf_id
= adapter
->vfs_allocated_count
;
7832 /* add the filter since PF can receive vlans w/o entry in vlvf */
7833 if (!vid
|| !(adapter
->flags
& IGB_FLAG_VLAN_PROMISC
))
7834 igb_vfta_set(hw
, vid
, pf_id
, true, !!vid
);
7836 set_bit(vid
, adapter
->active_vlans
);
7841 static int igb_vlan_rx_kill_vid(struct net_device
*netdev
,
7842 __be16 proto
, u16 vid
)
7844 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7845 int pf_id
= adapter
->vfs_allocated_count
;
7846 struct e1000_hw
*hw
= &adapter
->hw
;
7848 /* remove VID from filter table */
7849 if (vid
&& !(adapter
->flags
& IGB_FLAG_VLAN_PROMISC
))
7850 igb_vfta_set(hw
, vid
, pf_id
, false, true);
7852 clear_bit(vid
, adapter
->active_vlans
);
7857 static void igb_restore_vlan(struct igb_adapter
*adapter
)
7861 igb_vlan_mode(adapter
->netdev
, adapter
->netdev
->features
);
7862 igb_vlan_rx_add_vid(adapter
->netdev
, htons(ETH_P_8021Q
), 0);
7864 for_each_set_bit_from(vid
, adapter
->active_vlans
, VLAN_N_VID
)
7865 igb_vlan_rx_add_vid(adapter
->netdev
, htons(ETH_P_8021Q
), vid
);
7868 int igb_set_spd_dplx(struct igb_adapter
*adapter
, u32 spd
, u8 dplx
)
7870 struct pci_dev
*pdev
= adapter
->pdev
;
7871 struct e1000_mac_info
*mac
= &adapter
->hw
.mac
;
7875 /* Make sure dplx is at most 1 bit and lsb of speed is not set
7876 * for the switch() below to work
7878 if ((spd
& 1) || (dplx
& ~1))
7881 /* Fiber NIC's only allow 1000 gbps Full duplex
7882 * and 100Mbps Full duplex for 100baseFx sfp
7884 if (adapter
->hw
.phy
.media_type
== e1000_media_type_internal_serdes
) {
7885 switch (spd
+ dplx
) {
7886 case SPEED_10
+ DUPLEX_HALF
:
7887 case SPEED_10
+ DUPLEX_FULL
:
7888 case SPEED_100
+ DUPLEX_HALF
:
7895 switch (spd
+ dplx
) {
7896 case SPEED_10
+ DUPLEX_HALF
:
7897 mac
->forced_speed_duplex
= ADVERTISE_10_HALF
;
7899 case SPEED_10
+ DUPLEX_FULL
:
7900 mac
->forced_speed_duplex
= ADVERTISE_10_FULL
;
7902 case SPEED_100
+ DUPLEX_HALF
:
7903 mac
->forced_speed_duplex
= ADVERTISE_100_HALF
;
7905 case SPEED_100
+ DUPLEX_FULL
:
7906 mac
->forced_speed_duplex
= ADVERTISE_100_FULL
;
7908 case SPEED_1000
+ DUPLEX_FULL
:
7910 adapter
->hw
.phy
.autoneg_advertised
= ADVERTISE_1000_FULL
;
7912 case SPEED_1000
+ DUPLEX_HALF
: /* not supported */
7917 /* clear MDI, MDI(-X) override is only allowed when autoneg enabled */
7918 adapter
->hw
.phy
.mdix
= AUTO_ALL_MODES
;
7923 dev_err(&pdev
->dev
, "Unsupported Speed/Duplex configuration\n");
7927 static int __igb_shutdown(struct pci_dev
*pdev
, bool *enable_wake
,
7930 struct net_device
*netdev
= pci_get_drvdata(pdev
);
7931 struct igb_adapter
*adapter
= netdev_priv(netdev
);
7932 struct e1000_hw
*hw
= &adapter
->hw
;
7933 u32 ctrl
, rctl
, status
;
7934 u32 wufc
= runtime
? E1000_WUFC_LNKC
: adapter
->wol
;
7940 netif_device_detach(netdev
);
7942 if (netif_running(netdev
))
7943 __igb_close(netdev
, true);
7945 igb_ptp_suspend(adapter
);
7947 igb_clear_interrupt_scheme(adapter
);
7951 retval
= pci_save_state(pdev
);
7956 status
= rd32(E1000_STATUS
);
7957 if (status
& E1000_STATUS_LU
)
7958 wufc
&= ~E1000_WUFC_LNKC
;
7961 igb_setup_rctl(adapter
);
7962 igb_set_rx_mode(netdev
);
7964 /* turn on all-multi mode if wake on multicast is enabled */
7965 if (wufc
& E1000_WUFC_MC
) {
7966 rctl
= rd32(E1000_RCTL
);
7967 rctl
|= E1000_RCTL_MPE
;
7968 wr32(E1000_RCTL
, rctl
);
7971 ctrl
= rd32(E1000_CTRL
);
7972 /* advertise wake from D3Cold */
7973 #define E1000_CTRL_ADVD3WUC 0x00100000
7974 /* phy power management enable */
7975 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
7976 ctrl
|= E1000_CTRL_ADVD3WUC
;
7977 wr32(E1000_CTRL
, ctrl
);
7979 /* Allow time for pending master requests to run */
7980 igb_disable_pcie_master(hw
);
7982 wr32(E1000_WUC
, E1000_WUC_PME_EN
);
7983 wr32(E1000_WUFC
, wufc
);
7986 wr32(E1000_WUFC
, 0);
7989 *enable_wake
= wufc
|| adapter
->en_mng_pt
;
7991 igb_power_down_link(adapter
);
7993 igb_power_up_link(adapter
);
7995 /* Release control of h/w to f/w. If f/w is AMT enabled, this
7996 * would have already happened in close and is redundant.
7998 igb_release_hw_control(adapter
);
8000 pci_disable_device(pdev
);
8005 static void igb_deliver_wake_packet(struct net_device
*netdev
)
8007 struct igb_adapter
*adapter
= netdev_priv(netdev
);
8008 struct e1000_hw
*hw
= &adapter
->hw
;
8009 struct sk_buff
*skb
;
8012 wupl
= rd32(E1000_WUPL
) & E1000_WUPL_MASK
;
8014 /* WUPM stores only the first 128 bytes of the wake packet.
8015 * Read the packet only if we have the whole thing.
8017 if ((wupl
== 0) || (wupl
> E1000_WUPM_BYTES
))
8020 skb
= netdev_alloc_skb_ip_align(netdev
, E1000_WUPM_BYTES
);
8026 /* Ensure reads are 32-bit aligned */
8027 wupl
= roundup(wupl
, 4);
8029 memcpy_fromio(skb
->data
, hw
->hw_addr
+ E1000_WUPM_REG(0), wupl
);
8031 skb
->protocol
= eth_type_trans(skb
, netdev
);
8035 static int __maybe_unused
igb_suspend(struct device
*dev
)
8039 struct pci_dev
*pdev
= to_pci_dev(dev
);
8041 retval
= __igb_shutdown(pdev
, &wake
, 0);
8046 pci_prepare_to_sleep(pdev
);
8048 pci_wake_from_d3(pdev
, false);
8049 pci_set_power_state(pdev
, PCI_D3hot
);
8055 static int __maybe_unused
igb_resume(struct device
*dev
)
8057 struct pci_dev
*pdev
= to_pci_dev(dev
);
8058 struct net_device
*netdev
= pci_get_drvdata(pdev
);
8059 struct igb_adapter
*adapter
= netdev_priv(netdev
);
8060 struct e1000_hw
*hw
= &adapter
->hw
;
8063 pci_set_power_state(pdev
, PCI_D0
);
8064 pci_restore_state(pdev
);
8065 pci_save_state(pdev
);
8067 if (!pci_device_is_present(pdev
))
8069 err
= pci_enable_device_mem(pdev
);
8072 "igb: Cannot enable PCI device from suspend\n");
8075 pci_set_master(pdev
);
8077 pci_enable_wake(pdev
, PCI_D3hot
, 0);
8078 pci_enable_wake(pdev
, PCI_D3cold
, 0);
8080 if (igb_init_interrupt_scheme(adapter
, true)) {
8081 dev_err(&pdev
->dev
, "Unable to allocate memory for queues\n");
8087 /* let the f/w know that the h/w is now under the control of the
8090 igb_get_hw_control(adapter
);
8092 val
= rd32(E1000_WUS
);
8093 if (val
& WAKE_PKT_WUS
)
8094 igb_deliver_wake_packet(netdev
);
8096 wr32(E1000_WUS
, ~0);
8099 if (!err
&& netif_running(netdev
))
8100 err
= __igb_open(netdev
, true);
8103 netif_device_attach(netdev
);
8109 static int __maybe_unused
igb_runtime_idle(struct device
*dev
)
8111 struct pci_dev
*pdev
= to_pci_dev(dev
);
8112 struct net_device
*netdev
= pci_get_drvdata(pdev
);
8113 struct igb_adapter
*adapter
= netdev_priv(netdev
);
8115 if (!igb_has_link(adapter
))
8116 pm_schedule_suspend(dev
, MSEC_PER_SEC
* 5);
8121 static int __maybe_unused
igb_runtime_suspend(struct device
*dev
)
8123 struct pci_dev
*pdev
= to_pci_dev(dev
);
8127 retval
= __igb_shutdown(pdev
, &wake
, 1);
8132 pci_prepare_to_sleep(pdev
);
8134 pci_wake_from_d3(pdev
, false);
8135 pci_set_power_state(pdev
, PCI_D3hot
);
8141 static int __maybe_unused
igb_runtime_resume(struct device
*dev
)
8143 return igb_resume(dev
);
8146 static void igb_shutdown(struct pci_dev
*pdev
)
8150 __igb_shutdown(pdev
, &wake
, 0);
8152 if (system_state
== SYSTEM_POWER_OFF
) {
8153 pci_wake_from_d3(pdev
, wake
);
8154 pci_set_power_state(pdev
, PCI_D3hot
);
8158 #ifdef CONFIG_PCI_IOV
8159 static int igb_sriov_reinit(struct pci_dev
*dev
)
8161 struct net_device
*netdev
= pci_get_drvdata(dev
);
8162 struct igb_adapter
*adapter
= netdev_priv(netdev
);
8163 struct pci_dev
*pdev
= adapter
->pdev
;
8167 if (netif_running(netdev
))
8172 igb_clear_interrupt_scheme(adapter
);
8174 igb_init_queue_configuration(adapter
);
8176 if (igb_init_interrupt_scheme(adapter
, true)) {
8178 dev_err(&pdev
->dev
, "Unable to allocate memory for queues\n");
8182 if (netif_running(netdev
))
8190 static int igb_pci_disable_sriov(struct pci_dev
*dev
)
8192 int err
= igb_disable_sriov(dev
);
8195 err
= igb_sriov_reinit(dev
);
8200 static int igb_pci_enable_sriov(struct pci_dev
*dev
, int num_vfs
)
8202 int err
= igb_enable_sriov(dev
, num_vfs
);
8207 err
= igb_sriov_reinit(dev
);
8216 static int igb_pci_sriov_configure(struct pci_dev
*dev
, int num_vfs
)
8218 #ifdef CONFIG_PCI_IOV
8220 return igb_pci_disable_sriov(dev
);
8222 return igb_pci_enable_sriov(dev
, num_vfs
);
8227 #ifdef CONFIG_NET_POLL_CONTROLLER
8228 /* Polling 'interrupt' - used by things like netconsole to send skbs
8229 * without having to re-enable interrupts. It's not called while
8230 * the interrupt routine is executing.
8232 static void igb_netpoll(struct net_device
*netdev
)
8234 struct igb_adapter
*adapter
= netdev_priv(netdev
);
8235 struct e1000_hw
*hw
= &adapter
->hw
;
8236 struct igb_q_vector
*q_vector
;
8239 for (i
= 0; i
< adapter
->num_q_vectors
; i
++) {
8240 q_vector
= adapter
->q_vector
[i
];
8241 if (adapter
->flags
& IGB_FLAG_HAS_MSIX
)
8242 wr32(E1000_EIMC
, q_vector
->eims_value
);
8244 igb_irq_disable(adapter
);
8245 napi_schedule(&q_vector
->napi
);
8248 #endif /* CONFIG_NET_POLL_CONTROLLER */
8251 * igb_io_error_detected - called when PCI error is detected
8252 * @pdev: Pointer to PCI device
8253 * @state: The current pci connection state
8255 * This function is called after a PCI bus error affecting
8256 * this device has been detected.
8258 static pci_ers_result_t
igb_io_error_detected(struct pci_dev
*pdev
,
8259 pci_channel_state_t state
)
8261 struct net_device
*netdev
= pci_get_drvdata(pdev
);
8262 struct igb_adapter
*adapter
= netdev_priv(netdev
);
8264 netif_device_detach(netdev
);
8266 if (state
== pci_channel_io_perm_failure
)
8267 return PCI_ERS_RESULT_DISCONNECT
;
8269 if (netif_running(netdev
))
8271 pci_disable_device(pdev
);
8273 /* Request a slot slot reset. */
8274 return PCI_ERS_RESULT_NEED_RESET
;
8278 * igb_io_slot_reset - called after the pci bus has been reset.
8279 * @pdev: Pointer to PCI device
8281 * Restart the card from scratch, as if from a cold-boot. Implementation
8282 * resembles the first-half of the igb_resume routine.
8284 static pci_ers_result_t
igb_io_slot_reset(struct pci_dev
*pdev
)
8286 struct net_device
*netdev
= pci_get_drvdata(pdev
);
8287 struct igb_adapter
*adapter
= netdev_priv(netdev
);
8288 struct e1000_hw
*hw
= &adapter
->hw
;
8289 pci_ers_result_t result
;
8292 if (pci_enable_device_mem(pdev
)) {
8294 "Cannot re-enable PCI device after reset.\n");
8295 result
= PCI_ERS_RESULT_DISCONNECT
;
8297 pci_set_master(pdev
);
8298 pci_restore_state(pdev
);
8299 pci_save_state(pdev
);
8301 pci_enable_wake(pdev
, PCI_D3hot
, 0);
8302 pci_enable_wake(pdev
, PCI_D3cold
, 0);
8304 /* In case of PCI error, adapter lose its HW address
8305 * so we should re-assign it here.
8307 hw
->hw_addr
= adapter
->io_addr
;
8310 wr32(E1000_WUS
, ~0);
8311 result
= PCI_ERS_RESULT_RECOVERED
;
8314 err
= pci_cleanup_aer_uncorrect_error_status(pdev
);
8317 "pci_cleanup_aer_uncorrect_error_status failed 0x%0x\n",
8319 /* non-fatal, continue */
8326 * igb_io_resume - called when traffic can start flowing again.
8327 * @pdev: Pointer to PCI device
8329 * This callback is called when the error recovery driver tells us that
8330 * its OK to resume normal operation. Implementation resembles the
8331 * second-half of the igb_resume routine.
8333 static void igb_io_resume(struct pci_dev
*pdev
)
8335 struct net_device
*netdev
= pci_get_drvdata(pdev
);
8336 struct igb_adapter
*adapter
= netdev_priv(netdev
);
8338 if (netif_running(netdev
)) {
8339 if (igb_up(adapter
)) {
8340 dev_err(&pdev
->dev
, "igb_up failed after reset\n");
8345 netif_device_attach(netdev
);
8347 /* let the f/w know that the h/w is now under the control of the
8350 igb_get_hw_control(adapter
);
8354 * igb_rar_set_index - Sync RAL[index] and RAH[index] registers with MAC table
8355 * @adapter: Pointer to adapter structure
8356 * @index: Index of the RAR entry which need to be synced with MAC table
8358 static void igb_rar_set_index(struct igb_adapter
*adapter
, u32 index
)
8360 struct e1000_hw
*hw
= &adapter
->hw
;
8361 u32 rar_low
, rar_high
;
8362 u8
*addr
= adapter
->mac_table
[index
].addr
;
8364 /* HW expects these to be in network order when they are plugged
8365 * into the registers which are little endian. In order to guarantee
8366 * that ordering we need to do an leXX_to_cpup here in order to be
8367 * ready for the byteswap that occurs with writel
8369 rar_low
= le32_to_cpup((__le32
*)(addr
));
8370 rar_high
= le16_to_cpup((__le16
*)(addr
+ 4));
8372 /* Indicate to hardware the Address is Valid. */
8373 if (adapter
->mac_table
[index
].state
& IGB_MAC_STATE_IN_USE
) {
8374 rar_high
|= E1000_RAH_AV
;
8376 if (hw
->mac
.type
== e1000_82575
)
8377 rar_high
|= E1000_RAH_POOL_1
*
8378 adapter
->mac_table
[index
].queue
;
8380 rar_high
|= E1000_RAH_POOL_1
<<
8381 adapter
->mac_table
[index
].queue
;
8384 wr32(E1000_RAL(index
), rar_low
);
8386 wr32(E1000_RAH(index
), rar_high
);
8390 static int igb_set_vf_mac(struct igb_adapter
*adapter
,
8391 int vf
, unsigned char *mac_addr
)
8393 struct e1000_hw
*hw
= &adapter
->hw
;
8394 /* VF MAC addresses start at end of receive addresses and moves
8395 * towards the first, as a result a collision should not be possible
8397 int rar_entry
= hw
->mac
.rar_entry_count
- (vf
+ 1);
8398 unsigned char *vf_mac_addr
= adapter
->vf_data
[vf
].vf_mac_addresses
;
8400 ether_addr_copy(vf_mac_addr
, mac_addr
);
8401 ether_addr_copy(adapter
->mac_table
[rar_entry
].addr
, mac_addr
);
8402 adapter
->mac_table
[rar_entry
].queue
= vf
;
8403 adapter
->mac_table
[rar_entry
].state
|= IGB_MAC_STATE_IN_USE
;
8404 igb_rar_set_index(adapter
, rar_entry
);
8409 static int igb_ndo_set_vf_mac(struct net_device
*netdev
, int vf
, u8
*mac
)
8411 struct igb_adapter
*adapter
= netdev_priv(netdev
);
8412 if (!is_valid_ether_addr(mac
) || (vf
>= adapter
->vfs_allocated_count
))
8414 adapter
->vf_data
[vf
].flags
|= IGB_VF_FLAG_PF_SET_MAC
;
8415 dev_info(&adapter
->pdev
->dev
, "setting MAC %pM on VF %d\n", mac
, vf
);
8416 dev_info(&adapter
->pdev
->dev
,
8417 "Reload the VF driver to make this change effective.");
8418 if (test_bit(__IGB_DOWN
, &adapter
->state
)) {
8419 dev_warn(&adapter
->pdev
->dev
,
8420 "The VF MAC address has been set, but the PF device is not up.\n");
8421 dev_warn(&adapter
->pdev
->dev
,
8422 "Bring the PF device up before attempting to use the VF device.\n");
8424 return igb_set_vf_mac(adapter
, vf
, mac
);
8427 static int igb_link_mbps(int internal_link_speed
)
8429 switch (internal_link_speed
) {
8439 static void igb_set_vf_rate_limit(struct e1000_hw
*hw
, int vf
, int tx_rate
,
8446 /* Calculate the rate factor values to set */
8447 rf_int
= link_speed
/ tx_rate
;
8448 rf_dec
= (link_speed
- (rf_int
* tx_rate
));
8449 rf_dec
= (rf_dec
* BIT(E1000_RTTBCNRC_RF_INT_SHIFT
)) /
8452 bcnrc_val
= E1000_RTTBCNRC_RS_ENA
;
8453 bcnrc_val
|= ((rf_int
<< E1000_RTTBCNRC_RF_INT_SHIFT
) &
8454 E1000_RTTBCNRC_RF_INT_MASK
);
8455 bcnrc_val
|= (rf_dec
& E1000_RTTBCNRC_RF_DEC_MASK
);
8460 wr32(E1000_RTTDQSEL
, vf
); /* vf X uses queue X */
8461 /* Set global transmit compensation time to the MMW_SIZE in RTTBCNRM
8462 * register. MMW_SIZE=0x014 if 9728-byte jumbo is supported.
8464 wr32(E1000_RTTBCNRM
, 0x14);
8465 wr32(E1000_RTTBCNRC
, bcnrc_val
);
8468 static void igb_check_vf_rate_limit(struct igb_adapter
*adapter
)
8470 int actual_link_speed
, i
;
8471 bool reset_rate
= false;
8473 /* VF TX rate limit was not set or not supported */
8474 if ((adapter
->vf_rate_link_speed
== 0) ||
8475 (adapter
->hw
.mac
.type
!= e1000_82576
))
8478 actual_link_speed
= igb_link_mbps(adapter
->link_speed
);
8479 if (actual_link_speed
!= adapter
->vf_rate_link_speed
) {
8481 adapter
->vf_rate_link_speed
= 0;
8482 dev_info(&adapter
->pdev
->dev
,
8483 "Link speed has been changed. VF Transmit rate is disabled\n");
8486 for (i
= 0; i
< adapter
->vfs_allocated_count
; i
++) {
8488 adapter
->vf_data
[i
].tx_rate
= 0;
8490 igb_set_vf_rate_limit(&adapter
->hw
, i
,
8491 adapter
->vf_data
[i
].tx_rate
,
8496 static int igb_ndo_set_vf_bw(struct net_device
*netdev
, int vf
,
8497 int min_tx_rate
, int max_tx_rate
)
8499 struct igb_adapter
*adapter
= netdev_priv(netdev
);
8500 struct e1000_hw
*hw
= &adapter
->hw
;
8501 int actual_link_speed
;
8503 if (hw
->mac
.type
!= e1000_82576
)
8509 actual_link_speed
= igb_link_mbps(adapter
->link_speed
);
8510 if ((vf
>= adapter
->vfs_allocated_count
) ||
8511 (!(rd32(E1000_STATUS
) & E1000_STATUS_LU
)) ||
8512 (max_tx_rate
< 0) ||
8513 (max_tx_rate
> actual_link_speed
))
8516 adapter
->vf_rate_link_speed
= actual_link_speed
;
8517 adapter
->vf_data
[vf
].tx_rate
= (u16
)max_tx_rate
;
8518 igb_set_vf_rate_limit(hw
, vf
, max_tx_rate
, actual_link_speed
);
8523 static int igb_ndo_set_vf_spoofchk(struct net_device
*netdev
, int vf
,
8526 struct igb_adapter
*adapter
= netdev_priv(netdev
);
8527 struct e1000_hw
*hw
= &adapter
->hw
;
8528 u32 reg_val
, reg_offset
;
8530 if (!adapter
->vfs_allocated_count
)
8533 if (vf
>= adapter
->vfs_allocated_count
)
8536 reg_offset
= (hw
->mac
.type
== e1000_82576
) ? E1000_DTXSWC
: E1000_TXSWC
;
8537 reg_val
= rd32(reg_offset
);
8539 reg_val
|= (BIT(vf
) |
8540 BIT(vf
+ E1000_DTXSWC_VLAN_SPOOF_SHIFT
));
8542 reg_val
&= ~(BIT(vf
) |
8543 BIT(vf
+ E1000_DTXSWC_VLAN_SPOOF_SHIFT
));
8544 wr32(reg_offset
, reg_val
);
8546 adapter
->vf_data
[vf
].spoofchk_enabled
= setting
;
8550 static int igb_ndo_get_vf_config(struct net_device
*netdev
,
8551 int vf
, struct ifla_vf_info
*ivi
)
8553 struct igb_adapter
*adapter
= netdev_priv(netdev
);
8554 if (vf
>= adapter
->vfs_allocated_count
)
8557 memcpy(&ivi
->mac
, adapter
->vf_data
[vf
].vf_mac_addresses
, ETH_ALEN
);
8558 ivi
->max_tx_rate
= adapter
->vf_data
[vf
].tx_rate
;
8559 ivi
->min_tx_rate
= 0;
8560 ivi
->vlan
= adapter
->vf_data
[vf
].pf_vlan
;
8561 ivi
->qos
= adapter
->vf_data
[vf
].pf_qos
;
8562 ivi
->spoofchk
= adapter
->vf_data
[vf
].spoofchk_enabled
;
8566 static void igb_vmm_control(struct igb_adapter
*adapter
)
8568 struct e1000_hw
*hw
= &adapter
->hw
;
8571 switch (hw
->mac
.type
) {
8577 /* replication is not supported for 82575 */
8580 /* notify HW that the MAC is adding vlan tags */
8581 reg
= rd32(E1000_DTXCTL
);
8582 reg
|= E1000_DTXCTL_VLAN_ADDED
;
8583 wr32(E1000_DTXCTL
, reg
);
8586 /* enable replication vlan tag stripping */
8587 reg
= rd32(E1000_RPLOLR
);
8588 reg
|= E1000_RPLOLR_STRVLAN
;
8589 wr32(E1000_RPLOLR
, reg
);
8592 /* none of the above registers are supported by i350 */
8596 if (adapter
->vfs_allocated_count
) {
8597 igb_vmdq_set_loopback_pf(hw
, true);
8598 igb_vmdq_set_replication_pf(hw
, true);
8599 igb_vmdq_set_anti_spoofing_pf(hw
, true,
8600 adapter
->vfs_allocated_count
);
8602 igb_vmdq_set_loopback_pf(hw
, false);
8603 igb_vmdq_set_replication_pf(hw
, false);
8607 static void igb_init_dmac(struct igb_adapter
*adapter
, u32 pba
)
8609 struct e1000_hw
*hw
= &adapter
->hw
;
8613 if (hw
->mac
.type
> e1000_82580
) {
8614 if (adapter
->flags
& IGB_FLAG_DMAC
) {
8617 /* force threshold to 0. */
8618 wr32(E1000_DMCTXTH
, 0);
8620 /* DMA Coalescing high water mark needs to be greater
8621 * than the Rx threshold. Set hwm to PBA - max frame
8622 * size in 16B units, capping it at PBA - 6KB.
8624 hwm
= 64 * (pba
- 6);
8625 reg
= rd32(E1000_FCRTC
);
8626 reg
&= ~E1000_FCRTC_RTH_COAL_MASK
;
8627 reg
|= ((hwm
<< E1000_FCRTC_RTH_COAL_SHIFT
)
8628 & E1000_FCRTC_RTH_COAL_MASK
);
8629 wr32(E1000_FCRTC
, reg
);
8631 /* Set the DMA Coalescing Rx threshold to PBA - 2 * max
8632 * frame size, capping it at PBA - 10KB.
8634 dmac_thr
= pba
- 10;
8635 reg
= rd32(E1000_DMACR
);
8636 reg
&= ~E1000_DMACR_DMACTHR_MASK
;
8637 reg
|= ((dmac_thr
<< E1000_DMACR_DMACTHR_SHIFT
)
8638 & E1000_DMACR_DMACTHR_MASK
);
8640 /* transition to L0x or L1 if available..*/
8641 reg
|= (E1000_DMACR_DMAC_EN
| E1000_DMACR_DMAC_LX_MASK
);
8643 /* watchdog timer= +-1000 usec in 32usec intervals */
8646 /* Disable BMC-to-OS Watchdog Enable */
8647 if (hw
->mac
.type
!= e1000_i354
)
8648 reg
&= ~E1000_DMACR_DC_BMC2OSW_EN
;
8650 wr32(E1000_DMACR
, reg
);
8652 /* no lower threshold to disable
8653 * coalescing(smart fifb)-UTRESH=0
8655 wr32(E1000_DMCRTRH
, 0);
8657 reg
= (IGB_DMCTLX_DCFLUSH_DIS
| 0x4);
8659 wr32(E1000_DMCTLX
, reg
);
8661 /* free space in tx packet buffer to wake from
8664 wr32(E1000_DMCTXTH
, (IGB_MIN_TXPBSIZE
-
8665 (IGB_TX_BUF_4096
+ adapter
->max_frame_size
)) >> 6);
8667 /* make low power state decision controlled
8670 reg
= rd32(E1000_PCIEMISC
);
8671 reg
&= ~E1000_PCIEMISC_LX_DECISION
;
8672 wr32(E1000_PCIEMISC
, reg
);
8673 } /* endif adapter->dmac is not disabled */
8674 } else if (hw
->mac
.type
== e1000_82580
) {
8675 u32 reg
= rd32(E1000_PCIEMISC
);
8677 wr32(E1000_PCIEMISC
, reg
& ~E1000_PCIEMISC_LX_DECISION
);
8678 wr32(E1000_DMACR
, 0);
8683 * igb_read_i2c_byte - Reads 8 bit word over I2C
8684 * @hw: pointer to hardware structure
8685 * @byte_offset: byte offset to read
8686 * @dev_addr: device address
8689 * Performs byte read operation over I2C interface at
8690 * a specified device address.
8692 s32
igb_read_i2c_byte(struct e1000_hw
*hw
, u8 byte_offset
,
8693 u8 dev_addr
, u8
*data
)
8695 struct igb_adapter
*adapter
= container_of(hw
, struct igb_adapter
, hw
);
8696 struct i2c_client
*this_client
= adapter
->i2c_client
;
8701 return E1000_ERR_I2C
;
8703 swfw_mask
= E1000_SWFW_PHY0_SM
;
8705 if (hw
->mac
.ops
.acquire_swfw_sync(hw
, swfw_mask
))
8706 return E1000_ERR_SWFW_SYNC
;
8708 status
= i2c_smbus_read_byte_data(this_client
, byte_offset
);
8709 hw
->mac
.ops
.release_swfw_sync(hw
, swfw_mask
);
8712 return E1000_ERR_I2C
;
8720 * igb_write_i2c_byte - Writes 8 bit word over I2C
8721 * @hw: pointer to hardware structure
8722 * @byte_offset: byte offset to write
8723 * @dev_addr: device address
8724 * @data: value to write
8726 * Performs byte write operation over I2C interface at
8727 * a specified device address.
8729 s32
igb_write_i2c_byte(struct e1000_hw
*hw
, u8 byte_offset
,
8730 u8 dev_addr
, u8 data
)
8732 struct igb_adapter
*adapter
= container_of(hw
, struct igb_adapter
, hw
);
8733 struct i2c_client
*this_client
= adapter
->i2c_client
;
8735 u16 swfw_mask
= E1000_SWFW_PHY0_SM
;
8738 return E1000_ERR_I2C
;
8740 if (hw
->mac
.ops
.acquire_swfw_sync(hw
, swfw_mask
))
8741 return E1000_ERR_SWFW_SYNC
;
8742 status
= i2c_smbus_write_byte_data(this_client
, byte_offset
, data
);
8743 hw
->mac
.ops
.release_swfw_sync(hw
, swfw_mask
);
8746 return E1000_ERR_I2C
;
8752 int igb_reinit_queues(struct igb_adapter
*adapter
)
8754 struct net_device
*netdev
= adapter
->netdev
;
8755 struct pci_dev
*pdev
= adapter
->pdev
;
8758 if (netif_running(netdev
))
8761 igb_reset_interrupt_capability(adapter
);
8763 if (igb_init_interrupt_scheme(adapter
, true)) {
8764 dev_err(&pdev
->dev
, "Unable to allocate memory for queues\n");
8768 if (netif_running(netdev
))
8769 err
= igb_open(netdev
);
8774 static void igb_nfc_filter_exit(struct igb_adapter
*adapter
)
8776 struct igb_nfc_filter
*rule
;
8778 spin_lock(&adapter
->nfc_lock
);
8780 hlist_for_each_entry(rule
, &adapter
->nfc_filter_list
, nfc_node
)
8781 igb_erase_filter(adapter
, rule
);
8783 spin_unlock(&adapter
->nfc_lock
);
8786 static void igb_nfc_filter_restore(struct igb_adapter
*adapter
)
8788 struct igb_nfc_filter
*rule
;
8790 spin_lock(&adapter
->nfc_lock
);
8792 hlist_for_each_entry(rule
, &adapter
->nfc_filter_list
, nfc_node
)
8793 igb_add_filter(adapter
, rule
);
8795 spin_unlock(&adapter
->nfc_lock
);